| Document | Document Title |
|---|---|
| US09948622B2 |
Authenticated session establishment
Methods, devices, and machine-readable media are provided to provide secure communications between entities. As provided in this disclosure, this may include receiving a request to begin a new communication session, determining one or more desired parameters of the session, and determining whether the desired parameters of the message match proposed parameters provided by the entity requesting the new communication session. When the one or more proposed parameters match the one or more desired parameters, a secure communication session is established between the entities, using shared password information. |
| US09948621B2 |
Policy based cryptographic key distribution for network group encryption
Various embodiments include a method for managing a group of devices in communication with each other and sharing a set of keys. The method may include opening a secure channel with each of two devices from the group; providing the set of keys to the two devices from the group, wherein the set of keys include an encryption and an authentication key; indicating to the two devices to begin using the set of keys; and performing an audit process including verifying that nodes within a key group have the same copy of encryption and authentication keys. Embodiments of the method may include synchronization, active/standby redundancy and the ability to manage the network when some nodes perform the data encryption and some node do not, do, or when both encrypted and non-encrypted tunnels and services can work together. |
| US09948615B1 |
Increased storage unit encryption based on loss of trust
A method for storage unit communication is provided. The method includes detecting an event associated with a loss of trust for the data stored within a storage unit and encrypting, at the storage unit, data that is being transmitted along an outbound path from the storage unit to a requestor, wherein the encrypting is responsive to detecting the event. |
| US09948611B2 |
Packet tagging for improved guest system security
Some embodiments provide a novel method for monitoring network requests from a machine. The method captures the network request at various layers of a protocol stack. At a first layer of a protocol stack, the method tags a packet related to the network request with a tag value, maps the tag value to a set of tuples associated with the packet, and sends a first set of data related to the packet to a security engine. At a second layer of the protocol stack, the method determines whether the packet has been modified through the protocol stack, and sends an updated second set of data to the security engine when the packet has been modified. |
| US09948609B2 |
Cloud-based mail system and mail service method for providing improved security
Provided are a cloud-based mail system and a mail service method for providing an improved security. The cloud-based mail system including: an e-mail transmission manager configured to encode an e-mail received from a terminal of a user or an external mail server with a first key, and to forward the e-mail encoded with the first key to a cloud mail server that provides a cloud mail service, the first key being configured to be inaccessible by the cloud mail server; and a communication interface to transmit the e-mail encoded with the first key to the cloud mail server. The e-mail encoded with the first key is configured to be encoded at the cloud mail server with a second key of the cloud mail server and stored in a storage of the cloud mail server. |
| US09948603B1 |
System and method of constructing dynamic namespaces in the internet of things
A method, performed by a network device, for communication with Internet of Things (IoT) devices is provided. The method includes receiving a communication relevant to Internet of Things devices, wherein the communication is in accordance with a naming scheme that has conventions for objects, context, data and commands and is agnostic as to a plurality of addressing schemes of the Internet of Things devices. The method includes resolving names in the communication, in accordance with the naming scheme, and sending the communication or a further communication to one or more Internet of Things devices per the resolving. |
| US09948597B1 |
Facilitating access of a mobile device to a web-based service using a network interface
The invention is directed to methods and systems for facilitating access of a mobile device to web-based services. The web-based service sends identifying information, such as a public IP address and a port number, to a network interface. The network server, which has stored a mapping of the mobile device's private IP address to public IP address, is accessed to determine the private IP address of the mobile device. As the mobile device that requested access to the web-based service is now identified, the mobile device is now allowed to receive data from the web-based service. |
| US09948594B2 |
Controlling message publication for a user
To control publication of messages within a social networking server (SRS) from a communication terminal (TC), a server (SC) capable of communicating with the social networking server (SRS) intercepts a message (Mes) containing text data (DonT), the message being provided by a user registered on the social networking server (SRS) and intended to be published by the social networking server (SRS). The server (SC) extracts keywords associated with the text data (DonT) based on a semantic analysis of the text data, and blocks publication of the message (Mes) if at least one extracted keyword is included in a set of keywords (EnsMC) associated with another user registered on the social networking server (SRS), said user being included on a list (LC) initially defined by said other user. |
| US09948593B2 |
Crowd determined message response system
A crowd determined message response system may be provided. A message sent from a sender to at least one recipient over a communication network may be received. The message may be presented on a user interface device. A selection of a designated recipient for responding to the message may be received. A priority of the message sent to the designated recipient may be adjusted. The priority of the message sent to an unselected recipient of the message not selected as the designated recipient may be adjusted. The priority may be adjusted differently for the designated recipient and the unselected recipient. Based on the adjusting of the priority of the message sent to the unselected recipient, the order of importance in which the unselected recipient's messages are presented may be rearranged. |
| US09948592B1 |
Managing notifications across services
Systems and methods for managing notifications are provided. One of the methods includes sending notification data to a first client service and a second client service for a message. The method further includes receiving an indication that the notification data has been interacted with using the first or second client service. The method includes updating a read status of the notification data when the indication is received, such that the notification data at the first and second client services has a same status indicator. |
| US09948591B2 |
Messaging configuration system
Systems and methods that facilitate messaging capabilities within a unified plant model (UPM) via employing a plurality of core messaging primitives for configuration of messages that interact with a message engine of the industrial plant. In a related aspect, initially messaging host modules can be located on a network and associated policies identified. Next, data type ID and name syntax can be defined and unique UPM system identifiers generated by the system. |
| US09948587B2 |
Data deduplication at the network interfaces
A method for data deduplication during execution of an application on a plurality of computing nodes, including: generating, by a first processor in a first computing node executing the application, a first message to process application data owned by a second computing node executing the application; receiving, by a first network interface (NI) of the first computing node, the first message; extracting, by the first NI, a first key from the first message; determining, by the first NI, the first key is not a duplicate; and placing, by the first NI and in response to the first key not being a duplicate, the first message on a network connecting the first computing node to the second computing node. |
| US09948578B2 |
De-jitter buffer update
A device includes a de-jitter buffer configured to receive a packet, the packet including first data and second data. The first data includes a partial copy of first frame data corresponding to a first frame of a sequence of frames. The second data corresponds to a second frame of the sequence of frames. The device also includes an analyzer configured to, in response to receiving the packet, generate a first frame receive timestamp associated with the first data. The analyzer is also configured to, in response to receiving the packet, generate a second frame receive timestamp associated with the second data. The first frame receive timestamp indicates a first time that is earlier than a second time indicated by the second frame receive timestamp. |
| US09948577B2 |
IP aliases in logical networks with hardware switches
Some embodiments provide a novel method of configuring a managed hardware forwarding element (MHFE) that implements a logical forwarding element (LFE) of a logical network to handle address resolution requests (e.g., Address Resolution Protocol (ARP) requests) for multiple addresses (e.g., IP addresses) associated with a single network interface of the logical network. The method identifies a physical port of the MHFE with which the multiple addresses are to be associated. The physical port is coupled to an end machine (e.g., a virtual machine, server, container, etc.) of the logical network. The method then modifies associations stored at the MHFE to associate the physical port with the multiple addresses. |
| US09948575B2 |
Issuing method for forwarding adjacency link
An issuing method for a forwarding adjacency link and a logical node are provided. The method comprises: a first logical node receiving node information about a second edge forwarding node which is sent by a node management module of a controller in a virtual cluster; according to the node information about the second edge forwarding node, the first logical node generating a logical link between a first edge forwarding node and the second edge forwarding node; the first logical node adding the logical link between the first edge forwarding node and the second edge forwarding node to an IGP protocol message link state advertisement (LSA)/link state protocol data unit (LSP); and the first logical node issuing the logical link between the first edge forwarding node and the second edge forwarding node through the IGP protocol message LSA/LSP. |
| US09948573B2 |
Delivery of multimedia components according to user activity
Systems, methods, apparatuses, and computer readable media may be configured for establishing at least one session for delivery of multimedia. In an aspect, a first transmission of data fragments of a first component and a second transmission of data fragments of a second component may be transmitted and synchronized for presentation. If an inactivity event is detected the session may be maintained while reducing bandwidth consumption. |
| US09948572B2 |
Internet of things application framework
A method, a device, and a non-transitory storage medium provides to receive a packet from an Internet of Things (IoT) device, wherein the packet carries IoT data; determine whether the packet carries IoT data; determine a type of linked data to obtain in response to a determination that the packet carries the IoT data, wherein a determination of the type of linked data is based on an application programming interface (API) identifier that identifies an API and corresponding type of linked data; obtain the type of linked data in response to the determination of the type of linked data; store the type of linked data and the IoT data; and grant access and use of the type of linked data and the IoT data to the API of a software application, when the software application is executed. |
| US09948571B2 |
System and method for cloud connection pool
Today's cloud software, especially cloud management software, faces a complex, distributed, cross platform environment with extremely diversified software components. Cloud Connection Pool (CCP) is a technique to obtain a connection in such an environment and is more complex than a traditional connection pool. CCP allows requesting components to establish connections to target components. CCP uses cloud mapping data that associates cloud components with each other and stores pool data that identifies connection pools for components (or “managing components”) that manage target components. In response to a request for a connection from a requesting component, the CCP determines a managing component that is associated with the requested target component and identifies (or creates) a connection pool that is associated with the managing component. The CCP then retrieves a connection from the connection pool and returns the connection to the requesting component. |
| US09948570B2 |
Stream data processing method and stream data processing device
An input tuple including a data time stamp is assigned by a data source; a pending tuple in which a system time stamp at the time the input tuple was received is assigned to the input tuple; and the pending tuple is stored in a queue, one queue for each data source. The queues are sorted in the order of the data time stamps of the pending tuples at the head of each queue; and if, in the queue at the head of which is stored the pending tuple having the smallest data time stamp value, the value of the current system time stamp is greater than the value of a processing pending period added to the system time stamp of the pending tuple at the head of the queue, then the input tuple is acquired from the pending tuple at the head of the queue for an input stream. |
| US09948567B2 |
System and method for dynamic rate control in Ethernet fabrics
An Ethernet device includes receive buffers and transmit buffers of a port, and a processor. The buffers are each associated with a respective class of service. The processor operates to determine a current buffer utilization in a receive buffer, determine that the current buffer utilization is different than a buffer threshold for the receive buffer, determine a data rate limit for the class of service associated with the receive buffer based upon the difference between the current buffer utilization and the buffer threshold, and send a data rate limit frame to another device coupled to the port. The data rate limit frame includes the data rate limit for the class of service. |
| US09948565B2 |
Method and implementation of zero overhead rate controlled (ZORC) information transmission via digital communication link
A system and process to adjust the transmission rate of data packets by measuring (continuously or at pre-set intervals) certain elements and variables to reliably measure the current transmission rate and gaps (wasted space) to determine the channel utilization. These measurements are used to adjust the transmission rate of data in real time. The measurement of these variables reliably predicts the optimum transmission rate and can adjust the same to both efficiently transmit data and avert network congestion. A communication processing device comprising one or more processors operable to measure inter-packet gap times to estimate and utilize channel capacity changes during transmission. |
| US09948563B2 |
Transmitting node, receiving node and methods therein
Embodiments herein relate to a method in a receiving node (12) for handling packets for a wireless device (10) in a radio communications network (1). The receiving node (12) receives a packet from a transmitting node (13). The packet is marked with a value, wherein the value is corresponding to a level of importance of the packet along a linear scale. The receiving node (12) handles the packet based on the value and an expected amount of resources needed to serve the packet. |
| US09948562B2 |
Method and device for transmitting pilot signal
Disclosed are a method and device for transmitting a pilot signal. The method therefor comprises: conducting OFDM modulation on a pilot signal; and sending the modulated pilot signal on the first and/or the last OFDM symbol of a subframe which transmits the pilot signal. In the technical solution provided in the embodiments of the present application, the pilot signal is transmitted on the first and/or the last OFDM symbol of the subframe, thereby not occupying an OFDM symbol for transmitting a data signal, so as to reduce the resource overhead of the pilot signal. |
| US09948561B2 |
Setting delay precedence on queues before a bottleneck link based on flow characteristics
Embodiments include detecting an increase in delay of a flow assigned to a first queue of a network device, where the increase is sufficient to cause the flow rate of the flow to decrease if the flow is delay-sensitive. Embodiments further include determining whether an amount of bandwidth consumed by the flow decreases sufficiently after the increase is detected, and assigning the flow to a second queue based, at least in part, on determining the amount of bandwidth consumed by the flow does not decrease sufficiently. Specific embodiments include evaluating a series of two or more bandwidth measurements of the flow according to a bandwidth reduction measure to determine whether the amount of bandwidth consumed by the flow decreases by sufficiently. More specific embodiments include the first queue being configured to receive delay-sensitive flows and the second queue being configured to receive delay-insensitive nice flows. |
| US09948557B2 |
Methods and apparatuses for routing and forwarding, establishing routing table, and acquiring content
Methods and apparatuses for routing and forwarding, establishing a routing table, and acquiring content are provided. The method for routing and forwarding includes: receiving a content request packet, where the content request packet carries a content name of requested content and container information of the requested content; determining whether any forwarding entry that matches the content name of the requested content exists in a FIB; determining whether any forwarding entry that matches the container identifier in the container information exists in the FIB when no forwarding entry that matches the content name of the requested content exists in the FIB; and when a forwarding entry that matches the container identifier in the container information of the requested content exists in the FIB, sending the content request packet according to a port in the matched forwarding entry. |
| US09948554B2 |
Multilayered distributed router architecture
A distributed multilayered network routing architecture comprises multiple layers including a controller layer comprising a controller, a control plane layer comprising one or more control plane subsystems, and a data plane layer comprising one or more data plane subsystems. A controller may be coupled to one or more control plane subsystems. A control plane subsystem may in turn be coupled to one or more data plane subsystems, which may include one or more software data plane subsystems and/or hardware data plane subsystems. In certain embodiments, the locations of the various subsystems of a distributed router can be distributed among various devices in the network. |
| US09948553B2 |
System and method for virtual network-based distributed multi-domain routing control
A system for distributed multi-domain routing control includes two or more software-defined network (SDN) controllers and virtual routers. The two or more SDN controllers create virtual topology information by collecting information about switches under the control thereof, exchange network information about a different virtual network, as well as create a routing path from a source terminal to a destination cross switch or a routing path from the destination cross switch to a destination terminal based on location identification information of the destination terminal and/or the virtual topology information. Then, the virtual routers manage communication between the different virtual tenant networks or communication between each virtual tenant network and an external network. |
| US09948551B2 |
Root network device selection
Transmitting, by a current root network device, a first unicast message to a network router and determining, by the current root network device, whether the first unicast message is received by one or more other network devices. If the current root network device determines that the first unicast message is not received by one or more other network devices, then a second unicast message is sent to the network router. If the current root network device determines that the first unicast message is received by one or more other network devices, then the current root network device identifies a particular network device of the one or more other network devices that received the first unicast message to serve as a new root network device. The current root network device sends a message to designate the identified particular network device as the new root network device. |
| US09948547B2 |
Route tracing in software defined networks
Mechanisms are provided for tracing a route taken by a packet in a Software Defined Network (SDN). Each switch in the SDN is assigned a first color label, from a set of color labels, such that such that adjacent switches have different color labels. Rules are installed in each switch to forward a received data packet to the SDN controller in response to a second color label of the received data packet not matching the first color label assigned to the switch. A second color label, from the set of color labels, is assigned to a trace data packet. A route of the trace data packet is traced through the SDN based on the second color label and application of the one or more rules to the trace data packet at each of the switches in the SDN as the trace data packet is received by each of the switches in the SDN. |
| US09948536B2 |
Real-time monitoring and control in a multi-nodal, multi-tiered distributed system
A method involves starting multiple nodes; executing production workloads, made up of transactions; running a Monitoring and Control Program (MCP) on each node, wherein at least one MCP acts as a controlling MCP; monitoring in real-time individual transaction execution, the monitoring involving collecting parametric information regarding execution of the transactions on a node and transaction basis, the parametric information including at least an identification of each specific transaction, each node involved in processing those specific transactions, and at least one timing value related to the processing of each specific transaction; generating a transaction table including the collected parametric information; identifying whether there is degraded performance within the computer system, based upon throughput per unit time for all individual transactions; and, when degraded performance is identified, running lower level analysis only for particular nodes and particular transactions associated with the degraded performance. |
| US09948530B1 |
Audience duplication for parent-child resource pairs
A combined reach can be determined for multiple resources. Usage data, including audience duplication data, is used to generate audience duplication measurements for pairs of the resources. A child-resource pair is identified, and the audience duplication measurement for that resource pair is modified. The modified measurement is used to determine a combined reach for the multiple resources. A report is also generated based on the combined reach. |
| US09948529B2 |
Mobile manufacturing management and optimization platform
A platform for remote management of production and optimization of manufacturing efficiency by utilizing a cloud server to provide data obtained from sensors on production machines to mobile devices. The service box is coupled to sensors on a production machine. The service box receives appropriate data from the sensors and transfers the data to a cloud server in real-time. The data is analyzed and appropriate information is sent to a mobile device in order for personnel in a location remote from the facility to observe production data and perform management functions. A message broker is provided between the mobile device and the cloud server to facilitate information transfers and to balance the data transfer load according to network or device capabilities and statuses. |
| US09948528B2 |
Methods and systems to manage big data in cloud-computing infrastructures
Methods and systems that manage large volumes of metric data generation by cloud-computing infrastructures are described. The cloud-computing infrastructure generates sets of metric data, each set of metric data may represent usage or performance of an application or application module run by the cloud-computing infrastructure or may represent use or performance of cloud-computing resources used by the applications. The metric data management methods and systems are composed of separate modules that perform sequential application of metric data reduction techniques on different levels of data abstraction in order to reduce volume of metric data collected. In particular, the modules determine normalcy bounds, delete highly correlated metric data, and delete metric data with highly correlated normalcy bound violations. |
| US09948525B2 |
Storage unit priority based on configuration information
Storage unit priority based on configuration information may be determined, for example, by a processor analyzing configuration information associated with the storage units to create a priority order associated with the storage units. The configuration information associated with each storage unit may be standardized for comparison to the configuration information associated with the other storage units. The processor may perform an action related to the storage units according to the priority order. |
| US09948524B2 |
Network element diagnostic evaluation
A process of diagnosing and debugging a network element remotely may employ sending of performance data to a third party evaluator for processing of the data. A mobile device may interface with the network element and request evaluation of the performance by the third party evaluator. Large memory loads may be sent to the third party evaluator where intensive processing may be performed. The results of the processing by the third party evaluator may be sent to the mobile device for viewing by a user. |
| US09948523B2 |
Display method and mobile device
An information display method for displaying diverse communication protocol information in order is provided. The communication protocol information display method of a mobile device includes discovering devices connectable through diverse communication protocols, displaying information on the discovered devices, displaying symbols of communication protocols supported by the discovered devices respectively, and displaying image objects associated with applications or functions for use in interoperation with the discovered devices. |
| US09948516B2 |
Mesh network commissioning
In embodiments of mesh network commissioning, a joiner router receives a message from a joining device requesting to join a mesh network, and the joiner router forwards the received message to a commissioning device of the mesh network. The joiner router then receives an authorization for the joining device to join the mesh network from the commissioning device, and the joiner router transmits network information to the joining device, where the network information enables the joining device to join the mesh network. |
| US09948514B2 |
Opportunistically connecting private computational resources to external services
A description of computing resource requirements for execution of an application associated with a publicly available service is obtained. Access to computing resources is opportunistically obtained from a computing entity that includes a private computing device that is external to, and separate from, the publicly available service. The computing resource requirements are intelligently matched to available computing resources of the computing entity with private computing resources that are temporarily available from a private computing device source. The intelligent matching is performed using an optimization analysis. |
| US09948509B1 |
Method and apparatus for optimizing resource utilization within a cluster and facilitating high availability for an application
A method and apparatus for optimizing resource utilization within a cluster and facilitating high availability for an application is described. In one embodiment, the method for optimizing resource utilization within a cluster and facilitating high availability for an application includes accessing configuration information regarding virtual machine nodes within the cluster to identify an active node and at least one passive node that are associated with the application and configuring the at least one passive node to be in a suspended state, wherein a passive node of the at least one passive node is to be in a running state and the active node is to be in a suspended state upon migration of the application to the passive node of the at least one passive node. |
| US09948506B2 |
High availability internet services provisioning
Systems and methods described herein provide redundant functionality for multi-cloud high availability continuous service provisioning. Service rule configuration of regional internet services platforms at different geographical locations are provisioned through a multi-cloud provisioning platform. The systems and methods provide that there is no disruption of service provisioning, in the event of a failure of one cloud provisioning platform, as long as at least one other cloud provisioning platform is available. In the event of a cloud disaster outage at one cloud provisioning platform, a regional internet services platform will automatically register with another active cloud provisioning platform. |
| US09948502B2 |
Method and system for self-healing of communication network
A method of self-healing a communication network is described herein. In particular, a plurality of message addresses can be registered with a publisher, and notifications from the publisher for the message addresses can be received. In addition, the notifications received from the publisher for the message addresses can be time-stamped. A notification interval for the message addresses can be monitored in which the interval may be based on a predetermined amount of time. The time-stamps of the received notifications can be compared to the notification intervals to determine whether a disruption in the receipt of the notifications for at least some of the message addresses has occurred. If a disruption has been determined to have occurred, the message addresses that have been affected by the disruption can be deleted. The deleted message addresses can then be re-registered with the publisher to restore the receipt of the notifications from the publisher for the affected message addresses. |
| US09948501B2 |
Prioritizing event notices utilizing past-preference pairings
In one example of the disclosure, event notices are received, with each notice indicative of degradation of a configuration item. Configuration item past-preference pairings are accessed. Each pairing includes a count of operator-exhibited preferences for event notices associated with a first configuration item relative to event notices associated with a second configuration item. A prioritized ordering of the received event notices is created utilizing the past-preference pairings. |
| US09948498B2 |
Method and apparatus for storing mobile station physical measurements and MAC performance statistics in a management information base of an access point
A method and apparatus may be used for exchanging measurements in wireless communications. The apparatus may receive a request. The request may be a measurement request, and may include a request for a measurement of a parameter. The apparatus may transmit a report. The report may be a measurement report, and may include the requested measurement of a parameter. The apparatus may store the requested measurement of the parameter in a management information base (MIB). |
| US09948492B2 |
Methods and systems for managing data
Computationally implemented methods and systems include acquiring data regarding a device having a particular protected portion for which the device is configured to selectively allow access, facilitating presentation of an offer to carry out at least one service, said at least one service at least partly related to the device, in exchange for access to the particular protected portion of the device, and facilitating performance of at least a portion of the at least one service that is at least partly related to the device, in response to a grant of access to the particular protected portion of the device. In addition to the foregoing, other aspects are described in the claims, drawings, and text. |
| US09948491B2 |
Apparatus and method for estimating carrier frequency offset
An apparatus for estimating carrier frequency offset includes an Mth-power circuit, a spectrum generating circuit, a spectrum adjusting circuit, a peak frequency determining circuit and a frequency offset determining circuit. The Mth-power circuit performs an Mth-power calculation on an input signal to generate an Mth-power calculation result. The spectrum generating circuit generates a spectrum according to the Mth-power calculation result. The spectrum adjusting circuit identifies a partial energy peak value in a partial frequency range from the spectrum, and increases the partial energy peak value to be higher than any other energy in the spectrum to generate an adjusted spectrum. The peak frequency determining circuit identifies a peak frequency having a maximum energy peak value from the adjusted spectrum. The frequency offset determining circuit determines an estimated carrier frequency offset result according to the peak frequency. |
| US09948490B2 |
Preamble for non-linearity estimation
Certain aspects of the present disclosure relate to methods and apparatus for wireless communication. More particularly, aspects of the present disclosure generally relate to techniques for wireless communications by an apparatus comprising a processing system configured to a processing system configured to generate a frame having at least a first header that is phase modulated and to modulate an amplitude of the first header prior to the first header being amplified by a power amplifier, and a first interface configured to output the frame for transmission. |
| US09948482B2 |
Apparatus and method for enabling flexible key in a network switch
A network switch to support flexible lookup key generation comprises a control CPU configured to run a network switch control stack. The network switch control stacks is configured to manage and control operations of a switching logic circuitry, provide a flexible key having a plurality of possible fields that constitute part of a lookup key to a table, and enable a user to dynamically select at deployment or runtime a subset of the fields in the flexible key to form the lookup key and thus define a lookup key format for the table. The switching logic circuitry provisioned and controlled by the network switch control stack is configured to maintain said table to be searched via the lookup key in a memory cluster and process a received data packet based on search result of the table using the lookup key generated from the dynamically selected fields in the flexible key. |
| US09948481B1 |
Uplink voice and video enhancements
The present disclosure may provide technique(s) to configure a UE for asynchronous UL HARQ transmission. In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may perform an initial RRC configuration procedure. The apparatus may transmit a first RRC message. The first RRC message may indicate that the UE supports a VoLTE mode. The apparatus may receive a second RRC message from the base station. The second RRC message may configure the UE to operate in VoLTE mode. The apparatus may monitor a CSS for a first uplink grant in first DCI. The first uplink grant may not contain an uplink HARQ ID field. The apparatus may monitor a USS for a second uplink grant in second DCI. The second uplink grant may be associated with asynchronous uplink HARQ, and the second uplink grant may include a HARQ ID field. |
| US09948477B2 |
Home automation weather detection
Systems and methods for controlling a device in a home automation network based on detection of a weather event include receiving image data from a camera in operative communication with a host system, where the image data is representative of an outdoor weather event that is captured by the camera, and analyzing the image data to identify the outdoor weather event. Systems and methods may include determining a home automation rule based on the identified outdoor weather event, where the home automation rule includes an operational setting of a home automation device, and instructing the home automation device based on the determined home automation rule via a home automation network. |
| US09948474B2 |
Network system, packet transmission apparatus, packet transmission method, and recording medium recording information processing program
A network system includes a plurality of first communication apparatuses that perform multicast routing, and a plurality of second communication apparatuses configured to connect between the plurality of first communication apparatuses and forward a multicast packet from a port other than a receiving port. Each one of the plurality of second communication apparatuses includes a first memory configured to store the receiving port at which an entry request for a multicast group sent by one of the plurality of first communication apparatuses has been received as a forward port for multicast packets for that multicast group, and a forwarding unit configured to forward a multicast packet for the multicast group from the forward port among the ports of the second communication apparatus. |
| US09948473B2 |
Seamless connection handshake for a reliable multicast session
An apparatus, method, program product, and system are disclosed for seamless connection handshake for a reliable multicast session. A node module detects a new node attempting to join a multicast networking session. A handshake module generates a control packet comprising session initiation data for the new node. A packet module creates a combined data packet comprising the control packet and the multicast data packet and sends the combined data packet to the new node. The node module joins the new node to the ongoing multicast networking session without disturbing ongoing data transmissions during the multicast networking session. |
| US09948468B2 |
Digital heritage notary
In an example, a DHN (DHN) is provided for enabling grantees to access digitally-controlled assets of a principal. The principal (level 0) establishes a digital testament (DT), identifying one or more grantees on levels 1-n. Each grantee receives a digital heritage certificate (DHC), which may be based on the PKI certificate definition. The DHC includes a “PREDECESSORS” field, identifying one or more predecessor certificates that must be revoked before the DHC is valid. All grantee DHCs have the principal's level 0, DHC as a predecessor certificate. Level n certificates may also be valid only if all certificates at level n−1, have been revoked. In practice, a DHC may be revoked when a user of the certificate passes away, so that nth generation grantees inherit only when generation n−1, has passed away. |
| US09948467B2 |
Method and system for blockchain variant using digital signatures
A method for using digital signatures for signing blockchain transactions includes: generating a domain key pair comprising a domain private key and a domain public key, wherein the domain public key is signed after generation; receiving a plurality of member public keys, wherein each member public key is received from an associated member of a blockchain network and is a public key in a key pair comprising the member public key and a member private key corresponding to the associated member; signing each member public key using the domain private key; receiving a transaction block from a specific member of the blockchain network, wherein the transaction block includes a plurality of blockchain transaction values and a hash signed using the member private key corresponding to the specific member; signing the received transaction block using the domain private key; and transmitting the signed transaction block. |
| US09948465B2 |
Digital data locker system providing enhanced security and protection for data storage and retrieval
The subject matter herein is directed to a digital data locker that acts as an intermediary between end users operating end user device and document providers. The data locker provides the end user with a secure and easy way to manage, store, and retrieve data that is stored at the document providers. Specifically, the features provided by the data locker include, but are not limited to, a dual level of encryption for data, content assurance to determine whether the data is corrupted, and dissociation between an identity of an end user and the data of the end user stored at the document providers. More specifically, an end user device operated by the end user, through use of a single application, may access the data locker to securely store and retrieve data on/from the document providers. |
| US09948462B2 |
Hypersphere-based multivariable public key signature/verification system and method
A hypersphere-based multivariable public key signature/verification system includes signature and verification modules, wherein the signature module comprises a processor, an affine transformation inversion part I, a trap door part and an affine transformation inversion part II. Corresponding operations are sequentially executed on a message, one or more groups of solutions are produced after the processing of the trapdoor part, a group of solutions are randomly selected, then a signature is continuously produced by the various parts, and finally the signature, together with the message, is transmitted to the processor. The verification module comprises a processor and a public key transformation part, wherein the processor transmits a signature to the public key transformation part to execute an operation, and then judges whether the obtained data is equal to a message in a memory or not: if so, the signature is valid, otherwise the signature is invalid. |
| US09948458B2 |
Managing security in a computing environment
In response to at least one message received by a processor of a gateway server from a user device wherein each message requests that an encryption key be downloaded to the user device, the processor generates at least one unique encryption key for each message and sends the at least one generated encryption key to the user device, but does not store any of the generated encryption keys in the cloud. For each encryption key having been sent to the user device, the processor receives each encryption key returned from the user device. For each encryption key received from the user device, the processor stores each received encryption key in the cloud. |
| US09948457B2 |
Extending data over cable service interface specification (DOCSIS) provisioning of ethernet passive optical network (EPON) (DPoE) to EPON over coax (EPoC) multicast key management
An optical line terminal (OLT) including a processor coupled to a transmitter. The processor is configured to send a first encrypted fiber to coax unit (FCU) message containing an optical domain multicast key to an FCU via an optical network. The optical domain multicast key is associated with encryption in an optical domain associated with the optical network. The processor is also configured to send a second encrypted FCU message containing an electrical domain multicast key to the FCU, and to send an encrypted coax network unit (CNU) message containing the electrical domain multicast key to a CNU via the FCU and a coaxial network. The electrical domain multicast key is associated with encryption in an electrical domain associated with the coaxial network. The first and second encrypted FCU messages and the encrypted CNU message may be operations, administration and maintenance (OAM) messages. |
| US09948454B1 |
Symmetric data encryption system and method
A symmetric data encryption system configured to receive a data stream to be encoded; to relate segments of the data stream with a predetermined distortion-inducing amplitude of light to encrypt the datastream; to transmit the datastream; to decrypt the data stream by compensating for the value induced by the distortion-inducing amplitude of light; wherein the distortion-inducing amplitude of light relates to different wavelengths of light emitted by one or more of a plurality of light sources in a non-uniform manner such that the effect of the distortion-inducing amplitude of light is difficult to predict, thereby providing obfuscation and encryption of the datastream. |
| US09948453B2 |
Threshold encryption using homomorphic signatures
A threshold encryption system comprising a sender device configured to generate ciphertexts and at least one entity device configured to perform partial decryption of ciphertexts. The system is based on Cramer-Shoup encryption systems and use linearly homomorphic signatures as publicly verifiable proofs of ciphertext validity. |
| US09948450B2 |
Frequency generator
A frequency generator for providing one or more clock signals with reduced phase jitter can include a phase-locked loop (PLL) configured to couple with a crystal and to provide a first clock signal, a multiplier circuit configured to receive the first clock signal and to provide a second clock signal, the second clock signal having a higher frequency than the first clock signal, wherein the multiplier circuit includes a second PLL, and wherein the second clock signal is an output frequency signal of the frequency generator. |
| US09948449B2 |
Trim for dual-port frequency modulation
Various methods provide for trimming the gain in a dual-port phase-locked loop (PLL) of a radio transceiver. Use is made of the radio's demodulator to perform modulation accuracy measurements, thereby reducing the cost and complexity of external test equipment. |
| US09948445B2 |
Signal processing method and device
A signal processing method includes: sending a first data signal and receiving a second data signal in a first resource block (RB) of a first subframe; and sending a first reference signal according to first reference information and receiving a second reference signal according to second reference information in the first RB, where: the first reference information is different from the second reference information; the first reference information includes: a time-frequency resource location occupied by the first reference signal, and sequence information of the first reference signal; and the second reference information includes: a time-frequency resource location occupied by the second reference signal, and sequence information of the second reference signal. |
| US09948444B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The apparatus for transmitting broadcast signals, the apparatus comprises an encoder for encoding service data corresponding to each of a plurality of data transmission path, wherein each of the data transmission path carries at least one service component, a frame builder for building at least one signal frame including the encoded service data, a modulator for modulating the at least one signal frame by an OFDM (Orthogonal Frequency Division Multiplex) scheme, a transmitter for transmitting the broadcast signals carrying the at least one modulated signal frame, wherein each of the at least one signal frame includes a preamble having signaling data, wherein the signaling data includes size of FFT, information of whether the signal frame including EAC message or not and information relating to the service data of the signal frame. |
| US09948438B2 |
Radio access method for reduced PAPR
A wireless communication system is disclosed. A method for performing a radio access in the wireless communication system includes dividing an available frequency band into a plurality of subbands, generating a plurality of frequency domain sequences from a plurality of data symbol sequences by independently performing a Fourier transform process in each of the subbands, independently mapping each of the frequency domain sequences to a corresponding subband, generating one or more transmission symbols by performing an inverse Fourier transform process on the plurality of frequency domain sequences mapped to the available frequency band, and transmitting the one or more transmission symbols to a receiver. |
| US09948434B2 |
Method for bit error rate detection, and network device
This application provides a method for bit error rate detection, and a device. The method includes: sending, by a first device, a first notification packet to a second device, where the first notification packet is used to instruct the second device to perform bit error rate detection, the first device is an ingress node of a first LSP, and the second device is a downstream node; and receiving, a second notification packet, where the second notification packet carries a second bit error rate, the second bit error rate includes a first bit error rate of a first interface of the second device, and the first interface is an interface that receives an MPLS packet sent by the first device. By using the technical solutions of the present disclosure, the first device can perceive a bit error rate of the second device, thereby helping ensure reliability of MPLS packet transmission. |
| US09948430B2 |
Method and apparatus for combining data and retransmission data in layer domain
There is provided methods and apparatus to improve spectral efficiency in Hybrid Automated Repeat reQuest (HARQ) communications. New data and retransmission data is combined in packets using code domain multiplexing, where data layers carry data and retransmission layers carry retransmission data. This technique is leveraged to introduce Multi-Packet HARQ. The HARQ layers contain Incremental Redundancy (IR) bits to assist in the decoding of a subset of previously undecoded layers. Multiple packets are jointly decoded at the receiver. Using the properties of code multiplexing, and in particular Sparse Code Multiple Access (SCMA), the correct decoding of a subset of previously undecoded layers assists in the decoding of all previously undecoded layers. HARQ feedback for multiple packets is jointly interpreted by the receiver and the transmitter using state tables. These techniques are further leveraged to allow for Multiple-User SCMA. |
| US09948429B2 |
HARQ implementation for distributed base stations
A method for operating a distributed base station includes performing Hybrid Automatic Repeat Request (HARQ) processing. The distributed base station comprises a centralized processing entity and distributed remote radio access points, which are coupled to the centralized processing entity via a backhaul connection. The HARQ processing is performed locally by the remote radio access points, by performing an assessment a quality of received data and/or current radio conditions. Based on the assessment, it is decided locally on a necessity of re-transmissions without decoding the received data at the remote radio access points. |
| US09948428B2 |
Method and system for aggregating messages
Methods and systems are disclosed that support the aggregation of acknowledgement messages and control messages. Advantageously, acknowledgement and negative acknowledgement indications for multiple client nodes are combined into a single aggregated message which is broadcast or multicast to the multiple client nodes. Based on unique identifiers assigned to each client node, client nodes are grouped such that the aggregated acknowledgement messages can be efficiently encoded to conserve both network capacity when they are transmitted, as well as processing capacity when they are parsed by the client nodes. If code division multiple access (CDMA) technology is used, the aggregated acknowledgment message can be transmitted without CDMA spreading to effectively broadcast or multicast it to multiple client nodes. A similar technique can be employed for the efficient broadcast or multicast of aggregated control messages. |
| US09948425B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
The present invention provides a method of transmitting broadcast signals. The method includes, encoding, by a first and a second encoder, data in respective first and second PLPs (Physical Layer Pipes); combining the encoded data in the respective first and second PLP by a combiner, wherein each of the first and second PLP belongs to a respective first and second layer. The code rate of the first PLP is different from the code rate of the second PLP. Time interleaving the combined data according to a first or second mode. Building at least one signal frame including the time interleaved data. Frequency interleaving data in the at least one signal frame. Modulating the frequency interleaved data in the at least one signal frame, and transmitting the broadcast signals having the modulated data by a transmitter. |
| US09948421B2 |
Communication method and communication apparatus
The present disclosure provides an orthogonal codes based code division multiplexing method of performing the code division multiplexing of demodulation reference signals in multiple layers of resource blocks by using orthogonal matrices, the method comprising: changing the order of chips in particular rows of a first orthogonal matrix to obtain a second orthogonal matrix with the changed order of chips; and multiplying the chips in respective rows of the second orthogonal matrix by the demodulation reference signals in corresponding layers of resource blocks correspondingly in the time direction to obtain code division multiplexing signals. The technical scheme of the present disclosure can improve the power jitter situation of downlink signals on the time, thereby the usage efficiency of the power amplifier at the base station side can be improved. |
| US09948416B2 |
Broadcast receiving device and operating method thereof
An apparatus for processing a hybrid broadcast service, the apparatus comprising a reception module for receiving broadcast signals though a broadcast channel or contents through a broadband channel for the hybrid broadcast service, wherein the broadcast signals include data for the hybrid broadcast service and an EAM (Emergency Alert message) and a processor for receiving a request from a companion device and sending at least one of a content or continuous components or files or data or media timeline information of the EAM (Emergency Alert message) based on the request, wherein the continuous components or the files or the data are a part of the hybrid broadcast service which is currently selected. |
| US09948413B1 |
Relay system calibration for wireless communications between a head-mounted display and a console
A head-mounted display (HMD) is wirelessly coupled to a console or a relay depending on the relative positions of the HMD, the console, and the relay. The HMD communicates wirelessly with the console using a beam that is oriented in a particular direction. As the position of the HMD changes, the quality of the communication link between the HMD and the console may degrades. In response to the degradation, the HMD forms a communication link with a relay, which operates as an intermediary between the HMD and the console. The relay communicates with the HMD over a dedicated communication channel that is isolated from the communication channel over which the relay communicates with the console. An RF signal path with calibration features in the relay iteratively adjusts a feedback reduction parameter until the effects of the undesirable feedback are eliminated. |
| US09948412B2 |
System, method, and apparatus for wireless camera detection
A system, method, and apparatus for detecting wireless video cameras includes receiving radio waves in a radio frequency band and filtering the radio waves. Then it is determined whether a signal strength of the radio waves exceeds a threshold for a period of time, indicating that a video signal is present and if a video signal is present, the detection of a wireless video signal is signaled (e.g., making noise, vibrating, illuminating, blinking). |
| US09948408B1 |
Antenna array calibration
Apparatuses, methods, and systems for calibrating an antenna array are disclosed. One method includes selecting an antenna element of a first antenna subarray and an antenna element of a second antenna subarray, transmitting the signal through the at least one antenna element of the first subarray having a first selected phase, transmitting the signal through the at least one antenna element of the second subarray having a second selected phase, and characterizing a relative phase offset between the antenna element of the first antenna subarray and the antenna element of the second antenna subarray, including adjusting the first selected phase or the second selected phase, and monitoring a receive signal received at a calibration antenna that includes the transmitted signal of the at least one antenna element of the first antenna subarray and the transmitted signal of the at least one antenna element of second antenna subarray. |
| US09948406B2 |
User equipment comprising a transceiver capable of removing self-interference and method therefor
With increasing user requirements for social networking services (SNS), communication between user equipments (UEs) at a physically close distance, i.e., device to device (D2D) communication, is needed. D2D communication is performed on the basis of the discovery between UEs. However, D2D communication between UEs may cause interference to communication with an existing system, i.e., a base station. Thus, one aspect of the present invention provides a user equipment comprising a transceiver capable of removing self-interference. |
| US09948405B1 |
Underwater mobile body
An underwater mobile body includes: a communication unit that has a plurality of communicators adopting different communication systems and that performs underwater wireless communication with another device using one of the plurality of communicators; an acquisition unit that acquires information on depth or information varying with depth; and a control unit that controls the communication unit to switch, between the plurality of communicators and based on the acquired information, the one communicator used for underwater wireless communication. |
| US09948404B2 |
Channel adaptive human body communication system
Provided is a human body communication system including a master device configured to output a first signal based on a first data signal and a signal having a pattern in which a waveform of a first carrier wave and a waveform of a second carrier wave are repeated; and a slave device configured to receive the first signal to determine a carrier wave having a low level of attenuation among the first carrier wave and the second carrier wave, and output a second signal based on the determined carrier wave and a second data signal. |
| US09948396B2 |
Method and system for transmitter optimization of an optical PAM serdes based on receiver feedback
The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using PAM format(s) over optical communication networks. A feedback mechanism is provided for adjusting the transmission power levels. There are other embodiments as well. |
| US09948383B1 |
Network synchronization system and method
A communication network includes and a communication method uses a communication node configured to use a time division multiple access protocol to allow communication in the network. The time division multiple access protocol is configured to allocate time slots. The communication node includes a main transceiver and an auxiliary transceiver. The communication node is configured to listen for a synchronization signal using the main transceiver during a first window and to listen for a synchronization signal during a second window using the auxiliary transceiver. |
| US09948381B2 |
Paired beam transponder satellite communication
Systems and methods are described for paired-beam satellite communications in a flexible satellite architecture. Embodiments include one or more “bent pipe” satellites having multiple transponders for servicing a number of spot beams. Implementations include novel types of paired-beam transponders that communicatively couple gateway terminals and user terminals in different spot beams. Some implementations also include loopback transponders that communicatively couple gateway terminals and user terminals in the same spot beam. The transponders can use similar components, can provide for flexible forward-link and return-link spectrum allocation, and/or can provide other features. Certain embodiments further include support for utility gateway terminal service and/or redundancy (e.g., active spares) for one or more active components. |
| US09948380B1 |
Network capacity management
An example embodiment may involve receiving a request to provide unmanned aerial vehicle (UAV) based wireless coverage to a particular geographical location. Possibly in response to the request, a UAV may fly to the particular geographical location. A first wireless interface of the UAV may define a wireless coverage area that covers at least part of the particular geographical location. A second wireless interface of the UAV may establish a wireless backhaul link to a data network. The UAV may provide wireless data transfer services to at least one device in the particular geographical location, where the wireless data transfer services allow the device to exchange data communication with the data network via the UAV. |
| US09948378B2 |
Method and device for transmitting reference signal in multi-antenna supporting wireless communication system
The present invention relates to a method and a device for estimating a channel of a terminal in a wireless communication system that supports multiple antennas. Particularly, the method comprises the steps of receiving a channel state information-reference signal (CSI-RS) for a plurality of first domain antennas and a cell-specific reference signal (CRS) for a plurality of second domain antennas, and estimating the all of the channels on the basis of a first channel for the first domain antennas estimated from the CSI-RS and a second channel for the second domain antennas estimated from the CRS. |
| US09948365B2 |
Uplink training for MIMO implicit beamforming
A first communication device determines that a second communication device is capable of using a transparent implicit beamforming technique to determine steering matrices for transmitting to the first communication device via a forward multiple input multiple output (MIMO) communication channel. In response to determining that the second communication device is capable of using the transparent implicit beamforming technique, the first communication device transmits at least a certain number of data units to the second communication device using a maximum number of spatial streams during a time period of a certain duration when the first communication device is otherwise using less than the maximum number of spatial streams to transmit other data units to the second communication device. Transmitting the certain number of data units using the maximum number of spatial streams permits the second communication device to use the transparent implicit beamforming technique to develop one or more steering matrices. |
| US09948359B2 |
Secondary short-range wireless assist for wireless-based access control
Concepts and technologies disclosed herein are directed to secondary short-range wireless assist for wireless-based access control. According to one aspect, a method can include receiving, at an access control system, a first identifier via a near-field communications (“NFC”) reader associated with an entryway to an area. The NFC reader can receive the first identifier from an NFC component of a mobile device. The method can include receiving, at the access control system, a second identifier via a wireless transceiver associated with the area. The wireless transceiver associated with the area can receive the second identifier from a wireless communication component of the mobile device after the mobile device has entered the area through the entryway. The method can also include determining, by the access control system, that the first identifier and the second identifier constitute an authentication pair that identifies the mobile device as being authenticated to access the area. |
| US09948358B2 |
Inductive power supply
There is disclosed an inductive power transfer system comprising a primary unit and a secondary device separable from the primary unit, the primary unit comprising a power transfer surface and more than two field generators each operable to generate an electromagnetic field, the field generators being located at different positions relative to the power transfer surface, the secondary device comprising a power receiver having a secondary coil, the system further comprising: determining means for determining at least one of the position and the orientation of the power receiver relative to the power transfer surface; and controlling means for controlling the field generators such that at least one first field generator and at least one second field generator, selected in dependence upon such determination, are active in a substantially opposite sense to one another so as to direct magnetic flux through the secondary coil thereby supplying power to the secondary device, and further such that a third one of the field generators is inactive so that fewer than all of the field generators are active simultaneously. |
| US09948352B2 |
Timesharing for low power modes
Techniques for implementing timesharing in discontinuous systems, for example to implement low power modes, are discussed. In some embodiments, a set of bit loading tables is determined in advance, and bit loading tables are then selected based on which lines are transmitting and which are quiet. |
| US09948351B2 |
Short range radio communication device and a method of controlling a short range radio communication device
A short range radio communication device and a method of controlling a short range radio communication device may include a processing circuit configured to: determine a time offset between an initial starting point of operation of a transceiver in accordance with a first frequency hopping sequence and a shifted starting point of operation of the transceiver in accordance with the first frequency hopping sequence so that a first segment of a frequency range is exclusive of a second segment of the frequency range; and control at least one of a controller and a clock circuit to operate the transceiver in accordance with the first frequency hopping sequence at the shifted starting point. |
| US09948346B2 |
Communication system with up-converter and digital baseband processing circuit implemented in one die separated from another die having down-converter, and related communication method thereof
One communication system includes a first die, a second die and a front-end circuit. The first die has an up-converter and a digital baseband (DBB) processing circuit. The second die has a down-converter. The front-end circuit couples an antenna to the first and second dies. Another exemplary communication system includes a first die, a second die and a front-end circuit. The first die performs digital baseband (DBB) processing, and generates a first signal with a higher frequency according to a second signal, wherein the second signal is derived from an output signal of the DBB processing. The second die generates a third signal with a lower frequency according to a fourth signal. The front-end circuit couples the first signal from the first die to an antenna and couples the fourth signal from the antenna to the second die. |
| US09948345B2 |
Protective case
A protective case includes a first half frame, which has a first body portion and a first strengthened portion connected to two different positions on the first body portion, and a second half frame, which has a second body portion and a second strengthened portion connected to two different positions on the second body portion. Two first abutting portions are provided at two different positions on the first body portion, and the first strengthened portion has a second abutting portion. Two third abutting portions adapted to abut against the first abutting portions are respectively provided at two different positions on the second body portion. The second strengthened portion has a fourth abutting portion adapted to abut against the second abutting portion. Whereby, the first body portion and the second body portion form a complete frame, which surrounds an outer periphery of an electronic device to provide a protective effect. |
| US09948344B1 |
Dual mobile phone carrying system and method of use
A dual mobile phone carrying system includes a pliable elongated body extending from a first end to a second end, the pliable elongated body having a front surface and an opposing back surface; an attachment device having a first fastener and a second fastener, both fixedly attached to the front surface of the pliable elongated body, a third fastener fixedly attached to an outer surface of a first mobile phone, and a fourth fastener fixedly attached to an outer surface of a second mobile phone; a locking device having a first device secured to the first end of the pliable elongated body, and a second device secured to the second end of the pliable elongated body; and a clip secured to back surface of the pliable elongated body, the clip is configured to removably secure to a pair of pants. |
| US09948342B2 |
Speaker casing with integrally formed electrical conductors
An apparatus including a sound transducer; a casing member, where the sound transducer is mounted to the casing member, and where the casing member is configured to at least partially form an enclosure for the sound transducer; and electrical conductors integrally formed with the casing member. The electrical conductors are electrically connected to the sound transducer. The electrical conductors are configured to provide electrical connectivity for the sound transducer, where at least one of the electrical conductors is configured to couple to an antenna pattern to form part of an antenna arrangement. |
| US09948339B1 |
Spatially distributed module architecture
A spatially distributed module and method of assembling the spatially distributed module in a vehicle include disposing a first sub-module of the module in a first location of the vehicle, and disposing a second sub-module of the module in a second location of the vehicle that is spatially separated from the first location. The first sub-module includes a processor and a memory device and the second sub-module includes a first set of one or more components. The method includes coupling the second sub-module to the first sub-module via a flexible connector such that the first set of the one or more components in the second sub-module use the processor and the memory device in the first sub-module. A length of the flexible connector is at least equal to a minimum distance between the first location and the second location. |
| US09948338B2 |
Advanced device locking criteria
Systems and methods for providing additional control over user equipment (UE) using standardized features of a subscriber identity module (SIM) is provided. The UE can impose SIMLocking criteria based on subscriber related attributes (such as rate plan, prepay, postpay, etc.). The SIM module can comprise multiple unique entries and one value for each entry. One or more entries on the SIM can be subdivided to provide additional values with each value made up of a subset of bits from a particular entry. Thus, a single entry can provide a plurality of values to make up a SIM configuration. The SIM configuration can be compared to a UE SIMLock configuration with the same, or similar, entries to determine if the SIM is compatible for use with the UE. The SIM configuration can be updated dynamically to reflect changes in the account associated with the UE or the SIM. |
| US09948333B2 |
Method and apparatus for wireless communications to mitigate interference
Aspects of the subject disclosure may include, for example, generating a wireless signal at a first network device and directing the wireless signal towards a second network device of another utility pole, which includes directing the wireless signal away from another network device of the other utility pole. Other embodiments are disclosed. |
| US09948332B2 |
High efficiency, remotely reconfigurable remote radio head unit system and method for wireless communications
A remote radio head unit (RRU) system is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier inside the RRU. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by a wideband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, embodiments of the present invention can compensate for the nonlinearities as well as memory effects of the power amplifier systems and also improve performance, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers, multi-frequency bands and multi-channels. Consequentially, the remote radio head system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems. |
| US09948330B2 |
Bluetooth transmitter
A Bluetooth transmitter with features to reduce the likelihood of unwitting loss includes a first housing, a second housing, a circuit board, and a button. The second housing couples to the first housing. A side of the second housing opposite to the first housing defines at least one groove for connecting to another housing or a holder. The circuit board is secured in the second housing. The button couples to the first housing and connects to the circuit board through the first housing. The button is configured to initiate a Bluetooth signal transmission. |
| US09948325B2 |
Data processing circuit and method for de-interleaving process in DVB-T2 system
A data processing circuit for performing a de-interleaving process in a DVB-T2 system is provided. The data processing circuit includes: a buffer, buffering a plurality of data symbols; a memory, coupled to the buffer; an address generator, generating a plurality of addresses according to an operation logic and a permutation rule, and selecting and outputting a target address from the addresses; and a memory controller, coupled to the memory, the buffer and the address generator, writing the target data into the memory according to the target address, or/and reading the target data from the memory according to the target address, until the data symbols are de-interleaved when the data symbols are read from the memory. |
| US09948323B2 |
Operating method of memory system
An operating method of a memory system includes: reading a first data from a particular data group among a plurality of data groups included in a memory device; performing a first error correction code (ECC) decoding for the first data; when the first ECC decoding fails, reading a plurality of the remaining data other than the first data from the particular data group; performing a second ECC decoding for the plurality of the remaining data; when the second ECC decoding fails, identifying data, to the second ECC decoding fails, among the plurality of the remaining data; obtaining first and second soft read values respectively corresponding to the first data, to which the first ECC decoding fails, and the second data, to which the second ECC decoding fails; determining reliability of the first and second data based on the first and second soft read values; and correcting the first data based on the reliability of the first and second data. |
| US09948321B2 |
Semiconductor apparatus
A semiconductor apparatus includes a pattern conversion circuit configured to generate conversion data in response to a monitoring enable signal, pattern select signals and parallel input data; a transmission circuit configured to output the conversion data as serial data in response to a plurality of clocks; a reception circuit configured to output the serial data as parallel output data in synchronization with the plurality of clocks; and a monitoring circuit configured to generate a result signal in response to the plurality of clocks, clock select signals and the serial data. |
| US09948320B1 |
Semi-dynamic backend coder for data compression
Methods and systems are provided for the compression and decompression of data. The compression and decompression of data may include partitioning the data into chunks, analyzing the individual chunks to determine the best compression and decompression encoders to utilize for the next data chunk of a data file. In compressing and decompressing using the mentioned technique, the data is delivered to the requesting client in an efficient and speedy manner. |
| US09948314B2 |
Vapor cell and method for making same
Vapor cells and methods for making the same are presented, in which a cell cavity is completely filled with aqueous alkali metal azide solution and the solution is dried at a controlled evaporation rate to substantially maintain edge contact pinning at an interface with the cavity sidewall to promote preferential evaporation in the center and outward capillary flow from an unpinned air-fluid interface toward the sidewall to form crystallized alkali metal material at the sidewall while inhibiting drying of dispersed aqueous solution on a transparent cavity bottom to provide substantially unrestricted passage of light through the cavity for atomic clock and other applications. |
| US09948311B1 |
Decision-directed phase detector
A decision-directed phase detector (DDPD) to compare an input signal including clock and data components with a reference signal set to a clock crossover value, and generate a first compared output signal designating a transition of the input signal through the clock crossover value. The DDPD may also receive the first compared output signal and generate a phase adjustment signal, and compare the input signal with the reference signal set to a positive offset clock crossover value of the clock crossover value offset by a positive offset value, and generate a positive offset compared output signal designating a transition of the input signal through the positive offset clock crossover value. The DDPD may further generate a valid transition signal to route the phase adjustment signal to a clock generation circuit when the positive offset compared output signal transitions over a clock period. |
| US09948310B2 |
Methods and systems for clocking a physical layer interface
A method for clocking a physical layer (“PHY”) and a controller of a computing device, comprises the steps of: generating a reference clock signal; synchronizing a plurality of clock signals as a function of the reference clock signal; and clocking the controller and the PHY using the plurality of synchronized clock signals. |
| US09948305B2 |
Integrated circuit and electronic apparatus
An integrated circuit of an embodiment includes: a first to third wiring lines; a first and second input terminals connected to the second and third wiring lines respectively; a first and second control terminals; a first switch element disposed between the first and second wiring lines, the first switch element including a first and second terminals connected to the first and second wiring lines respectively; a second switch element disposed between the first and third wiring lines, the second switch element including a third and fourth terminals connected to the first and fourth terminals connected to the first and third wiring lines respectively; a first transistor including a source and a drain, one of the source and the drain being connected to the first wiring line; a select circuit including a fifth to eighth terminals; and a logic circuit including a ninth to eleventh terminals. |
| US09948302B2 |
Level shift circuit
Provided is a level shift circuit capable of avoiding breakdown due to level shift operation. The level shift circuit includes: a floating power supply having one end connected to an output terminal; a circuit configured to receive a voltage of the floating power supply, a voltage of a low level power supply and first and second pulse signals from a pulse generating circuit, thereof to output first and second signals; and a logic circuit configured to receive first and second signals, thereby converting a signal that is input to the pulse generating circuit into a signal that fluctuates between a voltage at the one end of the floating power supply and a voltage at the other end thereof to output the converted signal. |
| US09948301B2 |
Hybrid chip comprising hybrid connector
An integrated circuit (IC), a method of testing the IC, and a method of manufacturing the IC are provided. The IC includes analog circuitry, digital circuitry, at least one first connector, and a switching unit operatively coupled with the at least one first connector and configured to, if a first signal is received, couple the analog circuitry and the at least one first connector, and, if a second signal is received, couple the digital circuitry and the at least one first connector. |
| US09948299B2 |
On-die termination control without a dedicated pin in a multi-rank system
A memory subsystem includes a multi-device package including multiple memory devices organized as multiple ranks of memory. A control unit for the memory subsystem sends a memory access command concurrently to some or all of the ranks of memory, and triggers some of all of the memory ranks that receive the memory access command to change on-die termination (ODT) settings. One of the ranks is selected to execute the memory access command, and executes the command while all ranks triggered to change the ODT setting have the changed ODT setting. |
| US09948298B2 |
Impedance calibration circuit and semiconductor apparatus including the same
An impedance calibration circuit includes a first detection unit configured to generate a first pull-up impedance detection signal according to a resistance value of an internal reference resistor, a second detection unit configured to generate a second pull-up impedance detection signal according to a resistance value of an external reference resistor coupled to an external reference resistor pad, a switching unit configured to select the first pull-up impedance detection signal or the second pull-up impedance detection signal according to the internal impedance calibration enable signal and output the selected pull-up impedance detection signal, and an impedance calibration signal generation unit configured to generate a plurality of impedance calibration signals according to an output of the switching unit. |
| US09948296B2 |
Conductive film of a touch panel and manufacturing method thereof
The present disclosure provides a conductive film of a touch panel. The conductive film has a film and a plurality of a plurality of hydrophobic units. The film is used for sensing touch signals, and the hydrophobic units are disposed in the film with intervals. Conductive material of the conductive film of the touch panel is distributed outside the region of the hydrophobic units, and as the hydrophobic units have good light transmittance, the touch panel of the present disclosure has a characteristic of high light transmittance. |
| US09948294B2 |
Communicating across galvanic isolation, for example, in a power converter
A signal transmission system for communicating across galvanic isolation. The signal transmission system includes first circuitry referenced to a first potential, the first circuitry comprising signal transmission circuitry, second circuitry referenced to a second potential and galvanically isolated from the first circuitry, the second circuitry comprising signal reception circuitry, and a magnetic coupling between the first circuitry to the second circuitry across the galvanic isolation, the magnetic coupling comprising a transmitter-side inductor and a receiver-side inductor. The signal transmission circuitry can include a source coupled to output, to the transmitter-side inductor of the magnetic coupling, a first state representation that represents a first logic state with multiple transitions, the first state representation including at least a first upward transition, a first downward transition, a second upward transition, and a second downward transition. |
| US09948288B2 |
Compensation circuit and compensation method
Provided is a compensation circuit capable of improving compensation precision for manufacturing variations. The compensation circuit includes a manufacturing variation detection circuit which detects manufacturing variation of a transistor based on a first voltage output from an output terminal of the transistor having an input terminal applied with a substantially constant first current to temperature or based on a second current output from an output terminal of the transistor having an input terminal applied with a substantially constant second voltage to temperature, and a voltage generation circuit which generates a supply voltage supplied to an electric circuit based on the manufacturing variation. The first current corresponds to the substantially constant second voltage to temperature, and the first voltage corresponds to the substantially constant second current to temperature. |
| US09948286B2 |
Programmable switched capacitor block
A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal. |
| US09948285B2 |
Drive control device
A drive control device includes: an input unit of a command; and a control unit setting a period for rising a current in an inductive load to first and third periods in first and second commands, and setting a period for falling the current to second and fourth periods in the first and second commands, respectively. When the first command is changed to the second command, and at least one middle PMW pulse is disposed between a forward PWM pulse corresponding to the first command and an after PWM pulse corresponding to the second command, the control unit sets fifth and sixth periods in the middle PWM pulse corresponding to the first and second periods of the forward PWM pulse to a length between the first and second periods in the forward PWM pulse and the third and fourth periods in the after PWM pulse, respectively. |
| US09948274B2 |
Surface acoustic wave device
A surface acoustic wave device includes a high acoustic velocity film in which a transversal wave propagates at a higher acoustic velocity than in a ScAlN film laminated on a substrate made of silicon or glass. The ScAlN film is laminated on the high acoustic velocity film, and IDT electrodes are laminated on the ScAlN film. |
| US09948272B2 |
Air gap in BAW top metal stack for reduced resistive and acoustic loss
Embodiments of a Bulk Acoustic Wave (BAW) device including a high conductivity electrode are disclosed. In some embodiments, a BAW device includes a piezoelectric layer, a first electrode on a first surface of the piezoelectric layer, and a second electrode on a second surface of the piezoelectric layer opposite the first electrode. The second electrode includes a first metal layer and a second metal layer. The second metal layer is on the second surface of the piezoelectric layer, and the first metal layer is over a surface of the second metal layer opposite the piezoelectric layer, where the first metal layer is separated from the second metal layer by an air gap. By including the air gap, the thickness of the first metal layer (e.g., a high conductivity layer) can be increased to thereby increase the electrical conductivity of the second electrode while maintaining the performance of the BAW device. |
| US09948268B2 |
Multiband antenna having external conductor and electronic device including the same
A multiband antenna includes a conductive connecting member, an external conductor, and a conductor frame. The conductive connecting member is disposed on a non-metallic region of an electronic device. The external conductor is disposed on an external surface of the electronic device from a first connecting terminal connected to an end of the conductive connecting member to first and second path terminals, respectively, located opposite to each other. The conductor frame is connected to the first and second path terminals and a ground of a substrate. The external conductor includes a first external radiation conductor disposed between the first path terminal and the first connecting terminal, and a second external radiation conductor integrally formed with the first external radiation conductor and disposed between the second path terminal and the first connecting terminal. |
| US09948261B2 |
Method and apparatus to equalize acoustic response of a speaker system using multi-rate FIR and all-pass IIR filters
A speaker system includes an electronic signal processing unit configured to split an input audio signal into a low-pass audio component and a high-pass audio component. The electrical signal processing unit includes a multi-rate finite impulse response (FIR) filter configured to downsample the low-pass audio component and sample the downsampled low-pass audio component at a first sampling rate lower than a second sampling rate used to sample the high-pass audio component. The speaker system further includes an electronic adaptive equalizer coefficient (EAEC) module configured to dynamically determine at least one equalizer coefficient based on a signal characteristic of the input audio signal. An electronic filter coefficient update unit (FCUU) is included and is configured to control a frequency response of the speaker system based on the at least one equalizer coefficient. |
| US09948257B1 |
Phantom-powered inline preamplifier with variable impedance loading and adjustable interface
Phantom-powered inline preamplifiers capable of variable impedance loading are disclosed with unique adjustable interfaces. By enabling a user to adjust impedance loading from an actively-powered audio preamplifier which takes a microphone electrical signal or another sound source signal as an input, this unique audio preamplifier design with various adjustable impedance loading interface configurations can change sound characteristics according to the user's preference in a recording, production, or live concert environment. In addition, a high pass filter incorporated in a preamplifier with the variable impedance loading feature allows the user to further customize sound characteristics in the recording environment. This novel inline preamplifier, which may be standalone or integrated into a microphone casing, is powered via a microphone cable from a component (e.g. another preamplifier) providing the phantom power. This inline preamplifier may be connected to a conventional microphone and receive phantom-power into the inline preamplifier from a conventional preamplifier. |
| US09948256B1 |
Speaker volume preference learning
Audio information of audio content being listened to by a user is received. An aspect of a listening environment of the user is identified. A volume preset, based on the audio information and the aspect of the listening environment, is determined to be available. A first volume of the audio content being listened to by the user is determined to be different from the volume preset. The first volume of the audio content is adjusted to a second volume. |
| US09948255B2 |
Amplification circuit
Provided is an amplification circuit that amplifies an input signal and outputs an amplified signal. The amplification circuit includes: an amplification element that outputs the amplified signal from an output terminal thereof; an inductor having one end to which a power supply voltage is supplied and another end that is connected to the output terminal of the amplification element; a variable resistor that is connected in parallel with the inductor; and a resistance value adjusting circuit that adjusts a resistance value of the variable resistor in accordance with the temperature. |
| US09948254B2 |
Wireless Josephson bifurcation amplifier
A wireless Josephson-junction-based amplifier is described that provides improved tunability and increased control over both a quality factor Q and participation ratio p of the amplifier. The device may be fabricated on a chip and mounted in a waveguide. No wire bonding between the amplifier and coaxial cables or a printed circuit board is needed. At least one antenna on the chip may be used to couple energy between the waveguide and wireless JBA. The amplifier is capable of gains greater than 25 dB. |
| US09948249B2 |
Integrated matching circuit for a high frequency amplifier
An integrated matching circuits for a high frequency amplifier transistor having an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The integrated matching circuit comprises an inductive element, and a capacitive element arranged in a series arrangement with the inductive element. The series arrangement has a first terminal end connected to the input terminal or to the output terminal and a second terminal end connected to the reference terminal. The first terminal end and the second terminal end are arranged at a same lateral side of the integrated matching circuit to obtain a geometry with the first terminal end adjacent to the input terminal or to the output terminal and the second terminal end adjacent to the reference terminal. |
| US09948247B2 |
RF amplifier
An RF amplifier comprising an input-transistor having an input-transistor-base terminal, an input-transistor-collector terminal and an input-transistor-emitter terminal; a degeneration-component connected between the input-transistor-emitter terminal and a ground terminal; and a protection-transistor having a protection-transistor-base terminal, a protection-transistor-collector terminal and a protection-transistor-emitter terminal. The input-transistor-base terminal is connected to the protection-transistor-emitter terminal, and the protection-transistor-base terminal is connected to the input-transistor-emitter. |
| US09948246B1 |
Impedance flattening network for high efficiency wideband doherty power amplifier
A wideband power amplifier includes a set of amplifiers connected in parallel to amplify signals from input ports of the amplifiers, a matching network configured to match the signals amplified by the amplifiers with predetermined load values, the matching network having a first impedance frequency response as a monotonically decreasing function of frequency of the amplified signals in a target operation frequency range, a converter network configured to convert the signals matched by the matching network, and an impedance flattening network having a second impedance frequency response as a monotonically increasing function of frequency of the amplified signals in the target operation frequency range. |
| US09948244B1 |
Amplifier with adjustable gain
An amplifier with adjustable gain including a plurality of differential amplifiers and an output stage circuit is provided. Each of the differential amplifiers has at least one differential pair, two current terminals of each of the differential pairs are coupled by a connection structure, and the connection structure provides a negative feedback resistance. The differential amplifiers commonly receive a differential input signal pair, and output terminals of the differential amplifiers are coupled together. The output stage circuit inverts a voltage on the output terminals of the differential amplifiers to generate an output voltage. A direct current gain of the amplifier with adjustable gain is determined by adjusting at least one of working numbers of the differential amplifiers and the differential pairs. |
| US09948243B2 |
Reconfigurable load modulation amplifier
A reconfigurable load modulation amplifier having a first power amplifier (PA) configured to be supplied by a first drain voltage and a second PA coupled in parallel with the first PA, wherein the second PA is configured to be supplied by a second drain voltage is disclosed. The reconfigurable load modulation amplifier includes a quadrature coupler configured to combine power from both the first PA and the second PA for output through an output port. Also included is control circuitry configured to set at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage. In at least one embodiment, the control circuitry is further configured to dynamically adjust at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage. |
| US09948242B2 |
Selectable current limiter circuit
A selectable current limiter circuit to limit the current an amplifier with a load. The limiter circuit limits the current of an amplifier by comparing a voltage reference that follows the output swing of the amplifier to voltage drop across a current limiting resistor coupled to the output of the amplifier. The limiter circuits are operatively coupled to buffer and switch circuits that delay the current limiting until the limiter circuits are activated. |
| US09948237B2 |
Apparatus and method for filtering radio frequency signals of transceiver integrated circuits
Devices and methods are disclosed for generating, filtering, and amplifying signals that are sent and received using SOCs. These improved methods and devices advantageously provide filtering of composite RF signals such that the RF signals can be transmitted with an improved SNR. Such filtered signals can then be transmitted at a higher power. Because filtering is performed at an intermediate frequency, the higher cost of low-noise RF-transmitters and/or RF filtering components can be avoided. Accordingly, less expensive (e.g., noisier) components, such as readily available wireless transceiver SOCs, can be used for generating RF signals, filtering the signals, and then transmitting the filtered signals at higher power. As a result of these devices and methods, inexpensive SOCs may be used at higher powers and over longer ranges than would be normally expected. |
| US09948229B2 |
Electric vehicle
An electric vehicle includes: a first inverter circuit; a second inverter circuit; an inverter control device that outputs first switching signals to the first inverter circuit and second switching signals to the second inverter circuit; first signal lines that transfer the first switching signals to the first inverter circuit; second signal lines that transfer the second switching signals to the second inverter circuit; and a signal blocking circuit inserted in the first signal lines and the second signal lines, the signal blocking circuit being configured to output to the first inverter circuit first OFF signals in place of the first switching signals, and outputting to the second inverter circuit second OFF signals in place of the second switching signals, when receiving at least one of the first abnormality signal and the second abnormality signal. |
| US09948223B2 |
Drive unit of synchronous motor
Provided is drive unit of a synchronous motor capable of improving the accuracy of magnetic flux operations with a simple configuration. To this end, the drive unit has a magnetic flux operation part which, in the case where a direction of a magnetic field pole of the synchronous motor is regarded as a d-axis and a direction orthogonal to the d-axis is regarded as a q-axis, calculates a magnetic flux of the d-axis and a magnetic flux of the q-axis on the basis of a current of the d-axis, a current of the q-axis, and a field current of the synchronous motor; and a magnetic flux operation error correcting part which calculates a phase difference between an input voltage and an input current of the synchronous motor and corrects an inner-phase difference angle calculated from the magnetic flux of the d-axis and the magnetic flux of the q-axis on the basis of the phase difference. |
| US09948219B2 |
Rotating electrical machine control device
A rotating electrical machine control device where the changeover control circuit switches the source of electric power for the electronic control unit when the electric power that is supplied from the second DC power supply to the electronic control unit becomes equal to or lower than a predetermined first reference value and electric power that is output from the backup power supply is equal to or higher than a predetermined second reference value, and the electronic control unit uses the electric power supplied from the backup power supply to cause the inverter to perform the switching operation to perform fail-safe control. |
| US09948215B2 |
Soft starting system for an electrical motor
Starter system for an electric motor (M) supplied by an electrical network (1), the starter system comprising an electronic control circuit (7) and an electronic switch (10) for controlling one phase of the motor (M), the electronic switch (10) being controlled by the control circuit (7). The starter system comprises a sensor (3) intended to deliver an analog signal (4) that is representative of the derivative of a current flowing through the phase of the motor (M), a detection board (5) comprising means for transforming said analog signal (4) into a binary signal (6) that is representative of the changes in sign of said analog signal, and comprising means for transmitting said binary signal to the control circuit (7), so as to optimize the control of the electronic switch (10). |
| US09948214B2 |
High temperature electrostatic chuck with real-time heat zone regulating capability
Embodiments of the present invention provide electrostatic chucks for operating at elevated temperatures. One embodiment of the present invention provides a dielectric chuck body for an electrostatic chuck. The dielectric chuck body includes a substrate supporting plate having a top surface for receiving a substrate and a back surface opposing the top surface, an electrode embedded in the substrate supporting plate, and a shaft having a first end attached to the back surface of the substrate supporting plate and a second end opposing the first end. The second end is configured to contact a cooling base and provide temperature control to the substrate supporting plate. The shaft is hollow having a sidewall enclosing a central opening, and two or more channels formed through the sidewall and extending from the first end to the second end. |
| US09948208B1 |
Inverter capacitor with phase-out bus bar
The various implementations described herein include inverter devices and systems. In one aspect, an inverter includes: a case; a capacitor within the case having a first terminal and a second terminal; a first bus bar including a first portion within the case and a second portion extending from the case to contact a first transistor; a second bus bar including a first portion situated in the case and a second portion extending from the case to contact a second transistor; and a phase-out bus bar including a first portion situated in the case, a second portion extending from the case to contact the first transistor, and a third portion extending from the case to contact the second transistor. |
| US09948201B2 |
Power conversion apparatus including terminals having higher resistance portions
A module of conversion circuit includes a High side IGBT, a Low side IGBT connected in series to the High side IGBT, a first terminal connected to the High side IGBT, a second terminal connected to the Low side IGBT, a capacitor connected to the first terminal and the second terminal, and a third terminal connected to a connection point between the High side IGBT and the Low side IGBT. A fourth terminal is engaged with the first terminal. A fifth terminal is engaged with the second terminal. A sixth terminal is engaged with the third terminal. The first and second terminals have at portions thereof between front edges and rear edges high-resistance parts having higher resistance than other portions. |
| US09948187B2 |
System and method for a switched-mode power supply
In accordance with an embodiment, a method of operating a switched-mode power supply includes turning on a semiconductor switch coupled to a primary winding of a transformer for a first time period of a first cycle, turning off the semiconductor switch for a second time period of the first cycle, detecting a change in slew rate of a voltage at an output node of the semiconductor switch, determining a switch turn-on time based on detecting the change in the slew rate, and turning on the semiconductor switch at the determined switch turn-on time for a first time period of a second cycle. |
| US09948185B2 |
Fast-transient switching converter with type III compensation
A circuit configured for improving the large signal response of a control stage circuit of a switch mode DC/DC power converter by increasing the differential input range of an error amplifier by segmenting and adding an offset to the error amplifier input and output. When a transient is detected, the feedback voltage is offset in multiple segments by multiple offset voltage sources to prevent saturation of the control stage circuit. Counteracting offset voltages are added to an output of an error amplifier to prevent overshoot or undershoot. A feed-forward compensation signal is generated with the amplitude of the signal being clamped to fixed voltage levels between a minimum and a maximum amplitude of the feed-forward compensation signal. The feed-forward compensation signal is added to the output of the error amplifier to produce an output error signal of the control stage circuit configured for controlling the modulating of the switch mode DC/DC power converter. |
| US09948179B2 |
Apparatus for charge recovery during low power mode
Described is an apparatus for power management. The apparatus comprises: a first power supply node; a second power supply node; a controllable device coupled to the first power supply node and to the second power supply node, the controllable device operable to short the first power supply node to the second power supply node; a load coupled to the second power supply node; and a charge recovery pump (CRP) coupled to the first and second power supply nodes. |
| US09948174B2 |
Device for providing protection against short circuits upstream from a power module
The protection device for providing protection against short-circuits upstream from an electrical power supply module having an inlet filter with at least one capacitor and an inductor and having a converter with components associated with a plurality of freewheel diodes includes at least one auxiliary winding and a dissipator element associated with the inlet filter, thereby making it possible to provide an inlet filter of small size without over dimensioning the freewheel diodes. |
| US09948170B2 |
Vibration motor and mobile terminal having the same
A mobile terminal can include a case, a touch screen, a haptic module to generate vibration, a memory storing data, and a power supply unit. The haptic module may be a linear vibration motor including a housing, a coil, a moving portion, first and second elastic members; the housing includes an inner space defined by top and bottom surfaces, and first to fourth side surfaces; the coil, moving portion, and first and second elastic members are in the housing; the first and third side surfaces are spaced apart from the moving portion; the moving portion includes a magnet, first and second insertion grooves; the first and second elastic members are coil springs, the first and second elastic members are between the moving portion and the first third side surfaces, respectively; and one end of each coil spring is located at the first and second insertion grooves of the moving portion. |
| US09948169B2 |
Repulsive force conversion drives and centrifugal force conversion
A repulsive force conversion drive system for centrifugal force conversion to drive a load. A operational load to be driven by movement and provide external power due to movement of the operational load. A rotary repulsive force conversion drive connected to the operational load, such that the operational load moves in a first linear direction due to centrifugal force of rotating mass of the rotary repulsive force conversion drive. A linear repulsive force conversion drive connected to the operational load, the linear repulsive force conversion drive connected to the operational load such that the operational load moves is a second linear direction that is opposite the first linear direction on command from the linear repulsive force conversion drive. |
| US09948163B2 |
In-line conveyor belt roller generator with magnetic torque limiting coupling
A generator comprises a stator having a center axis and a rotor. The stator is configured and adapted to be supported by a portion of conveyor belt support structure. The stator comprises an opening aligned with the center axis configured and adapted to receive at least a portion of a shaft of a conveyor belt roller. The rotor is configured and adapted to connect to the conveyor belt roller in a manner such that the rotor and conveyor belt roller can collectively rotate about the center axis. The rotor encircles the stator and comprises a plurality of permanent magnets. |
| US09948160B2 |
Motor device
A base of a case has an inner groove portion, which surrounds a circuit board, and an outer groove portion. A first projected portion of a connector is inserted in the inner groove portion via a first seal portion. A second projected portion of the connector is inserted in the outer groove portion via a second seal portion. The first seal portion and the second seal portion are formed of the same material and are interposed between a periphery of an opening of the case and the connector. The first seal portion in the inner groove portion is in contact with the first projected portion of the connector to water tightly seal an accommodation space formed in the case. The second seal portion in the outer groove portion is in contact with the second projected portion of the connector to restrict vibration of the connector. |
| US09948156B2 |
Lawn mower motor and drive
A combined d.c. brushless motor and drive control assembly for a rotary mower includes a hollow motor housing, a cover removably attached to an open rear end of the housing, and an end shield mounted to an internal shelf of the housing adjacent its rear end. The end shield and a front wall of the housing define rotary bearing seats for a motor drive shaft. An electronic circuit board including motor drive electronics and feedback sensors is mounted to the housing or to the cover, and is positioned at an axial location between the internal shelf of the housing and the rear wall of the cover. The housing is configured for mounting on a shroud of the rotary mower such that at least the removable cover is above the shroud and easily accessible, whereby repair or replacement of the electronic circuit board is facilitated. |
| US09948153B2 |
Stacked core having a plurality of core pieces and a bridge portion
A stacked core includes a plurality of core pieces that are arranged in a stack. Each of the core pieces has a plurality of magnet insertion holes. A bridge is provided between a radially-outer end of each of the magnet insertion holes and an outer region of each of the core pieces, A radially-outer contour of the bridge is provided on a radially-inner side of a blanking-contour line of each of the core pieces. |
| US09948152B2 |
Multi-component rotor for an electric motor of an appliance
A motor for a laundry appliance includes a drive shaft coupled to a drum at a first end. The rotor frame is coupled proximate the second end of the drive shaft, where the rotor frame includes at least one polymeric material. A central hub includes a core and a perimetrical ring that extends circumferentially around the core. A plurality of recesses are defined within a planar surface of the perimetrical ring, wherein a portion of the polymeric material is received within the plurality of recesses to secure the rotor frame to the central hub. |
| US09948149B2 |
Method and apparatus for wireless power transfer
In accordance with an example embodiment of the present invention, an apparatus comprises a wireless power receiver configured to receive a wireless power signal, a communication circuitry configured to transmit one or more change requests associated with a quantity of the wireless power signal, and a control circuit configured to measure a plurality of reception levels associated with the quantity of the wireless power signal and to determine whether the plurality of reception levels corresponds to the one or more change requests. |
| US09948147B2 |
Magnetic resonance type wireless charging circuit
The present disclosure provides a magnetic resonance type wireless charging circuit, and belongs to the field of wireless charging technology. The magnetic resonance type wireless charging circuit comprises: a high frequency oscillation circuit configured to generate an initial oscillation signal; and a driving circuit configured to generate a transmission signal using the initial oscillation signal; wherein the driving circuit comprises one stage of driving sub-circuit or n stages of driving sub-circuits with (n−1) stages of Direct Current (DC) blocking circuits serially connected thereamong in an alternate manner, where n≥2 and n is an integer, and each stage of driving sub-circuit comprises a frequency doubling circuit and a first frequency selection circuit which are connected in series. In the present disclosure, the frequency of the initial oscillation signal generated by the high frequency oscillation circuit is doubled, so as to increase the frequency of the transmission signal and ensure a transmission distance of the transmission signal, thereby ensuring the effects of wireless charging. When the frequency of the transmission signal is required to reach a certain value, the requirements for switch transistors are reduced, and a wireless charging circuit with good effects can be achieved by using cheap switch transistors, thereby reducing production cost of the wireless charging circuit. |
| US09948146B2 |
Variable capacitance circuit, variable capacitance device, resonant circuit, amplifying circuit, and electronic apparatus
Provides is a variable capacitance circuit that is capable of efficiency optimizing antenna transmission effectively by regulating capacitance values of variable capacitance capacitors with use of direct current voltages applied to the variable capacitance capacitors. A variable capacitance circuit (1) includes a series variable capacitance element (2) and a parallel variable capacitance element (4) connected in series with the series variable capacitance element (2). The series variable capacitance element (2) includes two variable capacitance capacitors (CS1, CS2) (2a, 2b) connected in series. The parallel variable capacitance element (4) includes two variable capacitance capacitors (CP1, CP2) (4a, 4b) connected in series and a variable capacitance capacitor (CP3)(6) connected in parallel with the variable capacitance capacitors (CP1, CP2) (4a, 4b). The variable capacitance circuit (1) further includes three direct current terminals (7a, 7b, 7c). |
| US09948142B2 |
System for and method of wireless charging of a device
A wireless charging system including a first coil configured to be coupled to a transmitter driver circuit and arranged in a first plane, a second coil configured to be coupled to the transmitter driver circuit and arranged in a second plane and a third coil configured to be coupled to the transmitter driver circuit and arranged in a third plane. The transmitter driver circuit is configured to provide a time-varying current signal to one or more of the first coil, the second coil or the third coil. The first coil, the second coil and the third coil are concentric, the first plane is not parallel to the second plane and the third plane, and the second plane is not parallel to the third plane. |
| US09948138B2 |
Smart DC grid and smart power outlet
The disclosed smart receptacle allows use of high voltage DC power, typically between 100 and 120 volts, for regular appliances such as computers and cell phone power adapters, coffee pots, heaters and some motorized devices. The receptacle prevents use of the DC power by AC appliances by monitoring for amount and or quality of inductance of a plugged in appliance. Other embodiments include local grid structures that provide locally resilient sources of energy, particularly solar electric energy, and methods for sharing power. One such embodiment provides a comprehensive apparatus that provides energy cost lowering and backup power by connection to utility power and to DC power such as from a DC grid or solar panels, while providing power to DC appliances. |
| US09948128B2 |
Power tool battery pack wireless charger
A power tool system includes a power tool, a power tool battery pack and a battery pack charger. The power tool battery pack is separable from and attachable to the power tool, and electrically connectable to the power tool electrical terminals when attached to the power tool. The power tool battery pack has at least one battery cell, a receiver coil, and a control circuit for controlling the amount of power that is provided to the at least one battery cell. The battery pack charger has at least one transmitter coil for generating a magnetic field which induces a voltage in the receiver coil, and a control circuit for controlling the amount of power that is provided to the transmitter coil. |
| US09948125B2 |
Systems and methods for self-contained automatic battery charging and battery-life-extension charging
The disclosure provides embodiments of a self-contained automatic battery charging system having a power printed circuit board (PCB) that enables inputting an alternating current (AC) power flow to the automatic battery charging system. A first switchmode converter converts an AC input power to a direct current (DC) power, thereby providing an active power factor correction. The first switchmode converter comprises an isolation transformer, which provides an electrical isolation between a primary circuitry and a secondary circuitry of the automatic battery charging system. A second switch mode converter regulates a system output voltage and limits a system output current to an electrical load. A DC output is connected to a battery, another electrical storage device, and/or a parallel-connected DC load to be powered. An optional accessory PCB electrically connects to the power PCB and provides features including a liquid crystal display (LCD), alarm output relay(s), and/or a controller area network bus (CANbus) interface. The automatic battery charging system can implement a battery-life-extension charging regime. Other embodiments are disclosed. |
| US09948124B2 |
Battery charging with dynamic current limiting
Systems and methods for dynamic current limiting control the charge current for charging a battery of a device by determining the difference between the maximum supply current of an external supply source and the device current of the device in operation as it varies over time. Accordingly, the battery may be charged faster, using a charge current that, combined with the device current of the device in operation, does not exceed the maximum supply current of the external supply source. |
| US09948123B2 |
Portable solar power management system
A portable solar power management system includes (i) a solar panel interface to one or more solar panels, (ii) an energy storage interface to one or more energy storage devices, (iii) a charging circuit which routes the electrical currents from the solar panels to the energy storage devices; (iv) a load interface to one or more load devices, the load devices being powered independently on primary and secondary load circuits; and (v) a controller for controlling the operations of solar panel interface, the energy storage interface, the charging circuit, and the load interface. In addition, a secondary load control circuit and a programmable controller may be provided which route the electrical currents from the energy storage devices to the load interface, wherein the programmable controller, based on the sensing signals, also activates and deactivates the secondary load circuit. |
| US09948120B2 |
Portable power source device
A portable power source device includes a case having upper and lower shells hingedly connected by a living hinge. The upper and lower shells are formed with ventilation holes for heat ventilation. A power source assembly is provided on an inner surface of one of the shells. The power source assembly may include a battery, a control circuit board, at least one USB interface and a power-indicating unit. A support frame is provided on the inner surface adjacent to the power source assembly for supporting thereon an electronic device such as a mobile phone. The upper and lower shells are fastened together by a fastener. |
| US09948119B2 |
Control of parallel battery utilization
Systems and methods for allocating electrical current among battery sets connected in a substantially parallel configuration. A respective state of health is determined for each respective battery set in a plurality of battery sets. The respective state of health reflects a respective present amount of total energy able to be stored by each respective battery set relative to a specification of the respective battery set. A respective allocation of electrical current for each battery set in the plurality of battery sets is determined based on the respective state of health for each respective battery set. A current flow through each respective battery set is configured to its respective allocation of electrical current based on determining the respective allocation. |
| US09948117B2 |
Battery balancing apparatus and battery balancing method thereof
A battery balancing apparatus configured to perform a battery balancing for a battery pack is provided. The battery balancing apparatus includes n energy storage elements connected in series, n resistors connected in series and a switch unit. First and second terminals of an ith resistor among the n resistors are connected to first and second terminals of an ith energy storage element respectively, where n and i are positive integers and 1≤i≤n. In a first period, the switch unit selects at least one ith battery unit from among the battery units, and connects positive and negative electrode terminals of the ith battery unit to the first and second terminals of the ith energy storage element respectively, so as to perform the battery balancing. A battery balancing method is also provided. |
| US09948115B2 |
Accumulator battery management system
The invention relates to chargers of lithium-ion batteries. The system contains a common control block and control blocks of each of the multitude of battery cells, where each cell of the multitude of cells is controlled by its own control block, which contains a micro-controller that has the capabilities to receive data about the condition of the cell, transfer the received information to the block of common control, and balance voltages of cells by high currents, where the balancing mode efficiently operates in any mode of the battery operation, where the multitude of cells of the accumulator batter are connected in series by direct current, and in parallel by alternating current through the system of DC/AC converter balancing, where the converters are synchronized by the common control signal from the common control block. The invention reduces the charging time and increases the discharging time of the battery. |
| US09948113B2 |
Adaptive power management for self-sustaining energy harvesting system
Systems (100) and methods (500, 600) for adaptively managing power for an Energy Harvesting System (“EHS”). The methods involve: measuring a light intensity level available in a surrounding environment; wirelessly communicating a first wireless signal from the EHS (100) to a remote device (700) for causing the light intensity level to be increased by remotely turning on a light source (106, 108) or opening a cover preventing light emitted from the light source from reaching the EHC, when the light intensity level is below a pre-specified level; using an Energy Harvesting Circuit (“EHC”) to recharge a rechargeable battery (310) when the light intensity level rises above the pre-specified level; and wirelessly communicating a second wireless signal from the EHS to the remote device for causing the light source be turned off or the cover to be closed, when the capacity or state-of-charge of the rechargeable battery reaches a pre-specified value. |
| US09948111B2 |
Driver-friendly electrical load control method and apparatus
An electrical load control method includes: collecting, by an electrical load control apparatus, state information of one or more electrical loads; receiving, by an output device, the state information of the one or more electrical loads from the electrical load control apparatus; outputting, by the output device, the state information; receiving, by an input device, one or more control objects among the one or more electrical loads and control methods for the one or more control objects; and receiving, by the electrical load control apparatus, a signal corresponding to the received one or more control objects and the received control methods for the one or more control objects from the input device to deliver a signal corresponding to a respective control method for each of the one or more control objects. |
| US09948110B2 |
Power distribution system
An example power distribution system includes a relay moveable to a position that holds at least one contactor closed. The relay is moved to the position in response to an alternate source powering a power distribution system rather than a main source powering the power distribution system. |
| US09948106B2 |
Power conversion for solar / wind / water energy
Devices (10) convert source power from first sources (11) that receive solar/wind/water energy into load power destined for loads (13). The devices (10) comprise first converters (21) for converting first direct-current voltage signals from the first sources (11) to second direct-current voltage signals destined for the loads (13), first arrangements (31) for controlling the first converters (21) and regulating the second direct-current voltage signals in response to first control voltage signals, and first circuits (41) for providing the first control voltage signals. To prevent a collapse of the first direct-current voltage signals when having relatively small amplitudes, the first control voltage signals should have amplitudes equal to/larger than minimum values. The amplitudes of the first control voltage signal may be fixed, firstly fixed and secondly proportional to the amplitude of the first direct-current voltage signal, or inversely proportional/proportional to a square of the amplitude of the first direct-current voltage signal. |
| US09948100B2 |
Zero droop voltage control for smart inverters
Systems and methods for controlling grid voltage include a distribution power network and one or more smart inverters at or near the edge of the distribution power network, each smart inverter configured to absorb or insert VARs to control the voltage based on a reference Q value, wherein the reference Q value is calculated by a reference Q calculator. A reference Q calculator includes a processor and a non-transitory computer readable memory with software embedded thereon, the software configured to cause the processor to receive a voltage measurement taken at or near the edge of a power distribution grid, a voltage band value, and a voltage set point value, determine a difference, ev, between the voltage measurement and the voltage set point, generate a new reference Q value if an absolute value of ev is greater than the voltage band value, and cause the smart inverter to either absorb or insert VARs depending on the sign of ev. |
| US09948097B2 |
Method for controlling the electrical power delivered over an electrical supply network by at least two electrical energy sources and associated electrical system
In this control method for controlling the electrical power delivered over an electrical supply network (20) by at least two sources (16) of electrical energy, each energy source (16) comprises a storage member (22) for storing electrical energy. The method includes for each energy source (16) the following steps: the application by the electrical energy source (16) of an alternating current voltage signal over the electrical supply network (20); the measurement of an associated electrical power; the determination of an electrical energy stored in the storage member (22); the calculation of a set point value for the voltage signal parameter as a function of the measured power; the modification of the voltage signal, the value of the voltage signal parameter being modified so as to be equal to the calculated set point value. During the calculation step, the set point value is calculated additionally as a function of the stored electrical energy determined. |
| US09948095B2 |
Combined control of two voltage sources
Electrical management system comprising a first voltage source linked to a load and a second voltage source at lower voltage, characterized in that the second voltage source and/or an associated charger can be arranged in series with the first voltage source and the load. |
| US09948092B2 |
Current-mirror-based electrostatic discharge clamping circuit and current-mirror-based electrostatic discharge detector
The present invention discloses a current-mirror-based electrostatic discharge (ESD) clamping circuit comprising: a first power terminal; a second power terminal; a current-mirror-based ESD detector; a driver; and an ESD clamping element. The current-mirror-based ESD detector includes: a resistor coupled between the first power terminal and a detection-output-terminal; a semiconductor capacitor coupled between the detection-output-terminal and an ESD triggered current mirror; and the ESD triggered current mirror operable to electrically connect the semiconductor capacitor and/or the detection-output-terminal with the second power terminal according to the level of a driving signal under an ESD operation. The driver is operable to generate the driving signal according to the voltages of the detection-output-terminal and the first and second power terminals. The ESD clamping element is operable to provide a conducting path from the first power terminal to the second power terminal according to the level of the driving signal under the ESD operation. |
| US09948091B1 |
Integrated defibrillation pulse protector
Silicon-controlled rectifier (SCR) based circuit for ECG protection under defibrillator pulse is disclosed. The SCR-based clamp is a symmetric structure for dual-direction voltage tolerance protection based on two anti-series P-well/N-well lateral blocking junctions isolated from P-substrate by the N-buried layer. The injector regions (n+/p+) are substantially lengthened in order to accommodate a larger number of contact rows than typically used for ESD pulses specification. A stack of metal layers may also be used to provide high current and heat-sink capability with each electrode metal layer fully filled with VIAs. |
| US09948088B2 |
Apparatus and method for protecting a circuit of a vehicle and circuit
A device for protecting a circuit of a battery for a vehicle having an operating current direction, having a control device for providing a control signal, which represents a direction of the current flow through the circuit and a switching element that is designed to interrupt the circuit depending on the control signal in order to protect the circuit. |
| US09948087B2 |
Protective device for an electrical supply facility
The present invention is directed to a protective device configured to be coupled between an AC power source and an electrical load. A ground continuity monitor is coupled to the ground conductor, the ground continuity monitor being configured to detect a ground discontinuity condition in the ground conductor. A circuit interrupter mechanism is configured to interrupt electrical continuity in a tripped state and establish electrical continuity in a reset state. A self-test circuit is coupled to the ground continuity monitor and configured to perform a simulated ground continuity test that simulates the ground discontinuity condition. The self-test circuit provides a test failure signal when the ground continuity monitor fails to provide an output signal in response to the simulated ground continuity test. The test failure signal is configured to trip the circuit interrupter mechanism. |
| US09948081B1 |
Asymmetric Aeolian vibration damper
An asymmetric Stockbridge damper having at least six and as many as ten resonant frequencies. The damper includes two assemblies, each having a primary weight at the end of a messenger cable and two secondary weights at the ends of thin beams. The thin beams are mounted at one end to the primary weight and each support a secondary weight at an opposite end. The thin beams extend parallel to the messenger cable. The messenger cable is affixed to a clamp assembly which clamps to an overhead transmission line. The clamp assembly includes a toggle crank generating a theoretically infinite clamping force on the transmission line. |
| US09948078B2 |
Electrical conduit body with wiring chamber
Methods, systems, and devices for use in an electrical conduit system, including a conduit body apparatus for use in an electrical conduit system comprising conduit tubular segments. The apparatus may include a conduit body defining: a plurality of ports each configured to receive an end of a conduit tubular segment; a passage between a first port of the plurality of ports and a second port of the plurality of ports allowing wiring to pass through the conduit body; and a wiring chamber communicating with the passage, the wiring chamber comprising an opening having a direction of entry substantially parallel to a direction of entry of at least one port of the plurality of ports. |
| US09948077B2 |
Manufacturing process of molding stress control module for cross-linked polyethylene insulation cable body terminal
The present invention discloses a manufacturing process for a termination injection molding stress control module for cross-linked polyethylene insulated cable body, which comprises the steps of melting and cross-linking a cable factory insulation layer and a filling insulation; melting and cross-linking the cable factory semiconducting layer and a filling semiconducting layer; and melting and cross-linking the filling insulation and the filling semiconducting layer. |
| US09948073B2 |
Auxiliary compartment for a switchgear system
An auxiliary compartment for housing at least one electrical device is associated with an auxiliary cubicle of a switchgear enclosure. The auxiliary compartment is removably mounted in the corresponding auxiliary cubicle for quick disconnection of the electrical device from an associated circuit breaker in an adjacent circuit breaker cubicle. The auxiliary compartment includes a first connection connected to the electrical device. The auxiliary cubicle includes a second connector attached to the auxiliary compartment rear wall that is removably engageable with the first connector. The second connector is connected with the circuit breaker in the adjacent circuit breaker cubicle. The electrical device in the auxiliary compartment can be quickly disconnected from the power and communication connections with the circuit breaker in the adjacent circuit breaker cubicle by withdrawing the auxiliary compartment from the auxiliary cubicle to disconnect the first and second connectors. |
| US09948071B2 |
Ionizer with a needle cleaning device
An ionizer, including: an ionizing electrode for ionizing air and having a longitudinal first direction; and a cleaning member including a plurality of spaced apart bundles of bristles for cleaning the ionizing electrode when the cleaning member comes into contact with the ionizing electrode, each bundle of bristles in the plurality of spaced apart bundles of bristles being offset relative to the other bundles of bristles in the plurality of spaced apart bundles of bristles along the first direction and along a second direction perpendicular to the first direction. |
| US09948063B2 |
Waveguide structure for mid-IR multiwavelength concatenated distributed-feedback laser with an active core made of cascaded stages
Concatenated distributed feedback lasers having novel waveguides are disclosed. The waveguides allow for coupling of the laser beam between active and passive waveguide structures and improved device design and output efficiency. Methods of making along with methods of using such devices are also disclosed. |
| US09948062B2 |
Solid-state lighting structure with light modulation control
A solid-state light source (SSLS) with light modulation control is described. A SSLS device can include a main p-n junction region configured for recombination of electron-hole pairs for light emission. A supplementary p-n junction region is proximate the main p-n junction region to supplement the recombination of electron-hole pairs, wherein the supplementary p-n junction region has a smaller electron-hole life time than the electron-hole life time of the main p-n junction region. The main p-n junction region and the supplementary p-n junction region operate cooperatively in a light emission state and a light turn-off-state. In one embodiment, the recombination of electron-hole pairs occurs in the main p-n junction region during a light emission state, and the recombination of electron-hole pairs occurs in the supplementary p-n junction region light during the light turn off-state. |
| US09948061B2 |
Methods of driving laser diodes, optical wavelength sweeping apparatus, and optical measurement systems
An optical wavelength sweeping apparatus is disclosed. The optical wavelength sweeping apparatus includes a laser diode having an active region including a thickness of less than 1 μm, a cross-section of less than 7 μm2, and a ratio of active region volume to total laser diode volume of less than 1/300, and a pulse generator coupled to the laser diode. The pulse generator is configured and operable to provide a current drive pulse to the laser diode to selectively and rapidly heat the active region and immediate vicinity to provide a peak increase in temperature of 30° C. or more at an end of the current pulse and to perform a wavelength sweep of emitted optical radiation which is greater than 5 nm. Methods of driving a laser diode and optical systems are disclosed, as are other aspects. |
| US09948055B2 |
Gas laser
A gas laser, including: a semiconductor laser, an optical beam-shaping system, a pair of electrodes, a discharge tube, a rear mirror, and an output mirror. The pair of electrodes includes two electrodes. The electrodes are symmetrically disposed at an outer layer of the discharge tube in parallel. The electrodes are connected to a radio-frequency power supply via a matching network, and the electrodes operate to modify working gas in the discharge tube through radio-frequency discharge. The rear mirror and the output mirror are disposed at two end surfaces of the discharge tube, respectively. The rear mirror, taken together with the output mirror and the discharge tube, form a resonant cavity. The output mirror is configured to output a laser beam. |
| US09948054B2 |
Vacuum container of laser oscillator
A vacuum container of a laser oscillator includes a first sealing member and a second sealing member that are disposed between a tube and an insertion member. The first sealing member is made of a material having a corrosion resistance higher than the second sealing member, the first sealing member is disposed on a vacuum side relative to the second sealing member, the second sealing member is made of a material having a sealing property higher than the first sealing member, and the first sealing member at least partially includes a deformation portion that deforms in such a manner as to enhance a sealing property thereof. |
| US09948050B2 |
Method of assembling microwave connector with filtering properties having outer and inner conductors
A microwave connector is provided. The microwave connector includes an outer conductor, an inner conductor disposed within the outer conductor and dielectric materials interposed between the outer conductor and the inner conductor, the dielectric materials including a non-dissipative dielectric material and a dissipative dielectric material. |
| US09948048B2 |
Splitter terminal and connector
A connector assembly may include first and second connector bodies and a terminal splitter. The second connector body may matingly engage the first connector body. The terminal splitter may be received in at least one of the first and second connector bodies. The terminal splitter may include a body portion having first and second wires connected thereto and a blade portion extending from the body portion and including a third wire connected thereto. The third wire may be joined to a female receptacle mounted in the other one of the connector bodies for being joined to the blade portion. |
| US09948047B2 |
Composite cable and composite harness
[Problem] Provided are a composite cable and a composite harness that allow the improvement of cable termination workability while maintaining the flex resistance.[Solution] A composite cable 1 is provided with a pair of first electric wires 2, a twisted pair wire 4 formed by twisting a pair of second electric wires 3 having a smaller outer diameter than the first electric wires 2 and a tape member 6 spirally wound around an assembled article 5 that is formed by twisting the pair of first electric wires 2 and the twisted pair wire 4 together, wherein a twist direction of the twisted pair wire 4 is different from a twist direction of the assembled article 5, and the twist direction of the assembled article 5 is different from a winding direction of the tape member 6. |
| US09948045B2 |
Audio/video signal transmission connector
The audio/video signal transmission connector provided in this application, relates to the field of TV; use partition and integration arrangement corresponding to the audio-video signal transmission connector in TV, so as to avoid interference among each zone, and make the connecting end faces of the interface in each zone locate in the same horizontal plane, so as to make the connector easier to plug the other components, and the connection are reliable and not easy to loose, meanwhile it is benefit for welding procedure. |
| US09948038B2 |
Connector
A connector comprises an outer member, which is made of resin coated with a conductive plating layer, and an inserted portion, which is inserted into an insertion hole of a case rearward in a front-rear direction when the connector is attached to the case. The outer member has a body portion, a flange and an attached surface which is formed of a rear surface of the body portion and a rear surface of the flange. The flange protrudes from the body portion in a perpendicular plane perpendicular to the front-rear direction. The inserted portion is located inward of the body portion in the perpendicular plane. The rear surface of the body portion is formed with a pressure contact portion which surrounds the inserted portion in the perpendicular plan. The pressure contact portion is formed with a contact surface which is located rearward of the rear surface of the flange. |
| US09948033B1 |
Patch panel structure
A patch panel structure includes a first jack row including a plurality of first network ports each having RJ-45 jack ends aligned in a first direction and arranged in a first row; a second jack row including a plurality of second network ports each having RJ-45 jack ends aligned in a second direction and arranged in a second row, wherein the first jack row and the second jack row are parallel, whereas the first direction and the second direction are opposite. Minimal alien crosstalk occurs between the network ports of the patch panel structure, thereby meeting strict transmission standards. |
| US09948024B1 |
Protecting cap structure of charging gun
A protecting cap structure of a charging gun has a cover, a push plate, a fixing seat, at least one first resilient element, and a gland. The push plate is moveably mounted in a containing groove of the cover. The fixing seat, the first resilient element, and the gland are mounted in the containing groove. The first resilient element and the gland are respectively mounted on both sides of the push plate, and the first resilient element abuts and pushes the front side of the push plate. The protecting cap structure not only improves water resistance and dust resistance by the gland which is propped by the resilient element when the cover covers the plug of the charging gun, but also is easy to use because the resilient elements push forward the cover when the cover is to be removed. |
| US09948014B2 |
Connection structure and connection method for terminal fitting
A connection structure of a terminal fitting includes the terminal fitting including a terminal body, and a plurality of terminal connection portions extending from the terminal body and connection terminals connected to end portions of electric wires. Each of the connection terminals includes a pair of fastening caulking pieces which erects on opposite side portions of a terminal bottom portion. The pair of the fastening caulking pieces are caulked with opposite side portions of a corresponding one of the terminal connection portions from outside so that the connection terminal is caulked and fastened to the terminal fitting. Concave-convex engagement portions are provided in opposed surfaces in which the terminal connection portion and the terminal bottom portion abut against each other. The terminal fitting is connected to the electric wires through the connection terminals. |
| US09948013B2 |
Modular electrical power transfer device for integrated power platform
The invention provides a modular electrical power transfer device that enables push-in, pull-out connection between electrical power supply wires and interface components. The electrical power transfer device includes at least two physically isolated electrical buses mounted within a non-conducting housing. Each electrical bus includes a blade connector and one or more wire shark-bite connectors. The wire shark-bite connectors can engage with electrical power supply wires, the resulting mechanical and electrical connections enable the electrical bus to receive power from the connected supply wires and redistribute electrical power to another device connected to the electrical bus. The blade connector can engage with a blade contact from an interface component, the resulting mechanical and electrical connections enable transfer of electrical power from the electrical bus to the interface component. |
| US09948012B2 |
Connectors for connecting landscape lights to electrical wiring
A connector includes a cable tray configured to receive and retain a cable in a stable position and couple with a top cap configured to create an electrical connection with the cable as the top cap is manipulated in a predetermined manner while coupled with the cable tray. An upper surface of the cable tray is configured to receive the cable. The cable tray also includes a finger extending beyond the first end for some distance longitudinally. The finger includes a protrusion that protrudes to some extent in a transverse direction so that a cable-accommodating gap is defined between the protrusion and the first end. The protrusion is configured to bear against the cable and retain the cable in the stable position when the cable is inserted between the protrusion and the first end (before, during and/or after an electrical connection is established). |
| US09948009B2 |
Controlled illumination dielectric cone radiator for reflector antenna
A dielectric cone radiator sub-reflector assembly for a reflector antenna with a waveguide supported sub-reflector is provided as a unitary dielectric block with a sub-reflector at a distal end. A waveguide transition portion of the dielectric block is dimensioned for coupling to an end of the waveguide. A dielectric radiator portion is provided between the waveguide transition portion and a sub-reflector support portion. An outer diameter of the dielectric radiator portion is provided with a plurality of radial inward grooves and a minimum diameter of the dielectric radiator portion is greater than ⅗ of a sub-reflector diameter of the sub-reflector support surface. |
| US09948005B2 |
Antenna device and communication terminal apparatus
An antenna device that includes a planar conductor with a first side and a second side. The antenna device includes multiple coil antennas that each includes a coil conductor wound around a winding axis that extends in a direction of the planar conductor. Moreover, two or more of the coil antennas have respective coil openings positioned adjacent to the first side of the planar conductor. |
| US09948004B2 |
Hybrid coil circuit
It is presented a hybrid coil circuit comprising: a transformer; a common mode choke, wherein all choke windings are magnetically coupled; an impedance matching device connected on a middle choke winding, the impedance matching device being connected to ground; a first port being provided between a first choke winding and the impedance matching device; a second port being provided between a third choke winding and the impedance matching device; a third port being provided between either end of a second transformer winding; a first inductor arranged between the impedance matching device and the first port; and a second inductor arranged between the impedance matching device and the second port, wherein the first inductor and the second inductor are magnetically coupled. |
| US09947996B2 |
Antenna device
An antenna device includes an antenna element, a sensing circuit, a matching circuit and an impedance adjusting circuit. The sensing element is used to generate a sensing signal. The matching circuit is coupled to the antenna unit. The impedance adjusting circuit is coupled to the sensing circuit and is capable of turning an impedance of the antenna unit and an impedance of the matching circuit into mismatch according to the sensing signal. |
| US09947995B2 |
Antenna device, feed element, and communication terminal device
An antenna device includes a conductor surface in which an opening having an open edge portion in communication with the outside is provided, a feed element including a first coil connected to the feed element and a second coil magnetically coupled to the first coil, a first mounting portion disposed in the open edge portion and connected to a first end of the second coil, and a second mounting portion disposed in the open edge portion in a state isolated from the first mounting portion and connected to a second end of the second coil. The first mounting portion and the conductor surface are directly or indirectly conducted to each other, and the second mounting portion and the conductor surface are directly or indirectly conducted to each other. A loop is defined around the opening through the first mounting portion, the second mounting portion, and the second coil. |
| US09947994B2 |
Time-variant antenna module for wireless communication devices
A plug-and-play antenna may be used with many different types of wireless communication devices. An antenna may be coupled to an impedance tuning component and a waveform generator. A calibration control module receives radio status information, controls the waveform generator to vary a response of the antenna, and tunes the impedance tuning component to match impedances between a radio and the antenna. |
| US09947989B2 |
Antenna for communication terminal
Provided are an antenna for a communication terminal, and a method of manufacturing the same, the antenna including: a communication terminal case; and a radiator layer formed of a metal material in an inner curved surface part of the communication terminal case. |
| US09947988B2 |
Wireless communication device with integrated ferrite shield and antenna, and methods of manufacturing the same
A wireless communication device and methods of manufacturing and using the same are disclosed. The wireless communication device includes a substrate with an antenna and/or inductor thereon, a patterned ferrite layer overlapping the antenna and/or inductor, and a capacitor electrically connected to the antenna and/or inductor. The wireless communication device may further include an integrated circuit including a receiver configured to convert a first wireless signal to an electric signal and a transmitter configured to generate a second wireless signal, the antenna being configured to receive the first wireless signal and transmit or broadcast the second wireless signal. The patterned ferrite layer advantageously mitigates the deleterious effect of metal objects in proximity to a reader and/or transponder magnetically coupled to the antenna. |
| US09947987B2 |
Antenna apparatus and communication terminal
An antenna apparatus includes a power supply coil, a booster electrode sheet, a magnetic sheet, and a ground substrate arranged in this order from the top. The power supply coil includes a spiral coil conductor located on a flexible substrate. The booster electrode sheet includes a booster electrode located on an insulating substrate. The booster electrode includes a conductor region covering the coil conductor, a conductor aperture covering a coil window, and a slit portion connecting the outer edge of the conductor region and the conductor aperture in plan view. The magnetic sheet covers the booster electrode sheet so that the magnetic sheet covers a region slightly larger than a region including the conductor aperture and the slit portion of the booster electrode. |
| US09947986B1 |
Reactive power combiners and dividers including nested coaxial conductors
A power divider/combiner includes a main conductor defining an axis and having an outer surface; an input connector, at a front end, having a center conductor, electrically coupled to the main conductor and having an axis aligned with the main conductor axis; a first hollow cylindrical conductor having an open end facing rearwardly, having an inner cylindrical surface, the main conductor being received in and spaced apart from the inner cylindrical surface, the first hollow cylindrical conductor being electrically coupled to the second conductor of the input connector; a second hollow cylindrical conductor having an open end facing forwardly, the first cylindrical conductor being received in and spaced apart from the inner cylindrical surface of the second cylindrical conductor; a third hollow cylindrical conductor having an open back end facing rearwardly, the second cylindrical conductor being received in and spaced apart from the inner cylindrical surface of the third cylindrical conductor; and a plurality of output connectors having respective axes that are perpendicular to the main conductor axis, the output connectors being angularly spaced apart relative to each other, the output connectors having center conductors electrically coupled to the third cylindrical conductor. Methods are also provided. |
| US09947982B2 |
Dielectric transmission medium connector and methods for use therewith
Aspects of the subject disclosure may include, for example, a connector that includes a first port configured to receive electromagnetic waves guided by a first dielectric core of a first transmission medium. A waveguide is configured to guide the electromagnetic waves from the first port to a second port. The second port is configured to transmit the electromagnetic waves to a second dielectric core of a second transmission medium. Other embodiments are disclosed. |
| US09947977B2 |
Anode for lithium secondary battery, fabricating method thereof and lithium air battery having the same
Provided is an anode for a lithium secondary battery capable of improving the performance and the life of a lithium air battery by forming the anode so that lithium metal is sealed, but migration of lithium ions is possible, and thus, preventing corrosion of a lithium metal and the generation of hydrogen gas caused by permeation of moisture and oxygen gas into the anode, a manufacturing method thereof, and a lithium air battery containing the same. |
| US09947972B2 |
Battery pack and method of inspecting storage state of secondary battery in battery pack
A battery pack and a method of inspecting a storage state of a secondary battery in the battery pack are provided. In the method of inspecting a storage state of a secondary battery in the battery pack, the battery pack includes (A) a plurality of secondary batteries and (B) a housing, the housing having a plurality of storage sections and containing the secondary batteries in the respective storage sections; a conductive member 30 is attached to an outer surface of each of the secondary batteries made of a non-conductive material; each of the storage sections is provided with at least two detection sections; and depending on a storage state of each of the secondary batteries in each of the storage sections, two detection sections are in contact with the conductive member, or at least one detection section is not in contact with the conductive member. |
| US09947968B2 |
Method of producing lithium ion secondary battery, and lithium ion secondary battery
A method of producing a lithium ion secondary battery includes: selecting a positive electrode active material that has a prescribed specific surface area, and preparing a nonaqueous electrolyte solution that contains a compound with a following formula (1) at a prescribed concentration. In an xy-coordinate plane that gives a relationship between a specific surface area x [m2/g] of the positive electrode active material and a concentration y [mol/kg] of the compound in the nonaqueous electrolyte solution, a combination of the prescribed specific surface area and the prescribed concentration corresponds to a combination of values that lies within a hexagonal inner region formed by connecting 6 points (x, y)=(1.50, 0.050), (2.20, 0.05), (2.60, 0.10), (2.60, 0.16), (0.80, 0.16), and (0.60, 0.10) in this sequence with straight lines. |
| US09947967B2 |
Fluorosulfonyl imide salt and method for producing fluorosulfonyl imide salt
The present invention provides a method for producing a fluorisulfonylimide salt, which enables reducing the impurity content and continuous operation for a long time, and a fluorosulfonyl imide salt. The fluorosulfonyl imide salt of the present invention has a K content of 10,000 ppm or less. The method for producing a fluorosulfonyl imide salt of the present invention is that after a fluorination reaction of chlorosulfonyl imde or a salt thereof, the reaction solution is brought into contact with an aqueous alkaline solution so as to remove impurities. The fluorosulfonyl imide salt of the present invention, in which various impirities are reduced to extremely low levels, is useful as an electrolyte used in a lithium secondary battery, a capacitor or the like, an ionic liquid, or an intermediate for a sulfonyl imide salt, and the like. It is expected that use of the fluorosulfonyl imide salt of the present invention as an electrolyte leads to a high-performance electrochemical device. |
| US09947963B2 |
Ionically conductive compounds and related uses
Articles, compositions, and methods involving ionically conductive compounds are provided. The disclosed ionically conductive compounds may be incorporated into an electrochemical cell (e.g., a lithium-sulfur electrochemical cell, a lithium-ion electrochemical cell, an intercalated-cathode based electrochemical cell) as, for example, a protective layer for an electrode, a solid electrolyte layer, and/or any other appropriate component within the electrochemical cell. In certain embodiments, electrode structures and/or methods for making electrode structures including a layer comprising an ionically conductive compound described herein are provided. |
| US09947960B2 |
Electrolytes for low impedance, wide operating temperature range lithium-ion battery module
A lithium ion battery cell includes a housing, a cathode disposed within the housing, wherein the cathode comprises a cathode active material, an anode disposed within the housing, wherein the anode comprises an anode active material, and an electrolyte disposed within the housing and in contact with the cathode and anode. The electrolyte consists essentially of a solvent mixture, a lithium salt in a concentration ranging from approximately 1.0 molar (M) to approximately 1.6 M, and an additive mixture. The solvent mixture includes a cyclic carbonate, an non-cyclic carbonate, and a linear ester. The additive mixture consists essentially of lithium difluoro(oxalato)borate (LiDFOB) in an amount ranging from approximately 0.5 wt % to approximately 2.0 wt % based on the weight of the electrolyte, and vinylene carbonate (VC) in an amount ranging from approximately 0.5 wt % to approximately 2.0 wt % based on the weight of the electrolyte. |
| US09947957B2 |
Secondary battery of excellent productability and safety
Disclosed is a secondary battery having a structure in which a jelly-roll having a cathode/separator/anode structure is mounted in a cylindrical battery case, wherein a plate-shaped insulating member is mounted on the top of the jelly-roll and the insulating member includes a perforated inlet enabling gas discharge and penetration of electrode terminals and a plurality of pores with a diameter of 100 μm or less provided over the entire surface of the insulating member. |
| US09947955B2 |
Modular fuel cell system
A fuel cell stack module includes a base, a cover dome removably positioned on the base, and a plurality of fuel cell stacks removably positioned on the base below the cover dome. A modular fuel cell system includes a plurality of the fuel cell stack modules, where each fuel cell stack module may be electrically disconnected, removed from the fuel cell system, repaired or serviced without stopping an operation of the other fuel cell stack modules in the fuel cell system. |
| US09947949B2 |
Method for controlling power threshold value of fuel cell
A system and method for controlling power of a fuel cell for a vehicle are provided. The method includes measuring a temperature of the fuel cell and when the measured temperature of the fuel cell is within a high temperature range in which a power threshold value of the fuel cell is reduced based on an increase in temperature of the fuel cell and when the measured temperature of the fuel cell is increased and then is equal to or greater than a predetermined temperature a power threshold value is reduced from a power value at the predetermined temperature. The high temperature range is a range between a third temperature at which the power threshold value starts to be reduced based on the increase in temperature of the fuel cell and a fourth temperature at which the power threshold value is reduced and then reaches the minimum power threshold value. |
| US09947948B2 |
Fuel cell system
A fuel cell system includes a compressor provided in a cathode gas supply passage configured to feed the cathode gas under pressure to the fuel cell, a bypass passage configured to discharge the cathode gas fed under pressure by the compressor to a cathode gas discharge passage while bypassing the fuel cell, a bypass valve provided in the bypass passage and configured to adjust a flow rate of the cathode gas flowing in the bypass passage, a system stopping unit configured to stop the fuel cell system by performing a predetermined stop sequence process when a request to stop the fuel cell system is made, and a stop-time bypass valve control unit configured to control a valve body of the bypass valve to a predetermined initialization position in parallel with the sequence process during the stop sequence process. |
| US09947947B2 |
Mixed metal borohydrides
The invention relates to mixed metal borohydrides used for solid hydrogen storage. The mixed metal borohydrides are synthesized through solution synthesis using multiple metal borohydrides. First and second precursor solutions are prepared and combined to create a mixture in which the mixed metal borohydride is formed. The solvent is removed, leaving the mixed metal borohydride. The first precursor solution consisting essentially of lithium borohydride, and the second precursor solution consisting essentially of a borohydride compound containing one or more metal cations selected from the group of metals consisting of sodium, magnesium, calcium and titanium. |
| US09947942B2 |
Titanium material or titanium alloy material for fuel cell separator having high contact conductivity with carbon and high durability, fuel cell separator including the same, and fuel cell
A titanium or titanium alloy material for a fuel cell separator has a surface shape in which a plurality of projections are distributed, and a titanium oxide film on a surface of the projections. Fine projections are assumed to increase the contact conductivity remarkably. By increasing contact conductivity with carbon and durability of a titanium or titanium alloy material for a fuel cell separator, the lifetime of a fuel cell may be increased. The material has high usability in the cell manufacturing industry. |
| US09947937B2 |
Catalyst carrier and method for producing the same
A catalyst carrier, an electrode catalyst, an electrode including the catalyst, a membrane electrode assembly including the electrode, and a fuel cell including the membrane electrode assembly. The catalyst carrier includes a carbon material having a chain structure including a chain of carbon particles and an alumina-carbon composite particle in which a carbon particle encloses an alumina particle, the alumina-carbon composite particle is contained in the carbon material, and the catalyst carrier has a BET specific surface area of 450 to 1100 m2/g. |
| US09947935B1 |
Facile control of pore structure in carbon-supported PGM-based catalysts
A method for forming a carbon supported catalyst includes a step of providing a first carbon supported catalyst having a platinum-group metal supported on a first carbon support. Characteristically, the first carbon support has a first average micropore diameter and a first average carbon surface area. The first carbon supported catalyst is contacted with an oxygen-containing gas at a temperature less than about 450° C. for a predetermined period of time to form a second carbon supported catalyst, wherein the first carbon support or the second carbon supported catalyst is acid leached. |
| US09947931B2 |
Non-aqueous electrolyte secondary battery including phosphoric acid ester compound containing at least one metal element
Provided is a nonaqueous electrolyte secondary battery including a nonaqueous electrolyte and an electrode assembly including a positive electrode, a negative electrode, and a separator disposed between the positive electrode and the negative electrode. The electrode assembly further includes a layer containing a metal oxide powder between the positive electrode and the negative electrode. The positive electrode contains a phosphate ester compound represented by Formula (1); where X and Y each independently represent a metal atom, a hydrogen atom, or an organic group; at least one of X and Y represents a metal atom; X and Y are coincident when the metal atom is divalent; and n represents an integer of 2 or more and 10 or less. |
| US09947926B2 |
Method of forming nitrogen-doped porous graphene envelope
Disclosed is a method of forming a nitrogen-doped porous graphene envelope. The method of forming the nitrogen-doped porous graphene envelope includes dissolving a nitrogen precursor in an organic precursor and then vaporizing the resulting precursor to thus simultaneously synthesize the graphene envelope and perform nitrogen doping in a single step. |
| US09947924B2 |
Positive electrode active material for nonaqueous electrolyte secondary batteries, and nonaqueous electrolyte secondary battery
A positive electrode active material for nonaqueous electrolyte secondary batteries, which has high energy density and excellent cycle characteristics. A positive electrode active material for nonaqueous electrolyte secondary batteries of the present invention is represented by general formula LiNixCoyM(1-x-y)O2(wherein M represents at least one element selected from among metal elements, 0.3≤x<1.0 and 0 |
| US09947915B2 |
Lithium manganese secondary battery
Disclosed is a manganese-based lithium secondary battery comprising a cathode containing manganese-based lithium metal oxide, an anode, and an electrolyte, wherein the anode comprises an anode active material in which a Mn scavenger capable of reducing manganese ions on a surface by conducting or semiconducting properties is coated on part or all of anode active material particles. Through the use of the Mn scavenger, manganese ion dissolved from the manganese-based cathode active material into the electrolyte is preferentially deposited on the Mn scavenger coated on the surface of the anode active material particles, such that the dissolved manganese ion is inhibited from being deposited directly on the surface of the anode active material, and a decomposition of the electrolyte with the deposited manganese component is inhibited. Accordingly, the use of the Mn scavenger can provide a manganese-based lithium secondary battery having excellent storage performance. |
| US09947914B2 |
Battery clamp cleaning device
A battery pack unit is disclosed that includes an abrasive material or surface in a location where battery clamps of the battery pack unit are placed for storage. This provides for a surface where the battery clamps can be frictionally cleaned to remove unwanted corrosion or deposits from the battery clamps. This allows the cleaned battery clamps to be connected to terminals of a battery without experiencing a significant reduction in flow of current between the battery clamps and the terminals of the battery. |
| US09947908B2 |
Vent housing for advanced batteries
A system includes a vent housing configured to be installed on a lower housing of a battery module at a first side of the vent housing. The vent housing has a main body having an opening on a second side of the vent housing and an internal chamber coupled to the opening. The internal chamber includes a first wall having an internal burst vent configured to open at a first pressure threshold and a second wall having a ventilation vent comprising a gas-selective permeability layer. |
| US09947906B2 |
Device for securing a battery
An electronic device includes a front case including a first battery slot that detachably receives a battery, and a first protruding part protruded from a first sidewall of the first battery slot, wherein the first protruding part is disposed at a predetermined height from a bottom surface of the first battery slot. |
| US09947903B2 |
Method of manufacturing a display device including a light emitting structure having different optical resonance distances in sub-pixel regions thereof
A light emitting structure includes a first hole injection layer, a first organic light emitting layer, a charge generation layer, a second hole injection layer, a second organic light emitting layer, an electron transfer layer, and a blocking member. The light emitting structure has first, second, and third sub-pixel regions. The first organic light emitting layer may be on the first hole injection layer. The charge generation layer may be on the first organic light emitting layer. The second hole injection layer may be on the charge generation layer. The second organic light emitting layer may be on the second hole injection layer. The electron transfer layer may be on the second organic light emitting layer. The blocking member may be at at least one of the first to the third sub-pixel regions. |
| US09947900B2 |
Organic electroluminescence device and method for manufacturing organic electroluminescence device
An organic EL device according to the present invention includes: a first structure section; and a second structure section. The first structure section includes: a recess; a reflection layer provided along an inner surface of the recess; a filling layer filled at an inner side of the recess via the reflection layer; a first electrode; an organic layer including a light-emitting layer; and a second electrode. The second structure section includes: a reflection layer provided on a flat surface of the base material; a first electrode; an organic layer including a light-emitting layer; and a second electrode. |
| US09947897B2 |
Method of manufacturing display device
A substrate including a light-emitting element and a terminal for connection to the outside is prepared. The light-emitting element includes a light-emitting layer, an anode, and a cathode. The anode and the cathode interpose the light-emitting layer therebetween. A sealing layer is formed on the substrate so as to cover the light-emitting element and the terminal. An amorphous carbon film is formed on the sealing layer so as to cover a region above the light-emitting element and avoid a region above the terminal. The sealing layer is dry-etched so as to expose the terminal from the sealing layer using the amorphous carbon film as a mask. The amorphous carbon film is removed. |
| US09947896B2 |
Display device
A display device includes: pixel electrodes corresponding to pixels; an insulating layer provided so as to overlie peripheral edge portions of the pixel electrodes; a light-emitting layer provided so as to be stacked on and in contact with each of the pixel electrodes; a first common electrode stacked on the light-emitting layer so as to be in contact therewith and provided so as to overlie the insulating layer; a light transmissive layer stacked on the first common electrode above the pixel electrodes, the light transmissive layer avoiding stacking thereof on the first common electrode above the insulating layer; and a second common electrode stacked on the light transmissive layer above the pixel electrodes and stacked on the first common electrode so as to be in contact therewith above the insulating layer. |
| US09947895B2 |
Flexible AMOLED display
A flexible AMOLED display is disclosed including an OLED stack having an anode layer, a cathode layer and an organic light emitting layer between the anode layer and the cathode layer. A backplane includes a substrate, a plurality of bus lines, and a thin film transistor array. A permeation barrier layer is positioned between the OLED stack and the backplane, and a plurality of vias connect the OLED anode layer to the backplane thin film transistor array. In one embodiment, a neutral plane of the AMOLED display crosses the permeation barrier. In one embodiment, the thickness of at least a portion of the bus lines is greater than the thickness of the cathode layer. A method of increasing the flexibility of an AMOLED display is disclosed. A method of assembling a flexible AMOLED display under a processing temperature of less than 200 degrees Celsius is also disclosed. |
| US09947887B2 |
Display unit, method of manufacturing display unit, and electronic apparatus
A display unit includes: an organic light emitting element including a first electrode, an organic layer, and a second electrode in order, the organic layer including a conductive layer; and an auxiliary electrode configured to be electrically connected to the second electrode via the conductive layer in the organic layer. |
| US09947886B2 |
Quantum dot light emitting diode, display apparatus and its manufacturing method
A quantum dot light emitting diode, a display apparatus, and a manufacturing method are provided. The manufacturing method includes forming a first electrode, a first functional layer, a buffer layer, a quantum dot layer, a second functional layer and a second electrode on a base substrate sequentially, wherein the first functional layer is made from organic material, a material for the buffer layer includes a polar organic solvent, and forming the quantum dot layer includes forming a solution including quantum dots and a non-polar organic solvent above the buffer layer using inkjet printing method, the non-polar organic solvent and the polar organic solvent are capable of dissolving each other; and removing the polar organic solvent and the non-polar organic solvent to form the quantum dot layer. |
| US09947885B2 |
Light-emitting element
To provide a light-emitting element which uses a fluorescent material as a light-emitting substance and has higher luminous efficiency. To provide a light-emitting element which includes a mixture of a thermally activated delayed fluorescent substance and a fluorescent material. By making the emission spectrum of the thermally activated delayed fluorescent substance overlap with an absorption band on the longest wavelength side in absorption by the fluorescent material in an S1 level of the fluorescent material, energy at an S1 level of the thermally activated delayed fluorescent substance can be transferred to the S1 of the fluorescent material. Alternatively, it is also possible that the S1 of the thermally activated delayed fluorescent substance is generated from part of the energy of a T1 level of the thermally activated delayed fluorescent substance, and is transferred to the S1 of the fluorescent material. |
| US09947884B1 |
Solar active powder for fusion powder coating
A fusion coating powder useful in forming a coating by fusion of the powder comprising a solar active or a photovoltaic pigment in combination with a resin including a conductive resin and a device for generating electric energy from solar or photo illumination comprising an electrode, a first powder coated layer of an absorptive pigment and a resin, a second powder coated layer of the aforementioned solar active powder, and a protective layer. |
| US09947880B2 |
Organic electroluminescent materials and devices
Novel phosphorescent tetradentate platinum (II) compounds comprising a twisted aryl group are provided. Also provided are novel phosphorescent tetradentate platinum (II) compounds comprising an imidazo[1,2-f]phenanthridine moiety. The compounds may be used in organic light emitting devices to provide improved device efficiency, line shape and lifetime. |
| US09947877B2 |
Organic light emitting display device
An organic light emitting display device is discussed. The organic light emitting display device in one embodiment includes at least one light emitting part between an anode and a cathode, and including at least one organic layer and a light emitting layer, wherein the organic layer includes a compound having one or more nitrogen atoms and a substituent with relatively high electron mobility. |
| US09947874B2 |
Materials for organic electroluminescent devices
The present invention relates to compounds of the formula (1) which are suitable for use in electronic devices, in particular organic electroluminescent devices, and to electronic devices which comprise these compounds. |
| US09947872B2 |
Hole transport materials
There is disclosed a compound having Formula I In Formula I: Ar1 and Ar3 are the same or different and are aryl groups; Ar2 and Ar4 are the same or different and are aryl groups; L is the same or different at each occurrence and can be H, D, halogen, aryl, arylamino, crosslinkable groups, deuterated aryl, deuterated arylamino, or deuterated crosslinkable groups; R1-R4 are the same or different and can be H, D, alkyl, alkoxy, aryl, aryloxy, silyl, deuterated alkyl, deuterated alkoxy, deuterated aryl, deuterated aryloxy, or deuterated silyl; R5-R8 are the same or different and can be D, F, alkyl, aryl, alkoxy, aryloxy, silyl, crosslinkable groups, deuterated alkyl, deuterated alkoxy, deuterated aryl, deuterated aryloxy, or deuterated silyl, where adjacent R5-R8 groups can be joined together to form an aromatic ring; a and b are the same or different and are an integer from 0-3; c and d are the same or different at each occurrence and are an integer from 0-4; m and q are the same or different and are an integer from 1-6; and n is an integer greater than 0. |
| US09947866B2 |
Nonvolatile memory device manufacturing method
A method of manufacturing a nonvolatile memory device includes sequentially forming, on a first wiring layer extending in a first direction, a first layer containing a first metal and a second layer containing a second metal into which the first metal can diffuse. The method further includes oxidizing the first layer and the second layer, removing oxygen from the oxidized first layer by annealing, forming a conductive third layer on the oxidized second layer after removing oxygen from the oxidized first layer, and forming a second wiring layer on the third layer. The second wiring layer extends in a second direction crossing the first wiring layer. |
| US09947865B2 |
Magnetoresistive stack and method of fabricating same
A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor. |
| US09947861B2 |
High performance microwave dielectric systems and methods
Loss tangents in microwave dielectric materials may be modified (increased and/or reduced), particularly at cryogenic temperatures, via application of external magnetic fields. Exemplary electrical devices, such as resonators, filters, amplifiers, mixers, and photonic detectors, configured with dielectric components having applied magnetic fields may achieve improvements in quality factor and/or modifications in loss tangent exceeding two orders of magnitude. |
| US09947856B2 |
High fidelity and high efficiency qubit readout scheme
A technique relates to a qubit readout system. A cavity-qubit system has a qubit and a readout resonator and outputs a readout signal. A lossless superconducting circulator is configured to receive the microwave readout signal from the cavity-qubit system and transmit the microwave readout signal according to a rotation. A quantum limited directional amplifier amplifies the readout signal. A directional coupler is connected to and biases the amplifier to set a working point. A microwave bandpass filter transmits in a microwave frequency band by passing the readout signal while blocking electromagnetic radiation outside of the microwave frequency band. A low-loss infrared filter has a distributed Bragg reflector integrated into a transmission line. The low-loss filter is configured to block infrared electromagnetic radiation while passing the microwave readout signal. The low-loss infrared filter is connected to the microwave bandpass filter to receive input of the microwave readout signal. |
| US09947854B2 |
Thermoelectric module, and heat conversion apparatus comprising the same
The embodiments of the present invention relate to a thermoelectric element and a thermoelectric module used for cooling, and the thermoelectric module can be made thin by having a first substrate and a second substrate with different surface areas to raise the heat-dissipation effectiveness. |
| US09947853B2 |
Thermoelectric device
A thermoelectric device for transferring heat from a heat source to a heat sink includes at least one thermoelectric leg pair having a first leg including an n-type semiconductor material and a second leg including a p-type semiconductor material. The first leg and the second leg are electrically coupled in series. A resistive element electrically couples the first leg and the second leg between the heat source and the heat sink. |
| US09947842B2 |
Manufacturing method for quantum dot color film substrate and quantum dot color film substrate
The present disclosure provides a method for manufacturing quantum dot color film substrate and quantum dot color film substrate. The method is to form a quantum dot adhesive by mixing a red quantum dot material, a green quantum dot material and a photoinitiator in a thermosetting adhesive. The photoinitiator itself does not destroy fluorescence properties of quantum dot, but the photoinitiator is cleaved and can quenching the fluorescence of quantum dot after UV irradiation. A selective quenching quantum dot layer is obtained after coating a quantum dot adhesive uniformly on a color filter layer, and the light mask is used to irradiate the quantum dot adhesive on the blue sub-pixel region. Free radicals are generated by cleaving photoinitiator and are quenching the quantum dot material directly; the method is capable of meeting requirement of high gamut, simple preparation process and low cost. |
| US09947834B2 |
Light emitting element and light emitting element package
A light emitting element includes: a substrate; a first conductive type semiconductor layer stacked on the substrate; a light emitting layer stacked on the first conductive type semiconductor layer; a second conductive type semiconductor layer stacked on the light emitting layer; an ITO layer stacked on the second conductive type semiconductor layer; and a reflective layer stacked on the ITO layer. The substrate is transparent to an emission wavelength of the light emitting layer, and the reflective layer includes a Ti-containing first layer stacked on the ITO layer to make contact with the ITO layer and an Al-containing second layer stacked on the first layer in an opposite side to the ITO layer. |
| US09947830B2 |
Patterned sapphire substrate and light emitting diode
A patterned sapphire substrate has a first surface and a second surface opposite to each other; the connection zone between first protrusion portions has no C surface (i.e. (0001) surface); and the patterned sapphire substrate may have no C surface on the growth surface to reduce the threading dislocation density of the GaN epitaxial material on the sapphire substrate. |
| US09947829B2 |
Substrate with buffer layer for oriented nanowire growth
The present invention provides a substrate (1) with a bulk layer (3) and a buffer layer (4) having a thickness of less than 2 μm arranged on the bulk layer (3) for growth of a multitude of nanowires (2) oriented in the same direction on a surface (5) of the buffer layer (4). A nanowire structure, a nanowire light emitting diode comprising the substrate (1) and a production method for fabricating the nanowire structure is also provided. The production method utilizes non-epitaxial methods for forming the buffer layer (4). |
| US09947824B1 |
Solar cell employing nanocrystalline superlattice material and amorphous structure and method of constructing the same
A solar cell employing nanocrystalline superlattice material and amorphous structure and method of constructing the same provides improved efficiency when converting sunlight to power. The photovoltaic (PV) solar cell includes an intrinsic superlattice material deposited between the p-doped layer and the n-doped layer. The superlattice material is comprised of a plurality of sublayers which effectively create a graded band gap and multi-band gap for the superlattice material. The sublayers can include a nanocrystalline Si:H layer, an amorphous SiGe:H layer and an amorphous SiC:H layer. Varying the thickness of each layer results in an effective energy gap that is graded as desired for improved efficiency. Methods of constructing single junction and parallel configured two junction solar cells include depositing the various layers on a substrate such as stainless steel or glass. |
| US09947815B2 |
Thin film plasmonic solar cell
A plasmonic scattering nanomaterial comprising a substrate layer, a metal oxide layer in continuous contact with the substrate layer and silver nanoparticles with a diameter of 25-300 nm deposited on the metal oxide layer is disclosed. The silver nanoparticles have a broad size distribution and interparticle distances such that the silver nanoparticles plasmonically scatter light throughout the metal oxide layer with a near electric field strength of 1-30 V/m when excited by a light source having a wavelength in the range of 300-500 nm and/or 1000-1200 nm. In addition, a method for producing the nanomaterial by sputter deposition is disclosed as well as an appropriate thin film plasmonic solar cell comprising the nanomaterial with a solar efficiency of at least 10%. |
| US09947809B2 |
Conductive paste and electronic device and solar cell including an electrode formed using the conductive paste
A conductive paste includes a conductive powder, a metallic glass having a glass transition temperature of less than or equal to about 600° C. and a supercooled liquid region of greater than or equal to 0 K, and an organic vehicle, and an electronic device and a solar cell include an electrode formed using the conductive paste. |
| US09947808B2 |
CIGS compound solar cell
In order to provide a CIGS compound solar cell with a high conversion efficiency, a CIGS compound solar cell including a rear electrode layer, a CIGS light absorbing layer, a buffer layer, and a transparent electrode layer in this order over a substrate is configured such that the buffer layer comprises a mixed crystal of a Group IIa metal and zinc oxide, and characteristics of the mixed crystal as shown by X-ray diffraction satisfy the following formula (1): 0.5≤A/(A+B+C)<1 (1) (where none of A, B, C are 0) A: peak intensity at plane (002) B: peak intensity at plane (100) C: peak intensity at plane (101). |
| US09947807B2 |
Solar module with wireless power transfer
A solar module includes a solar panel and a wireless power transmission module coupled to the solar panel for transmitting power generated by the solar panel wirelessly. |
| US09947803B2 |
Amorphous oxide and thin film transistor
The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018/cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6, a drain electrode 5, a gate electrode 4, a gate insulating film 3, and a channel layer 2, an amorphous oxide having an electron carrier concentration less than 1018/cm3 is used in the channel layer 2. |
| US09947802B2 |
Manufacturing method of semiconductor device, manufacturing method of electronic appliance, semiconductor device, display device, memory device, and electronic appliance
A semiconductor device is manufactured by forming an oxide layer, forming an insulating layer and a sacrificial layer over the oxide layer, forming a conductive layer over the insulating layer and the sacrificial layer, and performing heat treatment after the formation of the conductive layer so that a first mixed layer is formed in a region of the oxide layer that is in contact with the conductive layer and a second mixed layer is formed in a region of the sacrificial layer that is in contact with the conductive layer. The first mixed layer includes at least one of elements included in the conductive layer. The second mixed layer includes at least one of elements included in the conductive layer. The resistance value of the first mixed layer is smaller than that of the oxide layer. |
| US09947801B2 |
Transistor and semiconductor device
A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor. |
| US09947799B2 |
Semiconductor device
An object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. In a transistor including an oxide semiconductor film, the oxide semiconductor film is subjected to dehydration or dehydrogenation performed by heat treatment. In addition, as a gate insulating film in contact with the oxide semiconductor film, an insulating film containing oxygen, preferably, a gate insulating film including a region containing oxygen with a higher proportion than the stoichiometric composition is used. Thus, oxygen is supplied from the gate insulating film to the oxide semiconductor film. Further, a metal oxide film is used as part of the gate insulating film, whereby reincorporation of an impurity such as hydrogen or water into the oxide semiconductor is suppressed. |
| US09947795B2 |
Thin-film transistor
According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region. |
| US09947794B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device that operates at high speed. A semiconductor device with favorable switching characteristics. A highly integrated semiconductor device. A miniaturized semiconductor device. The semiconductor device is formed by: fainting a semiconductor film including an opening, on an insulating surface; forming a conductive film over the semiconductor film and in the opening, and removing the conductive film over the semiconductor film to form a conductive pillar in the opening; forming an island-shaped mask over the conductive pillar and the semiconductor film; etching the conductive pillar and the semiconductor film using the mask to form a first electrode and a first semiconductor; forming a gate insulating film on a top surface and a side surface of the first semiconductor; and forming a gate electrode that is in contact with a top surface of the gate insulating film and faces the top surface and the side surface of the first semiconductor. |
| US09947791B2 |
FinFET with merge-free fins
A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without extending into the first and second source/drain regions. |
| US09947790B2 |
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions
A semiconductor device including a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel region; a gate electrode formed on the channel region with a gate insulating film therebetween; and a stress-introducing layer that applies stress to the channel region, the semiconductor device having a stress distribution in which source region-side and drain region-side peaks are positioned between a pn junction boundary of the channel region and the source region and a pn junction boundary of the channel region and the drain region. |
| US09947788B2 |
Device with diffusion blocking layer in source/drain region
A method includes forming a gate electrode structure above a channel region defined in a semiconductor material. The semiconductor material is recessed in a source/drain region. A first material is epitaxially grown in the source/drain region. The first material includes a dopant species having a first concentration. A diffusion blocking layer is formed in the source/drain region above the first material. A second material is epitaxially grown in the source/drain region above the diffusion blocking layer. The second material comprises the dopant species having a second concentration greater than the first concentration. |
| US09947786B2 |
Semiconductor structure having a junction field effect transistor and a high voltage transistor and method for manufacturing the same
The present examples relate to a junction field effect transistor (JFET) that shares a drain with a high voltage field effect transistor. The present examples are able to control a pinch-off feature of the junction transistor while also maintaining electric features of the high voltage transistor by forming a groove on a lower part of a first conductivity type deep-well region located on a channel region of the junction transistor in a channel width direction. |
| US09947783B2 |
P-channel DEMOS device
A p-channel drain extended metal oxide semiconductor (DEPMOS) device includes a doped surface layer at least one nwell finger defining an nwell length and width direction within the doped surface layer. A first pwell is on one side of the nwell finger including a p+ source and a second pwell is on an opposite side of the nwell finger including a p+ drain. A gate stack defines a channel region of the nwell finger between the source and drain. A field dielectric layer is on a portion of the doped surface layer defining active area boundaries including a first active area having a first active area boundary including a first active area boundary along the width direction (WD boundary). The nwell finger includes a reduced doping finger edge region over a portion of the WD boundary. |
| US09947781B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate, a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer, a gate trench formed in the second semiconductor layer or in the second and first semiconductor layers, a gate electrode formed at the gate trench, and a source electrode and a drain electrode formed on the second semiconductor layer. The gate trench has terminal parts of a bottom of the gate trench formed shallower than a center part of the bottom. A part of a sidewall of the gate trench is formed of a surface including an a-plane. The center part of the bottom is a c-plane. The terminal parts of the bottom form a slope from the c-plane to the a-plane. |
| US09947774B2 |
Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping
A method of forming semiconductor devices that includes forming an oxide that is doped with a punch through dopant on a surface of a first semiconductor material having a first lattice dimension, and diffusing punch through dopant from the oxide into the semiconductor material to provide a punch through stop region. The oxide may then be removed. A second semiconductor material may be formed having a second lattice dimension on the first semiconductor material having the first lattice dimension. A difference between the first lattice dimension and the second lattice dimension forms a strain in the second semiconductor material. A gate structure and source and drain regions are formed on the second semiconductor material. |
| US09947773B2 |
Semiconductor arrangement with substrate isolation
One or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a channel, such as an un-doped channel, over a substrate. The semiconductor arrangement comprises a gate, such as a gate-all-around structure gate, around the channel. The semiconductor arrangement comprises an isolation structure, such as a silicon germanium oxide structure, between the gate and the substrate. The isolation structure blocks current leakage into the substrate. Because the semiconductor arrangement comprises the isolation structure, the channel can be left un-doped, which improves electron mobility and decreases gate capacitance. |
| US09947772B2 |
SOI FinFET transistor with strained channel
Stress is introduced into the channel of an SOI FinFET device by transfer directly from a metal gate. In SOI devices in particular, stress transfer efficiency from the metal gate to the channel is nearly 100%. Either tensile or compressive stress can be applied to the fin channel by choosing different materials to be used in the gate stack as the bulk gate material, a gate liner, or a work function material, or by varying processing parameters during deposition of the gate or work function materials. P-gates and N-gates are therefore formed separately. Gate materials suitable for use as stressors include tungsten (W) for NFETs and titanium nitride (TiN) for PFETs. An optical planarization material assists in patterning the stress-inducing metal gates. A simplified process flow is disclosed in which isolation regions are formed without need for a separate mask layer, and gate sidewall spacers are not used. |
| US09947771B2 |
Thin film transistor and method of fabricating the same
A method of fabricating a thin film transistor includes forming a substrate having first and second regions, a semiconductor layer pattern formed in the first region and the second region, and a first gate insulating layer pattern formed on a channel region of the semiconductor layer pattern of the first region. A second gate insulating layer is formed on the substrate, a first conductive layer pattern is formed above the channel region of the first region and above the semiconductor layer pattern of the second region, and an inter-layer insulating layer is formed on the substrate. A second conductive layer pattern is formed in the first region and above the first conductive layer pattern of the second region. The second conductive layer pattern of the first region is coupled to the semiconductor layer pattern of the first region through the second gate insulating layer and the inter-layer insulating layer. |
| US09947766B2 |
Semiconductor device and fabricating method thereof
A semiconductor device includes a substrate, a source/drain region, an etch stop layer, an oxide layer, an interlayer dielectric layer, and a contact plug. The source/drain region is in the substrate. The etch stop layer is over the source/drain region. The oxide layer is over the etch stop layer. The interlayer dielectric layer is over the oxide layer. The contact plug is electrically connected to the source/drain region through the interlayer dielectric layer, the oxide layer, and the etch stop layer. |
| US09947764B2 |
Dummy gate structure and methods thereof
A structure and method for implementation of dummy gate structures within multi-gate device structures includes a semiconductor device including an isolation region that separates a first and second active region. The first active region is adjacent to a first side of the isolation region and the second active region is adjacent to a second side of the isolation region. A device including a source, a drain, and a gate is formed within the first active region. One of the source and drain regions are disposed adjacent to the isolation region. A dummy gate is formed at least partially over the isolation region and adjacent to the one of the source and drain regions. In various examples, the gate includes a first dielectric layer having a first thickness and the dummy gate includes a second dielectric layer having a second thickness greater than the first thickness. |
| US09947759B1 |
Semiconductor device having milti-height structure and method of manufacturing the same
A semiconductor device having semiconductor device having a multi-height structure is provided. The semiconductor device having a multi-height structure includes a semiconductor substrate. A first structure and a second structure are respectively disposed on the semiconductor substrate and connected to each other. The second structure includes a limiting layer disposed on the upper surface of the semiconductor substrate, a first polysilicon layer disposed conformally on the limiting layer and the semiconductor substrate, and a second polysilicon layer disposed conformally on the first polysilicon layer. A ridge of the second polysilicon layer is disposed near an edge of the second structure beside the first structure, vertically aligned with the limiting layer and defined as a limiting block. A bottom anti-reflection coating (BARC) layer of a low-viscosity material blanketly overlying a top surface of the second structure has an external surface substantially parallel to the top surface of the second structure. |
| US09947758B2 |
Forming silicide regions and resulting MOS devices
A semiconductor device with improved roll-off resistivity and reliability are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a gate electrode overlying the gate dielectric, a gate silicide region on the gate electrode, a source/drain region adjacent the gate dielectric, and a source/drain silicide region on the source/drain region, wherein the source/drain silicide region and the gate silicide region have different metal compositions. |
| US09947757B2 |
Display device, array substrate, and thin film transistor
A method for manufacturing the thin film transistor, including: forming a gate, an active layer and a gate insulating layer disposed between the gate and the active layer; wherein the gate insulating layer is in a double-layer structure comprising a first gate insulating layer next to the gate and a second gate insulating layer next to the active layer, and one of the first gate insulating layer and the second gate insulating layer is annealed. |
| US09947756B2 |
Semiconductor device and manufacturing method thereof
In a method of manufacturing a semiconductor device, a first fin structure for an n-channel fin field effect transistor (FinFET) is formed over a substrate. An isolation insulating layer is formed over the substrate such that an upper portion of the first fin structure protrudes from the isolation insulating layer. A gate structure is formed over a part of the upper portion of the first fin structure. A first source/drain (S/D) epitaxial layer is formed over the first fin structure not covered by the gate structure. A cap epitaxial layer is formed over the first S/D epitaxial layer. The first S/D epitaxial layer includes SiP, and the cap epitaxial layer includes SiC with a carbon concentration is in a range from 0.5 atomic % to 5 atomic %. |
| US09947755B2 |
III-V MOSFET with self-aligned diffusion barrier
A method is presented for forming a diffusion barrier in a field effect transistor with a source. A raised source is formed at least partially on the source with the raised source including III-V material. An interfacial layer is formed at least partially on the raised source with the interfacial layer including silicon or germanium. A metal layer is formed at least partially on the interfacial layer with the metal layer including transition metal. The diffusion barrier is formed at least partially on the raised source with the diffusion barrier layer including transition metal from the metal layer bonded to silicon or germanium from the interfacial layer. Similar processing forms a corresponding diffusion barrier on a raised drain. |
| US09947753B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a semiconductor substrate, at least one dielectric layer, a dielectric spacer liner (DSL) layer, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The dielectric layer has at least one contact hole exposing at least a portion of the semiconductor substrate. The semiconductor substrate has at least one recess communicating with the contact hole. The recess has a bottom surface and at least one sidewall. The DSL layer is present on at least the sidewall of the recess. The conductor is present at least partially in the contact hole and is electrically connected to the semiconductor substrate. |
| US09947743B2 |
Structures and methods for long-channel devices in nanosheet technology
Techniques for providing supporting structures for suspended nanosheets/wires in long-channel devices are provided. In one aspect, a method of forming a device structure includes: forming a series of alternating active and sacrificial layers as a stack on a substrate; patterning at least one feature through each of the active and sacrificial layers in the stack; filling the feature with a fill material that is resistant to etching performed on the sacrificial layers; and etching the sacrificial layers to selectively remove at least a portion of each of the sacrificial layers from the stack thereby suspending the active layers, wherein following the etching the fill material remains as a structure supporting the suspended active layers. Transistor devices and methods for formation thereof are also provided. |
| US09947741B2 |
Field-effect semiconductor device having pillar regions of different conductivity type arranged in an active area
In a field-effect semiconductor device, alternating first n-type and p-type pillar regions are arranged in the active area. The first n-type pillar regions are in Ohmic contact with the drain metallization. The first p-type pillar regions are in Ohmic contact with the source metallization. An integrated dopant concentration of the first n-type pillar regions substantially matches that of the first p-type pillar regions. A second p-type pillar region is in Ohmic contact with the source metallization, arranged in the peripheral area and has an integrated dopant concentration smaller than that of the first p-type pillar regions divided by a number of the first p-type pillar regions. A second n-type pillar region is arranged between the second p-type pillar region and the first p-type pillar regions, and has an integrated dopant concentration smaller than that of the first n-type pillar regions divided by a number of the first n-type pillar regions. |
| US09947739B2 |
Display device array substrate without frame
An array substrate and a display device are provided. The array substrate includes: a gate driving circuit, no pixel electrode layer being provided on a position of the array substrate corresponding to the gate driving circuit, the array substrate being made of a flexible material, wherein, the gate driving circuit is disposed on a position of a central axis of the array substrate and extends along a direction of the central axis; the gate driving circuit is configured for providing a driving signal to a gate line of the array substrate. |
| US09947738B2 |
Display panel including multilayer wiring and member for reducing probability of power line mis-pressing during manufacturing process, and manufacturing method for the same
A display panel including: a substrate; a multi-layer wiring layer disposed over the substrate and including a first power line and a second power line; organic electroluminescence elements over the multi-layer wiring layer; a partition wall over the multi-layer wiring layer; and a member over the multi-layer wiring layer, a height of the member from the substrate being greater than a height of the partition wall from the substrate, wherein the multi-layer wiring layer includes a first portion and a second portion, the organic electroluminescence elements are arrayed on the first portion, in the second portion, the first power line and the second power line intersect, and the member is positioned on the second portion without overlapping at least one of the first power line and the second power line in plan view of the substrate. |
| US09947734B2 |
Organic light emitting display device
A display device may include a substrate, a first light emitting structure, a second light emitting structure, and a support structure. The first light emitting structure may include an electrode and a light emitting layer. A face of the electrode may directly contact the light emitting layer and may overlap the substrate. The support structure may be positioned between the first light emitting structure and the second light emitting structure, may be spaced from each of the first light emitting structure and the second light emitting structure, may overlap a transparent portion of the substrate, and may not include or directly contact any light emitting layer. A height of the support structure relative to the substrate may be greater than at least one of a height of the face of the electrode relative to the substrate and a height of the light emitting layer relative to the substrate. |
| US09947733B2 |
Organic light emitting display device having cathode electrode connected with an auxiliary electrode via a gap space between the first and second banks
An organic light emitting display device can include a substrate; an anode electrode on the substrate; an organic emitting layer on the anode electrode; a cathode electrode on the organic emitting layer; an auxiliary electrode connected with the cathode electrode; a first bank on an upper surface of the auxiliary electrode; and a second bank disposed between the auxiliary electrode and the anode electrode, in which the second bank is formed of a same material as the first bank, and the first and second banks are spaced apart from each other, and a width of an upper surface of the first bank is larger than a width of a lower surface of the first bank, and the cathode electrode is connected with the auxiliary electrode via a gap space between the first bank and the second bank. |
| US09947731B2 |
Organic Light-emitting display substrate, manufacturing method thereof and display device
Disclosed is an organic light-emitting display substrate, including a substrate and a pixel defining layer on the substrate which includes a plurality of dams crisscrossing in a display area of the substrate to define a plurality of pixel units and define the boundary of the display area, wherein the pixel defining layer further includes a groove arranged on a top surface of each dam, the grooves at least define one frame-shaped area, at least one pixel unit is arranged in each frame-shaped area, and the grooves are used for accommodating a solvent when forming an organic light-emitting element by inkjet printing. Also disclosed is a manufacturing method of an organic light-emitting display substrate and a display device. The present invention can improve the film forming effect of a film layer formed on the substrate, so that the brightness of a display image of the display device is more uniform. |
| US09947730B2 |
Flexible display device and method for packaging the same
The present disclosure provides a flexible display device and a method for packaging the same. The flexible display device includes a light-emitting component and a packaging layer for packaging the light-emitting component. The packaging layer includes a patterned first film layer with patterned gaps, and a second film layer at least covering the patterned gaps in the first film layer. |
| US09947717B2 |
Light-emitting device having light-emitting elements and electrode spaced apart from the light emitting element
A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply. |
| US09947716B2 |
Chip package and manufacturing method thereof
A chip package includes a chip, an adhesive layer, and a dam element. The chip has a sensing area, a first surface, and a second surface that is opposite to the first surface. The sensing area is located on the first surface. The adhesive layer covers the first surface of the chip. The dam element is located on the adhesive layer and surrounds the sensing area. The thickness of the dam element is in a range from 20 μm to 750 μm, and the wall surface of the dam element surrounding the sensing area is a rough surface. |
| US09947711B2 |
Semiconductor device with surface integrated focusing element and method of producing a semiconductor device with focusing element
The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material. |
| US09947710B2 |
Semiconductor device, solid-state imaging device with tantalum oxide layer formed by diffusing a material of an electrode of necessity or a counter electrode
A semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes. |
| US09947709B2 |
CMOS image sensor and fabrication method thereof
A method to form a stacked CMOS image sensor includes forming a signal processing layer including a plurality of discrete signal processing circuit, an image sensor layer including a plurality of discrete image sensing units, and an intermediate capacitor layer including a dielectric layer and a plurality of capacitors. Each capacitor includes a first electrode, a V-shaped or U-shaped first electrode material layer electrically connecting to the first electrode, a second electrode material layer on the first electrode material layer having the dielectric layer there-between, and a second electrode electrically connecting to the second electrode material layer. The method further includes bonding the signal processing layer to the intermediate capacitor layer with each second electrode electrically connected to a signal processing circuit, and bonding the image sensor layer to the intermediate capacitor layer with each first electrode electrically connected to an image sensing unit. |
| US09947708B2 |
Semiconductor device and manufacturing method of the same
A semiconductor device includes a plurality of wirings (WR11) which are formed in the same layer above a semiconductor substrate, and a plurality of wirings (WR12) which are formed in the same layer as that of the plurality of wirings (WR11). The plurality of wirings (WR11) are extended in an X axis direction and arranged at a pitch (PT11) in a Y axis direction intersecting with the X axis direction when seen in a plan view, and the plurality of wirings (WR12) are extended in the X axis direction and arranged at a pitch (PT12) in the Y axis direction when seen in a plan view. The plurality of wirings (WR11) are electrically connected to the plurality of wirings (WR12), and the pitch (PT11) is smaller than the pitch (PT12). |
| US09947707B2 |
Image sensor and manufacturing method thereof
An image sensor includes a semiconductor layer, a plurality of light sensing regions, a first pixel isolation layer, a light shielding layer, and a wiring layer. The semiconductor layer has a first surface and a second surface opposite to the first surface. The plurality of light sensing regions is formed in the semiconductor layer. The first pixel isolation layer is disposed between adjacent light sensing regions from among the plurality of light sensing regions. The first pixel isolation layer is buried in an isolation trench formed between the first surface and the second surface. The light shielding layer is formed on the second surface of the semiconductor layer and on some of the adjacent light sensing regions. The wiring layer is formed on the first surface of the semiconductor layer. |
| US09947706B2 |
Semiconductor device having a light receiving element
Provided is a semiconductor device having a light receiving element in which a plurality of photodiodes are formed on a top surface of a P-type semiconductor substrate, an insulating oxide film is formed on surfaces of the photodiodes 51 via a buried oxide film, and an SOI layer of single crystal silicon is formed between a photodiode and an adjacent photodiode via the buried oxide film for shielding unnecessary light. |
| US09947704B1 |
Method of recovery of MOTFT backplane after a-Si photodiode fabrication
A method of fabricating a structure including a high mobility backplane and a-Si photodiode imager includes forming a matrix of metal oxide thin film transistors on the surface of a rigid support member, depositing a planarizing layer on the matrix of transistors that is either porous or permissive/diffusive to oxygen at temperatures below approximately 200° C., and fabricating a matrix of passivated a-Si photodiodes over the matrix of transistors and electrically connected one each photodiode to each of the transistors. A continuous path is provided through the planarizing layer from the exterior of the structure to each of the transistors and the structure is annealed at a temperature below 200° C. in an oxygen ambient to move oxygen from the oxygen ambient to an active layer of each of the transistors and repair loss of oxygen damage to the transistors caused by the fabrication of the passivated a-Si photodiodes. |
| US09947703B2 |
Solid-state imaging device, method of manufacturing the same, and electronic apparatus
The present disclosure relates to a solid-state imaging device that can be made smaller in size, a method of manufacturing the solid-state imaging device, and an electronic apparatus.The solid-state imaging device includes a photoelectric conversion film that performs photoelectric conversion of light emitted from the back surface side of the semiconductor substrate. Also, in each pixel, a charge accumulation layer is formed to be in contact with the photoelectric conversion film on the back surface of the semiconductor substrate, a transfer path unit is formed to extend from the charge accumulation layer to a point near the front surface of the semiconductor substrate, and a memory unit is disposed near the back surface side of the semiconductor substrate, with a charge transfer gate being interposed between the memory unit and the transfer path unit. Then, the photoelectric conversion film is formed by stacking a layer formed with a material having a great light blocking effect on the back surface of the semiconductor substrate. The present technology can be applied to back-illuminated CMOS image sensors in global shutter mode. |
| US09947702B2 |
Solid-state imaging apparatus, method for manufacturing the same, and imaging system
A solid-state imaging apparatus, comprising a first semiconductor region of a first conductivity type provided on a substrate by an epitaxial growth method, a second semiconductor region of the first conductivity type provided on the first semiconductor region, and a third semiconductor region of a second conductivity type provided in the second semiconductor region so as to form a pn junction with the second semiconductor region, wherein the first semiconductor region is formed such that an impurity concentration decreases from a side of the substrate to a side of the third semiconductor region, and an impurity concentration distribution in the second semiconductor region is formed by an ion implantation method. |
| US09947700B2 |
Imaging device and electronic device
A three-dimensionally integrated imaging device is provided. The imaging device includes a first layer that includes a first transistor including a metal oxide in a channel formation region, a first insulating layer, and a second insulating layer, and a second layer that includes a photodiode. A conductive layer in contact with the metal oxide is electrically connected to one of a cathode and an anode of the photodiode via a conductor that penetrates the first insulating layer and the second insulating layer. |
| US09947698B2 |
Manufacture method of oxide semiconductor TFT substrate and structure thereof
The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof. The method continuously forms the gate isolation layer (3), the oxide semiconductor layer (4′) and the etching stopper layer (5′), and implements pattern process to the oxide semiconductor layer (4′) and the etching stopper layer (5′) with one halftone mask or a slit diffraction mask to first form an island shaped oxide semiconductor layer (4) and an island shaped etching stopper layer (5) which are stacked up, and then to form blind holes (54) respectively at two sides of the island shaped oxide semiconductor layer (4) and the island shaped etching stopper layer (5); and a depth of the blind hole (54) is larger than a thickness of the island shaped etching stopper layer (5), and smaller than a thickness sum of the island shaped etching stopper layer (5) and the island shaped oxide semiconductor layer (4) and the contact area of the source/the drain of the TFT with the oxide semiconductor layer (4) is enlarged to reduce the contact resistance and raise the on state current of the TFT. |
| US09947693B2 |
Array substrate, method for manufacturing the same, and display device
The present disclosure provides an array substrate, a method for manufacturing the same, and a display device relating to the technical field of the array substrate. The array substrate includes a base, a plurality of leads and a plurality of inclined supporting surfaces, wherein the inclined supporting surfaces are strip-like and are inclined relative to the base, and a length direction of each of the inclined supporting surfaces is parallel to the base; and at least a part of the leads are inclined leads, and at least a part of each of the inclined leads is arranged on the corresponding inclined supporting surface and extends in the length direction of the inclined supporting surface. |
| US09947686B2 |
Semiconductor device including a stack having a sidewall with recessed and protruding portions
A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction. |
| US09947685B2 |
3D non-volatile memory array utilizing metal ion source
According to one embodiment, a semiconductor memory device includes a semiconductor layer, a plurality of conductive layers, a plurality of insulating layers, an intermediate layer, and a controller. The conductive layers and the insulating layers are alternately provided. The intermediate layer is provided between the plurality of conductive layers and the semiconductor layer. The controller is configured to perform first and second operations. In first operation, the controller applies a first voltage to the semiconductor layer, applies a second voltage higher than the first voltage to a first conductive layer, and applies a third voltage to other conductive layers. In the second operation, the controller applies a fourth voltage to the semiconductor layer, applies a fifth voltage to the first conductive layer, and applies a sixth voltage to the other conductive layers. |
| US09947684B2 |
Three-dimensional semiconductor device
A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall. |
| US09947683B2 |
Three-dimensional semiconductor memory device and method for manufacturing the same
According to one embodiment, a semiconductor memory device includes a structural body, first to fourth pillars, a first interconnection, a second interconnection, a third interconnection, and a fourth interconnection. The first to fourth pillars are provided within the structural body extending along the first direction. A first distance between the first pillar and the first interconnection is greater than a second distance between the third pillar and the third interconnection. The first distance is greater than a third distance between the fourth pillar and the fourth interconnection. A fourth distance between the second pillar and the second interconnection is greater than the second distance. The fourth distance is greater than the third distance. |
| US09947681B2 |
Semiconductor device and method for manufacturing same
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body. |
| US09947677B1 |
High-density EEPROM arrays having parallel-connected common-floating-gate NFET and PFET as memory cell
A memory array includes an N×M array of memory cells, each memory cell having a first transistor connected to a first terminal and a second transistor connected in parallel to the first transistor and a second terminal, where the first and second transistors share a common floating gate and a common output node. Each memory cell further includes an access transistor connected in series to the common output node and a low voltage terminal, the access transistor configured to trigger hot-carrier injection to the common floating gate to change a voltage of the common floating gate. The first transistor is an n-type transistor and the second transistor is a p-type transistor. |
| US09947668B2 |
Semiconductor devices and methods of forming the same
Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region. |
| US09947667B2 |
Semiconductor device having buried gate structure and method for manufacturing the same, memory cell having the same and electronic device having the same
A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer. |
| US09947665B2 |
Semiconductor structure having dielectric layer and conductive strip
A semiconductor structure is provided. The semiconductor structure includes a conductive strip, a conductive layer, a first dielectric layer, and a second dielectric layer. The first dielectric layer is between the conductive strip and the conductive layer arranged in a crisscross manner. The second dielectric layer is different from the first dielectric layer. The second dielectric layer and the first dielectric layer are adjoined with the conductive strip in different positions on the same sidewall of the conductive strip. |
| US09947663B2 |
FinFET CMOS with silicon fin N-channel FET and silicon germanium fin P-channel FET
A substrate having a silicon region and a silicon germanium region is provided. A first set of fins in the silicon region and a second set of fins in the silicon germanium region is etched into the substrate. A set of protective caps on upper portions of the first and second sets of fins. A lower portion of each of the first and second sets of fins is oxidized. The silicon germanium portion of the lower portion of fin in the second set of fins is completely oxidized. The lower portion of the first set of fins is partially oxidized. A punchthrough stop isolation region is formed in the lower portion of the first set of fins. Another aspect of the invention is a device which is created by the method. |
| US09947655B2 |
3D bonded semiconductor structure with an embedded capacitor
A first semiconductor structure including a first bonding oxide layer having a first metallic structure embedded therein and a second semiconductor structure including a second bonding oxide layer having second metallic structure embedded therein are provided. A high-k dielectric material is formed on a surface of the first metallic structure. A nitride surface treatment process is performed to provide a nitrided surface layer to each structure. The nitrided surface layer includes nitridized oxide regions located in an upper portion of the bonding oxide layers and either a nitridized high-k dielectric material located in at least an upper portion of the high k dielectric material or a nitridized metallic region located in an upper portion of the second metallic structure. The nitrogen within the nitridized metallic region is then selectively removed to restore the upper portion of the second metallic structure to its original composition. Bonding is then performed. |
| US09947652B2 |
Display device
A structure of connecting a panel driver to a side of a display panel and an electrostatic discharge (ESD) structure are discussed. The display device comprises a display panel including an active area where an image is displayed and a pad area corresponding to a non-display area, the display device comprising a first substrate and a second substrate which face each other and are bonded to each other to constitute the display panel. A signal pad is arranged on the first substrate, and a connection electrode is connected with one side of the signal pad. A flexible circuit film connected with the connection electrode is arranged. In this case, the signal pad includes a plurality of lines arranged by interposing an insulating film therebetween, wherein the plurality of lines are electrically connected with each other. |
| US09947648B2 |
Semiconductor device including a diode at least partly arranged in a trench
A semiconductor device includes a semiconductor body including a first trench extending into the semiconductor body from a first surface and a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench. The other one of the anode region and the cathode region includes a first semiconductor region directly adjoining the one of the anode region and the cathode region from outside of the first trench, thereby constituting a pn junction. The semiconductor device further includes a conducting path through a sidewall of the first trench. |
| US09947646B2 |
Method and structure for semiconductor mid-end-of-line (MEOL) process
A semiconductor device includes a substrate having first and second regions. The first region includes an insulator and the second region includes source, drain, and channel regions of a transistor. The semiconductor device further includes first and second gate stacks over the insulator; a third gate stack over the channel region; a first dielectric layer over the first, second, and third gate stacks; a second dielectric layer over the first dielectric layer; and a metal layer over the first and second gate stacks. The metal layer is in electrical communication with the second gate stack and is isolated from the first gate stack by at least the first and second dielectric layers. |
| US09947645B2 |
Multi-project wafer with IP protection by reticle mask pattern modification
Multi-Project Wafers includes a plurality of chiplets from different IP owners. Non-relevant chiplets are implemented with IP protection to inhibit IP disclosure of non-relevant IP owners. |
| US09947642B2 |
Package-on-Package (PoP) device comprising a gap controller between integrated circuit (IC) packages
A package on package (PoP) device that includes a first package, a second package that is coupled to the first package, and at least one gap controller located between the first package and the second package, where the at least one gap controller is configured to provide a minimum gap between the first package and the second package. The first package includes a first electronic package component (e.g., first die). In some implementations, the at least one gap controller is coupled to the first package, but free of coupling with the second package. The at least one gap controller is located on or about a center of the first package. The at least one gap controller may be located between the first electronic package component (e.g., first die) and the second package. The package on package (PoP) device may include an encapsulation layer between the first package and the second package. |
| US09947640B2 |
Wafer, package structure and method of manufacturing the same
The present invention provides a method of manufacturing a package structure. An array chip including a plurality of first dies is provided. A wafer including a plurality of second dies is provided. A package step is carried out to package the array chip onto the wafer so as to electrically connect the first die and the second die. The present invention further provides a semiconductor wafer and a package structure. |
| US09947637B2 |
System and method for clamping wafers together in alignment using pressure
A system and method for clamping wafers together in alignment using pressure. The system and method involves holding a first wafer and a second wafer together in alignment using a wafer clamp within an ambient environment maintained at a first pressure and creating a second pressure at least partially around and between the first wafer and the second wafer held together by the wafer clamp, wherein the first pressure is greater than the second pressure. The first wafer and the second wafer are clamped together in alignment using a pneumatic force created by a pressure differential between the first pressure and the second pressure. |
| US09947634B1 |
Robust mezzanine BGA connector
A ball grid array (BGA) connector including an outer housing, an insert mounted within the outer housing having a first side and a second side, and a plurality of electrical contacts provided within the insert. The BGA connector also includes a plurality of connector balls electrically coupled to the electrical contacts at the first side of the insert, where some of the connector balls have a low Young's modulus and some of the connector balls have a high Young's modulus such that the high Young's modulus connector balls carry more of a separation load than the low Young's modulus connector balls. In one embodiment, the high Young's modulus connector balls are located around an outer periphery of the BGA. Also, the high modulus connector balls are soldered to larger solder pads than the low modulus connector balls. |
| US09947629B2 |
Method of forming contact holes in a fan out package
Methods of forming packages include forming an encapsulant laterally encapsulating a die over an active surface of the die. The active surface has an electrical pad. A first opening is formed through the encapsulant to the electrical pad. In some embodiments the first opening is formed using a photolithographic technique. In some embodiments the first opening is formed using a temporary pillar by forming the temporary pillar over the electrical pad, forming the encapsulant, and then exposing and removing the temporary pillar. A conductive pattern is formed over the encapsulant including a via formed in the first opening to the electrical pad of the die's active surface. In some embodiments, a dielectric layer is formed over the encapsulant, and the conductive pattern is over the dielectric layer. Embodiments may include forming additional dielectric layers and conductive patterns. |
| US09947628B2 |
High frequency semiconductor amplifier
A high frequency semiconductor amplifier includes an input circuit, a first semiconductor element, first bonding wires, an interstage circuit, second bonding wires, a second semiconductor element, third bonding wires, an output circuit, fourth bonding wires and a package. The input circuit includes a first DC blocking capacitor, an input transmission line, a first input pad part, and a first bias circuit. The interstage circuit includes a second DC blocking capacitor, an interstage transmission line, a first output pad part, and a second bias circuit, a microstrip line divider, and a second input pad part. The output circuit includes a second output pad part, a microstrip line combiner, a third DC blocking capacitor, an output transmission line, and a fourth bias circuit. The first and second semiconductor elements, the input circuit, the interstage circuit, and the output circuit are bonded to the package. |
| US09947625B2 |
Wiring board with embedded component and integrated stiffener and method of making the same
A wiring board with embedded component and integrated stiffener is characterized in that an embedded semiconductor device, a first routing circuitry, an encapsulant and an array of vertical connecting elements are integrated as an electronic component disposed within a through opening of a stiffener, and a second routing circuitry is disposed beyond the through opening of the stiffener and extends over the stiffener. The mechanical robustness of the stiffener can prevent the wiring board from warping. The embedded semiconductor device is electrically coupled to the first routing circuitry and surrounded by the vertical connecting elements in electrical connection with the first and second routing circuitries. The first routing circuitry provides primary fan-out routing for another semiconductor device to be assembled on the wiring board, whereas the second routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the electronic component with the stiffener. |
| US09947621B2 |
Structure and method to reduce copper loss during metal cap formation
A copper or copper alloy is formed in a reflow enhancement layer lined opening present in an interconnect dielectric material layer. A ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap is then formed via ion implantation and annealing in an upper portion of a copper or copper alloy present in the opening. The upper portion of the copper or copper alloy containing the ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap can mitigate or even present prevent preferential loss of copper which can aid in lowering the interconnect resistance of the structure. |
| US09947614B2 |
Packaged semiconductor device having bent leads and method for forming
A package device has a first lead frame having a first flag. A first integrated circuit is on the first flag. A first encapsulant is over the first integrated circuit. A first plurality of leads is electrically bonded to the first integrated circuit. A first lead of the first plurality of leads has an inner portion covered by the first encapsulant and an outer portion extending outside the encapsulant. The outer portion has a hole and a bend at the hole. The outer portion extends above the first encapsulant. |
| US09947605B2 |
Flip chip cavity package
A process for forming a semiconductor package. The process comprises forming a first leadframe strip mounted upon an adhesive tape. The first leadframe strip is at least partially encased in a first mold compound thereby forming a molded leadframe strip. At least one flip chip semiconductor device is mounted on the molded leadframe strip. The semiconductor device has conductive masses attached thereon to effectuate electrical contact between the semiconductor device and the molded leadframe. The conductive masses can be substantially spherical or cylindrical. Liquid encapsulant is dispensed on the semiconductor device to encapsulate the flip chip semiconductor device. A cavity is formed between the semiconductor device and the molded leadframe. The molded leadframe strip, the semiconductor device, and the conductive masses are at least partially encased in a second mold compound. The second mold compound can be molded so that a surface of the flip chip semiconductor device that is not attached to the molded leadframe is substantially exposed or molded to produce a globular form on the flip chip semiconductor device. The molded leadframe strip is singulated to form discrete semiconductor packages. |
| US09947600B2 |
Semiconductor structure having a test structure formed in a group III nitride layer
In an embodiment, a semiconductor structure includes a support substrate comprising a surface adapted to support epitaxial growth of a Group III nitride, one or more epitaxial Group III nitride layers arranged on the surface and supporting a plurality of transistor devices assembled upon the support substrate, and a test structure formed in a Group III nitride layer. The test structure includes a plurality of trenches configured to provide an optical diffraction grating when illuminated by UV light. The trenches have a parameter corresponding to a parameter of a feature of the transistor devices. |
| US09947599B2 |
Method for PECVD overlay improvement
The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern. |
| US09947598B1 |
Determining crackstop strength of integrated circuit assembly at the wafer level
A methodology and associated wafer level assembly of testing crackstop structure designs. The wafer level semiconductor assembly includes: a substrate structure shaped to define a set of horizontal directions; a metallization layer located on top of the substrate structure, with the metallization layer including a crackstop structure formed therein in accordance with a crackstop structure design; and a tensioned layer located on top of the metallization layer, with the tensioned layer being made of material having internal tensile forces oriented in the horizontal directions. The tensile forces promote horizontal direction crack propagation in the metallization layer so that the crackstop structure design can be tested more rigorously and reliably before deciding on the crackstop design structure to put into mass production (which mass produced product would typically not include the tensioned layer). |
| US09947596B2 |
Range-based real-time scanning electron microscope non-visual binner
A technique to identify non-visual defects, such as SEM non-visual defects (SNVs), includes generating an image of a layer of a wafer, evaluating at least one attribute of the image using a classifier, and identifying the non-visual defects on the layer of the wafer. A controller can be configured to identify the non-visual defects using the classifier. This controller can communicate with a defect review tool, such as a scanning electron microscope (SEM). |
| US09947594B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor channel, a second semiconductor channel, a first gate stack and a second gate stack. The first gate stack includes N-work function metal present on the first semiconductor channel. The second gate stack includes N-work function metal present on the second semiconductor channel. The N-work function metal in the first gate stack and the second gate stack are substantially different. The difference includes at least one of N-work function metal type and N-work function metal amount. |
| US09947591B2 |
Method for manufacturing a Si-based high-mobility CMOS device with stacked channel layers, and resulting devices
A device and method for manufacturing a Si-based high-mobility CMOS device is provided. The method includes the steps of: (i) providing a silicon substrate having a first insulation layer on top and a trench into the silicon; (ii) manufacturing a III-V semiconductor channel layer above the first insulation layer by depositing a first dummy layer of a sacrificial material, covering the first dummy layer with a first oxide layer, and replacing the first dummy layer with III-V semiconductor material by etching via holes in the first oxide layer followed by selective area growth; (iii) manufacturing a second insulation layer above the III-V semiconductor channel layer and uncovering the trench; (iv) manufacturing a germanium or silicon-germanium channel layer above the second insulation layer by depositing a second dummy layer of a sacrificial material, covering the second dummy layer with a second oxide layer, and replacing the second dummy layer with germanium or silicon-germanium by etching via holes in the second oxide layer followed by selective area growth. |
| US09947590B1 |
Method, apparatus, and system for using a cover mask for enabling metal line jumping over MOL features in a standard cell
At least one method, apparatus and system disclosed involves providing an integrated circuit having metal feature flyover over an middle-of-line (MOL) feature. A first location for a non-contact intersection region between a first middle of line (MOL) interconnect feature and a metal feature in a functional cell is determined. A dielectric feature is formed over the first MOL interconnect feature at the first location. The metal feature is formed over the dielectric layer, the dielectric layer providing a predetermined amount of voltage isolation between the first MOL interconnect feature and the metal feature. |
| US09947585B2 |
Multi-gate transistor with variably sized fin
An embodiment includes an apparatus comprising: a non-planar transistor comprising a fin, the fin including a source region having a source region width and a source region height, a channel region having a channel region width and a channel region height, a drain region having a drain width and a drain height, and a gate dielectric formed on a sidewall of the channel region; wherein the apparatus includes at least one of (a) the channel region width being wider than the source region width, and (b) the gate dielectric including a first gate dielectric thickness at a first location and a second gate dielectric thickness at a second location, the first and second locations located at an equivalent height on the sidewall and the first and second gate dielectrics thicknesses being unequal to one another. Other embodiments are described herein. |
| US09947580B2 |
Interconnect structures with enhanced electromigration resistance
Interconnect structures are provided that include an intermetallic compound as either a cap or liner material. The intermetallic compound is a thermal reaction product of a metal or metal alloy of an interconnect metallic region with a metal of either a metal cap or a metal layer. In some embodiments, the metal cap may include a metal nitride and thus a nitride-containing intermetallic compound can be formed. The formation of the intermetallic compound can improve the electromigration resistance of the interconnect structures and widen the process window for fabricating interconnect structures. |
| US09947577B2 |
Integrated circuit with a sidewall layer and an ultra-thick metal layer and method of making
A method of forming an integrated circuit that includes providing a substrate, a metal layer over the substrate, and a first dielectric layer over the metal layer. The first dielectric layer includes a via. A sidewall layer that includes a silicon compound is in the via. A second dielectric layer is over the sidewall layer and an ultra-thick metal (UTM) layer is in the via. |
| US09947571B2 |
Processing apparatus, nozzle, and dicing apparatus
A processing apparatus of an embodiment includes a stage that can have a sample placed thereon, a rotation mechanism that rotates the stage, a nozzle that injects a substance onto the sample, a movement mechanism that moves the stage and the nozzle in a relative manner in a direction perpendicular to the rotation axis of the stage; and a control unit that controls the movement mechanism. |
| US09947570B2 |
Handler bonding and debonding for semiconductor dies
Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated. |
| US09947568B2 |
Peeling method, semiconductor device, and peeling apparatus
To improve peelability, yield in a peeling step, and yield in manufacturing a flexible device. A peeling method is employed which includes a first step of forming a peeling layer containing tungsten over a support substrate; a second step of forming, over the peeling layer, a layer to be peeled formed of a stack including a first layer containing silicon oxynitride and a second layer containing silicon nitride in this order and forming an oxide layer containing tungsten oxide between the peeling layer and the layer to be peeled; a third step of forming a compound containing tungsten and nitrogen in the oxide layer by heat treatment; and a fourth step of peeling the peeling layer from the layer to be peeled at the oxide layer. |
| US09947567B2 |
Thermoplastic temporary adhesive for silicon handler with infra-red laser wafer de-bonding
A bonding material including a phenoxy resin thermoplastic component, and a carbon black filler component. The carbon black filler component is present in an amount greater than 1 wt. %. The carbon black filler converts the phenoxy resin thermoplastic component from a material that transmits infra-red (IR) wavelengths to a material that absorbs a substantial portion of infra-red (IR) wavelengths. |
| US09947564B2 |
Conveyance base and conveyance system
Provided is a conveyance system that adjusts the position of a conveyed substrate, prevents damage resulting from the heat of another apparatus in a conveyance base, prevents insufficient electrical power of another apparatus in the conveyance base, and can move the conveyance base smoothly. A substrate processing system is provided with a conveyance chamber and a sliding box moving within the conveyance chamber. A plurality of processing modules are connected, and the sliding box is provided with: a conveyance arm that moves wafers; a servo motor that moves the conveyance arm; and a servo motor driver that controls the electrical power supplied to the servo motor. A servo motor controller that controls the servo motor driver is disposed outside a transfer module, and the servo motor driver and servo motor controller perform optical communication. |
| US09947561B2 |
Semiconductor encapsulation system comprising a vacuum pump and a reservoir pump
A semiconductor encapsulation apparatus for encapsulating a semiconductor device on a substrate, the apparatus comprising a mold comprising a cavity pressure zone that is configured to be at a molding process pressure during molding, a base vacuum pump conduit connecting a base vacuum pump to the cavity pressure zone, a base vacuum valve located along the base vacuum pump conduit such that the base vacuum pump is in fluid communication with the cavity pressure zone when the base vacuum valve is open, a reservoir vacuum pump conduit connecting a reservoir vacuum pump to the base vacuum pump conduit, and a reservoir vacuum valve located along the reservoir vacuum pump conduit such that the reservoir vacuum pump is in fluid communication with the base vacuum pump conduit when the reservoir vacuum valve is open. The base vacuum pump and the reservoir vacuum pump are each operative to reduce a pressure of the cavity pressure zone to the molding process pressure when they are in fluid communication with the cavity pressure zone. |
| US09947557B2 |
Semiconductor processing system having multiple decoupled plasma sources
A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma. |
| US09947554B2 |
Support substrate and a method of manufacturing a semiconductor package using the same
A support substrate, a method of manufacturing a semiconductor package, and a semiconductor package, the support substrate including a first plate; a second plate on the first plate; and an adhesive layer between the first plate and the second plate, wherein a coefficient of thermal expansion (CTE) of the adhesive layer is higher than a CTE of the first plate and higher than a CTE of the second plate. |
| US09947553B2 |
Manufacturing method of semiconductor device and semiconductor device
The present invention provides a semiconductor device and a method for manufacturing a semiconductor device. The method comprises: Preparing a semiconductor chip 6 with a first electrode layer 21 formed on an element-forming surface 7. Prepared a support member 30 having a conductor 31 formed on a pattern-forming surface 33. The first electrode layer 21 is bonded to the conductor 31 by a solder, and thus the semiconductor chip 6 is fixed on the support member 30. While the semiconductor chip 6 is fixed on the support member 30, the semiconductor chip 6 is coated by the sealing resin 3 to form a sealing structure 46. By removing the support member 30 from the sealing structure 46, the conductor 31 formed on the support member 30 is transferred to the sealing structure 46. The conductor 31 transferred to the sealing structure 46 is an external electrode exposed from the sealing structure 46. |
| US09947549B1 |
Cobalt-containing material removal
Methods are described herein for etching cobalt films which are difficult to volatize. The methods include exposing a cobalt film to a bromine or chlorine-containing precursor with a concurrent local plasma which applies a bias to the impinging etchants. Cobalt halide is formed on the surface at the same time an amorphized cobalt layer is formed near the surface. A carbon-and-nitrogen-containing precursor is later delivered to the substrate processing region to form volatile cobalt complexes which desorb from the surface of the cobalt film. Cobalt may be selectively removed. The concurrent production of cobalt halide and amorphized regions was found to markedly increase the overall etch rate and markedly improve surface smoothness upon exposure to the carbon-and-nitrogen-containing precursor. All the recited steps may now be performed in the same substrate processing chamber. |
| US09947544B2 |
Method of manufacturing semiconductor device including forming protective film within recess in substrate
An n-type layer (3) is formed by implanting an n-type impurity in a back surface of a Si substrate (1). A recess (4) is formed in the back surface of the Si substrate (1). After forming the n-type layer (3), an oxide film (5) is formed on the back surface and in the recess (4). The oxide film (5) on the back surface is removed while the oxide film (5) in the recess (4) is left. After removing the oxide film (5), an Al—Si film (6) is formed on the back surface. A metal electrode (7) is formed on the Al—Si film (6). The oxide film (5) in the recess (4) prevents Al from diffusing from the Al—Si film (6) into the Si substrate (1) through the recess (4). |
| US09947540B2 |
Pre-deposition treatment and atomic layer deposition (ALD) process and structures formed thereby
Various methods and structures formed by those methods are described. In accordance with a method, a first metal-containing layer is formed on a substrate. A second metal-containing layer is formed on the substrate. A material of the first metal-containing layer is different from a material of the second metal-containing layer. A chlorine-based treatment is performed on the first metal-containing layer and the second metal-containing layer. A third metal-containing layer is deposited on the first metal-containing layer and the second metal-containing layer using Atomic Layer Deposition (ALD). |
| US09947533B2 |
Selective epitaxy using epitaxy-prevention layers
A method for forming an epitaxial structure includes providing a two-dimensional material on a crystal semiconductor material and opening up portions of the two-dimensional material to expose the crystal semiconductor material. A structure is epitaxially grown in the portions opened up in the crystal semiconductor material such that the epitaxial growth is selective to the exposed crystal semiconductor material relative to the two-dimensional material. |
| US09947532B2 |
Forming zig-zag trench structure to prevent aspect ratio trapping defect escape
A method of fabricating a semiconductor device can include the following steps: (i) providing an initial sub-assembly including a trench-defining layer having a top surface; (ii) refining the initial sub-assembly into a first trench-cut intermediate sub-assembly by removing material to form an upper tier of a trench extending downward from the top surface of the trench-defining layer, the upper tier of the trench including two lateral trench surfaces and a bottom trench surface; and (iii) refining the first trench-cut intermediate sub-assembly into a second trench-cut intermediate sub-assembly by selectively removing material in a downwards direction starting from the bottom surface of the trench to form a lower tier of the trench, with the selective removal of material leaving at least a first defect blocking member in the lower tier of the trench. |
| US09947529B2 |
Porous fin as compliant medium to form dislocation-free heteroepitaxial films
A method for forming a heteroepitaxial layer includes forming an epitaxial grown layer on a monocrystalline substrate and patterning the epitaxial grown layer to form fins. The fins are converted to porous fins. A surface of the porous fins is treated to make the surface suitable for epitaxial growth. Lattice mismatch is compensated for between an epitaxially grown monocrystalline layer grown on the surface and the monocrystalline substrate by relaxing the epitaxially grown monocrystalline layer using the porous fins to form a relaxed heteroepitaxial interface with the monocrystalline substrate. |
| US09947524B2 |
Diathermy knife ionisation source
A method of detecting one or more compounds, chemicals or contaminants in a substrate by mass spectrometry is disclosed. A non-living substrate is analyzed by contacting the substrate with a diathermy knife. An electric current is applied to the diathermy knife such that the diathermy knife vaporizes a portion of the substrate. The vapor is aspirated via a sampling tube pumped by a venturi pump into a vacuum chamber of a mass spectrometer. Analyte molecules are aspirated into the vacuum chamber whereupon they impact a surface of the vacuum chamber and are ionized to form analyte ions which are then mass analyzed. |
| US09947520B2 |
Ion analyzer including detector for detecting fragment ions generated by ion-dissociation
A cloud of ions captured in an ion trap (2) is irradiated with a stream of hydrogen radicals cast through a radical particle introduction hole (26) bored in a ring electrode (21) at a flow rate of 4×1010 [atoms/s]. As a result, a radical induced dissociation which does not rely on the transfer or capture of electrons occurs within the ion trap (2), whereby c/z-type fragment ions are efficiently generated. After the irradiation with the hydrogen radicals, a supplemental collision-induced dissociation process may performed by introducing inert gas into the ion trap (2) and resonantly exciting the ions, in order to further promote the generation of the c/z-type fragment ions. In this manner, according to the present invention, it is possible to achieve radical induced dissociation of singly-charged ions derived from a peptide and use the thereby generated c/z-type fragment ions for mass spectrometry. |
| US09947516B2 |
Top dielectric quartz plate and slot antenna concept
Techniques disclosed herein include an apparatus for treating substrates with plasma generated within a plasma processing chamber. In one embodiment, dielectric plates, of a plasma system can include structural features configured to assist in generating a uniform plasma. Such structural features define a surface shape, on a surface that faces the plasma. Such structural features can include a set of concentric rings having an approximately non-linear cross section, and protrude into the surface of the dielectric plate. Such structural features may include feature depth, width, and periodic patterns that may vary depth and width along the concentric rings. |
| US09947514B2 |
Plasma RF bias cancellation system
An RF supply system in which a bias RF generator operates at a first frequency to provide a bias RF output signal and a source RF generator operates at a second frequency to provide a source RF output signal. The RF output power signals are applied to a load, such as a plasma chamber. The source RF generator detects a triggering event. In response to the triggering event, the source RF generator initiates adding frequency offsets to the source RF output signal in order to respond to impedance fluctuations in the plasma chamber that occur with respect to the triggering event. The triggering event detected by the source RF generator can be received from the bias RF generator in the form of a control signal that varies in accordance with the bias RF output signal. |
| US09947513B2 |
Edge ramping
Systems and methods for performing edge ramping are described. A system includes a base RF generator for generating a first RF signal. The first RF signal transitions from one state to another. The transition from one state to another of the first RF signal results in a change in plasma impedance. The system further includes a secondary RF generator for generating a second RF signal. The second RF signal transitions from one state to another to stabilize the change in the plasma impedance. The system includes a controller coupled to the secondary RF generator. The controller is used for providing parameter values to the secondary RF generator to perform edge ramping of the second RF signal when the second RF signal transitions from one state to another. |
| US09947511B2 |
Antenna for plasma generation and plasma processing device having the same
Provided are an antenna, which is disposed in a vacuum chamber for generating an inductively coupled plasma, and a plasma processing device. The antenna and the plasma processing device suppress increase of the impedance even if the antenna is lengthened. An antenna 20 is disposed in a vacuum chamber 2 for generating an inductively coupled plasma 16 in the vacuum chamber 2 by applying a high frequency current. The antenna 20 includes an insulating pipe 22 and a hollow antenna body 24 which is disposed in the insulating pipe 22 and in which cooling water flows. The antenna body 24 has a structure that a plurality of metal pipes 26 are connected in series with a hollow insulator 28 interposed between the adjacent metal pipes 26, and each connecting portion has a sealing function with respect to vacuum and the cooling water. |
| US09947505B2 |
Graphene modification
Some embodiments are directed to a support for receiving a biological sample, the support comprising at least one support member, and including graphene attached to the support member. The graphene is partially hydrogenated graphene. Some embodiments are also directed to use of a partially hydrogenated graphene surface to support a biological molecule for electron microscopy. Some other embodiments are also directed to a method for making a partially hydrogenated graphene. The method includes applying a hydrogen ion or hydrogen atom to the surface of graphene. The hydrogen ion or hydrogen atom is applied at an energy in the range 1 to 21 eV. A sensor comprising a surface capable of adsorbing a biological molecule thereto is also disclosed, wherein said surface includes partially hydrogenated graphene. |
| US09947502B2 |
Aligning and focusing an electron beam in an X-ray source
A technique for indirectly measuring the degree of alignment of a beam in an electron-optical system including aligning means, focusing means and deflection means. To carry out the measurements, a simple sensor may be used, even a single-element sensor, provided it has a well-defined spatial extent. When practiced in connection with an X-ray source which is operable to produce an X-ray target, further, a technique for determining and controlling a width of an electron-beam at its intersection point with the target. |
| US09947498B2 |
Electrical switching apparatus and clinch joint assembly therefor
A movable contact assembly for an electrical switching apparatus is provided. The movable contact assembly includes a number of shunts, and, a carriage assembly including two sidewalls and a contact arm assembly. The carriage assembly sidewalls are disposed in a spaced relation. The contact arm assembly includes a plurality of contact arms, a number of isolation members, a number of movable contacts, and an axle. Each contact arm defines an opening. One movable contact is disposed on each contact arm. Each contact arm is rotatably coupled to the axle with the axle extending through the contact arm opening. Each isolation member is disposed adjacent at least one contact arm. Each isolation member is coupled to, and in electrical communication with the adjacent contact arm. The shunts are coupled to, and in electrical communication with, the isolation members. In this configuration, no shunt operatively engages a contact arm. |
| US09947496B2 |
Circuit breaker with hybrid switch
An alternating current circuit breaker includes a first galvanic separation switch (SW2) and a bypass switch (SW1) in a live line, and a second galvanic separation switch (SW3) in a neutral line, and a semiconductor switch element connected parallel to the bypass switch (SW1). The semiconductor switch element includes a combination of a rectifier bridge (D1-D4) and an isolated gate bipolar transistor (IGBT). A processing unit is connected to a current measurement unit arranged in the live line, and is arranged to control the bypass switch (SW1), first and second galvanic separation switches (SW2, SW3) and the conducting state of the isolated gate bipolar transistor (IGBT) in case of detection of a short circuit condition. |
| US09947495B2 |
Arc extinguishing chamber for electrical circuit breaker and circuit breaker comprising such a chamber
The present disclosure relates to an arc extinguishing chamber of an electrical circuit breaker, including an arc-forming chamber enclosing a fixed contact and a moving contact, which, at the time of their separation, form an arc between them, said forming chamber communicating with the input of an arc-quenching chamber comprising a stack of separators extending parallel to one another, and including a magnetic release situated on the side of the fixed and moving contacts and a switching horn situated on the opposite side, where the form of the separators varies progressively from one separator to the next, or by groups of identical separators from one group to another, or a mixture of both, in such a way that this form changes from the V having the largest opening surface area to the V having the smallest opening surface area, in the direction from the magnetic release to the switching horn. |
| US09947493B2 |
Magnetically biased retracting key assembly and keyboard
Magnetically biased retracting key assemblies and keyboards are provided. A key assembly includes a touch surface for receiving a press input from a user and a planar-translation-effecting (PTE) mechanism configured to guide as the keycap moves from an un-pressed position toward a pressed position. The key assembly also includes a ready-return mechanism configured to magnetically biased the keycap in the un-pressed position, the ready-return mechanism including a slider mechanism positioned beneath the keycap and coupled to the PTE mechanism. When the press surface receives a press input the slider mechanism translates away from the magnet as the PTE mechanism guides the keycap from the un-pressed position toward the pressed position. In some embodiments, the PTE mechanism and the ready-return mechanism translate with respect to a chassis layer providing a key retraction feature for the key assembly or keyboard. |
| US09947491B1 |
Magnetic sensor alignment with breakaway
Disclosed herein are electronic devices with a sensor configured to breakaway from an input button or input/output interface. In one example, the electronic device includes a button positioned within an opening of a chassis or housing. A sensor is in communication with the button, wherein the button is configured to contact the sensor in a first sensor position upon application of an activation force. At least one magnet is configured to retain the sensor in the first sensor position by a frictional or magnetic force. Additionally, the sensor is configured to move from the first sensor position to a second sensor position upon application of a force greater than the frictional or magnetic force and less than a sensor damage force. The activation force is less than the frictional or magnetic force, which is less than the sensor damage force. |
| US09947490B2 |
Electrical circuit switching
Systems and techniques are provided for electrical circuit switching. An electrical load may be connected to a voltage supply with current flow entering a first terminal of the electrical load. The electrical load may be disconnected from the voltage supply. The electrical load may be connected to ground such that the electrical load discharges. The electrical load may be connected to the voltage supply with current flow entering a second terminal of the electrical load. The electrical load may be disconnected from the voltage supply. The electrical load may be connected to ground such that the electrical load discharges. |
| US09947489B2 |
Electric switching apparatus comprising an improved arc-quenching device
The present invention relates to an electric switching apparatus, in particular a DC contactor. The switching apparatus has at least one switching point as well as at least one arc-quenching device that is assigned to the switching point. The arc-quenching device comprises at least one quenching element and at least one permanent magnet for influencing an arc that arises during the switching process. The arc is blown into the quenching element by a magnetic field that is created by the permanent magnet. It is provided according to the invention that the at least one permanent magnet forms at the same time the quenching element and that it is arranged and polarized in a way that the arc is attracted by the permanent magnet and thereby sucked onto the permanent magnet and quenched by said permanent magnet. |
| US09947486B2 |
Switch unit, in particular a circuit breaker
A switch unit, preferably implementing a circuit breaker, includes a contact slide unit formed by a contact slide, a fixed contact piece and a moveable contact piece), and a short-circuit release that acts to displace the moveable contact piece by means of a tappet in the event of a short-circuit. A moveable braking device is configured and arranged such that, following circuit opening displacement of the moveable contact piece in response to a short-circuit, the moveable brake device dampens the return, rebound movement of the moveable contact piece to reclose the circuit. |
| US09947482B2 |
Photoelectric conversion element, dye-sensitized solar cell, and metal complex dye used in same
A photoelectric conversion element has a conductive support, a photoreceptor layer containing an electrolyte, a charge carrier layer containing an electrolyte and a counter electrode, and the photoreceptor layer has semiconductor particles on which a metal complex dye represented by Formula (I) is carried. M1(LA)(LD)(Z1).CI Formula (I) M1 represents a metal atom; Z1 represents a monodentate ligand; LA represents a tridentate ligand represented by Formula (AL-1); LD represents a bidentate ligand represented by Formula (DL-1); and CI represents a counterion necessary for neutralizing the charge. |
| US09947478B2 |
Variable capacitance device and communication apparatus
A variable capacitance device includes a ferroelectric capacitor, a control terminal, a ground terminal, and a capacitor. The ferroelectric capacitor includes a ferroelectric film and capacitor electrodes sandwiching the ferroelectric film, and its capacitance value is changed according to a control voltage value applied between the capacitor electrodes. The control terminal is connected to a first end of the ferroelectric capacitor. The ground terminal is connected to a second end of the ferroelectric capacitor. The capacitor is connected between the control terminal and the ground terminal, and has a capacitance larger than that of the ferroelectric capacitor. |
| US09947477B2 |
Method of manufacturing thin-film polymer multi-layer capacitor and thin-film polymer multi-layer capacitor
In a method of manufacturing a thin-film polymer multi-layer capacitor, in a vacuum chamber, a resin thin film layer forming step of forming a resin thin film layer by forming a monomer layer by vapor-depositing a monomer and thereafter by curing the monomer layer by irradiating an electron beam onto the monomer layer, and a metal thin film layer forming step of forming a metal thin film layer by vapor-depositing a metal material are alternately performed on a rotary drum thus forming a multi-layer body in which the resin thin film layer and the metal thin film layer are alternately laminated on the rotary drum. In the resin thin film layer forming step, the monomer layer is formed using a dimethacrylate compound having an alicyclic hydrocarbon skeleton expressed by a following chemical formula (1) as the monomer. wherein, symbol A indicates an organic group containing alicyclic hydrocarbon. |
| US09947474B2 |
Multilayer Capacitor
A multilayer capacitor includes a first grounding internal electrode including a first grounding electrode having a lead-out part led to one side surface of a stacked body, and a second grounding electrode having a lead-out part led to the other side surface; a second grounding internal electrode including a third grounding electrode which overlaps the first grounding electrode and has a lead-out part led to the other side surface, and a fourth grounding electrode which overlaps the second grounding electrode and has a lead-out part led to one side surface; and a signal internal electrode disposed between the first and second grounding internal electrodes, wherein the first and second grounding electrodes and the third and fourth grounding electrodes have, at their adjacent opposed sides, corners curved as seen in a plan view in the stacking direction, respectively, the corners being each located opposite to the corresponding lead-out part. |
| US09947473B2 |
Multilayer ceramic capacitor
A multilayer ceramic capacitor includes a multilayer body and a pair of outer electrodes on end surfaces of the multilayer body. The multilayer body includes a stack of ceramic layers and inner electrodes electrically connected to the outer electrodes. Each of the pair of outer electrodes includes an underlying electrode layer on a surface of the multilayer body, an intermediate metal layer on a surface of the underlying electrode layer, and a conductive resin layer on a surface of the intermediate metal layer. The underlying electrode layer contains Ni, and the intermediate metal layer contains a Cu—Ni—Sn alloy. |
| US09947470B2 |
Ceramic dielectric composition and multilayer ceramic capacitor containing the same
A ceramic dielectric composition contains a base material powder represented by one or more of (Ca1-xSrx) (Zr1-yTiy)O3, Ca(Zr1-yTiy)O3, Sr(Zr1-xTiy)O3, (Ca1-xSrx) ZrO3, and (Ca1-xSrx)TiO3, in which x and y satisfy 0≤x≤1.0 and 0.2≤y≤0.9, respectively. The ceramic dielectric composition have on may high room-temperature permittivity and excellent ESD protection characteristics and may secure withstand voltage characteristics while implementing relatively high capacitance. |
| US09947469B2 |
Thin-film dielectric and thin-film capacitor element
A thin-film dielectric having a higher dielectric constant than usual ones and not requiring a special single crystal substrate, and a large-capacity thin-film capacitor element using the thin-film dielectric, in which a BaTiO3-based perovskite solid solution and a KNbO3-based perovskite solid solution are alternately formed to form a crystal structure gradient region where a lattice constant continuously changes at the interface, and thus crystal lattice strain occurs, thereby permitting the production of a thin-film dielectric having a high dielectric constant; also, a large-capacity thin-film capacitor element can be produced by using the thin-film dielectric of the present invention. |
| US09947461B2 |
Reactor
Provided is a reactor having high joining strength between an end surface connecting member and an outer resin-molded portion and excellent reliability. A reactor includes a coil having a winding portion, a magnetic core having an inner core portion disposed inside the winding portion and an outer core portion disposed outside the winding portion, an end surface connecting member that is fixed to an end portion of the inner core portion and disposed between an end surface of the winding portion and the outer core portion, and an outer resin-molded portion that integrates the outer core portion and the end surface connecting member, wherein a detachment preventing portion is formed in the end surface connecting member, the detachment preventing portion being embedded in the outer resin-molded portion and having a detachment preventing shape that suppresses detachment of the outer resin-molded portion. |
| US09947460B2 |
Oxide ceramic and ceramic electronic component
An oxide ceramic represented by the general formula [Sr2−xBaxCo2−y(ZnuNi1−u)yFe12−zAlzO22]. In the formula, 0.7≤x≤1.3 and 0.8≤z≤1.2. y is 0≤y≤0.8 when 0.5≤u≤1.0 and is 0≤y≤1.6 when 0≤u≤0.5. y is preferably 0.4 or less. Further, a variable inductor as a ceramic electronic component has a component base body formed from the oxide ceramic. |
| US09947459B2 |
Surface mounted electronic component
A surface mounted electronic component includes a first frame terminal including a first end surface frame extending in a first direction and first upper and lower surface frames extending from upper and lower ends of the first end surface frame in a second direction; a second frame terminal including a second end surface frame opposing the first end surface frame and extending in the first direction and second upper and lower surface frames extending from upper and lower ends of the second end surface frame in a third direction opposite to the second direction; a first electronic component disposed between the first and second end surface frames below the first and second upper surface frames; and a second electronic component disposed on the first and second upper surface frames. |
| US09947456B2 |
High power density printed circuit board (PCB) embedded inductors
Devices, systems, and methods of manufacture relating to PCB embedded inductors are described in the present disclosure. Namely, an example device includes a substrate having an upper surface and an opposing lower surface. The device also includes a plurality of upper conductors disposed along the upper surface and a plurality of lower conductors disposed along the lower surface. The upper conductors and the lower conductors are radially disposed about a central axis. Each of the upper conductors and the lower conductors includes a petal shape. A distance between adjacent upper conductors is less than a width of each upper conductor and a distance between adjacent lower conductors is less than a width of each lower conductor. The device also includes a plurality of through-substrate conductors connecting respective upper conductors to respective lower conductors so as to form a series electrical connection. The series electrical connection includes a toroid configuration. |
| US09947453B2 |
Stationary induction electric apparatus
A stationary induction electric apparatus includes an iron core having legs of core and yokes of core; windings wound around the legs of core; coolant for cooling the windings; a cylindrical insulation structure that forms a flow of the coolant around the windings; baffle members alternately provided on the inner wall side and the outer wall side of the cylindrical insulation structure; and adjustment members for constricting the flow of the coolant. The adjustment members are provided on the same side of the respective baffle members and on the respective baffle members. |
| US09947452B2 |
Electrical device with emergency cooling system
An electrical device includes a winding including an interior portion and an exterior surface, a primary cooling system for cooling the exterior surface of the winding, a secondary cooling system for cooling the interior portion of the winding, and a heat exchanger thermally coupled to the primary cooling system and the secondary cooling system. |
| US09947450B1 |
Magnetic core signal modulation
A electromagnetic device may include a core in which a magnetic flux is generable and an opening through the core. A primary conductor winding may be received in the opening and extend through the core. A primary electrical current signal flowing through the primary conductor winding generates a magnetic field about the primary conductor winding and a first magnetic flux flow in the core. A secondary conductor winding may be received in the opening and extend through the core. A first modular conductor winding may extend through the opening and encircle a first outer core portion of the core. A first modulation signal flowing through the first modular conductor winding modulates the primary electrical current signal to provide a modulated output current signal at an output of the secondary conductor winding. |
| US09947448B2 |
Electromagnetic opposing field actuators
Electromagnetic actuators capable of generating a symmetrical bidirectional force are disclosed. The electromagnetic actuators include a housing made of a ferromagnetic material and a shaft made of a magnetically inert material movable along an axis within the housing. In one type of actuator, captive permanent magnets are arranged on opposite interior end walls of the housing and an electromagnetic coil is mounted on a central portion of the shaft. The electromagnetic coil is capable of generating a force when energized that causes linear displacement of the shaft in either direction along its axis depending on the direction of current through the electromagnetic coil. In another type of actuator, captive electromagnetic coils are arranged on opposing inner end walls of the housing, and a permanent magnet is mounted on a central portion of the shaft. The electromagnetic coils are capable of generating a force when energized that causes linear displacement of the shaft in either direction along its axis depending on a direction of current through the electromagnetic coils. |
| US09947446B2 |
Hot-rolled steel sheet for production of non-oriented electrical steel sheet and method of manufacturing same
The pickling loss when a hot-rolled steel sheet having a predetermined chemical composition is annealed at 1000° C. for 30 seconds in a nitrogen atmosphere and then immersed in a solution of 7% HCl at 80° C. for 60 seconds is in a range of 40 g/m2 or more and 100 g/m2 or less. A hot-rolled steel sheet for production of a non-oriented electrical steel sheet with not only excellent magnetic properties such as iron loss and magnetic flux density but also excellent recyclability and steel sheet surface appearance can thus be obtained. |
| US09947444B1 |
Multilayer varistor and process for producing the same
A process for producing a multilayer varistor (MLV) if remained its size unchanged as prior arts is favorable to outstandingly increase overall current-carrying area and improve the performance of final produced MLV; and the MLV has laminated a lower cap, an inner-electrode stack formed from piling up several inner-electrode gaps (g), and an upper cap into a unity, and at least satisfies the condition that the lower cap and the upper cap has a thickness smaller than a thickness of the inner-electrode gap (g), but equal to or greater than 0.1 times of the thickness of the inner-electrode gap (g). |
| US09947432B2 |
Electrically conductive materials formed by electrophoresis
A method of forming an electrically conductive composite is disclosed that includes the steps of providing a first dielectric material and a second conductive material that is substantially dispersed within the first dielectric material; and applying an electric field through at least a portion of the combined first dielectric material and second conductive material such that the second conductive material undergoes electrophoresis and forms at least one electrically conductive path through the electrically conductive composite along the direction of the applied electric field. |
| US09947431B2 |
Anisotropic films templated using ultrasonic focusing
An anisotropic composite film includes a plurality of effectively parallel lines of particles with a polymeric or other solid matrix. The composite films are prepared by dispersion of the particles within a precursor to the matrix, such as a monomer, and acoustically stimulating the dispersion to form effectively parallel lines of the particles that are fixed by polymerizing the monomer or otherwise solidifying a matrix. The composite film is anisotropic and the transmittance of the composite film can exceed 50%. The composite films can be rigid or flexible. The composite film can be electrically conductive. The composite films can be employed as transparent electrodes for, displays, solar cells, and wearable devices. |
| US09947430B2 |
Transparent conductive film comprising silver nanowires
A transparent conductive film. The film comprises a transparent polymer comprising fused latex polymer particles. A plurality of nanowires comprising silver are partially dispersed in the transparent polymer. Devices employing the transparent conductive film and methods of making the devices are also disclosed. |
| US09947429B2 |
Ag alloy film for reflecting electrode or wiring electrode, reflecting electrode or wiring electrode, and Ag alloy sputtering target
An Ag alloy film used for a reflecting electrode or an interconnection electrode, the Ag alloy film exhibiting low electrical resistivity and high reflectivity and having exceptional oxidation resistance under cleaning treatments such as an O2 plasma treatment or UV irradiation, wherein the Ag alloy film contains either In in an amount of larger than 2.0 atomic % to 2.7 atomic % or smaller; or Zn in an amount of larger than 2.0 atomic % to 3.5 atomic % or smaller; or both. The Ag alloy film may further contain Bi in an amount of 0.01 to 1.0 atomic %. |
| US09947427B2 |
Scintillation crystal including a co-doped sodium halide, and a radiation detection apparatus including the scintillation crystal
A scintillation crystal can include a sodium halide that is co-doped with thallium and another element. In an embodiment, the scintillation crystal can include NaX:Tl, Me, wherein X represents a halogen, and Me represents a Group 1 element, a Group 2 element, a rare earth element, or any combination thereof. In a particular embodiment, the scintillation crystal has a property including, for radiation in a range of 300 nm to 700 nm, an emission maximum at a wavelength no greater than 430 nm; or an energy resolution less than 6.4% when measured at 662 keV, 22° C., and an integration time of 1 microsecond. In another embodiment, the co-dopant can be Sr or Ca. The scintillation crystal can have lower energy resolution, better proportionality, a shorter pulse decay time, or any combination thereof as compared to the sodium halide that is doped with only thallium. |
| US09947422B2 |
Control method for a pressurized water nuclear reactor
This invention relates to a control method for a pressurized water nuclear reactor, which comprises a core generating thermal power and means of acquiring magnitudes representative of core operating conditions. The method comprises a step to regulate the temperature of the primary coolant, if the temperature of the primary coolant for a given thermal power is outside a predefined set temperature interval (ΔTREF) depending on the reactor power. The set temperature interval (ΔTREF) is characterized by variable amplitude (ΔT) on a thermal power range between N % and 100% nominal power, where N is between 0 and 100 and comprises a zero amplitude at 100% nominal power, a zero amplitude at N % nominal power. |
| US09947417B2 |
Memory management method, memory storage device and memory controlling circuit unit
A memory management method, a memory storage device and a memory controlling circuit unit are provided. The method includes: programming data into a plurality of memory cells of a rewritable non-volatile memory module; determining whether a storage state of the data conforms with a first condition or a second condition based on a default bias range and a threshold voltage distribution of the memory cells storing the data; performing a first operation if the storage state of the data conforms with the first condition; and performing a second operation if the storage state of the data conforms with the second condition. Accordingly, the probability of misidentifying the valid data as the invalid data may be reduced. |
| US09947415B2 |
Nonvolatile semiconductor memory device having a control circuit that controls voltage applied to non-selected word lines connected to unselected memory cells
A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value. |
| US09947412B1 |
Data writing method, memory control circuit unit and memory storage apparatus
A data writing method for a rewritable non-volatile memory module is provided. The method includes recording a plurality of characteristic parameters corresponding to a plurality of data to be programmed; arranging the data according to the characteristic parameters and identifying frequently-read data among the plurality of data according to the characteristic parameters, and programming the frequently-read data into a first physical programming unit of a rewritable non-volatile memory module, wherein a time for reading data from the first physical programming unit is less than a time for reading data from a second physical programming unit of the rewritable non-volatile memory module. Accordingly, the reading performance for the data can be effectively improved. |
| US09947410B2 |
Non-volatile semiconductor memory device
A non-volatile semiconductor memory device is provided. A determination circuit 200 used to determine the suspected qualification is connected with a plurality of page buffer/sensing circuits 170 via wirings PB_UP, PB_MG, PB_DIS. The page buffer/sensing circuit 170 includes a transistor Q2 in which a reference current Iref flows through a transistor Q1 when the programming verification is unqualified. The determination circuit 200 includes a comparator CMP, a voltage of the wiring PB_UP is supplied to one of input terminals of the comparator CMP, and a reference voltage Vref is supplied to another one of the input terminals. The reference voltage Vref is generated by a reference current (Iref*N) whose amount is corresponding to an unqualified bit number (N) which is determined to be suspectedly qualified. |
| US09947409B2 |
Flash memory
In order to reduce the manufacturing cost, a flash memory includes a memory cell array formed by a plurality of memory cells arranged in a matrix shape; a plurality of word lines provided in each column of the memory cell array; a first word line driver that outputs a first voltage group to each of the word lines; and a second word line driver that outputs a second voltage group to each of the word lines together with the first word line driver. |
| US09947401B1 |
Peak current management in non-volatile storage
Technology is described for keeping current (e.g., peak power supply current or ICC) in a non-volatile memory system within a target while maintaining high throughput. Programming conditions are adaptively changed at the sub-codeword level in order to keep power supply current of the memory system within a target. In one embodiment, a chunk of data that corresponds to a sub-codeword is written while consuming lower than normal programming current in order to keep power supply current within a target. The relatively low programming current may increase the expected raw BER. However, other portions of the codeword can be written with a higher than normal programming current, which results in a lower expected bit raw error rate for the memory cells that store that portion. |
| US09947398B1 |
Semiconductor memory device and operation method thereof
A semiconductor memory device includes: a memory array including a plurality of memory cells, the memory cells being in any of a high resistance state (HRS) and a low resistance state (LRS); a reference array including a plurality of reference cells, the memory cells and the reference cells having the same impedance-temperature relationship, the reference cells being in a middle resistance state between HRS and LRS; an average circuit configured for averaging respective reference currents from the reference cells of the reference array into an average reference current; and a comparator configured for comparing a plurality of respective memory currents from the memory cells of the memory array with the average reference current to obtain a plurality of output data of the memory cells of the memory array and to determine respective impedance states of the memory cells of the memory array. |
| US09947396B2 |
Nonvolatile storage device and method of controlling the same
To improve a reading speed and a writing speed while preventing occurrence of disturbance in a resistance storage element, specifically, a nonvolatile storage device that has a memory having at least one nonvolatile resistance storage element and a control unit configured to write a high resistance state or a low resistance state to the resistance storage element, wherein the control unit applies a bias to the resistance storage element in a verification operation carried out after writing the high resistance state, or applies a bias to the resistance storage element in a verification operation carried out after writing the low resistance state, these biases being in directions opposite to each other. |
| US09947391B1 |
SRAM based physically unclonable function and method for generating a PUF response
A physically unclonable function (PUF) is implemented in a plurality of SRAM cells. In a method for generating a PUF response, a logic zero is first written to all the SRAM cells of the PUF. A bit line coupled to the storage node that stores the logic zero of each SRAM cell is biased to a predetermined voltage. The bit lines are then selected for an evaluation read operation. During the evaluation read, a read current of one of the bit lines from one column is converted to a first voltage and a read current of another bit line of another column is converted to a second voltage. The first voltage is then compared to the second voltage. A logic state of a bit of the PUF response is determined as a result of the comparison. The logic bit may be provided to the input of a parallel-in serial-out shift register. There may be a comparator for each logic bit, or a few comparators may be shared between the logic bits. The PUF response may be used to provide a signature for the data processing system. The back-bias of each cell may be selectively adjusted. |
| US09947390B2 |
Structure and methods of operating two identical 4T random access memories storing the same data
The random access memory includes: two identical memory cell arrays, a data write circuit and a data read circuit. Array structures of the two identical memory cell arrays are the same, and same original stored information is stored in memory cells with a same address in the two identical memory cell arrays. The data write circuit is configured to write same data into the memory cells with the same address in the two identical memory cell arrays. The data read circuit is configured to select two pieces of stored information from the memory cells with the same address in the two identical memory cell arrays, and to output “0” if the two pieces of stored information are different or output one of the two pieces of stored information if the two pieces of stored information are the same. |
| US09947389B1 |
Single ended memory device
A memory device includes a memory cell that is configured to store a data bit, comprising at least one read transistor that is configured to form either a discharging path or a leakage path when the data bit is read; a conductive line coupled to the read transistor; and at least a first track transistor, coupled to the conductive line, and configured to provide a first current signal having a first current level that tracks a second current level of a second current signal, wherein the second current signal is provided when either one of the discharging and leakage paths is formed, and wherein the first the second current signals are used to determine a logical state of the data bit. |
| US09947380B2 |
Adjustable read reference voltage to reduce errors in memory devices
According to one embodiment, a memory includes a magnetoresistive element, a reference cell, a sense amplifier comparing a first current flowing in the magnetoresistive element with a second current flowing in the reference cell, a first transistor having a first control terminal controlling a value of the first current, a second transistor having a second control terminal controlling a value of the second current, and a controller applying a first potential to the first control terminal and a second potential to the second control terminal in a first operation, and applying the first potential to the first control terminal and a third potential larger than the second potential to the second control terminal in a second operation. |
| US09947374B2 |
Semiconductor devices and semiconductor systems including the same
A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a power supply voltage and first data. The second semiconductor device generates a control voltage whose level is adjusted in response to the power supply voltage. The second semiconductor device also receives the first data to generate second data having a swing width different from a swing width of the first data. The second data being driven is controlled by the control voltage. |
| US09947372B2 |
Semiconductor device managing power budget using bi-directional ring structure and operating method thereof
A semiconductor device includes a plurality of chips including first and second chips, each of the first and second chips including a first input terminal receiving a first token input signal, a first output terminal outputting a first token output signal, a second input terminal receiving a second token input signal, and a second output terminal outputting a second token output signal. The first and second chips are coupled to each other in a bi-directional ring structure such that the first output terminal of the first chip is coupled to the first input terminal of the second chip and the second output terminal of the second chip is coupled to the second input terminal of the first chip. Each of the first and second chips performs a corresponding peak zone operation according to the first token input signal and the second token input signal. |
| US09947371B1 |
Compact tool-less HDD carrier
A computing device with a drive slot having an ear with a vertical receiving groove, a connector for engaging a corresponding connector of a hard disk drive (HDD), and a horizontal track with a pin insertion portion and a pin retaining portion. The computing device also includes a removable a HDD carrier for insertion into the drive slot having a bracket for securing the HDD and a track pin extending therefrom and configured to be inserted into the horizontal track via the pin insertion portion and configured to restrict the removable HDD carrier to horizontal motion when the track pin engages with the pin retaining portion. The HDD carrier includes a handle pivotably attached to the bracket with a guide pin for inserting into the vertical receiving groove and configured to alternate between a loading position and a locked position. |
| US09947370B1 |
Hard disk drive support in USB enclosure to improve vibration isolation
A hard disk drive assembly having a hard disk drive positioned within an external housing. Isolators formed of a resilient material, such as an elastomeric material, are interposed between the hard disk drive and an external housing. The isolators also preferably having a plurality of openings that extend there through that lower the stiffness of the isolators during small deflections such as those caused by vibrations, but large deflections, such as those caused by shocks cause the openings or holes to close there by generating greater stiffness is response to external shocks. |
| US09947368B2 |
Information processing apparatus, information processing method, and non-transitory computer readable medium
An information processing apparatus includes a receiving unit that receives, during or after reproduction of a video, a predetermined operation with respect to the video, an associating unit that associates the received operation with a reproduction location where the received operation has been generated in the video, and a setting unit that sets in response to the received operation an importance degree of the reproduction location associated with the received operation. |
| US09947362B1 |
Asynchronous interference cancellation
A system may include an interpolator circuit configured to receive a first signal with a first rate and to generate an interpolated signal with a second rate. The system may include a cancellation circuit configured to determine an interference component signal based on the interpolated signal. The system may further comprise an adder configured to receive a second signal with the second rate and to cancel interference in the second signal using the interference component signal to generate a cleaned signal. |
| US09947356B1 |
Calibration spiral to improve guide spiral placement
A method of writing servo spirals for spiral-based self-servo writing includes determining control parameters for controlling movement of a write head between a first and a second disk radial location at a first velocity, writing a first spiral while controlling the movement of the write head between the first and the second disk radial location at the first velocity according to the determined control parameters, writing a second spiral while controlling movement of the write head between the first and the second disk radial location at a second velocity that is different from the first velocity, based on timing and location information from the first spiral, and writing a third spiral while controlling movement of the write head between the first and the second disk radial location at the first velocity according to the determined control parameters and based on timing and location information from the second spiral. |
| US09947355B2 |
Encoding information on tape using write offset gaps
As disclosed herein a method for encoding information on tape using write offset gaps. The method includes receiving a request to write a dataset on a tape medium using a plurality of head groups, and identifying information to be encoded when writing the dataset. The method further includes determining a head group offset pattern that encodes the information, and writing the dataset using the head group offset pattern. Also disclosed herein is a method for decoding information on tape using write offset gaps. The method includes reading a dataset from a tape medium using a plurality of head groups, and determining a head group offset pattern used to read the dataset. The method further includes decoding information encoded in the head group offset pattern to provide decoded information. A computer program product corresponding to the above method is also disclosed herein. |
| US09947353B1 |
Magnetic recording system employing passive thermal asperity avoidance
An apparatus comprises magnetic recording disk surfaces and magnetic recording heads comprising a leading and a following head. A controller moves the heads so that the leading head, at a passive fly height, follows a first track of a first disk surface containing a passive thermal asperity (PTA), and the following head, at a passive fly height, follows a first track of a second disk surface. The PTAs on tracks of the second disk surface define virtual PTAs on corresponding tracks of the first disk surface. The controller moves the heads away from the respective first tracks and to neighboring tracks to avoid the PTA and virtual PTAs. The controller is configured to move the heads back to the respective first tracks so that a write or read operation can be performed by the leading head. |
| US09947351B1 |
Position detecting device for detecting position in accordance with periodically arranged information, position control device, disk storage device, and position detecting method
According to one embodiment, a position detecting device includes a detecting portion which periodically detects a plurality of pieces of information generated in accordance with positional information divided into upper digits and lower digits. The upper digits are further divided into a plurality of pieces of upper digit information equal to the number of the period. The pieces of the upper digit information are obtained in a predetermined order. The lower digits are obtained simultaneously with any one of the pieces of the upper digit information. The positional information is divided so that the number of values, which are obtainable in one piece of the upper digit information provided by dividing the upper digits, and a division number of the upper digits are coprime. |
| US09947349B2 |
Waveguid with tapered assistant layer
An apparatus includes a waveguide extending along a light-propagation direction between a light source and a media-facing surface. An assistant layer is configured to receive light from a light source, the assistant layer has a terminating end with a first taper that narrows toward the media-facing surface. A core layer has a coupling end configured to receive light from the assistant layer, the coupling end having a second taper that widens toward the media-facing surface. A middle cladding layer is disposed between the core layer and the assistant layer. A near field transducer is disposed proximate the media-facing surface and configured to receive the light from the core layer. |
| US09947345B2 |
Protecting a sensitive device from corrosion
A product according to one embodiment includes a tape having an applicator portion for applying an organic coating to a magnetic head; the organic coating on the applicator portion of the tape; and a lubricant on a data portion of the tape. The lubricant has a different composition than the organic coating. A method for protecting a magnetic head according to one embodiment includes applying an organic coating to a magnetic head using the foregoing product. |
| US09947343B1 |
Hard disk drive desledder
A hard disk drive desledder comprises a support and a cutting member. The support is configured to receive and to support a hard disk drive assembly that includes a hard disk drive and a sled. The cutting member has at least two cutting edges corresponding to respective portions of the sled. The cutting member is movable from a first position spaced apart from the support and a second position adjacent the support to cause the at least two cutting edges to cut portions of the sled to allow the hard disk drive to be removed from the hard disk drive assembly. Related desledding methods are also described. |
| US09947339B2 |
Method and apparatus for managing audio signals
A method comprising: detect a first acoustic signal by using a microphone array; detecting a first angle associated with a first incident direction of the first acoustic signal; and storing, in a memory, a representation of the first acoustic signal and a representation of the first angle. |
| US09947317B2 |
Pronunciation learning through correction logs
A new pronunciation learning system for dynamically learning new pronunciations assisted by user correction logs. The user correction logs provide a record of speech recognition events and subsequent user behavior that implicitly confirms or rejects the recognition result and/or shows the user's intended words by via subsequent input. The system analyzes the correction logs and distills them down to a set of words which lack acceptable pronunciations. Hypothetical pronunciations, constrained by spelling and other linguistic knowledge, are generated for each of the words. Offline recognition determines the hypothetical pronunciations with a good acoustical match to the audio data likely to contain the words. The matching pronunciations are aggregated and adjudicated to select new pronunciations for the words to improve general or personalized recognition models. |
| US09947312B1 |
Systems and methods for delivering text-based messaging via home automation devices
Various arrangements for providing a text-based message to a recipient as synthesized speech are provided. A home automation host server system may receive a text-based message addressed to a designated vocalization destination from an electronic address associated with a sender. The text-based message may be filtered to determine that the text-based message is eligible for output as synthesized speech. A home automation device linked with the designated vocalization destination may be identified. Data corresponding to the text-based message addressed to the designated vocalization destination may be transmitted to the home automation device. The home automation device may be caused to output at least a portion of the text-based message as synthesized speech. |
| US09947310B2 |
Acoustic conversion device for active noise control
An acoustic conversion device for an active noise control is provided. The acoustic conversion device can effectively suppress or remove noise by controlling variation in a lowest resonance frequency. A volume of a closed space is smaller than an equivalent compliance air volume of a speaker unit. Therefore, motion of a vibration plate, an edge and a damper is suppressed, it is possible to restrain the edge and the damper from being deteriorated with time, variation in lowest resonance frequency can be suppressed, phase of emitted sound can be less prone to be deviated from opposite phase of noise, and it is possible to effectively suppress or remove noise. |
| US09947304B1 |
Spatial harmonic system and method
The present disclosure provides a system and method for representing music in a three dimensions using contexts based around tonal centers, to form three dimensional geometric shapes. The musical notation method described herein is easy to understand and visualize. The method is based on three dimensional structures which may represent contexts. The contexts may be formed by combining diminished and augmented scales shown as symmetrical three dimensional geometric shapes. These symmetrical geometric shapes may be formed from a plurality of polygons, which may include polygons comprised of a set of related notes from a diminished or augmented scale, together forming a looped harmonic polygon. Each note in a respective scale is placed at a vertex of a harmonic polygon, wherein the vertices of the harmonic polygons are selected from notes in a twelve note chromatic scale. |
| US09947302B2 |
Pedalboard support for electric instruments
A pedalboard support for electric instruments includes at least two end pieces, and at least two parallel longitudinal sections, each of which has a top surface to support pedals and at least two lower grooves forming open channels to receive attachment means. The at least two parallel longitudinal sections include at least a longitudinal groove on the top surface forming a channel which is open to the exterior. Each of the at least two end pieces joins the at least two parallel longitudinal sections together at respective ends through attachments placed in the open channels. |
| US09947299B2 |
System and method for offline content delivery through an active screen display
A system and method for offline content delivery through an active screen display is provided. Data for display and content to be displayed at a later time are encoded as a display signal for delivery. An active screen display is associated with a computer and coupled to a processor over a physical display interface connection. The display signal is received and decoded to distinguish the data for display from the content to be displayed at a later time. The content to be displayed at a later time is displayed via the active screen display when the computer is one of turned off and inactive. |
| US09947293B2 |
Systems and methods of reduced memory bandwidth compensation
What is disclosed are systems and methods of compensation of images produced by active matrix light emitting diode device (AMOLED) and other emissive displays. Sub-sampling of pixel measurement data utilized in compensation of the display is utilized to reduce the data bandwidth between memory and a compensation module where the data is locally interpolated. |
| US09947291B2 |
System and method for multi-computer control
A system for a multi-computer control according to an exemplary embodiment may include: an integrated process server to receive, from one or more computer terminals, display information including video data and terminal identification information through a physical layer transceiver, multiplex and serialize the received display information, transmit the multiplexed and serialized display information to a user process terminal, and transmit a received user input signal to a corresponding computer terminal; and the user process terminal to mix the display information and the multi-control interface, display, on a display device, the execution screens of the activated computer terminals, and transmit the user input signal to the integrated process server along with corresponding terminal identification information, wherein the display information is received from the integrated process server, and the user input signal is received from an input device. |
| US09947287B2 |
Transparent display device
A transparent display device for compensating for external environmental effects, such as color background overlapping, interference due to external light, and the like, which have an effect on an image, provides an original image with a minimized distortion to a viewer. According to the present disclosure, one or more sensors are provided on a front surface and a rear surface of the transparent display device to detect the viewer's line of sight and background, and to compensate for a distortion of the image based on color coordinates estimated according to the detection results, thereby providing an image with higher quality. |
| US09947286B2 |
Display driving apparatus and method for driving display apparatus
A display driving apparatus and a method for driving display apparatus are provided. Source drivers generate abnormality-notify signals according to driving signals. A timing controller determines the source drivers received abnormal driving signals according to the abnormality-notify signals and a horizontal synchronizing signal and adjusts the driving signals corresponding to the source drivers received the abnormal driving signals. |
| US09947285B2 |
Voltage converter and display device including the same
A voltage converter includes a conversion unit, a self driver and an output unit. The conversion unit includes at least one inductor and provides a boosting power based on an input voltage and a first driving signal. The self driver includes at least one inductor that forms a magnetic coupling with the at least one inductor of the conversion unit. The self driver generates a second driving signal that is synchronized with the first driving signal through the magnetic coupling. The output unit generates an output voltage based on the boosting power and the second driving signal. Switching loss and conduction loss may be reduced by replacing an output diode with an output transistor and voltage spike and electromagnetic interference may be reduced through zero voltage switching. The driving signal of the output transistor may be controlled efficiently by adjusting the inductance of the driving inductor. |
| US09947280B2 |
TFT array substrate
A thin-film transistor (TFT) array substrate is provided. The TFT array substrate is structured to change the way that sub-pixels are arranged so that during a displaying period of a frame of image, the sub-pixels that have inconsistent brightness/darkness become alternate with each other spatially so that a displaying defect of vertical bright/dark lines can be improved and the overall resistance of the data line can be reduced to thereby reduce resistance-capacitance delay and prevent incorrect charging at a tail end of a scan line or a data line. |
| US09947279B2 |
Data-holding circuit and substrate for a display device
A display device has a data-holding circuit with a capacitance and a display portion with a plurality of pixel electrodes, formed on a first carrier substrate. In the display device, a second carrier substrate disposed opposite the first carrier substrate is placed above the display portion, but the opposing substrate is not present above the area in which the data-holding circuit is disposed. The parasitic capacitance of the data-holding circuit can thereby be reduced. Therefore, the capacitance in the data-holding circuit can be reduced and the area required can be reduced as well. The display data of all the pixels is sent serially to the liquid crystal module without high-speed transfer for each frame time interval, and size can be reduced because the controller IC and interface circuit are formed on the same substrate as the display device substrate. |
| US09947275B1 |
Real-time white point correction for tablet display
A method and apparatus are explained for performing white point color adjustment for a display device. This can be done by obtaining a value of an ambient light sensor, determining whether to make a white point adjustment, and, for a dynamic white point adjustment, using the value from the ambient light sensor in performing white point adjustment toward target color coordinates. A white point might be set equal to the target color coordinates, but might also remain unchanged for small ambient light changes or ambient light outside a region of interest. The white point might be changed to the target color coordinates in multiple steps. Various parameters might be used that can be varied to vary behavior of the white point adjustment. |
| US09947274B2 |
Gate driver and display device having the same
A gate driver includes a plurality of stages outputting a plurality of gate output signals, respectively. Each stage includes a first input circuit applying an input signal to a first node in response to a first clock signal, a second input circuit applying the first clock signal to a second node in response to a voltage of the first node, a first output circuit controlling a gate output signal to a first logic level in response to the voltage of the first node, a second output circuit controlling the gate output signal to a second logic level in response to a voltage of the second node, and a leakage current blocking circuit applying a first power voltage corresponding to the first logic level to the first input circuit in response to the voltage of the first node. |
| US09947273B2 |
Voltage drop compensation method, voltage drop compensation device, and display device
The present disclosure provides a voltage drop compensation method, a voltage drop compensation device and a display device. The voltage drop compensation method includes steps of determining a voltage drop for a power signal corresponding to each subpixel set; determining a first equivalent brightness reduction value corresponding to the voltage drop; calculating an initial brightness value for each subpixel in the subpixel set; calculating a sum of the first equivalent brightness reduction value corresponding to the subpixel set and the initial brightness value as a target brightness value for each subpixel in the subpixel set; and generating a driving signal for each subpixel in accordance with the target brightness value for each subpixel in the subpixel set, and outputting the driving signal. |
| US09947270B2 |
Pixel circuit, display device, and method of driving pixel circuit
A pixel circuit, display device, and method of driving a pixel circuit enabling source-follower output with no deterioration of luminance even with a change of the current-voltage characteristic of the light emitting element along with elapse, enabling a source-follower circuit of n-channel transistors, and able to use an n-channel transistor as an EL drive transistor while using current anode-cathode electrodes. The circuit includes a source of a TFT used as a drive transistor that is connected to an anode of a light emitting element, and a drain of the TFT is connected to a power source potential. A capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT used as a switching transistor. |
| US09947265B2 |
Electroluminescent display device and method of driving the same to compensate for degeneration of pixels
A method for driving an electroluminescent display device includes grouping pixels in a display panel into a plurality of pixel groups, each pixel group including a plurality of rows and a plurality of columns. Accumulated block stress values are provided based on input image data. Each accumulated block stress value represents a degree of degeneration of the pixels in each pixel block. Corrected stress values are provided by correcting each accumulated block stress value based on the accumulated block stress values of the adjacent pixel blocks. Input image data is corrected based on the corrected stress values. |
| US09947259B2 |
Ambient light adaptive displays
An electronic device may include a display having an array of display pixels and having display control circuitry that controls the operation of the display. The display control circuitry may adaptively adjust the display output based on ambient lighting conditions. For example, in cooler ambient lighting conditions such as those dominated by daylight, the display may display neutral colors using a relatively cool white. When the display is operated in warmer ambient lighting conditions such as those dominated by indoor light sources, the display may display neutral colors using a relatively warm white. Adapting to the ambient lighting conditions may ensure that the user does not perceive color shifts on the display as the user's vision chromatically adapts to different ambient lighting conditions. Adaptively adjusting images in this way can also have beneficial effects on the human circadian rhythm by displaying warmer colors in the evening. |
| US09947258B2 |
Image processing method and image processing apparatus
An image processing method is provided. The image processing method includes: performing dynamic brightness control on an input image to determine a brightness gain for the input image; performing texture analysis on the input image based on blocks to determine filter indexes for the input image; performing color conversion with edge protection on the input image according to the brightness gain; and performing sub-pixel adjustment on the input image according to the filter indexes and a pixel arrangement of a display panel, so as to output an output image. An image processing apparatus is also provided. |
| US09947246B1 |
Sign for displaying changeable information
A display sign mountable on a support surface where at least some of the information displayed thereon needs to be changed periodically. The sign includes a housing with one or more pockets defined therein, where an interior of each pocket is visible through an associated window on the housing. A set of display cards is receivable in each pocket in the housing. Each display card has different text or graphics thereon. Individual display cards may be selectively withdrawn from the set of display cards by grasping a tab on that particular display card and pulling the display card out of the pocket. The removed display card may be inserted in front of an outermost display card that was previously visible through the associated window. A single display card that is free of tabs may be inserted into one of the pockets and remain substantially permanently visible through the associated window. |
| US09947245B1 |
Corrugated signage
A corrugated display sign with a former panel secured to a backer panel. The former panel includes a central section opposed by two lateral sections, two support members partially cut away from the central section and maintaining a connection with the central section via at least one fold line, and two or more preformed slots, with one slot positioned adjacent to the support members. The display sign further includes a graphic panel operable to be wrapped around exterior edges of the lateral sections, and having ends secured to the backer panel. The display sign is capable of being erected from a knockdown configuration to an erected configuration by folding the lateral sections away from the central section and wrapping the graphic panel about the lateral sections. |
| US09947244B2 |
Adjustable spine joint assembly for crash test dummy
An adjustable spine joint assembly for a crash test dummy includes an upper member adapted to be operatively connected to an upper thoracic portion of a spine of the crash test dummy, a lower member adapted to be operatively connected to a lower thoracic portion of the spine of the crash test dummy, a center pivot bolt pivotally connected to the lower member and the upper member to allow rotational movement therebetween, and a self-locating adjustment mechanism cooperating with the upper member and the lower member to allow adjustment of a plurality of fixed joint angles between the upper member and the lower member. |
| US09947243B1 |
Fall-direction mannequin training system with fall-direction control and/or randomization
A system comprising a mannequin and a plurality of sensors coupled to the mannequin configured to generate at least one sensed signal. The system includes first and second latching mechanisms independently controlled, each of the first and second latching mechanisms having a latched state and an unlatched state; and first and second pins providing an axis of rotation, the first pin releasably coupled to the first latching mechanism and the second pin releasably coupled to the second latching mechanism. A computing device is coupled to the plurality of sensors and first and second latching mechanisms via communication interfaces. The computing device selects a fall-direction from a plurality of different fall-direction options based on at least one sensed signal and causes the unlatching of the first latching mechanism to release the first pin or the second latching mechanism to release the second pin based on the selected fall-direction. |
| US09947242B2 |
Method for producing anatomical phantoms with constituents having variable densities
The present disclosure discloses a method of producing an anatomical phantom of an anatomical part having components of different density. The method includes providing a mold of an anatomical part, providing a mold having a size and shape corresponding to a first constituent of the anatomical part. A first liquid is place into the constituent mold and frozen which is placed into the larger anatomical mold and supported in a location corresponding to an actual location of the part in an actual anatomical part. The larger mold is then filled with a second liquid, which forms a gel after a freeze/thaw cycle, to encase the frozen first liquid in the second liquid and the temperature is dropped to freeze the second liquid. The combination is then thawed to produce an anatomical phantom of the anatomical part having a continuous seam between the first constituent part and a remainder of the anatomical part represented by the polyvinyl alcohol based gel. The first and second liquids have a composition such that upon undergoing one freeze thaw cycle, products resulting from the freeze thaw cycle have different densities approximating different constituents of the anatomical part with the second product being a gel encapsulating the first product. |
| US09947237B2 |
Electronic push-button contrabass trainer
A stringless portable electronic training device for a stringed instrument, such as a contrabass, has the shape of a fingerboard with just enough neck to provide realistic left hand position, and just enough body to contain actuators corresponding with strings, electronics, a speaker, and an output jack. On the fingerboard are rows of push buttons corresponding with the location of the notes. The push buttons are held down to select notes which are sounded by actuators at a lower end of the fingerboard. Actuating without the pressing of a button produces the note of the open string. The actuators may include a set of flippers that replicate the plucking of strings and a set of elongated buttons that sustain a bowed sound as they are pressed down. The sound is produced electronically through a built-in speaker and/or output jack. |
| US09947229B2 |
Managing flight paths of a soaring aircraft
Disclosed is a novel system and method for adjusting a flight path of an aircraft. The method begins with computing a flight path of an aircraft from a starting point to an ending point which incorporates predicted weather effects at different points in space and time. An iterative loop is entered for the flight path. Each of the following steps are performed in the iterative loop. First lift data is accessed from a fine-grain weather model associated with a geographic region of interest. The lift data is data to calculate a force that directly opposes a weight of the aircraft. In addition, lift data is accessed from sensors coupled to the aircraft. The lift data is one or more of 1) thermal data, 2) ridge lift data, 3) wave lift data, 3) convergence lift data, and 4) a dynamic soaring lift data. Numerous embodiments are disclosed. |
| US09947228B1 |
Method for monitoring blind spot of vehicle and blind spot monitor using the same
A method of monitoring a blind spot of a monitoring vehicle by using a blind spot monitor is provided. The method includes steps of: the blind spot monitor (a) acquiring a feature map from rear video images, on condition that video images with reference vehicles in the blind spot are acquired, reference boxes for the reference vehicles are created, and the reference boxes are set as proposal boxes; (b) acquiring feature vectors for the proposal boxes on the feature map by pooling, inputting the feature vectors into a fully connected layer, acquiring classification and regression information; and (c) selecting proposal boxes by referring to the classification information, acquiring bounding boxes for the proposal boxes by using the regression information, determining the pose of the monitored vehicle corresponding to each of the bounding boxes, and determining whether a haphazard vehicle is located in the blind spot of the monitoring vehicle. |
| US09947224B2 |
Reporting road event data and sharing with other vehicles
Example systems and methods allow for reporting and sharing of information reports relating to driving conditions within a fleet of autonomous vehicles. One example method includes receiving information reports relating to driving conditions from a plurality of autonomous vehicles within a fleet of autonomous vehicles. The method may also include receiving sensor data from a plurality of autonomous vehicles within the fleet of autonomous vehicles. The method may further include validating some of the information reports based at least in part on the sensor data. The method may additionally include combining validated information reports into a driving information map. The method may also include periodically filtering the driving information map to remove outdated information reports. The method may further include providing portions of the driving information map to autonomous vehicles within the fleet of autonomous vehicles. |
| US09947221B1 |
Systems and methods of vehicular communication
Vehicular communication systems and methods are disclosed, including one or more media devices. A host device inside a vehicle is coupled to a media device that is adaptable to being mounted to the vehicle. The media device includes a display configured to display a default image. The host device is configured to receive data associated with a predefined direction of the vehicle from vehicle operation sensors on the vehicle and receive traffic data from one or more application servers. In response to the data, the host device determines a vehicle status and transmits media content to be presented on the display, including at least one road sign. The host device is further configured to establish a link with a second media device including a display and transmit instructions to project the media content. |
| US09947216B2 |
Pedestrian safe crossing vehicle indication system
An indicator system and method for a vehicle is provided that uses forward-directed indicators to signal to pedestrians when the vehicle is yielding to crossing pedestrians. The system monitors the vehicle brakes and the speed of the vehicle. One or more sets of indicator lights are deployed along the forward portion of the vehicle. When the vehicle brakes are applied, one set of indicator lights is energized. When the vehicle speed slows below a defined speed to indicate yielding, either a second set of indicators illuminate or the first set is pulsed. The second set of indicators is a different color than the first, and can pulse or energize statically. The indicator lights are preferably green in color when energized to indicate yielding to pedestrians, providing a positive signal that it is safe to cross the road in front of the vehicle. |
| US09947211B1 |
Personal panic alarm system
The personal panic alarm system is a personal domestic article that is carried or worn by an individual. The personal panic alarm system is adapted for use with a personal data device. The personal panic alarm system further comprises a panic button. When the panic button is activated, the panic button initiates a Bluetooth signal to the personal data device the personal panic alarm system is associated with initiating a predetermined automated communication link. The personal panic alarm system comprises a housing, a switch, a transceiver, a logic module, a battery, and an application. |
| US09947209B2 |
Window alarm
The invention relates to an alarm for detecting damage to a multiple glazed unit comprising: a humidity sensor; and a movement sensor in which, when the movement sensor detects movement of the glazed unit, the humidity sensor compares the current detected humidity in the glazed unit with a previously stored detected humidity, and if the humidity has changed by a predetermined threshold, a damage alarm is triggered. |
| US09947206B2 |
Electronic device and control method thereof
An electronic device with a display screen is provided and the device includes an infrared light emitter for emitting infrared light; and an infrared light receiver configured corresponding to the infrared light emitter such that the infrared light receiver receives infrared light emitted by the infrared light emitter when the electronic device is not deformed or deformation of the electronic device is not greater than a preset threshold. A control unit is connected with the infrared light emitter and the infrared light receiver for transmitting first information to an operation system of the electronic device when the infrared light emitter emits infrared light but the infrared light receiver does not receive the infrared light. The electronic device enables detecting deformation of electronic devices using infrared light, so that damage to the screens of the electronic devices can be avoided as soon as possible. |
| US09947204B2 |
Validation of mechanical connections
A connection validation apparatus includes a connector engagement mechanism configured to physically engage a connector to connect the connector to a connector interface. The apparatus further includes a connection indication detector located on the connector engagement mechanism and configured to detect at least one of a sound and a vibration corresponding to a secure connection of the connector with the connector interface. The apparatus also includes a connection indicator output unit configured to provide an indication to a user that the connector is securely connected with the connector interface based on the detection of the at least one of the sound and the vibration by the connection indication detector. |
| US09947200B2 |
Method and process for determining whether an individual suffers a fall requiring assistance
A method for monitoring an individual in a dwelling so as to know when such individual falls or indicates the need of assistance. A plurality of 3D motion and sound sensors are located in the dwelling and provide data to a computerized monitoring system. The sensors are configured to recognize one or more biometric identifiers of the individual being monitored. When the monitoring system detects that the individual has fallen or gestured, a computerized communication system contacts the individual to determine the need to send assistance to help the individual. Where assistance is required the system automatics contacts the previously designated caregiver for the individual and can also contact emergency personnel. |
| US09947196B2 |
Wireless asset tracking systems with heterogeneous communication
An asset tracking system that utilizes a wireless network system and has primary (main) and secondary (sub) tracking devices or ‘tags’ that are assigned to assets. The main tracking device acts as a coordinator and the sub tracking devices surrounding the coordinator act as end-devices. Each main device acts as a gateway network to long range communication while each sub device can only communicate in proximity profile (short range or nearby communication). Each sub device can communicate only with a main device. The main device passes data from the sub device to a remote host transparently. Each sub device sends its data when it triggered by a ‘ping’ from the main device. |
| US09947194B2 |
Methods, devices, kits and systems for modulating activation of self-alarming tags
Modulating the activation of an anti-theft self-alarming tag linked to an article is provided by a input/output interface In communication with the self-alarming tag for transmitting a deactivation signal to the self-alarming tag for deactivation thereof upon the request of a user. A processor is in communication the input/output interface for control thereof. The processor is in communication with a database comprising information on whether the article has been purchased or not for receiving purchase information therefrom. The processor Is configured to allow the input/output interface to transmit the deactivation signal to the self-alarming tag if the article linked therewith has been purchased and to prevent the input/output interface from transmitting the deactivation signal to the self-alarming tag if the article linked therewith has not been purchased. |
| US09947193B2 |
Electronic article surveillance (EAS) assembly installable in product processing workstation, and method of installation
An electronic article surveillance (EAS) assembly is installable in a workstation that processes products associated with targets to be electro-optically read. The assembly includes a radio frequency (RF) antenna having a pair of RF feed lines and a conductive loop for generating an electromagnetic field to deactivate EAS tags associated with the products to be processed, and a protective carrier for supporting and protecting the antenna during the installation in a predetermined position in the workstation. |
| US09947192B2 |
Metal-theft detection device
A metal-theft detection device includes a first sensing terminal configured to be electrically coupled with an earth wire of a mains electricity circuit, a second sensing terminal configured to be electrically coupled with a neutral wire of the mains electricity circuit, a wireless communications module, and circuitry configured to measure a resistance of a conductive path connected between the first and second sensing terminals, and to cause the wireless communications module to transmit a wireless message based on the measured resistance. |
| US09947190B2 |
System and methods for correlating sound events to security and/or automation system operations
A method for security and/or automation systems is described. In one embodiment, the method may include detecting a first sound event at a home entry point using one or more sensors. The method may further include receiving input to associate at least one home automation system operation with the first sound event, and may further include storing the first sound event. The method may further include initiating the at least one home automation system operation associated with the first sound event. |
| US09947184B2 |
Enabling interchangeability of sensor devices associated with a user device
A user device may detect a connect event associated with a sensor device. The user device may be associated with a first sensor, and the sensor device may be associated with a second sensor. The user device may identify the second sensor based on detecting the connect event associated with the sensor device. The user device may replace the first sensor with the second sensor based on identifying the second sensor associated with the sensor device. The user device may provide data associated with the second sensor for use by an application of the user device. |
| US09947182B2 |
Medium processing device and medium transaction device
A medium processing device includes a storage cassette, a casing for storing the storage cassette, a loading section that supports the storage cassette, a slide rail attached to the casing and the loading section, and that allows the loading section to move between the interior and the exterior of the internal space, and a connector. The connector is outside of a pass-through region through which the storage cassette passes in a case where loading the storage cassette into the loading hole of the loading section, and that, when the storage cassette has been loaded into the loading hole and is supported by the loading section, electrically connects the loading section and the storage cassette together. A protective portion is at the loading section, and protrudes out further than the connector in an opposite direction opposite to a loading direction in which the storage cassette is loaded into the loading hole. |
| US09947178B2 |
Systems for implementing enhanced gaming and prizing parameters in an electronic environment
System and methods are provided for effecting user experience in an electronic game environment through use of virtual currency or vCoins. In a multi-level game, the systems and methods include memory for storing information on game play, the information including input received from the user, information relating to levels within the multi-level game and game display information for output to the user. A processor is coupled to the memory for generating game play information, preferably including game play with virtual money. The virtual money is acquired through game play or cash purchase. The virtual money is convertible into a non-cash good comprising advancement to another level within the game. |
| US09947172B2 |
Game machine, and control method of controlling computer and computer program used therefor
A game machine includes a display device that displays a game screen in which virtual reels formed by symbols are arranged so as to correspond one-to-one to cells as symbol stop positions. And, a game machine determines the symbol to stop in each cell through drawing, and controls a movement to change the symbol and a stop of the movement for each virtual reel based on a drawing result. Furthermore, a game machine determines a number of specific symbols that stop in the cells, and controls a movement of each virtual reel, which causes the specific symbols to appear in the cells, as one virtual reel group and a stop of the movement in units of virtual reel group. |
| US09947171B2 |
Gaming method and gaming apparatus with in-game player stimulation
A method for operating a gaming apparatus includes displaying a set of stopped reels in place of one or more spinning reels, each stopped reel having at least one symbol thereon and the total number of stopped reels being less than the total number of reels originally spinning. The method also includes determining an in-game outcome associated with a configuration of the symbols on the set of stopped reels, and providing an in-game stimulation selected from the group consisting of a 3-dimensional aural stimulation, a visual stimulation, a value stimulation and a physical stimulation according to the in-game outcome. The method further includes displaying stopped reels in place of all of the spinning reels, determining a game outcome associated with the configuration of the symbols on all of the stopped reels, and determining a value payout based on the game outcome. The apparatus is also included. |
| US09947160B2 |
Systems and methods for wirelessly transmitting token data to a key card reading device
A mobile computing device for transmitting token data to a key card reading device having an activation mechanism is provided. The computing device is programmed to receive token data representing access data of a key card, generate a transmission signal representing the access data of the key card based on the token data in response to receiving the token data, and output the transmission signal to the key card reading device. The access data causes the key card reading device to activate the activation mechanism. The transmission signal causes the key card reading device to activate the activation mechanism when the mobile computing device is placed near the key card reading device and the transmission signal is authenticated by the key card reading device. |
| US09947159B2 |
Systems and methods for adding a trainable transceiver to a vehicle
A system for installation in a vehicle and for controlling a remote device includes a trainable transceiver and a remote button module. The trainable transceiver base station configured to be mounted in the vehicle at a first location and the remote button module separated from the base station and configured to be mounted in the vehicle at a second location. The remote button module is configured to wirelessly transmit a command signal to the base station in response to receiving a user input at a user input device, and the base station responds to receiving the command signal by transmitting an activation signal to the remote device, wherein the activation signal is formatted to control the remote device. |
| US09947152B2 |
Vehicle visual and non-visual data recording system
The system described in this invention can be used for monitoring and analyzing real time visual and non-visual information pertaining to the occupant, vehicle, and surroundings prior to, during and post eccentric operating conditions for a given period of time. The system stores vehicle and occupant data from sensors throughout the vehicle and also makes use of existing vehicle sensors that may already be present in the vehicle. The invention also includes a video recording module that makes use of a fish-eye camera to capture video from the inside and the outside of the vehicle. Real-time data analysis is performed to detect and to recognize vehicle occupants, and recognize impending eccentric events. Vehicle, occupant, and video data are stored in circular buffers. When an eccentric event, a collision for example, has been detected, the device continues to record data and video for a fixed period of time. Once this time has elapsed, the data is transferred from volatile to non-volatile memory for later retrieval. A computer may be used to retrieve and display the vehicle and occupant data in a synchronization with the video data for the purposes of accident recreation, driver or vehicle monitoring. |
| US09947149B2 |
Proactive driver warning
A system for warning a driver comprises an input interface and a warning determiner. The input interface is to receive a set of warnings, wherein a warning of the set of warnings is associated with a road segment and a set of conditions. The warning determiner is to determine that a current location matches the road segment associated with the warning and, in the event that it is determined to warn a driver based at least in part on the warning and the set of current conditions, to indicate to warn the driver. |
| US09947142B2 |
Methods and systems for generating a patch surface model of a geometric structure
The present disclosure provides systems and methods for generating a patch surface model of a geometric structure. The system includes a computer-based model construction system configured to be coupled to a device that includes at least one sensor configured to acquire a set of original location data points corresponding to respective locations on a surface of the geometric structure, the computer-based model construction system further configured to generate a reference surface based on the acquired original location data points, subdivide the reference surface into a plurality of triangles, project at least some of the original location data points onto a respective nearest point on the subdivided reference surface, compute a function that morphs the projected location data points towards the original location data points to generate a patch surface model, and determine a boundary for the patch surface model. |
| US09947141B2 |
Method of image processing for an augmented reality application
An apparatus for and method of image processing in an augmented reality application is provided. The method includes the steps of: providing at least one image of a real environment; performing image processing in an augmented reality application with the at least one image employing visualization of overlaying digital information with visual impressions or the image of the real environment and employing vision-based processing or tracking; and adjusting at least one of a parameter and operating flow of the vision-based processing or tracking depending on at least one of the following: a usage of the image processing, a usage of the visualization, a visually perceivable property of the digital information or the real environment, a property of a display device employed in the visualization, or a manner in which a user is viewing the visualization. |
| US09947140B2 |
Connection method, visualization system and computer program product
A method for a measurement or production setup includes providing a visualization system with a processor, an output device and a capturing module for capturing identification data of a working space. The method further provides a first setup component having at least one first marker at the working space and provides a second setup component having at least one second marker at the working space and being connectable to the first setup component through at least one connection. The method captures identification data about the markers and identifies the markers. The processor retrieves digital information for the markers from a database and makes a decision on the connection of the setup components based on the retrieved digital information and the captured identification data. The method then outputs a visual representation of the connection between the first and second setup components according to the decision. |
| US09947139B2 |
Method and apparatus for providing hybrid reality environment
A method for generating a hybrid reality environment includes receiving data of a first user and a second user at different locations. The method also includes generating a scene of an augmented reality (AR) based environment that includes the first user and a virtual object related to the second user; and generating a scene of an augmented virtuality (AV) based environment that includes the virtual object related to the second user and a virtual object related to the first user. The method further includes sending signals for displaying the scene of the AR based environment to the first user and displaying the scene of the AV based environment to the second user such that the first user can interact with the virtual object related to the second user in real time and the second user can interact with the virtual object related to the first user in real time. |
| US09947135B2 |
Close-out audit systems and methods for cell site installation and maintenance
A close-out audit method performed at a cell site subsequent to maintenance or installation work includes, subsequent to the maintenance or installation work, obtaining video capture of cell site components associated with the work; subsequent to the video capture, processing the video capture to obtain data for the close-out audit, wherein the processing comprises identifying the cell site components associated with the work; and creating a close-out audit package based on the processed video capture, wherein the close-out audit package provides verification of the maintenance or installation work and outlines that the maintenance or installation work was performed in a manner consistent with an operator or owner's guidelines. |
| US09947128B2 |
Methods for improving accuracy, analyzing change detection, and performing data compression for multiple images
A multi-temporal, multi-angle, automated target exploitation method is provided for processing a large number of images. The system geo-rectifies the images to a three-dimensional surface topography, co-registers groups of the images with fractional pixel accuracy, automates change detection, evaluates the significance of change between the images, and massively compresses imagery sets based on the statistical significance of change. The method improves the resolution, accuracy, and quality of information extracted beyond the capabilities of any single image, and creates registered six-dimensional image datasets appropriate for mathematical treatment using standard multi-variable analysis techniques from vector calculus and linear algebra such as time-series analysis and eigenvector decomposition. |
| US09947125B2 |
Facial gesture driven animation communication system
Examples of systems and methods for transmitting facial motion data and animating an avatar are generally described herein. A system may include an image capture device to capture a series of images of a face, a facial recognition module to compute facial motion data for each of the images in the series of images, and a communication module to transmit the facial motion data to an animation device, wherein the animation device is to use the facial motion data to animate an avatar on the animation device. |
| US09947123B1 |
Transfer of rigs with temporal coherence
In various embodiments, a user can create or generate objects to be modeled, simulated, and/or rendered. The user can apply a mesh to the character's form to create the character's topology. Information, such as character rigging, shader and paint data, hairstyles, or the like can be attached to or otherwise associated with the character's topology. A standard or uniform topology can then be generated that allows information associated with the character to be transfer to other characters that have a similar topological correspondence. |
| US09947121B2 |
Image stitching
A computing device is described which has a memory holding at least two input images depicting different parts of a panoramic scene, the images having been captured by a user moving the camera by hand to capture the panorama. The computing device has an image stitching component configured to identify, at a processor, a region of overlap between the at least two images and to calculate a displacement vector for each of a plurality of warp points in the region of overlap. The image stitching component is arranged to warp a second one of the at least two images using the warp points; and to join the warped second image to the first image. |
| US09947118B2 |
Non-interferometric phase measurement
Techniques described herein are generally related to non-interferometric phase measurements of an optical signal. The various described techniques may be applied to methods, systems, devices or combinations thereof. Some methods for determining phase data of the optical signal may include transmitting the optical signal through a first optical element and obtaining first intensity data at a first focal plane of the first optical element by an optical sensor. Example methods may also include transmitting the optical signal through a second optical element. The second optical element may include a phase transformation mask. Example methods may further include obtaining a second intensity data at a second focal plane of the second optical element by the optical sensor and determining the phase data for the optical signal based on the first intensity data and the second intensity data. |
| US09947114B2 |
Modifying gradation in an image frame including applying a weighting to a previously processed portion of the image frame
An apparatus and methods for modifying gradation in an image frame determine a blend factor indicating a first weighting associated with a previously processed portion of the image frame. The apparatus and methods generate a weighted value associated with a current region of the image frame based on the current region of the image frame and based on applying the first weighting to the previously processed portion of the image frame so as to modify the gradation in the image frame. |
| US09947111B2 |
Method of multiple camera positioning utilizing camera ordering
A method to position multiple camera using camera ordering is described herein. Based on two known camera positions, a third camera position is able to be determined using acquired information and calculations. |
| US09947110B2 |
Method for assisting the positioning of a medical structure on the basis of two-dimensional image data
A medical data processing method for assisting the positioning of a first medical structure (1) relative to a second medical structure (2), the method being constituted to be executed by a computer and comprising the following steps: —acquiring two-dimensional projection image data comprising two-dimensional projection image information describing a two-dimensional projection image of at least the first medical structure (1); —acquiring registration data comprising registration information describing the registration of the two-dimensional projection image with respect to the first medical structure (1); —acquiring, on the basis of said two-dimensional projection image data, two-dimensional position data comprising position information describing the position of at least one base point (3) and at least one reference point (4) in the two-dimensional projection image; —acquiring, on the basis of the two-dimensional position data, positional relationship data comprising positional relationship information describing the positional relationship between the at least one base point (3) and the at least one reference point (4) in the two-dimensional projection image; —acquiring three-dimensional position data comprising position information describing the position of the at least one base point (3) and the at least one reference point (4) in three-dimensional anatomical space, in particular relative to the first medical structure (1); —determining, on the basis of the positional relationship data, the registration data and the three-dimensional position data, three-dimensional reference point correspondence data comprising correspondence information describing whether or not the position of the at least one reference point (4) corresponds to the position of the at least one reference point (4) in the two-dimensional projection image. |
| US09947108B1 |
Method and system for automatic detection and tracking of moving objects in panoramic video
Panoramic imaging systems and techniques are disclosed. In one aspect, a technique for automatic detecting and tracking of a foreground object includes the steps of: receiving a first set of raw images in an image sequence captured by a panoramic imaging system; stitching, by the panoramic imaging system, the first set of raw images to generate a panoramic image; detecting, by the panoramic imaging system, a foreground object in the panoramic image; tracking, by the panoramic imaging system, a movement of the foreground object in the image sequence; and generating, by the panoramic imaging system, a panoramic video based on the image sequence with tracking the movement of the foreground object. |
| US09947107B2 |
Method and system for tracking objects between cameras
A method, system and non-transitory computer readable storage medium, the computer-implemented method comprising: receiving a first image captured by a first capture device, the first images depicting first objects; obtaining a kinematic value for each of the first objects; receiving a second image captured by a second capture device, the second images depicting second objects; and analyzing the first and second images and the kinematic value, to determine transition parameters related to transition of objects from a first field of view of the first capture device to a second field of view of the second capture device, wherein the first capture device and the second capture device are calibrated, wherein a gap exists between the first and the second fields of view, and wherein said transition parameters are usable for associating further objects captured by the first capture device with corresponding objects captured by the second capture device. |
| US09947102B2 |
Image segmentation using neural network method
The present disclosure relates to systems, methods, devices, and non-transitory computer-readable storage medium for segmenting three-dimensional images. In one implementation, a computer-implemented method for segmenting a three-dimensional image is provided. The method may include receiving a three-dimensional image acquired by an imaging device, and selecting a plurality of stacks of adjacent two-dimensional images from the three-dimensional image. The method may further include segmenting, by a processor, each stack of adjacent two-dimensional images using a neural network model. The method may also include determining, by the processor, a label map for the three-dimensional image by aggregating the segmentation results from the plurality of stacks. |
| US09947101B2 |
Radiographic image analysis device and method, and recording medium having program recorded therein
A subject image is acquired. Model information, in which a model image captured by irradiating each of a plurality of models different from the subject with radiation is associated with a body thickness distribution of the model in the model image is acquired for each of the plurality of models. Characteristic information indicating characteristics of the subject image is acquired. Characteristic information indicating the characteristics of each of the plurality of model images is acquired, on the basis of the plurality of model information items. The model image having characteristic information similar to the characteristic information of the subject image is specified. The body thickness distribution associated with the specified model image is determined as the body thickness distribution of the subject image. |
| US09947100B2 |
Exterior hybrid photo mapping
Embodiments disclosed pertain to the use of user equipment (UE) for the generation of a 3D exterior envelope of a structure based on captured images and a measurement set associated with each captured image. In some embodiments, a sequence of exterior images of a structure is captured and a corresponding measurement set comprising Inertial Measurement Unit (IMU) measurements, wireless measurements (including Global Navigation Satellite (GNSS) measurements) and/or other non-wireless sensor measurements may be obtained concurrently. A closed-loop trajectory of the UE in global coordinates may be determined and a 3D structural envelope of the structure may be obtained based on the closed loop trajectory and feature points in a subset of images selected from the sequence of exterior images of the structure. |
| US09947092B2 |
Method of processing X-ray images of a breast
A method of processing X-ray images of a breast (B), the method comprising the steps of —generating (GEN3DV) a 3D volume from a plurality of X-ray images, —processing (DETMC) the 3D volume and/or the plurality of X-ray images, —computing (DETMC-CTR), for each region of interest in the 3D volume, a 3D characteristic position of the region of interest, —computing (CALCTGT) at least one needle target 3D position from a plurality of said computed 3D characteristic positions, —associating (SELIMG-TGT) each needle target position with a target image, —displaying (DISP-IMG) a slice image on a graphical interface, and —if the current slice image is a target image, displaying (DISP-TGT) on the graphical interface a target marker indicating each needle target position associated with the displayed current slice image. |
| US09947089B2 |
Digital specimen manufacturing device, digital specimen manufacturing method, and digital specimen manufacturing server
A digital specimen manufacturing device comprises: a reduction processing unit which generates a reduced image by reducing a high resolution image of a first magnification into a second magnification image; an operation instruction unit which instructs the imaging unit to update the second magnification and recapture the low resolution image when information indicates the difference between the reduced image and the low resolution image is not within the allowable error range; and an image processing unit which obtains a third magnification, and outputs an image of the digital specimen by reducing the high resolution image into an image of the third magnification which an image magnification greater than the updated second magnification and smaller than the first magnification. |
| US09947084B2 |
Multiresolution consistent rasterization
A technique for multiresolution consistent rasterization in which a setup unit calculates universal edge equations for a universal resolution. A rasterizer evaluates coverage data for two different resolutions based on the edge equations. The rasterizer evaluates coverage data for different effective pixel sizes—a large pixel size and a small pixel size. Optionally, the rasterizer may determine a first set of coverage data by performing conservative rasterization to determine coverage data for large pixels. Optionally, the rasterizer may then determine a second set of coverage data by performing standard rasterization for small pixels. Optionally, for the second set of coverage data, the rasterizer may evaluate only the small pixels that are within large pixels in the first set of coverage data that evaluate as covered. |
| US09947081B2 |
Display control system and display control method
An object of the present invention is to provide a display control system and a display control method which can rotate information displayed on a display screen as intended by a user by performing one rotating operation. A display control system according to the present invention includes: a rotating operation deciding unit which decides whether or not a rotating operation of rotating information in a state where two points are placed in touch with the information displayed on a display screen has been performed; and a display controller which, when the rotating operation deciding unit determines that the rotating operation has been performed, and when a speed of the rotation is a first threshold or more, controls to rotate the information more greatly than actual rotation performed by the rotating operation and to display the information on the display screen. |
| US09947068B2 |
System and method for GPU scheduling
A computer-implemented method, apparatus and computer program product for scheduling tasks, the method comprising: receiving a request from a context for processing a frame by a Graphic Processing Unit (GPU); allocating frame processing time for the context in association with the frame; receiving a command buffer associated with the frame; subject to a pending command buffer collection being empty, submitting the command buffer for processing by the GPU; determining priorities for all command buffers in the pending command buffer collection, including a priority for the command buffer; if the highest priority command buffer is the command buffer, submitting the command buffer for processing; otherwise adding the command buffer to the pending command buffer collection, wherein the frame processing time allocated for the context is reduced by an amount of time related to a time a previous frame associated with the context exceeded its allocated processing time. |
| US09947067B2 |
Radiation image inspection system and method based on B/S architecture
The present disclosure provides a radiation image inspection system based on B/S architecture. The system comprises: at least one client terminal, configured to initiate an image operation request to a Web server, and display an image operation result on a browser of the client terminal upon receiving a response from the Web server; an image processing assembly, configured to query, based on the image operation request from the client terminal and forwarded by the Web server, an image which the client terminal desires to process, perform an operation on an image as requested by the client terminal, convert the resulted image into an image in a designated format and quality and return the converted image to the browser of the client terminal via the Web server for displaying; and the Web server, configured to receive the image operation request from the client terminal, forward the image operation request to the image processing assembly, and return the image operation result from the image processing assembly to the client terminal. |
| US09947063B2 |
Systems and methods for fueling motor vehicles
Methods and systems can automate the delivery of motor vehicle fuel while reducing the need for operator involvement and driving to a gas station. A server with access to a database and in wireless communication with computers installed in a motor vehicle can collect data from the computers including vehicle fuel level and vehicle geographic location. The data can be compared to a fuel level threshold and geographic boundary. The data can be transmitted wirelessly through a wireless network to the database. A mobile fuel tanker truck can be dispatched to the vehicle's location when at least one of: fuel service is requested by a user of the vehicle or the vehicle's fuel level falls beneath the fuel level threshold. Fuel service can be requested by a user via a smartphone running an application that enables the monitoring, management, selection, and ordering of fuel service. |
| US09947061B2 |
Healthcare information management via financial networks
A system that enables the secure, rapid and efficient transfer of patient medical information over existing financial information exchange networks and protocols. An account input device can be read by existing financial transaction terminals and a transaction state amount value using the financial transaction message exchange protocol entered encoded according to a non-financial transaction encoding scheme. A transaction message is routed to a provider via the financial transaction message exchange system for processing such as the acceptance or refusal of a medical procedure or prescription fulfillment. |
| US09947055B1 |
System and method for monitoring merchant transactions using aggregated financial data
A computer-implemented method of detecting a merchant with chargeback activity includes a computing device receiving merchant financial data from a plurality of different financial service providers, wherein the merchant financial data comprises chargebacks. The computing device aggregates the received merchant financial data into, for example, a database. The computing device analyzes the aggregated merchant financial data of a single merchant for a chargeback characteristic and the computing device flags the merchant when the chargeback characteristic exceed preset threshold levels. A flagged merchant may trigger an optional notification to one or more of the financial service provider (e.g., card issuer), the acquiring bank, the merchant, or the customer. |
| US09947051B1 |
Identifying and recommending insurance policy products/services using informatic sensor data
A computer system and method for processing insurance claim data to identify and recommend insurance policy modifications using informatic data from one or more informatic sensor devices relating to a dwelling. Analytical analysis is performed on the received informatic data to determine a dwelling assessment value regarding an insurance risk relating to the dwelling. Electronic data relating to an insurance policy associated with the dwelling is received by a computer processor and is electronically analyzed to determine insurance coverage and liability values for the dwelling as prescribed by the insurance policy. Predefined business rules are utilized by a computer processor using at least the dwelling assessment value and the determined insurance coverage and liability values for the dwelling to determine, and preferably recommend, one or more insurance products for inclusion with the insurance policy to mitigate insuree liability regarding the dwelling. |
| US09947050B1 |
Claims adjuster allocation
A central claims adjuster control unit associated with an entity may oversee the assignment of claims cases to claims adjusters. The control unit may designate that a threshold number of cases may be assigned to certain claims adjusters. When new claims cases arrive, the control unit may monitor the workload of each of the claims adjusters and the threshold value assigned to any of the claims adjusters before assigning the case to one of the adjusters. If no adjuster is available, the control unit may store the case(s) in a memory until one of the adjusters becomes available. An additional feature of the control unit includes a user interface for modifying information about claims adjusters, including whether or not a threshold value is associated with them, the value of any associated threshold, and the reassignment of cases from one adjuster to another. |
| US09947049B2 |
Methods and apparatus to calculate and present transaction adjusted values
Methods and apparatus to calculate and display transaction adjusted values are disclosed. An example method includes defining an order related to a tradeable object listed on an electronic exchange, wherein the order is associated with a user; determining whether the user qualifies for a pricing incentive that rewards trading activity meeting a threshold; when the user qualifies for the pricing incentive, calculating a transaction adjusted value of the order at respective ones of a plurality of price levels of a trading interface, wherein the pricing incentive is factored into the calculation of the transaction adjusted value for a first one of the price levels, and the pricing incentive is not factored into the calculation of the transaction adjusted value of a second one of the price levels; and displaying ones of the transaction adjusted values in a value axis of the trading interface in connection with respective ones of the plurality of price levels. |
| US09947046B2 |
Systems and methods for providing user-specific dynamic content for facilitating online transactions
Methods and systems for automatically providing dynamic content for facilitating a transaction are described herein. An online marketplace is accessed by a client device over a network. A user identifier associated with the client device is passed to a payment service provider via a merchant system associated with the online market place. Dynamic content is generated by the payment service provider in response to the user identifier and subsequently served to the client device over the network. |
| US09947045B1 |
Selecting participants in a resource conservation program
A method and system for configuring a resource conservation program that receives information about a level of responsiveness for each of a plurality of users, receives information about resource usage for each of the plurality of users, determines an expected value, using a processor, for each of the plurality of users, using the received information about the level of responsiveness and the received information about resource usage, and configures the resource conservation program based on the determined expected value for each of the plurality of users. |
| US09947040B2 |
Method for providing electronic video files related to products of interest
A system for generating and communicating playable videos over a computer network to customers of subscribing retailers is provided. The system employing software running on computers in engaged electronic memory, provides for the assembly and video content categorizing of information concerning each electronic video, in a library of such held in electronic memory, to allow for individual electronic video files to be matched to the customers, based a correlation thereof to the interests, buying habits, social and other ascertained customer information relating to each respective customer. |
| US09947034B2 |
Method and system for improved E-commerce shopping
An e-commerce system and method for presenting product information to a viewer, where a video feed and product information associated with a product that relates to the content in the video feed can be displayed or presented to the viewer on one or more remote display devices. |
| US09947032B2 |
Customer interaction manager
An approach is provided for indirectly connecting a customer's mobile smart device to computers located at a business when the customer is making a purchase at the business. The customer's mobile smart device and the business's computers communicate over the Internet with a customer interaction manager executing on an Internet server. This provides an easy to use interface for the customer and allows the customer to receive information and send requests to the business without having to wait for personnel working at the business to be available. |
| US09947029B2 |
Auction tiering in online advertising auction exchanges
A method holding an auction for impressions in an online advertising platform includes defining auction tiers, with each tier having associated attributes. The tier attributes include a tier priority, an eligible bidder list, and a minimum bid threshold. Bids for the impressions are received from impression buyers, each bid being associated with an impression bidder and a bid value. For each received bid, the highest priority tier for which the tier attributes are satisfied by the bid attributes is determined, and that tier is associated with the bid. After assigning each bid to a tier, the highest priority tier with at least one bid is selected as the active auction tier. The winner of the auction is then determined based on the bids associated with the active tier. |
| US09947027B2 |
System and method for providing targeted advertisements and geolocation information to an operator of a vehicle
A system is disclosed for inserting stored advertising content into broadcast content being played over an audio system. The system may have a smartphone in wireless communication with the audio system which runs an application relating to a specific broadcast station that is broadcasting the broadcast content. The audio system may have a processing system for detecting breaks in program content that forms part of the broadcast content. The audio system may further be configured to obtain predetermined advertisements and to play back the predetermined advertisements over the audio system during each break in the program content, in place of advertisements contained in the broadcast content. |
| US09947025B2 |
Method and apparatus for providing search capability and targeted advertising for audio, image, and video content over the internet
The present invention provides an apparatus and method for extracting the content of a video, image, and/or audio file or podcast, analyzing the content, and then providing a targeted advertisement, search capability and/or other functionality based on the content of the file or podcast. |
| US09947024B1 |
Method, apparatus, and computer program product for classifying user search data
Provided herein are systems, methods and computer readable media for classifying user search data. An example method comprises accessing user search data, the user search data generated by a user interacting with a promotion and marketing service to identify a requested promotion, determining, using a processor, a first classification of the user search data by parsing the user search data into one or more terms, applying one or more terms within the user search data to a search index, wherein the first classification is configured to generate a mapping from the one or more terms within the user search data to at least one of a service or merchant, determining, using the processor, a second classification of the user search data, wherein the second classification identifies a requested redemption location for the requested promotion and generating an identification pair for the search data that is representative of a promotion tuple, the identification pair comprising the first classification and the second classification. |