最新美国发明专利第2017-05-30期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09666891B2	Gas phase modification of solid oxide fuel cells A solid oxide fuel cell comprising an electrolyte, an anode and a cathode. In this fuel cell at least one electrode has been modified with a promoter using gas phase infiltration.
US09666890B2	Fuel cell A solid oxide fuel cell includes a cell stack, a reformed gas introduction path introducing a reformed gas into the cell stack, an oxidizing agent gas introduction path introducing an oxidizing agent gas into the cell stack, and a cooling gas introduction path introducing a cooling gas into the oxidizing agent gas introduction path. A heat-absorption part absorbing heat is provided in a periphery of the cell stack, and the cooling gas introduction path is connected with the oxidizing agent gas introduction path through the heat-absorption part.
US09666888B2	Combined power generation system and unit, method, and program for controlling the same The system includes an exhaust fuel gas line, an exhaust-fuel-gas supplying line, a recirculating line that circulates the exhaust fuel gas to the SOFC, a shut-off valve in a vent line that splits off on the upstream side of the branching point, an orifice on the downstream side of the shut-off valve, a water supplying portion that supplies water to the recirculating line, and a DPX that measures the system pressure difference of the SOFC, and, when stopping power generation by the SOFC or when power generation by the SOFC comes to an abnormal stop, the shut-off valve is opened, while causing a predetermined amount of pressure loss in the vent line by using the orifice, and thus, the water flow volume of the water supplying portion is controlled so that the pressure difference measured by the DPX reaches a predetermined value.
US09666886B2	Condensed water removing method and apparatus of gas diffiusion layer and catalyst layer of fuel cell and apparatus Disclosed are a method and an apparatus for removing condensed water in a gas diffusion layer and a catalyst layer of a fuel cell. The method comprises steps of: a step of determining whether the condensed water is generated in the gas diffusion layer and the catalyst layer of the fuel cell; a step of reducing and supplying an amount of air supplied to a cathode of the fuel cell at a predetermined level, when it is determined that the condensed water is generated in the gas diffusion layer and the catalyst layer in the step of determining; a step of measuring a temperature of a stack of the fuel cell; and a step of increasing the amount of air supplied to the cathode of the fuel cell to an amount of air prior to being reduced at the predetermined operation level, when the measured temperature of the stack of the fuel cell is elevated to a predetermined temperature.
US09666878B2	Method for fabricating catalytic 3D network material A method for fabricating a catalytic 3-dimensional network material comprises steps: mixing an aqueous solvent with a nitrogen-containing carbon material whose surface is doped with nitrogen atoms to form a first dispersion liquid, and mixing the first dispersion liquid with ammonium carboxymethyl cellulose to form a first gel; undertaking a freeze-drying process of the first gel to remove water from the first gel to form a first product; and undertaking a low-temperature heating process of the first product at a temperature of 50-380° C. to cure the first product into a 3D network material doped with nitrogen atoms. The catalytic 3D network material of the present invention has a very high specific surface area to increase the catalytic efficiency.
US09666867B2	Aluminum alloy foil for electrode collector and production method therefor An object of the present invention is to provide an aluminum alloy foil for an electrode current collector, the foil having a high strength after the drying step while keeping a high electrical conductivity. Disclosed is a method for manufacturing an aluminum alloy foil for electrode current collector, including: maintaining an aluminum alloy ingot comprising 0.03 to 0.1% of Fe, 0.01 to 0.1% of Si, 0.0001 to 0.01% of Cu, 0.005% or less of Mn, with the rest being Al and unavoidable impurities, at 550 to 620° C. for 1 to 20 hours, and subjecting the resulting ingot under a hot rolling with a starting temperature of 500° C. or higher and an end-point temperature of 255 to 300° C.
US09666866B2	Transition metal hexacyanometallate electrode with water-soluble binder A method is provided for fabricating a transition metal hexacyanometallate (TMHCM) electrode with a water-soluble binder. The method initially forms an electrode mix slurry comprising TMHCF and a water-soluble binder. The electrode mix slurry is applied to a current collector, and then dehydrated to form an electrode. The electrode mix slurry may additionally comprise a carbon additive such as carbon black, carbon fiber, carbon nanotubes, graphite, or graphene. The electrode is typically formed with TMHCM greater than 50%, by weight, as compared to a combined weight of the TMHCM, carbon additive, and binder. Also provided are a TMHCM electrode made with a water-soluble binder and a battery having a TMHCM cathode that is made with a water-soluble binder.
US09666864B1	Vertically oriented graphene-supported anode An electrode morphology and architecture for energy storage applications that increases the rate of charge/discharge, battery life, and decreases cost. The morphology and architecture directed towards a method and apparatus incorporating a graphene supported anode including a substrate, a vertically oriented graphene support arrangement coated with silicon or the like, in an electrolyte.
US09666863B2	Nano silicon-carbon composite material and preparation method thereof The invention relates to a nano silicon-carbon composite negative material for lithium ion batteries and a preparation method thereof. A porous electrode composed of silica and carbon is taken as a raw material, and a nano silicon-carbon composite material of carbon-loaded nano silicon is formed by a molten salt electrolysis method in a manner of silica in-situ electrochemical reduction. Silicon and carbon of the material are connected by nano silicon carbide, and are metallurgical-grade combination, so that the electrochemical cycle stability of the nano silicon-carbon composite material is improved. The preparation method of the nano silicon-carbon composite material provided by the invention comprises the following steps: compounding a porous block composed of carbon and silica powder with a conductive cathode collector as a cathode; using graphite or an inert anode as an anode, and putting the cathode and anode into CaCl2 electrolyte or mixed salt melt electrolyte containing CaCl2 to form an electrolytic cell; applying voltage between the cathode and the anode; controlling the electrolytic voltage, the electrolytic current density and the electrolytic quantity, so that silica in the porous block is deoxidized into nano silicon by electrolytic reduction, and the nano silicon-carbon composite material for lithium ion batteries is prepared at the cathode.
US09666858B2	Negative electrode for secondary battery, and process for production thereof A negative electrode for a secondary battery according to the present invention has a collector and a negative electrode active material layer formed on a surface of the collector and containing negative electrode active material particles. In the negative electrode active material layer, an insulating material is arranged between the negative electrode active material particles so as not to develop conductivity by a percolation path throughout the negative electrode active material layer. It is possible in this configuration to effectively prevent the occurrence of a short-circuit current due to an internal short circuit and the generation of heat due to such short-circuit current flow in the secondary battery while securing the battery performance of the secondary battery.
US09666851B2	Separator and electrochemical device having the same The present invention refers to a separator and an electrochemical device having the same. The separator of the present invention comprises a non-woven fabric substrate obtained from fibers and having multiple pores formed between the fibers; and a polymer coating layer formed on a part or the whole of the surface of the fibers, wherein the polymer coating layer comprises a polymer having a tensile strength of 80 MPa or more, a tensile modulus of 3,000 MPa or more and a flexural modulus of 3,000 MPa or more.The separator of the present invention can reduce costs for manufacturing electrochemical devices, and it can control the size of pores present in the non-woven fabric substrate to prevent the generation of a leak current and provide improved mechanical strength.
US09666845B2	Power storage module and fixing structure of power storage module A power storage module that has a plurality of power storage cells stacked in a stacking direction, a pair of insulating end power storage cell holders superimposed at opposite ends in the stacking direction, and a pair of end plates superimposed at opposite ends in the stacking direction of the end power storage cell holders. In a mounted state, a lower end in a vertical direction of the end power storage cell holder projects downward from lower ends in a vertical direction of the power storage cell and the end plate. The end power storage cell holder includes a first face opposing the end plate and a second face opposing the power storage cell. A first drainage channel is formed on the first face and extends vertically downwardly and bends outward in the stacking direction. A second drainage passage extends vertically and is formed on the second face.
US09666842B2	Rechargeable battery pack A rechargeable battery pack is disclosed. In one aspect, the rechargeable battery pack includes a holder accommodating a plurality of unit cells, wherein each unit cell includes a rechargeable battery, and a case accommodating the holder. The case includes a bottom portion and a cover placed over the bottom portion and the holder. The holder includes a plurality of protrusions that protrude toward the bottom portion and the bottom portion has a plurality grooves defined to respectively correspond to the protrusions.
US09666841B1	Router having removable cellular communication module A router includes a printed circuit board, a housing enclosing the printed circuit board, the housing having a recess formed therein, and a removable cell pack containing a cellular module configured to be received within the recess and electrically connected to the printed circuit board.
US09666830B2	Organic light emitting device and method for manufacturing the same Disclosed is an organic light emitting device (OLED) that may include a first electrode including at least two conductive units that are immediately adjacent to each other; a second electrode facing the first electrode; an organic layer between the first electrode and the second electrode; and an auxiliary electrode electrically connected to the first electrode, the auxiliary electrode including at least two branch points that are immediately adjacent to each other, each branch point having at least three branches, wherein a resistance between the at least two branch points is 35Ω or less, and wherein a resistance between the at least two conductive units is 2,000Ω or more and 600,000Ω or less.
US09666826B2	Electroluminescent device including an anthracene derivative An electroluminescent device comprises a cathode, an anode, and has therebetween a light emitting layer (LEL), the device further containing an electron transport layer (ETL) comprising an anthracene compound on the cathode side of the LEL and an organic electron injection layer (EIL) between the ETL and the cathode comprising a phenanthroline compound, wherein the thickness of the EIL and LEL are such that the ratio of the thickness of the EIL to LEL is greater than 0.125.
US09666825B2	Light-emitting element, light-emitting device, electronic device, and lighting device A light-emitting element with high reliability that can keep favorable characteristics after long-time driving is provided. In addition, a light-emitting device having a long lifetime including the light-emitting element is provided. Moreover, an electronic device and a lighting device having a long lifetime are provided. In a light-emitting element including an EL layer between a pair of electrodes, a light-emitting layer included in the EL layer has a stacked-layer structure which is different from the conventional structure, whereby the light-emitting element can keep favorable characteristics after long-time driving even in the case where carrier balance is changed over time due to driving of the light-emitting element or a light-emitting region is shifted due to the change.
US09666820B2	Light-emitting device and manufacturing method thereof An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.
US09666819B2	Organic light emitting diode and display device including the same An organic light emitting diode includes a first electrode layer disposed on a base substrate, a second electrode layer disposed on the first electrode layer and facing the first electrode layer, an emitting layer disposed between the first electrode layer and the second electrode layer, a hole transport region disposed between the emitting layer and the first electrode layer, an auxiliary layer disposed between the hole transport region and the emitting layer, the auxiliary layer including a first material and a second material, and an electron transport region disposed between the emitting layer and the second electrode layer, in which a lowest unoccupied molecular orbital (LUMO) energy level of the first material is higher than a LUMO energy level of the emitting layer, and a LUMO energy level of the second material is lower than the LUMO energy level of the emitting layer.
US09666818B2	Tandem-type organic photoelectric conversion element and solar battery A tandem-type organic photoelectric conversion element has at least a first electrode, a second electrode, and a plurality of bulk heterojunction layers each comprising a p-type organic semiconductor material and an n-type organic semiconductor material. The tandem-type organic photoelectric conversion element and a solar battery are characterized in that when the absorption wavelengths of the bulk heterojunction layers are such that a second bulk heterojunction layer absorbs up to a longer wavelength than a first bulk heterojunction layer, the LUMO energy level (LUMO(n1)) of the film of the n-type semiconductor in the first bulk heterojunction layer and the LUMO energy level (LUMO(n2)) of the film of the n-type semiconductor in the second bulk heterojunction layer satisfy the following equation (1): 0.4 eV≧LUMO(n1)−LUMO(n2)≧0.1 eV (1).
US09666816B2	Growth of ordered crystalline organic films There is disclosed methods utilizing organic vapor phase deposition for growing bulk organic crystalline layers for organic photosensitive devices, heterojunctions and films made by such methods, and devices using such heterojunctions. There is also disclosed new methods for manufacturing heterojunctions and organic photosensitive devices, and the heterojunctions and devices manufactured thereby.
US09666815B2	Surface treatment of hydrophobic ferroelectric polymers for printing An embodiment is a method and apparatus to treat surface of polymer for printing. Surface of a polymer having a surface energy modified for a time period to control a feature characteristic and/or provide a hysteresis behavior. A material is printed on the surface to form a circuit pattern having at least one of the controlled feature characteristic and the hysteresis behavior.
US09666814B2	Display device and method of manufacturing the same A display device includes: a central area having a display area on a substrate; and a peripheral area around the central area; a plurality of pads arranged along one direction in the central area; a plurality of insulating patterns adjacent the plurality of pads; and a slit between the plurality of insulating patterns in the peripheral area, wherein the slit is formed by removing at least a portion of an insulating material of the plurality of insulating patterns.
US09666809B2	Compound and organic light-emitting device including the same An organic light-emitting device including a first electrode, a second electrode and an organic layer disposed between the first electrode and the second electrode is provided.
US09666808B2	Organic electroluminescence element An organic electroluminescent element having a small reduction rate in the luminance immediately after the start of light emission is provided. The organic electroluminescent element includes a substrate, a pair of electrodes including an anode and a cathode, disposed on the substrate, a light emitting layer disposed between the electrodes, and at least one organic layer disposed between the light emitting layer and the anode, in which at least one kind of a specific compound including a fluorene structure is contained in at least one organic layer between the light emitting layer and the anode, and at least one kind of a specific compound including a carbazole structure or a fluorene structure is contained as a light emitting material in the light emitting layer.
US09666804B2	Copolymer and organic solar cell using same The present specification provides a copolymer, and an organic solar cell including one or more layers of organic material layers that include the copolymer.
US09666802B2	Photoresist employing photodimerization chemistry and method for manufacturing organic light emitting diode display using the same A highly fluorinated photoresist employing a photodimerization chemistry and a method for manufacturing an organic light emitting diode display using the same. The photoresist includes a copolymer that is made from two different monomers. When the copolymer is used as a photoresist, the photoresist has the characteristic that it becomes insoluble when exposed to an ultraviolet light having a wavelength of 365 nm.
US09666799B2	Concave word line and convex interlayer dielectric for protecting a read/write layer An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.
US09666798B1	Switching elements, resistive random access memory devices including the same, and methods of manufacturing the switching elements and the resistive random access memory devices A method of manufacturing a switching element is provided. The method includes forming a pillar-shaped structure having a first electrode, an insulation layer and a second electrode which are stacked on a substrate. A tilted doping process is performed to inject dopants into at least a portion of the insulation layer. The tilted doping process forms a threshold switching operation region in the insulation layer.
US09666796B2	Method for making phase change memory cell A method for making phase change memory cell includes following steps. A carbon nanotube wire is located on a surface of the substrate, wherein the carbon nanotube wire includes a first end and a second end opposite to the first end. A bending portion is formed by bending the carbon nanotube wire. A first electrode, a second electrode, and a third electrode are applied on the surface of the substrate, wherein the first electrode is electrically connected to the first end, the second electrode is electrically connected to the second end, and the third end is spaced from the bending portion of the carbon nanotube wire. A phase change layer is deposited to cover the bending structure and electrically connects to the third electrode.
US09666794B2	Multi-stage element removal using absorption layers An MTJ structure and method for providing the same are described. The method may include providing a free layer, a pinned layer, and a nonmagnetic spacer layer between the free layer and the pinned layer. Providing the free layer and/or the pinned layer may include depositing a portion of the desired MTJ layer, depositing a sacrificial layer, annealing the MTJ and sacrificial layer, removing at least a portion of the sacrificial layer, and depositing a remaining portion of the desired MTJ layer. The steps of depositing a sacrificial layer, annealing, and removing the sacrificial layer may be repeated multiple times with process conditions selected for each stage so as to reduce the risk of damage to the underlying MTJ layer. The desired MTJ layer may be the free layer, the pinned layer, or both.
US09666789B2	Semiconductor device having pinned layer with enhanced thermal endurance A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
US09666788B2	Integrated circuit package having a split lead frame A magnetic field sensor includes a lead frame having a plurality of leads, at least two of which have a connection portion and a die attach portion. A semiconductor die is attached to the die attach portion of the at least two leads. The sensor further includes at least one wire bond coupled between the die and a first surface of the lead frame. The die is attached to a second, opposing surface of the lead frame in a lead on chip configuration. In some embodiments, at least one passive component is attached to the die attach portion of at least two leads.
US09666786B2	Volume wave resonators on micromachined vertical structures A bulk wave piezoelectric resonator operating at a predetermined frequency includes a substrate block, having a plane face, a first thickness and consisting of a first material, a resonant plate having a length, width and second thickness, and consisting of a second piezoelectric material, first and second metal electrodes at least partly covering the resonant plate on each side and partly facing each other. The resonant plate is fixed perpendicularly in the vicinity of the plane face of the substrate block so that the width of the resonant plate and the first thickness of the substrate block have the same direction, and the first material, the second material, the first thickness of the block of substrate, the length, the width, the second thickness of the resonant plate are configured for trapping bulk waves at the operating frequency of the resonator and for producing a plane-plane type bulk wave piezoelectric resonator.
US09666785B2	Piezoelectric driving device, robot, and driving method of the same A piezoelectric driving device includes a vibrating plate, and a piezoelectric vibrating body including a substrate, and piezoelectric elements provided on the substrate. The piezoelectric element includes a first electrode, a second electrode, and a piezoelectric body, and the first electrode, the piezoelectric body, and the second electrode are laminated in this order on the substrate. The piezoelectric vibrating body is installed on the vibrating plate so that the piezoelectric element is interposed between the substrate and the vibrating plate. A wiring pattern including a first wiring corresponding to the first electrode and a second wiring corresponding to the second electrode is formed on the vibrating plate, the first electrode and the first wiring are connected to each other through a first laminated conducting portion, and the second electrode and the second wiring are connected to each other through a second laminated conducting portion.
US09666782B2	P-type semiconductor composed of magnesium, silicon, tin, and germanium, and method for manufacturing the same A manufacturing method for a p-type semiconductor formed by sintering a compound represented by the general chemical formula: Mg2SiXSnYGeZ (where X+Y+Z=1, X>0, and Y>0, Z>0). The p-type semiconductor has a composition in which X is in the range of 0.000.00, and Y is in the range of 0.60≦Y≦0.95, and Z satisfies either of the relationships: −1.00Y+1.00≧Z≧−1.00Y+0.75, where 0.60≦Y≦0.90 and Z>0.00, and −2.00Y+1.90≧Z≧−1.00Y+0.75, where 0.90≦Y≦0.95 and Z>0.00.
US09666780B2	Light-emitting device and manufacturing method thereof The present disclosure provides a light-emitting device and manufacturing method thereof. The light-emitting device comprises: a metal connecting structure; a barrier layer on the metal connecting structure, the barrier layer comprising a first metal multilayer on the metal connecting structure and a second metal multilayer on the first metal multilayer; a metal reflective layer on the barrier layer; and a light-emitting stack electrically coupled to the metal reflective layer, wherein the first metal multilayer comprises a first metal layer comprising a first metal material and a second metal layer comprising a second metal material, and the second metal multilayer comprises a third metal layer comprising a third metal material and a fourth metal layer comprising a fourth metal material.
US09666779B2	Semiconductor light emitting diode chip with current extension layer and graphical current extension layers A semiconductor light emitting diode chip relates to the field of production technologies of a light emitting diode. In the present invention, corresponding graphical current extension layers are respectively disposed below an N pad and a P pad, and in all light emitting compound areas, there is electronic compound light emitting. Compared with the prior art, an area of a light emitting compound area is increased, which can effectively improve current distribution and light emitting brightness of a chip. In addition, graphical current extension can effectively increase an adhesion of a pad on a surface and improve the reliability of a chip.
US09666777B2	Light emitting device A package for a light emitting device includes a resin molding and first to third leads. The first lead is disposed near a first corner of a substantially rectangular shape of the resin molding, and has a first exposed part exposed from one of two side surfaces that share the first corner while the first lead is not exposed from the resin molding on the other of the two side surfaces. The second lead is disposed near a second corner, and has a second exposed part exposed from one of two side surfaces that share the second corner while the second lead is not exposed from the resin molding on the other of the two side surfaces. The third lead has a plurality of lower surface exposed parts that are exposed from a lower surface of the resin molding.
US09666776B2	Semiconductor light emitting device and multiple lead frame for semiconductor light emitting device A semiconductor light emitting device that is excellent in radiating heat and that can be molded into a sealing shape having intended optical characteristics by die molding is provided. The semiconductor light emitting device includes: a lead frame including a plate-like semiconductor light emitting element mounting portion having an LED chip mounted on a main surface, and a plate-like metal wire connecting portion extending over a same plane as the semiconductor light emitting element mounting portion; a metal wire electrically connecting the LED chip and the metal wire connecting portion; a thermosetting resin molded by die molding or dam-sheet molding so as to completely cover the LED chip and the metal wire; and a resin portion provided to surround the lead frame and having the thickness not greater than the thickness of the lead frame.
US09666765B2	Display device using semiconductor light emitting device and method of manufacturing the same A display device including a plurality of semiconductor light emitting devices mounted on a substrate, and a phosphor layer including a plurality of phosphor portions configured to convert a wavelength of light and a plurality of partition wall portions formed between the plurality of phosphor portions. Further, a least one of the plurality of partition wall portions overlaps with at least one of the plurality of semiconductor light emitting devices along a thickness direction of the phosphor layer.
US09666761B2	Light-emitting device A light-emitting device includes a substrate that is capable of transmitting light, a conductive layer that includes a first conductive portion provided on the substrate and a second conductive portion which is provided on the substrate so as to be adjacent to the first conductive portion, The second conductive portion is thinner than the first conductive portion. A light emitting layer is provided on the first conductive portion. A first electrode is provided on the second conductive portion. A second electrode is provided on the light emitting layer. In some embodiments, a backside surface of the substrate may be processed to be optically rough so as to limit internal reflections.
US09666759B2	Growth substrate, nitride semiconductor device and method of manufacturing the same Disclosed is a method of manufacturing a light emitting device. More particularly, disclosed are a growth substrate, a nitride semiconductor device and a method of manufacturing a light emitting device. The method includes preparing a growth substrate including a metal substrate, forming a semiconductor structure including a nitride-based semiconductor on the growth substrate, providing a support structure on the semiconductor structure, and separating the growth substrate from the semiconductor structure.
US09666757B2	Vertical light emitting diode and fabrication method A vertical LED with current blocking structure and its associated fabrication method involve an anisotropic conductive material and a conductive substrate with concave-convex structure. The anisotropic conductive material forms a bonding layer with vertical conduction and horizontal insulation between the concave-convex substrate and the light-emitting epitaxial layer, thereby forming a vertical LED with current blocking function.
US09666751B2	Method for producing an electrically conductive contact on a solar cell A method is provided for producing an electrically conductive contact on a rear face and/or front face of a solar cell. The method interconnects solar cells in a cost-effective manner and ensures that cell damage, which leads to a reduction in power, is avoided. The rear face and/or front face of the solar cell is treated in the region of the contact and, after the treatment in the region, a pasty adhesive or an adhesive tape is applied in strips.
US09666748B2	Integrated on chip detector and zero waveguide module structure for use in DNA sequencing A semiconductor structure for use in single molecule real time DNA sequencing technology is provided. The structure includes a semiconductor substrate including a first region and an adjoining second region. A photodetector is present in the first region and a plurality of semiconductor devices is present in the second region. A contact wire is located on a surface of a dielectric material that surrounds the photodetector and contacts a topmost surface of the photodetector and a portion of one of the semiconductor devices. An interconnect structure is located above the first region and the second region, and a metal layer is located atop the interconnect structure. The metal layer has a zero waveguide module located above the first region of the semiconductor substrate. A DNA polymerase can be present at the bottom of the zero waveguide module.
US09666746B2	Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells Provided are: a conductive base for forming a wiring pattern of a collector sheet for solar cells, which has good rust inhibiting properties and solderability without using an organic rust inhibitor that may harm a solar cell element; and a method for producing a collector sheet for solar cells, said method using the conductive base. A conductive base for forming a wiring pattern of a collector sheet for solar cells, which is a conductive base (30) wherein a zinc layer (320) composed of zinc is formed on the surface of a copper foil (310), is used. The conductive base for forming a wiring pattern of a collector sheet for solar cells is characterized in that the zinc layer (320) does not contain chromium and the amount of zinc therein is more than 20 mg/m2 but 40 mg/m2 or less.
US09666743B2	Josephson junction readout for graphene-based single photon detector A detector for detecting single photons of infrared radiation. In one embodiment a waveguide configured to transmit infrared radiation is arranged to be adjacent a graphene sheet and configured so that evanescent waves from the waveguide overlap the graphene sheet. In some embodiments the waveguide is omitted and infrared light propagating in free space illuminates the graphene sheet directly. A photon absorbed by the graphene sheet from the evanescent waves heats the graphene sheet. The graphene sheet is coupled to the weak link of a Josephson junction, and a constant bias current is driven through the Josephson junction, so that an increase in the temperature of the graphene sheet results in a decrease in the critical current of the Josephson junction and a voltage pulse in the voltage across the Josephson junction. The voltage pulse is detected by the pulse detector.
US09666741B2	Power generating apparatus and power generating system equipped with such power generating apparatus A power generating apparatus according to an aspect of the invention includes a plurality of pn stacks, each formed by stacking a p-type semiconductor layer and an n-type semiconductor layer one on top of the other, and a mode switching unit which effects switching to a photovoltaic power generation mode or a thermal power generation mode by connecting the plurality of pn stacks with each other. The mode switching unit effects switching to the photovoltaic power generation mode by connecting the p-type semiconductor layers in parallel with each other and the n-type semiconductor layers in parallel with each other between the plurality of pn stacks. The mode switching unit effects switching to the thermal power generation mode by connecting the p-type semiconductor layer and the n-type semiconductor layer 11b in series between different ones of the pn stacks.
US09666733B2	Solar cell using printed circuit board A solar cell using a printed circuit board (PCB) includes a substrate that is formed of an insulating material and in and through which a plurality of fixing holes and communication holes are alternately formed; a plurality of photoelectric effect generators that have ball or polyhedral shapes fixed to the substrate to be disposed over the plurality of fixing holes, and generate photoelectric effects by receiving light through light-receiving portions that are exposed to an upper portion of the substrate; a plurality of upper electrodes that are formed on a top surface of the substrate, and are connected to the respective light-receiving portions of the photoelectric effect generators; and a plurality of lower electrodes that are formed on a bottom surface of the substrate to be connected to respective non-light-receiving portions of the photoelectric effect generators, and communicate with the plurality of upper electrodes through the plurality of communication holes.
US09666726B2	Localized fin width scaling using a hydrogen anneal Transistors and methods for fabricating the same include annealing channel portions of one or more semiconductor fins that are uncovered by a protective layer in a gaseous environment to reduce fin width, to produce a fin profile that is widest at the bottom and tapers toward the top, and to round corners of the one or more semiconductor fins.
US09666723B2	Semiconductor device An object of the present invention is to provide a semiconductor device in which stored data can be held even when power is not supplied for a certain time. Another object is to increase the degree of integration of a semiconductor device and to increase the storage capacity per unit area. A semiconductor device is formed with a material capable of sufficiently reducing off-state current of a transistor, such as an oxide semiconductor material that is a wide-bandgap semiconductor. With the use of a semiconductor material capable of sufficiently reducing off-state current of a transistor, the semiconductor device can hold data for a long time. Furthermore, a wiring layer provided under a transistor, a high-resistance region in an oxide semiconductor film, and a source electrode are used to form a capacitor, thereby reducing the area occupied by the transistor and the capacitor.
US09666721B2	Semiconductor device including pellet-like particle or flat-plate-like particle High field-effect mobility is provided for a semiconductor device including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a transistor in which a stack of oxide semiconductor layers is provided over a gate electrode layer with a gate insulating layer provided therebetween, an oxide semiconductor layer functioning as a current path (channel) of the transistor and containing an n-type impurity is sandwiched between oxide semiconductor layers having lower conductivity than the oxide semiconductor layer. In the oxide semiconductor layer functioning as the channel, a region on the gate insulating layer side contains the n-type impurity at a higher concentration than a region on the back channel side. With such a structure, the channel can be separated from the interface between the oxide semiconductor stack and the insulating layer in contact with the oxide semiconductor stack, so that a buried channel can be formed.
US09666704B2	Semiconductor device A semiconductor substrate is provided with a first cell region, the first cell region including: an n-type emitter region; a p-type first top body region; an n-type first barrier region; an n-type first pillar region; and a p-type first bottom body region, the semiconductor substrate may further comprise: an n-type drift region; a p-type collector region; an n-type cathode region, the n-type first barrier region may include a first peak position where a peak of the n-type impurity density is present within a part linked to the n-type first pillar region, and a second peak position where a peak of the n-type impurity density is present within a part in contact with the gate insulating layer, and a depth of the first peak position from a front surface of the semiconductor substrate is different from a depth of the second peak position from the front surface of the semiconductor substrate.
US09666698B2	Method for manufacturing semiconductor device A transistor with stable electrical characteristics is provided. Provided is a method for manufacturing a semiconductor device that includes, over a substrate, an oxide semiconductor, a first conductor, a first insulator, a second insulator, and a third insulator. The oxide semiconductor is over the first insulator. The second insulator is over the oxide semiconductor. The third insulator is over the second insulator. The first conductor is over the third insulator. The oxide semiconductor has a first region and a second region. To form the first region, ion implantation into the oxide semiconductor is performed using the first conductor as a mask, and then hydrogen is added to the oxide semiconductor using the first conductor as a mask.
US09666697B2	Semiconductor device and method for manufacturing semiconductor device including an electron trap layer A manufacturing method of a semiconductor device in which the threshold voltage is adjusted is provided. The semiconductor device includes a first semiconductor, an electrode electrically connected to the first semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the first semiconductor. By performing heat treatment at higher than or equal to 125° C. and lower than or equal to 450° C. and, at the same time, keeping a potential of the gate electrode higher than a potential of the electrode for 1 second or more, the threshold voltage is increased.
US09666691B2	Epitaxy profile engineering for FinFETs A method of forming an integrated circuit structure includes providing a wafer including a substrate and a semiconductor fin at a major surface of the substrate, and performing a deposition step to epitaxially grow an epitaxy layer on a top surface and sidewalls of the semiconductor fin, wherein the epitaxy layer includes a semiconductor material. An etch step is then performed to remove a portion of the epitaxy layer, with a remaining portion of the epitaxy layer remaining on the top surface and the sidewalls of the semiconductor fin.
US09666690B2	Integrated circuit and method for fabricating the same having a replacement gate structure An integrated circuit includes a first replacement gate structure. The first replacement gate structure includes a layer of a first barrier material that is less than 20 Å in thickness and a layer of a p-type workfunction material. The replacement gate structure is less than about 50 nm in width.
US09666689B2	Semiconductor device and method for manufacturing the same An object is to reduce the number of photomasks used for manufacturing a transistor and manufacturing a display device to less than the conventional one. The display device is manufactured through, in total, three photolithography steps including one photolithography step which serves as both a step of forming a gate electrode and a step of forming an island-like semiconductor layer, one photolithography step of forming a contact hole after a planarization insulating layer is formed, and one photolithography step which serves as both a step of forming a source electrode and a drain electrode and a step of forming a pixel electrode.
US09666687B1	Method for forming semiconductor structure The present invention provides a method for forming a semiconductor structure, at least including the following steps: first, four sacrificial patterns are formed on a substrate, and a plurality of spacers are then formed surrounding each sacrificial pattern. Next, the four sacrificial patterns are removed, and a photoresist layer is formed between each spacer, covering parts of each spacer. Afterwards, a first etching process is performed to partially remove each spacer, and the photoresist layer is then removed, and a second etching process is then performed, to remove each spacer again, and to form four nanowire hard masks.
US09666686B2	MOS devices having epitaxy regions with reduced facets An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is disposed in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is over the first silicon germanium region. The second silicon germanium region comprises a portion in the opening. The second silicon germanium region has a second germanium percentage greater than the first germanium percentage. A silicon cap substantially free from germanium is over the second silicon germanium region.
US09666685B2	RF power transistor A radio frequency (RF) power transistor includes a semiconductor heterostructure, a gate electrode, a drain electrode and a source electrode. The drain electrode includes an ohmic contact and a Schottky contact extending from the ohmic contact toward the gate electrode, spaced apart from the gate electrode (4) by a distance (LGD), and having a length (LEXT) being not less than 2 μm and not greater than 4 μm. A ratio of the length (LEXT) to a sum of the length (LEXT) and a distance (LGD) is greater than 0.83 and less than 0.98.
US09666683B2	Surface treatment and passivation for high electron mobility transistors A High Electron Mobility Transistor (HEMT) and a method of forming the same are disclosed. The method includes epitaxially growing a first III-V compound layer and epitaxially growing a second III-V compound layer over the first III-V compound layer, wherein a first native oxide layer is formed on the second III-V compound layer. The method further includes in-situ treating the first native oxide layer with a first gas, thereby converting the first native oxide layer into a first crystalline oxide layer. The method further includes forming a first crystalline interfacial layer over the first crystalline oxide layer and forming a dielectric passivation layer over the first crystalline interfacial layer.
US09666681B2	Silicon carbide semiconductor device and method for manufacturing same A trench has first to third side surfaces respectively constituted of first to third semiconductor layers. A first side wall portion included in a first insulating film has first to third regions respectively located on the first to third side surfaces. A second insulating film has a second side wall portion located on the first side wall portion. The second side wall portion has one end and the other end, the one end being connected to the second bottom portion of the second insulating film, the other end being located on one of the first and second regions, the other end being separated from the third region.
US09666680B1	Flash cell and forming process thereof A flash cell includes a gate and an erase gate. The gate is disposed on a substrate, wherein the gate includes a control gate on the substrate and a floating gate having a tip between the substrate and the control gate. The erase gate is disposed beside the gate, wherein the tip points toward the erase gate. The present invention also provides a flash cell forming process including the following steps. A gate is formed on a substrate, wherein the gate includes a floating gate on the substrate. An implantation process is performed on a side part of the floating gate, thereby forming a first doped region in the side part. At least a part of the first doped region is oxidized, thereby forming a floating gate having a tip.
US09666674B2	Formation of large scale single crystalline graphene A method for transfer of a two-dimensional material includes forming a spreading layer of a two-dimensional material on a first substrate. The spreading layer has at least one monolayer. A stressor layer is formed on the spreading layer. The stressor layer is configured to apply stress to a closest monolayer of the spreading layer. The closest monolayer is exfoliated by mechanically splitting the spreading layer wherein at least the closest monolayer remains on the stressor layer. The at least one monolayer is stamped against a second substrate to adhere remnants of the two-dimensional material on the at least one monolayer to the second substrate to provide a single monolayer on the stressor layer. The single monolayer is transferred to a third substrate.
US09666672B2	FinFET device A device includes a first fin including a first semiconductor material. A first dielectric layer is disposed over a top surface of the first fin. A sidewall of the first dielectric layer has a dip-shape profile. A second dielectric layer is disposed along sidewalls of the first fin. A top surface of the second dielectric layer is substantially coplanar with the top surface of the first fin. A second fin includes a second semiconductor material different from the first semiconductor material. An isolation region is disposed between the first fin and the second fin.
US09666671B2	Semiconductor device with composite drift region and related fabrication method A device includes a semiconductor substrate, a body region in the semiconductor substrate having a first conductivity type and in which a channel is formed during operation, source and drain regions in the semiconductor substrate and having a second conductivity type, the source region being disposed on the body region, and a composite drift region in the semiconductor substrate, having the second conductivity type, and through which charge carriers from the source region drift to reach the drain region after passing through the channel. The composite drift region includes a first section adjacent the channel, a second section adjacent the drain region, and a third section disposed between the first and second sections. The first and second sections have a lower effective dopant concentration level than the third section.
US09666667B2	Apparatuses and methods including a superjunction transistor Aspects of the present disclosure are directed toward apparatuses, methods, and systems that include at least two regions of a first semiconductor material and at least two regions of second semiconductor material that are alternatively interleaved. Additionally, the apparatuses, methods, and systems include a first electrode and a second electrode that can operate both as a source and drain. The apparatuses, methods, and systems also include a first gate electrode having multiple portions on the first semiconductor material and a second gate electrode having multiple portions on the second semiconductor material that bidirectionally control current flow between the first electrode and the second electrode.
US09666666B2	Dual-gate trench IGBT with buried floating P-type shield A method of manufacturing an insulated gate bipolar transistor (IGBT) device comprising 1) preparing a semiconductor substrate with an epitaxial layer of a first conductivity type supported on the semiconductor substrate of a second conductivity type; 2) applying a gate trench mask to open a first trench and second trench followed by forming a gate insulation layer to pad the trench and filling the trench with a polysilicon layer to form the first trench gate and the second trench gate; 3) implanting dopants of the first conductivity type to form an upper heavily doped region in the epitaxial layer; and 4) forming a planar gate on top of the first trench gate and apply implanting masks to implant body dopants and source dopants to form a body region and a source region near a top surface of the semiconductor substrate.
US09666658B2	Organic light emitting diode display and manufacturing method thereof Disclosed is an organic light emitting diode (OLED) display including an organic light emitting diode (OLED) display including an insulation substrate and a first electrode disposed on the insulation substrate. A pixel defining layer surrounds the first electrode. The pixel defining layer forms a pixel area on the first electrode. An organic emission layer is disposed on the first electrode in the pixel area. An electrode connecting portion is disposed on the pixel defining layer. A second electrode is disposed on the organic emission layer. The second electrode is connected to the electrode connecting portion.
US09666642B2	Variable resistance memory device and method of driving the same A variable resistance memory device and a driving method thereof are provided. The variable resistance memory device includes a base layer and a pillar-shaped gate electrode formed on the base layer and extending substantially perpendicular to a surface of the base layer. A current transfer layer is formed to surround the pillar-shaped gate electrode. A variable resistance layer formed in an outer portion of the current transfer layer. A blocking layer blocks a path of current flowing through the current transfer layer based on a voltage applied voltage to the pillar-shaped gate electrode, and diverts the current flowing through the current transfer layer to the variable resistance layer.
US09666639B2	Spin torque transfer memory cell structures and methods Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise a STT stack including: a pinned ferromagnetic material in contact with an antiferromagnetic material; a tunneling barrier material positioned between a ferromagnetic storage material and the pinned ferromagnetic material; a multiferroic material in contact with the ferromagnetic storage material; and a first electrode and a second electrode, wherein the antiferromagnetic material, the pinned ferromagnetic material, and the ferromagnetic storage material are located between the first electrode and the second electrode. The STT memory cell structure can include a third electrode and a fourth electrode, wherein at least a first portion of the multiferroic material is located between the third and the fourth electrode.
US09666636B2	Process module for increasing the response of backside illuminated photosensitive imagers and associated methods Backside illuminated photosensitive devices and associated methods are provided. In one aspect, for example, a backside-illuminated photosensitive imager device can include a semiconductor substrate having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation where the textured region includes surface features sized and positioned to facilitate tuning to a preselected wavelength of light, and a dielectric region positioned between the textured region and the at least one junction. The dielectric region is positioned to isolate the at least one junction from the textured region, and the semiconductor substrate and the textured region are positioned such that incoming electromagnetic radiation passes through the semiconductor substrate before contacting the textured region. Additionally, the device includes an electrical transfer element coupled to the semiconductor substrate to transfer an electrical signal from the at least one junction.
US09666625B2	Method of making low profile sensor package with cooling feature A sensor device and method of making same that includes a silicon substrate with opposing first and second surfaces, a sensor formed at or in the first surface, a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor, and a plurality of cooling channels formed as first trenches extending into the second surface but not reaching the first surface. The cooling channels instead can be formed on one or more separate substrates that are attached to the silicon substrate for cooling the silicon substrate.
US09666622B2	Semiconductor integrated circuit device Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.
US09666619B2	CMOS image sensor structure A semiconductor device includes a carrier, a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes inverted pyramid recesses in the second surface. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
US09666618B2	Pixel array with individual exposure control using at least two transfer gates for a pixel or pixel region A pixel array includes a plurality of pixel structures, with each pixel structure having a photo-sensitive element for generating charge in response to incident light; a charge conversion element; a first transfer gate and a second transfer gate connected in series between the photosensitive element and the charge conversion element or between the photosensitive element and a supply line; and an output stage. A first transfer gate control line is connected to the first transfer gates of a first sub-set of the pixel structures in the array; and a second transfer gate control line connected to the second transfer gates of a second sub-set of the pixel structures in the array. The first sub-set of pixel structures and second sub-set of pixel structures partially overlap, having at least one pixel structure in common between them.
US09666617B2	Imaging device, electronic apparatus, and method of manufacturing imaging device An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.
US09666615B2	Semiconductor on insulator substrate with back bias A semiconductor on insulator substrate includes an electrically conductive layer disposed between an electrically insulating handle layer and the semiconductor layer to facilitate the application of a back bias. The connection of the electrically conductive layer to a reference voltage reduces the effects of trapped or fixed charges associated with the handle layer on the threshold voltage of a transistor formed on the semiconductor layer. Silicon-based devices formed on glass, plastic, and quartz substrates are among the devices that can benefit from the application of a back bias.
US09666614B2	Semiconductor display device It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film. Then, in the opening part of the organic resin film, a gate insulating film and the two layer inorganic insulating film containing nitrogen are opened partially by etching to expose an active layer of the TFT.
US09666608B2	Array substrate and display device An array substrate includes a first electrode located above a switching element through a first insulating film, a second electrode located above the first electrode through a second insulating film, and a connection portion that is located to pass through the first insulating film, first electrode, and second insulating film and electrically connects a drain electrode of the switching element and the second electrode. The connection portion is disposed in an avoidance region provided by carving out a gate line connected to the switching element.
US09666607B2	Display device A display device includes a signal line disposed on a substrate. A signal input line is disposed on the substrate and connected to a driver. A first insulating layer is disposed on the signal line. A second insulating layer is disposed on the signal input line and the first insulating layer. First contact holes penetrate the first insulating layer and the second insulating layer and expose a portion of the signal line. Second contact holes penetrate the second insulating layer and expose a portion of the signal input line. A connecting member connects the signal line and the signal input line through the first and the second contact holes and is disposed on the second insulating layer. The first and the second contact holes are alternately arranged in the second insulating layer.
US09666604B2	Display device A display device includes a first pixel, a second pixel, a first substrate, and a second substrate. The first pixel includes a first pixel electrode, a first conductive film, and a first transistor. The first pixel electrode is electrically connected to the first transistor. The first conductive film includes a region functioning as a common electrode. The second pixel includes a second pixel electrode, a second conductive film, and a second transistor. The second pixel electrode is electrically connected to the second transistor. The second conductive film includes a region functioning as a common electrode. The first conductive film and the second pixel electrode are provided on the same plane. A first insulating film is provided over the first conductive film and the second pixel electrode. The first pixel electrode and the second conductive film are provided over the first insulating film.
US09666603B2	Liquid crystal display device with oxide thin film transistor A display device is discussed. The display device includes a substrate having a display area and a pad area in a periphery of the display area, the display area including a plurality of pixel regions; a thin film transistor having a channel layer, and on the substrate; a gate link line and a first common voltage line arranged to cross each other, and having a first insulation film interposed therebetween; a second common voltage line and a data link line arranged to cross each other, and having second insulation film interposed therebetween; a first pattern disposed on the first insulation film; and a second pattern disposed. on the second insulation film, wherein the channel layer, the first pattern and the second pattern are formed of the same material.
US09666602B2	Thin-film transistor substrate and method of manufacturing the thin-film transistor substrate A thin film transistor substrate includes the following elements: a base substrate, a data line disposed on the base substrate, a source electrode contacting the data line, a drain electrode spaced from the source electrode, a channel disposed between the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a gate insulation pattern disposed on the channel, and a gate electrode disposed on the gate insulation pattern.
US09666599B2	Display device having a multilayered undercoating layer of silicon oxide and silicon nitride According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.
US09666598B2	Semiconductor device with an integrated heat sink array An integrated heat sink array is introduced in SOI power devices having multiple unit cells, which can be used to reduce the temperature rise in obtaining more uniform temperature peaks for all the unit cells across the device area, so that the hot spot which is prone to breakdown can be avoided, thus the safe operating area of the device can be improved. Also the array sacrifice less area of the device, therefore results in low Rdson.
US09666595B2	Semiconductor memory device and method of manufacturing the same A semiconductor memory device includes a first layer, a plurality of memory areas, a plurality of contact wires, a first shunt wire, and a second shunt wire. The memory areas are provided on the first layer in a first direction. The contact wires have a longitudinal direction in a second direction perpendicular to the first layer. The contact wires are provided between the adjacent memory areas on the first layer in a third direction intersecting the first direction. The first shunt wire commonly connects the contact wires. The second shunt wire extends in the first direction and is electrically connected to the first shunt wire.
US09666592B2	Memory devices and methods of fabricating the same A memory device includes a substrate having common source regions thereon, common source lines extending along a surface of the substrate and contacting the common source regions, respectively, and channel structures extending away from the surface of the substrate between the common source lines. The common source lines define a unit cell of the memory device therebetween. The memory device further includes an electrode stack structure having interlayer insulating layers and conductive electrode layers that are alternately stacked along sidewalls of the channel structures. The conductive electrode layers define respective gates of selection transistors and memory cell transistors of the memory device. An isolation insulating layer, which includes a portion of a sacrificial layer, is disposed between adjacent ones of the interlayer insulating layers in the stack structure. The isolation insulating layer divides at least one of the conductive electrode layers in the stack structure into electrically separate portions.
US09666591B2	Non-volatile memory with silicided bit line contacts An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density devices and advanced logic processes.
US09666590B2	High stack 3D memory and method of making A method of making a monolithic three dimensional NAND device includes forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming a mask layer over the stack and patterning the mask layer to form at least on opening in the mask layer to expose a top layer of the stack. The method also includes forming a metal block in the at least one opening in the mask layer, etching the stack by metal induced localized etch using the metal block in the at least one opening in the mask layer to form at least one opening in the stack and forming at least one layer of the NAND device in the at least one opening.
US09666589B1	FinFET based flash memory cell A method of manufacturing a semiconductor device is provided including providing a semiconductor substrate, forming a first plurality of semiconductor fins in a logic area of the semiconductor substrate, forming a second plurality of semiconductor fins in a memory area of the semiconductor substrate, forming an insulating layer between the fins of the first plurality of semiconductor fins and between the fins of the second plurality of semiconductor fins, forming an electrode layer over the first and second pluralities of semiconductor fins and the insulating layer, forming gates over semiconductor fins of the first plurality of semiconductor fins in the logic area from the gate electrode layer, and forming sense gates and control gates between semiconductor fins of the second plurality of semiconductor fins in the logic area from the gate electrode layer.
US09666587B1	Semiconductor device and method A structure and method for the formation and use of fuses within a semiconductor device is provided. The fuses may be formed within the third metal layer and are formed so as to be arranged perpendicularly to active devices located on an underlying semiconductor substrate. Additionally, the fuses within the third metal layer may be formed thicker than an underlying second metal layer.
US09666581B2	FinFET with source/drain structure and method of fabrication thereof A method of semiconductor fabrication that includes providing a plurality of fins extending from a substrate is described. Each of the plurality of fins has a top surface and two opposing lateral sidewalls. A gate structure is formed over a first region of each of the plurality of fins and interfaces the top surface and the two opposing lateral sidewalls. A source/drain epitaxial feature is formed on a second region of each of the plurality of fins. The source/drain epitaxial feature interfaces the top surface and the two opposing lateral sidewalls. An air gap is provided which is defined by at least one surface of the source/drain epitaxial feature.
US09666580B1	Nitride semiconductor device and method of manufacturing the same A nitride semiconductor device includes a conductive substrate and a nitride semiconductor layer. The nitride semiconductor layer is disposed on the conductive substrate. The nitride semiconductor layer includes a first transistor structure of a lateral type and a second transistor structure of a lateral type. The conductive substrate includes a first potential control region and a second potential control region capable of controlling potential independently from the first potential control region. In planar view of the nitride semiconductor layer, the first transistor structure overlaps the first potential control region and the second transistor structure overlaps the second potential control region.
US09666577B2	On-SOI integrated circuit equipped with a device for protecting against electrostatic discharges The invention relates to an IC with an electrostatic discharge protection device. There is a buried insulant layer 50 nm or less in thickness and first and second bipolar transistors on the insulant layer, one being an npn transistor and the other a pnp transistor. The base of the first transistor is merged with the collector of the second transistor and the base of the second transistor is merged with the collector of the first transistor. The first and second bipolar transistors are configured to selectively conduct a discharge current between two electrodes of the protection device. There is a first semiconductor ground plane under the insulant layer, being electrically biased, extending until it is plumb with the base of the first bipolar transistor, exhibiting a first type of doping identical to that of the base of the first bipolar transistor with a doping density at least ten times greater.
US09666575B2	Semiconductor arrangement facilitating enhanced thermo-conduction A semiconductor arrangement includes a well region and a first region disposed within the well region. The first region includes a first conductivity type. The semiconductor arrangement includes a first gate disposed above the well region on a first side of the first region. The first gate includes a first top surface facing away from the well region. The first top surface has a first top surface area. The semiconductor arrangement includes a first gate contact disposed above the first gate. The first gate contact includes a first bottom surface facing towards the well region. The first bottom surface has a first bottom surface area. The first bottom surface area covers at least about two thirds of the first top surface area.
US09666574B1	Semiconductor device structure and manufacturing method thereof Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a first transistor configured to include a first threshold voltage level. The first transistor includes a gate structure. The gate structure includes a first component including a first conductive type. A second transistor configures to include a second threshold voltage level different from the first threshold voltage level. The second transistor includes a gate structure. The gate structure includes a second component including the first conductive type. At least one extra component is disposed over the second component. The least one extra component includes a second conductive type opposite to the first conductive type. The first transistor and the second transistor are coupled such that the number of the least one extra component is determined by a desired voltage difference between the first threshold voltage level and the second threshold voltage level.
US09666569B2	Switch circuit of cascode type having high speed switching performance Provided is switch circuit including first and second transistors, a source pad connected to a second node of the second transistor through a first signal path and connected to a gate node of the first transistor through a second signal path, a gate pad connected to a gate node of the second transistor through a third signal path; and a drain pad connected to a first node of the first transistor through a fourth signal path, wherein a second node of the first transistor and a first node of the second transistor are connected to each other through a fifth signal path, and the gate node of the first transistor and the second node of the second transistor are connected to each other through a sixth signal path separated from the first and second signal paths.
US09666565B2	Optical device and method for manufacturing same The present invention relates to an optical device and a method for manufacturing the same. The technical object of the invention is to realize a surface emitting body which allows heat generated from a light-emitting chip to be easily dissipated, eliminates the need for an additional wiring layer, and allows a singular light emitting chips or a plurality of light emitting chips to be arranged in series, in parallel, or in series-parallel. The present invention discloses an optical device comprising: a substrate; a plurality of light emitting chips disposed on the substrate; a plurality of conductive wires which electrically connect the substrate with the light emitting chips such that the plurality of light emitting chips are connected to each other in series, in parallel or in series-parallel; and a protective layer which covers the plurality of light emitting chips and the plurality of conductive wires on the substrate.
US09666556B2	Flip chip packaging An integrated circuit (IC) package includes a first substrate; a second substrate disposed over the first substrate; a plurality of connectors disposed between the first and second substrates such to electrically couple the first and second substrate; a constraint layer disposed over the first and second substrates such that a cavity is formed between the constraint layer and the first substrate; and a molding material disposed within the cavity and extending through the constraint layer. The constraint layer has a top surface and an opposing bottom surface and the molding material extends from the top surface to the bottom surface of the constraint layer.
US09666551B1	Semiconductor chip, semiconductor package including the same, and method of manufacturing semiconductor chip The semiconductor chip including a semiconductor device layer including a pad region and a cell region, a plurality of uppermost wirings formed on the semiconductor device layer to be arranged at an equal distance in the cell region, a passivation layer formed in the cell region and the pad region, and a plurality of thermal bumps disposed on the passivation layer to be electrically insulated from the plurality of uppermost wirings may be provided. The semiconductor device layer may include a plurality of through silicon via (TSV) structures in the pad region. The plurality of uppermost wirings may extend in parallel along one direction and have a same width. The passivation layer may cover at least a top surface of the plurality of uppermost wirings in the cell region and includes a top surface having a wave shape.
US09666549B2	Methods for solder for through-mold interconnect Generally discussed herein are systems and apparatuses that include an extended TSBA ball and techniques for making the same. According to an example, a technique can include forming a circuit substrate including forming a circuit on a substrate, the circuit exposed along an upper surface of the substrate, wherein the substrate is for coupling the circuit with a die along a lower surface of the circuit substrate. A molding can be formed onto an upper surface of the circuit substrate, over the circuit of the circuit substrate. An opening can be defined in the molding so that the opening can extend to a top surface of the molding to at least a portion of the circuit. Solder can be formed into the opening, including conforming the solder to the opening and the circuit substrate.
US09666548B2	Method of fabricating connection structure for a substrate A connection structure for a substrate is provided. The substrate has a plurality of connection pads and an insulation protection layer with the connection pads being exposed therefrom. The connection structure includes a metallic layer formed on an exposed surface of each of the connection pads and extending to the insulation protection layer, and a plurality of conductive bumps disposed on the metallic layer and spaced apart from one another at a distance less than or equal to 80 μm, each of conductive bumps having a width less than a width of each of the connection pads. Since the metallic layer covers the exposed surfaces of the connection pads completely, a colloid material will not flow to a surface of the connection pads during a subsequent underfilling process of a flip-chip process. Therefore, the colloid material will not be peeled off from the connection pads.
US09666547B2	Method of refining solder materials The invention includes solder materials having low concentrations of alpha particle emitters, and includes methods of purification of materials to reduce a concentration of alpha particle emitters within the materials. The invention includes methods of reducing alpha particle flux in various lead-containing and lead-free materials through purification of the materials. The invention also includes methods of estimating the fractionation of a low concentration of one or more alpha particle emitters during purification of a material.
US09666544B2	Package substrate differential impedance optimization for 25 GBPS and beyond A package design method is disclosed for the optimization of package differential impedance at data rates of 25 Gb/s and beyond. The method optimizes the differential impedance of package vertical interconnections of BGA ball, via, and PTH as well as around the joint between the vertical interconnection and the horizontal interconnection of trace. At 8 ps rise time, a <5% impedance variation is obtained with a 0.8 mm BGA ball pitch and a 10-layer buildup substrate and a <10% impedance variation is obtained with a 1 mm BGA ball pitch and a 14-layer buildup substrate. The method is applicable to all BGA package designs running at 25 Gb/s and beyond.
US09666542B2	Wiring substrate and manufacturing method thereof A wiring substrate is provided with a support substrate (31), an insulating layer (32), and a wiring layer (33). The support substrate (31) is formed with a hole (34) including an opening portion in one surface of the support substrate (31). The insulating layer (32) is formed on a surface of the support substrate (31) opposite to the one surface thereof including the opening portion. The wiring layer (33) includes a wiring pattern of a predetermined structure on the insulating layer (32). Further, an orthographic projection to be obtained when the wiring pattern is projected on a predetermined surface of the support substrate (31), and an orthographic projection to be obtained when the hole (34) is projected on the predetermined surface of the support substrate (31) include a shared portion.
US09666541B2	Electronic device, manufacturing method of the same, and network system An electronic device includes: a substrate; a first all-solid-state secondary cell provided on the substrate, the first all-solid-state secondary cell including a first electrode layer, a solid electrolyte layer, and a second electrode layer; a first transistor including a first source drain, a second source drain electrically connected to the second electrode layer, and a first gate electrode; a first terminal electrically connected to the first electrode layer; a second terminal to control a potential of the first gate electrode; a third terminal electrically connected to the first source drain; and a sealing layer covering the first all-solid-state secondary cell and the first transistor, wherein the first terminal, the second terminal, and the third terminal are exposed on an upper surface of the sealing layer.
US09666540B2	Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die A semiconductor device is made by mounting a prefabricated heat spreader frame over a temporary substrate. The heat spreader frame includes vertical bodies over a flat plate. A semiconductor die is mounted to the heat spreader frame for thermal dissipation. An encapsulant is deposited around the vertical bodies and semiconductor die while leaving contact pads on the semiconductor die exposed. The encapsulant can be deposited using a wafer level direct/top gate molding process or wafer level film assist molding process. An interconnect structure is formed over the semiconductor die. The interconnect structure includes a first conductive layer formed over the semiconductor die, an insulating layer formed over the first conductive layer, and a second conductive layer formed over the first conductive layer and insulating layer. The temporary substrate is removed, dicing tape is applied to the heat spreader frame, and the semiconductor die is singulated.
US09666539B1	Packaging for high speed chip to chip communication Disclosed are chip packaging structures for high speed chip to chip and chip to carrier communications and methods of making such structures. The chip packaging structures do not require an interposer containing through silicon vias and/or provide structures having reduced warping.
US09666536B2	Package structure and fabrication method thereof The present invention provides a package structure and fabrication method thereof. The method includes providing a first carrier having a metal layer; forming a dielectric layer on the metal layer; forming a plurality of conductive pillars embedded into the dielectric layer and protruding from a surface of the dielectric layer, and disposing an electronic component on the surface of the dielectric layer; forming an encapsulating layer on the dielectric layer to encompass the plurality of conductive pillars, the dielectric layer and the electronic component; removing a portion of the encapsulating layer and the first carrier such that two ends of each of the plurality of conductive pillars are exposed from the encapsulating layer and the dielectric layer. Therefore, the present invention effectively reduces manufacturing costs and the need for an opening process while manufacturing the conductive pillars can be eliminated.
US09666535B2	Flexible display panel Embodiments of the present invention disclose a flexible display panel. The flexible display panel at least comprises an display area, a fanout area and a driver circuit area, wherein the fanout area is positioned between the display area and the driver circuit area to connect the display area with the driver circuit area, and the fanout area comprises at least one zig-zag fanout wire, each of which comprises a plurality of fanout wire segments divided by bending points. In the technical solutions of the present invention, by utilizing a zig-zag wiring manner, damage to metal wires when bending is reduced, bending resistance of the fanout area is improved and damage to the screen when bending the flexible display panel is avoided or reduced.
US09666532B2	Twisted array design for high speed vertical channel 3D NAND memory Roughly described, a memory device has a multilevel stack of conductive layers. Vertically oriented pillars each include series-connected memory cells at cross-points between the pillars and the conductive layers. SSLs run above the conductive layers, each intersection of a pillar and an SSL defining a respective select gate of the pillar. Bit lines run above the SSLs. The pillars are arranged on a regular grid which is rotated relative to the bit lines. The grid may have a square, rectangle or diamond-shaped unit cell, and may be rotated relative to the bit lines by an angle θ where tan(θ)=±X/Y, where X and Y are co-prime integers. The SSLs may be made wide enough so as to intersect two pillars on one side of the unit cell, or all pillars of the cell, or sufficiently wide as to intersect pillars in two or more non-adjacent cells.
US09666527B1	Middle of the line integrated eFuse in trench EPI structure A fuse includes a semiconductor layer having a dielectric material formed thereon. An epitaxially grown material is formed in a trench within the dielectric material. The epitaxially grown material includes a peak region. A fuse metal is formed over the peak region and extends along sidewalls of the trench and over the dielectric material outside the trench. Contacts are formed outside the trench connecting to fuse metal over the dielectric material.
US09666525B2	Three-dimensional semiconductor memory device Three-dimensional (3D) semiconductor memory devices capable of improving reliability may be provided. For example, a three dimensional (3D) memory device, in which a plurality of memory cell strings are vertically arranged, may include a substrate, a stack structure of alternating a plurality of interlayer dielectric (ILD) layers and a plurality of gate electrodes, at least one of the ILD layers including pores, a vertical structure penetrating the stack structure and electrically connected to the substrate, and a data storage layer between the stack structure and the vertical structure.
US09666518B1	Semiconductor device A semiconductor device includes a plurality of metal patterns formed on a ceramic substrate, and a semiconductor chip mounted on some of the plurality of metal patterns. Also, a plurality of hollow portions are formed in peripheral portions of the plurality of metal patterns. In addition, the plurality of hollow portions are not formed in a region overlapping the semiconductor chip in the plurality of metal patterns. Furthermore, the plurality of hollow portions are provided in a plurality of metal patterns arranged at a position closest to the peripheral portion of the top surface of the ceramic substrate among the plurality of metal patterns.
US09666516B2	Electronic packages and methods of making and using the same An electronic package and a method of making the same in provided. The electronic package includes a dielectric layer and a conformal masking layer disposed on at least a portion of the dielectric layer. The electronic package further includes a routing layer disposed on at least a portion of the masking layer and a micro-via disposed at least in part in the conformal masking layer and the routing layer. Further, at least a portion of the routing layer forms a conformal electrically conductive layer in at least a portion of the micro-via. Also, the conformal masking layer is configured to define a size of the micro-via. The electronic package further includes a semiconductor die operatively coupled to the micro-via.
US09666508B2	Gallium arsenide devices with copper backside for direct die solder attach Systems, apparatuses, and methods related to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits are disclosed. Copper can be used as the contact material for a GaAs integrated circuit. Metallization of the wafer and through-wafer vias can be achieved through copper plating processes disclosed herein. Direct die solder (DDS) attach can be achieved by use of electroless nickel plating of the copper contact layer followed by a palladium flash. GaAs integrated circuits can be singulated, packaged, and incorporated into various electronic devices.
US09666506B2	Heat spreader with wiring substrate for reduced thickness A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, a heat dissipation plate arranged on an upper surface of the semiconductor element with an adhesive arranged in between, and an encapsulation resin filling a gap between the heat dissipation plate and the wiring substrate. The heat dissipation plate includes a body and a projection. The body is overlapped with the semiconductor element in a plan view and has a larger planar shape than the semiconductor element. The projection is formed integrally with the body. The projection projects outward from an end of the body and is located below the body. The encapsulation resin covers upper and lower surfaces of the projection. The body includes an upper surface exposed from the encapsulation resin.
US09666504B2	Heat sink for cooling of power semiconductor modules A heat sink for cooling at least one power semiconductor module, and that includes a basin for containing a cooling liquid. The basin has a contact rim for receiving the base plate and that includes a surface that is sloped inwards to the basin.
US09666503B2	Semiconductor package and electronic system including the same A semiconductor package and an electronic system including the same include a package board having an electric circuit pattern. A semiconductor chip is mounted on the package board and electrically connected with the circuit pattern of the package board. A non-contact temperature detector is provided with the semiconductor package and detects a temperature of an external heat source without making contact with the external heat source. A temperature controller controls the semiconductor chip according to the temperature of the external heat source that is detected by the non-contact temperature detector.
US09666501B2	Semiconductor device including a lead frame A semiconductor device including a die pad having a front surface made of Cu; a semiconductor chip disposed so as to be opposed to the front surface of the die pad; a bonding layer provided between the die pad and the semiconductor chip; and a plurality of leads disposed around the die pad, wherein the die pad and the plurality of leads make up a lead frame in cooperation with each other, a cavity is fabricated on the surface of the plurality of leads, and a projecting portion is fabricated next to the cavity.
US09666499B2	Semiconductor device with encapsulant Described are techniques related to semiconductor devices that make use of encapsulant. In one implementation, a semiconductor device may be manufactured to include at least an encapsulant that includes at least glass particles.
US09666498B2	Ring-frame power package The present disclosure relates to a ring-frame power package. The ring-frame power package includes a thermal carrier and a ring structure. The thermal carrier has a carrier surface. The ring structure is disposed over the carrier surface of the thermal carrier so that a portion of the carrier surface is exposed through an interior opening of the ring body. The ring structure also includes one or more interconnect tabs that extend outward from an outer periphery of the ring body. Each interconnect tab includes a top plated area that covers at least a portion of a top surface and a bottom plated area that covers at least a bottom surface of the respective interconnect tab. Notably, each top plated area also covers a contact portion of the ring body that is adjacent to the respective interconnect tab. Each top plated area is electrically coupled to the corresponding bottom plated area.
US09666492B2	CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture Architectures and techniques for co-integration of heterogeneous materials, such as group III-V semiconductor materials and group IV semiconductors (e.g., Ge) on a same substrate (e.g. silicon). In embodiments, multi-layer heterogeneous semiconductor material stacks having alternating nanowire and sacrificial layers are employed to release nanowires and permit formation of a coaxial gate structure that completely surrounds a channel region of the nanowire transistor. In embodiments, individual PMOS and NMOS channel semiconductor materials are co-integrated with a starting substrate having a blanket layers of alternating Ge/III-V layers. In embodiments, vertical integration of a plurality of stacked nanowires within an individual PMOS and individual NMOS device enable significant drive current for a given layout area.
US09666486B1	Contained punch through stopper for CMOS structures on a strain relaxed buffer substrate A semiconductor structure is provided in which the diffusion of arsenic is retarded. The structure includes a strain relaxed silicon germanium alloy buffer layer located on a surface of a silicon substrate. A boron-containing p-well region is located in a first region of a carbon doped silicon germanium alloy layer and on a first portion of the strain relaxed silicon germanium alloy buffer layer, and a phosphorus-containing n-well region is located in a second region of the carbon doped silicon germanium alloy layer and on a second portion of the strain relaxed silicon germanium alloy buffer layer. A tensily strained silicon material is located on a surface of the p-well region, and a compressively strained germanium-containing material is located on a surface of the n-well region.
US09666484B2	Integrated circuit protected from short circuits caused by silicide An integrated circuit is formed on a semiconductor substrate and includes a trench conductor and a first transistor formed on the surface of the substrate. The transistor includes: a transistor gate structure, a first doped region extending in the substrate between a first edge of the gate structure and an upper edge of the trench conductor, and a first spacer formed on the first edge of the gate structure and above the first doped region. The first spacer completely covers the first doped region and a silicide is present on the trench conductor but is not present on the surface of the first doped region.
US09666482B1	Self aligned silicon carbide contact formation using protective layer A silicon-carbide substrate that includes a doped contact region and a dielectric layer is provided. A protective layer is formed on the dielectric layer. A structured mask is formed on the protective layer. Sections of the protective layer and the dielectric layer that are exposed by openings in the mask are removed. The structured mask is removed. A metal layer is deposited such that a first portion of the metal layer directly contacts the doped contact region and a second portion of the metal layer lines the remaining sections of the protective layer and the dielectric layer. A first rapid thermal anneal process is performed. After performing the first rapid thermal anneal process, the second portion of the metal layer and the remaining section of the protective layer are removed without removing the first portion of the metal layer.
US09666478B2	Methods of forming wiring structures and methods of manufacturing semiconductor devices In a method of forming a wiring structure, an insulating interlayer is formed on a substrate. The insulating interlayer includes an opening and has pores distributed therein and exposed at a surface thereof. The insulating interlayer is exposed to a silane compound to form a pore sealing layer on the surface of the insulating interlayer and a sidewall of the opening. A conductive pattern filling the opening is formed on the pore sealing layer.
US09666477B2	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming a first insulating film as a portion of a laminated insulating film on a substrate in which a plurality of circuit configurations is formed; polishing the first insulating film; measuring a film thickness distribution of the first insulating film; and forming a second insulating film as a portion of the laminated insulating film on the polished first insulating film at a film thickness distribution differing from the film thickness distribution of the first insulating film to correct a film thickness of the laminated insulating film.
US09666475B2	Semiconductor structure with airgap A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
US09666470B2	Receptacle device, device and method for handling substrate stacks The invention relates to a retaining system for handling substrate stacks, including a retaining surface for retaining a first substrate, and one or more recesses provided relative to the retaining surface, for retaining first magnetic bodies for securing the first substrate relative to a second substrate that is aligned with the first substrate. Second magnetic bodies are applied on a holding side of the second substrate.
US09666466B2	Electrostatic chuck having thermally isolated zones with minimal crosstalk A substrate support assembly includes a ceramic puck and a thermally conductive base having an upper surface that is bonded to a lower surface of the ceramic puck. The thermally conductive base includes a plurality of thermal zones and a plurality of thermal isolators that extend from the upper surface of the thermally conductive base towards a lower surface of the thermally conductive base, wherein each of the plurality of thermal isolators provides approximate thermal isolation between two of the plurality of thermal zones at the upper surface of the thermally conductive base.
US09666464B2	Substrate processing apparatus and substrate processing method Provided is a substrate processing apparatus including: a carry-in area where a placing table is provided to place thereon a carrying container including a take-out opening, a flange formed on an upper portion of a side formed with the take-out opening, and a recess formed on a top surface of the flange; a transfer area maintained under an atmosphere different from that of the carry-in area; a partition wall configured to partition the carry-in area and the transfer area and formed with an opening; a door configured to open/close the opening; a carrying container pressing unit configured to press the carrying container placed on the placing table against the partition wall so that the take-out opening of the carrying container faces the opening of the partition wall; and a carrying container holding unit configured to be inserted into the recess to press the carrying container against the partition wall.
US09666457B2	Adsorption device for rotatable heating An adsorption device for rotatable heating is provided with an adsorption heating plate, a support needle driving device, a rotary sliding ring, and a turning shaft. The adsorption heating plate is amounted at the top of the turning shaft, and a wafer is arranged at the top of the adsorption heating plate. The rotary sliding ring is connected to the turning shaft in which a vacuum channel and a connection wire channel are arranged. Support needles are connected to the output end of the support needle driving device, run through the adsorption heating plate, and are arranged at the bottom of the wafer uniformly. The adsorption device incorporates the wafer adsorption function, the wafer rotating function with controllable speed, and the heating function for heating the wafer to reach different temperatures, thereby providing adsorption and heating rotation at the same time.
US09666455B2	Substrate cleaning apparatus A substrate cleaning apparatus cleans a surface of a substrate such as a semiconductor wafer and dries the substrate. The substrate cleaning apparatus includes a process chamber having a substrate conveying unit configured to hold a substrate horizontally with its upper surface facing upwardly and to convey the substrate in one direction, and a cleaning unit configured to clean the surface of the substrate in non-contact state by supplying a cleaning liquid to the surface of the substrate which is moving in the process chamber. The substrate apparatus has an inert gas blowing unit configured to blow an inert gas toward the front and reverse surfaces of the substrate which has been cleaned in the cleaning unit to produce an inert gas atmosphere in the process chamber while drying the substrate with the inert gas.
US09666453B2	Semiconductor package and a substrate for packaging A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.
US09666450B2	Substrate and assembly thereof with dielectric removal for increased post height An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions. Electrically conductive projections for bonding to electrically conductive contacts of at least one component external to the substrate, extend from the conductive elements above the at least one wiring layer. The conductive projections have end portions remote from the conductive elements and neck portions between the conductive elements and the end portions. The end portions have lower surfaces extending outwardly from the neck portions in at least one of the lateral directions. The substrate further includes a dielectric layer overlying the conductive elements and extending upwardly along the neck portions at least to the lower surfaces. At least portions of the dielectric layer between the conductive projections are recessed below a height of the lower surfaces.
US09666449B2	Conductors having a variable concentration of germanium for governing removal rates of the conductor during control gate formation An embodiment of a method of forming a control gate includes forming a conductor having a concentration of germanium that varies with a thickness of the conductor, and removing portions of the conductor at a variable rate that is governed, at least in part, by the concentration of the germanium.
US09666448B2	Methods of forming patterns A method of forming patterns includes forming an array of pillars on an underlying layer stacked on an etch target layer, forming a separation wall layer on the pillars to provide separation walls covering sidewalls of the pillars, forming a block copolymer layer on the separation wall layer, annealing the block copolymer layer to form first domains located between the pillars, and a second domain surrounding and isolating the first domains, selectively removing the first domains to form second openings, selectively removing the pillars to form fourth openings, forming fifth openings that extend from the second and fourth openings to penetrate the underlying layer, forming a sealing pattern that covers and seals dummy openings among the fifth openings, and forming seventh openings that extend from the fifth openings exposed by the sealing pattern to penetrate the etch target layer.
US09666436B2	Ion implantation methods Provided are methods of forming an ion implanted region in a semiconductor device. The methods comprise: (a) providing a semiconductor substrate having a plurality of regions to be ion implanted; (b) forming a photoresist pattern on the semiconductor substrate, wherein the photoresist pattern is formed from a chemically amplified photoresist composition comprising a matrix polymer having acid labile groups, a photoacid generator and a solvent; (c) coating a descumming composition over the photoresist pattern, wherein the descumming composition comprises: a matrix polymer; a free acid; and a solvent; (d) heating the coated semiconductor substrate; (e) contacting the coated semiconductor substrate with a rinsing agent to remove residual descumming composition and scum from the substrate; and (f) ion implanting the plurality of regions of the semiconductor substrate using the photoresist pattern as an implant mask. The methods find particular applicability in the manufacture of semiconductor devices.
US09666435B2	Apparatus and process for integrated gas blending A system (10) for delivery of dilute fluid, utilizing an active fluid source (12), a diluent fluid source (14), a fluid flow metering device (24) for dispensing of one of the active and diluent fluids, a mixer (38) arranged to mix the active and diluent fluids to form a diluted active fluid mixture, and a monitor (42) arranged to sense concentration of active fluid and/or diluent fluid in the diluted active fluid mixture, and responsively adjust the fluid flow metering device (24) to achieve a predetermined concentration of active fluid in the diluted active fluid mixture. A pressure controller (34) is arranged to control flow of the other of the active and diluent fluids so as to maintain a predetermined pressure of the diluted active fluid mixture dispensed from the system. The fluid dispensed from the system then can be adjustably controlled by a flow rate controller, e.g., a mass flow controller, to provide a desired flow to a fluid-utilizing unit, such as a semiconductor process tool. An end point monitoring assembly is also described, for switching fluid sources (12, 15) to maintain continuity of delivery of the diluted active fluid mixture.
US09666434B2	Method for forming fine patterns of semiconductor device A method for forming fine patterns includes patterning a hard mask layer on an etch target layer to form sacrificial pillars and a first opening disposed between the sacrificial pillars and exposing the etch target layer, forming a block copolymer layer on the etch target layer exposed through the first opening, phase-separating the block copolymer layer to form first block patterns spaced apart from the sacrificial pillars and a second block pattern, forming first holes by etching the etch target layer exposed by removing the first block patterns, and forming second holes in the etch target layer exposed by removing the sacrificial pillars, the second holes being different from the first holes.
US09666430B2	Method of manufacturing semiconductor device and substrate processing apparatus A film is formed on a substrate by performing a cycle at least twice, the cycle including a nucleus formation process for forming nuclei on the substrate and a nucleus growth suppression process for suppressing growth of the nuclei. A time required for the nucleus growth suppression process is less than or equal to a time required for the nucleus formation process. Alternatively, the nucleus formation process is further performed after the cycle is repeatedly performed a plurality of times.
US09666426B2	Methods and apparatus for uniformly metallization on substrates An apparatus for substrate metallization from electrolyte is provided. The apparatus comprises: an immersion cell containing metal salt electrolyte; at least one electrode connecting to at least one power supply; an electrically conductive substrate holder holding at least one substrate to expose a conductive side of the substrate to face the at least one electrode; an oscillating actuator for oscillating the substrate holder with an amplitude and a frequency; at least one ultrasonic device with an operating frequency and an intensity, disposed in the metallization apparatus; at least one ultrasonic power generator connecting to the ultrasonic device; at least one inlet for metal slat electrolyte feeding; and at least one outlet for metal salt electrolyte draining.
US09666425B2	Gas discharge lamp A gas discharge lamp has an inner bulb with a discharge vessel with two sealing sections thereon, from which electrodes protrude into the discharge vessel, each electrically connected with a conductor in the associated sealing section to supply current to the electrodes. The lamp also has an outer bulb surrounding the discharge vessel, leaving a cavity therebetween. Close to at least one of the electrodes in or near a transitional area between the discharge vessel and the associated sealing section on an outside of the inner bulb is arranged potential-free a conductive structure which on application of a voltage to the electrodes influences the electrical field adjacent the electrodes such that a discharge arc travels from the electrode first in the direction of a wall section of the discharge vessel adjacent the electrode and then over the inside of the wall toward the other electrode.
US09666421B2	Mass spectrometry data display device and mass spectrometry data display program A mass spectrometry data display device in which the mass axis (m/z axis) is made into a ring shape and the intensity axis is the radial direction thereof, and peak information (in the drawing, the compound name and structural formula candidates) are arranged in a ring shape in correspondence with the peaks along the outer circumference of the mass spectrum and displayed together therewith on a screen.
US09666420B2	System and method of detection and quantification by mass spectrometry and by activating ionised molecular species Disclosed is a system and method of mass spectrometry, including: a. ionizing an analyte to form a precursor ion (A) having a mass-to-charge ratio (m/z), in which m represents the mass and z the electric charge number; b. activating the precursor ion (A) by interaction with a beam of neutral species, ions, electrons or photons, having an energy chosen on the basis of the physicochemical properties of the precursor ion, the activation being suitable for producing a product ion (B, C) having the same mass m as the precursor ion (A) and an electric charge number z′ such that z′ is a non-zero integer different from z; c. separating the product ion (B, C, E, F) having a predefined mass-to-charge ratio (m/z′); d. detecting the product ion (B, C) having the predefined mass-to-charge ratio (m/z′).
US09666413B2	Ion implantation apparatus and control method for ion implantation apparatus Provided is an ion implantation apparatus including: a vacuum processing chamber in which an ion implantation process for a wafer is performed; one or more load lock chambers that are used for bringing the wafer into the vacuum processing chamber and taking out the wafer from the vacuum processing chamber; an intermediate conveyance chamber that is disposed to be adjacent to both the vacuum processing chamber and the load lock chamber; a load lock chamber-intermediate conveyance chamber communication mechanism including a gate valve capable of sealing a load lock chamber-intermediate conveyance chamber communication port; and an intermediate conveyance chamber-vacuum processing chamber communication mechanism including a movable shielding plate capable of shielding a part or the whole of the intermediate conveyance chamber-vacuum processing chamber communication port.
US09666410B2	Charged particle beam device Proposed is a charged particle beam device including an arithmetic processing unit that generates an image of a sample, based on a detection signal that is detected based on irradiation to the sample with a charged particle beam emitted from a charged particle source. The arithmetic processing unit searches a second image as a search target image with use of a first image as a template, and when a region corresponding to the first image is not detected in the second image, the arithmetic processing unit searches a third image that represents a region larger than a region displayed in the second image, with use of a second template.
US09666405B1	System for imaging a signal charged particle beam, method for imaging a signal charged particle beam, and charged particle beam device The present disclosure provides a system for imaging a signal charged particle beam emanating from a sample by impingement of a primary charged particle beam. The system includes a detector arrangement having a first detection element for detecting a first signal charged particle sub-beam of the signal charged particle beam originating from a first spot on the sample and a second detection element for detecting a second signal charged particle sub-beam of the signal charged particle beam originating from a second spot on the sample, wherein the first detection element and the second detection element are separated from each other, and signal charged particle optics. The signal charged particle optics includes a coil configured to generate a magnetic field having a magnetic field component parallel to a longitudinal axis of the coil, wherein the magnetic field acts on the first signal charged particle sub-beam and the second signal charged particle sub-beam propagating along the longitudinal axis, and wherein an aspect ratio of the coil is at least 1, and a controller configured to adjust the magnetic field of the coil such that the first signal charged particle sub-beam is directed towards the first detection element and the second signal charged particle sub-beam is directed towards the second detection element.
US09666404B2	Charged particle source arrangement for a charged particle beam device, charged particle beam device for sample inspection, and method for providing a primary charged particle beam for sample inspection in a charged particle beam The present disclosure provides a charged particle source arrangement for a charged particle beam device. The charged particle source arrangement includes: a first vacuum region and a second vacuum region; a charged particle source in the first vacuum region, wherein the charged particle source is configured to generate a primary charged particle beam; and a membrane configured to provide a gas barrier between the first vacuum region and the second vacuum region, and wherein the membrane is configured to let at least a portion of the primary charged particle beam pass through the membrane, wherein a first vacuum generation device is connectable to the first vacuum region and a second vacuum generation device is connectable to the second vacuum region.
US09666400B2	Field emission electron source and field emission device A field emission electron source includes a linear carbon nanotube structure, an insulating layer and at least one conductive ring. The linear carbon nanotube structure has a first end and a second end. The insulating layer is located on outer surface of the linear carbon nanotube structure. The first conductive ring includes a first ring face 1301 and a second ring face, an end surface of the linear carbon nanotube structure, and the first ring face are coplanar.
US09666396B2	Electromagnetic inductive load control device With a relay control device according to an embodiment, a regenerative current from a relay coil which is disposed in a relay flows through a coil energy absorption circuit, which is connected to the low side of the relay coil, toward the ground. A current detection resistor, which is a shunt resistor, is connected further toward the ground side of the coil energy absorption circuit than a coil surge absorption resistor, and the potential of the current detection resistor is compared to a reference potential, with a current detection circuit. Furthermore, on the basis of the result of the comparison with the current detection circuit, an off-duty period of the PWM control is terminated before the current which flows through the relay coil becomes less than or equal to a minimum drive current.
US09666395B2	Power semiconductor module Provided is a power semiconductor module wherein stress generated at a soldering section of a relay terminal is relaxed. A power semiconductor module (1) is provided with a substrate (2), relay terminals (9, 10), external connecting terminals (13, 14) and a relay terminal holding member (6). The relay terminals (9, 10) are connected to the substrate (2) with a solder (4) therebetween. The external connecting terminals (13, 14) are bonded to the relay terminals (9, 10), respectively. The non-conductive relay terminal holding member (6) holds end portions of the relay terminals (9, 10) said end portions being on the side bonded to the solder (4).
US09666393B1	High voltage vertical break disconnect switch with blade position detector and rollover indicator A blade position detector and rollover indicator is operatively attached to an elongated movable switch-blade assembly of a horizontally mounted high voltage vertical break disconnect switch. The blade position detector and rollover indicator is gravity responsive and attached in predetermined position to the elongated disconnect blade assembly that reacts when the proper angle of closure of the blade is obtained in an intermediated closed switch position and finally when the proper angle of blade rollover is obtained in a fully closed switch position to provide a visual indication of full closure of the disconnect switch.
US09666392B2	Electric switching device An electric switching device contains a first contact piece and a second contact piece. The first contact piece can be driven by a first kinematic chain. The second contact piece can be driven by a second kinematic chain. The electric switching device contains a first switching point and a second switching point, which are electrically connected in series, the first contact piece being associated with the first switching point and the second contact piece with the second switching point.
US09666391B2	Retractable snap domes A retractable snap dome in a keyboard, serving as a force resistor for a key in a conventional manner, includes an additional collapsed state wherein the key can be retracted by an electromechanical polymer (EMP) actuator to a persistent down position. In one embodiment, the EMP actuator is a bimorph EMP actuator that can be actuated to bring the key from down position to up position, ready for conventional keyboard operation, and vice versa. Such operations allow the keyboard to have a desirable decreased thickness relative to conventional keyboards. Thus, a keyboard of the present invention finds application in ultra-slim electronic devices. When provided in a notebook computer wherein the keyboard is folded against a video or graphic display, the keyboard keys may be placed in the retracted down position, thereby preventing the keys from pressing against the video or graphical display with a force that may damage the display.
US09666387B2	Waterproof button structure A waterproof button structure includes a housing, a button cap, a plurality of waterproof elements and a fastening member. The housing has a first surface and a second surface, and is formed with a pair of through holes and a groove. The button cap is capable of correspondingly moving a long a normal direction of the first surface of the housing, and includes a pair of button shafts respectively inserted in the pair of through holes. The waterproof elements are disposed between the button shafts and the through holes. The fastening member is assembled to the button shafts and is disposed correspondingly to the second surface. The fastening member includes a bent portion. The bent portion is disposed in protrusion towards the groove and includes a protrusion. When the button cap is pressed, the protrusion is abutted against a press switch.
US09666386B2	Keyboard integrated pushbutton with multi illumination A multi-illuminated pushbutton, including a substrate having a switch and a button cap. A lighting board may be affixed to the substrate, the lighting board having a first light source, a second light source, and a through channel disposed between the first light source and the second light source. The button cap can have a first window for transmission of light from the first light source, a second window for transmission of light from the second light source, and a button base disposed through the channel of the lighting board and in operable relation with the switch. The button base can be shaped to prevent substantially all light emitted from the first light source from transmission through the second window and prevents substantially all light emitted from the second light source from transmission through the first window.
US09666385B2	Housing with disassembly indicator A housing containing its own record of any private and unwarranted disassembly includes a first shell, a second shell detachably connected with the second shell, a consumer disassembly indication structure. The consumer disassembly indication structure includes a circuit board, a plurality of switches, a computer chip, a plurality of conductive bodies, and a plurality of insulative bodies. The plurality of switches are fixed on the circuit board and each is electrically connected with the computer chip. The computer chip is configured to record electric connections between the conductive bodies and switches, the original electric connections being changed to other or no connections after any disassembly of the housing.
US09666383B2	Electrical contact device and low-voltage single-pole phase unit incorporating such an electrical contact device The invention relates to an electric contact device that is part of an electric switching device able to allow or interrupt the passage of the electric current, comprising at least one moving support (33, 35) and a contact pad (60, 62) mounted on the moving support (33, 35), the moving support (33, 35) being able to move to position the contact pad (60, 62) in contact with a fixed contact surface (38, 40) connected to an electrical conductor, the contact pad (60, 62) comprising a contact surface (34, 36) designed to cooperate with said fixed contact surface (38, 40). The contact surface (34, 36) of the contact pad (60, 62) comprises a first spherical portion, comprising an actual zone of contact with said fixed contact surface (38, 40) in the position allowing the passage of current, and, in the continuation of the first spherical portion, a second convex portion with a variable shape going from spherical to cylindrical.The invention also relates to a low-voltage single-pole phase unit comprising such an electrical contact device.
US09666382B2	Silver and copper alloyed rivet contact The present invention is a rivet contact including a head portion and a foot portion having a smaller width than the head portion, wherein the head portion contains a contact material layer having at least a top containing an Ag-based contact material; the rest of the head portion and the foot portion contain a base material containing Cu or a Cu alloy; and a barrier layer including an Ag alloy is provided at a junction interface between the contact material and the base material. Here, an Ag alloy obtained in such a manner that one or more base metal elements of Sn, In, Cu, Ni, Fe, Co, W, Mo, Zn, Cd, Te, and Bi are added to Ag by 0.03 to 20 mass % is preferably used as the Ag alloy constituting the barrier layer.
US09666379B2	Nickel supercapacitor engine starting module This invention relates to a supercapacitor assembly having an asymmetric supercapacitor, a diode, and a switch in parallel with the diode. The asymmetric supercapacitor has at least one positive electrode, at least one negative electrode, and at least one separator impregnated with an electrolyte. The diode has an anode and a cathode, the cathode being electrically connected to the supercapacitor.
US09666376B2	Conductive paste and solid electrolytic capacitor including the same A solid electrolytic capacitor that includes a valve action metal base, an insulating layer, a solid electrolyte layer, a carbon layer and an electrode layer sequentially formed in one of two parts of the valve action metal base. The electrode layer is formed from a conductive paste that includes at least a conductive filler, a thermosetting resin containing a phenoxy resin, and a curing agent.
US09666375B2	Voltage smoothing circuit, voltage conversion circuit, and method for controlling voltage to be applied to multilayer capacitor A voltage smoothing circuit includes a first multilayer capacitor, a second multilayer capacitor, and a regulator including an input terminal electrically connected to the second multilayer capacitor and an output terminal electrically connected to the first multilayer capacitor. The regulator calculates a first voltage applied to the first multilayer capacitor based on a second voltage applied to the second multilayer capacitor from the input terminal such that a potential difference which is applied to the first multilayer capacitor decreases or increases when a potential difference which is applied to the second multilayer capacitor increases or decreases, and outputs the first voltage from the output terminal.
US09666374B2	Capacitor component A capacitor component includes an element assembly, a first external electrode, and a second external electrode. The element assembly includes first and second internal electrode layers, a first connecting conductive layer extending along a fifth outer surface of the element assembly and connected to each of the first internal electrode layers, a first covering insulating layer covering the first connecting conductive layer, a second connecting conductive layer extending along a sixth outer surface of the element assembly and connected to each of the second internal electrode layers, and a second covering insulating layer covering the second connecting conductive layer. Only a portion of the first internal electrode layers are extended to the third outer surface and connected to the first external electrode, and only a portion of the internal electrode layers are extended to the fourth outer surface and connected to the second external electrode.
US09666371B2	Multilayer ceramic capacitor A multilayer ceramic capacitor has a laminate comprising dielectric layers stacked alternately with internal electrode layers of different polarities, wherein: the dielectric layers contain ceramic grains whose primary component is BaTiO3; the ceramic grains contain at least one type of donor element (D) selected from the group that includes Nb, Mo, Ta, and W, and at least one type of acceptor element (A) selected from the group that includes Mg and Mn; and the ratio of the concentration of the donor element (D) and that of the acceptor element (A) (D/A) is greater than 1 at the center parts of the ceramic grains, while the D/A ratio is less than 1 at the outer edge parts of the ceramic grains (if A=0, then D/A=∞ and D=A=0 never occurs).
US09666370B2	Multilayer ceramic capacitor and method for producing the same A dielectric ceramic that forms dielectric ceramic layers of a multilayer ceramic capacitor contains a Ba and Ti containing perovskite compound, Ca, R (R denotes a rare earth element, such as La), M (M denotes Mn or the like), and Si. The Ca content ranges from 0.5 to 2.5 molar parts, the R content ranges from 0.5 to 4 molar parts, the M content ranges from 0.5 to 2 molar parts, and the Si content ranges from 1 to 4 molar parts, based on 100 molar parts of Ti. In perovskite crystal grains, the Ca diffusion depth is 10% or less of the average grain size of the crystal grains, and the Ca concentration in a Ca diffusion region is 0.2 to 5 molar parts higher than the Ca concentration near the center of each of the crystal grains.
US09666369B2	Dielectric ceramic composition and multilayer ceramic capacitor containing the same There are provided a dielectric ceramic composition and a multilayer ceramic capacitor containing the same. The dielectric ceramic composition according to the present disclosure may contain a main base material ingredient and a first accessory ingredient, wherein the first accessory ingredient contains samarium (Sm) and other rare earth (RE) elements, and a ratio (a/b) of a content (a) of samarium (Sm) to a content (b) of other rare earth elements in the first accessory ingredient satisfies 0.1≦a/b≦2.0.
US09666368B2	Film capacitor A film capacitor having: a stack of at least one dielectric resin film formed of polypropylene and a plurality of vapor-deposited metal films which are superposed on each other such that the at least one dielectric film and the plurality of vapor-deposited metal films are alternately arranged; and two external electrodes formed on a pair of side surfaces of the stack; wherein cover films are formed of a polyolefin-based hot-melt resin on a pair of side surfaces of the stack other than the side surfaces on which the two external electrodes are formed, such that the cover films cover entireties of those side surfaces and are fusion-bonded to end faces of the at least one dielectric film exposed at those side surfaces.
US09666363B2	Surface-mount inductor and method for manufacturing the same A surface-mount inductor having a coil formed by winding a wire and a molded body for accommodating the coil, wherein the coil includes: a pair of first rolls of wire of a rectangular section which are wound in a two-roll arrangement, both ends of the wire being positioned at their outermost turns; and a pair of second rolls wound in positions adjacent to and each on opposite sides of the first rolls to partially overlap the first rolls, whereby the ends of the wire are brought out from the outermost turns of the second rolls as lead ends, with winding axis of the coil being parallel with the molded body and the lead ends extending over the surface of the mounting face.
US09666361B2	Rare-earth bond magnet manufacturing method A method for producing a bonded rare-earth magnet according to an embodiment of the present invention includes the steps of: providing a rapidly solidified rare-earth magnet alloy powder; providing a solution in which a resin that is in solid phase at an ordinary temperature is dissolved in an organic solvent; mulling the rapidly solidified rare-earth magnet alloy powder and the solution together and vaporizing the organic solvent, thereby making a bonded rare-earth magnet compound in which magnet powder particles that form the rapidly solidified rare-earth magnet alloy powder are coated with the resin; making a compressed compact by compressing the bonded rare-earth magnet compound under a pressure of 1000 MPa to 2500 MPa; and thermally treating the compressed compact. If the rapidly solidified rare-earth magnet alloy powder to be mulled is 100 mass %, the solution includes 0.4 mass % to 1.0 mass % of the resin and 1.2 mass % to 20 mass % of the organic solvent.
US09666354B2	Transformer A transformer includes a primary winding unit, a secondary winding unit and a magnetic core. The primary winding unit includes a first input primary winding part and a first shielding winding part. The first input primary winding part is electrically connected to at least one switch component, and the first input primary winding part is electrically connected to the first shielding winding part. The secondary winding unit is inductively coupled to the primary winding unit, and the first shielding part is disposed between the first input primary winding part and the secondary winding part. Then, the primary winding unit and the secondary winding unit are assembled to the magnetic core.
US09666351B2	Device comprising a high voltage apparatus including a fluid and equipment for detecting one or more physical properties of the fluid A device including a high voltage apparatus enclosing a fluid for providing cooling and/or electrical insulation of the apparatus, and a detector for one or more physical properties of the fluid positioned spaced apart from the housing. The device includes a pipe assembly for housing a fluid, whereby the pipe assembly is arranged between the detector equipment and the housing such that the fluid is extended without interruption in the pipe assembly. The fluid in the pipe assembly is in communication with the fluid in the housing, and the detector equipment is in direct communication with the fluid in the pipe assembly. The detector equipment is positioned below a top level of the housing and at a safe distance from the housing of the apparatus, which makes it possible to carry out inspection, testing, maintenance, and calibration of the detector equipment without taking the high voltage apparatus out of operation.
US09666349B2	Magnetically actuated shut-off valve A magnetic actuator assembly is disclosed, and includes a core, wiring, and a gate assembly. The core is constructed of a magnetic material, and includes a first end and a second end. The wiring is wound around a portion of the core. A predetermined amount of electric current is applied to the wiring to induce a magnetic field within the core. The gate assembly is positioned between the first end and a second end of the core. The gate assembly comprises a first gate member traveling between the first end and a second end of the core based on a threshold force being applied to the gate assembly. The threshold force is created by the magnetic field.
US09666348B2	Vibration actuator A vibration actuator includes: a movable element having a magnet that is supported to be rotatable around a shaft, a weight supported to be rotatable together with the magnet, and an elastic supporting member wherein a rotation of the magnet and the weight is supported elastically; a coil that is supplied with an AC current at a frequency that is equal to a resonant frequency of the movable element; and a magnetic pole member that causes the movable element to undergo reciprocating a rotational vibration around the shaft through applying rotational torques in different directions alternatingly to the magnet by changing magnetic poles through the AC current that is applied to the coil.
US09666344B2	Superconducting magnet system for head imaging A superconducting magnet system for head imaging is disclosed which includes a cryocooler, a high-pressure helium container, a self-excitation heat pipe and a superconducting magnet. A second stage coldhead of the cryocooler is connected to the high-pressure helium container for converting the helium gas in the high-pressure helium container into liquid helium. The self-excitation heat pipe forms a closed cooling loop, and liquid helium in the high-pressure helium container flows circularly in the self-excitation heat pipe. The self-excitation heat pipe cools the superconducting magnet, wherein part of the liquid helium in the self-excitation heat pipe is converted into the helium gas due to the heat disturbance generated by the superconducting magnet, and the helium gas interacts with the liquid helium to generate liquid helium vibration.
US09666342B2	Magneto-dielectric polymer nanocomposites In accordance with the present invention, novel superparamagnetic magneto-dielectric polymer nanocomposites are synthesized using a novel process. The tunability of the dielectric/magnetic properties demonstrated by this novel highly-viscous solvent-free polymer nanocomposite that is amenable to building 3D electromagnetic structures/devices by using processes such as 3D printing, compression molding or injection molding, when an external DC magnetic field is applied, exceeds what has been previously reported for magneto-dielectric polymer nanocomposite materials.
US09666341B2	Production method for anisotropic bonded magnet and production apparatus for same A method for production of an anisotropic bonded magnet includes: aligning magnetic pole bodies which include an even number of permanent magnets arranged uniformly around an outer periphery of an annular cavity filled with magnetic raw material, aligning magnetic fields to cause rare-earth anisotropic magnet powder to be semi-radially aligned; compressively molding the semi-radially aligned magnet raw material to obtain an annular compact; discharging the compact from the annular cavity; demagnetizing causing the aligning magnetic pole bodies to relatively move only in circumferential direction with respect to the compact after the molding step thereby to apply demagnetization magnetic fields to the compact; The demagnetization magnetic fields are applied from the aligning magnetic pole bodies with opposite poles to those during the alignment step, and the demagnetization magnetic fields are in directions for cancelling the magnetization of the compact caused by the aligning magnetic fields.
US09666338B2	Method for producing a cable harness and cable harness A cable harness is surrounded in certain regions by a sheath made of a casting compound. In order to ensure a defined delimitation of the casting compound, even if there is an insert part protruding from the sheath, the method for sealing a tool opening provides that a pressure element is pressed in the radial direction against the insert part. The insert part is clamped between the pressure element and a support element, and the support element remains in the cable harness as a consumable element. The insert part is particularly designed as a heat protection element. The cable harness is used particularly in a thermally stressed environment for a motor vehicle.
US09666336B2	Termination unit A termination unit for a superconductor network. Including a primary system that includes a first superconductor cable. Also a first superconducting coil and a first auxiliary magnetizing coil, each coil wound around the first superconductor cable. Also a terminal including a first leg, the first leg including an aperture configured to receive the first superconductor cable. The first leg defining a clearance about the first superconductor cable at ambient temperature and arranged to firmly clamp onto the first superconductor cable at a cryogenic temperature. The termination unit including a cooling system arranged to enclose and cool the primary system to cryogenic temperatures.
US09666318B2	Storage, transportation and disposal system for used nuclear fuel assemblies An integrated storage, transportation and disposal system for used fuel assemblies is provided. The system includes a plurality of sealed canisters and a cask sized to receive the sealed canisters in side by side relationship. The plurality of sealed canisters include an internal basket structure to receive a plurality of used fuel assemblies. The internal basket structure includes a plurality of radiation-absorbing panels and a plurality of hemispherical ribs generally perpendicular to the canister sidewall. The sealed canisters are received within the cask for storage and transportation and are removed from the cask for disposal at a designated repository. The system of the present invention allows the handling of sealed canisters separately or collectively, while allowing storage and transportation of high burnup fuel and damaged fuel to the designated repository.
US09666314B2	Device and method for repairing a damaged area in an underwater wall region of a container or tank A device of repairing a damaged area in an underwater wall region of a container or tank, in particular in the wall region of a tank of a nuclear reactor installation. The device has a guide system that can be mounted along a side wall, at a distance therefrom, and can be secured thereto. At least one first carriage is fitted onto the track of the guide system and movable in a longitudinal direction of the guide system. On the carriage there is displaceably mounted a receptacle for a repair overlay, which can be applied with an adhesive surface to the wall region containing the damaged area. At least one suction mount that is connected to a suction line is disposed on the first carriage and can be suctioned to the side wall.
US09666310B1	Accident-tolerant oxide fuel and cladding Systems and methods for accident tolerant oxide fuel. One or more disks can be placed between fuel pellets comprising UO2, wherein such disks possess a higher thermal conductivity material than that of the UO2 to provide enhanced heat rejection thereof. Additionally, a cladding coating comprising zircaloy coated with a material that provides stability and high melting capability can be provided. The pellets can be configured as annular pellets having an annulus filled with the higher thermal conductivity material. The material coating the zircaloy can be, for example, Zr5Si4 or another silicide such as, for example, a Zr-Silicide that limits corrosion. The aforementioned higher thermal conductivity material can be, for example, Si, ZrxSiy, Zr, or Al2O3.
US09666309B2	Method and device for repairing memory Provided are a method and device for repairing memory. The method includes: determining spare lines with priority to be used for repair, and searching for a repair solution by using the spare line with priority and failure counters for lines without priority.
US09666307B1	Apparatuses and methods for flexible fuse transmission Apparatuses and methods for transmitting fuse data from fuse arrays to latches are described. An example apparatus includes: a plurality of fuse arrays, each fuse array of the plurality of fuse arrays being configured to store input data; a fuse circuit that receives the input data and provides the input data on a bus; and a plurality of redundancy latch circuits coupled to the bus, including a plurality of pointers and a plurality of latches associated with the plurality of corresponding pointers that load data on the bus. The fuse circuit may control loading of the input data by controlling a location of a pointer among the plurality of corresponding pointers responsive to the input data.
US09666303B2	Leveraging chip variability Embodiments are described that leverage variability of a chip. Different areas of a chip vary in terms of reliability under a same operating condition. The variability may be captured by measuring errors over different areas of the chip. A physical factor that affects or controls the likelihood of an error on the chip can be varied. For example, the voltage supplied to a chip may be provided at different levels. At each level of the physical factor, the chip is tested for errors within the regions. Some indication of the error statistics for the regions is stored and then used to adjust power used by the chip, to adjust reliability behavior of the chip, to allow applications to control how the chip is used, to compute a signature uniquely identifying the chip, etc.
US09666301B2	Scannable memories with robust clocking methodology to prevent inadvertent reads or writes An example scannable register file includes a plurality of memory cells and, a shift phase of a scan test shifts data bits from a scan input through the plurality of memory cells to a scan output. The shifting can be performed by, on each clock cycle, reading one of the plurality of memory cells to supply the scan out and writing one of the plurality of memory cells with the data bit on a scan input. To perform sequential reads and writes on each clock cycle, the scannable register can generate a write clock that, during the shift phase, is inverted from the clock used for functional operation. The write clock is generated without glitches so that unintended writes do not occur. Scannable register files can be integrated with scan-based testing (e.g., using automatic test pattern generation) of other modules in an integrated circuit.
US09666297B1	Memory device, memory system including the same and operation method of the memory system A memory system includes: a first memory device including a first internal voltage generation circuit; and a second memory device including a second internal voltage generation circuit, wherein the first memory device and the second memory device receive an identical chip enable signal, and when the chip enable signal is disabled, the first internal voltage generation circuit and the second internal voltage generation circuit are controlled in a standby mode, and when the chip enable signal is enabled, the first internal voltage generation circuit and the second internal voltage generation circuit are independently controlled to have one mode between a weak active mode and a strong active mode.
US09666296B1	Semiconductor memory device A semiconductor memory device includes a memory cell array having memory strings that include memory cells and first and second selection transistors. During a read operation, a controller applies a first voltage higher than ground to a source line, and a second voltage to a first and second selection gate lines that are connected to a selected memory string. The second voltage is also applied to the first selection gate lines connected to non-selected memory strings during a first period of the read operation. A third voltage higher than ground and lower than the second voltage is applied to the first selection gate lines connected to non-selected memory strings during a second period of the read operation subsequent to the first period.
US09666294B2	Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.
US09666292B2	Method of determining default read voltage of non-volatile memory device and method of reading data of non-volatile memory device A method of determining a default read voltage of a non-volatile memory device which includes a plurality of first memory cells, each of which stores a plurality of data bits as one of a plurality of threshold voltages corresponding to a plurality of logic states, includes programming a first data to the first memory cells so that the logic states of the first memory cells are balanced or equally used. The method includes applying a first default read voltage included in default read voltages to word lines coupled to the first memory cells, and measuring a first ratio of first on-cells, each of which has a threshold voltage smaller than or equal to the first default read voltage, among the first memory cells, and modifying the first default read voltage based on the first ratio and a first reference value corresponding to the first default read voltage.
US09666286B2	Self-timed SLC NAND pipeline and concurrent program without verification A hierarchical-GBL/LBL NAND array with a plurality of LG and MG groups in either orthogonal BL/CSL scheme or parallel BL/SL scheme including a plurality of block-decoders with a shared self-timed delay control circuit and a plurality of fully-shielding dynamic CACHE registers made of 2 local broken metal lines within the array and DRAM-like SA is provided. Each DCR capacitor is flexibly expandable by connecting multiple CLGs made by the local broken metal lines of the LGs to form a CMG of a larger MG. Based on the NAND array, multiple randomly selected WLs in multiple random blocks within multiple random LGs within one MG can be selected on basis of one WL per block per LG for performing an ABL pipeline and concurrent SLC program without verification, and on basis of one WL per block per MG for performing an ABL-like or HBL pipeline and concurrent SLC read.
US09666285B2	Method and system for asynchronous die operations in a non-volatile memory A mass storage memory system and method of operation are disclosed. The memory system includes an interface adapted to receive data from a host system, a plurality of memory die and a controller, where the controller is configured to read or write data synchronously across a plurality of die connected to different channels based on a first command, and to read or write data asynchronously and independently in different die in the same channel based on a second command. The controller may program data in a maximum unit of programming for a single memory die. The controller may be a plurality of controllers each configured to select which die of an exclusive subset of die to write data based on characteristics of the die in the subset. The plurality of die may be multi-layer, and multi-partition per layer, flash memory die.
US09666283B2	Nonvolatile memory devices and driving methods thereof Nonvolatile memory devices including memory cell arrays with a plurality of cell strings connected between a substrate and a plurality of bit lines and selected by selection lines, and a gating circuit configured to drive the selection lines in at least two directions.
US09666279B2	Non-volatile memory for high rewrite cycles application A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device. The read device, the program device, and the erase device are formed on separate wells so as to separate the cycling counts of a read operation, a program operation and an erase operation of the non-volatile memory cell.
US09666271B2	Semiconductor device including a transistor with an oxide semiconductor film channel coupled to a capacitor To provide a semiconductor device which can write and read a desired potential. The semiconductor device includes a first transistor (Tr), a second Tr, and a capacitor. In the semiconductor device, operation of writing data is performed by a first step and a second step. In the first step, a low voltage is applied to a bit line and a first wiring to turn on the first Tr and the second Tr. In the second step, a first voltage is applied to the first wiring, and application of the low voltage to the bit line is stopped. Operation of reading the data is performed by a third step and a fourth step. In the third step, a high voltage is applied to the first wiring. In the fourth step, application of the high voltage to the first wiring is stopped, and a low voltage is applied to a capacitor line.
US09666266B1	Power control over memory cell arrays In disclosed circuit arrangements, memory cell arrays are addressed by a first portion of an input address, and memory cells within each memory cell array are addressed by a second portion of the input address. A first first-in-first-out (FIFO) buffer is coupled to the memory cell arrays and delays the second portion of each input address to the memory cell arrays for a sleep period. Control circuits respectively coupled to the memory cell arrays include second FIFO buffers and decode the first portion of each input address and generate corresponding states of enable signals. The control circuits store the corresponding states of the enable signals in the second FIFO buffers concurrently with input of the second portion of each input address to the first FIFO buffer. The second FIFO buffers delay output of the corresponding states of the enable signals to the memory cell arrays for the sleep period. Each control circuit further switches a corresponding memory cell array into a sleep mode in response to all states of the enable signal in the corresponding second FIFO buffer being in a non-enabled state.
US09666264B1	Apparatus and method for memory calibration averaging A method and apparatus for memory calibration averaging is disclosed. In one embodiment, a memory subsystem includes a memory and a memory controller. The memory controller includes a calibration control circuit that periodically performs calibrations of the memory subsystem. Calibration may be performed for a delay applied to a data strobe used to synchronized transfers of data between the memory controller and the memory, and a reference voltage used to distinguish between a logic 0 and a logic 1 during memory reads. Following the performance of a calibration, the values of the delay and the reference voltage may be set based on an average of a most recent number of calibrations.
US09666260B2	Refresh verification circuit, semiconductor apparatus and semiconductor system A refresh verification circuit may include a filtering circuit configured to receive a refresh pulse and to generate a filtering pulse in response to a duration of the enable period of the refresh pulse.
US09666259B1	Dual mode sensing scheme A method of sensing a data value stored at a memory cell according to a dual mode sensing scheme includes determining, at a sensing circuit, whether a resistance of a magnetic tunnel junction (MTJ) element is within a first range of resistance values, within a second range of resistance values, or within a third range of resistance values. The MTJ element is included in the memory cell. The method also includes determining the data value stored at the memory cell according to a first mode of operation if the resistance of the MTJ element is within the first range of resistance values or within the third range of resistance values. The method further includes determining the data value stored at the memory cell according to a second mode of operation if the resistance of the MTJ element is within the second range of resistance values.
US09666244B2	Dividing a storage procedure Apparatuses, systems, methods, and computer program products are disclosed for storage operations for a non-volatile medium. A control module may be configured to divide a storage procedure into multiple portions. An execution module may be configured to execute multiple portions of a storage procedure independently. A storage request module may be configured to satisfy a storage request for one or more storage elements of a storage procedure between at least a pair of portions of a storage procedure.
US09666243B2	Method and circuit for controlling programming current in a non-volatile memory array A memory device having: a cross-point memory array; a current supply circuit adapted to supply a programming current to a selected row line of the array during a programming operation to change the resistive state of a selected memory cell coupled between the selected row line and a selected column line of the array; a leakage current detection circuit coupled to the column lines except the selected column line and adapted to detect leakage currents during the programming operation; and a current limit generation circuit adapted to generate a current limit based on the sum of the leakage currents and on a reference current, and to supply the current limit to the current supply circuit to limit the programming current.
US09666240B2	Semiconductor device with decreased overlapping area between redistribution lines and signal lines A semiconductor device includes, a semiconductor chip having a first surface over which bonding pads are positioned, a second surface which faces away from the first surface, and a plurality of signal lines formed over the first surface, extending in a first direction; a plurality of redistribution lines formed over the first surface, having one set of ends electrically coupled to the bonding pads of the semiconductor chip, and extending in a direction oblique to the first direction; and a plurality of redistribution pads disposed over the first surface, and electrically coupled with an other set of ends of the redistribution lines which face away from the one set of ends.
US09666235B2	Particulate filter Certain exemplary aspects of the present disclosure are directed towards an apparatus including a base deck forming a sealed cavity. A filter coupled to a surface of the base deck within the cavity filters particulate from a flow of gas in the cavity. The recirculation filter including a protrusion extending over a surface of a storage medium within the cavity that diverts gas from a surface of the storage medium toward the filter. A bypass channel, defined by a portion of the cavity and a portion of the filter, in conjunction with the protrusion forms a pressure differential that draws a first portion of the diverted gas through the filter by bypassing the filter with a second portion of the diverted gas.
US09666230B2	Package and container assembly and method of manufacturing same A package assembly including a first layer having a bottom surface and a top surface, and at least two panels coupled to the top surface of the first layer such that a first panel is disposed along a right edge of the first layer and the second panel is disposed along a left edge of the first layer, the first panel being pivotally engaged to the second panel along an axis, the at least two panels having formed therein a recess.
US09666228B2	Shingled magnetic recording data store Implementations disclosed herein provide a method comprising storing data in a two level key-value data store in an SMR storage device, wherein a first level of the data store comprises a journal of incoming host operations and a second level of the data store comprises a plurality of ordered data stores, ordered based on a predetermined ordering criterion.
US09666225B2	Efficient recovery of the codeword interleave address In one embodiment, a system includes a data processing unit configured to read encoded data from a magnetic tape medium. The data processing unit is also configured to decode a plurality of codeword interleaves (CWIs) from the encoded data, each CWI being a row in a sub data set logically organized into a two-dimensional array. The array includes a predetermined number of rows and columns of predetermined lengths. The data processing unit is also configured to determine an address for a first-written CWI without successfully decoding a corresponding codeword interleave designation (CWID) from the encoded data, each CWID specifying an address for a corresponding CWI. Also, each CWID is calculated as a function of a logical track number and a CWI set number.
US09666223B2	Enhanced tape library cataloging A tape-based data storage system, according to one embodiment, includes: a tape library having: a plurality cells, each of the cells being configured to store one or more tape cartridges therein, and at least an antenna of a near field communication reader positioned at each of the cells. Moreover, each of the antennas are positioned relative the associated cell to be in direct communication with a near field communication tag coupled to a tape cartridge stored in the associated cell. Other systems, methods, and computer program products are described in additional embodiments.
US09666221B2	Apparatus including a perpendicular magnetic recording layer having a convex magnetic anisotropy profile An apparatus may include a first magnetic layer, a first exchange break layer formed on the first magnetic layer, a second magnetic layer formed on the first exchange break layer, a second exchange break layer formed on the second magnetic layer, and a third magnetic layer formed on the second exchange break layer. The first magnetic layer has a first magnetic anisotropy energy, Hk1, the second magnetic layer has a second magnetic anisotropy energy, Hk2, and the third magnetic layer has a third magnetic anisotropy energy, Hk3. In some embodiments, Hk1−Hk2 is less than Hk2−Hk3. In some embodiments, the apparatus may be a perpendicular magnetic recording medium.
US09666220B2	Devices including a near field transducer and at least one associated adhesion layer Devices that include a near field transducer (NFT), the NFT having a disc and a peg, and the peg having five surfaces thereof; and at least one adhesion layer positioned on at least one of the five surfaces of the peg, the adhesion layer including one or more of the following: yttrium (Y), tin (Sn), iron (Fe), copper (Cu), carbon (C), holmium (Ho), gallium (Ga), silver (Ag), ytterbium (Yb), chromium (Cr), tantalum (Ta), iridium (Ir), zirconium (Zr), yttrium (Y), scandium (Sc), cobalt (Co), silicon (Si), nickel (Ni), molybdenum (Mo), niobium (Nb), palladium (Pd), titanium (Ti), rhenium (Re), osmium (Os), platinum (Pt), aluminum (Al), ruthenium (Ru), rhodium (Rh), vanadium (V), germanium (Ge), tin (Sn), magnesium (Mg), iron (Fe), copper (Cu), tungsten (W), hafnium (Hf), carbon (C), boron (B), holmium (Ho), antimony (Sb), gallium (Ga), manganese (Mn), silver (Ag), indium (In), bismuth (Bi), zinc (Zn), ytterbium (Yb), and combinations thereof.
US09666218B1	Thermal assisted magnetic head provided with light detector that detects reflected light A thermal assisted magnetic recording head has a magnetic head slider and a light source unit that is fixed to the magnetic head slider. A first surface of the light source unit and a second surface of the magnetic head slider face each other via a gap. The light source unit includes a light source that emits laser light from an emission part that is positioned on the first surface and a photodetector that detects the laser light. The magnetic head slider includes a waveguide through which the laser light that is incident on an incident part positioned on the second surface propagates, near-field light generation means for generating near-field light on an air bearing surface, the near-field light being generated from the laser light that propagates through the waveguide, and a recording magnetic pole that is provided adjacent to the near-field light generation means and that has an end part positioned on the air bearing surface. A medium for propagating the laser light is continuously formed along a path that includes the gap and that extends from the emission part to a light receiving surface of the photodetector.
US09666214B1	Free layer magnetic reader that may have a reduced shield-to-shield spacing A magnetic read apparatus includes a read sensor, a shield structure and a side magnetic bias structure. The read sensor includes a free layer having a side and a nonmagnetic spacer layer. The shield structure includes a shield pinning structure and a shield reference structure. The nonmagnetic spacer layer is between the shield reference structure and the free layer. The shield reference structure is between the shield pinning structure and the nonmagnetic spacer layer. The shield pinning structure includes a pinned magnetic moment in a first direction. The shield reference structure includes a shield reference structure magnetic moment weakly coupled with the pinned magnetic moment. The side magnetic bias structure is adjacent to the side of the free layer.
US09666213B1	Updating a partially overlapped track via two or more readers In response to a command to update a target track, two tracks or more are concurrently read. The two tracks or more tracks include a top track that partially overlaps the target track. Data of the top track is stored in a memory, and the update data is written over at least part of the target track. The stored data is written on the recording medium over the top track or at a different location.
US09666211B2	Information processing apparatus, information processing method, display control apparatus, and display control method There is provided an information processing apparatus including an information acquiring unit that acquires information to identify an editing point of content including a voice, on the basis of language analysis of the content, and an information output unit that outputs the acquired information.
US09666208B1	Hybrid audio representations for editing audio content The present disclosure includes a hybrid waveform system that displays a hybrid waveform to a user. In general, the hybrid waveform system provides a hybrid waveform to a user that uses converted readable text and waveforms to represent an audio segment. By providing a user with a hybrid waveform, the hybrid waveform system offers users with a number of benefits, such as providing an audio display that enables a user to quickly ascertain context information and audio information typically missing from audio transcriptions.
US09666200B2	Methods and systems for efficient recovery of high frequency audio content The present document relates to the technical field of audio coding, decoding and processing. It specifically relates to methods of recovering high frequency content of an audio signal from low frequency content of the same audio signal in an efficient manner. A method for determining a first banded tonality value (311, 312) for a first frequency subband (205) of an audio signal is described. The first banded tonality value (311, 312) is used for approximating a high frequency component of the audio signal based on a low frequency component of the audio signal. The method comprises determining a set of transform coefficients in a corresponding set of frequency bins based on a block of samples of the audio signal; determining a set of bin tonality values (341) for the set of frequency bins using the set of transform coefficients, respectively; and combining a first subset of two or more of the set of bin tonality values (341) for two or more corresponding adjacent frequency bins of the set of frequency bins lying within the first frequency subband, thereby yielding the first banded tonality value (311, 312) for the first frequency subband.
US09666199B2	Automatic conversion of speech into song, rap, or other audible expression having target meter or rhythm Captured vocals may be automatically transformed using advanced digital signal processing techniques that provide captivating applications, and even purpose-built devices, in which mere novice user-musicians may generate, audibly render and share musical performances. In some cases, the automated transformations allow spoken vocals to be segmented, arranged, temporally aligned with a target rhythm, meter or accompanying backing tracks and pitch corrected in accord with a score or note sequence. Speech-to-song music applications are one such example. In some cases, spoken vocals may be transformed in accord with musical genres such as rap using automated segmentation and temporal alignment techniques, often without pitch correction. Such applications, which may employ different signal processing and different automated transformations, may nonetheless be understood as speech-to-rap variations on the theme.
US09666198B2	Reconstruction of audio scenes from a downmix Audio objects are associated with positional metadata. A received downmix signal comprises downmix channels that are linear combinations of one or more audio objects and are associated with respective positional locators. In a first aspect, the downmix signal, the positional metadata and frequency-dependent object gains are received. An audio object is reconstructed by applying the object gain to an upmix of the downmix signal in accordance with coefficients based on the positional metadata and the positional locators. In a second aspect, audio objects have been encoded together with at least one bed channel positioned at a positional locator of a corresponding downmix channel. The decoding system receives the downmix signal and the positional metadata of the audio objects. A bed channel is reconstructed by suppressing the content representing audio objects from the corresponding downmix channel on the basis of the positional locator of the corresponding downmix channel.
US09666195B2	Method and apparatus for decoding stereo loudspeaker signals from a higher-order ambisonics audio signal Decoding of Ambisonics representations for a stereo loudspeaker setup is known for first-order Ambisonics audio signals. But such first-order Ambisonics approaches have either high negative side lobes or poor localization in the frontal region. The invention deals with the processing for stereo decoders for higher-order Ambisonics HOA. The desired panning functions can be derived from a panning law for placement of virtual sources between the loudspeakers. For each loudspeaker a desired panning function for all possible input directions at sampling points is defined. The panning functions are approximated by circular harmonic functions, and with increasing Ambisonics order the desired panning functions are matched with decreasing error. For the frontal region between the loudspeakers, a panning law like the tangent law or vector base amplitude panning (VBAP) are used. For the rear directions panning functions with a slight attenuation of sounds from these directions are defined.
US09666194B2	Recording and entertainment system A recording and entertainment system is provided. A mobile kiosk is capable or being outfitted with one or more cameras for capturing visual content, an audio recording system, a display device, a computer to control recording, storing, processing, and playing the captured visual and audio content. The captured video and audio are then processed and edited to produce remembrance products in various forms, including videos. Karaoke function is provided by a means for recognizing songs being performed and displaying lyrics on the display. Camera tilt, noise suppression, noise cancelation, voice control of the computer, a battery pack to free kiosk for movement, means for internet communication of the visual and audio content, means for confirming that objects of the visual content capture are within the field of view, robotic control of the kiosk, and interactive gaming means are additional features that can be utilized with the system.
US09666191B1	Laser-based system and optical microphone having increased bandwidth Laser-based system and optical microphone having increased bandwidth. The system includes a laser microphone to transmit a laser beam towards a human speaker; to receive an optical feedback signal reflected back from the human speaker; and to perform self-mixing interferometry. An optical feedback signal bandwidth enhancer improves the bandwidth of the optical feedback signal, to improve the quality of remote speech detection that is based on the optical feedback signal. The bandwidth enhancement utilizes takes into account one or more of: the identity of the face-region hit by the laser beam; the skin color or shade; obstruction of the skin by hair or by accessories; ability to allocate increased processing resources for processing of the optical feedback signal; ability to modify modulation frequency of the optical feedback signal; Signal to Noise Ratio (SNR) estimation; bandwidth estimation; acoustic-optical transmission channel estimation; or other suitable parameters.
US09666190B2	Speech recognition using loosely coupled components An automatic speech recognition system includes an audio capture component, a speech recognition processing component, and a result processing component which are distributed among two or more logical devices and/or two or more physical devices. In particular, the audio capture component may be located on a different logical device and/or physical device from the result processing component. For example, the audio capture component may be on a computer connected to a microphone into which a user speaks, while the result processing component may be on a terminal server which receives speech recognition results from a speech recognition processing server.
US09666187B1	Model for enabling service providers to address voice-activated commands Methods and systems are described herein related to enabling service providers to address voice-activated commands. An example method may involve: receiving a first utterance on a computing device, where the first utterance includes a first command; selecting a service action corresponding to the first command; determining a selected service provider for the selected service action, where the selected service provider is selected from a plurality of service providers; and sending a service fulfillment request to the selected service provider to execute the selected service action.
US09666186B2	Voice identification method and apparatus Embodiments of the present invention provide a voice identification method, which includes: obtaining voice data; obtaining a confidence value according to the voice data; obtaining a noise scenario according to the voice data; obtaining a confidence threshold corresponding to the noise scenario; and if the confidence value is greater than or equal to the confidence threshold, processing the voice data. An apparatus is also provided. The method and apparatus that flexibly adjust the confidence threshold according to the noise scenario greatly improve a voice identification rate under a noise environment.
US09666185B2	Automatic data-driven dialog discovery system Methods and systems for providing help prompts to a user of an automated dialog system are presented. In some embodiments, a computing device may receive a help request from the user of an automated dialog system. The help request may comprise a user request for information about one or more capabilities of the automated dialog system. The computing device may identify information expected to be input by the user to request that the automated dialog system perform its one or more capabilities. A natural language help prompt may be generated to provide guidance to the user to provide the identified information expected to be input.
US09666184B2	Method and apparatus for training language model and recognizing speech A method and apparatus for training a neural network language model, and a method and apparatus for recognizing speech data based on a trained language model are provided. The method of training a language model involves converting, using a processor, training data into error-containing training data, and training a neural network language model using the error-containing training data.
US09666183B2	Deep neural net based filter prediction for audio event classification and extraction Disclosed is a feature extraction and classification methodology wherein audio data is gathered in a target environment under varying conditions. From this collected data, corresponding features are extracted, labeled with appropriate filters (e.g., audio event descriptions), and used for training deep neural networks (DNNs) to extract underlying target audio events from unlabeled training data. Once trained, these DNNs are used to predict underlying events in noisy audio to extract therefrom features that enable the separation of the underlying audio events from the noisy components thereof.
US09666181B2	Systems and methods for tuning automatic speech recognition systems A tuning system for tuning a speech recognition system includes a transmitter for sending a user response to a speech recognition system. The user response is based at least in part on a test stimulus that may be generated by the control system. A receiver receives a recognized response from the speech recognition system; this recognized response is based at least in part on the associated user response. An adjustment module adjusts at least one parameter of the speech recognition system based at least in part on at least one of the test stimulus, the associated user response, and the recognized response.
US09666180B2	Synthesized audio message over communication links A communication device establishes an audio connection with a far-end user via a communication network. The communication device receives text input from a near-end user, and converts the text input into speech signals. The speech signals are transmitted to the far-end user using the established audio connection while muting audio input to its microphone. Other embodiments are also described and claimed.
US09666179B2	Speech synthesis apparatus and method utilizing acquisition of at least two speech unit waveforms acquired from a continuous memory region by one access A waveform memory that stores a plurality of speech unit waveforms corresponding to respective speech units, wherein an address order of the speech unit waveforms is determined by a sort order of speech units included in a speech unit sequence corresponding to a phoneme sequence of training data, and the speech units included in the speech unit sequence are selected so as to synthesize a speech of the phone sequence.
US09666178B2	Device for aiding communication in the aeronautical domain A device for aiding communication in the aeronautical domain, wherein the device includes a transceiver and data processor assembly that records audio messages corresponding to all the incoming and outgoing audio communications, transcribes the messages, in real time, into textual messages, displays the textual messages, and enables an audio play back of the audio messages.
US09666177B2	Audio system, method for generating an audio signal, computer program and audio signal The invention relates to an audio system for generating an audio signal. More specifically the invention relates to an audio system, especially an audio alarm system, for generating an audio signal comprising means for generating a component of the audio signal at a base frequency and means for generating further components of the audio signal at other frequencies than the base frequency, whereby the base and the other frequencies are separated from each other by separating frequency bands in order to enhance the loudness of the audio signal. The invention furthermore relates to a method for generating an audio signal, a computer program and an audio signal.
US09666176B2	Systems and methods for adaptive noise cancellation by adaptively shaping internal white noise to train a secondary path A processing circuit may include: (i) an adaptive filter having a response that generates an anti-noise signal from a reference microphone signal, wherein the response is shaped in conformity with the reference microphone signal and a playback corrected error, and wherein the playback corrected error is based on a difference between an error microphone signal and a secondary path estimate; (ii) a secondary path estimate filter configured to model an electro-acoustic path of a source audio signal and having a response that generates a secondary path estimate from the source audio signal; (iii) a secondary coefficient control block that shapes the response of the secondary path estimate filter in conformity with the source audio signal and the playback corrected error by adapting the response of the secondary path estimate filter to minimize the playback corrected error; and (iv) a noise injection portion for injecting a noise signal into the source audio signal, wherein the noise signal is shaped based on the playback corrected error.
US09666172B1	Acoustic drum shell including inserts A metal shell and metal inserts of an acoustic drum. In some examples, an acoustic drum having a metal shell can include one or more metal inserts configured to control the tone of the drum. In some configurations, the one or more inserts can form a portion of a bearing edge at one or more openings of the shell. Moreover, in some examples the inserts can be fitted to be in contact with the shell. The shape and configuration of the metal inserts can therefore control and refine the tone of the drum, allowing, for example, a drum with a metal shell to have a tone resembling that of a wooden drum with the sensitivity and power of a metal drum.
US09666171B2	Drum mounting and tuning system providing unhindered and isolated resonance Some embodiments provide a drum structural framework comprising a top shell mount, bottom shell mount, rod holders, and tension rods. The top shell mount and bottom shell mount are mounted to either ending edge of a drum shell disposed between the two mounts. A first set of the rod holders are coupled to the top shell mount and an aligned second set of the rod holders are coupled to the bottom shell mount. The tension rods link the two sets of rod holders without hindering resonance of the drum shell. Tuning assemblies on the rod holders adjust the distance separating the top shell mount from the bottom shell mount, thereby controlling the force imposed on the drum shell. Each rod holder includes one or more dampeners that isolate energy passing from the drumhead to the shell from also reverberating throughout the structural framework of the tension rods and rod holders.
US09666170B2	Drum apparatus and method of use A drum apparatus comprising at least a front wall, a snare bar rotatably installed substantially parallel to and offset from the front wall inner surface and having at least one snare wire extending substantially vertically therefrom so as to be adjacent to and selectively in contact with the front wall inner surface, and a rocker assembly comprising a lever mechanically coupled to the snare bar at a first end of the lever and further comprising an actuator leg pivotally coupled to and extending downwardly from an opposite second end of the lever pivotally installed within the drum apparatus on a support post coupled to the lever intermediate the first and second ends thereof, whereby the drum apparatus is shifted between first and second operational modes by selectively positioning the drum apparatus either substantially flat or tipped back so as to raise or lower the actuator leg.
US09666169B2	Fingernail pick apparatus and method A fingernail pick having improved fingernail attachment systems and playing surfaces that are shaped for improved sound quality and ease of playing of stringed instruments.
US09666168B2	Board for stringed instrument, method of manufacturing board for stringed instrument, and stringed instrument A board for a stringed instrument which forms a front plate or a back plate of a stringed instrument, includes: a laminated plate that is obtained by laminating a plurality of veneers having a uniform thickness by an adhesive, at least one of the veneers having a different planar shape than the other veneers, in which the laminated plate is curved to be convex toward one surface side and has a thin portion and a thick portion.
US09666164B2	Image processing apparatus and image processing method An image processing apparatus includes: a pattern identification unit configured to perform pattern identification for first image data; a first data conversion unit configured to perform first data conversion for the first image data, after a pattern of the first image data is identified, to generate second image data; a second data conversion unit configured to perform second data conversion for the second image data to generate third image data; and a process selection unit configured to determine whether or not to perform at least one of the pattern identification, the first data conversion, or the second data conversion according to a measured value that is input from an outside or an on/off state of a call mode.
US09666161B2	Method and system for replacing theme of a mobile terminal on the basis of a user's clothes color A method and a system are provided for replacing the theme of a mobile terminal on the basis of a user's clothes color, including: setting an RGB value interval of clothes through analyzing the RGB values of all pixels of the clothes location in the obtained image and calculating the clothes RGB average, analyzing the RGB values of all pixels of every theme on a mobile terminal, calculating the theme RGB value average; when the theme RGB average is within the clothes RGB average interval, and replacing the theme of the mobile terminal by the theme corresponding to the theme RGB average. Thus, the mobile terminal becomes more interesting.
US09666158B2	Apparatus and method of controlling screens in a device An apparatus and a method of controlling screens in a device are provided. The apparatus includes a display configured to include a first screen and a second screen overlapped over the first screen, and a controller configured to control display of partial information of the first screen hidden by the second screen to be viewable by changing an attribute of the second screen, upon detecting a gesture on the second screen while information is being displayed separately on the first and second screens.
US09666157B2	Application to measure display size A method includes initializing a software program configured to determine a display height and a display width on a display, receiving input dimensions of a standard sized object into the software program, determining the display height and the display width based on the input dimensions of a standard sized object, and outputting the display height and the display width from the software program.
US09666156B2	Two-stage DAC architecture for LCD source driver utilizing one-bit serial charge redistribution DAC A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage. A voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.
US09666155B2	Data lines driver of display apparatus includng the same and method of driving display panel using the same A data lines driver includes a digital to analog converter configured to generate a normal data voltage based on a data signal, a buffer configured to buffer the normal data voltage and a power-on/reset part configured to generate an initial data voltage varying according to time and to selectively output either the initial data voltage or the normal data voltage.
US09666152B2	Shift register unit, gate driving circuit and display device Provided are a shift register unit, a gate driving circuit and a display device, wherein the shift register unit includes: a pull-up module connected to a clock signal line and a signal output terminal; at least two pull-down modules both connected to a low level signal line and the signal output terminal; a control module connected to the pull-up module and the pull-down modules, for controlling the pull-up module to be turned on, so that the pull-up module outputs a high level signal input from the clock signal line to the signal output terminal, and for controlling the at least two pull-down modules to be turned on alternatively, so that the at least two pull-down modules output a low level signal input from the low level signal line to the signal output terminal, and for controlling one of the at least two pull-down modules to be turned on while controlling the other pull-down modules of the at least two pull-down modules to be discharged. The shift register unit can reduce over-bias of a gate of a pull-down TFT effectively, thus improving stability of the shift register unit.
US09666145B2	Method and apparatus for controlling brightness compensation for pixel units of display device The present disclosure provides a method for controlling brightness compensation for pixel units of a display device, comprising: driving white subpixels in the pixel units to compensate the pixel units for the brightness according to predetermined pixel units whose brightness is to be compensated for in the display device and compensating grayscale voltages corresponding to the brightness of the pixel units to be compensated.
US09666142B2	Display capable of reducing passive matrix coupling effect A display has a panel, a plurality of first traces and a plurality of second traces. The panel has a first passive matrix and a first coupling capacitor group. The first passive matrix has a plurality of first pixels, and the first coupling capacitor group has a plurality of first coupling capacitors. Each of the first pixels is coupled to a first storage capacitor and corresponds to at least a specific first coupling capacitor of the plurality of first coupling capacitors. The first storage capacitor is coupled to a specific first trace of the plurality of first traces and a specific second trace of the plurality of second traces. The specific first coupling capacitor is coupled to another first trace and the specific second trace, and the specific first coupling capacitor is not directly connected to any of the first pixels.
US09666141B2	Display apparatus and method of driving the same A display apparatus includes a display panel including a first subpixel having a first primary color, a second subpixel having a second primary color; and a transparent subpixel; a panel driver which sets grayscale data of the first subpixel, the second subpixel and the transparent subpixel; a light source part which provides light to the display panel, where the light source comprises a first light source and a second light source having colors different from each other; and a light source driver which turns on the first light source during a first subframe, turns on the second light source during a second subframe, and turns on the first light source during a third subframe, and a first frame comprises the first subframe, the second subframe and the third subframe.
US09666139B2	Terminal apparatus and method of controlling the same A terminal apparatus includes a light modulation unit to perform an automatic light modulation of a touch panel, an illuminance sensor, a proximity sensor, an illuminance determination unit to determine whether or not an illuminance detected by the illuminance sensor varies, and an operation determination unit to determine whether or not an operation of the touch panel occurs near the illuminance sensor, wherein the light modulation unit suspends the automatic light modulation when the operation of the touch panel occurs before a first time elapses after the detected illuminance decreases, and the light modulation unit suspends the automatic light modulation when the operation determination unit determines that the operation of the touch panel does not occur before the first time elapses after that the detected illuminance decreases and then the proximity sensor detects an object before a second time elapses.
US09666132B2	Pixel circuit, method for driving the same and display apparatus The present disclosure discloses a pixel circuit, a method for driving the pixel circuit and a display apparatus. The pixel circuit comprises multiple rows of pixel units and a row sharing unit. Each row of pixel units includes a plurality of sub-pixel units, and each sub-pixel unit includes a light-emitting element. The row sharing unit includes a plurality of row-driving light-emitting control modules. The plurality of sub-pixel units comprised in each row of pixel units is connected to a corresponding signal line. Each row-driving light-emitting control modules is connected to a light-emitting control signal. Each row-driving light-emitting control module is connected to each sub-pixel unit comprised in a corresponding row of pixel units through the signal line, so as to drive the light-emitting element comprised in the sub-pixel unit to emit light under the control of the light-emitting control signal.
US09666130B2	Pixel circuit, display device, and method of driving pixel circuit A pixel circuit, display device, and method of driving a pixel circuit enabling source-follower output with no deterioration of luminance even with a change of the current-voltage characteristic of the light emitting element along with elapse, enabling a source-follower circuit of n-channel transistors, and able to use an n-channel transistor as an EL drive transistor while using current anode-cathode electrodes, wherein a source of a TFT 111 as a drive transistor is connected to an anode of a light emitting element 114, a drain is connected to a power source potential VCC, a capacitor C111 is connected between a gate and source of the TFT 111, and a source potential of the TFT 111 is connected to a fixed potential through a TFT 113 as a switching transistor.
US09666127B2	Scan driving apparatus and display apparatus including the same A display apparatus includes a display panel including a plurality of scan lines and a plurality of pixels connected to the plurality of scan lines, and a scan driving unit to supply a scan signal to each of the plurality of pixels via the plurality of scan lines, the scan driving unit including a scan signal generation unit to generate the scan signal supplied to each of the plurality of scan lines, and a plurality of buffers respectively corresponding to the plurality of scan lines, each one of the plurality of buffers outputting a scan signal to a corresponding one of the plurality of scan lines, wherein each of the plurality of buffers includes a transistor having a size corresponding to a load of a circuit connected to an output end of a corresponding buffer.
US09666125B2	Organic light-emitting diode circuit and driving method thereof An organic light-emitting diode circuit and a driving method thereof are disclosed herein. The organic light-emitting diode circuit includes a storage unit, a transistor, a coupling capacitor, a compensation unit, an input unit, a switch unit, and an organic light-emitting diode. The transistor is configured to be driven by a voltage stored in the storage unit so that a second end of the transistor generates a driving current. The coupling capacitor changes a voltage of the second end of the transistor. The compensation unit changes the voltage level at the second end of the transistor according to a first scan signal. The input unit transmits a data voltage to the storage unit according to a second scan signal. The switch unit is turned on according to a light-emitting signal so that the driving current is transmitted to the organic light-emitting diode through the switch unit.
US09666121B2	Display control apparatus and method Provided is a display control apparatus including: a display control unit configured to distribute brightness information to a plurality of display devices in accordance with external light amount information from a sensor; and a plurality of drive units configured to drive the plurality of display devices on a basis of the brightness information distributed by the display control unit.
US09666119B2	Systems and methods for controlling current in display devices The present disclosure relates generally systems and methods for controlling current provided to display devices. A method for controlling the current may include receiving drive current values associated with subpixels in a display and receiving information that corresponds to an application type being rendered on the display and/or an indication of image data being rendered on the display. The method may then include reducing at least some of the drive current values based at least in part on the application type. Alternatively, the method may include reducing the at least a portion of the image data corresponding to the at least some of the drive current values has substantially similar luminance and color values. The method may then include supplying the subpixels with drive currents that correspond to the drive current values.
US09666116B2	Image display device and driving method thereof An image display device includes a plurality of pixels, a pixel detection unit configured to detect first pixels having same R, G, and B gray scale values for a predetermined time among the plurality of pixels, a gray scale value calculation unit configured to calculate average gray scale values of the first pixels and average gray scale values of corresponding R, G and B of second pixels in a predetermined area around the first pixels, a data correction unit configured to correct the R, G and B gray scale values of the first pixels, using the calculated average gray scale values of the first and second pixels, and a data driver configured to correct the image data with the corrected R, G and B gray scale values of the first pixels, and to supply the corrected image data to each pixel of the plurality of pixels.
US09666113B2	Display, image processing unit, and display method for improving image quality A display includes: a gain calculation section obtaining, according to an area of a high luminance region in a frame image, a first gain for each pixel in the region; a determination section determining, based on first luminance information for each pixel in the high luminance region and the first gain, second luminance information for each pixel in the high luminance region; and a display section performing display based on the second luminance information.
US09666109B2	Projector A projector includes, a projecting unit that converts image data into light and projects the light at a predetermined angle of view, a projecting direction changing unit that changes the projecting direction of the projecting unit from a first projecting direction to a second projecting direction, a projection angle derivation unit that derives a projection angle between the first projecting direction and a projecting direction after changed, and an image cutting out unit that generates cut-out image data that a part of a region of an image of the inputted image data is cut out based on the angle of view and the projection angle as image data to be projected, when the projecting unit projects the image of the inputted image data stored on the storage unit across the first projecting direction and the second projecting direction.
US09666105B2	Sign construction with modular wire harness arrangements and methods of using same for backside to frontside power and data distribution schemes A large format billboard type electronic sign having an anchored mounting structure, comprises at least one structural frame configured to be mounted to from a front side surface of the anchored mounting structure, and the at least one structural frame defines a plurality of structural bay members configured in adjacent columns for receiving and removably supporting therein a corresponding plurality of weatherized display modules; and at least one preformed wiring harness for routing low voltage power within the plurality of structural bay members, wherein the at least one preformed wiring harness is provided with at least one power introduction node to facilitate providing separate power branches for distributing power between adjacent columns of the structural bay members and at least one structural bay locator node to facilitate providing a low voltage power branch to at least an individual one of said plurality of structural bay members.
US09666104B2	Display panel, display method and display device The present disclosure provides a display panel including a plurality of pixels, each of which includes at least one sub-pixel. Each sub-pixel includes a color reflection box and a control unit configured to control a color to be displayed by the color reflection box. The control unit is configured to, in the presence of ambient light, control a position of a light-entering surface of a shielding member in the corresponding color reflection box relative to a light-entering surface of a case in accordance with a display image at a corresponding position, so as to enable the color reflection box to display a color of the light-entering surface of the shielding member or a color of a colored material.
US09666103B2	Conduit identification system An identifier for a conduit includes a substrate having a pair of apertures. The substrate further contains a frangible portion encompassing one of the apertures and having a shape that corresponds to an opening left in the substrate after removal of the frangible portion. The identifier enables the shape of the frangible portion to be correlated with the shape of the opening left in the substrate after the frangible portion is separated from the substrate.
US09666101B2	Multi-user medical robotic system for collaboration or training in minimally invasive surgical procedures A multi-user medical robotic system for collaboration or training in minimally invasive surgical procedures includes first and second master input devices, a first slave robotic mechanism, and at least one processor configured to generate a first slave command for the first slave robotic mechanism by switchably using one or both of a first command indicative of manipulation of the first master input device by a first user and a second command indicative of manipulation of the second master input device by a second user. To facilitate the collaboration or training, both first and second users communicate with each other through an audio system and see the minimally invasive surgery site on first and second displays respectively viewable by the first and second users.
US09666099B2	Driver control assistance sensor and method An arrangement for training a vehicle driver or improving driving ability having a sensor located in a position beneath a motor vehicle brake pedal. A warning indicator is connected to the sensor to provide a signal when the sensor detects that a driver's heel is not in contact with a floor of the vehicle during braking.
US09666095B2	Depth-related help functions for a wheel loader training simulator Methods and systems for training an operator. One system includes a computing device including a processing unit and computer-readable medium. The computer-readable medium stores a training simulator application that is configured to receive an operating command from the operator, generate a simulated working environment and a simulated wheel loader having a simulated bucket, and generate an indicator providing depth-related information to an operator relating to a position of at least a portion of the simulated wheel loader with respect to a point-of-reference within the simulated working environment. The training simulator application is further configured to output the simulated working environment and the indicator for display to the operator, and automatically modify the indicator based on a position of the simulated wheel loader with respect to the point-of-reference.
US09666092B2	Vehicle comparison system A system for comparing energy usage of different vehicle platforms is provided. The system may include a processor to execute routines stored in a memory device. Further, in one embodiment the routines include routines configured to receive selection of a driving style by a user and to select a virtual test drive based on the received selection. Also, the routines may include routines configured to output the selected virtual test drive and to output a comparison of multiple vehicles having different characteristics based on the selected virtual test drive. Other systems, methods, and manufactures are also disclosed.
US09666089B2	Automated creation and maintenance of video-based documentation A computer system for creation and maintenance of video-based training documentation. Universal identifiers are created and associated with user interface elements for delimiting videos and audios. Test scripts are created based on matching the universal identifiers to task instructions. Videos are created based on test scripts where the universal identifiers are marked on the videos. Audios are created based on the universal identifiers and the task instructions, where the universal identifiers are marked on the audios. The audios and the videos are combined based on synchronizing the universal identifiers.
US09666088B2	Video-based teacher assistance A video-based teaching aid system and method. Video images are recorded of at least some of a plurality of people in a classroom setting by use of a video camera arrangement. Expressions of the people in the video images are identified by use of an expression recognition module configured to receive the video images from the video camera arrangement. The identified expressions of the people in the video images are correlated with at least one of an event or an outcome of an event occurring in a classroom setting by use of a correlation module. The results of the correlating are outputted by an output device.
US09666086B2	Method and apparatus for teaching power distribution A method and apparatus for teaching power distribution with an educational board game includes providing a game board that includes a power station location, power pole locations, and a target building location. A power pole indicator is placed at a power pole location and a power line indicator is connected from the power station location to the power pole indicator during the player's turn. Additional power pole indicators are positioned at additional power pole locations during the player's subsequent turns and the power line indicator is connected from the power station location to the target building location via the power pole indicator and the additional power pole indicators.
US09666083B2	Method for inserting a segment of flight plan in a flight plan The invention relates to a method for inserting a segment (Tins) of flight plan into an initial flight plan (Pini) of an aircraft, performed by a flight management system (FMS) of the said aircraft, the initial flight plan (Pini) comprising an ordered series of initial legs (Sini), the said fixed initial legs being indexed with an index i that varies from 1 to n, the method comprising the steps involving: identifying (110), using a first iterative calculation on the index i, in the segment to be inserted (Tins), the fixed legs to be inserted that have a position identical to the position of the leg of index i Sini(i)), the said legs thus determined being referred to as occurrences of the leg of index i, the said occurrences (O1, O2) being ordered by rank k varying from 1 to m, as a function of their position in the segment that is to be inserted (Tins), and searching, among the identified occurrences, for the occurrence of lowest index i and lowest rank k (Oi0(k0)) that has a type and attribute values identical to the segment of index i, referred to as equivalent point, when the said equivalent point exists, inserting the segment that is to be inserted (Tins) from the said equivalent point, otherwise, inserting the segment that is to be inserted (Tins) from the identified occurrence of lowest index i and lowest rank k (Oi1(k1)) referred to as a pseudo equivalent point, when the said pseudo equivalent point exists.
US09666082B2	Method and system for guidance of an aircraft A method of flight management and guidance of an aircraft executed by a flight management system FMS comprises the steps of: generating a reference trajectory, generating a short-term trajectory, periodically transmitting the short-term trajectory, generating a long-term trajectory, formatting the segments of the long-term trajectory, periodically transmitting the long-term trajectory, storing the long-term trajectory transmitted, testing the validity of the FMS sub-assembly, when the FMS sub-assembly is valid: identifying, by the autonomous guidance module, the active segment of the short-term trajectory, generating, by the autonomous guidance module, a first flight guidance order on the basis of the active segment of the short-term trajectory; when the FMS sub-assembly is not valid: identifying, by the autonomous guidance module, the active segment of the stored trajectory, generating, by the autonomous guidance module, a second flight guidance order on the basis of the active segment of the stored trajectory.
US09666074B2	Method and system for vehicle parking A request to identify a parking spot is received. A response to the request, including an identification of at least one available parking spot, is provided. A parking spot selected from the response is identified. Data relating to the selected spot are collected. A user profile based on the collected data is updated.
US09666073B1	Innovated smart parking assistance system and information system An innovated SMART Parking System, PRIN System and an Information System are provided. The PRIN System is able to manage multiple parking lots without range limitation, and deeply monitor the individual parking space status and also driveway status at each parking lot upon the control devices deployed. By the bi-directional communication, the control devices are able to be managed and changed the control methodology for dynamic parking service support. Besides, the Information System can provide the real-time parking service information for either remote or local access to assist the quick parking without spending too much driving and searching time for parking. Therefore, the PRIN System and Information System facilitates the problem solving of traffic jam and difficult parking within the city effectively, and significantly reduce the social cost, vehicle emission and carbon monoxide to improve the air we breathe and city environment we care.
US09666069B2	Autonomous vehicle handling and performance adjustment A vehicle includes an autonomous driving sensor configured to detect a road condition and output at least one road condition signal representing the road condition, an autonomous mode controller configured to control the vehicle according to the at least one road condition signal, and a communication module configured to broadcast the road condition signal.
US09666066B2	Unexpectedness prediction sensitivity determination apparatus An unexpectedness prediction sensitivity determining apparatus determines a standard driving operation level of a driver when turning to the right or left at an intersection for each intersection based on intersection travel information received from plural vehicles. Subsequently, the unexpectedness prediction sensitivity determining apparatus determines the unexpectedness prediction sensitivity of the driver when turning to the right or left at the intersection based on the intersection travel information associated with the intersections where determined standard driving operation levels of the drivers are identical to one another.
US09666061B2	System for monitoring caregivers and equipment A hospital monitoring system for monitoring hospital personnel, a plurality of patient locations for patients, and associated devices is configured to control the associated devices based on the presence of hospital personnel or alarms.
US09666060B2	Alternative billing modes for security and automation applications Techniques for facilitating one or more operating modes for monitoring of an intelligent home system are disclosed. The techniques facilitate detecting an adverse condition in a building, generating an alert based on the detection, sending a notification about the alert to a user (e.g., to a mobile device), awaiting a user response, and determining whether to send the alert to a central monitoring system to facilitate notification of an appropriate responder for the adverse condition. Determining whether to send the alert to the central monitoring system may be based on an affirmative command from the user or a failure to receive any command from the user. The user may be billed for the service of notifying an appropriate responder provided by central monitoring system regularly, intermittently when the user is away from the building, or on a per-alert basis.
US09666051B2	Method and a device for detecting icing at an air inlet of a turboshaft engine A method of detecting that an aircraft is flying in icing conditions. A processor unit determines a real power developed by the turboshaft engine and a theoretical power that the engine can develop in theory, the theoretical power being determined using a theoretical model supplying a power as a function at least of a speed of rotation of a gas generator of the engine. The processor unit determines a difference between the real power and the theoretical power. The processor unit generates a warning to indicate the presence of icing conditions when the power difference is greater than a predetermined power threshold for a length of time longer than a time threshold, and when a temperature outside the aircraft lies between a low temperature threshold and a high temperature threshold.
US09666050B2	Forest fire early-warning system and method based on infrared thermal imaging technology A forest fire early-warning system based on infrared thermal imaging technology includes an infrared camera erected in a forest to capture infrared thermal images of an area being monitored. The camera includes a frontal temperature detection and alarm module for calculating the alarm temperature value by using a temperature monitoring mathematical model, and for transmitting an excessive temperature alarm signal when there are abnormalities in said area. A video conversion device connected to the infrared camera converts an infrared thermal image analog signal outputted by the camera into an infrared digital signal, and receives from the camera said alarm signal and converts same into a digital signal. A monitoring computer generates and transmits an infrared camera control signal, and processes the infrared digital signal to ascertain the location in the monitoring area that triggered the infrared camera alarm.
US09666045B2	Safety control for product dispensers Techniques are described for processing sensor data associated with product dispensers at an establishment. The system is configured to monitor the location of product dispensers at an establishment and the system detects an alarm event related to the monitoring system based on the monitoring.
US09666035B2	Security apparatus for an automated teller machine A method and associated security apparatus for providing security to an automatic teller machine (ATM) having a cash capture device in a presenter area of the ATM. The cash capture device is detected by a proximity detector in the security apparatus in the ATM. A detecting signal is generated by the proximity detector in response to the cash capture device being detected. The detecting signal is received by control circuitry in the security apparatus and in response, the control circuitry causes a dispensing shutter of the ATM to remain in an open position. Each proximity detector is electrically connected to the control circuitry. The dispensing shutter in the open position is configured, in an absence of the cash capture device in the ATM, to dispense paper currency processed and stored in the presenter area of the ATM. security apparatus includes the proximity detector and the control circuitry.
US09666033B2	Electronic slot machine An electronic slot machine, having a display for displaying a plurality of symbols arrayed in at least three vertical columns of symbols, and at least three horizontal rows of symbols where game play is initiated by selecting a sequence for sequentially spinning selected columns and rows up to three total. The resulting display of symbols are analyzed to determine whether the array of symbols constitute a winning combination. Additional game playing occurs when the player selects a new sequence of rows and columns for spinning to achieve a new set of symbols for analysis to determine a winning combination.
US09666029B1	Ad serving offers and new game promotions outside the game module with business intelligence based on portfolio of games An online gaming system providing dynamic delivery of advertisements to users of an online game. The system may dynamically select advertisement for delivery based on one or more user parameters which characterize the user's activity with the online game. The system may comprise one or more processors configured to execute computer program modules. The system may include a game module configured to execute an instance of an online game and to implement the instance of the online game to facilitate participation of users in the online game. The system may include a user monitor module configured to monitor user activity parameters. The system may include a potential offer module configured to manage multiple incentive offers which are available for delivery to the users of the online game. The system may include an offer determination module configured to select incentive offers to be delivered to the users of the online game from the multiple incentive offers based on the monitored activity parameters of the users.
US09666020B2	Wagering game with a secondary reel having oversized single-evaluation symbols A gaming system includes one or more input devices, one or more display devices, and one or more processors, and one or more memory devices storing instructions that cause the gaming system to receive an input indicative of a wager. The instructions further cause the gaming system to display a wagering game having an array of symbol positions positioned on a plurality of primary reels and at least one secondary reel overlaying two or more adjacent primary reels, the secondary reel including at least one oversized standard symbol, the oversized symbol overlaying symbol positions on at least two of the two or more adjacent primary reels. The instructions further cause the gaming system to spin the two or more adjacent primary reels and the secondary reel such that the two or more adjacent primary reels and the secondary reel appear to spin as a single reel.
US09666019B1	Determining paylines in a slot game based on player characters A system and method for determining paylines in a slot game based on player characters are disclosed. A given player character may correspond to distinctive paylines along which symbols in a pull outcome may be assessed for rewards, for gameplays to be implemented in a game space, and/or any for other types of results provided by a slot game. In some examples, the number of the paylines corresponding to the given player character may correlate with various aspects regarding the given player character such as, without limitation, a class, a level, a race, a number of experience points, one or more skills, virtual items, and/or any other aspects regarding the given player character. In some examples, the combinations of symbols appearing on active paylines in a pull outcome may trigger one or more gameplays for implementation in a game space associated with the slot game.
US09666018B1	In-game building that receives stat boosts from troops A system and method for garrisoning virtual units in virtual structures such that the attributes of the virtual structure are modified to reflect the garrisoning of the virtual unit inside the virtual structure.
US09666016B1	System and method for conducting casino style game utilizing a pair of spinning tops A casino style system and method involving the use of a pair of spinning tops to generate random outcomes. A dealer's top and player's top are spun simultaneously before which players are able to place wagers on a series of colors (e.g., red, green, blue and yellow) and/or symbols (e.g., wild jokers) depicted on different facets of the tops and win awards responsive to random outcomes generated by said tops once toppling over. The tops are adapted to land such that a single facet is facing upwards identifying a color/symbol. Players may be able to place combo outcome wagers on specific combinations of random outcomes generated by the tops. A calibration/balance device is used to check and maintain the randomness of the tops.
US09666013B2	Cloud-based vending In a general aspect, a computer-implemented method can include receiving, at a computing device, a beacon signal including a vending device identifier and sending, to a cloud-based vending service, the vending device identifier. The method can further include receiving, from the cloud-based vending service, an indication of at least one product available for purchase from the vending device and receiving, at the computing device, an indication of a selected product of the at least one product available for purchase. The method can also include sending, to the cloud based service, a request to purchase the selected product and receiving, from the cloud-based vending service, a purchase token for the selected product. The method can still further include sending, to the vending device, the purchase token and receiving, from the vending device, an acknowledgment that the purchase token has been used to purchase the selected product.
US09666006B2	Wireless radio frequency switch controller A wireless radio frequency switch controller may be capable of being retrofit on to any existing parent system such as a thermostat, security system, garage door, and the like. The switch controller may have an external housing, a contact penetrating clip, a processor capable of being connected to a network, and a computer readable storage medium storing one or more programs for execution by the processor. The bottom of the contact penetrating clip preferably has at least one cutting surface. The cutting surface being capable of cutting an insulative covering for an electrical wire, once the contact penetrating clip is secured to the switch controller. The switch controller requires no batteries and harvests/stores energy from the parent system's existing wiring. The switch controller may be capable of being paired with a wireless receiver/transceiver by which the operation of the switch controller and subsequently the parent system may be manipulated.
US09666004B2	Electronic latch release backup system for a motor vehicle door A latch release backup system for a latch assembly of a motor-vehicle door is provided with a key cylinder configured to receive a vehicle key and which is rotatably mounted to the motor-vehicle door, and a mechanical coupling arrangement mounted within the motor-vehicle door and operable to convert a rotation of the key cylinder into actuation of an actuation group of the latch assembly for causing latch release. The key cylinder defines an electrical interface socket designed to receive the vehicle key. An electronic control unit is mounted within the motor-vehicle door and is electrically connected to the electrical interface socket to receive identification information (Id) from the vehicle key when plugged into the electrical interface socket. The mechanical coupling arrangement is normally disengaged from the actuation group of the latch assembly, and the electronic control unit is configured to control selective engagement of the mechanical coupling arrangement to the actuation group of the latch assembly based on the identification information (Id) received from the vehicle key.
US09666002B2	Method for operating a vehicle barrier In a method for operating a vehicle barrier (1) having a barrier column (2), a barrier arm (4) and a drive mechanism for pivoting the barrier arm (4) between a blocking position and an open position, a camera (7) is used for vehicle recognition, for the license plate recognition, for recognizing a following vehicle and for monitoring for vandalism, and the images thereof are evaluated by an electronic evaluation logic that is coupled to control of the vehicle barrier (1).
US09666001B2	Virtual gantry detection in a GNSS system Method and system for detecting passages by vehicle at a virtual gantry controlled by a GNSS system comprising an OBU in every vehicle to be surveyed by the system, said OBU receiving signals from satellites to consistently and frequently estimate positions for the vehicle, the method comprising the steps of: defining a virtual gantry in terms of a number of ordered passage lines across a road; determining intersection points from the intersection between the GNSS trace and the passage line; calculating a value representing probability of a true passage at that passage line; for each vehicle for which intersection points have been determined for at least two different passage lines, calculating a total probability value based on the individually calculated probability values; concluding of a true passage by the vehicle in question only if the total probability value is exceeding a predefined minimum value.
US09665995B2	Method and system for performing crash analysis of one or more vehicles A method and system for crash analysis of one or more vehicles involved in a crash is disclosed. The method may comprise capturing data samples such as a plurality of GPS samples and a plurality of acceleration samples. The method may further comprise generating a trajectory. Moreover, the method may comprise segmenting the trajectory into a macro level segment and further into a micro level segment. The method may further comprise computing at least one macro level score based on the plurality of acceleration samples and the GPS samples. Based on the at least one macro level score, the method may be configured to compute a crash responsibility score for ascertaining crash responsibility.
US09665991B2	Tolling using mobile device In one aspect, a tolling system is operable to perform operations, which may include: receiving, over a network and from a mobile device application operating on a mobile processing device, an identifier and road usage data collected by the mobile device application; identifying a profile based on the identifier; accessing a toll pricing model applicable to an entity associated with the identified profile; and determining a tolling charge incurred by the entity based on the road usage data collected by the mobile device application, the identified profile, and the accessed toll pricing model. In another aspect, a mobile device application is operable to perform operations that may include: collecting road usage data; communicating, over a network to a tolling system, the collected road usage data and an identifier; and receiving, from the tolling system, tolling charge data computed based on the communicated road usage data.
US09665985B2	Remote expert system A remote expert application identifies a manipulation of virtual objects displayed in a first wearable device. The virtual objects are rendered based a physical object viewed with a second wearable device. A manipulation of the virtual objects is received from the first wearable device. A visualization of the manipulation of the virtual objects is generated for a display of the second wearable device. The visualization of the manipulation of the virtual objects is communicated to the second wearable device.
US09665982B2	Information processing apparatus, information processing method, and recording medium There is provided an information processing apparatus including an image acquisition part configured to acquire an image captured by an imaging part, and a display controller configured to cause a virtual object to be displayed in accordance with a recognition result of a real object shown in the image. The display controller controls the virtual object on a basis of a size of the real object in a real space.
US09665978B2	Consistent tessellation via topology-aware surface tracking Consistent tessellation via topology-aware surface tracking is provided in which a series of meshes is approximated by taking one or more meshes from the series and calculating a transformation field to transform the keyframe mesh into each mesh of the series, and substituting the transformed keyframe meshes for the original meshes. The keyframe mesh may be selected advisedly based upon a scoring metric. An error measurement on the transformed keyframe exceeding tolerance or threshold may suggest another keyframe be selected for one or more frames in the series. The sequence of frames may be divided into a number of subsequences to permit parallel processing, including two or more recursive levels of keyframe substitution. The transformed keyframe meshes achieve more consistent tessellation of the object across the series.
US09665975B2	Shader program execution techniques for use in graphics processing This disclosure describes techniques for executing shader programs in a graphics processing unit (GPU). In some examples, the techniques for executing shader programs may include executing, with a shader unit of a graphics processor, a shader program that performs vertex shader processing and that generates multiple output vertices for each input vertex that is received by the shader program. In further examples, the techniques for executing shader programs may include executing a merged vertex/geometry shader program using a non-replicated mode of execution. The non-replicated mode of execution may involve assigning each of a plurality of primitives to one merged vertex/geometry shader program instance per primitive and causing each of the instances to output a plurality of vertices. In additional examples, the techniques for executing shader programs may include techniques for selecting one of a non-replicated mode and a replicated mode for executing a merged vertex/geometry shader program.
US09665974B2	Methods and systems of joint path importance sampling Methods and systems of joint path importance sampling are provided to construct light paths in participating media. The product of anisotropic phase functions and geometric terms across a sequence of path vertices are considered. A connection subpath is determined to join a light source subpath with a light receiver subpath with multiple intermediate vertices while considering the product of phase functions and geometry terms. A joint probability density function (“PDF”) may be factorized unidirectional or bidirectional. The joint PDF may be factorized into a product of multiple conditional PDFs, each of which corresponds to a sampling routine. Analytic importance sampling may be performed for isotropic scattering, whereas tabulated importance sampling may be performed for anisotropic scattering.
US09665970B2	Variable-sized concurrent grouping for multiprocessing Aspects include, for example, a method for interpreting information in a computer program, or profiling such a program to estimate a group size for instances of that program (program module, or portion thereof). Such a method can be used in a system that supports collecting outputs of executing instances, where those outputs can specify new program instances. Scheduling of new instances (or allocation of resources for executing such instances) can be deferred. A trigger to begin scheduling (or allocation) for a collection of instances uses a target group size for that program. Thus, different programs can have different group sizes, which can be set explicitly, or based on profiling. The profiling can occur during one or more of pre-execution and during execution. The group size estimate can be an input into an algorithm that also accounts for system state during execution.
US09665967B2	Disparity map generation including reliability estimation A better basis for a further processing such as virtual view rendering, in form of a disparity map is achieved. To this end, the disparity map generation is done in two separate steps, namely the generation of two depth/disparity map estimates based on two different pairs of views of the scene in a manner independent from each other, with then comparing both depth/disparity map estimates so as to obtain a reliability measure for one or both of the depth/disparity map estimates.
US09665964B2	Image processing apparatus and image processing method To display images by suitably superimposing a graphics image on a high-dynamic-range image in an easily visible manner.A dynamic range converter (311) converts a SDR graphics image to an HDR graphics image based on metadata. An image combiner (312) combines the graphics image of which the dynamic range has been converted to HDR with HDR content. A dynamic range converter (313) performs display mapping on the HDR content combined with the graphics image based on metadata.
US09665962B2	Image distractor detection and processng Image distractor detection and processing techniques are described. In one or more implementations, a digital medium environment is configured for image distractor detection that includes detecting one or more locations within the image automatically and without user intervention by the one or more computing devices that include one or more distractors that are likely to be considered by a user as distracting from content within the image. The detection includes forming a plurality of segments from the image by the one or more computing devices and calculating a score for each of the plurality of segments that is indicative of a relative likelihood that a respective said segment is considered a distractor within the image. The calculation is performed using a distractor model trained using machine learning as applied to a plurality images having ground truth distractor locations.
US09665951B2	Unified compression/decompression graphics architecture A unified compression/decompression architecture is disclosed for reducing memory bandwidth requirements in 3D graphics processing applications. The techniques described erase several distinctions between a texture (compressed once, and decompressed many times), and buffers (compressed and decompressed repeatedly during rendering of an image). An exemplary method for processing graphics data according to one or more embodiments of the invention thus begins with the updating of one or more tiles of a first image array, which are then compressed, using a real-time buffer compression algorithm, to obtain compressed image array tiles. The compressed image array tiles are stored for subsequent use as a texture. During real-time rendering of a second image array, the compressed image array tiles are retrieved and decompressed using a decompression algorithm corresponding to the buffer compression algorithm. The decompressed image array tiles are then applied as a texture to one or more primitives in the second image array.
US09665950B2	X-ray imaging system and image processing device An X-ray imaging system includes an X-ray imaging device and an image processing device including a reconstruction unit and an estimation unit. The X-ray imaging device uses a Talbot or Talbot-Lau interferometer including gratings disposed in a line. The X-ray imaging device obtains sets of moire fringe images by fringe scanning multiple times between which arrangement of the gratings is changed. In the fringe scanning, one of the gratings is moved relatively to the remaining grating. The reconstruction unit generates, on the basis of the sets, a reconstructed image which is a differential phase image, an X-ray absorption image and/or a small-angle scattering image. The estimation unit estimates, on the basis of the reconstructed image, a relative position of the moved grating from a reference position of the grating at each imaging in the fringe scanning.
US09665948B2	Saturation compensation method A saturation compensation method is provided. The method includes the steps of: retrieving an input image; performing at least one first image process on the input image to generate a first image; calculating saturation corresponding to each pixel in the input image; and performing a saturation compensation process on the first image according to the input image and the saturation to generate an output image.
US09665945B2	Techniques for image segmentation Techniques for image segmentation can include receiving image data of an image including a background and a face of a person in a foreground, and determining a respective a priori probability of a head-shoulder foreground pixel appearing per pixel of the plurality of pixels, according to a positioning result of a plurality of exterior contour points of the face. The techniques can also include selecting foreground and background pixels of the plurality of pixels, according to at least the a priori probabilities, and determining respective color likelihood probabilities of the foreground and the background, according to color feature vectors of the selected pixels. The techniques can also include determining respective posteriori probabilities of at least part of the foreground and at least part of the background, according to the a priori probabilities and the respective color likelihood probabilities. The techniques can also include performing segmentation on the plurality of pixels, according to the respective posteriori probabilities.
US09665944B2	Image processing apparatus and non-transitory computer readable recording medium storing an image processing program with improved duplication of characters against a background image In an image processing apparatus, a character recognizing unit identifies a character image in a document image. A font matching unit determines a character code and a font type corresponding to the identified character image. A fore-and-background setting unit sets the document image as a background image and sets a standard character image based on the determined character code and the determined font type. A background image correcting unit (a) deletes a deletion area in the background image, the deletion area taking a same position as the character image or the standard character image, (b) interpolates a differential area between the character image and the standard character image in a specific neighborhood area that contacts with the deletion area on the basis of the background image, and (c) interpolates the deletion area on the basis of the back ground image.
US09665943B2	Histogram-based image segmentation Systems, apparatuses, and/or methods may provide for segmenting an image by generating a histogram of its pixel values, dividing the histogram into class intervals, and then iteratively computing new, shifted weighted means and shifted class interval boundaries for the class intervals until a predetermined level of convergence to a limit is obtained. The pixels may then be updated to a last weighted mean for class intervals to which they belong, providing segmentation. Similarly, any data may be segmented to provide computational efficiency.
US09665942B2	Object detection and tracking system Methods and apparatuses for analyzing a sequence of images for an object are disclosed herein. In a general embodiment, the method identifies a region of interest in the sequence of images. The object is likely to move within the region of interest. The method divides the region of interest in the sequence of images into sections and calculates signal-to-noise ratios for a section in the sections. A signal-to-noise ratio for the section is calculated using the section in the image, a prior section in a prior image to the image, and a subsequent section in a subsequent image to the image. The signal-to-noise ratios are for potential velocities of the object in the section. The method also selects a velocity from the potential velocities for the object in the section using a potential velocity in the potential velocities having a highest signal-to-noise ratio in the signal-to-noise ratios.
US09665940B2	Light-microscopy method for locating point objects A light-microscopy method for locating point objects in a sample arranged in an object space includes imaging the sample onto a detector by an imaging optical unit having a depth of field of predetermined axial extent along an optical axis in the object space, onto which the detector is imaged. The point objects in the sample are located within the depth of field. The first sample image generated by the imaging of the sample onto the detector is evaluated. For locating a respective first point object in a direction of the optical axis, a parameter of a first light spot of one or more light spots of the first sample image representing the first point object is determined, and a rough axial z position related to the first point object is assigned to the parameter based on predetermined association information.
US09665937B2	Incremental global non-rigid alignment of three-dimensional scans Techniques are provided for incrementally aligning multiple scans of a three-dimensional subject. This can be accomplished by establishing an updated aligned set of scans as each new scan is sequentially processed and aligned with the existing scans. In such embodiments the pairwise and global alignment processes are effectively combined into a single collective alignment process. This collective alignment converges to an optimal alignment faster than the sequential pairwise alignment process that existing solutions use. The collective alignment enforces pairwise alignment between the individual scans in the aligned set of scans. This is because each scan comprising the aligned set can be aligned to the next incremental scan if any scan included in the aligned set can be aligned to the next incremental scan. The pairwise alignment between the scans comprising the aligned set is thus a known function.
US09665935B2	Image processing device and program An object of the present invention is to provide an image processing technology capable of perceiving a motion of the shape of a target area. An image processing device (3) according to the present invention includes: a dynamic image acquiring unit (110) that acquires a dynamic image; a boundary line extracting means (130) that acquires a plurality of target area boundary lines by extracting boundary lines of a target area; a displacement correcting means (140) that acquires a predetermined number of displacement-corrected boundary lines in which a removal-required component is removed by calculating a displacement amount, which is the removal-required component, using a base boundary line as a displacement base for one or more of target area boundary lines other than the base boundary line among the plurality of target area boundary lines by using pixels corresponding to the plurality of target area boundary lines and correcting a predetermined number of the target area boundary lines other than the base boundary line by using the displacement amount after the calculation of the displacement amount; and a display means (34) that displays displacement-corrected boundary line information for display based on the predetermined number of displacement-corrected boundary lines.
US09665934B2	Apparatus for detecting faults in video frames of video sequence A fault detection circuit for detecting faults in a video sequence includes a multiple input signature register (MISR) with a linear feedback shift register (LFSR) that receives pixel data for pixels in a frame region for video frames of a video sequence and receives a read signal to read the pixel data and shift the MISR; a multiple signature storage buffer (MSSB) that stores frame signatures; and a signature comparator that compares current and reference frame signatures to determine if a fault condition exists in the video sequence. The MISR holds a frame signature for the frame region of the video frame while receiving a frame end signal. The MSSB stores a current frame signature held by the MISR after receiving the frame end signal. The MSSB also stores a reference frame signature. A display processing circuit includes the fault detection circuit. An integrated circuit includes the display processing circuit.
US09665933B2	Method and apparatus for inspecting containers, such as bottles or similar containers A method and apparatus for inspecting containers, such as bottles or similar containers. The abstract of the disclosure is submitted herewith as required by 37 C.F.R. §1.72(b). As stated in 37 C.F.R. §1.72(b): A brief abstract of the technical disclosure in the specification must commence on a separate sheet, preferably following the claims, under the heading “Abstract of the Disclosure.” The purpose of the abstract is to enable the Patent and Trademark Office and the public generally to determine quickly from a cursory inspection the nature and gist of the technical disclosure. The abstract shall not be used for interpreting the scope of the claims. Therefore, any statements made relating to the abstract are not intended to limit the claims in any manner and should not be interpreted as limiting the claims in any manner.
US09665924B2	Prioritized requesting of mapping layers A mapping system disclosed herein includes a requestor that transmits requests for different layer sets of mapping data for a digital map to one or more data sources across a network according to a predefined order. According to one implementation, the mapping system also processes and/or renders the different layer sets to a display according to the predefined order.
US09665920B1	Simultaneous execution of compute and graphics applications One embodiment of the present invention sets forth a technique for distributing graphics commands and atomic commands to a color processing unit (CROP) in an efficient manner. The interleaving mechanism determines, at each clock cycle, which graphics command(s) or atomic command(s) is transmitted to the CROP based on different factors. First, the interleaving mechanism ensures that atomic commands or graphics commands associated with a multi-transaction command stream are processed together. Second, the interleaving mechanism selects consecutive graphics commands for transmission to the CROP that optimize the use of different memory caches. Third, the interleaving mechanism prioritizes atomic commands over graphics commands. At each clock cycle, the graphics command(s) or the atomic command(s) selected by the interleaving mechanism are transmitted to the CROP for processing.
US09665914B2	Social campaign network and method for dynamic content delivery in same An engine, system and method for a domain social network that interconnects Internet users with at least domains owned by or of interest to those Internet users, and that may obtain and/or forward obtained dynamic data regarding those domains automatically, such as by web service or email service. The dynamic data may be used to filter and protect content and data of the respective domains, to protect users by identifying low quality web pages or malicious software or pages, to isolate or improve search results regarding the domain, and/or to improve Internet-based transaction flow, such as the creation of advertising.
US09665912B1	Insurance claim capitation and predictive payment modeling A claim-based capitation model is proposed for handling vehicle repair insurance claims. Rather than determining a detailed estimate of the expected actual cost of repair, the estimate may be determined using a simpler model. For example, the insurance company and a repair facility may agree to following a predictive payment model in which the insurance company pays a fixed predicted capitated amount of money for each repair claim, regardless of the amount of repair work that will be needed. Alternatively, the insurance company may pre-pay a fixed capitated amount for a predicted number of future insurance claims.
US09665911B2	System and method to document and display business requirements for computer data entry An embodiment provides a real-time or dynamic collaborative computer data collection form prototype builder. An embodiment integrates several concepts in order to streamline the computer data collection form development process. In an embodiment a dataset is used to collect data entry form requirements and attributes about the user interface which are used by a program to render a computer data collection form. Change implementation is facilitated by permitting changes in the underlying data set to be reflected in the computer data collection form, e.g., as re-rendered by the system.
US09665910B2	System and method for providing customized safety feedback The present invention relates generally to systems and methods for monitoring driving behavior and providing feedback to the driver. The systems evaluate driving behavior and relay feedback to the driver in a fashion that is customized to take into account individual characteristics and demographic characteristics of the driver.
US09665904B2	Order entry system and order entry method There is provided an order entry system including: a first microphone that picks up speech regarding order details of a first speaker; a second microphone that picks up speech regarding the order details of a second speaker for checking the order details of the first speaker; a speech recognizer that recognizes the speech regarding the order details of the first speaker which is picked up by the first microphone and the speech regarding the order details of the second speaker which is picked up by the second microphone; and an order data output that displays on a display, a display screen of order data regarding the order details of the first speaker, including a first speech recognition result of the speech regarding the order details of the first speaker and a second speech recognition result of the speech regarding the order details of the second speaker.
US09665898B2	Executing multiple transactions using trigger inputs Merchandise content is aggregated from numerous merchant sources and presented on computing devices of individual users. Users are able to purchase select individual merchandise items by performing a simplified action, such as a screen tap on a touchscreen device. When the user performs the action, a series of actions are performed programmatically and/or automatically on behalf of the user to initiate and complete the transaction for the selected merchandise item from the merchant source.
US09665893B2	Customizable state machine and state aggregation technique for processing collaborative and transactional business objects A computer-implemented state machine is provided for processing business objects representing collaborations between business entities. At least one business object represents a collaboration between business entities. A number of graphs represented in computer-readable media each correspond to a particular collaborating business entity. The graphs are generated using text files, at least a first text file including state information for the business object, at least a second text file including action information for the business object, and at least a third text file including transition information for the business object. A computer-implemented method is provided for aggregating state information associated with a composite business object representing at least one collaboration between business entities. The method includes retrieving the state information for the composite business object from a computer-readable medium and determining a state for the composite business object based on an assigned priority level for a state in a hierarchy of states associated with the composite business object, each state in the hierarchy of states having a corresponding assigned priority level.
US09665886B2	Method and apparatus for interactive audience participation at a live entertainment event The present invention relates to an interactive system enabling audience participation at a live event taking place in a venue. The system includes use of an interactive device that presents a promotional message (that is displayed on an electronic display) to an audience member, wherein said audience member is capable of responding to said message by entering feedback into said interactive device. Said interactive device having the capability to transmit messages to another audience member. Said feedback is transmitted to a central processor, where said feedback is stored as audience data and subsequently processed into results.
US09665884B2	Electronic periodical advertisement An electronic periodical advertisement including a number of time dependent offers is generated, e.g., using a computing device. The offers are organized into a number of modules. A default set of the modules is presented to a user. The default set of modules is edited to generate a user-defined set of modules. A user-defined electronic periodical advertisement including the user-defined set of modules is presented to the user.
US09665883B2	Apparatus and method for bringing offline data online while protecting consumer privacy A method and system for bringing together online and offline advertising uses anonymous links that are associated with consumer data. The anonymous links allow processing without personally identifiable information (PII) in a secure environment. Data is matched using the anonymous links, and further using identifiers that are encrypted for use in connection with individual match distribution partners. The method and system allows a marketer to utilize offline data to precisely target advertisements without the use of PII, and to perform analytics concerning the use of the online advertisements to more precisely determine the effectiveness of multichannel marketing efforts.
US09665882B2	System and method for evaluating search queries to identify titles for content production Systems and methods are provided to select potential titles for online content using search query logs from web search service providers. A plurality of search queries are collected from one or more web search service providers. A lifetime value is determined for each of the search queries. Potential titles are then selected from the plurality of search queries using selection criteria including the lifetime value of the search queries. The potential titles can then be provided to content developers who develop online content based on the potential titles.
US09665878B2	Method and system for upgrading a previously purchased media asset Systems, graphical user interfaces and methods for upgrading from one or more digital media assets to a set of digital media assets over a network are described. A potential purchaser can be notified of available upgrade opportunities that are available for purchase. The potential purchaser can elect to pursue an upgrade opportunity so as to purchase a set of digital media assets. Upon upgrading to the set of digital media assets, the digital media assets within the set of digital media assets are made available to the purchaser. According to one aspect, a graphical user interface facilitates presenting and requesting upgrade opportunities. According to another aspect, equivalency rules and/or eligibility rules can be used to control which sets of digital media assets are available for upgrade by respective potential purchasers.
US09665877B2	Reverse couponing Embodiments of the invention are directed to systems, methods and computer program products for reverse couponing. An exemplary apparatus is configured to determine user information and account information associated with a user; adjust offer information associated with an offer based on the user information and the account information, wherein the offer enables the user to receive at least one of a discount or a rebate on a purchase from a merchant; and transmit the adjusted offer to the user.
US09665875B2	Automated software tools for improving sales A sales application is described that includes multiple automated sales tools that can be combined to help improve sales within a sales team. A deal finder sales tool is described to help identify sales opportunities. A deal playbook sales tool is also described to help structure the sales opportunity into a sales play by recommending products to sale in conjunction and also constructing a sales team. An influencer sales tool is also described to help identify business relationships that can be utilized to influence members of the sales team.
US09665868B2	One-time use password systems and methods According to the invention, a method of using a one-time password for a transaction between a user and a merchant is disclosed. The method may include generating the one-time password. The method may also include authenticating the user by the authentication server in response to a request from the user to use the one-time password. The method may further include authorizing the use of the one-time password for the transaction in response to authenticating the user by the authentication server. The method may moreover include using the one-time password in combination with an account number to settle the transaction between the user and the merchant. The method may additionally include sending a message to the authentication server originating from the merchant, wherein the message comprises the one-time password, and wherein the message requests a determination whether the one-time password is authorized for use in the transaction. The method may also include sending a message to the merchant originating from the authentication server, wherein the message includes a determination whether the transaction should be approved in response to the authentication server determining whether the one-time password is authorized for use in the transaction.
US09665864B2	Method and device for conducting trusted remote payment transactions A method, device, and system for conducting trusted payment transactions including establishing a trust relationship between a first mobile computing device and a second mobile computing device. The first mobile computing device may initiate a payment transaction with a point-of-sale device, communicate with the second mobile communication device to retrieve payment information from the second mobile communication device, and complete the payment transaction with the point-of-sale device using the payment information. The second mobile computing device is configured to verify the user and identity of the first mobile computing device prior to providing the payment information. Communications between the mobile computing devices may be encrypted using pre-determined encryption techniques.
US09665860B2	Software application framework for network-connected devices A facility for provisioning and managing registered applications is described. Registered applications can be downloaded to a mobile device from an application provisioning server. When the download is complete, the mobile device may begin execution of the registered application. However, at least portions of the registered application cannot be executed by the mobile device without first passing control to an application provisioning server via a network connection. Upon receiving temporary control of the registered application, the application provisioning server can perform tasks such as license verification and other tasks before turning control of the application back to the mobile device.
US09665859B2	Method for future payment transactions A method for the online modification, submission and approval processing of a future payment request to afford a user the ability to renegotiate established loan agreement debt terms in which network communications are established between a user, such as a debtor, and a computing device, such as a server or server arrangement, is presented. The method comprises receiving information, at the computing device, regarding the loan agreement debt terms, presenting received information to a debtor, providing an interactive environment enabling a debtor to modify existing terms, submitting modified terms, processing data from the available information using a rules based engine, and processing a future payment request based on at least one decision made by the rules based engine. While online, the user/debtor may engage in revising a rejected future payment request in an attempt to reach a satisfactory renegotiation of debt terms.
US09665853B2	Deferred aircraft maintenance impact assessment apparatus, system, and method Described herein is an apparatus that includes a minimum equipment list (MEL) data module and an impact assessment module. The MEL data module determines at least one operational limitation associated with deferred maintenance on a vehicle. The impact assessment module determines an operational impact associated with the deferred maintenance based on the at least one operational limitation.
US09665850B2	Synchronized conversation-centric message list and message reading pane Technologies are described herein for a user interface uniting two primary components, a list view and a reading pane, within a message reading application. Technologies are also described for synchronizing status and parameters between the two primary user interface components. In particular, a user interface for reading messages can represent all components of a conversation with both a list view for presenting a message map, and a reading pane for presenting a content view. The list view can present a list of messages grouped by conversation. The reading pane window can contain smaller windows or frames. Each of the smaller windows or frames can contain a message within a given conversation. Synchronization provided between the list view and a reading pane can allow message selection in one of the user interface components to cause display and selection of the corresponding message in the other user interface component.
US09665849B2	Employing dependency graph in software build projects A mechanism for employing dependency graph in software build projects is disclosed. A method of implementation of the invention includes receiving a first build script file associated with a software project, the first build script file identifying a plurality of project dependencies associated with the software project. The method also includes parsing the first build script file to generate a project dependency graph corresponding to the first build script file. The project dependency graph includes a plurality of vertices representing to the plurality of software project dependencies and further includes a plurality of edges representing relationships between the plurality of the software project dependencies. The method also includes determining a build order of the plurality of software project dependencies using the project dependency graph.
US09665842B2	Supply chain management anomaly detection An integrated supply chain management with anomaly detection. An order schedule has one or more orders, each of which has a production requirement and a due date. An asset schedule has asset commitments associating assets with orders. Each asset has equipment specifications, including an asset class and one or more operational thresholds. The computer system identifies an asset of a class corresponding to a production requirement of an order and modifies the asset schedule to commit the asset to the order prior to the due date of the order. The computer system receives sensor input for the asset and determines whether an anomaly exists. If so, the computer system commits a second asset to the order.
US09665841B2	Cross-platform application framework One set of instructions is generated in part by compiling application-specific source code. When natively executed on a platform provided by a device, the set of instructions provides an application. Another set of instructions is generated in part by compiling the same business logic source code. When natively executed on another platform provided by another device, the other set of instructions provides the same application. The business logic source code is substantially free of code specific to any platform. Moreover, the business logic source code defines substantially all application-specific functionality of the application.
US09665838B2	Messaging architecture and system for electronic management of resources A system for managing resources used by an appliance includes a messaging architecture that uses resource profiles and function identifiers that represent a meaningful context related to the resource profiles so that the production or consumption of a resource can be managed by electronic messages using the message architecture.
US09665834B2	System for managing risk in employee travel A system for managing risk in employee travel may display a world risk map having countries color coded or otherwise indicating a risk level associated with each of the countries. The countries may be assigned to geographic groupings, such as continents, and the countries of the geographic grouping may change to a uniform color or other indication when the cursor is disposed within the boundaries of one of the countries of the geographic grouping. Clicking on the geographic grouping may cause the world risk map may cause the display to zoom in on an enlarged geographic group map with the countries displayed with their risk level indication. Clicking on one of the countries may cause a country information page to be displayed.
US09665833B2	System and method for providing collaboration communities in a computer portal environment A system and method for providing collaboration communities in a computer portal environment. The system comprises a community portal tool for creating community portals, portal applications, or portal web applications. In one embodiment, the portal can be one of a number of enterprise applications on server software. The portal can include a community context that can have an indication of members of the community. The indication can be, for example, a list of the members or pointer to a list of members. The community portal can be constructed from portal elements and the community context. The community portal tool can also be used to select a community portal template from a portal component library. The template can include standard elements from the construction of a community portal. A standardized look and feel, layout, and components such as a calendars can be in a community template.
US09665825B2	System for refining cognitive insights using cognitive graph vectors A system and computer-usable medium for using cognitive graph vectors to refine cognitive insights.
US09665817B2	Techniques for generating customized two-dimensional barcodes A computer-implemented technique can receive, at a computing device, a uniform resource locator (URL) for a web page and an image. A number of pixels corresponding to a desired resolution for encoding the image is determined and the image is converted to a modified image having the desired resolution. The technique can then generate a two-dimensional barcode by: (i) generating first data representative of the modified image, (ii) appending the first data to either an end of the URL to obtain a first modified URL or after a terminator bit of the two-dimensional barcode, (iii) generating second data representative of the second modified URL or the URL, and (iv) generating third data representative of an error correction code (ECC) based on the first data and the second data, wherein the two-dimensional barcode is generated based on the first data, the second data, and the third data.
US09665816B1	Circular machine readable code and methods for presenting and reading a circular machine readable code A machine readable code is presented in the form of a graphic seal shape that includes a central region and numerous triangular shapes arranged in a sequence surrounding the central region. A vertex of each triangular shape extends radially outwardly from the central region. The triangular shapes include at least two visually distinct presentations for encoding information based on a pattern of the visually distinct presentations of the triangular shapes in the sequence.
US09665815B2	Transaction card This invention relates to a transparent or translucent transaction card having a base comprising a core of substantially transparent or translucent material with a plurality of coats, including optically recognizable ink comprising one or more infrared blocking dyes and other nanoparticles, such as rare earth nanophosphors and other metal nanoparticles, and/or optically recognizable film comprising nanoparticles, such as rare earth nanophosphors, and other metal oxide and/or non-oxide complexes, and methods for their preparation.
US09665811B2	Printing apparatus, printing method, and non-transitory recording medium According to one embodiment, a printing apparatus includes a conveying unit, a printing unit, a display unit, and a control unit. The conveying unit conveys a sheet. The printing unit prints an image on the sheet conveyed by the conveying unit. The display unit performs display for causing a user to select necessity of re-printing on the sheet on which the image is printed. The control unit controls, if the necessity of the re-printing of the sheet is selected, the conveying unit to back-feed the sheet and controls the printing unit to perform re-printing after the back-feed of the sheet is completed.
US09665809B2	Apparatus and control method thereof An apparatus including a communication unit configured to communicate with a communication device and be able to output data stored in a memory to the communication device even without power supplied from a power supply to the apparatus stores, in the memory, status information to specify the status of the apparatus in a state in which the power supply supplies the power to the apparatus.
US09665807B2	Raster processing method and apparatus of transparent form Provided are a raster processing method and apparatus of a transparent Form. The method comprising: determining a reusable transparent Form in a page description file; performing syntax interpretation on the transparent Form to obtain a reuse type and position information of the transparent Form; generating a color block lattice, an Alpha block lattice, a Shape block lattice and their corresponding block attribute tables and block memory tables for the transparent Form, according to the reuse type and the position information, and establishing association relationships between different transparent Forms in the page description file; computing on the generated data information to obtain and buffer assembling information of the transparent Form, according to the reuse type of the transparent Form; determining an assembling manner of the transparent Form according to the reuse type of the transparent Form and assembling the transparent Form into the page to be outputted.
US09665804B2	Systems and methods for tracking an object A method for tracking an object by an electronic device is described. The method includes detecting an object position in an initial frame to produce a detected object position. The method also includes measuring one or more landmark positions based on the detected object position or a predicted object position. The method further includes predicting the object position in a subsequent frame based on the one or more landmark positions. The method additionally includes determining whether object tracking is lost. The method also includes avoiding performing object detection for the subsequent frame in a case that object tracking is maintained.
US09665796B2	System and method for visual correlation of digital images A system and method for determining if a first image and a second image are correlated images includes partitioning a first image and a second image into a plurality of corresponding pixel partitions, calculating an average luminance value for each of the plurality of pixel partitions, determining if each of the plurality of pixel partitions of the first image is correlated with each of the corresponding plurality of pixel partitions of the second image, calculating a percentage of correlated pixel partitions of the first image and the corresponding plurality of pixel partitions of the second image and determining that the first image and the second image are correlated images if the percentage of correlated pixel partitions exceeds a predetermined pixel partition correlation threshold. The objective metric of the present invention determines whether two static rendered images are correlated enough to be undetectable by a human observer.
US09665792B2	Method and apparatus for generating sharp image based on blurry image A method for generating a sharp image based on a blurry image is provided. The method includes acquiring pixel values of pixels in the blurry image, and a convolution kernel of the blurry image, determining a deconvolution kernel of the blurry image based on a preset image gradient operator and the convolution kernel, determining pixel values of pixels in the sharp image based on the deconvolution kernel and the pixel values of the pixels in the blurry image, and generating the sharp image based on the pixel values of the pixels in the sharp image. A deconvolution kernel in the embodiments of the present disclosure is determined based on a gradient operator and a convolution kernel, in other words, the deconvolution kernel introduces the gradient operator as a regularization constraint, which prevents noise from affecting an image recovery process, and improves the quality of a recovered sharp image.
US09665789B2	Device and method for analyzing the correlation between an image and another image or between an image and a video The present invention relates to a device and method for analyzing the correlation between an image and another image or between an image and a video. The device for analyzing the correlation between images and the method for using same include: a feature data generating unit for determining a feature point of an image and generating feature data which includes feature point orientation information on each determined feature point; and a relation analyzing unit for analyzing the correlation between an image and another image using feature data generated from the feature data generating unit. The relation analyzing unit includes: a unit for determining corresponding feature points, which determines a pair of corresponding feature points between compared images using feature data generated from the feature data generating unit; and a reliability estimating unit for estimating the reliability of the analysis of the relation between images on the basis of feature point orientation information on a feature point, in pairs of feature points determined by the unit for determining corresponding feature points. According to the present invention, provided are a device and method for quickly and efficiently analyzing a correlation, such as whether or not there is a similarity between an image and another image or between an image and a video, wherein said video includes an image, or a frame of said video corresponds to an image.
US09665788B2	Method and apparatus for setting region of interest According to a first aspect of the present invention, a method for setting a region of interest may include: detecting a mark in an image frame photographed by a camera; and setting a region of interest using the detected mark.
US09665785B2	Enrollment using synthetic fingerprint image and fingerprint sensing systems A fingerprint sensing system. The fingerprint sensing system includes: at least one sensor; at least one display device; at least one application processor; and at least one secure enclave processor. The application processor(s) receives fingerprint data from the sensor(s) and provides the fingerprint data to the secure enclave processor(s). The secure enclave processor(s) decodes the fingerprint data and provides a signal indicative of at least one matched node. The application processor(s), responsive to receipt of the signal indicative of the matched node(s), presents at least a portion of a synthetic fingerprint image via at least one display device corresponding to the matched node(s).
US09665784B2	Systems and methods for spoof detection and liveness analysis Spoof-detection and liveness analysis is performed using a software-based solution on a user device, such as a smartphone having a camera, audio output component (e.g., earpiece), and audio input component (e.g., microphone). One or more audio signals are emitted from the audio output component of the user device, reflect off a target, and are received back at the audio input component of the device. Based on the reflections, a determination is made as to whether the target is comprised of a three-dimensional face-like structure and/or face-like tissue. Using at least this determination, a finding is made as to whether the target is likely to be spoofed, rather than a legitimate, live person.
US09665781B2	Moving body detection device and moving body detection method A moving-body-detecting device is provided with an image capture unit, an image conversion unit, a three-dimensional-object-detecting unit, a turn detecting unit, and a control unit. The image capture unit captures images of the rear side of a vehicle. The image conversion unit performs viewpoint conversion of the captured images into bird's-eye view images. The three-dimensional-object-detecting unit generates differential waveform information based on a differential image of bird's-eye view images taken as different points in time, and detects three-dimensional objects based on the differential waveform information. The control unit suppresses detection of the three-dimensional object based on the differential waveform information, in cases in which turning of the vehicle has been detected as compared with cases in which the vehicle is not turning.
US09665779B2	Boundary-line-detecting device, boundary-line-deviation detecting device, and boundary-line-detection program In a cruising lane deviation detection system, when a boundary line is detected, a paint line drawn on a road surface to the left and right of an own vehicle is detected and a virtual line is set based on the position of a previously detected boundary line. The boundary line is set using at least either of the paint line and the virtual line. However, approach information indicating that the own vehicle is approaching a toll booth is acquired. When the approach information is acquired, setting of the virtual line as the boundary line is prohibited. Furthermore, whether or not there is risk of the own vehicle deviating from the boundary line is determined. When there is risk of deviation, an output that there is risk of deviation is performed. As a result, setting an erroneous virtual line as the boundary line can be suppressed.
US09665775B2	Identifying scene boundaries using group sparsity analysis A method for identifying a set of key video frames from a video sequence comprising extracting feature vectors for each video frame and applying a group sparsity algorithm to represent the feature vector for a particular video frame as a group sparse combination of the feature vectors for the other video frames. Weighting coefficients associated with the group sparse combination are analyzed to determine video frame clusters of temporally-contiguous, similar video frames. The video sequence is segmented into scenes by identifying scene boundaries based on the determined video frame clusters.
US09665774B2	Semantic representation module of a machine-learning engine in a video analysis system A machine-learning engine is disclosed that is configured to recognize and learn behaviors, as well as to identify and distinguish between normal and abnormal behavior within a scene, by analyzing movements and/or activities (or absence of such) over time. The machine-learning engine may be configured to evaluate a sequence of primitive events and associated kinematic data generated for an object depicted in a sequence of video frames and a related vector representation. The vector representation is generated from a primitive event symbol stream and a phase space symbol stream, and the streams describe actions of the objects depicted in the sequence of video frames.
US09665773B2	Searching for events by attendants A system, computer-implemented method and non-transitory computer-readable medium for automatically searching for images from events is provided. One or more personal identity tags are provided, wherein the personal identity tags relate to identification information for one or more individuals. Next, at least one event group is identified, wherein the event group is a collection of images associated with an event, the collection of images including one or more images tagged with one or more of the provided personal identity tags. A collection of the images for each of the identified event groups is then received.
US09665772B2	Iris biometric matching system A method and apparatus for biometric iris matching comprising pre-processing an input image capturing one or more eyes to produce one or more rectified iris images, coding the one or more rectified iris images into one or more multiresolution iris codes and matching the one or more multiresolution iris code with a set of stored multiresolution iris codes to determine whether a match exists.
US09665770B2	Image processing apparatus with an improved table image detecting unit An image processing apparatus includes an area extracting unit and a table image detecting unit. The area extracting unit is configured to extract a halftone dot area and character images in an image. The table image detecting unit is configured to detect the extracted halftone dot area as a table image if (a) the extracted halftone dot area includes no ruled lines and (b1) at least two of the detected character images are arranged in a primary scanning direction or a secondary scanning direction in the halftone dot area and (b2) character alignment of a tabular layout is detected on the character images on the basis of positional relations between divisional areas into which the halftone dot area is equally divided and the character images.
US09665769B2	Handwriting recognition with natural user input on multitouch surfaces The method includes receiving, by one or more computer processors, data indicating a hand is on a touch-sensitive surface. The method further includes identifying, by one or more computer processors, a position of the hand. The method further includes determining, by one or more computer processors, a change in the position of the hand. The method further includes characterizing, by one or more computer processors, the change in position of the hand on the touch-sensitive surface. The method further includes generating, by one or more computer processors, an alphanumeric character based upon the characterized change in the position of the hand.
US09665767B2	Method and apparatus for pattern tracking A method and apparatus for pattern tracking. The method includes the steps of performing a foreground detection process to determine a hand-pill-hand region, performing image segmentation to separate the determined hand portion of the hand-pill-hand region from the pill portion thereof, building three reference models, one for each hand region and one for the pill region, initializing a dynamic model for tracking the hand-pill-hand region, determining N possible next positions for the hand-pill-hand region, for each such determined position, determining various features, building a new model for that region in accordance with the determined position, for each position, comparing the new model and a reference model, determining a position whose new model generates a highest similarity score, determining whether that similarity score is greater than a predetermined threshold, and wherein if it is determined that the similarity score is greater than the predetermined threshold, the object is tracked.
US09665766B2	Facial recognition with biometric pre-filters Embodiments of the present invention disclose a method for facial recognition processing using biometric pre-filters. The computer determines a first eye-to-eye distance of a first detected face of a first image, and wherein the eye-to-eye distance is a biometric measurement. The computer receives a selection of a demographic characteristic. The computer determines a search range for the first eye-to-eye distance based, at least in part, on the selection of the demographic characteristic, and the first eye-to-eye distance. The computer identifies a second image from a plurality of images, wherein the second image includes a second eye-to-eye distance that is included in the determined search range for the first eye-to-eye distance. The computer applies a facial recognition algorithm to the second image to determine at least one potential identity that is associated with the first detected face.
US09665762B2	Tiered wakeup strategy A biometric authentication apparatus and method is disclosed which may comprise a biometric authentication unit which may comprise: a biometric object sensor comprising sensor elements and a sensor computing device; a wake-on-event logic controller maintaining the sensor computing device in one of a powered-off or powered down mode, and including a bulk biometric object detector configured to detect a biometric object on or in the vicinity of the sensor elements and to power-on or power-up the sensor computing device responsive to the detection of the biometric object on or in the vicinity of the sensor elements; the sensor computing device configured to analyze one or more lines of biometric object image comprising a partial biometric object image and determine if the partial biometric image belongs to a biometric object desired to be imaged to obtain a complete biometric object image, and to provide a power-on or power-up signal to a host electronic device computing device when the partial biometric image is determined to belong to a biometric object desired to be imaged.
US09665760B1	Barcode-reading system This patent specification describes a barcode-reading system for a mobile device. The mobile device include an image sensor array for generating a color image of a target area. The color image includes sub-images each captured with a portion of the image sensor array sensitive to different bands of illumination. The barcode reading system may include an optic system configured to produce a targeting illumination pattern of a particular band of illumination passed by an optical filter within the target area. An image processing function of a barcode-reading application may create a grayscale composite image of a barcode by combining the sub-images. In combining the sub-images, a contribution from a sub-image captured by a portion of the image sensor array most sensitive to the particular band for the targeting illumination may be smaller than a contribution from the other two sub-images captured by other portions of the image sensor array.
US09665756B2	Method and device for processing visual graphic codes of mobile terminal The invention discloses a method and device for processing visual graphics codes of mobile terminal. The method mainly includes: monitoring an action of shooting or recording digital images by the mobile terminal; identifying a focusing action during the process of shooting or recording the digital images by the mobile terminal; recording the digital images obtained after the mobile terminal finishes the focusing action; analyzing the digital images obtained after the focusing action is finished, and obtaining visual graphics codes in the digital images; decoding the visual graphics codes, and processing decoded information obtained after decoding. The invention can efficiently and conveniently obtain the visual graphics coding of the digital images caused by the focusing action, and avoid complicated operations of re-installing a visual graphics coding software, and opening the visual graphics coding software by the user.
US09665747B1	Enhanced credit card and system therefor The invention is a credit card system which utilizes a substrate having a machine readable user account number and, a user removable portion of the substrate. The credit card identifies if the user removable portion of the substrate has been disturbed, the reader requests a secondary user identification to verify that the user is authorized to use the credit card.
US09665746B2	Secure smartcard reader A secure smartcard reader including a smartcard connector and a flexible printed circuit board wrapped around and at least partially surrounding the smartcard connector and at least partially defining a security volume enclosing the smartcard connector, the wrapped flexible printed circuit board defining on an outer-facing surface thereof a plurality of keypad contacts, the wrapped flexible printed circuit board defining electrical conductors connecting the plurality of keypad contacts to connector pads and the wrapped flexible printed circuit board defining a protective anti-tamper mesh protecting the electrical conductors.
US09665744B2	Input front-end circuit for switching power supply control integrated circuit and switching power supply controller having the same An inverting amplifier creates a voltage C using a reference voltage (voltage B) as a reference point. An adder composed of two input inverting amplifier circuits ultimately creates a voltage D by carrying out weighted addition of the voltage A and the voltage C. By using the voltage D created by an input front-end circuit, the internal functions of the control IC can prevent the operating points and control amounts for each function from being different relative to the input voltage and make it possible to distinguish voltage within the control IC from zero voltage when the lowest input voltage is received.
US09665735B2	Privacy fractal mirroring of transaction data The tool to provide anonymous data in response to a request for information is configured to receiving a request for information relating to a population of interest from a user; determining criteria associated with the population of interest, wherein the criteria define an individual representative of the population of interest; determining a characteristic of the individual within one or more categories; classifying the characteristic of the individual into a cluster, the cluster comprising a subset of all possible outcomes for the category; classifying a plurality of individuals from a database into clusters based on the one or more categories; determining a subset of the plurality of individuals that are similar to the individual representative of the population of interest based on the clusters; transforming the characteristics of the individuals in the subset to generate anonymous data responsive to the request for information; and providing the anonymous data to the user.
US09665732B2	Secure Download from internet marketplace A method and system for secure download includes generating a path to a location where a downloadable object is temporarily stored. The method can include receiving a request for a downloadable object, generating one or more unique identifiers, creating a path to the requested object using the unique identifiers, storing a copy of the requested object in a temporary location indicated by the path, and returning the generated path to the requestor. The method can further include receiving a path to a downloadable object and, responsive to a determination that the path is valid, returning the downloadable object. A generated path can be rendered obsolete and its corresponding file removed from the temporary location after a predefined time interval has elapsed. A database of the generated paths and associated files may be periodically checked, and those paths and files that have been stored in the database beyond a pre-definable expiry time can be removed.
US09665722B2	Privacy firewall Embodiments of the invention relate to systems and methods for providing an anonymization engine. One embodiment of the present invention relates to a method comprising receiving a message directed at a recipient computer located outside a secure area by a privacy computer located within a secure area. The privacy computer may identify private information using a plurality of privacy rules and anonymize the message according to the plurality of privacy rules. Another embodiment may be directed to a method comprising receiving a request for sensitive data from a requesting computer. An anonymization computer may determine a sensitive data record associated with the request and may anonymize the sensitive data record by performing at least two of: removing unnecessary sensitive data entries from the sensitive data record, masking the sensitive data entries to maintain format, separating the sensitive data entries into associated data groupings, and de-contexting the data.
US09665716B2	Discovery of malicious strings Particular embodiments described herein provide for an electronic device that can be configured to determine a string sample of data, determine a hash of the string sample of data, automatically cluster the hash with other hashes from other string samples of data, and automatically create a signature hash string for the string sample of data.
US09665715B1	Systems and methods for detecting malware-induced crashes A computer-implemented method for detecting malware-induced crashes may include (1) identifying, by analyzing a health log associated with a previously stable computing device, the occurrence of an unexpected stability problem on the previously stable computing device, (2) identifying, by analyzing an event log associated with the previously stable computing device, an event that is potentially responsible for the occurrence of the unexpected stability problem on the previously stable computing device, (3) determining, due at least in part to the event being potentially responsible for the occurrence of the unexpected stability problem on the previously stable computing device, that the event is potentially malicious, and (4) performing a security action in response to determining that the event is potentially malicious. Various other methods, systems, and computer-readable media are also disclosed.
US09665712B2	Malware removal A method and apparatus for scanning for or removing malware from a computer device. Under normal circumstances, the computer device is controlled by a first operating system installed in a memory of the device. In order to scan for or remove the malware from the computer device, control of the computer device is passed from the first operating system to a second operating system and, under the control of the second operating system, the device is either scanned for malware or the malware is removed. This allows malware to be detected or removed, even if it has affected the first operating system in some way in order to evade detection or removal.
US09665710B2	Mitigating ROP attacks Mitigating return-oriented programming attacks. Program code and associated components are received and loaded into memory. From the program code and associated components, a predetermined number of sequences of machine language instructions that terminate in a return instruction are selected. The sequences of machine language instructions include: machine language instruction sequences that are equivalent to a conditional statement “if-then-else return,” sequences of machine language instructions corresponding to known malicious code sequences, and sequences of machine language instructions corresponding to machine language instructions in known toolkits for assembling malicious code sequences. For each selected machine language instruction sequence, memory blocks containing the selected machine language instruction sequence are rearranged using address space layout randomization (ASLR); then, upon expiration of an expected time interval required to locate the selected machine language instruction sequence by inspecting the rearranged memory blocks, the rearranging is repeated, thereby mitigating ROP attacks.
US09665708B2	Secure system for allowing the execution of authorized computer program code Systems and methods for selective authorization of code modules are provided. According to one embodiment, a kernel-level driver within a kernel of an operating system of a computer system intercepts activity in connection with a file system associated with the computer system or the operating system relating to a code module. A determination is made by the kernel-level driver regarding whether to allow the intercepted activity to proceed by performing a real-time authentication process of the code module with reference to a multi-level whitelist database architecture, including a local copy of a remote global whitelist database hosted by a trusted their-party service provider, a local whitelist database and a most recently used (MRU) cache. When the intercepted activity is allowed to proceed as a result of the determination, the code module is permitted by the kernel-level driver to be loaded and executed by the computer system.
US09665707B2	Systems and methods for cyber security of intra-vehicular peripherals powered by wire Systems and methods are provided for securing and authenticating a network of a vehicle. At least one network key is generated by an electronic control module and distributed to at least one remote device over a wired power line. At least one signed transmission having a signature based on the at least one network key is transmitted from the at least one remote device to the electronic control module over a communication channel on the network separate from the wired power line. The electronic control module authenticates and encrypts the at least one signed transmission and receives a data stream from the at least one remote device over the communication channel.
US09665701B2	Mask based challenge response test Providing a challenge response test associated with a computer resource includes generating a challenge response test image including providing a first substantially well-formed image, including a first masked image having a visible portion entirely composed of portions of a first well-formed image, and a first plurality of image elements; and providing at least one ill-formed image, each at least one ill-formed image including a second masked image having at least one first ill-formed portion.
US09665696B1	Protecting content with initialization vector manipulation Disclosed are various embodiments for generating encrypted media content items as well as decrypting encrypted media content items. A content type is embedded in an initialization vector corresponding to an encrypted sample. Upon decryption of encrypted content, the content type is identified and an action taken based upon the detected content type.
US09665693B2	System and method to generate molecular formula distributions beyond a predetermined threshold for a petroleum stream Methods for generating molecular formula distributions beyond a predetermined threshold for a petroleum stream are disclosed. An initial molecular formula distribution within a predetermined threshold is obtained for a petroleum stream. A correlation between two or more molecular properties of the initial molecular formula distribution is identified, and the initial molecular formula distribution is extrapolated beyond the predetermined threshold along the correlation. The extrapolated molecular formula is renormalized based on renormalization data obtained from the sample. The renormalized molecular formula distribution can then be blended with the initial molecular formula distribution, reconciled to secondary analytical measurements, and/or used to create a model of composition and/or a molecular composition-based model of a resid upgrading process. Systems for implementing the methods are also disclosed.
US09665688B2	Product dispensing system and method with redundant container induction A system for dispensing product-filled containers in which the containers are filled prior to labeling, so that any container may filled at any dispensing station. The system includes multiple dispensing stations, both manual and automated, disposed adjacent a conveyor. Automated dispensing stations include quantities of products, fillable product containers, and a labeling assembly. Each dispensing station dispenses a predetermined quantity of products into a container and labels the container for transport via an exit conveyor to the main conveyor. Carriers are delivered via the main conveyor into a container carrier queue lane, where a sensor reads the RFID before a filled, labeled container is deposited into the carrier. A sensor reads the label bar code and transmits the bar code and RFID information to the computer database, mating the carrier with the filled container. System software load balances the components of an order by routing them to different dispensing stations.
US09665687B2	Adaptive imaging system workflow and user interface system A system configures a medical imaging system using utilization information. The system includes at least one repository storing records indicating usage and an associated time of usage, of particular features of a medical imaging system. A processor coupled to the at least one repository analyzes the records to determine, (a) frequency of usage of particular features of the medical imaging system and (b) a sequence of usage of the particular features of the medical imaging system and provide utilization data, by identifying in the records particular text strings using predetermined information associating predetermined text strings with corresponding features. An adaptation processor uses the utilization data to modify, delete or add a task to a task sequence employing the particular features. A display processor generates data representing at least one display image enabling a user to perform an adapted task sequence.
US09665685B1	Using de-identified healthcare data to evaluate post-healthcare facility encounter treatment outcomes A computer-implemented method includes producing medical information that characterizes a group of individuals from a set of private data representing pre or post-encounter characteristics of the individuals, wherein the individuals have had encounters with a healthcare facility. The identity of the individuals is unattainable from the produced medical information. The method also includes providing the produced medical information to report the pre or post-encounter characteristics of the group.
US09665684B2	QTL responsible for tomato fruit firmness This invention relates to QTL responsible for significantly increased firmness in tomato fruit in the cultivated plant producing said tomato fruit, compared to fruit from a control tomato plant which does not have said genetic elements. A cultivated tomato plant producing tomato fruit with significantly increased fruit firmness and a method for detecting QTLs linked to significantly increased fruit firmness are also provided.
US09665680B2	Cell-level signal electromigration A circuit design system includes a simulator that determines an average charging current provided by each current insertion point in a cell and an average charging current along a path in the cell between a reference pin position and a candidate pin position. A candidate pin placement tester updates the average charging current along the path by adding the average charging current of each insertion point to the average charging current along the path to produce an updated average charging current along the path and uses the updated average charging current along the path to determine a time to failure for the cell.
US09665679B2	Systems and methods for designing integrated circuits with consideration of horizontal and vertical wiring demand ratios A computer implemented method for designing an integrated circuit (IC) having dimensions along first and second directions, and comprising at least a first block is presented. The method includes evaluating a demand ratio for the first block, the demand ratio being reflective of a ratio of a conductive wiring demand along the first direction and a conductive wiring demand along the second direction, when the computer is invoked to evaluate the demand ratio for the first block. The method further includes creating one or more wiring reservation blocks in accordance with the demand ratio.
US09665673B2	Input capacitance modeling for circuit performance Implementations of the present disclosure involve methods and systems for modeling input capacitance for a component of an electronic circuit design to accurately and quickly analyze the performance of the circuit. In particular, the methods and systems may provide for an estimated input capacitance for one or more transistor components of the circuit. To determine the estimated input capacitance of a transistor, a computing system may obtain technical information about the circuit and determine one or more virtual nets that include connections between the adjusted transistor and other transistors (or other components) of the circuit design. This information may be utilized by the computing system to calculate an estimated input capacitance for the adjusted transistor of the circuit design. The calculated input capacitance of the transistor may be added into a simple simulation of the circuit design to obtain one or more operational parameters or circuit performance characteristics.
US09665671B1	Emulating power gating for a circuit design using a programmable integrated circuit Emulating power gating includes identifying an isolation circuit having a first input coupled to an output of a first power domain, a second input coupled to an isolation signal, and an output coupled to an input of a second power domain; removing a power gate circuit configured to selectively decouple the first power domain from a power supply responsive to a power gate signal; and decoupling the first input of the isolation circuit from the output of the first power domain. A power gate emulation circuit is inserted using a processor. The power gate emulation circuit is coupled to the isolation signal, the power gate signal, and the output of the first power domain.
US09665669B2	Techniques for estimating compound probability distribution by simulating large empirical samples with scalable parallel and distributed processing Techniques for estimated compound probability distribution are described. An apparatus comprising a configuration component, perturbation component, sample generation controller, an aggregation component, a distribution fitting component, and statistics generation component. The configuration component operative to receive a compound model specification and candidate distribution definition. The perturbation component operative to generate a plurality of models from the compound model specification. The sample generation controller operative to initiate the generation of a plurality of compound model samples from each of the plurality of models. The distribution fitting component to generate parameter values for the candidate distribution definition based on the compound model samples. The statistics generation component to generate approximated aggregate statistics.
US09665668B2	Configuring a dispatching rule for execution in a simulation A computer system identifies a dispatching rule that corresponds to a dispatching decision to be made in a simulation of a production environment. The dispatching rule is associated with a set of data processes. The computer system identifies a subset of the data processes that is to be executed in the simulation and executes the subset of data processes to simulate the dispatching rule to make the dispatching decision. The computing system generates a simulation decision that describes the dispatching decision made from executing the subset of data processes.
US09665666B1	Graph based routing for open areas A system and method determines a path in an open space that does not have a well-structured routing infrastructure. In some embodiments, the system and method may model the open space with one-dimensional segments. The system and method may determine a path between two points along the one-dimensional segments. In some embodiment, the system and method may smooth the path based on geometry of objects in the open space.
US09665665B2	Visualization credibility score One embodiment of the present invention discloses a method, computer program product, and system for a method of determining the credibility of a visualization. Visualization data is received from an electronic device. The visualization data is compared to a plurality of visualization credibility criteria to determine a level of credibility for each of the visualization credibility criteria. The credibility of the visualization is rated based on the level of credibility for each of the visualization credibility criteria.
US09665664B2	DFA-NFA hybrid Disclosed is a hybrid architecture combining DFA and NFA based engines. The DFA engine and NFA engine scan the same input stream. The DFA engine may be a multi-threaded engine. Fragments of rules are assigned to the DFA engine and portions of rules are assigned to the NFA engine. Fragments matched by the DFA engine may be sorted by a sorter into NFA launch positions before activating NFA states. A dynamically reconfigurable NFA cell array may be used. An NFA state signaled by a DFA fragment match is loaded into NFA cell(s). The DFA fragments may be adjacent to start state positions or following high-branching NFA states. Look-around assertions may be used by the DFA to signal to the NFA to either prevent or permit continued matching of a rule.
US09665660B2	Logical data flow mapping rules for (sub) graph isomorphism in a cluster computing environment A system and a method are disclosed for transforming cluster computing resources of a target system to match a user defined logical data flow so data processing between the source and target are functionally equivalent. The source logical dataflow is compatibly mapped to a target directed acyclic graph that represents the cluster computing resources. A series of subgraph assertion and transform operations are applied iteratively until the logical data flow is isomorphic with a directed acyclic graph. The assertion and transform operations are comprised of rules and assertions, which are maintained in a rules registry.
US09665659B1	System and method for website experimentation A data processing system comprises web page generation logic and website experimentation logic. The web page generation logic is configured to generate web pages to be provided to visitors of a website. The website experimentation logic is coupled to the web page generation logic. The website experimentation logic is configured to detect a change in the manner in which the web page generation logic generates one or more of the web pages and to assess how the change impacts visitor interactions with the website.
US09665655B2	Cloud-based system for reading of decodable indicia A data decoding system can comprise one or more computers communicatively coupled to a network. The computers can execute at least one decoding process. The decoding process can be configured, responsive to receiving a decoding request comprising an image of decodable indicia, to locate the decodable indicia within the image, and to decode the decodable indicia into a decoded message. The decoding process can be further configured, responsive to completing a decoding operation, to transmit to the client the decoded message and/or the decoding operation completion code.
US09665653B2	Presentation of contextual information in a co-browsing environment Embodiments described herein provide systems and methods for presenting contextual information in a co-browsing environment. In a particular embodiment, a method provides receiving an instruction in a co-browsing server to initiate a co-browsing session for a website with a first client and a second client. The method further provides determining contextual information related to a user of the first client and the website. The method further provides presenting the website at the first client and presenting the website at the second client, wherein an indication of the contextual information is overlaid on the website at the second client.
US09665650B1	In-context searching A system limits search results based on context information. The system obtains the context information and a search query, and obtains a set of references to documents in response to the search query. The system then filters the set of references based on the context information and presents the filtered set of references to a user.
US09665649B2	Contextual help article provider Techniques are described for displaying help articles, for a web page, that are related to the context of the web page. A help article provider has access to a database of help articles, each of which are associated with target-context data that may include content identifiers for the help article and/or user profile attributes for users that the help article targets. The help article provider identifies content identifiers for a viewed web page based on one or more of: metadata and a URL for the web page. The help article provider searches the help article database using the identified content identifiers. The help article provider may filter the help articles based on an authenticated user's attributes. An ordered list of the identified help articles is displayed, with the most relevant or important help articles displayed at or near the top of the list.
US09665646B1	Method and system for providing bit rate adaptaion to video files having metadata The technique for the delivery of a media file is adjusted based on current constraints on a channel being used by a device requesting the media file. The media file is copied and the various copies are optimized for different constraints. Then, the media file is delivered by examining the current constraints on the channel and transmitting the media data from the copy of the media file that is most suitable for the current constraints. In some implementations, the constraint is the bandwidth of the channel and the copies of the media file are based on different bit rate adjustments.
US09665645B2	System for managing an avionic communications log A system for managing a communications log of audio data transmissions received and/or transmitted by an ownship aircraft includes a display screen, a memory operable to store audio signals and data associated with audio data transmissions, and a processor coupled to the display screen and to the memory. The processor determines the transmission frequency and time of receiving each received audio data transmission and creates a plurality of discrete display messages that include text identifying the determined frequency and time of receiving each received audio data transmission. The processor causes the discrete display messages to be displayed on the display, where they are selectable for playback by a user. Once selected, the processor generates an audio reproduction of the stored audio signals associated with the selected discrete display messages.
US09665643B2	Knowledge-based entity detection and disambiguation An entity-based search system is described herein that detects and recognizes entities in Internet-based content and uses this recognition to organize search results. The system associates one or more entity identifiers with a web page and stores this information as metadata of the page in a search engine index. This metadata will enable entity-based queries as well as rich data presentations in a search engine result page (SERP), including grouping results by entities, filtering results by one or more particular entities, or re-ranking search results based on user preference of entities. Thus, the entity-based search system allows users to identify a particular entity the user is interested in finding, and to receive search results directly related to that entity.
US09665641B1	System, methods, and user interface for automated job search System, methods, and user interface for searching documents related to resumes or job descriptions as a special type of unstructured data are disclosed. The methods automatically transform a source document such as a resume or job description into a search query, and retrieve target documents matching the most important contents in the source document without requiring the user to open and read the source document and write a query. The methods identify the most representative attributes in such documents based on grammatical, semantic, and contextual information contained in the documents for producing more relevant search results than manually-constructed search queries.
US09665640B2	System and method for collapsing search results A system and method for collapsing search results. User input is received to perform a search of a communications network. The search results and multiple selection elements are displayed for removing each of the search results. A user selection of a selection element associated with a search result is received. A determination is made of irrelevant results that are similar to the search result. The search results are collapsed to remove the search result and the irrelevant search results.
US09665638B2	Systems and methods for secure storage of user information in a user profile Systems and methods are provided for securely storing information of a user in a user profile to prevent access to the information and minimize the amount of information disclosed during a security breach. Information pertaining to a user is obtained from one or more sources and organized into a user profile and securely stored in a database. The user profile can be stored remotely in a cloud-based system at a remote encrypted server, with portions of the profile stored in separate locations with separate encryption to minimize the risk of unauthorized access to one portion of the information. The fields of data in the user profile can also be separately encrypted with separate encryption keys and separately stored in separate databases to minimize the amount of information which could be disclosed by the unauthorized access to a single encryption key or a single database.
US09665634B2	Advanced database systems and methods for use in a multi-tenant system Large-scale advanced database models, systems, and methods provide a responsive, scalable data storage solution which is ripe for use in data warehousing and analytics environments. These advanced database models, systems, and methods provide for dramatically increased performance in accessing data as well as increased storage capabilities in the data set.
US09665632B2	Managing activities over time in an activity graph Systems and processes for managing a data warehouse using an activity graph are disclosed. One example process may include selectively tracking new versions of an entity based on a tracking type, removing entities based on data retention rules, removing entities based on data decay rules, and summarizing decayed data.
US09665630B1	Techniques for providing storage hints for use in connection with data movement optimizations Described are techniques for providing hints. Activity data for data portions is received. For each data portion, activity data is aggregated for each of a plurality of time periods and a value for a metric is determined for the data portion in accordance with the aggregated activity data. The values for the metric are ranked. A set of one or more data portions are identified based on the ranked metric values. Hint generation processing is performed to generate a hint for each data portion in said set. The hint may be used in connection with performing data storage movement optimizations to move selected data portions between different storage tiers having different performance classifications. The metric may be determined using one or more criteria including standard deviation, entropy and/or a maximum probability for a time period having the largest portion of I/O wait time for a data portion.
US09665629B2	Media device and user interface for selecting media A media device and user interface for selecting media. In one embodiment, the media is selected based upon a desired relationship measure between at least two media files. In another embodiment, the media is selected based upon a skip command control functions.
US09665626B1	Sorted merge of streaming data A method for sorting and merging data from at least two sources may include providing a multi-state merge of queues from a first input queue and a second input queue to a merged output, responsive to states of the first and second input queues, setting the state of the first input queue; preventing merging of the first input queue with the non-empty second input queue while the state of the first input queue is empty waiting; and merging the first input queue with the non-empty second input queue responsive to the state of the first input queue being active or ignore, or the wait duration time being exceeded, or in response to a startup command.
US09665622B2	Publishing product information The present disclosure provides a method and an apparatus for publishing product information. The present disclosure provides a method for publishing product information. Based on a stored search click log of buyers, correlation information between inquiry words and categories in the search click log is calculated. A keyword input by the seller is matched to the inquiry words. The keyword may be a word or a phrase that includes one or more words. If the keyword is matched to at least one inquiry word, at least one category corresponding to the matched inquiry word is obtained based on the correlation information. The product information is stored under one or more categories of the obtained categories. The present techniques improve the accuracy rate of recommended categories to the seller and the return rate of the published product information.
US09665621B1	Accelerated query execution within a storage array A data storage system comprises a storage array and an associated indexer that may be implemented in whole or in part within the storage array. The storage array comprises storage devices and a controller. The indexer associated with the storage array is configured to generate indexes over data stored in the storage array. The controller comprises a query processing control point configured to utilize the indexes generated by the indexer to accelerate execution of queries directed to the data stored in the storage array. The indexes may be stored in a high-speed memory of the storage array, such as flash memory. The queries executed in the storage array may comprise analytic queries that would otherwise normally be executed in an analytic data store external to the storage array. By providing index-based processing of the queries within the storage array, query processing throughput of the data storage system is substantially improved.
US09665620B2	Managing data queries One method includes receiving a database query, receiving information about a database table in data storage populated with data elements, producing a structural representation of the database table that includes a formatted data organization reflective of the database table and is absent the data elements of the database table, and providing the structural representation and the database query to a plan generator capable of producing a query plan representing operations for executing the database query on the database table. Another method includes receiving a query plan from a plan generator, the plan representing operations for executing a database query on a database table, and producing a dataflow graph from the query plan, wherein the dataflow graph includes at least one node that represents at least one operation represented by the query plan, and includes at least one link that represents at least one dataflow associated with the query plan.
US09665619B1	Optimizing database queries using subquery composition A database system optimizes database queries that comprise subqueries. The database system factors out computation from two or more subqueries to a reusable subquery. The reusable subquery returns a result set. The subqueries are rewritten to use the result set and the database query modified to use the rewritten subqueries. The modified database query performs efficiently since the result set is computed only once for each subquery that uses the reusable query. The database system also composes nested subqueries that compute aggregate values. The database system identifies an inner subquery nested within an outer subquery, each subquery computing an aggregate value. The database system determines a new aggregate function corresponding to a composition of aggregate functions of the inner and the outer queries. The database system determines a composed query using the inner query with the outer query. The composed query uses the new aggregate function.
US09665618B2	Information retrieval from a database system A processor-implemented method retrieves information from a database system. A data query, which includes a specification of information to be retrieved from the database system, is generated. A first parameter specifying a condition to be met by the retrieved information is defined. A second parameter specifying one or more data reduction operations to be executed if the condition defined by the first parameter is not met is defined. The generated data query and the first and second parameters are then transmitted to the database system.
US09665616B2	Method and system for providing media recommendations A system, method and user interface for providing media or content recommendations are provided. More specifically, the system, method and user interface provide media recommendations including enabling a user to select a first media object, the first media object having a first set of characteristics, enabling the user to select a second media object, the second media object having a second set of characteristics, and recommending a plurality of additional media objects, each of the plurality of additional media objects having at least one characteristic in common with the first set of characteristics and at least one characteristic in common with the second set of characteristics.
US09665613B2	Determining linkage metadata of content of a target document to source documents Provided are to a computer program product, system, and method for determining linkage metadata of content of a target document to source documents. In response to a determination that a target fragment in a target document matches a source fragment in a source document, linkage metadata is generated for the target fragment
US09665611B2	Techniques for aligned run-length encoding Techniques for Aligned Run-Length Encoding (ARLE) are described. ARLE is an encoding scheme that transforms sets of same-valued consecutive rows into one or more runs, while enforcing boundaries between the runs at set intervals (e.g. every predetermined number of rows). Consecutive rows that contain the same value, but which cross one or more interval boundaries, are encoded as multiple runs that are divided along those interval boundaries. According to one technique, a database server accelerates query processing by setting the interval size to the word size of the processor performing the predicate comparisons. According to another technique, a database server accelerates row lookup by maintaining an offset array that stores the run offsets into the ARLE data of the run that begins each interval.
US09665610B2	Reducing digest storage consumption by tracking similarity elements in a data deduplication system For reducing digests storage consumption in a data deduplication system using a processor device in a computing environment, input data is partitioned into chunks, and the chunks are grouped into chunk sets. Digests are calculated for input data and stored in sets corresponding to the chunk sets. Similarity elements are calculated for the input data and the similarity elements are stored in a similarity search structure, and the number of similarity elements associated with a chunk set which are currently contained in the similarity search structure is maintained for each chunk set.
US09665609B2	Garbage collection of multi-version concurrency control (MVCC) data blocks Disclosed herein are system, method, and computer program product embodiments for performing garbage collection in a database management system with a multi-version concurrency control. An embodiment operate by qualifying a multi-version concurrency control (MVCC) block for garbage collection, where the MVCC block includes multiple cells, each cell corresponding to a row of a table that was acted on by a transaction. Determining that the MVCC block can be garbage collected based on MVCC information in the MVCC block, where the MVCC information includes information that determines whether changes made to rows in the multiple cells are visible in a database management system. Based on the determining, garbage collecting the MVCC block.
US09665607B2	Methods and apparatus for organizing data in a database Disclosed are methods and apparatus for organizing data in a database in a set-oriented manner. Data is organized by linking data in the form of key-value pairs stored in storage media of the database to corresponding key-value pair identifiers. A set having a corresponding set identifier is then associated with one or more of the key-value pair identifiers where the set includes the stored key-value pairs linked to the key-value pair identifiers.
US09665606B2	Edge-based recognition, systems and methods Edge-based recognition systems and methods are presented. Edges of the object are identified from the image data based on co-circularity of edgels, and edge-based descriptors are constructed based on the identified edges. The edge-based descriptors along with additional perception metrics are used to obtain a list of candidate objects matched with the edge-based descriptors. Through various filtering processes and verification processes, false positive candidate objects are further removed from the list to determine the final candidate object.
US09665605B2	Methods and apparatus for building a search index for a database Methods and apparatus for building a search index for a database are disclosed. When an incremental build trigger is detected (e.g., a threshold number of documents are added to database), the system determines which sub-indexes need to be updated and which sub-indexes do not need to be updated. Rather than update the affected sub-indexes directly, the system builds new sub-indexes to replace the affected sub-indexes. Database queries that occur during the generation of the replacement sub-indexes use the old sub-indexes. When the new sub-indexes are ready, the system moves pointers from the old sub-indexes to the new sub-indexes so that subsequent database queries use the new sub-indexes.
US09665602B1	System, method, and computer program for migrating interdependent data objects from a first device to a second device A system, method, and computer program product are provided for migrating interdependent data objects from a first device to a second device. In use, at least one first data object to be migrated from a first device to a second device associated with a target code is received. Further, it is determined that the second device associated with the target code requires at least one second data object to be present at least one of before the at least one first data object or at a same time as the at least one first data object. Additionally, the at least one first data object to be migrated from the first device to the second device associated with the target code is stored in a cache. Furthermore, an interdependency event associated with the at least one first data object and the at least one second data object is detected. In response to detecting the interdependency event, the at least one second data object to be migrated from the first device to the second device associated with the target code is received. Moreover, the at least one first data object and the at least one second data object are automatically sent to the second device associated with the target code, in response to receiving the at least one second data object.
US09665601B1	Using a member attribute to perform a database operation on a computing device A computing device configured for using a member attribute to perform a database operation is described. The computing device includes a processor and instructions stored in memory. The computing device generates an object based on a class with a member. The member has an associated attribute that indicates a database mapping. The computing device also performs a database operation based on the attribute.
US09665599B2	Maintaining database consistency when nearing the end of a database recovery log Log records are generated by a computer system and stored in a computer readable storage area for recording changes to database objects responsive to receiving transaction requests, wherein the locators for the log records are of a predetermined maximum size that provides a maximum trackable size limit of the storage area. A computer system estimates an amount of time for the storing of the generated log records to fill the storage area up to the maximum trackable size limit. A computer system sets a soft limit to the storage area that is smaller than the maximum trackable size limit, including setting the soft limit based on the estimated amount of time.
US09665597B2	Method and system for processing images using time and location filters A device may process images (e.g. sort, group, file, e-mail, etc.) using various filters. The filters may relate to non-image data in the image files to be processed. The filters may include time and location filters.
US09665594B2	Local backup Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing data. In one aspect, a method includes detecting at a kernel a plurality of operations, each of a particular type from a plurality of types, to be performed on a respective data item; and generating respective entries in a delta store in response to the detected plurality of operations wherein each entry for a data item includes a marker attribute corresponding to the operation type of the plurality of types.
US09665591B2	High availability distributed deduplicated storage system A high availability distributed, deduplicated storage system according to certain embodiments is arranged to include multiple deduplication database media agents. The deduplication database media agents store signatures of data blocks stored in secondary storage. In addition, the deduplication database media agents are configured as failover deduplication database media agents in the event that one of the deduplication database media agents becomes unavailable.
US09665588B2	Query-based notification architecture A data repository monitoring system that utilizes queries to generate notifications in response to the identification of new and changed content. The system includes a monitoring component that monitors a plurality of disparate repositories in order to identify the receipt of new or modified content. The monitoring component includes a query component(s) that identifies metadata of imported content. The query can be generated and communicated to the monitoring component via a graphical user interface. A notification component is also provided to generate a prompt upon the receipt of incoming content as identified by the query component. The invention employs a centralized store (e.g., change queue) that maintains metadata corresponding to imported (e.g., new) metadata.
US09665581B1	Managing file system checking A method is used in managing file system checking. A logical space is created from a set of cylinder groups. The logical space includes respective unused blocks in each cylinder group of the set of cylinder groups. Each cylinder group of the set of cylinder groups is configured to store metadata and data of a file system. Information required to perform file system checking on the file system is stored in the logical space. File system checking is performed on the file system.
US09665580B1	Synchronization of data Synchronizing data is disclosed, including: generating a snapshot index associated with a first set of data; generating a set of difference data between a snapshot index associated with a second set of data and the snapshot index associated with the first set of data; and applying the set of difference data to a set of metadata associated with the first set of data, wherein the set of metadata reflects a current state of the first set of data.
US09665578B2	Assimilation of foreign logical units in a network storage controller A method of making a foreign law in usable in a network storage controller includes transparently converting the foreign logical unit to the native format of the file system in place, by progressively increasing the binding between the file system of the storage controller and the foreign logical unit, while the foreign logical unit remains online, without requiring copying of the foreign logical unit.
US09665573B2	Parallelization of electronic discovery document indexing A system and method for parallelizing document indexing in a data processing system. The data processing system includes a primary processor for receiving a list of data having embedded data associated therewith, at least one secondary processor to process the data as provided by the primary processor, a data processor to determine a characteristic of the embedded data and process the embedded data based upon the characteristic, and a messaging module to exchange at least one status message between the primary processor and the at least one secondary processor.
US09665569B2	Contextual, focus-based translation for broadcast automation software Contextual, focus-based language translation within a broadcast radio automation software application allows the user interface to enable interaction with users having various written or graphical language requirements. The software does not require special training or learning to enable the translation of text within the application. When the user enters a translation mode and selects a text string in the original language, the program displays a corresponding text string in a second language based on the specific display area, e.g., child window. The translated text string can be displayed proximate to original first text string within the specific display area, and can further be displayed as an entry in a table of a translation window which also displays additional text strings in the second language corresponding to additional text string fields for the specific display area.
US09665564B2	Natural language processing utilizing logical tree structures Mechanisms are provided for processing logical relationships in natural language content. Natural language content is received, upon which a reasoning operation is to be performed. A first parse representation of the natural language content is generated, by a parser, by performing natural language processing on the natural language content. A logical parse of the first parse is generated by identifying latent logical operators within the first parse indicative of logical relationships between elements of the natural language content. A reasoning operation on the logical parse is executed to generate a knowledge output indicative of knowledge associated with one or more of the logical relationships between elements of the natural language content.
US09665563B2	Animation system and methods for generating animation based on text-based data and user information Animation devices and a method that may output text-based data as an animation, are provided. The device may be a terminal, such as a mobile phone, a computer, and the like. The animation device may extract one or more emotions corresponding to a result obtained by analyzing text-based data. The emotion may be based on user relationship information managed by a user of the device. The device may select an action corresponding to the emotion from a reference database, and combine the text-based data with the emotion and action to generate an animation script. The device may generate a graphic in which a character is moved based on the action information, the emotion information, and the text-based data.
US09665553B1	Techniques for determining a location of user interaction within a table of a web page A computer-implemented technique includes receiving, at a computing device including one or more processors, a source document for a web page from a server, the source document including program code and information representing a table of the web page. The technique includes determining a range of pixel positions for each header cell element of the table, wherein the header cell elements represent cells of a top row of the table. The technique includes receiving input from a user, the input indicating an interaction by the user at a position within the table of the web page. The technique includes selecting a column of the table based on the position of the user interaction and the ranges of pixel positions to obtain a selected column. The technique also includes executing a portion of the program code associated with the selected column.
US09665552B2	Form layout method and system A form layout system includes a form layout tool that provides a flexible way to lay out forms on a web page. The form layout tool configures a web configuration file with the location of form layout styles, and uses the form layout styles, a number of columns, a number of fields, and a “size” of each field to include in the component of a page layout to create a page layout for a target application. The form layout tool generates a revised application page with the created page layout by applying the form layout style to the created page layout.
US09665546B1	Real-time web service reconfiguration and content correction by detecting in invalid bytes in a character string and inserting a missing byte in a double byte character Real-time web service reconfiguration and content correction is provided. A web browser receives one or more webpages, each webpage including one or more frames. The received webpages are saved from the web content buffer to a temporary work area. The profile settings in a web browser profile are compared to the respective settings in the saved webpages. The web browser profile settings include lang, script and charset. Differences between the web browser profile and the settings in the saved webpages are detected and corrected to use the preferred setting from the web browser profile.
US09665542B2	Determining median value of an array on vector SIMD architectures A method for determining a median value of an array of pixels in a vision system may be performed in an efficient manner using the parallel computing capabilities of a SIMD processing engine. Each column of an array may be sorted in ascending (descending) order to form a first sorted array. Each row of the first sorted array may be sorted in ascending (descending) order to form a second sorted array. A pixel may be selected as the median value from a diagonal portion of the second sorted array, wherein the diagonal portion bisects a lower value region and a higher value region of the second sorted array.
US09665538B2	Solving satisfiability problems through search One embodiment of a method for solving an input satisfiability instance includes searching a database for a stored satisfiability instance that matches the input satisfiability instance and outputting a solution to the input satisfiability instance. One embodiment of method for converting an input satisfiability instance into a standardized representation includes applying a plurality of syntactical simplification rules to the input satisfiability instance until no conditions of any of the plurality of syntactical simplification rules can be met, thereby producing a simplified instance, uniformly replacing each variable in the simplified instance with a unique, consecutively chosen even number, annotating each literal in the simplified instance to indicate whether the each literal is positive or negative, ordering all literals in the simplified instance, and ordering all clauses in the simplified instance to produce the standardized representation.
US09665537B2	Method for generating a fractured reservoir mesh with a limited number of nodes in the matrix medium The invention is a method for optimizing the development of a fluid reservoir using a fractured medium mesh generated from a first-order balanced octree technique is disclosed. A mesh of a discrete fracture network generated by defining a set of cells for each fracture and then a mesh of the matrix medium is generated by dividing each cell by an octree technique, wherein a cell is divided into eight cells. The transmissivities between the cells of the fracture mesh, transmissivities between the cells of the matrix medium mesh and transmissivities between cells of the fracture mesh and cells of the matrix medium mesh are then determined. Finally, the cells and the transmissivities are used for generating an image of the fluid reservoir from which the development of the fluid reservoir is optimized.
US09665535B1	System and method for utilizing mobile configuration services In one embodiment, a system includes a memory, an interface configured to communicate with a network and a processor configured to receive, from a first source on the network, an unconfigured application. The processor may be further configured to send a first request to the second source for configuration parameters associated with the unconfigured application and receive, from the second source in response to the request, a first set of configuration parameters. The processor may also be configured to configure the unconfigured application using the first set of configuration parameters.
US09665533B2	Blob pools, selectors, and command set implemented within a memory appliance for accessing memory A memory appliance system is described and includes a plurality of memory devices storing data in a plurality of containers and a controller. The containers include metadata, relationship information associating a respective container with related containers, and a payload. The controller is configured to perform data operations on the payload of one of the containers, and based on the relationship information associating the respective container with related containers and the payload of related containers.
US09665532B2	Performing synchronized collective operations over multiple process groups Methods and arrangements for performing synchronized collective operations. Communication calls are accepted from at least two distinct processor groups. Edge disjoint spanning paths are created over a collective comprising the processor groups, and the spanning paths are assigned to the processor groups to facilitate communication within each processor group.
US09665529B1	Relative progress and event indicators A user's progress through a digital work may be presented using a progress gauge. One or more content dividers may be presented dividing the progress gauge into segments. Each segment of the progress gauge may correspond to a section of the digital work, and may visually represent an amount of content in the corresponding section of the digital work, relative to other sections of the digital work. A collection of digital works available for access by a computing device may be displayed. A progress gauge may be presented in association with one or more of the digital works in the collection of available digital works.
US09665528B2	Bus serialization for devices without multi-device support A serial bus is provided with a device (sometimes herein referred to as an I2C serializer device) including circuitry and machine logic that operates as follows: when one of the master devices is using the bus for data communication, then the other master(s) will receive a wait signal until the bus becomes available again. This wait signal allows the master devices to wait as a “hardware response,” rather than requiring the master devices to be equipped with software and/or firmware to control the operation of waiting until the serial bus is available. In some embodiments, the use of the I2C serializer device allows a bus operating under a bus serialization protocol (for example, I2C) to be simultaneously connected to multiple master devices even in the case that one, or more, master device(s) do not include any currently conventional form of multi-master support.
US09665521B2	System and method for providing a processing node with input/output functionality by an I/O complex switch A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces.
US09665520B2	Motherboard and computer control system including the same The disclosure provides a motherboard including a first communication interface and a switch module. The first communication interface obtains a power signal from a second communication interface of a display, the switch module obtains the power signal, and the switch module controls a first power supply to power supply for the USB communication module. The disclosure also provides a computer control system including the motherboard. The motherboard and the computer control system control the computer to save energy via a display.
US09665518B2	Methods and systems for controlling ordered write transactions to multiple devices using switch point networks Ordered write transactions from requester devices to multiple target devices are controlled using switch point networks. The requester device and the multiple target devices for the write transactions are coupled to a network of interconnected switch points. Write requests are generated for a plurality of parcels associated with a block of data to be written. The write requests have a particular order associated with an order in which the parcels are to be written, and these write requests are provided to the switch point interconnection network in the particular order. At least one of the switch points is then used to control the flow of write requests to the multiple target devices such that the particular order is maintained. In one embodiment, the target devices are memory devices, and the particular order is based upon the AXI (Advanced eXtensible Interface) protocol.
US09665517B1	Multipath I/O in a computer system Multipath I/O in a computer system includes: receiving asynchronously, for a single I/O operation by a memory controller from a plurality of I/O adapters, a request to access a memory page, where each request to access the memory page includes an adapter-specific tag; and for each request received by the memory controller: determining, by the memory controller, whether an adapter-specific tag has been assigned to the memory page; if an adapter-specific tag has not been assigned to the memory page: assigning, by the memory controller, the received adapter-specific tag to the memory page; and allowing, by the memory controller, access to the memory page; and if an adapter-specific tag has been assigned to the memory page, granting access to the memory page only when the received adapter-specific tag is the adapter-specific tag assigned to the memory page.
US09665516B2	Computer and method to realize the coupling between computers The present invention provides a computer and a method to realize the coupling between computers. The computer includes: a first interface used to connect with a second computer; a data interactive module, connected with the second computer through the first interface, which is used to enable the second computer to access the data interactive module when the first interface is connected with the second computer, in which the access includes fetching data from the data interactive module and storing data in the data interactive module; a processing module connected with the data interactive module, which is used to communicate data to the second computer through the data interactive module when the first interface is connected with the second computer. It can conveniently utilize two computers to form a hybrid computer system using this technical solution.
US09665515B2	Bus arbitration apparatus provided to a bus connected to a plurality of bus masters, bus arbitration method, and computer-readable storage medium A bus arbiter (101) is provided to a bus (107). The bus (107) is connected to a plurality of bus masters, such as a CPU (410) and a serial I/F (413), to each of which a priority is given. The bus arbiter (101) changes the priorities of the plurality of bus masters at cycles determined in advance. The bus arbiter (101) receives a request signal for making a request for use of the bus (107) from at least one bus master. Based on the priorities of the respective bus masters at a time when the request signal is received, the bus arbiter (101) identifies one bus master given the highest priority among the at least one bus master that has transmitted the request signal. The bus arbiter (101) transmits a grant signal for permitting the use of the bus (107) to the identified one bus master.
US09665511B2	Method, upper computer and system for programming nodes in a bus network A method, an upper computer and a system for programming nodes in a bus network are provided. The method comprises: analyzing a program file to be programmed to obtain data of the program file and a storage address corresponding to the data; broadcasting a routing request message and receiving responding messages returned from a plurality of lower computers, each lower computer corresponding to one node in the bus network; analyzing the responding messages to obtain an operating state of each node among the plurality of layers of nodes; receiving a selected node to be programmed, activating the selected node and transmitting the data and the storage address to a single chip microcomputer corresponding to the selected node when the operating state of each node is a forwarding state; and storing corresponding to the selected node the data in a memory of the single chip microcomputer according to the storage address.
US09665510B2	Synchronous bus architecture for digital pre-distortion system A system for storing pre-distorted output samples in a memory includes a sample counter, a programming interface module, and a comparator. The sample counter counts the pre-distorted output samples, generates a dynamic count value, receives a capture counter status signal, and generates a first count value. The programming interface module receives and outputs the first count value, an offset value, and a capture control signal, and generates a first interrupt signal. The comparator receives the first count value, the offset value, the dynamic count value, and the capture control signal, generates a final value, compares the final value with the dynamic count value, and generates a trigger signal when the final value equals the dynamic count value based on the capture control signal. The trigger signal initiates the storing of the pre-distorted output samples in the memory.
US09665506B2	Apparatus and method for processing data A data processing device includes a controller. The controller includes a compression circuit configured to compare a plurality of data groups, each of which has a first burst length and is transmitted in units of an input/output width, with a predetermined pattern, and perform data compression on the data groups based on a result of comparison. The controller further includes a compression data restructuring circuit configured to generate a transmission data group by restructuring the compressed data group to have a second burst length.
US09665505B2	Managing buffered communication between sockets A motherboard includes multiple sockets, each socket configured to accept an integrated circuit. A first integrated circuit in a first socket includes one or more cores and at least one buffer. A second integrated circuit in a second socket includes one or more cores and at least one buffer. Communication circuitry transfers messages to buffers of integrated circuits coupled to different sockets. A first core on the first integrated circuit is configured to send messages corresponding to multiple types of instructions to a second core on the second integrated circuit through the communication circuitry. The buffer of the second integrated circuit is large enough to store a maximum number of instructions of a second type that are allowed to be outstanding from cores on the first integrated circuit at the same time, and still have enough storage space for one or more instructions of a first type.
US09665503B2	Efficient packet handling, redirection, and inspection using offload processors A packet handling system is disclosed that can include at least one main processor; a plurality of offload processors connected to a memory bus and configured to provide security related services on packets prior to redirection to the main processor; and a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, the virtual switch configured to receive memory read/write data over the memory bus.
US09665500B2	System supporting multiple partitions with differing translation formats A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may include partitions that use a single level of translation and those that use a nested level of translation. Further, differing types of translation structures may be used. The different partitions are supported by a single hypervisor.
US09665499B2	System supporting multiple partitions with differing translation formats A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may include partitions that use a single level of translation and those that use a nested level of translation. Further, differing types of translation structures may be used. The different partitions are supported by a single hypervisor.
US09665495B2	Methods and systems for throttling writes to a caching device in response to read misses A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a time period that justifies its storage in the cache, compressing data prior to its storage in the cache, precluding storage of sequentially-accessed data in the cache, and/or throttling storage of data to the cache within predetermined write periods and/or according to user instruction.
US09665494B2	Parallel lookup in first and second value stores A data processing apparatus includes a cache memory supporting parallel data loads involving both a first address and a second address. The first address is compared with TAG values stored within a first value store and the second address is compared in parallel with TAG values stored within a second value store. The second value store contains a proper subset of the data value stored within the first value store.
US09665493B2	Increased cache performance with multi-level queues of complete tracks Exemplary method, system, and computer program product embodiments for increased cache performance using multi-level queues by a processor device. The method includes distributing to each one of a plurality of central processing units (CPUs) workload operations for creating complete tracks from partial tracks, creating sub-queues of the complete tracks for distributing to each one of the CPUs, and creating demote scan tasks based on workload of the CPUs. Additional system and computer program product embodiments are disclosed and provide related advantages.
US09665492B2	Fuzzy counters for NVS to reduce lock contention A system for data management in a computing storage environment includes a processor device, operable in the computing storage environment, that divides a plurality of counters tracking write and discard storage operations through Non Volatile Storage (NVS) space into first, accurate, and second, fuzzy, groups where the first, accurate, group is one of updated on a per operation basis, while the second, fuzzy, group is one of updated on a more infrequent basis as compared to the first, accurate group.
US09665489B2	Methods of selecting available cache in multiple cluster system Aspects include computing devices, systems, and methods for implementing selecting an available shared cache memory as a victim cache. The computing device may identify a remote shared cache memory with available shared cache memory space for use as the victim cache. To select the appropriate available shared cache memory, the computing device may retrieve data for the identified remote shared cache memory or a processor cluster associated with the identified remote shared cache memory relating to a metric, such as performance speed, efficiency, or effective victim cache size. Using the retrieved data, the computing device may determine the identified remote shared cache memory to use as the victim cache and select the determined remote shared cache memory to use as the victim cache.
US09665488B2	Technique to share information among different cache coherency domains A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency rules pertaining to the graphics device.
US09665487B1	Intelligent snapshot point-in-time management in object storage An application is used, by a processor, to provide directives to a tiered data object storage environment for manipulating and managing stored data objects by using an existing policy developed by a history of directives to intelligently estimate which of the data objects are to be migrated between a higher storage tier and a lower storage tier and at what appropriate time, while refraining from migrating data objects with a pending management operation.
US09665486B2	Hierarchical cache structure and handling thereof A hierarchical cache structure comprises at least one higher level cache comprising a unified cache array for data and instructions and at least two lower level caches, each split in an instruction cache and a data cache. An instruction cache and a data cache of a split second level cache are connected to a third level cache; and an instruction cache of a split first level cache is connected to the instruction cache of the split second level cache, and a data cache of the split first level cache is connected to the instruction cache and the data cache of the split second level cache.
US09665478B2	Zone boundary adjustments for defects in non-volatile memories A non-volatile memory is divided into logical zones by the card controller in order reduce the size of the data structures it uses for address translation. Zone boundaries are adjusted to accommodate defects allowed by memory test to improve card yields and to adjust boundaries in the field to extend the usable lifetime of the card. Firmware scans for the presence of defective blocks on the card. Once the locations of these blocks are known, the firmware calculates the zone boundaries in such a way that good blocks are equally distributed among the zones. Since the number of good blocks meets the card test criteria by the memory test criteria, defects will reduce card yield fallout. The controller can perform dynamic boundary adjustments. When defects occur, the controller can perform the analysis again and, if needed, redistributes the zone boundaries, moving any user data.
US09665477B2	Allocating additional requested storage space for a data set in a first managed space in a second managed space Provided are a computer program product, system, and method for allocating additional requested storage space for a data set in a first managed space in a second managed space. A request for additional storage space is received for a requested data set stored in a first managed space in the storage. A revised amount of storage space for the requested data set comprises at least an amount of space currently allocated to the requested data set in the first managed space and the requested additional storage space. If the revised amount of storage space exceeds a value, then allocation is made of the revised amount of storage space in allocated storage space in a second managed space of the storage. The data set is stored in the allocated storage space in the second managed space.
US09665475B2	Application experiment system Examples of an application experiment system are provided that can manage and run experiments for software applications. In one embodiment, the application experiment system receives definitions for experiments and treatments for an application, runs experiments in response to requests from users of the system, automatically allocates treatments to users of the application, logs experiment data and treatment allocation data, and/or reports experiment results data. The application experiment system enables application developers to test changes or features in a precise, controlled environment on a limited user base before deciding whether to deploy changes or features to all users of an application.
US09665473B2	Smart tester application for testing other applications A device may be configured to receive, from a first device, first test scripts for testing an application. The first test scripts may include information for reproducing interactions with the application on the first device. The device may generate second test scripts, for testing the application on a second device, that reproduce the interactions with the application on the second device. The second test scripts may be generated based on the first test scripts and mapping information that maps resources of the first device to resources of the second device. The first device and the second device may be different device types. The device may provide the second test scripts to the second device. The device may receive and store test results of executing the second test scripts on the second device that indicate results of reproducing the interactions on the second device.
US09665471B1	Program code interface for providing program code and corresponding results of evaluating the program code A device may receive an indication to evaluate a first portion of program code and a second portion of program code provided in a first section of a user interface. The device may evaluate the first portion of program code and the second portion of program code. The device may generate a first result corresponding to the first portion of program code and may generate a second result corresponding to the second portion of program code based on evaluating the first portion of program code and the second portion of program code. The device may provide the first result and the second result in a second section of the user interface. The second section may be separate from the first section. The device may provide a correspondence indicator that indicates a correspondence between the first result and the first portion of program code.
US09665467B2	Error and solution tracking in a software development environment In an approach for error and solution tracking a processor identifies that a first occurrence of a first error is present in code. A processor tracks a first set of actions made to the code which affect the first occurrence of the first error. A processor determines that the first occurrence of the first error has been resolved. A processor records the first error and the first set of actions to the code. A processor identifies that a second occurrence of the first error is present in the code. A processor determines that the first error has previously occurred. A processor retrieves the first set of actions. A processor causes the first set of actions to be made to the code to affect the second occurrence of the first error.
US09665462B2	Apparatuses and methods for arbitrating a shared terminal for calibration of an impedance termination An arbitration system and method is disclosed. The apparatus includes first and second memory devices, and a resistor coupled in common to the first and second memory devices, the first memory device including a first calibration circuit configured to perform, when activated, a first calibration operation based on the resistor and a first arbiter configured to activate the first calibration circuit responsive, at least in part, to an assertion of a first command or keep the first calibration circuit inactive irrespective of the assertion of the first command.
US09665460B2	Detection of abnormal resource usage in a data center A system for identifying abnormal resource usage in a data center is provided. In some embodiments, the system employs a prediction model for each of a plurality of resources and an abnormal resource usage criterion. For each of a plurality of resources of the data center, the system retrieves current resource usage data for a current time and past resource usage data for that resource. The system then extracts features from the past resource usage data for that resource, predicts using the prediction model for that resource usage data for the current time based on the extracted features, and determines an error between the predicted resource usage data and the current resource usage data. After determining the error data for the resources, the system determines whether errors satisfy the abnormal resource usage criterion. If so, the system indicates that an abnormal resource usage has occurred.
US09665459B2	Providing a user interface to enable selection of storage systems, components within storage systems and common performance metrics for generating performance metric reports across storage systems and components A storage system graphical user interface (GUI) renders indication of a plurality of selected storage systems. Selection is received of selected storage systems from the rendered indication of selected storage systems and a determination is made of performance metrics common to the selected storage systems. A performance metric GUI enabling selection of the determined performance metrics common to the selected storage systems is generated. In response to user selection of at least one selected performance metric of the determined performance metrics in the performance metric GUI, determination is made of performance metric values for the at least one of the selected performance metrics for the selected storage systems. A computer renderable visualization providing a visual comparison for each of the at least one selected performance metric of the determined performance metric values is generated for the selected storage systems.
US09665458B2	Method and system for providing information from third party applications to devices A method and system of making information from an application accessible to an electronic device, comprising: checking, via a log monitor, a third party log file for a new log entry; sending any new log entries in the third party log file to a rules engine, the rules engine comprising at least one rule; determining if any of the new log entries violate any rules in the rules engine; making accessible any new log entries that violate any rules to the electronic device; creating an alert based on the new log entry that violates at least one rule; and notifying users of the alert using alert criteria to determine who should receive the alerts and when, wherein different users receive different alerts based on the alert criteria.
US09665456B2	Apparatus and method for identifying a cause of an error occurring in a network connecting devices within an information processing apparatus An information processing apparatus includes a plurality of devices, each including a memory that stores link-status information indicating whether or not an error occurs in a link connected to the each device. When a first device among the plurality of devices fails to receive within a predetermined time period a response for a request that has been transmitted by the first device, the first device obtains the link-status information from relevant devices each related to at least one of transfer of the request and transfer of the response, and identifies a link in which the error has occurred or a device that is connected to the link, based on the obtained link-status information.
US09665451B2	Method and device for distributing holdup energy to memory arrays The various embodiments described herein include methods and/or devices used to protect data in a storage device. In one aspect, a method includes performing a power fail operation on a first section of the storage device, the first section of the storage device comprising one or more memory group modules. The power fail operation includes supplying power, via one or more energy storage devices, to the one or more memory group modules, where each memory group module includes a respective memory group module controller. The power fail operation also includes supplying power, via an additional energy storage device, to a storage device controller, the storage device controller corresponding to the first section of the storage device. The additional energy storage device is distinct from the one or more energy storage devices and each are distinct from a power source used during normal operation of the storage device.
US09665446B1	Fully distributed intelligent rebuild A globally distributed scan list is determined. A determination is made whether the first data replica in the first plurality of data stored on a first device is in sync with a second data replica in the second plurality of data on a second device. In response to determining that the first data replica is not in sync with the second data replica, the first data replica is added to an unsynced queue. The neighbor data of the first plurality of data is added to a suspect queue. The priority to check the neighbor data is increased if the neighbor data is already in the suspect queue. Unsynced neighbor data is added to the unsynced queue. The priority for recovery of the data in the unsynced queue is determined. The priority is based on the vulnerability of the data. A data replica in the unsynced queue is recovered.
US09665434B2	Communicating chunks between devices An apparatus, for connection to a storage device, comprising: a module for communication with a software application and operable to receive instructions to copy data to the storage device; a chunking and identifier generation module operable to receive the data, to process the data into one or more chunks, to generate a first chunk identifier, representative of the identity of a first of the or each chunk of data and, upon processing of the data, to initiate the issuance of a confirmation signal to the software application indicating that the data has been copied to the storage device; and an interface for communication with the storage device, wherein the interface is operable to send the first chunk identifier to the storage device, and to send the first chunk of data to the storage device upon receipt of a transfer instruction from the storage device.
US09665422B2	Information processing apparatus and method, and, program The present technique relates to an information processing apparatus and a method, and a program, capable of reducing a delay time. An information processing apparatus according to the present technique is an information processing apparatus including an estimation unit configured to estimate, on the basis of a transmission buffer waiting time which is a time it takes to accumulate encoded data obtained by encoding image data when encoding the image data which are to be transmitted, a reception buffer waiting time which is a time it takes to accumulate the encoded data before the encoded data are decoded at a transmission destination of the encoded data, and a setting unit configured to set a block length which is a processing unit of error correction processing in such a manner that an error correction reception delay time which is a delay time in the error correction processing performed at the transmission destination of the encoded data does not become more than the reception buffer waiting time estimated by the estimation unit. The present technique can be applied to, for example, an information processing apparatus.
US09665419B2	Enhanced restart of a core dumping application A method for enhanced restart of a core dumping application is provided. The method includes stopping a plurality of threads in an address space, except for the thread performing the core dump. Computational segments are remapped to client segments. Each open file descriptor in the address space is closed. The application is terminated and the client segments are flushed to external storage.
US09665415B2	Low-latency internode communication A low-latency internode messaging scheme bypasses the nodes' I/O stacks to use fabrics or links that support memory process logic (e.g., SMI3) or electrical process logic (e.g., PCIe) on the “node side” between the nodes and a pooled memory controller (or pooled storage controller), and on the “pooled side” between that controller and its pooled memory or storage. The controller may translate and redirect messages and look up addresses. The approaches accommodate 2-level memory (locally attached node memory and accessible pooled memory) with either or both levels private, globally shared, allocated to a subset of the nodes, or any combination. Compatible interrupt schema use the messaging links and components.
US09665413B2	Shared job scheduling in electronic notebook Architecture that synchronizes a job to shared notebook eliminating the need for user intervention and guaranteeing that only one instance of the notebook client performs the task. A job tracking component creates and maintains tracking information of jobs processed against shared notebook information. A scheduling component synchronizes a new job against the shared notebook information based on the tracking information. The tracking information can be a file or cells stored at a root level of a hierarchical data collection that represents the electronic notebook. The file includes properties related to a job that has been processed. The properties are updated as new jobs are processed. Job scheduling includes whole file updates and/or incremental updates to the shared notebook information.
US09665409B2	Methods and apparatus facilitating access to storage among multiple computers Multiple applications communicate tasks to a collective arbitrator. The arbitrator submits the tasks to a shared resource (work processor) for execution. For each segment of multiple segments of time, the arbitrator tracks consumption of time associated with execution of pending tasks submitted to the shared resource for execution on behalf of multiple applications. The arbitrator further controls subsequent submission of additional sets of one or more tasks to the shared resource for each of the multiple applications over successive segments of time depending on how much time it took the shared resource to perform the submitted tasks in one or more prior time segments. Tracking an amount of time that it takes the shared resource to execute submitted tasks and using such information to control future submission of tasks ensures that each of the task generating resources, over time, is provided fair use of the shared resource.
US09665408B2	Resource allocation Certain examples are described relating to resource allocation for one or more digital signal processors in a media gateway. Processing of telecommunication calls are allocated to different digital signal processor cores in the media gateway. When more processing resources are required for a call, a determination is made as to whether any of a set of digital signal processor cores are able to provide these resources. Responsive to a particular digital signal processor core being unable to provide the further processing resources, a reallocation process is initiated. This may involve reserving resources on a further digital processor core, releasing the original set of processing resources and allocating the processing of the call to the further digital processor core.
US09665406B2	Runtime fusion of operators based on processing element workload threshold and programming instruction compatibility The streams environment includes a plurality of operators coupled with processing elements including a first processing element coupled with a first operator instructed with a first programming instructions, and a second processing element coupled with a second operator instructed with a second programming instructions. A workload of the first processing element and a workload of the second processing element are measured. A first threshold of the workload of the first processing element, and second threshold of the workload of the second processing element are determined. The first programming instructions and the second programming instructions are compared to determine if the first operator and the second operator are susceptible to fusion. The first operator is de-coupled and fused to the second processing element, in response to determining the first threshold and the determination that the first operator and the second operator are susceptible to fusion.
US09665405B1	Distributed systems and methods for state generation based on multi-dimensional data Systems and methods are provided for generating multiple system state projections using a grid computing environment. A central coordinator software component executes on a root data processor and provides commands and data to a plurality of node coordinator software components. A node coordinator software component manages threads which execute on its associated node data processor and which perform a set of matrix operations. Stochastic simulations use results of the matrix operations to generate multiple state projections. Additional processing can be performed by the grid computing environment based upon the generated state projections, such as to develop possible change information for users.
US09665404B2	Optimization of map-reduce shuffle performance through shuffler I/O pipeline actions and planning A shuffler receives information associated with partition segments of map task outputs and a pipeline policy for a job running on a computing device. The shuffler transmits to an operating system of the computing device a request to lock partition segments of the map task outputs and transmits an advisement to keep or load partition segments of map task outputs in the memory of the computing device. The shuffler creates a pipeline based on the pipeline policy, wherein the pipeline includes partition segments locked in the memory and partition segments advised to keep or load in the memory, of the computing device for the job, and the shuffler selects the partition segments locked in the memory, followed by partition segments advised to keep or load in the memory, as a preferential order of partition segments to shuffle.
US09665403B2	Executing algorithms in parallel Among other things, a machine-based method comprises receiving an application specification comprising one or more algorithms. Each algorithm is not necessarily suitable for concurrent execution on multiple nodes in parallel. One or more different object classes are grouped into one or more groups, each being appropriate for executing the one or more algorithms of the application specification. The executing involves data that is available in objects of the object classes. A user is enabled to code an algorithm of the one or more algorithms for one group in a single threaded environment without regard to concurrent execution of the algorithm on multiple nodes in parallel. An copy of the coded algorithm is distributed to each of the multiple nodes, without needing additional coding. The coded algorithm is caused to be executed on each node in association with at least one instance of a group independently of and in parallel to executing the other copies of the coded algorithm on the other nodes.

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