| Document | Document Title |
|---|---|
| US09520930B2 |
Measurement support for a smart antenna in a wireless communication system
A method for taking measurements with a smart antenna in a wireless communication system having a plurality of STAs begins by sending a measurement request from a first STA to a second STA. At least two measurement packets are transmitted consecutively from the second STA to the first STA. Each measurement packet is received at the first STA using a different antenna beam. The first STA performs measurements on each measurement packet and selects an antenna beam direction based on the measurement results. |
| US09520929B2 |
Communication control method, user terminal, and base station
A communication control method is applied to a mobile communication system including a base station that transmits a downlink signal through a plurality of antenna ports, and a user terminal that feeds back precoder matrix information to the base station, the downlink signal being precoded using a precoder matrix, the precoder matrix information indicating a precoder matrix preferred to be used in a downlink. The communication control method comprises: a step A of notifying, by the user terminal, the base station of antenna port information indicating an antenna port with low degree of contribution at a time of transmission from the base station when the precoder matrix information is fed back to the base station. |
| US09520926B2 |
Method and apparatus for transmitting beamforming report frame for transmit beamforming
A method of transmitting a beamforming report frame for transmit beamforming is provided. The method may include acquiring, by a receiver, data of a signal transmitted by a transmitter, selecting either media access control (MAC) software or MAC hardware, to assign a sequence number based on a type of the data, and assigning a sequence number to the management frame based on the data, using either the MAC software or MAC hardware that is selected. |
| US09520925B2 |
Method and apparatus for transmitting signal in wireless communication system
A method and apparatus for transmitting a signal in a wireless communication system are provided. The method includes: generating R spatial stream each of which is generated on the basis of an information stream and reference signal; generating N transmit streams on the basis of the R spatial streams and a precoding matrix (where R |
| US09520923B2 |
Low-complexity ACPR-enhancing digital RF MIMO transmitter
The present disclosure relates to a low-complexity transmitter architecture that drives phase modulators with digital signals to generate a pulse width modulated (PWM) signal that is transmitted by an antenna. In some embodiments, the system has a pre-processing element that generates first and second digital control signals from a digital baseband signal. A first phase modulation component introduces a first phase shift into a first local oscillator signal based upon the first control signal and generates a first digital signal corresponding to the first phase shift. A second phase modulation component introduces a second phase shift into the first local oscillator signal based upon the second control signal and generates a second digital signal corresponding to the second phase shift. A combination element is configured to combine the first and second digital output signals to generate an RF pulse width modulated (RF-PWM) signal. |
| US09520917B2 |
Antenna configuration to facilitate near field coupling
Described herein are techniques related to near field coupling and wireless power transfers. A portable device may include a coil antenna that includes an upper loop and a lower loop to form a figure-eight arrangement. The figure-eight coil antenna arrangement is wrapped against top and bottom surfaces of a component to establish near field coupling through front side, top side, bottom side, or corner side of the portable device. Further, a flux guide may be placed between the coil antenna and the component to facilitate magnetic flux at the upper loop and the lower loop to induce current of the same phase during receive mode. During transmit mode, the flux guide facilitates the magnetic flux at the upper loop and the lower loop to generate magnetic fields of the same direction. |
| US09520915B2 |
Radio communication system, radio base station, and mobile terminal
In a radio communication system including multiple mobile terminals and multiple radio base stations, the mobile terminal has a function of interference rejection combining. The radio base stations share downlink channel characteristics for mobile terminals connected to radio base stations. The radio base station gives weights to radio waves transmitted from multiple transmission antennas to perform in-phase addition of an interfering radio wave beam directed to a mobile terminal for which the desired radio base station is another radio base station to an interfering radio wave beam transmitted from yet another radio base station for limiting the number of interfering radio wave beams that arrive at the mobile terminal. The radio base station does not perform in-phase addition when the number of interfering radio wave beams of which interference can be suppressed by the mobile terminal is equal to or greater than the number of radio base stations that send interfering radio wave beams to the mobile terminal. |
| US09520914B2 |
Full-duplex wireless communication system using polarization
A system, apparatus, and method use full duplexing with polarization. A wireless communication system includes a first transceiver configured to transmit and receive wireless signals to and from at least a second transceiver. The first transceiver includes a plurality of transmitter antennas and a plurality of receiver antennas. At least one of the transmitter antennas is configured to transmit a first signal with a first polarization weight to at least the second transceiver. At least one of the receiver antennas is configured to receive a second signal with a second polarization from the second transceiver. The second polarization is cross polarized with the first polarization. |
| US09520913B1 |
Cellular phone with an integrated earphone storage apparatus
A cellular phone with an integrated earphone storage apparatus including a cellular phone and an earbud storage compartment attached to a back side of the cellular phone. The earbud storage compartment has a pair of slots including a right slot and a left slot. Each of the right slot and the left slot is continuously disposed from the front area to the back area proximal the right area and the left area, respectively. A circumference of each of the pair of slots substantially conforms to a circumference of each of a pair of earbuds of an earphone. One of the pair of earbuds is removably disposed within an opening of one of a pair of circular inner membranes disposed within an interior circumference of each of the right slot and the left slot, respectively. An earphone cord storage compartment is optionally attached to the back side of the cellular phone. |
| US09520909B2 |
Transmit noise reducer
A transmit drive circuit with high signal to noise and frequency agility. In one embodiment, a transmit circuit includes a digital to analog converter, an amplifier, and a signal to noise enhancer, the signal to noise enhancer being a nonlinear passive device that attenuates low-power signals while transmitting high power signals with little loss. The signal to noise enhancer may be fabricated as a thin film of yttrium iron garnet (YIG) epitaxially grown on a gadolinium gallium garnet (GGG) substrate, the GGG substrate secured to a microwave transmission line from the input to the output of the signal to noise enhancer, such that the thin film of yttrium iron garnet is close to the transmission line. |
| US09520906B2 |
Switched capacitor transmitter circuits and methods
The present disclosure includes switched capacitor transmitter circuits and methods. In one embodiment, a digital data signal is thermometer encoded and a negative thermo-encoded signal is bit order reversed to control capacitors in a switched capacitor transmitter circuit. In another embodiment, the present disclosure includes a plurality of switched capacitor transmitter circuits coupled to inputs of an inductive network. The inductive network combines voltages from the switched capacitor transmitter circuits to produce a combined voltage on an output. |
| US09520905B2 |
Impedance matching apparatus and method, and computer program
A impedance matching apparatus (100) is provided with: a matching circuit (110) having a plurality of variable reactance elements; an incident signal/reflected signal extracting circuit (120) configured to extract an incident signal and a reflected signal; an estimating device (130) configured to estimate input impedance of a transmitting antenna (11) on the basis of the extracted incident signal and the extracted reflected signal; and a setting device (140) configured to set a value associated with one part of the plurality of variable reactance elements such that output impedance of a power supply (14) theoretically matches the input impedance on the basis of the estimated input impedance, and then adjust a value associated with at least one of the plurality of variable reactance elements according to the extracted reflected signal. |
| US09520901B2 |
Memory controller, memory system, and memory control method
According to one embodiment, a memory controller includes a writing destination management unit which determines a writing destination of user data, an encoding unit which generates a parity of the user data, and an ECC management unit which measures a fatigue degree of each certain memory area of a nonvolatile memory, selects an encoding method to instruct the encoding unit to be performed according to the encoding method, and changes the encoding method to an encoding method having a high error correction capability in a case where the fatigue degree corresponding to the writing destination is equal to or higher than a threshold and a total sum of parities is equal to or less than a predetermined amount. |
| US09520898B2 |
Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 3/15 code rate
A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 3/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis. |
| US09520892B2 |
Digital to analog converter, unit for the same, and method for using the same
Disclosed herein is a digital-to-analog converter (DAC) including a clock driver for controlling a clock signal to provide an inverse delay clock signal to allow at least selective adjustment of a return to zero (RZ) section; and a DAC core comprising at least two DAC units for receiving a digital input value, the clock signal and the inverse delay clock signal and providing an analog output value. According to the present invention, distortion of the output of the DAC may be attenuated and loss of the output may be minimized by utilizing the RZ technique. |
| US09520891B1 |
Successive approximation register converter
The present invention relates to a successive approximation register analog-to-digital converter (SAR ADC) for providing a digital approximation of a sampled differential input signal as a result of a successive approximation operation. The SAR ADC comprises a first comparison stage configured to perform a first set of decision steps of the successive approximation operation and a second comparison stage configured to perform a second set of decision steps of the successive approximation operation. Furthermore, the SAR ADC comprises a regulation circuit configured to adjust the common mode of the input signal towards a target common mode before the second comparison stage performs the second set of decision steps. The present invention further relates to a corresponding method and a corresponding design structure. |
| US09520890B1 |
Dual digital to time converter (DTC) based differential correlated double sampling DTC calibration
A system for calibrating a digital to time converter (DTC), includes a first DTC configured to receive a first digital input code and generate a first DTC output signal, and a second DTC configured to receive a second digital input code and generate a second DTC output signal. Further, the system includes a delay circuit configured to apply a first delay to the first DTC output signal to generate a first delayed DTC output signal and a phase detector circuit configured to determine a phase difference between the first delayed DTC output signal and the second DTC output signal, thereby generating a phase detector output. In addition, the system includes a calibration circuit configured to adjust the first digital input code of the first DTC to an adjusted first code that minimizes the phase detector output, based on a search algorithm. |
| US09520886B2 |
Methods and devices for error correction of a signal using delta sigma modulation
A method for correcting long-term phase drift of a crystal oscillator in a numerically-controlled oscillator is described. The method includes determining the phase error in an oscillator signal in comparison with an external time base; delta-sigma modulating the phase error to generate a delta-sigma error bitstream; conditionally adding or subtracting an error correction step size from a phase increment value in each clock cycle based on the delta-sigma error bitstream, to create a modulated phase increment value; and adding the modulated phase increment value to a phase accumulator to generate an error-corrected output digital signal. The delta-sigma-based error correction method avoids the use of multipliers. The same delta-sigma error signal can be used in multiple numerically-controlled oscillators configured to different output frequency if driven by the same reference oscillator. |
| US09520884B2 |
Phase lock loop with dynamic lock ranges
A phase look loop (PLL) device has a dynamic lock range that is based on a temperature measured during a calibration process. The PLL device includes a calibration circuit configured to receive a temperature reading corresponding to a junction temperature of the PLL device during the calibration process. Based on this temperature reading, the calibration circuit initiates a preset procedure that presets a control voltage of a voltage control oscillator in the PLL device. The preset procedure implements a calibration function defined by a slope with a numerator component and a denominator component. The numerator component corresponds to a range of the control voltage, whereas the denominator component corresponds to a range of ambient temperatures within which the PLL device operates. |
| US09520878B1 |
Methods and apparatus for transmitting a signal in a single direction using bidirectional driver circuits
An integrated circuit may include a first logic region having a first bidirectional driver circuit and a second logic region having a logic circuit and a second bidirectional circuit. The first bidirectional driver circuit may be coupled to the second bidirectional driver circuit via a conductive path. The second bidirectional circuit may receive a dynamic control signal from the logic circuit to selectively transmit a signal to the first bidirectional driver circuit based on the dynamic control signal. The first logic region further includes an additional logic circuit. The additional logic circuit may provide an additional dynamic control signal to the first bidirectional driver circuit to selectively transmit an additional signal to the second bidirectional driver circuit over the conductive path. To prevent current contention, only one bidirectional driver circuit may be activated to drive the conductive path at a given time. |
| US09520877B2 |
Apparatus and method for detecting or repairing minimum delay errors
Described are apparatuses and methods for detecting or repairing minimum-delay errors. The apparatus may include a minimum-delay error detector (MDED) to receive a clock signal and a data path signal and to detect a minimum-delay error (MDE) in the data path based on the received data path signal and the clock signal. The MDE may be repaired by adjusting one or more regional clock buffers coupled to the MDED. Further, the apparatus may include minimum-delay path replicas (MDPRs) used for detecting and repairing MDEs during normal system operations. Other embodiments may be described and/or claimed. |
| US09520867B2 |
Duty cycle detection and correction circuit in an integrated circuit
A clock generating circuit includes a clock generator, a first clock tree, a second clock tree, and a duty cycle correction circuit. The clock generator is configured to generate a first clock signal and a second clock signal. The first clock tree includes a driver cell configured to generate a first output clock signal based on the first clock signal and a set of control signals, and to generate a second output clock signal based on the second clock signal and the set of control signals. The second clock tree includes a driver cell configured to generate a third output clock signal based on the set of control signals. The duty cycle correction circuit is configured to receive the first output clock signal and the second output clock signal and to generate the set of control signal based on the first output clock signal and the second output clock signal. |
| US09520860B2 |
Time distribution switch
Systems and methods for detecting the failure of a precision time source using an independent time source are disclosed. Additionally, detecting the failure of a GNSS based precision time source based on a calculated location of a GNSS receiver is disclosed. Moreover, the system may be further configured to distribute a time derived from the precision time source as a precision time reference to time dependent devices. In the event of a failure of the precision time source, the system may be configured to distribute a time derived from a second precision time source as the precision time signal during a holdover period. |
| US09520859B2 |
Elastic wave device including a conductive shield electrode and manufacturing method thereof
In an elastic wave device, a first electrode structure and a second electrode structure are provided on a piezoelectric substrate. The first electrode structure and the second electrode structure define first and second elastic wave element portions, respectively. A support frame on the piezoelectric substrate surrounds the first elastic wave element portion and the second elastic wave element portion. The support frame includes a dividing wall portion that divides the first elastic wave element portion and the second elastic wave element portion. A conductive shield electrode is provided in a groove provided in the dividing wall portion. |
| US09520855B2 |
Bulk acoustic wave resonators having doped piezoelectric material and frame elements
A bulk acoustic wave (BAW) resonator includes a first electrode; a second electrode; and a piezoelectric layer disposed between the first and second electrodes. The piezoelectric layer includes a piezoelectric material doped with at least one rare earth element. In an embodiment, the BAW resonator includes a recessed frame element disposed over a surface of at least one of the first and second electrodes. In another embodiment, the BAW resonator includes a raised frame element disposed over a surface of at least one of the first and second electrodes. In yet another embodiment, the BAW resonator includes both the raised and recessed frame elements. |
| US09520845B2 |
Supply modulation for radio frequency power amplification
The subject matter described herein relates to supply modulation for power amplification. In one embodiment, the voltage level of the envelope with a tunable threshold voltage. The high level part of the envelope above the threshold voltage is maintained and amplified, for example, by the linear amplification process. On the other hand, the low level part of the envelope is replaced with the constant low voltage level. In amplification, the shaped low level part can be prompted to the predefined low supply voltage which may be directly output to the RFPA. By eliminating complicated amplification process on the lower level part of the envelope, the efficiency and bandwidth of the supply modulation can be improved and the circuitry can be simplified, without introducing any timing mismatch or delays. |
| US09520842B2 |
Transmission line driver circuit for adaptively calibrating impedance matching
A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; an internal node; a first divider resistor positioned between the first signal node and the internal node; a second divider resistor positioned between the second signal node and the internal node; a comparing circuit for comparing a divided voltage at the internal node with a reference voltage to generate a comparison signal; and an adjusting circuit for adjusting resistance of at least one of the first and second adjustable resistors according to the comparison signal. |
| US09520841B2 |
Transmit circuit, method for adjusting a bias of a power amplifier and method for adapting the provision of a bias information
A transmit circuit includes an envelope tracker configured to determine an envelope of a transmit signal and provide bias information based on the determined envelope of the transmit signal. The transmit circuit further includes a power amplifier configured to generate an RF output signal based on the transmit signal, a bias provider configured to provide a bias for the power amplifier based on the bias information, and an impedance determinator configured to determine a measure of a load impedance of a load coupled to an output of the power amplifier. The envelope tracker is configured to adapt the bias information based on the measure of the load impedance. |
| US09520840B2 |
Current limiter
A current limiter for Class-D amplifiers measures and stores a position of an over-current event. By comparing the stored position, output signals can be selectively inverted. As a result, the Class-D amplifier remains in a defined modulation scheme even during period of current limiting. |
| US09520839B2 |
Protection device
In a protection device of a current amplifier circuit, to protect the current amplifier circuit against more high-speed operation than recovery time of a relay device and to protect operation of the current amplifier circuit in a wide range from low frequency side to high frequency side.A protection device 30 includes a detection circuit 32 that detects an abnormal current value of a current amplifier circuit 14 and outputs a first abnormality detection signal. The protection device 30 outputs a second abnormality detection signal continuously for predetermined time that starts from output timing of the first abnormality detection signal, turns down an input voltage value to the current amplifier circuit 14 at receiving timing of the second abnormality detection signal, and outputs a cutting command signal to a relay device 36 at the same timing. The detection circuit 32 includes a load line detection unit 42 that detects abnormality by a current value on a load line and a pulse response characteristic changing unit 44 changes frequency characteristic of abnormality detection operation by the load line detection unit 42. |
| US09520832B2 |
Device for connecting two pieces of equipment via an Ethernet link, and a docking station for such a piece of equipment
A connection device for connecting a first piece of electronic equipment to a second piece of electronic equipment, the device comprising two Ethernet type interfaces that are linked together by an up line and a down line and that are arranged for each of them to be linked to a respective one of the pieces of equipment and to transmit data in differential mode, two power supply modules, each associated with a respective one of the pieces of equipment and wired in common mode between the up and down lines in order to transmit a power supply carrier signal in alternating current, and two secondary transmission modules, each associated with a respective one of the power supply modules and arranged to enable data to be transmitted by modulating the power supply carrier signal. |
| US09520824B2 |
Inverter apparatus
An object of the present invention is to achieve stable inverter control by means of current detection using one current sensor in all of periods in which overmodulation control is performed. An inverter controller includes a γ-axis current calculation section that holds, in advance, a γ-axis current arithmetic expression including a direct current as a parameter, and calculates a γ-axis current using a direct current detected by a current sensor for the γ-axis current arithmetic expression. |
| US09520819B2 |
System and method for controlling a power generation system based on a detected islanding event
In one aspect, a method for controlling the operation of a power generation system configured to supply power to an electrical grid may generally include detecting an occurrence of an islanding event associated with the power generation system and adjusting a regulator gain applied within a regulator of the power generation system to an islanding gain value in response to the detection of the islanding event, wherein the islanding gain value exceeds a maximum gain value defined for the regulator in the event of an occurrence of any ride-through transient event. In addition, the method may include controlling a power converter of the power generation system based on a control signal generated by the regulator as the power generation system is being isolated from the electrical grid and shutting down the power generation system upon isolation of the power generation system from the electrical grid. |
| US09520818B2 |
Method for driving emergency generator using energy storage system
The present invention relates to a method for driving an emergency generator using an energy storage system in which, when the power of an emergency generator is applied, an energy storage system is allowed to handle the load demand, thereby driving the emergency generator at maximum efficiency. For this purpose, the method for driving an emergency generator using an energy storage system (ESS), including, after an emergency generator has been applied and until the emergency generator reaches a preset maximum efficiency driving state, handling, by an ESS, load demand using previously stored power, and, when the emergency generator reaches the preset maximum efficiency driving state, maintaining the driving of the emergency generator in the maximum efficiency driving state. |
| US09520817B2 |
Power conversion apparatus and electric power steering apparatus having the same
A power conversion apparatus includes: an inverter unit having high and low potential-side switching elements corresponding to each phase of a winding of a rotating electrical machine; a current detecting unit; and a control unit controlling the switching elements based on a PWM reference signal and a duty instruction value. The control unit includes: a phase current computing device; and a voltage instruction value computing device. The control unit computes an active voltage vector interval in first and second half periods of one or multiple cycles of the PWM reference signal to be a predetermined period or longer, and computes first and second half duty instruction values to set first and second voltage vector intervals equal to or longer than minimum time to be in the first or second half period. |
| US09520814B2 |
Bonding method, mounting table and substrate processing apparatus
A distance between the surface of the base member and the electrostatic chuck having the heater pattern formed on a bottom surface thereof can be uniformized. A bonding method of bonding an electrostatic chuck and a base member to each other includes forming a filling member 30 by covering irregularities of a heater pattern 9a formed on a bottom surface 61 of the electrostatic chuck 9 facing the base member 10; grinding a base member contact surface 62 of the filling member 30 facing the base member 10; and bonding the ground base member contact surface 62 of the filling member 30 to the base member 10 with an adhesive layer 31 provided therebetween. |
| US09520813B2 |
Actuator drive device
An actuator drive device is configured to drive an actuator. The actuator drive device includes a storage section for storing a drive condition of the actuator, a processor for calculating and outputting drive signal D(t) based on a drive base signal V(t) calculated based on the drive condition with respect to time t, and a generator for outputting, based on the drive signal D(t) calculated, a driving signal for driving the actuator. The drive base signal V(t) is a sum of a fundamental wave and at least one harmonic wave of the fundamental wave. The processor is operable to determine the coefficient ak such that the drive base signal V(t) changes linearly from a minimum value to a maximum value with respect to a time. This actuator drive device improves the linearity of the driving of the actuator. |
| US09520812B2 |
Electronic device, electronic apparatus, and method of manufacturing electronic device
An electronic device includes a first base body, a second base body, a third base body held between the first base body and the second base body, a first functional element disposed in a first cavity surrounded by the first base body and the third base body, and a second functional element disposed in a second cavity surrounded by the second base body and the third base body. |
| US09520811B2 |
Capacitive micromachined ultrasonic transducer (CMUT) device with through-substrate via (TSV)
A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region. A membrane layer is bonded on the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A through-substrate via (TSV) includes a dielectric liner which extends from a bottom side of the first substrate to a top surface of the membrane layer. A top side metal layer includes a first portion over the TSV, over the movable membrane, and coupling the TSV to the movable membrane. A patterned metal layer is on the bottom side surface of the first substrate including a first patterned layer portion contacting the bottom side of the first substrate lateral to the TSV. |
| US09520810B2 |
Three-level power converter and power unit thereof
Provided are a three-level power converter and a power unit thereof. The power unit includes a power switch module and a laminated busbar structure. The power switch module includes a first power semiconductor switch module and a clamping diode module, which have a first, second, and third terminal respectively. The laminated busbar structure includes a third, second, and first busbar layer laminated on the power switch module. The third busbar layer includes a first sub-busbar connecting to the first terminal of the first power semiconductor switch module, a second sub-busbar connecting to the third terminal of the first power semiconductor switch module and the first terminal of the clamping diode module, a third sub-busbar connecting to the second terminal of the clamping diode module and the third terminal of the second power semiconductor switch module, and a fourth sub-busbar connecting to the second terminal of the second power semiconductor switch module. |
| US09520809B2 |
Rotary electric machine driving device
A rotary electric machine driving device including: an inverter that is electrically interposed between a direct-current power supply and the rotary electric machine, and converts electric power between a direct current and an alternating current; a smoothing capacitor that is electrically interposed between the direct-current power supply and the inverter, and is connected between a positive pole and a negative pole on a direct-current side of the inverter; an inverter control unit that controls switching of a switching element of the inverter according to a predetermined switching frequency; and an inductance control unit that switches a direct-current side inductance between a positive pole of the direct-current power supply and a positive pole of the smoothing capacitor, according to the switching frequency, between a predefined standard inductance and a high inductance that is higher than the standard inductance. |
| US09520805B2 |
Control method and control system of three level inverter
A three-phase inverter includes three-level inverters connected in parallel to one another, each being capable of outputting a DC high voltage, DC middle voltage, and DC low voltage. A method for controlling the three-phase inverter produces on-time ratios in one switching period of switching elements in the three-level inverters, so as to make the three-phase inverter for one phase alternately output the DC high voltage and the DC middle voltage, to make the three-phase inverter for another phase output the DC middle voltage, and to make the three-phase inverter for the remaining phase alternately output the DC middle voltage and the DC low voltage. |
| US09520803B2 |
Photovoltaic power conditioning units
We describe a photovoltaic (PV) panel system comprising a PV panel with multiple sub-strings of connected solar cells in combination with a power conditioning unit (microinverter). The power conditioning unit comprises a set of input power converters, one connected to each sub-string, and a common output power conversion stage, to provide power to an ac mains power supply output. Integration of the micro-inverter into the solar PV module in this way provides many advantages, including greater efficiency and reliability. Additionally, embodiments of the invention avoid the need for bypass diodes, a component with a high failure rate in PV panels, providing lower power loss and higher reliability. |
| US09520800B2 |
Multilevel converter systems and methods with reduced common mode voltage
Multilevel converters and space vector modulation operating methods are presented in which fewer than all possible switching states are employed for space vector modulation of rectifier and inverter circuits to promote common mode voltage contribution cancellation or reduction therebetween and by using subsets of possible space vector modulation switching states associated with minimal positive or negative common mode voltages and in some cases using virtual vectors which have zero common mode voltages to eliminate the 3rd order harmonic components in common mode voltage as well as to reduce common mode voltage affects associated with multilevel inverter stages. |
| US09520797B2 |
Adaptive reference voltage for switching power converters
A switching power converter is provided that detects an activity signal generated in response to load activity using an adaptively-declining threshold. |
| US09520796B2 |
Control method and device for quasi-resonant high-power-factor flyback converter
The present disclosure is directed to a high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a sinusoidal reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter. |
| US09520795B2 |
Method of forming a power supply controller and structure therefor
In one embodiment, a power supply controller may be configured to form a status signal that is representative of a secondary current by substantially removing a primary magnetization component from a primary current signal and to use the status signal to form a first signal that is representative of a delivered output power, and configured to adjust an on-time of one of a first or second switch responsively to the delivered output power. |
| US09520792B2 |
Staggered parallel three-level DC/DC converter and AC/DC converter
A staggered parallel three-level DC/DC converter and an AC/DC converter includes: at least one input power supply, N-phase three-level DC/DC circuits, N resonant inductors, N resonant capacitors, N transformers, N rectifier circuits, a first inductor, and an output circuit; one end of an i th resonant inductor is connected to an i th-phase three-level DC/DC circuit, the other end of the i th resonant inductor is connected to an excitation inductor of an i th transformer; one end of an i th resonant capacitor is connected to the i th-phase three-level DC/DC circuit, and the other end of the i th resonant capacitor is connected to the excitation inductor of the i th transformer; or one end of the first inductor is connected to the input power supply, and the other end of the first inductor is connected to the N-phase three-level DC/DC circuit; where N is an integer and is greater than or equal to 2, and i is an integer and 1≦i≦N. |
| US09520788B2 |
Apparatus and method for current sharing in a multi-phase switching regulator
An apparatus and method for a multi-phase switch regulator with improved efficiency is disclosed. The device has parallel implementations for the different phases comprising a driver, a current sense variable gain amplifier, a current share circuit, a pulse width modulation (PWM) control circuit, a trim network, and an inductor. A method is disclosed of providing a system with current sharing function comprising a driver circuit, a current sense circuit, a current share circuit, a PWM control circuit and a trim circuit, providing a current sense circuit for each segment of a driver circuit, sensing a signal using a current sense circuit for each segment of a driver circuit, comparing the output of the current sense circuit, providing the current error information to a PWM controller, generating a PWM drive signal of each phase, and finally, equalizing the output of the current sense amplifier. Other methods that utilize dummy output stages and low pass filter feedback is disclosed. |
| US09520785B2 |
Nonlinear control loop for DC-DC converters
A nonlinear converter, such as a DC-DC converter, includes a nonlinear controller configured to receive an output voltage and a current, and configured to generate a PWM signal. The PWM signal is generated based on setting the converter to a first phase associated with both buck and boost modes when a clock signal is asserted, and selecting a second phase associated with the buck mode of the converter, if a sliding function signal achieves a first predetermined relationship with respect to a buck threshold before a next clock signal is asserted, or selecting a third phase associated with the boost mode of the converter, if the sliding function signal achieves a second predetermined relationship with respect to a boost threshold before a next clock signal is asserted. The nonlinear converter may include a power stage configured to provide the output voltage and a coil current to the nonlinear controller. |
| US09520781B2 |
Rapid-transition DC-DC converter
A DC-DC converter for delivering electrical power to a load includes an output filter having an inductor and an output capacitor, a first switch, and a second switch. The first switch is configured to alternately couple and decouple the inductor to and from a DC input voltage as power is being delivered to the load. The second switch is configured to electrically disconnect the output capacitor when the load is removed or deactivated. Disconnecting the output capacitor allows the DC-DC converter to rapidly transition from an operating state to a disabled state, obviating any need to discharge the output capacitor in order to fully disable the DC-DC converter. Residual energy stored in the electric field of the output capacitor and/or the magnetic field of the inductor at the time the load is next reactivated is available to hasten transition back to the operating state. |
| US09520776B1 |
Selective body bias for charge pump transfer switches
Techniques are presented for improving the efficiencies of multi-stage charge pumps by reducing the amount of voltage lost across the inter-stage transfer switches of the pump through use a selective body bias. The voltage level from both branches of one stage is each supplied though a corresponding diode to the bulk connection of the transfer switch after the subsequent stage in both branches. This arrangement results in each stage providing a largely uniform amount of gain, without the usual increase of voltage drop with increasing numbers of stages. |
| US09520775B2 |
Boosting system, diagnosing method, and computer readable medium storing diagnosing program for diagnosing the boosting functions of a boosting section
The present invention provides a boosting system, a diagnosing method and a diagnosing program, that may diagnose a boosting section while suppressing consumption of electric power and current, and without being carrying out by a CPU. Namely, during an initializing operation, difference between power supply voltage and own threshold voltage charges capacitor C1 of a comparison circuit, and a difference between voltage of a constant voltage and the own threshold voltage charges capacitor C2. In a comparing operation, a boosting section and the capacitor C1 are connected so that boosted voltage is inputted, and GND and the capacitor C2 are connected so that GND voltage is inputted. At this time, if output OUT is L level, it is diagnosed that there is no defect, whereas if the output OUT is H level, it is diagnosed that there is defect. |
| US09520774B2 |
Power switch reliability in switched capacitor DC-DC converter
Representative implementations of devices and techniques minimize hot carrier stress in a switched capacitor dc-dc converter. Multi-switch arrangements may be used in conjunction with a timing scheme to stage power switch operation. |
| US09520772B2 |
Multi-level voltage regulator system
A multi-level voltage regulator system/method providing discrete regulation of a DC-DC intermediate bus converter (IBC) output voltage (Vout) is disclosed. The disclosed system/method allows IBC Vout to be regulated in discrete steps during periods where IBC input voltage (Vin) falls below nominal operating values. Rather than shutting down or degrading IBC Vout in an unpredictable non-linear fashion based on IBC input/loading, IBC Vout is regulated in fixed discrete steps, allowing IBC-connected point-of-load (POL) converters to obtain stable power input that is well-defined over IBC Vin. IBC operating parameters may define multi-dimensional operational state spaces of IBC Vout regulation that ensure optimum power flow to attached POLs while maintaining operational stability within the IBC regulator. Instabilities in IBC/POL performance across variations in IBC Vin, load transients, POL loading, and environmental variables may be prevented using Vin voltage step hysteresis. |
| US09520769B2 |
Wake up management circuit for a switching converter and related wake up method
A switching converter converts an input signal to a regulated output signal using a switch and a transformer with a primary winding and a secondary winding. A wake up management circuit receives a transformer demagnetization signal and forces by wake up pulses the switch on when the switching converter operates in a burst mode. Sampled values of the transformer demagnetization signal are received. A setting circuit sets a first peak value of the current of the primary winding. A comparison circuit compare the sampled values with a voltage threshold and the preceding sampled value. In response thereto, the first peak value of the primary winding current is either maintained or a new peak value is set. |
| US09520765B2 |
DC/DC converter, switching power supply device, and electronic apparatus,configured to include a phase detector and a phase holder
Provided is a DC/DC converter for a multi-phase switching power supply device which include a plurality of DC/DC converters including a master DC/DC converter and a plurality of slave DC/DC converters that are connected in parallel to each other and operate in different phases. The DC/DC converter includes: first and second terminals to cascade the plurality of DC/DC converters in a line; a phase detector that detects the number of operating converters in the switching power supply device and the phases of the plurality of DC/DC converters, on the basis of a current input to the first terminal and a current output from the second terminal; a phase holder that holds the detected phases and outputs a phase holding signal; and a clock generator that selects a clock corresponding to the phase of a host converter from multi-phase clocks, on the basis of the phase holding signal, and outputs the selected clock. The DC/DC converter performs a switching operation on the basis of the selected clock. |
| US09520764B1 |
Bi-directional multi-port applications
Methods and systems for bi-directional multi-port power conversion systems and applications are disclosed. In some sample embodiments, current-modulating power converters can be used to provide conversion between synchronous and asynchronous power. In some sample embodiments, current-modulating power converters can perform power conversion can be performed to and from three-phase AC with an active neutral line. In some sample embodiments, current-modulating power converters can convert between synchronous and asynchronous power and also support three-phase AC with active neutral. |
| US09520763B2 |
Active energy harvesting device
Disclosed is an active energy harvesting device. The device includes a rigid body configured to vibrate corresponding to vibration of an external vibration body and including a first end at which an energy harvesting structure is provided to convert mechanical energy into electric energy, a magneto-rheological material provided at a second end of the rigid body to be bound to the rigid body and including a material which is changed in elastic force according to the surrounding magnetic field strength, a fixing unit for binding the second end of the rigid body and the magneto-rheological material and connecting the rigid body to the external vibration body, and a first permanent magnet arranged symmetrically apart from the magneto-rheological material while interposing the magneto-rheological material therebetween and provided so as to adjust a gap from the magneto-rheological material and change an elastic coefficient of the magneto-rheological material according to the gap. |
| US09520760B2 |
Rotor, induction motor having the same, and method for manufacturing the same
A rotor includes a stacked core having a plurality of slots formed on an inner side thereof, a plurality of rotor bars inserted in the plurality of slots, a pair of end rings assembled and fastened to opposite ends of the rotor bars, a pair of retainers fastened to opposite outer end surfaces of the rotor bars in an assembled and fastened manner, and a shaft inserted into the pair of end rings. |
| US09520759B2 |
Motor driven compressor
A motor-driven compressor that includes a metal housing accommodating a compression unit and an electric motor, a cover coupled to the housing, wherein the cover includes a resin portion and a metal shield, and the shield blocks electromagnetic noise, and a bolt that couples the cover to the housing. The housing and the cover define an accommodating chamber that accommodates a motor driving circuit that drives the electric motor. The cover includes an insertion hole into which the bolt is insertable. The shield includes a seat that surrounds the insertion hole and is held between the bolt and the housing. The cover is configured to allow for an axial force of the bolt to be applied to the seat and not to the resin portion. |
| US09520756B2 |
Linear electromechanical actuator
The present invention relates to an electromechanical actuator comprising a housing, an electric motor, a roller drive and a rotor rotation angle sensing unit received in said housing. The rotor of the electromechanical actuator is mounted within the housing and configured to rotate in bearing supports. Openings for supplying and removing lubricant are arranged in the housing in the vicinity of the bearing supports, the opening allowing to replace lubricant without disassembling the actuator, thus simplifying maintenance and operation. |
| US09520752B1 |
Interior permanent magnet machine for automotive electric vehicles
Certain aspects relate to topologies for an interior permanent magnet (IPM) electrical machine having increased saliency torque, increased flux-linkage, reduced magnet leakage flux, and reduced detrimental slotting effects compared to existing IPM electrical machines. The IPM electrical machine includes a rotor having a number of poles and a flux barrier formed along the edge of the rotor between poles. The flux barrier contains a magnet or set of magnets having a varying thickness, with a central thickest portion located along the d-axis of the rotor. A magnet retention structure, which may be formed integrally with the rotor or provided as a separate structure, surrounds the rotor and magnets. The rotor and magnets combine to form a smooth circular profile having no air gaps. |
| US09520748B2 |
Systems and methods for providing wireless power to a power-receiving device, and related power-receiving devices
In an embodiment, a wireless power distribution system is disclosed. The wireless power distribution system includes a routing module having at least one processor configured to determine a route for a power-receiving device to travel responsive to receiving input about one or more characteristics associated with the power-receiving device or one or more wireless power transmitters for delivering power to the power-receiving device. The wireless power distribution system further includes the one or more wireless power transmitters operably coupled to the routing module. The one or more wireless power transmitters are configured to wirelessly transmit the power to the device at one or more locations along the route. |
| US09520746B2 |
Battery disconnect safeguard
In embodiments, a mobile device includes a primary battery as a power source to power components of the mobile device, and includes a secondary battery as an additional power source to power the components of the mobile device. A sensor is implemented to detect moisture proximate a battery connection of the secondary battery, where the detected moisture indicates an impending secondary battery disconnect event due to the secondary battery shorting out. A battery controller is implemented to receive a sensor input of the detected moisture from the sensor. The battery controller can then switch from the secondary battery to the primary battery as the power source based on the detected moisture proximate the battery connection of the secondary battery. |
| US09520743B2 |
Reduction of power consumption in remote control electronics
A remote controlling device (100) is disclosed that includes one or more motion sensors (120, 130, 140) configured to sense a motion of the device. The remote control further includes a capacitive sensor (150) and a power source (405). The capacitive sensor selectively couples the power source to the one or more motion sensors. |
| US09520740B2 |
Wireless charger having E-field shield
A shielding arrangement for preventing AM radio interference when a wireless charger is used in a vehicle has a plurality of parallel conductors arranged at a distance from one another responsive to a frequency desired to be attenuated. An interconnection arrangement includes a solid conductive junction and connects the conductors to one another without forming loops, and to ground. The conductors are traces disposed on a PCB. Additional parallel conducts are disposed on the other side of the PCB at an orthogonal orientation with respect to the first conductors. The spacing between the conductors is determined in response to the frequency desired to be attenuated, as well as frequencies thereabove that are desired to be propagated therethrough, such as mobile telephone signals. The solid conductive junction that is disposed on the printed circuit board is electrically and thermally conductive, such as copper. |
| US09520739B2 |
Wireless charging circuit, wireless charging system and semiconductor device
To satisfy the NFC communication standard in wireless charging with a shared antenna, used for NFC communication. A power supply unit includes a voltage step-down circuit 331, a charge control circuit 332, and a communication controller power supply circuit 333. The voltage step-down circuit includes a switching regulator 200, and a selection circuit 206 and 208 which can select an output path PT1 of the switching regulator and a bypass path PT2 of the switching regulator. The voltage step-down circuit includes a selection control circuit 207. The selection control circuit supplies voltage to the communication controller power supply circuit via the bypass path at the time of activating the communication controller. Since the output voltage of the series regulator stabilizes in a shorter time than the switching regulator, it becomes possible to keep the time from when RF power rises to when initial communication becomes possible, within standards. |
| US09520736B2 |
Charging control apparatus and charging control method for secondary battery
A charging control apparatus for a secondary battery, including a current control apparatus for, upon charging for a secondary battery from an electric generator regenerating kinetic energy as regenerative energy, performing control so as to suppress charging current for the secondary battery at a start of charging to a predetermined suppression rate with respect to charging current at the start of charging in the case that the charging current is not suppressed, and decrease the suppression rate as time elapses. |
| US09520735B2 |
Storage battery control system and storage battery control method
A storage battery control system comprises multiple storage batteries disposed in a power grid, and a storage battery control apparatus. The storage battery control apparatus is communicably coupled to the multiple storage batteries and an energy management system. The storage battery control apparatus acquires storage battery information comprising a charging-discharging performance and a remaining capacity from each of the storage batteries, acquires power supply-demand prediction information showing a prediction of power supply and demand in a prescribed range from the energy management system, decides an individual charging-discharging rate for each of the storage batteries based on the storage battery information and the power supply-demand prediction information, and sends the decided individual charging-discharging rate to each of the storage batteries. Each of the storage batteries operates based on the individual charging-discharging rate received from the storage battery control apparatus. |
| US09520734B2 |
Control apparatus
A control apparatus is used for a power-supply apparatus with power-supply systems connected in parallel between a pair of power wires connected to a load. Each power-supply system has a series circuit of a battery and a contact of a relay. When the control apparatus determines that at least one relay suffers from a contact welding, the control apparatus performs a battery charge/discharge process to charge/discharge the batteries through the pair of power wires by turning ON one of possible relays while turning OFF the others of the possible relays. The possible relay is defined as having a possibility of suffering from the contact welding. After the battery charge/discharge process, the control apparatus identifies which possible relay actually suffers from the contact welding based on a change in a state of the battery connected in series with the contact of each possible relay. |
| US09520730B2 |
Method and system for charging high voltage battery packs
A method and system for charging high voltage battery packs includes connecting a charger to a power source, connecting the charger to a battery pack, connecting a computer to a battery energy control module of the battery pack and charging the battery pack from the power source through the charger by running a software program on the computer and a system for conducting the method. |
| US09520729B2 |
Charging connector of mobile power pack
A charging connector of a mobile power pack, used for being connected to and charging an electronic product, includes an insulating body, a first connector and a second connector both protruding from and exposed outside the insulating body. The first connector is plugged into a charging slot of the electronic product. The second connector is electrically connected to the first connector and is plugged into a power slot of the mobile power pack. The insulating body extends from one side of the first connector and is connected to the second connector. The first connector and the second connector are respectively plugged into the electronic product and the mobile power pack, via the insulating body. Thereby, the convenience of utilizing the power mobile pack to charge the electronic product is improved. |
| US09520728B2 |
Diagnostic charging cradle and methods of using the same
A device and method for charging and testing an animal stimulus receiver is provided herein. |
| US09520727B2 |
Gripper assembly for battery charging and discharging
Provided is a gripper assembly for battery charging/discharging, which is electrically connected to a battery electrode to apply current during battery charging/discharging operation, the gripper assembly including a first electrode lead gripper including a first electrode gripper body disposed to correspond to a first electrode lead of the battery, and a first contact member coupled to one side of the first electrode gripper body and pressed to contact a surface of the first electrode lead and a second electrode lead gripper including a second electrode gripper body disposed to correspond to a second electrode lead of the battery, and a second contact member coupled to a side of the second electrode gripper body and attached to contact a surface of the second electrode lead. |
| US09520726B2 |
Auxiliary device having energy harvester and electronic device including auxiliary device
An auxiliary device including an energy harvester and an electronic device including the auxiliary device are provided. The auxiliary device includes: a housing; a storage module which is moveable within the housing; and at least one piezoelectric transducer which disposed in the housing, such that a motion of the storage module causes a deformation of the piezoelectric transducer, thus generating electric energy. An end of the piezoelectric transducer may be fixedly connected to the storage module. |
| US09520724B2 |
Inductive power supply
A method for wirelessly powering a load over an inductive link, wherein the inductive link is between a primary side and a secondary side, including transmitting a first power from the primary side to the secondary side; receiving by the primary side a modulated data signal from the secondary side; demodulating the received data signal; determining, based on the demodulated data signal, whether to transmit power to the load; and transmitting, based on the determination, power to the load of the secondary side over the inductive link. |
| US09520723B2 |
Power device having multiple plug assemblies
A power device including a power circuit assembly, a first plug assembly, and a second plug assembly is described herein. The first plug assembly is coupled to the power circuit assembly for transmitting power from a power source to the power circuit assembly at a first voltage. The second plug assembly is coupled to the power circuit assembly for controllably transmitting power from the power source to the power circuit assembly at a second voltage and at a third voltage. |
| US09520710B2 |
Thermal trip assembly and circuit interrupter including the same
A thermal trip assembly for use with a busbar includes a fastener, an insulating sleeve, a temperature sensor structured to sense a temperature of the busbar, and a thermal trip circuit structured to output a trip signal based on the sensed temperature. A portion of the insulating sleeve is disposed between the temperature sensor and the busbar. The fastener couples the insulating sleeve and the temperature sensor to the busbar with the insulating sleeve being in direct contact with a portion of the busbar. |
| US09520699B2 |
Switchgear
An object is to provide a switchgear having a simple structure. To solve the problem, a switchgear according to the invention is characterized by having a fixed side electrode 3, a movable side electrode 4 configured to come into contact with or separate from the fixed side electrode 3, and an operating mechanism configured to allow drive force for movement of the movable side electrode 4 to be generated, wherein the operating mechanism for operating the movable side electrode 4 includes one operating mechanism, and the one operating mechanism allows the movable side electrode 4 to stop at three or more positions. |
| US09520697B2 |
Manufacturable multi-emitter laser diode
A method for manufacturing a multi-emitter laser diode device includes providing a substrate having a surface region and forming epitaxial material overlying the surface region, the epitaxial material comprising an n-type cladding region, an active region comprising at least one active layer overlying the n-type cladding region, and a p-type cladding region overlying the active layer region. The epitaxial material is patterned to form a plurality of dice, each of the dice corresponding to at least one laser device, characterized by a first pitch between a pair of dice, the first pitch being less than a design width. Each of the plurality of dice are transferred to a carrier wafer such that each pair of dice is configured with a second pitch between each pair of dice, the second pitch being larger than the first pitch. |
| US09520696B2 |
Processes for making reliable VCSEL devices and VCSEL arrays
A set of VCSEL fabrication methods has been invented which enhance the performance and long time reliability of VCSEL devices and arrays of devices. Wafer bow caused by growing a large number of epitaxial layers required to fabricate VCSEL device generates strain and results in bowing/warping of the device wafer. The stress so generated is eliminated by applying a stress compensation layer on the substrate to a surface opposite to the epitaxial layer surface. New oxidation equipment designs and process parameters are described which produce more precision apertures and reduce stress in the VCSEL device. An ultrathin fabrication procedure is described which enables high power VCSELs to be made for high power operation at many different wavelengths. A low temperature electrical contacting process improves VCSEL long term reliability. |
| US09520693B2 |
Laser processing machine
A laser processing machine includes a plurality of collimating lenses to convert a laser beam from a laser oscillator, which have been emerged from a point of emergence of a transmission optical fiber, into parallel rays of light, a condensing lens to condense the laser beam and then radiate it onto a work, and a nozzle positioned on one side of the work remote from the condensing lens. The distance from the point of emergence to the tip of the nozzle remains unchangeable. The collimating lenses are spaced from each other in a direction parallel to an optical axis. A switching device switches the position of each of the collimating lenses in the orthogonal direction so that the center of one of the collimating lenses may be aligned with a center of the laser beam. The collimating lenses have respective focal lengths that are different from each other. |
| US09520692B2 |
Audio visual faceplate with integrated hinged termination method for circular connector
A communication system has a support and a communication connector attached to the support wherein the connector assembly has a termination lever. The system can further include a wire cap connected to a plurality of cable conductors. The wire cap can include a cover cap. The cover cap latches to the connector assembly when the wire cap and the plurality of cable conductors is terminated to the communication connector assembly. The support can be one of a faceplate, a patch panel, a surface mount box, or a media distribution unit. |
| US09520691B2 |
Use of crushable connector interface
A connector is disclosed. The connector includes a conductive housing. The conductive housing includes a wall region enclosing a space for receiving an adapter. The conductive housing also includes an annular end piece extending radially inward from a first end of the wall region and terminating the space. The annular end piece includes a flat annular surface, and a raised deformable annulus mounted on the flat annular surface. The raised deformable annulus is of a height such that an insertion of the adapter into the space deforms the raised deformable annulus to generate a physical contact connection between the flat annular surface and the adapter. |
| US09520688B2 |
Joint assembly for a busduct
A busduct joint assembly comprising a stack of electrically insulating separator plates, a respective busbar receiving gap between defined between each pair of separator plates for receiving respective busbar ends of adjacent busduct sections therein to be in electrical contact with at least one connector plate located therein, upper and lower cover plates being located on either side of the stack of separator plates, a fastener extending between the cover plates and through mutually aligned apertures formed therein in order to clamp the separator plates and connector plates between the cover plates, a side cover being provided on at least one side of the separator plates and having at least one heat exchange rib extending into the stack of separator plates, wherein the at least one heat exchange rib extends between adjacent pairs of separator plates, on an opposite side of the separator plates from the associated busbar receiving gap. |
| US09520682B2 |
Shielding electrical connector and method of making the same
An electrical connector electrically for connecting a chip module having a contacting surface to a printed circuit board includes an insulative housing, a number of terminals received therein and a number of shielding plates received in the insulative housing and located around the terminals. The insulative housing is insert molded with the shielding plates and the terminals and includes a plurality of through slots. The terminals are formed by separated from the shielding plates by the through slot. |
| US09520680B2 |
Electrical connector with two grounding bars
An electrical connector includes a housing defining a front and a rear and a first group of contacts. The housing includes a rear base and a front mating tongue defining a first face and a second face opposite to the first face. The first group of contacts is held in the first face of the front mating tongue, the contacts include grounding contacts and signal contacts, each contact includes a retained portion retained in the housing, a contacting portion exposed upon the first face and a connecting leg. The contacting portions of the grounding contacts electrically connect with each other, the retained portions of the grounding contacts electrical connect with each other to reduce electrical length of the electrical connector. |
| US09520677B2 |
Flippable electrical connector
A plug connector includes a connector body defining a front mating cavity with a first inner side and a second inner side opposite to the first inner side, and a rear cable supporting platform with a first surface and a second surface opposite to the first inner side and a plurality of terminals. The terminals include two rows of contacting sections arranged along the first and second inner sides of the mating cavity and soldering legs extending to the platform to be welded to a cable. The soldering legs are arranged in one row and exposing to the first surface of the platform while the second surface of the platform has no soldering legs to be welded to the cable. |
| US09520676B1 |
Communication connector
A communication connector is provided which can selectively provide compensation to the electrical circuits thereof. The communication connector includes a housing, a circuit board arrangement, contacts and a switchable device. The circuit board arrangement is disposed in the housing and includes electrical circuits and contact pads electrically connected to each other; the contacts is disposed at the circuit board arrangement and electrically connected to the electrical circuits respectively; the switchable device is movable in relative to the circuit board arrangement and has a compensation circuit board and switching contacts electrically connected to each other. The switchable device can be selectively moved to a predetermined position to enable the switching contacts to make contact with the contact pads respectively and enable the compensation circuit board to electrically connect to the electrical circuits. |
| US09520672B2 |
Closing cap for a plug-and-socket connector
Disclosed is a closing cap for media-tight sealing of a plug face of a plug-and-socket connector, in particular a round plug-and-socket connector, wherein the closing cap can be detachably fixed to a plug-and-socket connector housing, wherein the closing cap is configured, such that a further closing cap of identical construction can be detachably fixed to the closing cap. The closing caps can be stored, for example stacked one on top of the other, on a plug-and-socket connector housing in a switchgear cabinet. This simplifies storage in that when a closing cap is removed from one connector it may be stored on a closing cap of an adjacent connector. |
| US09520671B2 |
Configurable safety light receptacle
An electrical receptacle provide outlets and a cavity for receiving an insert. The insert connects to the electrical main through the receptacle and can provide additional functionality through the insert including emergency lighting, night lighting, gas detectors and charging connections. |
| US09520668B2 |
Method and apparatus for crimping an electrical terminal to an electrical wire
A method is provided for crimping an electrical terminal to an electrical wire having electrical conductors. The method includes positioning the electrical wire and the electrical terminal between opposing crimp tooling members of a crimp tool. The method also includes pressing a crimp barrel of the electrical terminal against the electrical conductors of the electrical wire using the crimp tooling members such that the electrical conductors are mechanically and electrically connected to the crimp barrel. The crimp barrel is pressed against the electrical conductors such that at least some contact portions of metallic surfaces of at least some of the electrical conductors melt and form hot weld bonds with one or more contact portions of the metallic surface of one or more adjacent electrical conductors. |
| US09520667B2 |
Connector
A connector (10) includes a main body (11) including terminal accommodating portions (16A, 16B) capable of accommodating terminal fittings (60) and a cover (12) to be mounted on the main body (11) to cover the terminal fittings (60) accommodated in the terminal accommodating portions (16A, 16B). Wire draw-out openings (23) from which wires (90) are drawn out are formed to be open between joint parts of the cover (12) and the main body (11) with the cover (12) mounted on the main body (11). Resilient supporting portions (24) are provided on opening edge parts of the wire draw-out openings (23) for supporting the wires (90) by resiliently contacting outer peripheral surfaces of the wires (90) at a plurality of circumferentially spaced-apart positions. |
| US09520666B2 |
Contact carrier with a tolerance-compensating portion
The disclosure relates to a contact carrier including an electrical contact and a contact arm which is connected to the electrical contact in an electrically conducting manner. The contact arm includes a tolerance-compensating portion and a contact base formed on the tolerance-compensating portion for electrically contacting the electrical contact with a contact surface. |
| US09520665B2 |
Electrically connecting structure, glass plate with terminal having the same, and method of manufacturing glass plate with terminal
An electrically connecting structure includes a glass plate, a feeding part formed on the glass plate, a terminal having a base part opposing the glass plate, an adhesive adhering the glass plate and the terminal, and a conductive rubber arranged between the feeding part and the base part. The adhesive is a thermosetting adhesive that once softens when heated and thereafter cures, and is arranged to surround a periphery of the conductive rubber. The feeding part and the base part have electrical continuity via the conductive rubber. |
| US09520664B2 |
Electrical connector
The invention relates to an electrical connector having a connecting sleeve with at least one opening, and at least one fastening element, wherein the connecting sleeve is capable of receiving at least one flexible PCB, and wherein the flexible PCB is secured to the electrical connector when the at least one fastening element is connected to the at least one opening. |
| US09520661B1 |
Electrical connector assembly
An electrical connector assembly includes a housing extending between a mating end and a mounting end. The housing defines plural contact cavities extending through the housing. Signal contacts are disposed in corresponding contact cavities of the housing. The signal contacts are arranged in rows along row axes extending in a longitudinal direction and in columns along column axes extending in a lateral direction. The signal contacts are arranged in pairs. A first set of pairs of signal contacts defining column pairs being arranged in-column along the corresponding column axis and a second set of pairs of signal contacts define cross pairs being arranged across the corresponding column axis. Adjacent pairs of signal contacts along the column axes alternate between column pairs and cross pairs. Adjacent pairs of signal contacts along row axes alternate between column pairs and cross pairs. |
| US09520659B2 |
Connector device for a printed circuit board of a control device for a vehicle transmission, control system for a vehicle transmission and method for assembling a control system for a vehicle transmission
A proposal is made for a plug device for a circuit board of a control unit for a vehicle transmission. The circuit board has at least one contact hole. The plug device has a housing, at least one contact device arranged in the housing for a cable of a peripheral module fed into the housing and at least one contact plug that is electrically connected with the contact device and that protrudes at least partially from the housing for producing an electrical and mechanical connection with the contact hole of the circuit board. |
| US09520652B2 |
Wideband high gain antenna for multiband employment
An antenna element employable singularly or in an array and configured for concurrent RF transmission and receipt on a plurality of frequencies concurrently. The element is formed of conductive material on a substrate by a pair of substantially identical horns extending in opposite directions to distal tips. A cavity formed between the horns narrows to a narrowest point prior to curving. The element is capable of wideband RF communication on any frequency between a low frequency defined by the distance between the distal tips to a highest frequency defined by the narrowest point of the cavity. The antenna is especially well adapted for portable devices such as smartphones where concurrent cellular, Wi-Fi, and bluetooth communications may be accomplished with a single element. A dielectric planar substrate positioned between the antenna element and a tethered device is employable to reduce a spacing requirement therebetween. |
| US09520642B2 |
Pneumatic non-locking low-profile telescoping masts
A telescoping mast assembly having a mast axis and comprising a plurality of telescoping mast sections having axially opposite ends and being axially slidable relative to one another along the mast axis between retracted and extended positions, the telescoping mast sections including a base tube adapted to be fixed to a support surface and an innermost telescoping section, and wherein the innermost telescoping section supports a cylindrical nest lock platform assembly adapted to cover an axial end of the base tube when the mast assembly is in the retracted position, wherein each telescoping mast section includes an internal collar and a cylindrical body and the nest lock platform assembly includes a payload platform and one or more wedges that mate with corresponding notches in the internal collar. |
| US09520641B2 |
Antenna assembly and electronic device using the antenna assembly
An antenna assembly which can be adapted for the metal housing of any wireless device includes a feeding terminal, a first radiator connecting to the feeding terminal, a second radiator positioned parallel and adjacent to the first radiator, and a metal element connecting to the second radiator. The wireless signal fed to the first radiator can be coupled to the second radiator, and flows through the metal element to ground, thus utilizing the metal housing itself in the wireless transmission and reception process. An electronic device using the antenna assembly is also described. |
| US09520638B2 |
Hybrid radio frequency / inductive loop antenna
Biometric monitoring devices, including various technologies that may be implemented in such devices, are discussed herein. Additionally, techniques, systems, and apparatuses are discussed herein for providing a hybrid antenna including an RF radiator and an electrically coupled inductive loop. The hybrid antenna is capable of providing both RF and induction functionality, e.g., radio frequency transmission/reception capabilities for Bluetooth as well as near-field-communications (NFC) functionality via the inductive loop. The inductive loop may be in conductive contact with the RF radiator or may be inductively coupled with the RF radiator and not in conductive contact with the RF radiator. The inductive loop may act as a planar element of a planar inverted-F antenna (PIFA). |
| US09520634B2 |
Resonance device
A resonance device is disclosed. The resonance device in accordance with an embodiment of the present invention includes: a case including a first ground surface and a second ground surface which face each other; a stacked part formed inside the case by stacking a first conductive layer and a second conductive layer, wherein the first conductive layer is grounded to the first ground surface and the second conductive layer is separated from the first conductive layer without being grounded to the first ground surface; and a transmission layer connecting the second conductive layer to the second ground surface. |
| US09520630B2 |
Isolation devices that pass coupler output signals
Various embodiments are directed to isolation devices, systems, methods and various means, for isolating ignition causing signals and/or explosions from hazardous or explosive environments. |
| US09520626B2 |
Expandable stacked plate heat exchanger for a battery unit
A heat exchanger for cooling battery cell containers in a battery unit is disclosed. The heat exchanger includes individual heat exchanger modules that are fluidly interconnected and spaced apart from each other so as to accommodate individual battery cell containers arranged between adjacent heat exchanger modules to form a battery unit. Each heat exchanger module is formed by a pair generally planar first and second heat exchanger plates having a main section and flexible inlet and outlet panels extending therefrom. The heat exchanger is formed by a stack of alternating first and second plates that are brazed together to form heat exchanger modules, the heat exchanger modules formed in the stack being interconnected by their inlet and outlet panels and expanded post-brazing by bending/flexing the inlet and outlet panels to provide adequate spacing or gaps between the modules to accommodate battery cell containers. |
| US09520624B2 |
Battery module with compact structure and excellent heat radiation characteristics and middle or large-sized battery pack employed with the same
Disclosed herein is a battery module configured to have a structure in which a plurality of battery cells, each of which includes an electrode assembly of a cathode/separator/anode structure mounted in an electrode assembly receiving part, is mounted in a module case in a state in which the battery cells are arranged in a lateral direction such that the electrode assembly receiving parts of the respective battery cells are adjacent to one another, wherein a plurality of cooling members is disposed between the battery cells, and each of the cooling members includes a heat dissipation fin disposed between adjacent electrode assembly receiving parts in a tight contact state and a coolant conduit configured to have a hollow structure in which a coolant flows and mounted to the heat dissipation fin along outer edges of each of the electrode assembly receiving parts. |
| US09520621B2 |
Method for detecting a triggering of a security device
The disclosure relates to a method for detecting a triggering of a security device. The security device is associated with a battery cell and is triggered if a security-critical situation is present in the battery cell. Initially an actual time path of a parameter of the battery cell is detected. At the same time, an expected time path of the parameter is determined, in particular using a model. Then, the actual time path is compared to the expected time path of the parameter. Finally, based on the comparison, it is determined whether to trigger the security device or not. |
| US09520618B2 |
Electrochemical energy storage devices
Pressure relief mechanisms can provide an outlet for cathode pressure buildup during battery operation. Mechanical cathode modifications can control cathode interfaces during battery operation. Pressure relief mechanisms and mechanical modifications can be utilized to improve performance, longevity and/or to prevent failure of batteries, such as during cycling of liquid metal batteries. |
| US09520615B2 |
Thin film battery having improved battery performance through substrate surface treatment and method for manufacturing same
Disclosed are a thin film battery in which a negative electrode active material and a substrate side react with each other to prevent battery performance from deteriorating, and to a method for manufacturing same. The thin film battery according to the present invention has a structure in which a negative electrode active material contacts a substrate. Here, a first surface treatment layer containing the negative electrode active material and a non-reactive material are disposed on at least the portion where the negative electrode active material contacts the surface of the substrate. |
| US09520613B2 |
Battery control with block selection
A battery block is equipped with a plurality of battery blocks. Each of the battery blocks includes at least one battery cell to provide a block voltage of the battery block. A first number of the battery blocks is selected, and the first number of the battery blocks is coupled to voltage terminals of the battery to set a battery voltage which corresponds to the sum of the block voltages of the first number of battery blocks. Further, a second number of the battery blocks is selected, and the second number of battery blocks is coupled to the voltage terminals of the battery to set a battery voltage which corresponds to the sum of the block voltages of the second number of battery blocks. |
| US09520612B2 |
Fuel cell
There is provided a fuel cell. The fuel cell comprises a stacked body that has a stacked configuration by stacking a plurality of single fuel cells; a fastening support member that is extended along a stacking direction of the plurality of single fuel cells and is configured to fasten the stacked body in the stacking direction; and an impact transmission member that is configured to include a dilatant fluid and is placed between the stacked body and the fastening support member to be arranged in a location corresponding to multiple consecutive single fuel cells along the stacking direction among the plurality of single fuel cells. |
| US09520604B2 |
Slip stream for reliable anode to cathode flow in freeze conditions
A device and method for ensuring proper fuel cell system warmup or shutdown during freeze conditions. A three-way valve is used in conjunction with a flow-controlling orifice to ensure that the orifice avoids ice blockage during frozen conditions. Dry, warm air is delivered as a slip stream under pressure to a cathode flowpath, where the construction of the orifice is such that it is structurally compliant to promote flexing in response to the pressurized slip stream, thereby helping to break up any small amount of ice that may have formed in or on the orifice. |
| US09520601B2 |
Heater and method of operating
A heater includes a heater housing extending along a heater axis. A fuel cell stack assembly is disposed within the heater housing and includes a plurality of fuel cells which convert chemical energy from a fuel into heat and electricity through a chemical reaction with an oxidizing agent. A combustor disposed within the heater housing receives an anode exhaust and a cathode exhaust from the fuel cell stack assembly and combusts a mixture of the anode exhaust and the cathode exhaust to produce a heated combustor exhaust. The combustor includes a combustor exhaust outlet for discharging the heated combustor exhaust into the heater housing. The heater housing is heated by the fuel cell stack assembly and the heated combustor exhaust. |
| US09520597B2 |
Cathode material, interconnector material and solid oxide fuel cell
A cathode material for a solid oxide fuel cell comprises a complex oxide having a perovskite structure expressed by the general formula ABO3, a content amount of P included in the complex oxide being at least 1 ppm and no more than 50 ppm, a content amount of Cr in the complex oxide being at least 1 ppm and no more than 500 ppm, and a content amount of B in the complex oxide being at least 1 ppm and no more than 50 ppm in a weight ratio relative to a total weight of the complex oxide. |
| US09520592B2 |
Lithium secondary battery
A lithium secondary battery exhibiting low temperature output characteristics is provided. The lithium secondary battery of the present invention includes a current collector 12, and an active material layer 14 which is supported on the current collector 12 and contains active material particles 30 and electrically conductive material 16. The active material particles 30 each have a shell composed of a lithium transition metal oxide, a hollow part formed in the shell, and a through hole penetrating the shell. The electrically conductive material 16 contained in the active material layer 14 are arranged both in the hollow part of the active material particles and between the active material particles 30. |
| US09520591B2 |
Methods of coating an electrically conductive substrate and related electrodepositable compositions
Methods are disclosed in which an electrically conductive substrate is immersed into an electrodepositable composition, the substrate serving as an electrode in an electrical circuit comprising the electrode and a counter-electrode immersed in the composition, a coating being applied onto or over at least a portion of the substrate as electric current is passed between the electrodes. The electrodepositable composition comprises: (a) an aqueous medium; (b) an ionic resin; and (c) solid particles. |
| US09520589B2 |
Secondary battery of improved lead structure
Disclosed is a secondary battery of an improved lead structure including an electrode assembly including a cathode plate having a cathode tab, an anode plate having an anode tab, and a separator stacked in an alternate manner, a battery casing to receive the electrode assembly, a cathode lead electrically connected to the cathode tab, and an anode lead electrically connected to the anode tab, wherein at least one electrode tab of the cathode tab and the anode tab is electrically connected to the corresponding electrode lead at a plurality of joints and the number of the electrode leads is smaller than the number of the joints between the electrode tab and the electrode lead. |
| US09520588B2 |
Nonaqueous electrolyte secondary cell
A nonaqueous electrolyte secondary battery includes: an electrode group including a positive electrode plate, a negative electrode plate, and a separator. The positive and negative electrode plates are wound with the separator interposed therebetween. The positive electrode plate includes a first current collector exposed portion where a portion of the positive electrode current collector corresponding to an outermost portion of the electrode group is exposed over a length of greater than or equal to one turn in a winding direction of the electrode group, and a second current collector exposed portion where a portion of the positive electrode current collector corresponding to a middle portion of the electrode group is exposed over a length of greater than or equal to one turn in the winding direction. A positive electrode lead is provided on the second current collector exposed portion so as to be connected to an external electrode. |
| US09520586B2 |
Battery module
A battery module includes a battery module housing, a plurality of battery cells accommodated in the battery module housing and electrically interconnected, a first connecting piece forming a first voltage polarity that is conductively connected to one of the battery cells, and a second connecting piece forming a second voltage polarity that is conductively connected to another one of the battery cells. The battery module housing includes a passage at each of at least three occupiable spots. The first connecting piece is arranged in one of the passages. The second connecting piece is arranged in another one of the passages. |
| US09520585B2 |
Assembled battery and cell connection method
An assembled battery comprises: multiple cells 30 each having external terminals including a negative electrode terminal 50 and a positive electrode terminal; a bus bar 40 which connects the external terminal of one of two adjacent cells 30 and that of the other thereof; an electrically-conductive connecting member 70 which connects the external terminal and the bus bar 40 by welding to the external terminal and the bus bar 40; a welding portion 80 welded to the bus bar 40 and the connecting member 70; and a welding portion 82 welded to the external terminal and the connecting member 70. The connecting member 70 comprises an intervening portion 70b connected to the welding portion 80, and a main body portion 70a extending from the intervening portion 70b to the welding portion 82. The intervening portion 70b has a thickness that is smaller than that of the main body portion 70a. |
| US09520576B2 |
Gas barrier film and electronic apparatus
A gas barrier film (10) that comprises a gas barrier layer (14), which is obtained by irradiating a layer that contains a polysilazane with vacuum ultraviolet light, on a base (11) is formed to contain a compound (A) that satisfies all of the conditions (a), (b) and (c) described below in an amount within the range from 1% by mass to 40% by mass (inclusive) relative to the total mass of the gas barrier layer. (a) The compound (A) has an Si—O bond and an organic group that is directly bonded to Si. (b) The compound (A) has an Si—H group or an Si—OH group. (c) The compound (A) has a molecular weight of from 90 to 1,200 (inclusive). |
| US09520575B2 |
Organic light-emitting component and use of a copper complex in a charge transport layer
An organic light-emitting component has an active layer for emitting electromagnetic radiation. It also has an anode and an organic charge transport layer, arranged between the active layer and the anode, for transporting charge carriers from the anode to the active layer. The anode can be used to decouple electromagnetic radiation emitted by the active layer from the organic light-emitting component. The organic charge transport layer comprises a copper complex which has at least one ligand with the chemical structure as per a formula I. |
| US09520572B2 |
Electronic device and method of manufacturing semiconductor device
There is provided an electronic device including at least a first electrode, a second electrode disposed to be spaced apart from the first electrode, and an active layer disposed over the second electrode from above the first electrode and formed of an organic semiconductor material. A charge injection layer is formed between the first electrode and the active layer and between the second electrode and the active layer, and the charge injection layer is formed of an organic material having an increased electric conductivity when the charge injection layer is oxidized. |
| US09520571B2 |
Organic photoelectric device and image sensor
An organic photoelectric device may include a first electrode and a second electrode facing each other and an active layer between the first electrode and the second electrode, the active layer including a compound represented by Chemical Formula 1 and a compound represented by Chemical Formula 2. An image sensor may include the organic photoelectric device. |
| US09520570B2 |
Organic electronic device and method for the production thereof
An organic electronic device comprising: a substrate; (1), a first electrode; (2), a second electrode (4); and an electron-conducting region (3A, 3B) which is arranged between the first and; second electrodes and comprises an organic matrix material (3B) and a salt (3A) which comprises a metal cation and an at least trivalent anion. |
| US09520568B2 |
Organic light-emitting diode
An organic light-emitting diode including a substrate; a first electrode on the substrate; a second electrode facing the first electrode; and an emission layer between the first electrode and the second electrode, the emission layer including an anthracene-based compound represented by Formula 1, below, and a condensed ring compound represented by Formula 20, below: |
| US09520567B2 |
Luminescent material for organic optoelectric device and organic optoelectric device and display device
Disclosed are a luminescent material for an organic optoelectric device represented by Chemical Formula 1, an organic optoelectric device including the luminescent material for an organic optoelectric device, and a display device including the organic optoelectric device. |
| US09520564B2 |
Photoelectric conversion material, method for producing the same, and organic photovoltaic cell containing the same
A bulk heterojunction-type organic photovoltaic cell, i.e., BHJ solar cell, has a photoelectric conversion layer containing a mixture of a donor domain and an acceptor domain. The donor domain contains a polymer as a donor (photoelectric conversion material), and the polymer is obtained by reaction of a polyphenylene represented by the following general formula (1). For example, the acceptor domain contains phenyl-C61-butyric acid methyl ester (PCBM) as an acceptor. At least one of R1 to R6 in the general formula (1) is an alkoxy group, and R7 to R10 independently represent a hydrogen atom, an alkyl group, or an alkoxy group. |
| US09520561B1 |
Controlling on-state current for two-terminal memory
Provision of fabrication, construction, and/or assembly of a memory device including a two-terminal memory portion is described herein. The two-terminal memory device fabrication can provide enhanced capabilities in connection with precisely tuning on-state current over a greater possible range. |
| US09520559B2 |
Heterojunction oxide non-volatile memory device
A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer. The formation of the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer. |
| US09520558B2 |
Semiconductor structures and memory cells including conductive material and methods of fabrication
Methods of forming conductive elements, such as interconnects and electrodes, for semiconductor structures and memory cells. The methods include forming a first conductive material and a second conductive material comprising silver in a portion of at least one opening and performing a polishing process to fill the at least one opening with at least one of the first and second conductive materials. An annealing process may be performed to form a mixture or an alloy of the silver and the first conductive material. The methods enable formation of silver containing conductive elements having reduced dimensions (e.g., less than about 20 nm). The resulting conductive elements have a desirable resistivity. The methods may be used, for example, to form interconnects for electrically connecting active devices and to form electrodes for memory cells. A semiconductor structure and a memory cell including such a conductive structure are also disclosed. |
| US09520557B2 |
Silicon based nanoscale crossbar memory
The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials. |
| US09520549B2 |
Piezoelectric material, piezoelectric element, and electronic apparatus
A piezoelectric material includes, as a main component, a perovskite-type metal oxide represented by a general formula (Ba1-xCax)a(Ti1-y-zSnyZrz)O3 where 1.00≦a≦1.01, 0.125≦x≦0.300, 0≦y≦0.020, and 0.041≦z≦0.074, the perovskite-type metal oxide containing copper (Cu) and manganese (Mn). A Cu content relative to 100 parts by weight of the metal oxide is 0.02 parts by weight or more and 0.60 parts by weight or less on a metal basis, and a Mn content relative to 100 parts by weight of the metal oxide is 0.12 parts by weight or more and 0.40 parts by weight or less on a metal basis. |
| US09520548B2 |
Amplified piezo actuator with motorized adjustment screw
A piezoelectric actuator with integrated features to provide linear displacement of a threaded rod is presented. One mechanism provides mechanically amplified piezo motion for high speed/short travel position scanning whereas the other provides a low speed/long travel piezo motorized position adjustment. Mechanical amplifier incorporates one or more piezo stacks in longitudinal axis with preload to translate an amplified motion in the order of a few times in the transverse axis, perpendicular to the piezo stack motion. The piezo amplified output travel is transmitted to the internally threaded features of the other mechanism where a screw with a ball at the end to push a desired surface for high speed scanning mode translation. The internally threaded feature of the other mechanism is also operated by a secondary piezo stack which produces slip-stick motion steps to rotate the screw in one direction or the other to produce a slow speed/long travel mode. |
| US09520543B2 |
Light-emitting diode module having light-emitting diode joined through solder paste and light-emitting diode
Disclosed are a light emitting diode and a light emitting diode module. The light emitting diode module includes a printed circuit board and a light emitting diode joined thereto through a solder paste. The light emitting diode includes a first electrode pad electrically connected to a first conductive type semiconductor layer and a second electrode pad connected to a second conductive type semiconductor layer, wherein each of the first electrode pad and the second electrode pad includes at least five pairs of Ti/Ni layers or at least five pairs of Ti/Cr layers and the uppermost layer of Au. Thus a metal element such as Sn in the solder paste is prevented from diffusion so as to provide a reliable light emitting diode module. |
| US09520540B2 |
Light-emitting device with phosphor excited by blue excitation light
A light-emitting device of an embodiment includes a light-emitting element emitting blue excitation light and a first phosphor excited by the blue excitation light and emitting fluorescence. A peak wavelength of the fluorescence is not shorter than 520 nm and shorter than 660 nm and the peak wavelength of the fluorescence shifting in the same direction when a peak wavelength of the blue excitation light shifts. The first phosphor is one of a yellow phosphor emitting yellow fluorescence, a green phosphor emitting green fluorescence, a yellow-green/yellow phosphor emitting yellow-green/yellow fluorescence and a red phosphor emitting red fluorescence. |
| US09520536B2 |
Light emitting diode chip having electrode pad
Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area. |
| US09520534B2 |
Light emitting diode, method of fabricating the same and LED module having the same
Disclosed are a light emitting diode (LED), an LED module including the same, and a method of fabricating the same. The light emitting diode includes a first conductive-type semiconductor layer; a second conductive-type semiconductor layer; an active layer interposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer; a first electrode pad region electrically connected to the first conductive-type semiconductor layer; a second electrode pad region electrically connected to the second conductive-type semiconductor layer; and a spark gap formed between a first leading end electrically connected to the first electrode pad region and a second leading end electrically connected to the second electrode pad region. The spark gap can achieve electrostatic discharge protection of the light emitting diode. |
| US09520531B2 |
Systems and methods for depositing and charging solar cell layers
Systems and methods of the present invention may be used to charge a layer (such as a passivation layer and/or antireflective layer) of a solar cell (e.g., wafer) with a positive or negative charge. The layer may retain the charge to improve operation of the solar cell. The charged layer may include any suitable dielectric material capable of retaining either a negative or a positive charge. Systems and methods of the present invention permit in-situ charging of a layer. Charging of a layer may be accomplished during or after deposition of the layer including after completing the whole solar cell process, in other words, on a finished cell. |
| US09520529B2 |
Composition for forming P-type diffusion layer, method of forming P-type diffusion layer, and method of producing photovoltaic cell
The composition for forming a composition for forming a p-type diffusion layer, the composition containing a glass powder and a dispersion medium, in which the glass powder includes an acceptor element and a total amount of a life time killer element in the glass powder is 1000 ppm or less. A p-type diffusion layer and a photovoltaic cell having a p-type diffusion layer are prepared by applying the composition for forming a p-type diffusion layer, followed by a thermal diffusion treatment. |
| US09520526B2 |
Manufacturing method of avalanche photodiode
A manufacturing method of an avalanche photodiode includes: forming a p-type field relaxation layer on a substrate; forming a cap layer on the p-type field relaxation layer; and forming a light absorbing layer on the cap layer, wherein a carbon is doped in the p-type field relaxation layer as a p-type dopant, the p-type field relaxation layer contains Al in a crystal composition, and a temperature-rise process from a growth temperature of the cap layer to a growth temperature of the light absorbing layer is performed in an inactive gas atmosphere without introducing a group V raw material. |
| US09520517B2 |
Solar cell
A solar cell including a non-amorphous semiconductor substrate of a first conductive type; at least a first semiconductor layer on the non-amorphous semiconductor substrate, the first semiconductor layer including a portion that is amorphous and a plurality of portions having crystal lumps, so that the plurality of portions having the crystal lumps are distributed in the first semiconductor layer; a first electrode on the semiconductor substrate; and a second electrode on the semiconductor substrate. |
| US09520514B2 |
Quantum dot infrared photodetector
A quantum dot infrared photodetector (QDIP) that can enhance the photocurrent to a greater level than the dark current and/or can be operated at high temperatures is disclosed. The quantum dot infrared photodetector comprises at least one quantum well stack and a plurality of quantum dot layers. The quantum well stack is disposed between the pluralities of quantum dot layers. The quantum well stack comprises two spacer layers and a carrier supplying layer. The carrier supplying layer is disposed between the spacer layers. When the quantum dot infrared photodetector is applied with two bias voltages respectively, the carrier supplying layer supplies carriers to the quantum dot layers. |
| US09520513B2 |
Photovoltaic devices including heterojunctions
A photovoltaic cell including a first semiconductor layer that includes a III-V compound semiconductor, the first semiconductor layer positioned over a transparent conductive layer, and a second semiconductor layer that includes a II-VI compound semiconductor, the second semiconductor layer positioned between the first semiconductor layer and a back metal contact. The photovoltaic cell further includes an interfacial layer between the first and second semiconductor layers that enhances a rectifying junction formed between the III-V and II-VI compound semiconductor materials. |
| US09520511B2 |
Apparatus and method for optically initiating collapse of a reverse biased P-type-N-type junction to cause a semiconductor switch to transition from a current blocking mode to a current conduction mode
An optical method of collapsing the electric field of an innovatively fabricated, reverse-biased PN junction causes a semiconductor switch to transition from a current blocking mode to a current conduction mode in a planar electron avalanche. This switch structure and the method of optically initiating the switch closure is applicable to conventional semiconductor switch configurations that employ a reverse-biased PN junction, including, but not limited to, thyristors, bipolar transistors, and insulated gate bipolar transistors. |
| US09520510B2 |
Embedded optical sensors using transverse Fabry-Perot resonator as detectors
A detector to detect light of a wavelength range and an incidence angle range, the detector including a substrate, a plurality of dielectric structures on the substrate, each one of the plurality of dielectric structures being to receive light through a side of the dielectric structure opposite the substrate, and a plurality of conductive structures on the substrate, consecutive conductive structures of the plurality of conductive structures having a corresponding dielectric structure of the plurality of dielectric structures therebetween, wherein the consecutive conductive structures and the corresponding dielectric structure form a cavity to induce an absorption resonance in response to receiving the light of the wavelength range. |
| US09520509B2 |
Sheet assembly with aluminum based electrodes
Various methods for preparing and/or processing electrically conductive aluminum members such as used in electronic circuits and components are described. Also described are various sheet assemblies using patterned aluminum conductive elements as components of electric circuitry. The sheet assemblies can be used as backsheets for back contact photovoltaic cells or as antennas for RFID tags. |
| US09520503B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions. |
| US09520501B2 |
Vertical super-thin body semiconductor on dielectric wall devices and methods of their fabrication
The present invention is a semiconductor device comprising a semiconducting low doped vertical super-thin body (VSTB) formed on Dielectric Body Wall (such as STI-wall as isolating substrate) having the body connection to bulk semiconductor wafer on the bottom side, isolation on the top side, and the channel, gate dielectric, and gate electrode on opposite to STI side surface. The body is made self-aligned to STI hard mask edge allowing tight control of body thickness. Source and Drain are made by etching holes vertically in STI at STI side of the body and filling with high doped crystalline or poly-Si appropriately doped with any appropriate silicides/metal contacts or with Schottky barrier Source/Drain. Gate first or Gate last approaches can be implemented. Many devices can be fabricated in single active area with body isolation between the devices by iso-plugs combined with gate electrode isolation by iso-trenches. The body can be made as an isolated nano-plate or set nano-wire MOSFET's on the STI wall to form VSTB SOI devices. |
| US09520498B2 |
FinFET structure and method for fabricating the same
A device comprises a substrate comprising silicon, a fin structure comprising a lower portion formed of silicon and enclosed by an isolation region, a middle portion formed of silicon-germanium-carbon, wherein the middle portion is enclosed by an oxide layer, an upper portion formed of silicon, wherein the upper portion comprises a channel and a silicon-carbon layer formed between the middle portion and the upper portion, a first source/drain region comprising a first silicon-phosphorus region and a first silicon-carbon layer formed underlying the first silicon-phosphorus region and a second source/drain region comprising a second silicon-phosphorus region and a second silicon-carbon layer formed underlying the second silicon-phosphorus region. |
| US09520497B2 |
Semiconductor devices including a stressor in a recess and methods of forming the same
Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region. |
| US09520495B2 |
Transistor including a stressed channel, a method for fabricating the same, and an electronic device including the same
A semiconductor device includes a first channel, a second channel, a first strained gate electrode including a first lattice-mismatched layer for applying a first stress to the first channel, and a second strained gate electrode including a second lattice-mismatched layer for applying a second stress to the second channel. |
| US09520493B1 |
High voltage integrated circuits having improved on-resistance value and improved breakdown voltage
A high voltage integrated device includes a semiconductor layer having a first conductivity, a source region having a second conductivity and a drift region having the second conductivity which are disposed in the semiconductor layer and spaced apart from each other by a channel region, a drain region having the second conductivity and disposed in the drift region, a gate insulation layer disposed over the channel region, a first field insulation layer and a second field insulation layer which are disposed over the drift region and between the channel region and the drain region, wherein the first field insulation layer and the second field insulation layer are spaced apart from each other, an insulation layer disposed over the drift region and located between the first and second field insulation layers, and a gate electrode disposed over the gate insulation layer, the first field insulation layer, the insulation layer, and the second field insulation layer, wherein the first field insulation layer is adjacent to the channel region and the second field insulation layer is adjacent to the drain region. |
| US09520492B2 |
Semiconductor device having buried layer
A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and formed in the substrate, a drift region formed in the high-voltage well, and a buried layer having the first conductivity type formed below the high-voltage well and vertically aligned with the drift region. |
| US09520488B2 |
Silicon-controlled rectifier electrostatic discharge protection device and method for forming the same
Various embodiments provide SCR ESD protection devices and methods for forming the same. An exemplary device includes a semiconductor substrate having a P-type well region, an N-type well region adjacent to the P-type well region, a first P-type doped region and a first N-type doped region in the P-type well region, and a second N-type doped region and a second P-type doped region in the N-type well region. A first center-doped region and a second center-doped region doped with impurity ions of a same type are located between the first N-type doped region and the second P-type doped region and extend across the P-type well region and the N-type well region. The first center-doped region is located within the second center-doped region, has a doping concentration higher than a doping concentration in the second center-doped region, and has a depth smaller than a depth of the second center-doped region. |
| US09520483B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device may include forming a cavity between two insulating portions that are positioned on a semiconductor substrate. The cavity may include a first cavity portion and a second cavity portion. The second cavity portion may be positioned between the semiconductor substrate and the first cavity portion. A width of the second cavity portion may be less than a width of the first cavity portion. The method may further include providing a set of gate metal material through the first cavity portion into the second cavity portion for forming a metal gate member of the semiconductor device. |
| US09520482B1 |
Method of cutting metal gate
A method for fabricating a semiconductor device includes forming a first fin and a second fin on a substrate. The first fin has a first gate region and the second fin has a second gate region. The method also includes forming a metal-gate line over the first and second gate regions. The metal-gate line extends from the first fin to the second fin. The method also includes applying a line-cut to separate the metal-gate line into a first sub-metal gate line and a second sub-metal gate line and forming an isolation region within the line cut. |
| US09520481B2 |
Electronic devices
A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively. |
| US09520480B1 |
Normally off gallium nitride field effect transistors (FET)
A heterostructure field effect transistor (HFET) gallium nitride (GaN) semiconductor power device comprises a hetero junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer. The power device further comprises a source electrode and a drain electrode disposed on two opposite sides of a gate electrode disposed on top of the hetero junction structure for controlling a current flow between the source and drain electrodes in the 2DEG layer. The power device further includes a floating gate located between the gate electrode and hetero junction structure, wherein the gate electrode is insulated from the floating gate with an insulation layer and wherein the floating gate is disposed above and padded with a thin insulation layer from the hetero junction structure and wherein the floating gate is charged for continuously applying a voltage to the 2DEG layer to pinch off the current flowing in the 2DEG layer between the source and drain electrodes whereby the HFET semiconductor power device is a normally off device. |
| US09520478B2 |
Methods of forming diodes
Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer. |
| US09520476B2 |
Semiconductor device and method for producing same
A semiconductor device (100A) includes a substrate (2), an oxide semiconductor layer (5) formed on the substrate (2), source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5), a first transparent electrode (7) electrically connected to the drain electrode (6d), a dielectric layer (8) formed on the source and drain electrodes (6s, 6d), and a second transparent electrode (9) formed on the dielectric layer (8). The upper and/or lower surface(s) of the first transparent electrode (7) contacts with a reducing insulating layer (8a) with the property of reducing an oxide semiconductor included in the oxide semiconductor layer (5). The second transparent electrode (9) overlaps at least partially with the first transparent electrode (7) via the dielectric layer (8). The oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film. |
| US09520470B1 |
Lateral double diffused metal oxide semiconductor device and manufacturing method thereof
A lateral double diffused metal oxide semiconductor device, includes: a P-type substrate, an epitaxial layer, a P-type high voltage well, a P-type body region, an N-type well, an isolation oxide region, a drift oxide region, a gate, an N-type contact region, a P-type contact region, a top source, a bottom source, and an N-type drain. The P-type body region is between and connects the P-type high voltage well and the surface of the epitaxial layer. The P-type body region includes a peak concentration region, which is beneath and indirect contact the surface of the epitaxial layer, wherein the peak concentration region has a highest P-type impurity concentration in the P-type body region. The P-type impurity concentration of the P-type body region is higher than a predetermined threshold to suppress a parasitic bipolar transistor such that it does not turn ON. |
| US09520465B2 |
Diode, semiconductor device, and MOSFET
Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction. |
| US09520463B2 |
Super junction semiconductor device including edge termination
A super junction semiconductor device includes a super junction structure and a channel stopper structure. The super junction structure includes first and second areas alternately arranged along a first lateral direction and extending in parallel along a second lateral direction. Each one of the first areas includes a first semiconductor region of a first conductivity type. Each one of the second areas includes, along the first lateral direction, an inner area between opposite second semiconductor regions of a second conductivity type opposite to the first conductivity type. The channel stopper structure includes a doped semiconductor region electrically coupled to a field plate. The second semiconductor regions extend along the second lateral direction from the transistor cell area through the edge termination area overlap with the field plate. |
| US09520459B2 |
Surface treatment method for semiconductor device
A surface treatment method for a semiconductor device includes providing a substrate where a plurality of projected patterns are formed, forming a hydrophobic coating layer on a surface of each of the plurality of projected patterns, rinsing the substrate with deionized water, and drying the substrate, wherein the hydrophobic coating layer is formed using a coating agent that includes phosphate having more than one hydrocarbon group, phosphonate having more than one hydrocarbon group, or a mixture thereof. |
| US09520453B2 |
Electroluminescent device and manufacturing method thereof
An electroluminescent device and manufacturing method thereof are provided. The electroluminescence device comprises an array substrate (10). The array substrate (10) comprises a substrate (11); and a thin film transistor (12), a protection layer (13) and a connection electrode (14) provided in turn on the substrate (11). The protection layer (13) covers the thin film transistor (12); and the connection electrode (14) is provided on the protection layer (13). The protection layer (13) below the connection electrode (14) protrudes towards a side away from the substrate (11) to form a boss (131). The protection layer (13) comprises a via hole (132) provided at a position corresponding to a drain electrode (122) of the thin film transistor (12). The connection electrode (14) is connected with the drain electrode (122) of the thin film transistor (12) through the via hole (132). The electroluminescent device and manufacturing method thereof shorten the film formation time, reduce the etching difficulty and accordingly improves the production efficiency in the process of manufacturing the connection electrode while the reliability of electrical connection between a thin film transistor and a second electrode is improved. |
| US09520452B2 |
Organic light-emitting display apparatus with color filter
In an aspect, an organic light-emitting display apparatus is provided, including: an insulating layer having a inclined structure; a first electrode disposed on the insulating layer; a selective wavelength transparent layer disposed on the first electrode; a pixel defined layer disposed on the insulating layer and the first electrode and defining an emissive region and a non-emissive region; an organic emissive layer disposed on the first electrode; and a second electrode disposed on the organic emissive layer. |
| US09520449B2 |
Photoelectric conversion device, solid-state image pickup unit, and electronic apparatuses having work function adjustment layers and diffusion suppression layers
A photoelectric conversion device includes an organic photoelectric conversion film; a first electrode and a second electrode provided with the organic photoelectric conversion film in between; and a charge block layer provided between the second electrode and the organic photoelectric conversion film, in which the charge block layer includes a work function adjustment layer including a metal element on the second electrode side of the organic photoelectric conversion film, the metal element being adopted to adjust a work function, and a first diffusion suppression layer provided between the work function adjustment layer and the second electrode and suppressing diffusion of the metal element to the second electrode side. |
| US09520448B1 |
Compact ReRAM based PFGA
A push-pull resistive random access memory cell circuit includes an output node, a word line, a first bit line, and a second bit line. A first resistive random access memory device is connected between the first bit line and the output node and a second resistive random access memory device is connected between the output node and the second bit line. A first programming transistor has a gate connected to the word line, a drain connected to the output node, and a source. A second programming transistor has a gate connected to the word line, a drain connected to the source of the first programming transistor, and a source. The first and second programming transistors have the same pitch, the same channel length, and the same gate dielectric thickness, the gate dielectric thickness chosen to withstand programming and erase potentials encountered during operation of the push-pull ReRAM cell circuit. |
| US09520447B2 |
Memory cells having a common gate terminal
Arrays of memory cells having a common gate terminal and methods of operating and forming the same are described herein. As an example, an array of memory cells may include a group of memory cells each having a resistive storage element coupled to a select device. Each select device includes a first terminal, a second terminal, and a gate terminal, where the gate terminal is common to each memory cell of the group. |
| US09520445B2 |
Integrated non-volatile memory elements, design and use
Various embodiments describe an integrated non-volatile component. The component may include a surface contact with associated mating contact wherein a ferroelectric layer is used as a conductive channel having variable conductivity and the surface contact and/or the associated mating contact are/is embodied as a rectifying contact and, as a result of an applied voltage between the surface contact and the associated mating contact, a non-volatile space charge zone forms in the surface contact terminal region and/or mating contact terminal region in the ferroelectric layer. |
| US09520441B2 |
Method for electronically pinning a back surface of a back-illuminated imager fabricated on a UTSOI wafer
A method for fabricating a back-illuminated imager which has a pinned back surface is disclosed. A first insulator layer is formed overlying a mechanical substrate. A conductive layer is deposited overlying the first insulator layer. A second insulator layer is formed overlying the conductive layer to form a first structure, an interface being formed between the conductive layer and the second insulator layer, the conductive layer causing band bending proximal to the interface such that the interface is electrically pinned. Hydrogen is implanted in a separate device wafer to form a bubble layer. A final insulator layer is formed overlying the device wafer to form a second structure. The first structure and the second structure are bonded to form a combined wafer. A portion of the combined wafer is removed underlying the bubble layer to expose a seed layer comprising the semiconductor material substantially overlying the second insulator layer. |
| US09520437B2 |
Flexible APS X-ray imager with MOTFT pixel readout and a pin diode sensing element
A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on the etch stop layer to form a sensor plane. Separating the stack into an array of PIN photodiodes. Depositing a layer of insulating material on the array to form a planarized surface and forming vias through the insulating layer into communication with an upper surface of each photodiode and forming metal contacts on the planarized surface through the vias in contact with each photodiode. Fabricating an array of MOTFTs in an active pixel sensor configuration backplane on the planarized surface and in electrical communication with the contacts, to provide a sensor plane/MOTFT backplane interconnected combination. Attaching a flexible support carrier to the MOTFT backplane and removing the glass substrate. A scintillator is then laminated on the array of photodiodes. |
| US09520435B2 |
Image sensor illuminated and connected on its back side
An image sensor including a semiconductor layer; a stack of insulating layers resting on the back side of the semiconductor layer; a conductive layer portion extending along part of the height of the stack and flush with the exposed surface of the stack; laterally-insulated conductive fingers extending through the semiconductor layer from its front side and penetrating into said layer portion; laterally-insulated conductive walls separating pixel areas, these walls extending through the semiconductor layer from its front side and having a lower height than the fingers; and an interconnection structure resting on the front side of the semiconductor layer and including vias in contact with the fingers. |
| US09520433B1 |
Method of fabricating deep trench isolation structure in image sensor and device thereof
A method includes forming a deep trench isolation structure on a substrate, the substrate having a back surface opposite to a front surface, the deep trench isolation structure opening toward the front surface. An oxide layer is formed on the front surface of the substrate and sidewalls and bottom of the deep trench isolation structure. The oxide layer on the front surface of the substrate is removed. A portion of the substrate at the opening of the deep trench isolation structure is removed and an epitaxial layer is formed on the substrate. |
| US09520432B2 |
Solid-state imaging devices with impurity regions between photoelectric conversion regions and methods for manufacturing the same
Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate. |
| US09520431B2 |
Self-aligned isolation structures and light filters
An image sensor includes a semiconductor layer with a plurality of photodiodes. A plurality of isolation structures is disposed in the back side of the semiconductor layer between individual photodiodes in the plurality of photodiodes. The plurality of isolation structures extend into the back side of the semiconductor layer a first depth and extend out of the back side of the semiconductor layer a first length. A plurality of light filters is disposed proximate to the back side of the semiconductor layer such that the plurality of isolation structures is disposed between individual light filters in the plurality of light filters. An antireflection coating is also disposed between the semiconductor layer and the plurality of light filters. |
| US09520425B2 |
Image sensors with small pixels having high well capacity
An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high charge storage capacity is achieved by placing a p+ type doped layer under the pixel charge storage region with an opening in it for allowing photo-generated charge carriers to flow from the silicon hulk to the charge storage well located near the surface of the photodiode. A compensating n-type doped implant may be formed in the opening. Image lag is prevented by placing a p− type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. Blooming control is achieved by adjusting the length of the transfer gate in the pixel and thereby adjusting the punch-through potential under the gate. |
| US09520422B2 |
Oxide thin film transistor and manufacturing method thereof, array substrate and display device
An oxide thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method comprises: forming a gate electrode (1), a gate insulating layer (4) and an oxide semiconductor thin film (10) sequentially on a substrate; forming a first photoresist (11a) above an active layer region of the oxide semiconductor thin film (10), such that a thickness of the first photoresist above a channel region is greater than a thickness of the first photoresist above a non-channel region; reserving the first photoresist (11a) above the channel region; forming a source-drain metal thin film and a second photoresist (11b) sequentially on a pattern of an active layer, removing a portion of the source-drain metal thin film and a portion of the second photoresist (11b), such that an edge of the first photoresist (11a) above the channel region is covered with the source-drain metal thin film; and obtaining patterns of a source electrode and a drain electrode. Upon preliminary patterns of the source electrode and the drain electrode are formed, the photoresist instead of a protective layer is used to protect the active layer, therefore shortening a length of a channel of the oxide thin film transistor. |
| US09520416B2 |
Thin film transistor array substrate and manufacturing method thereof
A method of manufacturing an array substrate includes applying a first color filter and a second color filter over a first and second pixel regions respectively and the color filters have an overlapped portion in wiring region; and forming a contact hole, which partially exposes the drain electrode therethrough, by etching at least one of the overlapping first and the second color filters, and the forming the contact hole includes selectively etching an upper part of the overlapped portion during etching a photoresist layer covering the overlapped portion, the overlapped portion of first and second color filters is etched without requiring an additional masking process, preventing a decrease of liquid crystal margin due to large height difference of the overlapped color filters, preventing misalignment of color filters and mixing of colors. |
| US09520406B2 |
Method of making a vertical NAND device using sequential etching of multilayer stacks
A method of making a vertical NAND device includes forming a lower portion of a memory stack over a substrate, forming a lower portion of memory openings in the lower portion of the memory stack, and at least partially filling the lower portion of the memory openings with a sacrificial material. The method also includes forming an upper portion of the memory stack over the lower portion of the memory stack and over the sacrificial material, forming an upper portion of the memory openings in the upper portion of the memory stack to expose the sacrificial material in the lower portion of the memory openings, removing the sacrificial material to connect the lower portion of the memory openings with a respective upper portion of the memory openings to form continuous memory openings, and forming a semiconductor channel in each continuous memory opening. |
| US09520405B2 |
Semiconductor device
A semiconductor device is provided. A channel layer is formed on a substrate. The channel layer is extended in a first direction substantially perpendicular to an upper surface of the substrate. A ground selection line is formed on a first region of the channel layer. A plurality of word lines is formed on a second region of the channel layer. A plurality of string selection lines is formed on a third region of the channel layer. The second region of the channel layer includes a first conductivity type dopant. The first, second and third regions of the channel layer are disposed along the first direction. |
| US09520403B2 |
Semiconductor memory device
A semiconductor memory device includes: a plurality of first channel columns including a plurality of first channel layers that are arranged in a direction and offset by their centers; a plurality of second channel columns alternately arranged with the plurality of first channel columns and having a plurality of second channel layers that are arranged in the direction and offset by their centers; first insulating layers and first conductive layers alternately stacked to surround the first channel layers; second insulating layers and second conductive layers stacked to surround the second channel layers; and spacers placed between the first channel columns and the second channel columns and interposed between the first conductive layers and the second conductive layers. |
| US09520395B2 |
FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack
Provided are approaches for patterning multiple, dense features in a semiconductor device using a memorization layer. Specifically, an approach includes: patterning a plurality of openings in a memorization layer; forming a gap-fill material within each of the plurality of openings; removing the memorization layer; removing an etch stop layer adjacent the gap-fill material, wherein a portion of the etch stop layer remains beneath the gap-fill material; etching a hardmask to form a set of openings above the set of gate structures, wherein the etch to the hardmask also removes the gap-fill material from atop the remaining portion of the etch stop layer; and etching the semiconductor device to remove the hardmask within each of the set of openings. In one embodiment, a set of dummy S/D contact pillars is then formed over a set of fins of the semiconductor device by etching a dielectric layer selective to the gate structures. |
| US09520392B1 |
Semiconductor device including finFET and fin varactor
A semiconductor device includes a semiconductor substrate having a fin-type field effect transistor (finFET) on a first region and a fin varactor on a second region. The finFET includes a first semiconductor fin that extends from an upper finFET surface thereof to the upper surface of the first region to define a first total fin height. The fin varactor includes a second semiconductor fin that extends from an upper varactor surface thereof to the upper surface of the second region to define a second total fin height that is different from the first total fin height of the finFET. |
| US09520389B1 |
Silicon-controlled rectifier and an ESD clamp circuit
A silicon-controlled rectifier (SCR) includes a first-type field, a second-type first field and a second-type second field disconnectedly formed in a first-type well; an entire first-type doped region formed within the first-type field; a segmented second-type doped region formed within the second-type first field; and a segmented first-type doped region formed within the second-type second field. |
| US09520388B2 |
Method of forming a semiconductor device and structure therefor
In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor. |
| US09520386B2 |
Light source unit and backlight assembly having the same
A method of protecting an LED chip from damage by ESD and EMI when the LED chip is housed in a light-emitting diode(s) housing package (LED package) and the LED package is mounted on a printed circuit board is provided. The method comprises a step of not including an ESD and EMI suppressing Zener diode within the combination of the printed circuit board and the LED package and of providing within the combination of the printed circuit board and the LED package a first conductive member and a spaced apart second conductive member which are electrically connected to the LED chip and which have defined between them at least one insulative ESD and/or EMI suppressing region which breaks down in its insulative properties when subjected to voltages of absolute magnitudes greater than a predetermined threshold voltage. |
| US09520383B2 |
Light emitting device package and lighting system
Disclosed is a light emitting device package and a lighting system. The light emitting device package includes a body, a first lead frame on the body, a plurality of light emitting diodes on the first lead frame, and a molding member on the light emitting diodes. The distance between the light emitting diodes includes a distance equal to or less than a length of a first side of a first light emitting diode of the light emitting diodes. |
| US09520381B2 |
Semiconductor device for use in flip-chip bonding, which reduces lateral displacement
A semiconductor device includes multilayer chips in which a first semiconductor chip and a second semiconductor chip are bonded together. A first electrode pad is formed on a principal surface of the first semiconductor chip, and a first bump is formed on the first electrode pad. A second bump is formed on the principal surface of the second semiconductor chip such that the second bump is bonded to the first bump. The first electrode pad has an opening, and the opening and an entire peripheral portion of the opening form a stepped shape form a stepped shape. The first bump has a recessed shape that is recessed at a center thereof and covers the stepped shape. |
| US09520380B2 |
Wafer process for molded chip scale package (MCSP) with thick backside metallization
A wafer process for molded chip scale package (MCSP) comprises: depositing metal bumps on bonding pads of chips on a wafer; forming a first packaging layer at a front surface of the wafer to cover the metal bumps; forming an un-covered ring at an edge of the wafer to expose two ends of each scribe line of a plurality of scribe lines; thinning the first packaging layer to expose metal bumps; forming cutting grooves; grinding a back surface of the wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; cutting off an edge portion of the wafer; flipping and mounting the wafer on a substrate; depositing a metal layer covering the metal seed layer; removing the substrate from the wafer; and separating individual chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layers and the metal layers along the scribe lines. |
| US09520379B2 |
Method of forming bump structure having a side recess and semiconductor structure including the same
In some embodiments, the present invention relates to a method of integrated chip bonding. The method forms a conductive trace on a surface of a first work piece, and a conductive bump on a surface of a second work piece. The conductive bump has a recess. A reflow process is performed on a solder layer to electrically couple the conductive trace and the conductive bump. The solder layer fills a part of the recess during the reflow process. By filling the recess during the reflow process, electrical shorting between the conductive trace and an adjacent conductive is reduced. |
| US09520372B1 |
Wafer level package (WLP) and method for forming the same
A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive pad formed on the substrate. The semiconductor device structure includes a protection layer formed over the conductive pad and a post-passivation interconnect (PPI) structure formed at least in the protection layer. The PPI structure is electrically connected to the conductive pad. The semiconductor device structure also includes a first moisture-resistant layer formed over the protection layer, and the protection layer and the first moisture-resistant layer are made of different materials. The semiconductor device structure further includes an under bump metallurgy (UBM) layer formed over the first moisture-resistant layer and connected to the PPI structure. |
| US09520371B2 |
Planar passivation for pads
Devices and methods for forming a device are presented. The method includes providing a substrate having circuit component and a dielectric layer over the substrate. The dielectric layer includes a plurality of inter level dielectric (ILD) layers and the uppermost dielectric layer includes at least one interconnect. A pad dielectric layer is provided over the uppermost ILD layer. A pad interconnect for receiving a wire bond is formed in the pad dielectric layer. The pad interconnect is coupled to the at least one interconnect of the uppermost ILD layer. A top surface of the pad dielectric layer is substantially coplanar with a top surface of the pad interconnect. A passivation layer is formed over the pad dielectric layer. |
| US09520369B2 |
Power module and method of packaging the same
Provided are a power module having an integrated power semiconductor and a method of packaging the same. The power module according to an aspect of the present invention includes a power semiconductor chip based on silicon and insulating substrates respectively disposed at both surfaces of the power semiconductor chip and including a metal pattern electrically and directly connected to the power semiconductor chip. |
| US09520368B1 |
Integrated circuit system having stripline structure
An integrated circuit system having: (A) a semiconductor chip with a signal strip conductor disposed on an upper surface of the chip; an active semiconductor device disposed of the upper surface of the chip electrically connected to the signal strip conductor; and a first ground plane conductor disposed on a bottom surface of the chip disposed under the signal strip conductor; and (B) a support structure having: a second ground plane disposed over, and separated from, the signal strip conductor by a dielectric region between the second ground plane and the signal strip conductor on the chip; a signal contact disposed on the bottom surface of the support structure displaced, electrically insulated, from the second ground plane conductor, and electrically connected to a portion of the signal strip conductor. The signal strip conductor, the first ground plane conductor, and the second ground plane conductor provide a stripline microwave transmission line. |
| US09520367B2 |
Trenched Faraday shielding
A device includes a semiconductor substrate having a surface with a trench, first and second conduction terminals supported by the semiconductor substrate, a control electrode supported by the semiconductor substrate between the first and second conduction terminals and configured to control flow of charge carriers during operation between the first and second conduction terminals, and a Faraday shield supported by the semiconductor substrate and disposed between the control electrode and the second conduction terminal. At least a portion of the Faraday shield is disposed in the trench. |
| US09520366B2 |
Chip comprising a phase change material based protecting device and a method of manufacturing the same
An electronic chip including an integrated circuit arranged a face of a substrate, and a protection device arranged partially facing the integrated circuit is provided. The protection device includes a capacitor having a first electrode and a second electrode between which a layer of phase change material is disposed changing locally from a first resistive state to a second resistive state different from the first state by penetration of a beam. The first state is an amorphous state wherein the capacitor has a first capacitance and/or a first resistance and the second state is a crystalline state wherein the capacitor has a second capacitance and/or a second resistance different from the first capacitance and first resistance. The protection device is electrically connected to the integrated circuit by at least one of the first or second electrodes so that the integrated circuit measures the resistance and/or capacitance of the capacitor. |
| US09520365B2 |
Semiconductor device and method for forming semiconductor package having build-up interconnect structure over semiconductor die with different CTE insulating layers
A semiconductor device has a semiconductor die and encapsulant deposited over the semiconductor die. A first insulating layer is formed over the die and encapsulant. The first insulating layer is cured with multiple dwell cycles to enhance adhesion to the die and encapsulant. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. The second insulating layer is cured with multiple dwell cycles to enhance adhesion to the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. The first, second, and third insulating layers have different CTE. The second insulating layer or third insulating layer is cured to a dense state to block moisture. |
| US09520360B2 |
Angled ion beam processing of heterogeneous structure
A method for fabricating a multilayer structure includes providing a mask on a device stack disposed on the substrate, the device stack comprising a first plurality of layers composed of a first layer type and a second layer type; directing first ions along a first direction forming a first non-zero angle of incidence with respect to a normal to a plane of the substrate, wherein a first sidewall is formed having a sidewall angle forming a first non-zero angle of inclination with respect to the normal, the first sidewall comprising a second plurality of layers from at least a portion of the first plurality of layers and composed of the first layer type and second layer type; and etching the second plurality of layers using a first selective etch wherein the first layer type is selectively etched with respect to the second layer type. |
| US09520355B2 |
Voltage and temperature independent MIM capacitors
MIM capacitors that are temperature and/or voltage independent, and a methodology for formulating the MIM capacitors for use in semiconductor integrated circuits, is provided. Vertical MIM capacitive structures include at least two vertically separated electrodes and a capacitor dielectric that includes portions of different dielectric materials provided in a desired area ratio. The disclosure provided for selecting dielectrics and dielectric thicknesses, determining an area ratio that produces temperature and/or voltage independent MIM capacitors, and forming capacitive devices with the desired area ratio. In one embodiment, the capacitor dielectric includes at least one SiO dielectric portion and at least one SiN dielectric portion and a total capacitive area includes the SiN and SiO dielectric portions arranged such that the ratio of the area of the SiO portions to the area of the SiN portions is about 1.15:1. |
| US09520354B1 |
Silicon designs for high voltage isolation
An isolation system, isolation capacitor, and Integrated Circuit are disclosed. The isolation capacitor is described to include a first capacitive element, a second capacitive element, a primary isolation layer positioned between the first and second capacitive elements, as well as a secondary isolation layer positioned between the first and second capacitive elements. The secondary isolation layer has an area that is larger than an area of one or both of the first and second capacitive elements, thereby reducing the likelihood of breakdown between the first and second capacitive elements. |
| US09520349B2 |
Semiconductor package
A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate. A conductive trace is disposed on the substrate. A conductive pillar bump is disposed on the conductive trace, wherein the conductive bump is coupled to a die. In another configuration, a first conductive trace is disposed on the substrate, and a second conductive trace is disposed on the substrate. In the second configuration, a conductive pillar bump disposed on the second conductive trace, connecting to a conductive bump or a metal pad of the semiconductor die. A first conductive structure is disposed between the second conductive trace and the conductive pillar bump or between the second conductive trace and the substrate, and a die is disposed over the first conductive trace. |
| US09520346B2 |
Power semiconductor module and method for manufacturing the same
The present invention relates to a power semiconductor module in which heat from the semiconductor chip is radiated not only through the buffer, but also through the lead frame to increase heat radiation efficiency, and the semiconductor chip, the buffer, and the lead frame are simultaneously bonded to increase efficiency of bonding work, and a method for manufacturing the same. |
| US09520343B1 |
Field-effect transistor structure for preventing from shorting
A field-effect transistor (FET) structure for preventing from shorting is disclosed. The field-effect transistor (FET) structure is applying to a power discrete device, such as the MOSFET or IGBT. The field-effect transistor structure comprises a MOSFET chip and a metal clip. A silver layer (or silver string) is welded on the surface of the metal clip jointed with the source pad so that the silver paste may be not overflowed and permeated into the gate bus to achieve the effect of preventing from shorting. |
| US09520336B1 |
Hybrid assembly with improved thermal performance
A method of improving the thermal performance of a hybrid assembly which comprises a first die, a second die, and indium bonds which bond and electrically interconnect the first die to the second die. A heat sink plate on which the hybrid assembly is to be mounted is provided. A plurality of indium bumps are deposited on the plate where the assembly is to be mounted. The bottom side of the hybrid assembly is then pressed onto the indium bumps to affix the assembly to the plate. The heat sink plate constrains the lateral coefficient of thermal expansion (CTE) of the second die such that the CTEs of the first and second dies match more closely than they would if the hybrid assembly was not mounted directly to a heat sink plate using indium bumps. The heat sink plate preferably comprises copper tungsten (CuW) or a diamond-metal composite. |
| US09520334B2 |
Integrated structure with improved heat dissipation
An integrated structure includes a support supporting at least one chip and a heat dissipating housing, attached to the chip. The housing is thermally conductive and has a thermal expansion compatible with the chip. The housing may further including closed cavities filled with a phase change material. |
| US09520331B2 |
Adaptive patterning for panelized packaging
An adaptive patterning method and system for fabricating panel based package structures is described. Misalignment for individual device units in a panel or reticulated wafer may be adjusted for by measuring the position of each individual device unit and forming a unit-specific pattern over each of the respective device units. |
| US09520325B2 |
Methods for producing semiconductor devices
A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first carrier; dicing the semiconductor workpiece and the carrier so as to form at least one individual semiconductor chip; mounting the at least one semiconductor chip with a side facing away from the carrier, to an additional carrier. |
| US09520323B2 |
Microelectronic packages having trench vias and methods for the manufacture thereof
Embodiments of a microelectronic package including at least one trench via are provided, as are embodiments of a method for fabricating such a microelectronic package. In one embodiment, the method includes the step of depositing a dielectric layer over a first microelectronic device having a plurality of contact pads, which are covered by the dielectric layer. A trench via is formed in the dielectric layer to expose the plurality of contact pads therethrough. The trench via is formed to include opposing crenulated sidewalls having a plurality of recesses therein. The plurality of contact pads exposed through the trench via are then sputter etched. A plurality of interconnect lines is formed over the dielectric layer, each of which is electrically coupled to a different one of the plurality of contact pads. |
| US09520322B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes a semiconductor substrate including a first surface in which an integrated circuit and an I/O pad electrically connected to the integrated circuit are formed, and a second surface which is an opposite side to the first surface, where a two-stage through-hole is formed in the semiconductor substrate, the semiconductor substrate including a first shape portion having a tapered shape which has a wall surface and of which a diameter of an opening becomes smaller toward a bottom of the hole from the second surface side to a predetermined position of the semiconductor substrate in a thickness direction, and including a second shape portion having a cylindrical shape which extends from the first shape portion to the I/O pad on the first surface side, and that includes an inorganic insulating film which is formed on the wall surface of the two-stage through-hole and the second surface. |
| US09520321B2 |
Integrated circuits and methods for fabricating integrated circuits with self-aligned vias
Integrated circuits and methods for fabricating integrated circuits with self-aligned vias are disclosed. A method for fabricating an integrated circuit includes forming a first conductive interconnect line overlying a semiconductor substrate. The method forms an insulator cap defining a gap overlying the first conductive interconnect line. An upper interlayer dielectric material is deposited over the insulator cap and in the gap over the first conductive interconnect line. A via is etched through the upper interlayer dielectric material and into the gap to expose the first conductive interconnect line. The method deposits a conductive material into the via to form a conductive via in contact with the first conductive interconnect line. |
| US09520317B2 |
Chip supplying apparatus
A chip supplying apparatus supplies a chip to a mounting machine which mounts the chip on a substrate is disclosed. The chip supplying apparatus includes wafer table which holds a wafer sheet at a position where an operation head of the mounting machine can receive the chip. In the chip supplying apparatus, the wafer table is provided with a frame, a stopper which is fixed to the center of a front portion of the frame and abuts against a front end of the wafer sheet, and a pair of clamp mechanisms which is supported by the frame and which clamps both side ends of the wafer sheet. In the chip supplying apparatus, a position of the pair of clamp mechanisms in a right-and-left direction with respect to the frame can be changed in multiple steps. |
| US09520316B2 |
Separation device and pickup system
A separation device includes a mount table, projecting portion, and drawing port. The mount table includes a mount surface on which a pressure sensitive adhesive sheet, on which an electronic component is stuck, is mounted. The electronic component is stuck on one surface of the pressure sensitive adhesive sheet, and the mount surface is in contact with the other surface of the pressure sensitive adhesive sheet. The projecting portion is formed on the mount surface and projects toward the pressure sensitive adhesive sheet mounted on the mount surface. The drawing port is open near the projecting portion on the mount surface, and when a negative pressure is applied, draws the pressure sensitive adhesive sheet. |
| US09520315B2 |
Electrostatic chuck with internal flow adjustments for improved temperature distribution
An electrostatic chuck is described with external flow adjustments for improved temperature distribution. In one example, an apparatus has a dielectric puck to electrostatically grip a silicon wafer. A cooling plate is fastened to and thermally coupled to the ceramic puck. A supply plenum receives coolant from an external source and a plurality of coolant chambers are thermally coupled to the cooling plate and receive coolant from the supply plenum. A return plenum is coupled to the cooling zones to exhaust coolant from the cooling zones. A plurality of adjustable orifices are positioned between the supply plenum and a respective one of the cooling zones to control the flow rate of coolant from the supply plenum to the cooling zones. |
| US09520312B2 |
System and method for moving workpieces between multiple vacuum environments
Provided are approaches for transferring workpieces between multiple pressure environments. In one approach, a system for moving workpieces between a first pressure environment and a second pressure environment includes a first vacuum enclosure, a second vacuum enclosure, and an access port disposed between the first vacuum enclosure and the second vacuum enclosure. The system further includes a transfer carrier having a workpiece holder for retaining a workpiece, the transfer carrier disposed within the first vacuum enclosure and moveable between a first process position and a second process position, wherein in the first process position the workpiece is disposed within the first vacuum enclosure, and wherein in the second process position the workpiece holder abuts the access port to expose the workpiece to the second vacuum enclosure and to create a seal around the access port to seal the first vacuum enclosure from the second vacuum enclosure. |
| US09520311B2 |
Processing facility
A processing facility is disclosed in which a container side contact surface and a support side contact surface are in contact with each other and a supply hole or a discharge hole, and a communicating hole are allowed to communicate with each other when a container is supported by a container support, and in which the container side contact surface is formed to be flat at least in a periphery of the communicating hole, and the support side contact surface is formed to have a shape that is gradually lower as a distance increases from the supply hole or the discharge hole. |
| US09520308B2 |
Temperature control system for semiconductor manufacturing system
Provided is a temperature control system configured to mix a low temperature heating medium and a high temperature heating medium to supply the heating mediums at a temperature according to a process recipe to an electrostatic chuck (ESC) configured to maintain a temperature and support a wafer in a chamber in which a semiconductor wafer processing process is performed, and a heating medium obtained by mixing a heating medium cooled through a thermoelectric element and a heating medium heated through a heater to a desired target temperature according to a first ratio and a second ratio is provided to a load and recovered from the load, and the heating medium is distributed to the thermoelectric element and the heater according to the first ratio and the second ratio, which are ratios upon the mixing, optimizing power consumption for cooling or heating. |
| US09520305B2 |
Power semiconductor arrangement and method of producing a power semiconductor arrangement
A power semiconductor device comprising a power semiconductor module and a heat sink; and a method for its manufacture. The module has a cooling plate, with an opening delimited by a lateral first surface thereof extending circumferentially around the opening. The cooling plate is arranged in the opening and has a lateral first surface which extends circumferentially around the cooling plate. The two first surfaces are at a respective angle of less than 90° with respect to a main surface of the cooling plate facing the power semiconductor components. The two first surfaces are pressed together, extending circumferentially along the first surface of the cooling plate and extending circumferentially along the first surface of the heat sink. The inventive power semiconductor device has good heat conduction from the power semiconductor components to the heat sink through which a liquid can flow, and which is reliably leaktight over the long term. |
| US09520304B2 |
Semiconductor package and fabrication method thereof
A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a semiconductor structure having a carrier, a circuit portion formed on the carrier and a plurality of semiconductor elements disposed on the circuit portion; disposing a lamination member on the semiconductor elements; forming an insulating layer on the circuit portion for encapsulating the semiconductor elements; and removing the carrier. The lamination member increases the strength between adjacent semiconductor elements so as to overcome the conventional cracking problem caused by a CTE mismatch between the semiconductor elements and the insulating layer when the carrier is removed. |
| US09520302B2 |
Methods for controlling Fin recess loading
A method of processing a substrate includes depositing an oxide material on a substrate having a first region, a second region and a plurality of features, wherein the first region has a high feature density and the second region has a low feature density; and controlling a ratio of an etch rate of the oxide material in the first region to an etch rate of the oxide material in the second region by forming an ammonium hexafluorosilicate ((NH4)2SiF6) layer having a first thickness atop the oxide material in the first region and having a second thickness atop the oxide material in the second region. |
| US09520296B2 |
Semiconductor device having a low divot of alignment between a substrate and an isolation thereof and method of forming the same
According to an exemplary embodiment, a method of forming vertical structures is provided. The method includes the following operations: providing a substrate; forming a first oxide layer over the substrate; forming a first dummy layer over the first oxide layer; etching the first oxide layer and the first dummy layer to form a recess; forming a second dummy layer in the recess (and further performing CMP on the second dummy layer and stop on the first dummy layer); removing the first dummy layer; removing the first oxide layer; and etching the substrate to form the vertical structure. According to an exemplary embodiment, a semiconductor device is provided. The semiconductor device includes: a substrate; an STI embedded in the substrate; and a vertical transistor having a source substantially aligned with the STI. |
| US09520292B2 |
Aging-based leakage energy reduction method and system
A technique of reducing leakage energy associated with a post-silicon target circuit is generally described herein. One example method includes purposefully aging a plurality of gates in the target circuit based on a targeted metric including a timing constraint associated with the target circuit. |
| US09520289B2 |
Methods of forming a pattern of a semiconductor device
In a method of forming a pattern of a semiconductor device, a hard mask layer is formed on a substrate. A photoresist film is coated on the hard mask layer. The photoresist film is exposed and developed to form a first photoresist pattern. A smoothing process is performed on the first photoresist pattern to form a second photoresist pattern having a roughness property lower from that of the first photoresist pattern. In the smoothing process, a surface of the first photoresist pattern is treated with an organic solvent. An ALD layer is formed on a surface of the second photoresist pattern. The ALD layer is anisotropically etched to form an ALD layer pattern on a sidewall of the second photoresist pattern. The hard mask layer is etched using the second photoresist pattern and the ALD layer pattern as an etching mask to form a hard mask pattern. |
| US09520286B2 |
Semiconductor substrate, semiconductor device and method of manufacturing the semiconductor device
A semiconductor substrate having a silicon-based substrate, a buffer layer provided on the silicon-based substrate and made of a nitride semiconductor containing boron, and an operation layer formed on the buffer layer, wherein a concentration of boron in the buffer layer gradually decreasing toward a side of the operation layer from a side of the silicon-based substrate. Thereby, the semiconductor substrate in which the buffer layer contains boron sufficient to obtain a dislocation suppression effect and boron is not diffused to the operation layer is provided. |
| US09520282B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
A method of manufacturing a semiconductor device is provided. The method includes treating a surface of an insulating film formed on a substrate by supplying a first gas containing a halogen group to the substrate, and forming a thin film containing a predetermined element on the treated surface of the insulating film by performing a cycle a predetermined number of times. The cycle includes supplying a second gas containing the predetermined element and a halogen group to the substrate, and supplying a third gas to the substrate. |
| US09520281B2 |
Method of fabricating an optoelectronic device with a hollow component in epitaxial layer
A method of fabricating an epitaxial device, comprising: providing a substrate having a first surface and a normal direction; epitaxially forming a first transition layer in a first temperature on the first surface of the substrate and in-situ incorporating a porogen into the first transition layer; and adjusting the first temperature to a second temperature to burn out the porogen from the first transition layer to form a hollow component inside the first transition layer. |
| US09520280B2 |
Ion detection
Mass analyzers and methods of ion detection for a mass analyzer are provided. An electrostatic field generator provides an electrostatic field causing ion packets to oscillate along a direction. A pulse transient signal is detected over a time duration that is significantly shorter than a period of the ion oscillation or using pulse detection electrodes having a width that is significantly smaller than a span of ion harmonic motion. A harmonic transient signal is also detected. Ion intensity with respect to mass-to-charge ratio is then identified based on the pulse transient signal and the harmonic transient signal. |
| US09520271B2 |
Methods and systems for plasma deposition and treatment
An apparatus for separating ions having different mass or charge includes a waveguide conduit coupled to a microwave source for transmitting microwaves through openings in the waveguide conduit. The outlet ends of pipes are positioned at the openings for transporting material from a material source to the openings. A plasma chamber is in communication with the waveguide tube through the openings. The plasma chamber receives through the openings microwaves from the waveguide tube and material from the pipes. The plasma chamber includes magnets disposed in an outer wall thereof for forming a magnetic field in the plasma chamber. The plasma chamber includes a charged cover at a side of the chamber opposite the side containing the openings. The cover includes extraction holes through which ion beams from the plasma chamber are extracted. Deflectors coupled to one of the extraction holes receive the ion beams extracted from the plasma chamber. Each deflector bends an ion beam and provides separate passages for capturing ions following different trajectories from the bending of the ion beam based on their respective mass or charge. |
| US09520268B2 |
Compensation of imaging deviations in a particle-beam writer using a convolution kernel
An exposure pattern is computed for exposing a desired pattern on a target in a charged-particle multi-beam processing apparatus to match a reference writing tool, and/or for compensating a deviation of the imaging from a pattern definition device onto the target from a desired value of critical dimension along at least one direction in the image area on the target: The desired pattern is provided as a graphical representation suitable for the reference tool, on the image area on the target. A convolution kernel is used which describes a mapping from an element of the graphical representation to a group of pixels which is centered around a nominal position of said element. A nominal exposure pattern is calculated by convolution of the graphical representation with the convolution kernel, said nominal exposure pattern being suitable to create a nominal dose distribution on the target when exposed with the processing apparatus. |
| US09520267B2 |
Bias voltage frequency controlled angular ion distribution in plasma processing
The angular ion distribution in plasma processing is controlled using a bias voltage frequency. In one example, a plasma containing gas ions is generated in a plasma chamber. The plasma sheath is modified using an aperture disposed between the plasma sheath and the workpiece so that the plasma sheath takes a shape above the aperture. An oscillating radio frequency bias voltage is generated and applied to a workpiece holder. The workpiece holder applies the bias voltage to the workpiece to generate a workpiece bias voltage with respect to the plasma to attract ions across the plasma sheath toward the workpiece. The aperture and the frequency of the bias voltage control an angle at which the ions are attracted toward the workpiece. |
| US09520264B2 |
Method and apparatus for clamping and cooling a substrate for ion implantation
A system and method are disclosed for holding and cooling substrates during processing. A substrate clamp has an engagement portion for engaging a substrate about the inside diameter as well as a portion of the substrate surface immediately adjacent to the inside diameter. The clamp has a retracted position which enables the engagement portion to fit through the substrate ID, and an expanded position which enables the engagement portion to engage the substrate ID and the substrate surface immediately adjacent to the inside diameter. The clamp can include a conformal coating to enhance engagement between the substrate and the engagement portion. The clamp can also include an energy absorbing coating on one or more surfaces to maximize the absorption of radiative energy emitted from the substrate. Other embodiments are described and claimed. |
| US09520258B2 |
Selective synthesis of nanotubes without inhibitor
A method of forming nanotubes may include applying a photoresist to a metal substrate, selectively exposing a first portion of the photoresist to electromagnetic radiation while not exposing a second portion to the electromagnetic radiation, removing the second portion of the photoresist from the metal substrate exposing a first portion of the metal substrate, exposing the first portion of the metal substrate to an etchant removing the first portion of the photoresist exposing a second portion of the metal substrate, and growing carbon nanotubes on the second portion of the metal substrate. |
| US09520255B2 |
Connection structure of electronic component and terminal metal fittings
A connection structure of an electronic component and terminal metal fittings includes a relay including a relay body and a plurality of terminals, terminal metal fittings mating with the terminals, and a holding member. The terminals have end portions facing side surfaces of the relay body, and their leading ends are positioned closer to a top surface side than a bottom surface of the relay body. At a side surface, a first terminal and a second terminal that is more rigid than the first terminal are disposed. The holding member includes a component body accommodating portion, a first terminal accommodating portion, and a second terminal accommodating portion. A gap dimension between the first terminal and an insertion slot of the first terminal accommodating portion is larger than a gap dimension between the second terminal and an insertion slot of the second terminal accommodating portion. |
| US09520249B2 |
Changing the state of a switch through the application of power
A switch includes a spring. The switch further includes a collapsing element. The spring has a first spring state in which it is being held in tension by a restraining element and a second spring state in which it is not being held in tension because the restraining element has failed. The collapsing element is situated such that when sufficient power is applied to the collapsing element heat from the collapsing element will cause the restraining element to fail. The switch further includes a first contact coupled to the spring. The switch further includes a second contact coupled to the spring. The first contact and the second contact have a first 1-2 electrical connection state when the spring is in the first spring state. The first contact and the second contact have a second 1-2 electrical connection state different from the first 1-2 electrical connection state when the spring is in the second spring state. |
| US09520244B2 |
Composite electronic component and board having the same
A composite electronic component may include: a composite element in which a capacitor and an inductor are spaced apart from each other, the capacitor including a ceramic body, and the inductor including a magnetic body; a first external electrode disposed on a second end surface of the ceramic body, second external electrodes disposed on first and second side surfaces of the ceramic body, a first dummy electrode disposed on a first end surface of the ceramic body; and third and fourth external electrodes disposed on first and second end surfaces of the magnetic body. The composite element may include a first metal frame disposed on a first end surface of the composite element, a second metal frame disposed on a second end surface of the composite element, and third metal frames disposed on one or more of first and second side surfaces of the composite element. |
| US09520241B2 |
Graphene supported vanadium oxide monolayer capacitor material and method of making the same
An method of producing an electronic device, including identifying a graphene sheet, functionalizing the graphene sheet to yield a functionalized sheet, attaching respective vanadium oxide molecules to respective functional groups to define an impregnated graphene sheet, removing organic solvents from the impregnated graphene sheet to define a composite sheet, and positioning the composite sheet onto a metallic substrate to yield a capacitor. |
| US09520239B2 |
Chip electronic component and board having the same
There is provided a chip electronic component may include: a ceramic body; external electrodes formed on both side portions of the ceramic body; and an interposer supporting the ceramic body and electrically connected to the external electrodes, wherein the interposer includes first and second terminal electrodes formed on both side portions thereof and recesses formed inwardly in the first and second terminal electrodes. |
| US09520236B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a ceramic element body including internal electrodes and external electrodes electrically connected to respective internal electrodes. Each of the external electrodes includes a sintered metal layer including glass and metal and a conductive resin layer including resin and metal particles. In a cross section of the multilayer ceramic capacitor, at an interface between the sintered metal layer and the conductive resin layer, recesses having a shape in which a dimension of an inner portion is larger than a dimension of an inlet are present, and L1/L2 is about 0.2 or more and about 1.5 or less, where L1 is a length along the interface at which the glass of the sintered metal layer is exposed at the interface, and L2 is a length along the interface at which the metal of the sintered metal layer is exposed at the interface. |
| US09520231B2 |
Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor
A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm. |
| US09520229B2 |
Rotary transformers for electrical machines
A rotary transformer includes a shaft, a stator, and a rotor. The stator has a pole surface extending about the shaft. The rotor has a pole surface and operatively connects to the shaft for common rotation with the shaft such that the pole surface of the rotor axially opposes the pole surface of the rotor at an overlap area. The overlap are between the pole surfaces is greater at a first rotor position that at a second rotor position for superimposing a signal indicative of rotor position on electrical power transferred between the stator and rotor. |
| US09520215B2 |
Chip resistor and method of manufacturing the same
A method of manufacturing a chip resistor includes the following steps. A resistor layer is formed on an obverse surface of a material substrate. A plurality of substrate sections are defined in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each of which is elongated in a first direction. A conductor layer is formed in each of the first grooves. The substrate sections are cut along lines extending in a second direction different from the first direction. |
| US09520212B2 |
Aligned structure of cables and production method of aligned structure of cables
An aligned structure of cables includes: a plurality of cables each including a conductive cable core, an insulator covering an outer periphery of the cable core, and a cable core exposed portion, in which the cable core is exposed, on a side of a distal end of the cable; a first cable core aligning insulator including a plurality of grooves into which the cable core exposed portions of the cables are respectively fitted and which align the cable cores; and a cable core fixing insulator which fixes the cable core exposed portions aligned by the first cable core aligning insulator, wherein cross sections of the cable cores are exposed on a surface on a side of distal ends of the cable cores of the cable core fixing insulator, and a pitch of the cross sections is shorter than a pitch of the cables. |
| US09520207B2 |
Single phase lead-free cubic pyrochlore bismuth zinc niobate-based dielectric materials and processes for manufacture
Both single phase lead-free cubic pyrochlore bismuth zinc niobate (BZN)-based dielectric materials with a chemical composition of Bi1.5Zn(0.5+y)Nb(1.5−x)Ta(x)O(6.5+y), with 0≦x<0.23 and 0≦y<0.9 and films with these average compositions with Bi2O3 particles in an amorphous matrix and a process of manufacture thereof. The crystalline BZNT-based dielectric material has a relative permittivity of at least 120, a maximum applied electric field of at least 4.0 MV/cm at 10 kHz, a maximum energy storage at 25° C. and 10 kHz of at least 50 J/cm3 and a maximum energy storage at 200° C. and 10 kHz of at least 22 J/cm3. The process is a wet chemical process that produces thin films of Bi1.5Zn(0.5+y)Nb(1.5−x)Ta(x)O(6.5+y) without the use of 2-methoxyethanol and pyridine. |
| US09520206B2 |
Anisotropic conductive film and method for manufacturing the same
Disclosed herein are an anisotropic conductive film and a method for manufacturing the same. The anisotropic conductive film according to the present invention includes: an insulating resin; and a plurality of conductive graphenes dispersed into the insulating resin. |
| US09520204B2 |
Cold stripper for high energy ion implanter with tandem accelerator
A cold stripper for a high-energy ion implanter system is provided. The cold stripper including a stripper tube having a hollow cavity, a first aperture in the stripper tube to admit an ion beam of positively charged ions into the hollow cavity and a second aperture in the stripper tube to discharge the ion beam from the hollow cavity, a gas pump coupled to the hollow cavity to introduce a gas into the hollow cavity, one or more cooling passages in the stripper tube, and a coolant pump coupled to the one or more cooling passages to circulate a coolant through the one or more cooling passages. |
| US09520203B2 |
Semiconductor memory device for performing both of static test and dynamic test during wafer burn-in test and method for operating the same
A semiconductor memory device includes a first address input block which receives first information applied from an exterior as a corresponding normal address in a normal mode and receives the first information as a test clock in a test mode, a second address input block which receives second information applied from an exterior as the corresponding normal address in the normal mode and receives the second information as a test code in the test mode, and a test signal generation block which synchronizes the test code with the test clock in the test mode and generates a test command, a test address and a test data in response to a synchronized test code. |
| US09520202B1 |
Programming verification control circuit and method for control thereof
A programming verification control circuit is disclosed, including: a first decoder circuit for decoding a word line of a memory bit; a first drive circuit for receiving a first voltage and providing the first voltage to the word line of the memory bit based on a decoding result of the first decoder circuit; a second decoder circuit for decoding a control gate of the memory bit; a second drive circuit for receiving a second voltage and providing the second voltage to the control gate of the first memory bit based on a decoding result of the second decoder circuit; and a voltage equalizer for receiving the first voltage, the second voltage and a first enable signal and, in event of the first enable signal being valid, controlling the first voltage and the second voltage to be conducted. A method for controlling the programming verification control circuit is also disclosed. |
| US09520201B2 |
Nonvolatile memory device comprising page buffer and program verification operation method thereof
A nonvolatile memory device is provided which includes a page buffer unit. The page buffer unit includes a first page buffer including a first A latch configured to store first upper bit data and a first B latch configured to store first lower bit data, and a second page buffer including a second A latch configured to store second upper bit data and a second B latch configured to store second lower bit data. A set pulse may be applied to both the first A latch and the second B latch, or to both the second A latch and the first B latch. The non-volatile memory device may provide high write performance and may respond within a time out period of a handheld terminal. |
| US09520198B2 |
Semiconductor memory device including three-dimensional memory cell array structure and operating method thereof
An operating method includes biasing channel regions of unselected cell strings among the cell strings to an initial voltage while applying a first pass voltage to the plurality of word lines; floating the channel regions of the unselected cell strings; increasing the first pass voltage to a second pass voltage during the floating of the channel regions; and reading data from selected memory cells of selected cell strings among the cell strings. |
| US09520195B2 |
Sensing amplifier utilizing bit line clamping devices and sensing method thereof
A sensing amplifier comprising a clamp circuit is provided. The clamp circuit is coupled between a first node and a second node. The clamp circuit comprises a first P-type transistor having a first terminal, a second terminal and a control terminal receiving a first bias signal, the first terminal and the second terminal of the first P-type transistor are coupled to the first node and the second node, respectively, and a sensing current from the memory cell flows into the second node via the first node during a sensing time period. |
| US09520192B2 |
Resistive memory write operation with merged reset
In a memory device where writing a memory cell to a first bit state takes longer than writing to the second bit state, selectively executing the write operation can amortize the performance cost of writing the bit state that takes longer to write. Write logic dequeues multiple cachelines from a write buffer and sets all bits of all cachelines to the first bit state in a single write operation. The write logic then executes separate write operations on each cacheline separately to selectively write memory cells of each respective cacheline to the second bit state. |
| US09520188B2 |
Semiconductor memory device
A semiconductor memory device including a memory cell array including a memory cell layer containing plural memory cells operative to store data in accordance with different resistance states; and an access circuit operative to make access to the memory cells, the memory cell changing the resistance state from a first resistance state to a second resistance state on application of a voltage of a first polarity, and changing the resistance state from the second resistance state to the first resistance state on application of a voltage of a second polarity, the access circuit applying voltages, required for access to the memory cell, to first and second lines connected to a selected memory cell, and bringing at least one of the first and second lines connected to non-selected memory cells into the floating state to make access to the selected memory cell. |
| US09520180B1 |
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz. |
| US09520171B2 |
Resistive change memory
A resistive change memory according to an embodiment includes: a memory cell including a resistive change element comprising a first and second terminals, and a semiconductor element, the semiconductor element including a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, and a third semiconductor layer of a second conductivity type that is different from the first conductivity type, the third semiconductor layer being disposed between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer being connected to the second terminal of the resistive change element; and a read unit configured to perform a read operation by applying a first read voltage between the first terminal and the second semiconductor layer, and then applying a second read voltage that is lower than the first read voltage between the first terminal and the second semiconductor layer. |
| US09520170B2 |
Volume select for affecting a state of a non-selected memory volume
Apparatuses and methods of operating memory are described. One such method can include receiving a select command at a plurality of memory volumes of a memory device, the select command indicating a targeted memory volume of the plurality of memory volumes. In response to the select command, the method can include selecting the targeted memory volume of the memory volumes and putting at least a portion of a non-selected memory volume of the memory volumes in a particular state based, at least in part, on a previous state of the non-selected memory volume and/or a portion of an address associated with the select command. |
| US09520166B2 |
Semiconductor memory device and operation method thereof
A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line. |
| US09520165B1 |
High-speed pseudo-dual-port memory with separate precharge controls
A pseudo-dual-port (PDP) memory such as a PDP SRAM is provided that independently controls the bit line precharging and the sense amplifier precharging to increase memory operating speed while eliminating or reducing the discharge of crowbar current. |
| US09520160B2 |
Printed circuit board and memory module including the same
A memory module includes a plurality of semiconductor memory devices and a circuit board. The circuit board is electrically connected to the plurality of semiconductor memory devices, and a signal line is disposed in the outermost layer of the circuit board. An electrical reference for the signal line is provided in a layer of the circuit board that is not adjacent to the outermost layer. Accordingly, an impedance of the signal line may be increased, and signal integrity of a signal transmitted through the signal line may be improved. |
| US09520158B1 |
Fastening device
A fastening device for securing and protecting an electronic device is provided. The electronic device is provided with at least one assembly hole. The fastening device includes a fastening assembly and a plate. The fastening assembly includes a buffer and a fastening element inserted through the buffer. The fastening element includes a rod portion, a fastening portion at one end of the rod portion, and a head portion at the other end of the rod portion. The fastening portion is fastened in the assembly hole. The plate includes a first positioning hole and a second positioning hole communicating with the first positioning hole. A diameter of the first positioning hole is greater than a diameter of the second positioning hole, and a diameter of the head portion is less than the diameter of the first positioning hole and greater than the diameter of the second positioning hole. |
| US09520155B2 |
Methods and systems for seeking to non-key frames
Methods and systems for seeking to a non-key frame in a compressed video. The compressed video has a plurality of frames, each with a playback timestamp. At least one of the frames is a key frame. A selection of a non-key frame is received, and a temporally proximate key frame is identified. The set of frames between the identified key frame and the selected frame is played in a reduced time interval, and the selected frame is displayed as if it were a key frame. |
| US09520154B2 |
Apparatus and method for displaying images
Disclosed herein is an image display apparatus including a storage unit storing a plurality of images, an input unit receiving a selection command for selecting one or more images from among the plurality of images, and a display unit displaying at least one image of the selected images in a first zone and at least one second image of the selected images in a second zone. |
| US09520152B2 |
Optical information recording/reproducing apparatus
A hologram apparatus and hologram optical system includes: a light source which emits a light beam; a splitter which splits the light beam emitted from the light source into a first light beam and a second light beam; a first lens for exposing an optical information recording medium to convergent light of the first light beam; an optical path angle varying device which causes the second light beam to become incident at substantially the same position as the first light beam in the optical information recording medium and changes an angle of incidence of the second light beam incident on the optical information recording medium; and an optical path shifting element which shifts a position of a light beam incident on the optical information recording medium, according to an angle to the optical information recording medium of the light beam incident on the optical information recording medium. |
| US09520149B1 |
Direct current magnetoresistive jog offset compensation
Systems and methods for compensating for magnetoresistive (MR) jog offset direct current (DC) drift in a disc drive are described. In one embodiment, a method may include determining an occurrence of NOS, for example, by monitoring disc slip, to determine when the method should proceed. An MR jog offset DC drift amount is determined for each head of the disc drive. One of several approaches may be employed for determining the MR jog offset DC drift amount. By determining an MR jog offset DC drift amount for each head, a compensation profile is determined for the drive. The determined compensation profile may then be used during operation of the disc drive to compensate for the DC drift. One of several approaches may be employed for compensating based on the compensation profile. |
| US09520148B1 |
Reset of magnetic domains in write head via external field
Methods of removing a magnetic domain from a slider structure, such as a shield in a write head, in a data storage assembly. The method comprises passing the slider structure in close proximity to a decaying magnetic field of at least 100 Oe and no more than 1500 Oe originating from within the storage assembly. In some implementations the decaying magnetic field has an oscillating polarity. |
| US09520141B2 |
Keyboard typing detection and suppression
Provided are methods and systems for detecting the presence of a transient noise event in an audio stream using primarily or exclusively the incoming audio data. Such an approach offers improved temporal resolution and is computationally efficient. The methods and systems presented utilize some time-frequency representation of an audio signal as the basis in a predictive model in an attempt to find outlying transient noise events and interpret the true detection state as a Hidden Markov Model (HMM) to model temporal and frequency cohesion common amongst transient noise events. |
| US09520138B2 |
Adaptive modulation filtering for spectral feature enhancement
Techniques described herein are directed to the enhancement of spectral features of an audio signal via adaptive modulation filtering. The adaptive modulation filtering process is based on observed modulation envelope autocorrelation coefficients obtained from the audio signal. The modulation envelope autocorrelation coefficients are used to determine parameters of an adaptive filter configured to filter the spectral features of the audio signal to provide filtered spectral features. The parameters are updated based on the observed modulation envelope autocorrelation coefficients to adapt to changing acoustic conditions, such as signal-to-noise ratio (SNR) or reverberation time. Accordingly, such acoustic conditions are not required to be estimated explicitly. Techniques described herein also allow for the estimation of useful side information, e.g., signal-to-noise ratios, based on the observed spectral features of the audio signal and the filtered spectral features, which can be used to improve speaker identification algorithms and/or other audio processing algorithms. |
| US09520135B2 |
Reconstructing audio signals with multiple decorrelation techniques
A method performed in an audio decoder for decoding M encoded audio channels representing N audio channels is disclosed. The method includes receiving a bitstream containing the M encoded audio channels and a set of spatial parameters, decoding the M encoded audio channels, and extracting the set of spatial parameters from the bitstream. The method also includes analyzing the M audio channels to detect a location of a transient, decorrelating the M audio channels, and deriving N audio channels from the M audio channels and the set of spatial parameters. A first decorrelation technique is applied to a first subset of each audio channel and a second decorrelation technique is applied to a second subset of each audio channel. The first decorrelation technique represents a first mode of operation of a decorrelator, and the second decorrelation technique represents a second mode of operation of the decorrelator. |
| US09520131B2 |
Apparatus and method for voice processing
An apparatus and a corresponding method for voice processing are provided. The apparatus includes a sound receiver, a camera, and a processor. The sound receiver receives a sound signal. The camera takes a video. The processor is coupled to the sound receiver and the camera. The processor obtains a voice onset time (VOT) of the sound signal, detects a human face in the video, detects a change time of a mouth contour of the human face, and verifies at least one preset condition. When all of the preset conditions are true, the processor performs speech recognition on the sound signal. The at least one preset condition includes that a difference between the VOT and the change time is smaller than a threshold value. |
| US09520126B2 |
Voice recognition system for replacing specific domain, mobile device and method thereof
A voice recognition system that divides a search space for voice recognition into a general domain search space and a specific domain search space. A mobile terminal receives a voice recognition target word from a user, and a voice recognition server divides a search space for voice recognition into a general domain search space and a specific domain search space and stores the spaces and performs voice recognition for the voice recognition target word through linkage of the general domain search space and the specific domain search space. |
| US09520123B2 |
System and method for pruning redundant units in a speech synthesis process
A system and method for concatenative speech synthesis is provided. Embodiments may include accessing, using one or more computing devices, a plurality of speech synthesis units from a speech database and determining a similarity between the plurality of speech synthesis units. Embodiments may further include retrieving two or more speech synthesis units having the similarity and pruning at least one of the two or more speech synthesis units based upon, at least in part, the similarity. |
| US09520122B2 |
Audio apparatus and controlling method thereof
An audio apparatus and method are provided. The method includes receiving, by a controller, first audio data and second audio data and processing the first audio data and the second audio data to generate first audio signals and second audio signals. Further, reverse phase signals of the first audio signals are generated by the controller. A first group of the plurality of audio outputting units output the first audio signals and a second group of the plurality of audio outputting units output the second audio signals and the reverse phase signals of the first audio signals. |
| US09520121B2 |
Acoustic and vibrational energy absorption metamaterials
A substantially acoustically transparent planar, rigid frame divided into a plurality of individual, substantially two-dimensional cells is used to construct a sound absorption panel. A sheet of a flexible material is fixed to the rigid frame, and a plurality of platelets fixed to the sheet of flexible material such that each cell is provided with a respective platelet, thereby establishing a resonant frequency, establishing an increase in an absorption coefficient of the panel. The flexible material has a wrinkle or corrugation to permit distortion with reduced material elasticity. The wrinkle or corrugation permits the flexible material to distort beyond that afforded by a planar material of the same type, while retaining mechanical strength in supporting the plurality of platelets. |
| US09520115B2 |
Drum slip
An interchangeable drum slip that may be quickly installed to change the appearance of a drum and to provide protection to the drum shell. The drum slip is a rectangular piece of material that is pre-cut to precisely fit specific models of drums. Openings are cut into the material that correspond with hardware that is attached to the drum shell. A user installs the drum slip by placing the drum slip around the drum shell and securing the ends of the drum slip together. The openings in the drum slip fit over and around any hardware that is attached to the drum shell and any apertures formed in the drum shell. The ends of the drum slip are pulled together and secured with an adhesive. For some drums, the drum slip may be installed without disassembling any parts of the drum. For other drums, one or more drum heads and retaining hoops must be removed to install the drum slip. The drum slip may be transparent, and the drum slip may be made in any color and messages, designs, or information may be printed on or molded into the drum slip. Anyone can quickly and easily change drum slips to change the appearance of a drum. |
| US09520113B2 |
Resonance control compression pad for the acoustic bass drum
A resonance control compression pad for the acoustic bass drum which in some embodiments may comprise: an elongate batter head contacting surface; an elongate resonance head contacting surface opposingly positioned to the elongate batter head contacting surface; and a plurality of baffles coupled to the elongate batter head contacting surface and to the elongate resonance head contacting surface. The elongate resonance head contacting surface may be configured to contact portions of a resonant head when the pad is positioned within a drum instrument, while the elongate batter head contacting surface may be configured to contact portions of a batter head when the pad is positioned within a drum instrument. The elongate resonance head contacting surface may exert pressure on the resonant head and the elongate batter head contacting surface may likewise exert pressure on the batter head, thereby providing resonance control to the drum instrument. |
| US09520112B1 |
Accordion, electronic accordion, and computer program product
An accordion includes a right hand play side, a left hand play side, a bellow provided between the right hand play side and the left hand play side, and four rows of buttons provided on at least one of the right hand play side and the left hand play side. The four rows of buttons include a first column to which first continuous four pitches are assigned, a second column, provided adjacent to the first column, to which second continuous four pitches are assigned, the second continuous four pitches being adjacent to the first continuous four pitches, and a third column, provided adjacent to the second column, to which third continuous four pitches are assigned, the third continuous four pitches being adjacent to the second continuous four pitches. |
| US09520110B1 |
String vibration frequency altering shape
The present invention is a novel variable tension string instrument that relies on a kinetic shape to actively alter the tension of a fixed length taut string. A mathematical model was derived that relates the two-dimensional kinetic shape equation to the string's physical and dynamic parameters. With this model, an automated instrument was designed and constructed to play frequencies within predicted and recognizable frequencies along with programmed melodies. |
| US09520104B2 |
Image display device and LUT adjustment method
An image display device includes a microcomputer and LUTs which are tables of correction data used to correct color balance of images. The microcomputer sets LUT extensions and calculates the LUTs based on: (1) the normalized values GainLn of the L conforming adjustment values GainL and the normalized values GainHn of the H conforming adjustment values GainH; (2) the normalized values Lin of the input values Liref of the image data of the L adjustment image and the normalized values Hin of the input values Hiref of the image data of the H adjustment image; (3) the correction data of the LUTs; and (4) the correction data of the LUT extension units. |
| US09520098B2 |
Gate driving circuit, display device and driving method
A gate driving circuit, a display device, and a driving method are disclosed in the present invention. The gate driving circuit comprises: a plurality of cascaded shift register units and a control unit, wherein every two adjacent shift register units constitute a shift register set and are connected to two gate lines through the control unit, and wherein the control unit controls the shift register units of the shift register set to supply drive signals to the two gate lines, respectively. Embodiments of the present invention improve a configuration of the circuit on the basis of original shift registers, thereby achieving compensation of charge rations between different frames and effectively alleviating phenomena of apparent bright/dark lines such as the vertical lines of the existing products. |
| US09520097B2 |
Display device with compensating backlight drive circuit and method for driving same
In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set. |
| US09520096B2 |
Liquid crystal display device
A liquid crystal display device includes: a light source section so configured that independently-controllable emission subsections are formed on a light-exit plane of a light-guide plate; a liquid crystal display panel modulating, based on an input picture signal, light exited from each of the emission subsections in the light source section; and a display controlling section having a partitioning-drive processing section generating, based on the input picture signal, an emission pattern signal representing a light emission pattern of the emission subsections in the light source section, and a partitioning-drive picture signal. The display controlling section performs, based on the partitioning-drive picture signal, display-drive on each pixel in the liquid crystal display panel, and performs, based on the emission pattern signal, light-emission drive through allowing one or more of first light sources and one or more of second light sources to emit concurrently so as to form the emission subsections. |
| US09520095B2 |
Display driving circuit, driving method thereof and display apparatus
The present disclosure provides a display driving circuit, a driving method thereof, and a display apparatus, to solve the issue regarding power consumption of the display driver due to multiple reversal of the data voltage. The driving method comprises: firstly, determining pre-input data signals that are respectively input by a data line to each pixel unit of a column of pixel units corresponding to the data line when inputting a Nth image frame; next, determining, according to magnitudes or polarities of the pre-input data signals, a scanning order for the gate lines; then, scanning the gate lines according to the scanning order; and then, inputting the pre-input data signals to corresponding pixel units by the data lines. |
| US09520094B2 |
Display device, electronic apparatus, and method for driving display device
According to an aspect, a display device includes: an image display panel; and a planar light source including a light guide plate and an edge-lit light source, the light guide plate illuminating the image display panel from a back side, the edge-lit light source including a plurality of light sources arranged facing a plane of incidence; and a controller that controls luminance of each of the light sources independently. The controller stores therein, as lookup tables for the respective light sources, information on light intensity distributions of light that is incident on the light guide plate from the respective light sources and is emitted to a plane of the image display panel from the light guide plate, and controls a light quantity of each of the light sources based on information on an input signal of an image, and on the lookup tables. |
| US09520078B2 |
Display device having a normal mode and an eye protection mode and method for driving same
A display device includes a display panel, a panel driving circuit, and a control circuit. The panel driving circuit receives image data and converts the image data into output driving voltages for the display panel. The image data include original red image data, original green image data, and original blue image data. When the display device enters an eye protection mode for protecting eyes of a user, the original blue image data is modified by the panel driving circuit to reduce the gray levels of the original blue image data. |
| US09520077B2 |
Four color converter, display apparatus and method for converting three color data to four color data
A four color converter includes: a first white balance module configured to effect white balance processing on raw RGB data to thereby obtain white balance processed RGB data, a four color determining module configured to determine RGBW data according to white balance processed RGB data provided by the first white balance module and a white color data extracted from the white balance processed RGB data; and a second white balance module configured to effect white balance processing on the RGBW data provided by the four color determining module to thereby obtain white balance processed RGBW data for display. The present invention further discloses a display apparatus having the four color converter and a method for converting three color data to four color data. The present invention can achieve remaining chromaticity value of each color unchanged as long as a ratio of four color data is not changed. |
| US09520073B2 |
Ex-vivo anatomic tissue specimen wound closure simulation model
A novel system and apparatus for testing surgical fastening devices in an ex-vivo body wall wound closure simulation device is disclosed. The system is particularly useful with simulating abdominal wall wound closure. The system has a body wall curvature approximator device, a tissue fixation system, and a tissue support and tensioner device. The system provides for anatomically correct presentation and tensioning on body wall tissue specimens for ex-vivo wound closure simulation. The system may also be used for other anatomic tissue specimens in addition to body walls. |
| US09520072B2 |
Systems and methods for projecting images onto an object
In one embodiment, a method for projecting images on a subject includes determining a pose and position of the subject, adjusting a three-dimensional model of an anatomical structure of the subject to match the determined pose and position, and projecting an image of the anatomical structure onto the subject in registration with the actual anatomical structure of the subject to illustrate the location of the structure on or within the subject. |
| US09520070B2 |
Interactive learning system and method
Disclosed is an interactive learning system and method comprising a plurality of student computing devices and database(s) connected through a network with teacher computing device(s), each adapted to help teachers and students engage in real-time qualitative content engagement, and may also provide real-time quantitative content engagement and analytics, to help determine the appropriate next learning steps of individual students and groups of students in real-time. In various example embodiments the system and method may provide actionable feedback and suggestions for students, for instance to help them understand the quality of their work and areas for further investigation. In various example embodiments the system and method may generate layers of data useful for improving subsequent classes directed to the same material, and for measuring and comparing various indicia, such as performance and trends at the student, teacher, school, district, and state levels, as well as identifying correlations and other statistical relationships. |
| US09520069B2 |
Method and system for providing content for learning appliances over an electronic communication medium
A method, a user interface, and an educational content server for assisting a user in learning using interactive learning appliances are disclosed. The performance information of the user, which may be in the form of a user log file in an interactive learning appliance, may be received at a server computer from a site where the user is present. The performance information and profile information can then be presented in the user interface and used to generate an electronic content package. The electronic content package can then be received and loaded into the interactive learning appliance. |
| US09520062B2 |
Method for locating a vehicle
A portable computing device can be used to locate a vehicle in a parking structure. In particular, the portable computing device can communicate with a parking system that manages the parking structure and/or with a vehicle in order to locate the vehicle. Communications between the portable computing device, parking system and vehicle can be based on one or more wireless connections, such as Bluetooth and/or Bluetooth LE connections. |
| US09520055B2 |
Process of communication between a first node and a second node of a home automation installation
Method of communication between a first node and a second node of a home-automation installation, the method comprising the transmission of a first signal from a first transmitting part of the first node to a second receiving part of the second node, upon receipt of the first signal by the second node, transmission of a second signal from a second transmitting part of the second node to a first receiving part of the first node, the second signal comprising a signal confirming to the first node that the first signal has indeed been received and understood, and placing in the inactive state or maintaining in the active state the first receiving part as a function of an information cue contained in the second signal received by the first node. |
| US09520052B2 |
Security tag system with improved range consistency
A radio transmitter used to transmit an activation signal for radio tags held by individuals or the like provides multi-dimensional polarization to an activation signal so as to allow more consistent range detection of an individual with a tag having a single axis of sensitivity. Circular or spherical polarization can be obtained using the system which may include an antenna design permitting decoupling of antennas necessary for the polarization, a quadrature locking system simplifying proper phase control of the necessary signals and a system for tuning the same. |
| US09520051B1 |
System and method for implementing personal emergency response system based on UWB interferometer
A non-wearable Personal Emergency Response System (PERS) architecture is provided, having a synthetic aperture antenna based RF interferometer followed by two-stage human state classifier and abnormal states pattern recognition. In addition, it contains a communication sub-system to communicate with the remote operator and centralized system for multiple users' data analysis. The system is trained to learn the person's body features as well as the home environment. The decision process is carried out based on the instantaneous human state (Local Decision) followed by abnormal states patterns recognition (Global decision). The system global decision (emergency alert) is communicated to the operator through the communication system and two-ways communication is enabled between the monitored person and the remote operator. In some embodiments, a centralized system (cloud) receives data from distributed PERS systems to perform further analysis and upgrading the systems with updated database (codebooks). |
| US09520047B2 |
Terminal and a method of controlling the same based on a state of the terminal
A first terminal configured to operate in conjunction with a second terminal, the first terminal including: a sensor configured to obtain information corresponding to a motion of the first terminal; a communicator configured to receive information corresponding to a motion of the second terminal from the second terminal; and a controller configured to, in response to a distance between the first terminal and the second terminal being greater than or equal to a critical value, control the communicator to transmit a notification message to the second terminal based on the information corresponding to the motion of the first terminal and the information corresponding to the motion of the second terminal. |
| US09520044B2 |
Apparatus and method for monitoring and controlling detection of stray voltage anomalies
Apparatus and methods for detecting stray voltage anomalies in electric fields are provided herein. In some embodiments, an apparatus for detecting an electrical field may comprise: at least one sensor probe for generating data corresponding to an electrical field detected by the at least one sensor probe, wherein the at least one sensor probe comprises at least one electrode; a processor, coupled to the at least one sensor probe, for analyzing the data to identify a voltage anomaly in the electric field; and an indicator, coupled to the processor, for alerting a user to a presence of the voltage anomaly in the electric field. |
| US09520042B2 |
Smoke detector with enhanced audio and communications capabilities
A smoke detector has enhanced audio and communications capabilities that allow audio content to be provided at each smoke detector location. This audio content may be music, intercom, doorbell actuation and radio programs. The smoke detector may also include a microphone for monitoring and two way communications between two or more smoke detectors, a intercom panel at a doorbell location, controlling lights in an area of the smoke detector with voice commands, and further providing for speakerphone answering and communications capabilities. Audio content and control may be provided to the smoke detector with a software program application running on a personal computer, tablet computer and a smart cell phone. A smoke detector may further be controlled with a Bluetooth or infrared handheld controller located in a area proximate to the smoke detector. |
| US09520038B2 |
Copper theft alarm for grain bin systems
A copper theft alarm system is disclosed. The alarm system can be deployed on existing grain bins or other electrically powered equipment, allowing persons to receive an automated phone call, text message notification, or other desired notification when the system has sensed that a copper cable is being pulled out of a conduit. The notification can aid in potentially disrupting a thief's activity. |
| US09520032B2 |
Slots journey game
A method for a slots game is disclosed. Such a slots game includes simulated gambling elements and adventure elements. Further, such a slots game has a viral effect of attracting members of gamer's social network. |
| US09520031B2 |
Slot machine game with symbol lock-in
A slot machine game that allows a player to lock in particular symbol(s) after playing a game. If the player prefers one or more particular symbols to remain in position after a spin, the player can indicate to the slot machine the desire to lock in the particular symbols, wherein the player will have to pay a price for the ability to have those symbols locked in for a next spin. Then, the player places another wager and spins the reels while the particular symbols remain unchanged. |
| US09520030B2 |
Methods of receiving electronic wagers in a wagering game via a handheld electronic wager input device
A gaming system for conducting a multi-player wagering game includes a multi-touch table surface that is touched by a handheld electronic wager input device (EWID) carried by a player for placing wagers on a wagering game displayed on the multi-touch table surface. Each EWID carried by a player has an associated unique identification code, which is linked to the respective player's account. Players indicate an amount to be wagered by touching the EWID to designated wager amount areas, then place the wager by touching the EWID to a designated wagering area. Because each EWID is uniquely associable with distinct player accounts, the gaming system can support any number of players placing wagers. The funds remain safe in the player account and no funds are stored on the EWID. Only the identification code is detected, which is compared with the associated player account before allowing that player to place wagers. |
| US09520029B2 |
Wagering game machine having enhanced eligibility for progressive jackpots
A gaming system includes game logic circuitry for a wagering game which awards one or more progressive jackpots upon the occurrence of a progressive jackpot triggering event. The game logic circuitry also operates the wagering game to grant progressive jackpot eligibility for one or more progressive jackpot awards for a player wagering an amount which would otherwise deny the player eligibility for the one or more of the progressive jackpot awards. As a result of maintaining progressive jackpot eligibility with the reduced wagering amount, one or more winning combinations in the pay table of the wagering game are removed or reduced. |
| US09520028B2 |
Gaming machine that progresses the games from base games to feature games
Provided is a gaming machine that can entertain a player by developing various game results after entering a feature game mode from a base game mode. The gaming machine progresses the games as follows: in base games, if trigger symbols appearing at rearrangement of symbols complete a specific arrangement pattern, the games are changed from base games into roulette games. In roulette games, the maximum number of lotteries is determined based on the arrangement pattern of the trigger symbols. |
| US09520026B2 |
Game system
A game system that is capable of performing a game by employing an information card in place of a conventional paper-based system is provided.This game system includes: a plurality of gaming machines; a bill identifying device that is associated with each of the gaming machines, for identifying bills of different currencies and an amount of the bills, and outputting data representative of an identified result; a player tracking device that is integrated with each of the gaming machine, for converting data output from the bill identifying device to credit data for executing a game, based on a money exchange rate stored therein, and sending out the converted credit data to the gaming machine; a control device for inputting a money exchange rate from an outside, providing the input money exchange rate to the player tracking device, and updating the money exchange rate stored in the player tracking device; and an information card device that is integrated with the player tracking device, for causing an information card to store data equivalent to an amount of money to be awarded to a player according to a game result of the gaming machine, and sending out credit data for executing a game to the gaming machine. |
| US09520022B2 |
Wagering game with a secondary reel having oversized single-evaluation symbols
A gaming system includes one or more input devices, one or more display devices, and one or more processors, and one or more memory devices storing instructions that cause the gaming system to receive an input indicative of a wager. The instructions further cause the gaming system to display a wagering game having an array of symbol positions positioned on a plurality of primary reels and at least one secondary reel overlaying two or more adjacent primary reels, the secondary reel including at least one oversized standard symbol, the oversized symbol overlaying symbol positions on at least two of the two or more adjacent primary reels. The instructions further cause the gaming system to spin the two or more adjacent primary reels and the secondary reel such that the two or more adjacent primary reels and the secondary reel appear to spin as a single reel. |
| US09520021B2 |
Contest at a target game location
To conduct a contest, game parameters are downloaded from a server to a device in response to a player app being launched on the device. The player device displays available games that can be played by a player, the games including target game locations from which the games can be played. A player is allowed to select a game to play only when the player is within a predetermined distance of a target game location and when check-ins are still available for the game. A jackpot prize is awarded to the player if the player is a winner of a game selected by the player. The player is entered in a raffle if the player is not the winner of the game selected by the player. |
| US09520019B2 |
Gaming machine
When a trigger condition is established in a normal game, the following processes are executed: a process of shifting to a bonus game in which a re-trigger condition which is less stringent than the trigger condition may be established; and when the re-trigger condition is established in the bonus game, a process of adding another bonus game having a smaller benefit than the bonus game and executing the another bonus game. |
| US09520018B2 |
Controlling priority of wagering game lighting content
A wagering game system and its operations which can include analyzing electronic information associated with a first gaming effect and a second gaming effect provided for concurrent presentation via an output device, determining that the first gaming effect has a higher priority than the second gaming effect, and causing the first gaming effect to be presented via the output device before the second gaming effect is presented based on the higher priority. The operations can further include preventing, without user input, presentation of a first portion of the second amine effect via the output device while the first gaming effect is presented. The operations can further include electronically determining that a second portion of the second gaming effect is available for presentation after an ending point for the first gaming effect, and causing the second portion to be presented via the output device after the first gaming effect. |
| US09520016B2 |
System and method of allowing a player to play gaming machines having reel overlays
A game machine is provided. The machine comprises a display and a controller. The display is configured to display a plurality of symbol cells displayed in a grid. The controller is configured to: establish a first reel layout and a second reel layout, the second reel layout having a blank symbol in a plurality of consecutive symbol positions and at least one identical symbol in a plurality of consecutive symbol positions; randomly shift the second reel layout by a number of symbol positions in relation to the first reel layout; combine the second reel layout with the first reel layout to create a combined reel layout; and assign the combined reel layout to one of the reel strips. |
| US09520010B1 |
Decorative glass panel for garage door
The decorative glass panel for garage door is a sectional garage door with a fingerprint scanner. The sectional garage door is formed from a plurality of door panels. Each of the plurality of door panels have been formed with decorative designs intended to make each panel visually appealing. Associated with the decorative glass panel for garage door is an entry scanner that is allows for access into the garage without the use of a remote control. The decorative design of the scanner housing is coordinated with the design of each of the plurality of door panels which enhances the overall decorative appeal of the decorative glass panel for garage door. The decorative glass panel for garage door comprises a plurality of door panels and an entry scanner. |
| US09520009B2 |
Screen unlocking method, apparatus, and device
The present invention discloses a screen unlocking method, apparatus, and device, and relates to the field of touch control technologies, which can shorten the unlocking time and improve user experience. The method includes: displaying a screen unlocking interface which includes a password unlocking area and a shortcut unlocking area on a screen; receiving an unlocking pattern which includes a password unlocking pattern input through the password unlocking area and a shortcut unlocking pattern input through the shortcut unlocking area; determining whether the password unlocking pattern input by the user is consistent with a preset password unlocking pattern; and if the password unlocking pattern input by the user is consistent with the preset password unlocking pattern, unlocking the screen to enter a function interface corresponding to the shortcut unlocking pattern. The present invention is applicable to unlocking technologies of touch devices. |
| US09520007B2 |
Remotely operable lockout system
A lockout system that includes a lock portion and a key portion that removably cooperate with one another to allow selective interference with a throw lever associated with operation of an electrical panel. The lock portion and key portion each include a guide arrangement and an electrical interface that cooperate with one another. The guide arrangements cooperate with one another to align the electrical interfaces of the respective key and lock portions. The lock portion includes a movable lock arm that selectively interferes with motion of the throw lever. The position of the lock arm relative to the throw lever can be manipulated when the electrical interfaces of the key portion and the lock portion are engaged with one another. Preferably, the lock and key interface includes an RFID protocol associated with authorizing respective key portions to communicate with respective lock portions. |
| US09520004B2 |
Electronic parking disc
Parking disc for mounting on a vehicle in a location so as to be at least externally visible for indicating a time for initiation of the parking with an electronic display which shows the actual time during normal driving and during parking constantly shows the time of initiation of the parking. The parking disc is designed so that switching the display when resuming driving is effected on the basis of an electric signal from at least one detector that determines an actual relative movement of the vehicle in excess of a minimum value with the electronic parking disc continuing to show a fixed time that indicates initiation of parking until the mentioned detector has determined the minimum value of movement of the vehicle has occur. This value may, e.g., be that the vehicle has moved at least a certain distance from the point at which parking had been initiated. |
| US09520001B2 |
3D model enhancement
One embodiment involves receiving a fine mesh as input, the fine mesh representing a 3-Dimensional (3D) model and comprising fine mesh polygons. The embodiment further involves identifying, based on the fine mesh, near-planar regions represented by a coarse mesh of coarse mesh polygons, at least one of the near-planar regions corresponding to a plurality of the coarse mesh polygons. The embodiment further involves determining a deformation to deform the coarse mesh based on comparing normals between adjacent coarse mesh polygons. The deformation may involve reducing a first angle between coarse mesh polygons adjacent to one another in a same near-planar region. The deformation may additionally or alternatively involve increasing an angle between coarse mesh polygons adjacent to one another in different near-planar regions. The fine mesh can be deformed using the determined deformation. |
| US09519996B2 |
Virtual view generating method and apparatus
A virtual view generating method and apparatus are provided that are used to resolve a technical problem existing in the prior art that there are holes in a virtual view, so as to improve quality of the virtual view. The method includes obtaining an original image and an original depth map of the original image; preprocessing the original depth map based on an adaptive filtering algorithm to obtain a processed depth map; generating a basic virtual view based on the original image and the processed depth map; and performing hierarchical hole filling on the basic virtual view based on a deconvolution algorithm to generate a virtual view. |
| US09519995B2 |
Method of mapping image information from one face onto another continuous face of different geometry
An information processing method transfers information from a start face to an end face with a minimum local distortion by maintaining one-to-one correspondence between the original information on the start face and the transferred information on the end face. The method includes an operation of mapping information taken from a three-dimensional surface onto a rectangular plane, or vice versa, by dividing the start face into a plurality of divisional start faces and preparing divisional end faces that just fill the end face, then deforming each divisional start face to just fit a corresponding one of the divisional end faces, so as to maintain lines and points defining each divisional end face as lines and points also on the end face and to ensure that a first area ratio between each divisional start face relative to the entire start face and a second area ratio between each divisional end face relative to the entire end face is substantially equal. |
| US09519994B2 |
Systems and methods for rendering 3D image independent of display size and viewing distance
Methods and systems for providing and rendering 3D depth information are described. Specifically, the 3D depth information includes z-axis values provided in a normalized percentage format, that defines the position of an object relative to an infinity plane, a display screen, and a viewer, and can be used to render one or more images independent of display screen size and viewing distance. |
| US09519993B2 |
Medical image processing apparatus
A medical image processing apparatus according to an embodiment for visualization of each of plural captured image volume data having time of day information includes a generator configured to generate interpolation volume data for interpolation in the plural captured image volume data, based on the plural captured image volume data, and a display unit configured to visualize and display the plural captured image volume data and the interpolation volume data. The generator extracts a feature region in the captured image volume data, and is configured such that processing for generating the interpolation volume data for the feature region is different from processing for generating the interpolation volume data for other regions, so as to suppress a change in shape of the feature region. |
| US09519992B2 |
Apparatus and method for processing image
An image processing apparatus includes a ray generator configured to generate at least one ray, a plurality of tree searchers configured to perform a tree search of the generated at least one ray, an area divider configured to divide the generated at least one ray into a plurality of subareas based on information regarding a number of tree searches of a previous image frame, and a ray allocator configured to allocate the plurality of subareas divided by the area divider to the plurality of tree searchers respectively. |
| US09519991B2 |
Method for displaying optically determined surface geometries
In a method for displaying at least one property of an optically determined surface geometry of at least one three-dimensional object, in particular a tooth, on a display, in particular a computer screen, a defined region of the surface geometry is monitored to ascertain whether a defined criterion has been fulfilled. An amount of optically determined data of the defined region is a criterion. A number of defined regions of the surface geometry are assigned a property when all the regions of the number meet the criterion. The property is displayed graphically in a defined manner, wherein different properties are graphically displayed in a differing manner. |
| US09519988B2 |
Subspace clothing simulation using adaptive bases
A method of animation of surface deformation and wrinkling, such as on clothing, uses low-dimensional linear subspaces with temporally adapted bases to reduce computation. Full space simulation training data is used to construct a pool of low-dimensional bases across a pose space. For simulation, sets of basis vectors are selected based on the current pose of the character and the state of its clothing, using an adaptive scheme. Modifying the surface configuration comprises solving reduced system matrices with respect to the subspace of the adapted basis. |
| US09519987B1 |
Managing character control in a virtual space
Character control in a virtual space may be managed between user instructions and non-user instructions. User instructions associated with controllable aspects of characters within the virtual space may be received. The characters may include a first character associated with a first user and a second character. Non-user instructions associated with controllable aspects of characters within the virtual space may be provided. A determination may be made as to whether two or more characters are coupled together. The first character may be coupled with the second character responsive to a coupling action performed by one or both of the first character or the second character. A determination may be made as to whether user instructions or non-user instructions should dictate control of controllable aspects of characters. Individual characters may be configured to be agnostic as to whether user instructions or non-user instructions dictate control of controllable aspects. |
| US09519984B2 |
Image processing device, image processing method, information storage medium, and program
In a combined image obtained by superposing a character image on an image such that a second text rendered in the character image overlaps a first text rendered in the image, an image processing device according to the present invention determines a part of a character portion constituting a pre-translation character string, not covered by non-transparent pixels constituting a post-translation character string as a deficient pixel D, and corrects color attribute of the deficient pixel D in the combined image by utilizing color attribute of a part of the combined image or of the image. |
| US09519982B2 |
Rasterisation in graphics processing systems
A rasterizer and a method of performing rasterization in a graphics processing pipeline are disclosed. A rasterizer of a graphics processing pipeline tests larger patches of a render output to be generated against a primitive to be rasterized, to determine if the primitive covers (at least in part) any smaller patches of the render output that the larger patch encompasses. The larger patch is then sub-divided into any covered smaller patches, and the process repeated. The rasterizer also identifies when a given smaller patch of the render output is found to entirely pass the edge test for an edge of the primitive in question when the larger patch encompassing that smaller patch is tested, notes that event in state information associated with the primitive edge in question, and then uses that state information to skip the testing of the edge in question against the smaller patch of the render output. |
| US09519978B2 |
Cursor for application of image adjustments
Systems and techniques are disclosed for applying an effect to a digital image using a cursor. An effect can be applied to an image at a region under a cursor. The cursor has an outer periphery and an effect indicating periphery within the outer periphery. The outer periphery defines a maximum extent to which the effect is applied. The effect indicating periphery indicates how the effect will be applied to the image, such as providing a visual indication of a softness setting. |
| US09519977B2 |
Letterbox coloring with color detection
A system comprising a computer-readable storage medium storing at least one program, and a computer-implemented method for generating background for an image. A graphical interface module arranges an image in a display element. The arrangement of the image in the display element defines a space between the perimeters of image and the display element. A color detection module determines an estimate of a color of the image about the perimeter of the image. A background generator module determines a variation of color of the image about the perimeter of the image. The background generator module determines a background based at least on the estimate of the color and the variation of color. A display module provides the arrangement of the image in the display element with the background at least filling a portion of the space defined between the perimeters. |
| US09519975B2 |
Method of detecting edge under non-uniform lighting background
A method of determining an edge of an object on a digital image sequence comprising the step of determining a first gradient direction profile of a first image in the digital image sequence; determining a second gradient direction profile of a second image in the digital image sequence; computing a differential profile based on the first gradient direction profile and the second gradient direction profile; and determining the edge of the object based on the differential profile wherein the differential profile registers gradient magnitudes of the second gradient direction profile and angular differences between the first gradient direction profile and the second gradient direction profile. A system thereof is also disclosed. |
| US09519974B2 |
Image processing apparatus and image processing method
Plural block images are generated by dividing an input image into blocks each of which has a predetermined size. Clustering of pixels contained in the plural block images is performed based on a representative point associated with each of those block images to apply region segmentation to those block images. The representative point is a part of plural representative points disposed in the input image. The clustering in a target block image of the region segmentation is performed by referring to a representative point in the target block image, a representative point of a processed block image, and a representative point of an unprocessed block image. The processed and unprocessed block images are adjacent to the target block image. |
| US09519972B2 |
Systems and methods for synthesizing images from image data captured by an array camera using restricted depth of field depth maps in which depth estimation precision varies
Systems and methods are described for generating restricted depth of field depth maps. In one embodiment, an image processing pipeline application configures a processor to: determine a desired focal plane distance and a range of distances corresponding to a restricted depth of field for an image rendered from a reference viewpoint; generate a restricted depth of field depth map from the reference viewpoint using the set of images captured from different viewpoints, where depth estimation precision is higher for pixels with depth estimates within the range of distances corresponding to the restricted depth of field and lower for pixels with depth estimates outside of the range of distances corresponding to the restricted depth of field; and render a restricted depth of field image from the reference viewpoint using the set of images captured from different viewpoints and the restricted depth of field depth map. |
| US09519971B2 |
Position and orientation measurement device and position and orientation measurement method
A position and orientation measurement device includes a grayscale image input unit that inputs a grayscale image of an object, a distance image input unit that inputs a distance image of the object, an approximate position and orientation input unit that inputs an approximate position and orientation of the object with respect to the position and orientation measurement device, and a position and orientation calculator that updates the approximate position and orientation. The position and orientation calculator calculates a first position and orientation so that an object image on an image plane and a projection image of the three-dimensional shape model overlap each other, associates the three-dimensional shape model with the image features of the grayscale image and the distance image, and calculates a second position and orientation on the basis of a result of the association. |
| US09519970B2 |
Systems and methods for detecting a tilt angle from a depth image
A depth image of a scene may be received, observed, or captured by a device. A human target in the depth image may then be scanned for one or more body parts such as shoulders, hips, knees, or the like. A tilt angle may then be calculated based on the body parts. For example, a first portion of pixels associated with an upper body part such as the shoulders and a second portion of pixels associated with a lower body part such as a midpoint between the hips and knees may be selected. The tilt angle may then be calculated using the first and second portions of pixels. |
| US09519967B2 |
Apparatus, method and operating method of apparatus for excluding non-target-region of fluorescence
Fluorescence generated at a lesion is distinguished from fluorescence generated at portions other than the lesion, and thus, observation is performed by using only the fluorescence generated at the lesion. Provided is a fluorescence observation apparatus including a light radiating portion that radiates excitation light onto an examination subject; a fluorescence-distribution acquiring portion that acquires an intensity distribution of fluorescence generated at the examination subject due to irradiation with the excitation light from the light radiating portion; and a non-target-region excluding portion that, in the fluorescence-intensity distribution acquired by the fluorescence-distribution acquiring portion, excludes regions in which a spectrum in a specific wavelength band has changed due to a specific biological component whose concentration in a lesion is lower than in other portions. |
| US09519963B2 |
Device and method for analysis of coating additive performance
A product testing apparatus is described as having one or more imager configured to capture one or more images of a sample having a substrate coating applied to a substrate, a processor in communication with the imager, and a non-transitory processor readable medium, in communication with the processor. The non-transitory processor readable medium stores processor executable instructions that when executed cause the processor to receive the one or more images from the one or more imager. The processor then processes the one or more image by filtering lighting variations in the pixels of the one or more images to identify one or more objects of interest in the one or more images of the cured/uncured substrate coating. The processor quantifies one or more property of the one or more objects of interest. The processor executable instructions then cause the processor to generate one or more signal indicative of the quantification of the one or more objects of interest. |
| US09519959B2 |
Image processing apparatus, imaging apparatus, and method for processing image
An image processing apparatus includes a memory unit configured to store original image data, a read unit configured to read, from the memory unit, image data of a rectangular area that is part of the original image data, to set pixel values to a flanking area that is added to the rectangular area in a surrounding space thereof, and to output extended image data inclusive of the image data of the rectangular area and image data of the flanking area to which the pixel values are set, and a first filtering process unit configured to apply a filtering process to the extended image data. |
| US09519958B2 |
Image processing method and image processing device with pixel correction
A method includes: calculating a pixel statistical value and edge of pixels for each of areas of a multi-layer, the areas each containing a target pixel and having a successively decreased range; correcting the edge based on a pixel statistical value of an area that is wider than a specific area; correcting difference between a pixel statistical value of the specific area and the pixel statistical value of the area that is wider than the specific area using the post-correction edge; correcting the pixel statistical value of the specific area using post-correction difference and the pixel statistical value of the area that is wider than the specific area; and correcting the target pixel by repeating correction of the pixel statistical value of the specific area successively in each area until the area reduces its range from the maximum range to the minimum range. |
| US09519952B2 |
Image processing apparatus and method
An image processing apparatus includes a gradient calculation unit, a direction determining unit, a directional interpolation unit, and a blender unit. The gradient calculation unit processes an input image to generate gradient magnitudes and gradient angles associated with input pixels of the input image. The direction determining unit generates interpolation angles and directional confidence values according to the gradient magnitudes and gradient angles. The directional interpolation unit performs directional interpolation on the input image according to the interpolation angles, so as to generate a first image with an image resolution different from the input image. The blender receives the first image and a second image generated from interpolating the input image, and blends the first image and the second image according to the directional confidence values to generate an output image. |
| US09519944B2 |
Pipeline dependency resolution
Techniques are disclosed relating to dependency resolution among processor pipelines. In one embodiment, an apparatus includes a first special-purpose pipeline configured to execute, in parallel, a first type of graphics instruction for a group of graphics elements and a second special-purpose pipeline configured to execute, in parallel, a second type of graphics instruction for the group of graphics elements. In this embodiment, the apparatus is configured, in response to dispatch of an instruction of the second type, to mark a particular instruction of the first type with information indicative of the dispatched instruction. In this embodiment, the particular instruction and the dispatched instruction correspond to the same group of graphics elements. In this embodiment, the apparatus is configured to stall performance of the dispatched instruction until the first special-purpose pipeline has completed execution of the marked particular instruction. Exemplary instruction types include interpolate and sample instructions. |
| US09519943B2 |
Priority-based command execution
A method of processing commands is provided. The method includes holding commands in queues and executing the commands in an order based on their respective priority. Commands having the same priority are held in the same queue. |
| US09519937B2 |
System and method for social network access
A method of forming unique, private, personal, virtual social networks on a social network system that includes a database storing data relating to corresponding user entities. The method includes: a first user entity sending an invitation to a second user entity, recording in the database the second user entity as a direct contact of the first user entity and determining that third user entities, directly connected to the second user entity, are indirect contacts. A unique, personal, social network formed from direct and indirect contacts is thereby created for each user entity. Each user entity is able to control privacy of its data with respect to other user entities depending on the connection factor to that other entity and/or that other entity's attributes. Each user entity is able to take the role of provider or participant in applications where the provider provides an item or service to the participant. |
| US09519933B2 |
Delivery payment systems
Various embodiments of the invention are directed to computer systems for facilitating payment for an item that is sent from a consignor to a consignee. In particular embodiments, the computer system facilitates an automatic, electronic transfer of payment for the item at a designated time that, for example, may be defined in relation to the delivery of the item to the consignee. For example, payment for the item may be electronically transferred to the consignor's bank account via a clearinghouse server at a designated time after delivery of the item, by a common carrier, to the consignee. |
| US09519929B2 |
Method and apparatus for providing a shopping list service
A method and apparatus is disclosed that provides an Internet wish list for deferred purchasing. A user clicks on an add to wish list button located on locations, such as, a product page, a banner ad, or search results to add an item to the wish list. A reminder system is used to remind a user to purchase an item at a future time. The shopping list service may be integrated at a high level of integration and a low level of integration. On a low level of integration a proxy platform is used to add functionality to a website. |
| US09519928B2 |
Product evaluation based on electronic receipt data
Embodiments of the invention are directed to systems, methods and computer program products for providing product evaluation. An exemplary apparatus is configured to identify purchase transaction data associated with identified electronic communications between a merchant and a customer, the purchase transaction data includes product level data from a transaction, receive the identified purchase transaction data, the purchase transaction data is received in an unstructured format, convert the purchase transaction data from the unstructured format to a structured format, associate the structured purchase transaction data with the customer's online banking application, aggregate purchase transaction data related to one or more products purchased by the customer, determine one or more products are purchased on a recurring basis, and provide the customer with one or more options based at least partially on determining the one or more products are purchased on a recurring basis. |
| US09519927B1 |
System for cosmetics matching based on skin tone
A system allows people to more easily find products matching their skin tone. A kiosk at a retail store or other location can assist customers in determining what products are right for them and then purchase them from the retailer. The kiosk can include a scanning device is used to scan one or more spots of a person's skin. For example, three different spots can be scanned. The scan determines a skin-tone identifier for the person's skin. This skin-tone identifier is used by a software program (e.g., executing on a tablet computer) to determine and output a listing of products that are appropriate for the person's skin tone. |
| US09519924B2 |
Method for collective network of augmented reality users
Embodiments of the invention provide for using video analysis, such as augmented reality or the like to assist a group of users to utilize mobile devices for creating a collective network environment of users that identifies objects in which one or more users in a group of users may be interested, and notifies the one or more users of information associated with the object. A collective network comprises a group of users that each have a mobile device that contains or is otherwise operatively coupled to a data capture device. For example, the mobile device may be a mobile phone that is capable of taking video with a camera device. A user in the collective network may capture video on his mobile device, and an application can identify the object in the video and provide interested users in the collective network with information about the object. |
| US09519917B2 |
Context-based advertising
A method and a system for context-based real-time advertising are provided. In example embodiments, a document content that is displayed to a user may be analyzed and keywords may be identified. Selected listings from a publication system may be received; the selected listings may be selected using the keywords. The system may detect user events associated with the keywords and, in response to the detection of the user events, display information related to the listings while maintaining the displaying of the document content. |
| US09519915B1 |
System and method for providing shopping aids and incentives to customer through a computer network
A system and method for delivering purchasing incentives and a variety of other retail shopping aids through a computer network, such as by E-mail over the Internet or the World Wide Web. Customers (10) of retail stores can establish a bi-directional communication link with the system, log in (16) to the system, and then elect to browse among available purchasing incentive offers (18, 22), or elect to explore other shopping aids, such as a shopping list generator (26), a recipe center (30), or simply elect to claim a product rebate or to receive product information. If the customer elects to have product information or rebate information delivered, only minimal customer identification is required. For purchase incentives redeemable at retail stores, the customer must provide identification information and must also designate a retailer (12) at which the purchasing incentive can be exercised. For receipt of focused incentives based the customer's past shopping behavior, the customer must also supply a unique customer id., such as a check cashing card number or credit card number, used for in-store purchases. For delivery of a product sample, the customer's name and address must be supplied. The system merges this customer-supplied information (270) with other purchase incentive data (272) and creates a printable graphical image of the purchasing incentive (282) for transmission to the customer. In an alternate embodiment of the invention, the purchase incentive is not transmitted directly to the customer. Instead, the terms of the incentive are transmitted electronically to the retail store (310) designated by the customer, who receives either a token (316) to present at the store or an advisory message. In yet another embodiment of the invention, incentives may be targeted to specific consumers based on a consumer purchase history (502), and transmitted to consumers' computers (510) using electronic mail addresses stored in a consumer database (506), or using a “personal page” in the computer network, established for each consenting consumer. |
| US09519914B2 |
Methods and apparatus to determine ratings information for online media presentations
Methods and apparatus to determine ratings information for online media presentations are disclosed. An example method includes receiving pingback messages corresponding to presentation of media at a client device, determining a portion of the media that was presented at the client device based on the pingback messages, obtaining demographic information associated with the client device, and determining a demographic characteristic associated with the presentation of the portion of the media based on the pingback messages and the demographic information. |
| US09519907B2 |
Method and apparatus for efficient delta pricing
A method includes generating a delta price and generating a final price using the delta price. A process and system provide an ability to determine a product's final price with a selected set of features in which multiple configurations are to be generated. The ability to determine such final prices can be based on the ability to determine the change in price between one configuration of a product and that of another product configuration (e.g. the product configured with the desired feature(s)). A customer is able to select one or more features, and so view the effect on the product's final price, as well as compare the prices (and incremental price differences) between various configurations of a given product. This increases the likelihood of the purchase being made, because it provides the potential purchaser with the final price earlier in the sales cycle. |
| US09519899B2 |
Secure mobile-based financial transactions
Devices, systems and methods are disclosed which relate to securing payments from a mobile communications device. In exemplary embodiments, a mobile communications device communicates with a payment server via a point-of-sale device to conduct a transaction. The mobile communications device uses a client payment logic to send payment information to the point-of-sale device. The point-of-sale device uses a vendor payment logic to forward the payment information to the payment server. The payment server verifies the payment information and sends confirmation to the point-of-sale device. |
| US09519897B2 |
Reading apparatus and commodity sales data processing apparatus
In accordance with one embodiment, a reading apparatus which reads information from a RFID tag attached to a commodity comprises a housing which includes an opening serving as an entrance/exit of the commodity and space for housing the commodity inside; an antenna arranged in the space; an opening and closing lid for opening and closing the opening; a reading module which reads information relating to the commodity from the RFID tag attached to each commodity housed in the housing through the antenna; and an output module which outputs the information read by the reading module. |
| US09519892B2 |
Systems and methods to accelerate transactions
Systems and methods to accelerate transactions made via mobile communications. In one aspect, a system includes: a memory to store transaction records indicating actual amounts of funds collected via a first plurality of premium messages transmitted to a first plurality of phone numbers; and a processor coupled with the memory to transmit, to a second plurality of phone numbers, a second plurality of premium messages to collect payments on behalf of a merchant. Before funds collected via the second premium messages become available, the processor identifies a portion of a total amount of funds charged via the second premium messages, based at least in part on the transaction records stored in the memory, and offers to provide the portion to the merchant. |
| US09519889B2 |
Automatic discovery of how and when people met
A system, computer-readable storage medium, and computer-implemented method for automatic discovery of how and when people met is provided. A plurality of signals are analyzed to determine a level of significance of each of the plurality of signals in providing a suggested entry into a data field of a contact management system designated to provide a description of how a user met a contact. In response to at least one signal of the plurality of signals exceeding a threshold level of significance, a suggested entry for the data field of the contact management system is determined. The suggested entry of how a user met a contact is automatically displayed to a user. |
| US09519887B2 |
Self-service data importing
Aspects of the disclosure relate to methods, systems, and apparatuses for self-service data importing. In some aspects, a user may interact with a data importing server to import data into a database and/or manipulate existing data and/or data associations in the database. The data importing server may contain files or scripts of different specifications or processes to perform for a plurality of predefined jobs. The user may interact with the data importing server via a user interface. The user interface may outline each step in the process and enable steps only after the user has completed a previous, prerequisite step. The user interface may provide user selectable buttons to input user commands, and the user selectable buttons may initially be disabled and become enabled after the user or the system performs the corresponding prerequisite step. |
| US09519883B2 |
Automatic project content suggestion
Automatically suggesting content, for example, documents, contacts information, tasks, calendar items, and the like, for inclusion into an electronic collaborative workspace is provided. Given a short description of a given project or collaborative workspace, an initial project membership list, and identification of local or external content repositories, content associated with the project or workspace may be retrieved and recommended to one or more users for inclusion into the project or collaborative workspace. Thus, the time and effort required for initially populating an electronic workspace with needed content is dramatically reduced. |
| US09519882B2 |
Autonomous mobile bin storage and retrieval system
A method and system for piece-picking or piece put-away within a logistics facility. The system includes a central server and at least one mobile manipulation robot. The central server is configured to communicate with the robots to send and receive piece-picking data which includes a unique identification for each piece to be picked, a location within the logistics facility of the pieces to be picked, and a route for the robot to take within the logistics facility. The robots can then autonomously navigate and position themselves within the logistics facility by recognition of landmarks by at least one of a plurality of sensors. The sensors also provide signals related to detection, identification, and location of a piece to be picked or put-away, and processors on the robots analyze the sensor information to generate movements of a unique articulated arm and end effector on the robot to pick or put-away the piece. |
| US09519881B2 |
Estimating journey destination based on popularity factors
The disclosure includes technology for estimating journey destinations based on crow-sourced popularity factors. The technology includes an example system including a processor and a memory storing instructions that when executed cause the system to: receive location data; determine a current route associated with a user based on the location data; determine one or more crowd-sourced popularity factors; estimate one or more destination estimations along the current route based on the one or more crowd-sourced popularity factors; and suggest the one or more destination estimations to the user. |
| US09519874B2 |
HVAC controller with regression model to help reduce energy consumption
A thermal control system for a building is disclosed, which includes a regression model: Given a forecast temperature outside the building, the regression model predicts how much an HVAC system will cost to run during a day, for a given set of time-varying target temperatures for all the thermostats in the thermal control system. The thermal control system may also include an optimizer, which invokes multiple applications of the regression model. Given a forecast temperature outside the building, the optimizer predicts an optimal set of time-varying target temperatures for all the thermostats in the thermal control system. Running the HVAC system with the optimal set of time-varying target temperatures should have a reduced or a minimized cost, or a reduced or minimized total energy usage. The optimizer works by running the regression model repeatedly, while adjusting the time-varying target temperature for each thermostat between runs of the model. |
| US09519870B2 |
Weighting dictionary entities for language understanding models
A dictionary used by a spoken language understanding (SLU) system is improved by providing weightings for entities in the dictionary that represent the likelihood each entity belongs to an entity class represented by the dictionary. A classifier model may be trained using a seed list containing sample entities that belong in the entity class and a background entity list containing samples that do not belong in the entity class. Clicked URLs from search logs, search result URLs, and attributes from an entity graph may be used as features of the sample entities to train the classifier model. The classifier model may be used to weight entities from a candidate dictionary. The entity weightings are used to generate an improved dictionary for use in the SLU system. |
| US09519865B2 |
Apparatus and methods of analysis of pipe and annulus in a wellbore
Various embodiments include apparatus and methods to provide pipe analysis, annulus analysis, or one or more combinations of pipe analysis and annulus analysis with respect to one or more pipes in a wellbore. The analysis can include application of clustering and classification methods with respect to the status and the environment of the one or more pipes in the wellbore. In various embodiments, the clustering and classification can be used in characterizing borehole annular material including cement bond quality evaluation. Additional apparatus, systems, and methods are disclosed. |
| US09519863B2 |
Method and apparatus for a predictive tracking device
A predictive tracking method and apparatus utilizing objective and subjective data in order to predict user states is provided herein. For example, some such embodiments may allow a user to track their mood or health symptoms in relation to retrieved data regarding their environmental in order to reveal patterns that can help forecast and proactively manage mood or health symptoms. |
| US09519862B2 |
Domains for knowledge-based data quality solution
The subject disclosure relates to a knowledge-driven data quality solution that is based on a rich knowledge base. The data quality solution can provide continuous improvement and can be based on continuous (or on-going) knowledge acquisition. The data quality solution can be built once and can be reused for multiple data quality improvements, which can be for the same data or for similar data. The disclosed aspects are easy to use and focus on productivity and user experience. Further, the disclosed aspects are open and extendible and can be applied to cloud-based reference data (e.g., a third party data source) and/or user generated knowledge. According to some aspects, the disclosed aspects can be integrated with data integration services. |
| US09519860B2 |
Programmable device, hierarchical parallel machines, and methods for providing state information
Programmable devices, hierarchical parallel machines and methods for providing state information are described. In one such programmable device, programmable elements are provided. The programmable elements are configured to implement one or more finite state machines. The programmable elements are configured to receive an N-digit input and provide a M-digit output as a function of the N-digit input. The M-digit output includes state information from less than all of the programmable elements. Other programmable devices, hierarchical parallel machines and methods are also disclosed. |
| US09519859B2 |
Deep structured semantic model produced using click-through data
A deep structured semantic module (DSSM) is described herein which uses a model that is discriminatively trained based on click-through data, e.g., such that a conditional likelihood of clicked documents, given respective queries, is maximized, and a condition likelihood of non-clicked documents, given the queries, is reduced. In operation, after training is complete, the DSSM maps an input item into an output item expressed in a semantic space, using the trained model. To facilitate training and runtime operation, a dimensionality-reduction module (DRM) can reduce the dimensionality of the input item that is fed to the DSSM. A search engine may use the above-summarized functionality to convert a query and a plurality of documents into the common semantic space, and then determine the similarity between the query and documents in the semantic space. The search engine may then rank the documents based, at least in part, on the similarity measures. |
| US09519857B2 |
Apparatus and method for sensing characterizing features of a deformable structure
An apparatus includes a deformable structure in which a neural network comprising a plurality of deformation sensors, e.g. nanowire sensors, and distributed in-situ processing circuits. The circuits generate a signal characterizing features of the local deformation of the structure and/or a command signal corresponding to the detected deformation. The structure may be a wearable sleeve that conforms to deformations of a user's skin, part of an electronic device, such as a touch sensitive screen, or an object in itself. The apparatus can provide a user interface, wherein a command corresponding to a current shape of the structure is generated and acted upon by a integrated or remote device, or a device for monitoring a user's position or movement e.g. for replication by a robotic device. The apparatus may have machine learning capability to improve the matching of commands with determined shapes of the deformable structure. |
| US09519856B2 |
Encoding information in multiple patterned layers
An article of manufacture includes a substrate, a first patterned layer deposited on the substrate in a first region, and a second patterned layer deposited on the substrate in a second region. The first patterned layer encodes first information in first symbols that are detectable by an optical sensor. The second patterned layer encodes second information in second symbols that are detectable by a non-optical sensor. The second information is distinct from the first information and the second region at least partially overlaps the first region. |
| US09519854B2 |
RFID tag, RFID system, and package including RFID tag
An RFID tag is attached to a metal member including a slit, the RFID tag including conductive members attached to a surface of the metal member at corresponding sides of the slit in a width direction of the slit through an isolator; and an IC chip that receives power through the conductive members. When a frequency of radio waves is f, the power induced between the sides the slit is Wa, voltage induced between the sides of the slit is V, an area of each of the conductive members is S, thickness of the isolator is d, a dielectric constant of the isolator is ∈r, a dielectric constant of vacuum is ∈0, and a minimum value of the power required for the IC chip to operate is Wmin, an inequality Wmin≦Wa−4πf·S·∈0·∈r·V2/d is satisfied. |
| US09519851B2 |
Transaction card
The present invention relates to a process for producing an opaque, transparent or translucent transaction card having multiple features, such as a holographic foil, integrated circuit chip, silver magnetic stripe with text on the magnetic stripe, opacity gradient, an invisible optically recognizable compound, a translucent signature field such that the signature on back of the card is visible from the front of the card and an active thru date on the front of the card. The invisible optically recognizable compound is preferably an infrared ink comprising an infrared phthalocyanine dye, an infrared phosphor, and a quantum dot energy transfer compound. The infrared ink can be detected by a sensor found in an ATM or card assembly line. |
| US09519843B2 |
Object recognition device
A learning unit generates a function table indicating the relationship between the class number and position information of an object and the probability of appearance of the object for each small area image pattern of a code book, calculates a sharing matrix indicating the commonality of a feature amount between the classes, makes a tree diagram in which the classes with a similar feature amount are clustered, and calculates the weight of each node in the tree diagram for each small area image pattern. The recognition processing unit compares image data captured by a camera with the code book, selects the closest small area image pattern, extracts the class related to the node with the smallest weight among the nodes with a weight equal to or greater than a threshold value, and votes the position information of the small area image pattern for the class, thereby recognizing the object. |
| US09519842B2 |
Apparatus and method for managing an object extracted from image data
An apparatus includes a first management unit configured to classify and manage feature information of a plurality of objects extracted from image data in units of similar feature information, a second management unit configured to classify and manage the plurality of objects extracted from the image data object by object, an association unit configured to associate classifications of the objects by the second management unit with classifications of the feature information by the first management unit, and an input unit configured to input a correction instruction about the classifications of the objects by the second management unit, wherein the association unit is configured to, if the correction instruction is input, update an association between the classifications of the objects and the classifications of the feature information and the second management unit is configured to correct and manage the classifications of the objects based on updating of the association. |
| US09519834B2 |
Night parking detection
The present invention discloses a night parking-monitoring device. It monitors the state change of a parking space at night by tracking at least a light of a vehicle. |
| US09519831B2 |
Method and apparatus for detecting generalized passerby by utilizing features of a wheel and upper body
A method for detecting a generalized passerby includes: acquiring an input image; determining whether a preset common feature of a wheel exists in the input image; selecting an image window at left side or right side or upper side of a center of a region where the preset common feature of the wheel is located in a case that the preset common feature of the wheel exists in the input image; inputting the selected image window into a preset upper-body classifier; detecting whether an upper body of a passerby exists in the selected image window and outputting a first detection result. |
| US09519830B2 |
Ophthalmologic image processing method and storage medium storing program for executing the method
An ophthalmic image processing method includes: acquiring information about characteristics of an examinee's eye including corneal information about the corneal anterior surface shape of the examinee's eye, and refractivity information about refraction of the examinees eye as a whole; generating a simulation image of a target image formed at fundus of the examinee's eye using the refractivity information; and simultaneously displaying an eyeball model image showing an eyeball structure, the simulation image, and a corneal information image associated with the cornea on the eyeball model image and corresponding to the corneal information. |
| US09519825B2 |
Determining access permission
An access permission level for a first individual may be calculated by utilizing repositories of social network databases. The facial image of a first individual may be captured and compared with a repository of pre-categorized individuals. In response to the facial image of the first individual being absent from the repository of pre-categorized individuals, the repositories of social network databases may be crawled to collect facial images of non-categorized individuals. The first facial image may be compared with the facial images of non-categorized individuals, and a second individual may be identified. In response to identifying, categorization data associated with the second individual may be collected. Utilizing the categorization data, the second individual may be sorted into one of a plurality of categories. Based upon an image match score and the category which the second individual is sorted into, an access permission level may be determined and provided to a user. |
| US09519823B2 |
Biomarker method
In a technique for quantifying the spatial distribution of cells or sub-cellular structures, image data representing a spatial map of biomarkers is processed to obtain a set of coordinates. Each of the coordinates in the set denotes the location of a cell or sub-cellular structure represented by a biomarker or combination of biomarkers. The set of coordinates is processed into a two-dimensional symmetric (2N−1)×(2N−1) or 2N×2N matrix. The resulting matrix may be used for various purposes, such as assigning subjects clinical characteristics, and/or forming and/or testing scientific hypotheses for interventions, for example. Also described herein is an apparatus for performing the described technique. |
| US09519822B2 |
Determination method, determination device, determination system, and computer program
A determination method for determining reliability of a selective binding amount of a substance to be examined obtained as detection intensity of a label when a labeled substance to be examined binds to a selective binding substance fixed as a spot on a carrier includes: determining a position of the spot in image data obtained by imaging the detection intensity in the carrier and extracting a pixel group corresponding to the spot; calculating a ratio or a difference between a median value of the detection intensity of the pixel group extracted at the determining and a median value of the detection intensity of the pixel group excluding a certain top proportion of and/or a certain bottom proportion of pixels; and determining quality of the reliability based on the ratio or the difference calculated at the calculating and a certain reference value. |
| US09519821B2 |
Methods and systems for capturing biometric data
A method of capturing biometric data is provided that includes activating a security application in a device. The security application is activated by an operator of the device and is configured to cause the device to display an outline image. Moreover, the method includes displaying the outline image in a stationary position on a display of the device, positioning desired biometric data proximate the device such that the desired biometric data appears as a biometric image on the device display, and monitoring the outline and biometric images shown on the device display. Furthermore, the method includes positioning the device and the desired biometric data to better align the outline and biometric images when the outline and biometric images do not align and capturing the desired biometric data from an individual after approximately aligning the outline image with the biometric image. |
| US09519819B2 |
Method and electronic device for noise mitigation
The present invention generally relates to a method for removing disturbances in an image captured by a fingerprint sensor, and specifically to reduction of noise in an acquired fingerprint image by incorporating the sensing principle into the applied method for noise reduction, wherein the noise reduced image is used for determining a representation of a fingerprint pattern. Advantages with the invention include enhanced determination of fingerprint patterns from fingerprint images captured using a fingerprint sensor. The invention also relates to a corresponding electronic device and to a computer program product. |
| US09519817B1 |
Method for digitizing barcode image by using dynamic threshold
After capturing a barcode image, generate at least one sample line accordingly, acquire sample data of the at least one sample line, generate a first and a second reference lines, generate an upper bound and a lower bound according to the first and the second reference lines, generate a first curve by interpolating all sample points, generate a plurality of effective sample shapes of the first curve according to the upper bound and the lower bound, identify an internal point of each effective sample shape, generate a second curve by interpolating all internal points, and digitize the barcode image to binary data by comparing sample data with the second curve. |
| US09519815B2 |
Optical indicia reading terminal with color image sensor
An optical indicia reading terminal can comprise a microprocessor, a memory, and an image sensor integrated circuit for decoding decodable indicia. The image sensor integrated circuit can be configured to output a plurality of digital signals, each digital signal being representative of light incident on at least one pixel of the two-dimensional image sensor. The optical indicia reading terminal can be configured to selectively acquire a plurality of luminance signals from the plurality of digital signals. Whether the output image data from the sensor is digitally stored as YUV data or YCBCR data, the terminal parses out the luminance signal, Y, in the data matrix to store a monochrome image for decoding. The optical indicia reading terminal can be configured to process the frame of image data for decoding decodable indicia. |
| US09519814B2 |
Portable data terminal
A portable data terminal that includes a housing and an environmentally responsive device for collecting data about the environment surrounding the housing. The portable data terminal also includes an encoded information reader unit with one or more data collection hardware devices, which can capture data encoded in decodable indicia, e.g., bar codes. In one embodiment, the portable data terminal is configured to operate in a mode that processes the decodable indicia, and the environmental data so as to correlate the information decoded in the decodable indicia with the environmental data. |
| US09519813B2 |
Proper installation determination based on RFID
A radio frequency identification (RFID) transceiver may be associated with an identification proximity to identify an RFID tag associated with a component. A control may determine proper inflation of component based on the RFID tag being identified. |
| US09519811B1 |
System and method for reading RFID tags across a portal
Method and system for reading radio frequency identification (RFID) tags in a portal system comprises performing a first detection and a second detection of the RFID tags in a portal zone. The method further involves performing a first and second sampling of the RFID tags in the portal zone. Thereafter, based on the first detection, second detection, first sampling and second sampling, an occurrence is determined of at least one of the RFID tags transitioning between a first physical space on one side of the portal system and a second physical space on an opposing side of the portal system. |
| US09519804B2 |
Domain-specific hardwired symbolic machine that validates and maps a symbol
A domain-specific hardwired symbolic machine is disclosed that processes information via the flexible formation and hardwired mapping of symbols from one or more domains onto other such domains, computing and communicating with improved security because it has no CPU, no Random Access Memory (RAM), no instruction registers, no Instruction Set Architecture (ISA), no operating system (OS) and no applications programming. The machine may learn, e.g. from its users, via hardwired analysis of domain faults with associated recovery. The machine may modify itself according to interaction with its authorized authenticated users with self-modification via learning within application-specific, user-specific constraints hardwired into the original machine, eliminating configuration management and computer programming. |
| US09519800B2 |
Device and method for online storage, transmission device and method, and receiving device and method
A device and a method for online storage, device and method for searching for similar content, a device and a method of transmission and a device and a method. Encrypted data is saved at a provider of online services. With the encrypted data, encrypted hashing data is saved with a public key and the content to save is encrypted with the encrypted hash. This advantageously enables data duplication at the online service provider to be prevented while preserving the private life of the users of the service. In order to search for content similar to reference multimedia data, fingerprints are also saved at the service provider. In order to limit the number of false positives returned, the fingerprint can further contain a search fingerprint, an encrypted selection fingerprint. |
| US09519797B2 |
Secure database searching
Methods and systems for securely storing data in a database are described herein. According to an aspect, a technique may include receiving data to be stored, dividing the data into a plurality of elements, encrypting each element of the plurality of elements with an encryption function, combining the encrypted elements to form a data attribute, and storing the data attribute in the database. According to another aspect, a technique for searching a database having encrypted data attributes may include receiving a search term, encrypting the search term with an encryption function, and searching a database for records having data attributes matching the encrypted search term. |
| US09519790B2 |
Evaluating customer security preferences
Methods and systems for evaluating customer security preferences are presented. In some embodiments, a computer system may receive, from a security dashboard computing platform, a request for a security score associated with a customer. In response to receiving the request for the security score associated with the customer, the computer system may request, from a customer portal computing platform, one or more security preferences associated with the customer. Subsequently, the computer system may receive, from the customer portal computing platform, the one or more security preferences associated with the customer. The computer system then may determine, based on at least one security score definition file and based on the one or more security preferences associated with the customer, a security score for the customer. Thereafter, the computer system may provide, to the security dashboard computing platform, the determined security score for the customer. |
| US09519788B2 |
Identifying security vulnerabilities related to inter-process communications
Identifying security vulnerabilities related to inter-process communications by identifying within the instructions of a computer software application an object creation location configured to create an inter-process communications object, identifying within the instructions of the computer software application a location of an inter-process communications method, determining whether a path exists for an inter-process communications object created at the object creation location to propagate to the inter-process communications method, classifying with a classification selected from a plurality of predefined classifications, any of the inter-process communications object, the object creation location, and the location of the inter-process communications method, and reporting as a security vulnerability the classified inter-process communications object, object creation location, or location of the inter-process communications method if the path exists and if the classification is predefined to indicate that reporting is warranted. |
| US09519785B2 |
Basic input/output system (BIOS) security display
Methods and systems for generating and using a BIOS security display include determining whether a change in a BIOS user setting is associated with security of an information handling system. When the BIOS user setting is associated with security, a security level for the BIOS may be calculated based on weighted security values for BIOS user settings. Security levels for boot phases may also be individually calculated. The security levels may be displayed in the BIOS to the user when the BIOS user setting is changed. |
| US09519782B2 |
Detecting malicious network content
Systems and methods for detecting malicious content on portable data storage devices or remote network servers are provided. In an exemplary embodiment, a system comprises a quarantine module configured to detect one or more portable data storage devices upon insertion of the devices into a security appliance, wherein the security appliance is configured to receive the portable data storage devices, a controller configured to receive from the security appliance, via a communication network, data associated with the portable data storage devices, an analysis module configured to analyze the data to determine whether the data includes malware, and a security module to selectively identify, based on the determination, the one or more portable data storage devices storing the malware. |
| US09519779B2 |
Methods and apparatus for control and detection of malicious content using a sandbox environment
A non-transitory processor-readable medium storing code representing instructions to cause a processor to perform a process includes code to cause the processor to receive a set of indications of allowed behavior associated with an application. The processor is also caused to initiate an instance of the application within a sandbox environment. The processor is further caused to receive, from a monitor module associated with the sandbox environment, a set of indications of actual behavior of the instance of the application in response to initiating the instance of the application within the sandbox environment. The processor is also caused to send an indication associated with an anomalous behavior if at least one indication from the set of indications of actual behavior does not correspond to an indication from the set of indications of allowed behavior. |
| US09519777B2 |
Techniques for controlling authentication
Techniques for controlling authentication are provided. An enterprise injects a control and/or audit manager into the enterprise environment to control and in some instances audit third-party authentication services. A user attempts to access a resource that uses a third-party authentication service. The attempt is intercepted and third-party authentication handled by the manager. After authentication, a session between the user and the resource is established during which auditing services may be enacted. The user authenticates to the enterprise environment and the manager provides authentication for the user to the resource via the third-party authentication service. |
| US09519776B2 |
Computer security system and method
The present invention is a computer security system and method in which the various algorithms not only do not search for or detect the presence of a steganographic or other hidden image in a data file or across data files, but also includes at least one or more combined approaches for altering and neutralizing any hidden messages without significantly detracting from the underlying integrity of the data file or files thus treated. |
| US09519774B2 |
Systems and methods for SQL query constraint solving
The present invention relates to systems and methods for analyzing SQL queries for constraint violations, which may indicate injection attacks. The systems and methods tokenize a SQL query to generate a token stream. Next, lexical nodes are generated by iterating over the token stream. Then, a parse tree can be constructed by iterating over the lexical nodes. The parse tree may be compared to a SQL schema and access configuration for a database in order to analyze the SQL query for constraint violations, including determining the number of queries in the parse tree, identifying invalid fields and table access, identifying invalid field type comparisons and pattern matches, and identifying early statement termination. |
| US09519771B2 |
Embedded authentication systems in an electronic device
This invention is directed to an electronic device with an embedded authentication system for restricting access to device resources. The authentication system may include one or more sensors operative to detect biometric information of a user. The sensors may be positioned in the device such that the sensors may detect appropriate biometric information as the user operates the device, without requiring the user to perform a step for providing the biometric information (e.g., embedding a fingerprint sensor in an input mechanism instead of providing a fingerprint sensor in a separate part of the device housing). In some embodiments, the authentication system may be operative to detect a visual or temporal pattern of inputs to authenticate a user. In response to authenticating, a user may access restricted files, applications (e.g., applications purchased by the user), or settings (e.g., application settings such as contacts or saved game profile). |
| US09519769B2 |
System and method for disabling secure access to an electronic device using detection of a predetermined device orientation
A system and method for providing secure authorization to an electronic device by combining two or more security features of authentication processed at substantially the same time where at least one of the factors is a “tolerant” factor. By combining two factors such as facial recognition and a screen gesture, these can be analyzed at substantially the same time except when a device is oriented in a predetermined position or a unique or individualized motion is detected. |
| US09519764B2 |
Method and system for abstracted and randomized one-time use passwords for transactional authentication
A security system and method for authenticating a user's access to a target system is disclosed. The security system receives an authentication request from the user and generates a security matrix which comprises a mapping between each symbol within a symbol set and a code value randomly selected from a distinct code set. The number of elements in the symbol set and in the code set are selected to provide a predetermined level of security against capture of a user-defined keyword by an unauthorized observer. The security system sends the security matrix to the user and awaits a one-time code in response. The user forms the one-time code based on the user keyword and the security matrix. The security system validates the one-time code against the security matrix and the keyword to determine an authentication result, permitting or denying the user access to the target system. |
| US09519763B1 |
Optical cognition and visual authentication and authorization for mobile devices
A system and method is provided for visual authentication and authorization of a user for mobile devices, the system having: a login display on a mobile selection device displaying a visual pattern, a data collection engine whereby selection features are obtained from a plurality of user selection events to the mobile selection device with reference to the visual pattern, the selection attributes comprise measured selection attributes and derived selection attributes calculated from the measured selection attributes; an authentication engine whereby the selection attributes are compared to projected user selection attributes derived from user selection attribute values obtained during prior successful logins. |
| US09519761B2 |
Systems and methods for authentication using low quality and high quality authentication information
Systems, methods, and devices for authenticating a user are provided. A device includes one or more processors configured to determine if a requested service requires high quality authentication, generate a request for high quality authentication if the requested service requires high quality authentication, and generate a request for low quality authentication if the requested service requires low quality authentication. The device also include a network interface component coupled to a network, the network interface component configured to: receive the request for the service requiring authentication, and a memory, the memory storing high quality authentication information and low quality authentication information for authenticating the user. |
| US09519760B2 |
Barter for rights
Selling intangible property rights may include receiving content from a seller and determining one or more potential purchasers for the content's intangible property rights. The potential purchasers may be determined according to the subject of the content, the audience for the content, and the intangible property rights being sold. An offer to sell the intangible property rights may then be transmitted to one or more potential purchasers, along with a portion of the content. Upon receiving the one or more purchaser's acceptance of the offer, a complete copy of the content may be transmitted to the purchaser. |
| US09519756B2 |
Managing policy and permissions profiles
Systems, methods, and computer-readable storage media are provided for managing policy and permissions profiles. Individuals or organizations are permitted to author profiles utilizing a profile template and publish such authored profiles for access and adoption by others. Users are able to import desired profiles and subsequently have those imported profiles applied each time he or she accesses an application or service to which the profile pertains. User interfaces from which users may view profiles associated with them, make alterations to settings of profiles associated with them, and/or select from a plurality of profiles for a particular application or service are also provided. Still further, recommendations may be provided to users for policy and permissions profiles based upon, for instance, crowd-sourcing, profiles adopted by social network connections of a user or other users that are “like” a user, prior profile selections made by the user, and/or prior user behavior. |
| US09519754B2 |
Apparatuses and methods for parallel analytics
Methods, apparatus, and software packages for data processing are disclosed. In some embodiments, the method may include receiving a dataset. In some embodiments, the method may include determining a control number of a processing system. In some embodiments, the control number may include a number of evaluation units within the processing system. The method may include processing the dataset using a plurality of evaluation units. In some embodiments, processing the dataset may include allocating a free evaluation unit to form a busy evaluation unit. Processing the dataset may also include creating a data subdivision for the busy evaluation unit, the data subdivision including a part of the dataset. Processing the dataset may also include evaluating the data subdivision. Processing the dataset may also include releasing the busy evaluation unit. The allocating, creating, evaluating, and releasing may performed concurrently by the plurality of evaluation units. |
| US09519750B2 |
Athletic performance monitoring systems and methods in a team sports environment
Systems, apparatuses, and methods for determining when an athlete is in possession of a ball by analyzing image data are provided. A camera is worn by an athlete and is turned on when the athlete is in proximity of a ball. The camera is used to generate an image of a ball. The size of the ball is determined and compared to a threshold. The athlete is considered to be in possession of the ball when the size of the image exceeds the threshold. |
| US09519749B2 |
Surgical guide and method
A method for preparing a surgical guide for positioning of a dental implementation. The method includes positioning a positioning device relative to a model jawbone, translating the positioning device in a BL direction, adjusting a BL angle of the positioning device about a BL pivot axis corresponding to a desired position of a top of the dental implementation, and fixing the BL position, BL angle, and z-height of the positioning device. A mounting assembly mounts to the positioning device and includes a removable rotation block with a guide hole. The mounting assembly is movable in the MD direction while the BL position is fixed. A template fixes the mounting assembly for transferring the positioning information to a patient's mouth. Various aspects of the design process can be performed on a computer. The guide and a method of using the guide to perform an implant procedure are also disclosed. |
| US09519745B2 |
Method and apparatus for assisted metal routing
A method and apparatus for an assisted metal routing is disclosed. Embodiments may include: determining an initial block mask having a first inner vertex for forming a metal routing layer of an integrated circuit (IC); adding an assistant metal portion within the metal routing layer; and determining a modified block mask based on the assistant metal portion for forming the metal routing layer. |
| US09519741B2 |
Method of characterizing and modeling leakage statistics and threshold voltage
An approach includes deriving an uplift factor as a function of a width of the device for each leakage current component based on an amount of uncorrelated random variations in the leakage current component for one specific width and using the uplift factor as a multiplier for the leakage current component. The approach includes using the uplift factor for sub-threshold drain current as a multiplier of the sub-threshold drain current so that a lowering of nominal threshold voltage of the device occurs in a single simulation run. The approach further includes deriving a threshold voltage mismatch expression related to an amount of an uncorrelated random variation in sub-threshold drain current which is not directly inversely proportional to a square root of the width. The uplift factors and the threshold voltage mismatch expression within a model are used to predict statistical characteristics of the leakage current. |
| US09519740B2 |
Determining optimal gate sizes by using a numerical solver
Systems and techniques are described for optimizing a circuit design by using a numerical solver. The gates sizes are optimized by modeling a set of gate optimization problems and solving the set of gate optimization problems by using a numerical solver. Modeling each gate optimization problem can include selecting a portion of the circuit design that includes a driver gate that drives one or more inputs of each gate in a set of gates, and modeling a gate optimization problem for the portion of the circuit design based on circuit information for the portion of the circuit design. A differentiable objective function for delay can be created using numerical models for the delays in the circuit. In some embodiments, gradients of the differentiable objective function can be computed to enable the use of a conjugate-gradient-based numerical solver. |
| US09519736B2 |
Data generation device for vision sensor and detection simulation system
A data generation device and a detection simulation system, capable of executing offline simulation using a vision sensor, without calibration for associating the vision sensor with the robot. The device has: a placing part which places three-dimensional models of a robot, a vision sensor and an object in a virtual space; a robot placement position designating part and a vision sensor placement position designating part which designate placement positions of the robot and the vision sensor in the virtual space, respectively, based on a reference coordinate system defined in the virtual space; a placement position storing part which stores the placement positions; a positional relationship calculating part which calculates a positional relationship between a robot coordinate system and a sensor coordinate system; and a positional relationship storing part which stores the positional relationship as data used in a detection process of the vision sensor. |
| US09519735B2 |
Method of failure analysis
In some methods, a number of input data sets is provided for an integrated circuit (IC) model. A number of scores for the number of input data sets, respectively, are then determined based on probabilities of the respective input data sets resulting in a failure condition, which exists when the IC model fails to meet a predetermined yield criteria. A simulation order for the number of input data sets is then assigned according to the determined number of scores. |
| US09519732B1 |
Methods, systems, and articles of manufacture for implementing pattern-based design enabled manufacturing of electronic circuit designs
Some embodiments correlate various manufacturing or design information or data with patterns used to represent electronic designs and provide pertinent pattern-based information to metrology, fabrication, or testing tools to enhance their performances of their intended functions. Some embodiments further utilize cross-design or cross-process analytics to perform various pattern-based analyses on electronic designs. Some embodiments perform squish analysis with a squish pattern library on an electronic design to represent the electronic design with squish patterns by performing pattern matching, pattern decomposition, and pattern classification process. |
| US09519728B2 |
Apparatus and methods for monitoring and optimizing delivery of content in a network
Methods and apparatus for delivering content to a user so as to optimize and enhance the “experience” of the content. In one embodiment, an optimization and monitoring entity (OME) is used which determines, evaluates, and provides notification and/or recommendation of alternative content delivery platforms which are available to a user. The OME receives requests for content forwarded from a content server containing information identifying requesting devices and/or subscriber accounts. The OME examines the capabilities of the registered devices, and identifies/recommends alternative devices based on e.g., video/audio quality, picture size, bandwidth availability, and/or any other additional capabilities of the client devices. A notification is then sent to the client devices indicating which of the user's devices may receive the content alternatively, or in addition to, the requesting device. The notifications may be interactive, allowing the user to select one or more of the devices for delivery. |
| US09519721B1 |
Suppressing duplicate listings on multiple search engine web sites from a single source system given that a publisher selects a different listing as a synchronized listing
A source system receives initial identification data of a listing related to an entity. The source system searches a provider system for one or more listings having identification data matching the initial identification data. The source system receives, from the provider system, a plurality of potential matching listings having identification data matching the initial identification data, wherein each listing of the plurality of potential matching listings has a corresponding confidence score assigned by the source system, and wherein each listing of the plurality of potential matching listings has a corresponding provider-supplied external identifier assigned by the provider system. The source system designates a representative listing of the entity located on a provider system from among the plurality of potential matching listings, the representative listing having the highest confidence score assigned by the source system. The source system transmits, to the provider system, a request to synchronize the representative listing having the highest confidence score assigned by the source system as the representative listing of the entity on the provider system, the request comprising a first provider-supplied external identifier. The source system receives, from the provider system, an indication that a second listing of the plurality of potential matching listings has been selected by the provider system as the representative listing of the entity on the provider system, the response comprising a second provider-supplied external identifier. The source system re-designates the second listing as the representative listing of the entity on the provider system and designating the remaining one or more remaining listing of the plurality of potential matching listings as one or more duplicate listings on the provider system. The source system transmits, to the provider system, a request to suppress the remaining one or more listings as one or more duplicate listings, the request to suppress the remaining one or more listings comprising one or more third provider-supplied external identifiers, the one or more third provider-supplied external identifiers indicating the remaining one or more listings to suppress. |
| US09519716B2 |
System and method for conducting a profile based search
The present invention provides a method and system for conducting a profile based search. The method and system includes receiving a search request including one or more search terms from a user, parsing the search request into categorical verticals, determining search refinement data relative to the categorical verticals, the search refinement data including at least one of: profile information, environmental data relative to the search request and historical behavior data relating to the search request or the user and accessing a database of aggregated search data based on the search refinement data. The method and system includes using the aggregated search data, determining a most relevant search query and a most relevant user profile, refining the search request based on the most relevant search query and most relevant user profile and generating an output display of a search result set based on the refined search request. |
| US09519711B2 |
Integrating and managing social networking information in an on-demand database system
Some embodiments comprise integrating information from a social network into a multi-tenant database system. A plurality of information from the social network is retrieved, using a processor and a network interface of a server computer in the multi-tenant database system, wherein the plurality of information is associated with a message transmitted using the social network. Metadata related to the transmitted message is generated, using the processor. A conversation object is generated, using the processor, based on the plurality of information associated with the transmitted message and the metadata related to the transmitted message. The conversation object is then stored in an entity in the multi-tenant database system, using the processor of the server computer. |
| US09519709B2 |
Determination of an ordered set of separate videos
A method comprising determining an ordered set of separate videos that comprises a first video and a second video, identifying a first video segment comprised by the first video, determining an ordered set representation that indicates the ordered set of separate videos, the ordered set representation comprising a first representative image that represents the first video and a second representative image that represents the second video, causing display of the ordered set representation, receiving information indicative a scrub input, causing movement between the ordered set representation and an index point based on the scrub input, determining that the index point is aligned with the first representative image determining a rendering position based the first representative image, identifying a frame of the first video segment, and causing display of a frame image in a video rendering region is disclosed. |
| US09519708B2 |
Multiple concurrent audio modes
Embodiments described herein include devices and processes for concurrently processing different audio streams with different hardware-based audio processing modes. A computing device for such embodiments may have multiple hardware audio signal processing modes capable of parallel execution. An operating system or audio stack thereof may manage audio paths or streams for audio sources producing respective types of audio signals. Which of the audio paths or streams will be connected with which of the hardware audio signal processing modes may be determined according to the types of the audio signals. A first hardware audio signal processing mode may be processing a first type of audio signal of a first audio path or stream while concurrently a second hardware audio signal processing mode processes a second type of audio signal of a second audio path or stream. |
| US09519704B2 |
Real time single-sweep detection of key words and content analysis
A system and method are provided for real-time analysis of text. During a single sweep through the text, a detection tree is used to identify a sequence of characters in the text from a large dictionary of keywords. When a keyword is detected a rule tally database is updated. An intermediate score may be available during the sweep and a final score of the text may be available substantially immediately upon finishing the single sweep. A second text may be analyzed immediately using the same score buffer and rule tally database without updating the rule tally database. |
| US09519703B2 |
Refining search results for a compound search query
A method for refining search results. The method includes receiving a search query and in response to determining the search query is a compound search query, the method includes parsing the compound search query into at least two sub-queries. The method includes performing a search for each of the sub-queries and receiving a set of results from each search. The method then includes receiving a selection of a received result from one of the results sets and performing a second search using the selected received result and a sub-query not associated with the selected received result. |
| US09519702B2 |
System and method for mining category aspect information
Systems and methods for providing category aspect information by mining historical data is provided. A table comprising joined data is accessed. The table includes historical data that comprises user behavior data based on actions performed with past queries by users listing data that includes aspect data for each listing and a determined category for each listing. Demand scores based on the joined data are determined. The determined demand scores are used to determine at least one relevant aspect name for a category. A message is transmitted for display on a device of the user that indicates the at least one most relevant aspect name for the category and suggests the user provide an aspect value that corresponds to the at least one most relevant aspect name to be included in a new listing. |
| US09519699B1 |
Consistency of query results in a distributed system
A user of a tag manager utilizes a tag manager to request creation of one or more zonal metadata tags. When the metadata tags are created, the tag manager updates a tag manager database to include information concerning the created metadata tags. Subsequently, the tag manager attempts to update a changes table within a discovery service database to include this information, the changes table usable by a discovery service to support regional and global tag queries. If the update of the changes table is initially unsuccessful, the tag manager may utilize a replicator to synchronize the tag manager database and the changes table when the discovery service database is once again available. |
| US09519696B1 |
Data transformation policies
Data transformation policies specify conditions based at least in part on request features. When a request is received, features of the received request are used to determine any data transformation policies applicable to the request. When a data transformation policy applies to the request, a corresponding data transformation is applied to data responsive to the request. A response to the request comprising transformed data is provided. |
| US09519694B2 |
Device for presenting recipe and method for presenting recipe
A recipe presentation device includes: a recipe storage unit storing recipes each including preparation elements of ingredients, intermediate ingredients, and a dish to be served; a receiving unit which receives a dish specified by a user; a search unit which searches the recipe storage unit for a first recipe which is a recipe for the dish; a similarity calculation unit which calculates similarities between the individual recipes for the dishes stored in the recipe storage unit and the first recipe; a selection unit which selects, according to the similarities, a second recipe which is a recipe similar to the first recipe among the recipes for the dishes; and a presentation unit which presents a dish corresponding to the selected second recipe. |
| US09519692B2 |
Visualizing related events within a timeline
A timeline visualization system displays one or more groups of related events over a specified period of time within a timeline, where each group of related events is represented within the timeline as an event group. When a user interacts with the timeline, the event group expands and displays all the related events within the event group in a layer on top of the timeline. When a user interacts with the timeline a second time, the event group collapses, and the timeline (including the one or more event groups), is once again displayed. |
| US09519688B2 |
Collection and storage of a personalized, searchable, unstructured corpora
An approach is provided for utilizing unstructured corpora in a Question and Answer (QA) system. A question is received at the QA system. A private corpora is generated with the private corpora being associated with the user. The private corpora is generated from private data stores associated with the user as well as private data stores associated with other users. Access to the other user's private data sources is provided to the user by the other users. The system retrieves data responsive to the question from the private corpora. The responsive data is ranked based on its relevance to the question. Likely answers are identified based on the ranked responsive data and the likely answers are provided back to the user. |
| US09519686B2 |
Confidence ranking of answers based on temporal semantics
A mechanism is provided, in a data processing system comprising a processor and a memory configured to implement a question and answer system (QA), for providing confidence rankings based on temporal semantics. Responsive to receiving an input question, a set of candidate answers is identified from a knowledge domain based on a correlation between an identified one or more predicates and an identified one or more arguments to the knowledge domain. A confidence score is associated with each of the candidate answers and each confidence score associated with each candidate answer is refined based on a set of temporal characteristics identified in the input question. A set of temporally refined candidate answers is then provided to the user. |
| US09519685B1 |
Tag selection, clustering, and recommendation for content hosting services
Content object tags at a content hosting service are used to classify stored content objects. Tags and clusters of tags (groups of one or more associated tags) can be recommended to a user of the content hosting service based on a user context, such as the browsing, viewing, uploading, or searching of content objects. Tags are scored based on content objects tagged with the tags in a targeted subset of content objects and a baseline subset of content objects, and based on the relevance of the content objects tagged with the tags. These tag scores can be weighted, and one or more tags can be selected for recommendation based on the weighted tag scores. Tag clusters can be selected for recommendation using a cluster hierarchy and determining whether a targeted subset of tags occur within a maximum number of tag clusters at a particular hierarchy level. |
| US09519683B1 |
Inferring social affinity based on interactions with search results
Techniques for inferring social affinity may include the following operations: obtaining information derived from online activity of a first party, where the online activity includes searches initiated by the first party, and where the information specifies interaction of the first party with content accessed through the online activity; determining, based on the information, that an amount of the interaction of the first party with the content exceeds a threshold; following the determining, identifying a second party who provided the content; adjusting, in a social graph for the first party, an affinity of the second party to the first party based on the amount of the interaction with the content; and using the affinity to promote search results output to the first party that contain content that is provided by the second party. |
| US09519681B2 |
Enhanced knowledge repository
Embodiments of the present invention relate to knowledge representation systems which include a knowledge base in which knowledge is represented in a structured, machine-readable format that encodes meaning. |
| US09519680B2 |
Methods for query processing of topological relationships among complex spatial objects
An optimized method of processing queries requesting a description of a spatial relationship between a test geometry and a query geometry, such as points, lines, polygons, and collections thereof, is disclosed. A first part of the method finds a first spatial relationship between a minimum bounding rectangle (MBR) of the test geometry and an In-Memory R-tree (IMR-tree) built to describe the query geometry. If the first relationship does not specify the requested description, then a second part of the method uses the IMR-tree of the query geometry to find a second spatial relationship between the test geometry itself and the query geometry. Optimizations are applied to the first part and to the second part. Optimizations in the second part depend on the test geometry. |
| US09519678B2 |
Managing item queries
A network-based service may be provided for facilitating queries for a number of items, such as travel services. A user may submit a query including criteria for determining one or more relevant items. Based on the submitted query, the network-based service may present the user with information regarding the actions of other similar users of the network-based service, such as searches performed by the other users. Based on this information, the user may elect to supplement the current query to conform to the actions for other users. In some embodiments, actions by other users may be based at least in part on a category of the querying user. By presenting actions of similar users, a current user may be enabled to select the most relevant query terms for identifying a desired item. |
| US09519672B2 |
User activity tracking system and device
In an embodiment, a computing device determines sensor signals detected by one or more sensors of the computing device. The sensor signals indicate motion of the computing device. The computing device selects one of a plurality of activity categories that corresponds to a portion of the sensor signals, each of the activity categories including one or more activity types. The activity types in each activity category are characterized by a common motion corresponding to the portion of the sensor signals. One of the activity types in the selected activity category is determined by analyzing the sensor signals with respect to each of the activity types in the selected activity category, and calculating a probability of each of the activity types. The determined activity type is displayed on the computing device. |
| US09519671B1 |
Folding pair of adjacent indices based on optimum quantity of induces for parallel processing
A method comprising receiving data, where the data includes one or more elements, the data is associated with a first set of indices, and the first set of indices references the one or more elements. The method may further include folding a plurality of indices into a single index, where the single index references the one or more elements of the received data that were referenced by the plurality of indices, the folding generates a second set of indices, and the folding is performed when concurrent process threads are not generated based on the first set of indices. The method may further include determining whether concurrent process threads should be generated based on the second set of indices and generating the concurrent process threads for the second set of indices when the determining determines that the concurrent process threads should be generated based on the second set of indices. |
| US09519670B2 |
Method and apparatus for road risk indices generation
A system includes a processor configured to gather historical risk-affecting data with respect to a current road. The processor is also configured to gather current risk-affecting data with respect to the current road. Further, the processor is configured to generate a baseline risk index for the road based on the historical data. The processor is additionally configured to modify the baseline risk index based on the current data and provide a risk index value for the current road based on the modified baseline risk index |
| US09519668B2 |
Lock-free creation of hash tables in parallel
A hash table is created in parallel without requiring a lock or random accesses to memory. The hash table of a database system is logically partitioned and a separate thread is assigned to each partition of the hash table. As many separate threads as can fit their corresponding hash table partitions into the processor's cache are executed in parallel with other threads without a lock. Execution of a number of separate threads includes: scanning an input data table for a thread's partition and applying a hash function to each key, inserting data of keys that hash to the thread's partition into the thread's partition, and ignoring keys that do not hash to the thread's partition. |
| US09519666B2 |
Snapshots and thin-provisioning in distributed storage over shared storage devices
A method for data storage includes, in a system that includes one or more storage controllers, one or more servers and one or more storage devices, defining one or more data structures that represent thinly-provisioned user volumes used by the servers in storing data on the storage devices. One or more of the data structures are shared among the storage controllers and the servers. One or more of the user volumes are accessed by the servers, using the shared data structures and without executing code on the storage controllers. |
| US09519664B1 |
Index structure navigation using page versions for read-only nodes
Read-only nodes of a distributed database system may implement index structure navigation using page versions. A read request may be received at a read only node of a distributed database for select data. Data pages linked together to form an index structure for data stored for the distributed database may be navigated according to versions maintained for the data pages in order to identify one or more locations to access for the select data. One or more prior versions of data pages may be selected as part navigating the index structure according to a consistent view of the distributed database associated with the read request. Change notifications may also be received at the read-only node modifying the data pages of the index structure. The index structure modifications may be applied without blocking the index structure navigation for servicing the read request. |
| US09519659B2 |
Media content enrichment using an adapted object detector
Disclosed herein are a system, method and architecture for media content enrichment. A visual object detector is trained using a training data set and an existing visual object detector. The newly-adapted visual object detector may be used to detect a visual object belonging to a class of visual object. The existing object detector that is used to train the adapted object detector detects a class of visual objects different from the visual object class detected by the adapted object detector. A media content item depicting a visual object detected using the adapted object detector may be associated with metadata, tag or other information about the detected visual object to enrich the media content item. |
| US09519654B2 |
Method, device, processing center and system for desktop synchronization
The present invention provides a method, device, processing center and system for desktop synchronization and relates to the technical field of network. The method comprises the steps of: obtaining desktop data from a processing center; determining whether an application program corresponding to the desktop data has been installed; associating the desktop data with the corresponding application program if it is determined that the corresponding application program has been installed. The present invention resolves the problem that the present cloud storage scheme could only simply store and synchronize files or folders, and achieves the effects that the desktop can be synchronized across each platforms, and the files in the desktop data can be used, edited and modified after the synchronization across platforms, by associating the locally application program with the desktop data while synchronizing the desktop data. |
| US09519649B2 |
Free space management in a database
A row is inserted in a database table on a page having a first space reserved for inserting rows of the database table. A second space is reserved for adding data to the inserted row, wherein reserving the second space includes reserving the second space on the page responsive to inserting the row. |
| US09519647B2 |
Data expiry in a non-volatile device
Apparatuses, systems, and methods for data expiry include examining metadata associated with data in a non-volatile recording medium. Apparatuses, systems, and methods include expiring data from a non-volatile recording medium in response to metadata indicating that an expiration period for the data has been satisfied. |
| US09519642B2 |
System, method and computer program product for multilingual content management
A system includes a processor and a non-transitory computer readable medium storing instructions translatable by the processor. The instructions when translated by the processor cause the system to determine an exemplar reference which identifies a managed object stored in a repository residing in an enterprise computing environment. The system can determine a translation group utilizing the exemplar reference. The managed object may represent a content item. The translation group may include the content item and the content item may be multilingual enabled. The system can determine an effective locale for a request for content received from a client device communicatively connected to a web server in the enterprise computing environment, determine a language that is appropriate for the effective locale, and respond to the request for content with the content item or a translation of the content item that is in the language appropriate for the effective locale. |
| US09519640B2 |
Intelligent translations in personal see through display
A see-through, near-eye, mixed reality display apparatus for providing translations of real world data for a user. A wearer's location and orientation with the apparatus is determined and input data for translation is selected using sensors of the apparatus. Input data can be audio or visual in nature, and selected by reference to the gaze of a wearer. The input data is translated for the user relative to user profile information bearing on accuracy of a translation and determining from the input data whether a linguistic translation, knowledge addition translation or context translation is useful. |
| US09519639B2 |
Community translation of user-generated content
Translations for items of user-generated content are received from one or more users associated with a social networking system and/or one or more machine-generated translations. Each translation may translate a content item from a source or original language to a target language. Votes regarding the suitability of the translations are received from one or more users. In one aspect, the option to provide translations and/or vote on translations is provided to those users that are determined to be competent in the source language of the item of user-generated content. Determination of whether a user is competent in the source language can be based on the user profile of the user, the user-generated content of the user, the language competencies of the user's connections, and/or other social signals. |
| US09519636B2 |
Deduction of analytic context based on text and semantic layer
A system includes reception of text, extraction of a plurality of linguistic entities and associated linguistic entity categories based on the text; determination of one or more semantic objects of a semantic layer based on the linguistic entity categories, and generation of a query of the semantic layer based on the plurality of linguistic entities, the associated linguistic entity categories, and the one or more semantic objects. The extraction of the plurality of linguistic entities may include identification of the plurality of linguistic entities from a plurality of semantic object-independent linguistic entity categories and a plurality of semantic object-dependent linguistic entity categories, the plurality of semantic object-dependent linguistic entity categories may be associated with the semantic layer, each of the plurality of semantic object-dependent linguistic entity categories may be associated with a respective semantic object of the semantic layer and each entity of each semantic object-dependent linguistic entity category may be associated with a value of its respective semantic object. |
| US09519629B1 |
Style consolidation and optimization with strong ownership
Techniques are described for optimizing and consolidating style files for formatted pages of data such as web pages. Styles may be consolidated through the identification of common rules shared by multiple styles, and the common rules may be incorporated into a common style that has the style mappings and/or namespace of the source styles. Consolidation may enable minimal style information to be sent in response to a page request, the style information corresponding to a requesting browser type and/or version. Embodiments may also provide for global constants in style rules, with global constant resolution performed dynamically at runtime. Embodiments may also support file splitting for optimal browser performance, with the style file splitting performed dynamically at runtime. |
| US09519628B2 |
Method for generating simple object access protocol messages and process engine
A method for generating a Simple Object Access Protocol (SOAP) message in XML during execution of a process in a SOA-based process engine apparatus and a corresponding process engine apparatus. The method includes: generating and storing an XML character string containing a fixed SOAP message skeleton; generating and storing an XML character string containing an instance-constant variable; generating an XML character string containing a dynamic variable; and concatenating the XML character string containing the fixed SOAP message skeleton and the XML character string containing the instance-constant variable as previously stored and the XML character string containing the dynamic variable by a character string concatenating operation to generate a SOAP message. A process engine apparatus including a message analyzer unit, a message pre-composer unit, a character string depository, and a message composer unit is also provided. |
| US09519627B2 |
Grammar generation for XML schema definitions
A method of normalizing an extensible markup language schema definition (XSD) schema type may be used in encoding and/or decoding an extensible markup language (XML) document. The method may include receiving an XSD schema type including a state. The method may also include analyzing the state for a conflict. The conflict may include an event resulting from a local production and one or more events resulting from a foreign production. When the conflict is detected, the method may include ignoring the one or more events resulting from the foreign production and generating a modified grammar for the state including the event resulting from the local production. |
| US09519626B2 |
Hyperlink destination visibility
Various embodiments utilize page scripting and parsing to identify the target destination of a hyperlink and provide a visual indication of the destination to the user without causing redirection to the target destination. In some embodiments, hyperlink color, highlighting, or icons are used to indicate the destination. Particular colors and/or icons selected to indicate the destination can, in some embodiments, be selected based on the domain hosting the target destination. In at least some embodiments, the destination of a link is determined by the page script run by a web browser on a user's device, while in other embodiments, information is transmitted to a web request handler on the server hosting the web site to determine the destination. |
| US09519607B2 |
Methods and systems for virtualization of storage services in an integrated chassis
In accordance with embodiments of the present disclosure, a system may include a chassis, one or more chassis management controllers housed in the chassis, and a switch management controller. The chassis may be configured to receive a plurality of modular information handling systems. The one or more chassis management controllers may be configured to receive a storage management command, encapsulate the storage management command in a first datagram, and communicate the first datagram to a switch management controller housed in the chassis. The switch management controller may be configured to extract the storage management command from the first datagram, identify a storage controller associated with the storage management command, and communicate an input/output control request to the storage controller based on the storage management command. |
| US09519606B2 |
Network switch
A network switch, based on the PCI Express protocol, is disclosed. The switch is in communication with a processor, local memory and includes a plurality of non-transparent bridges and, optionally transparent bridges, leading to PCI Express endpoints. By configuring the non-transparent bridges appropriately, the network switch can facilitate simultaneous communication between any two sets of servers without needing to store any data in the local memory or FIFO resources of the switch. For example, the network switch may configure the non-transparent bridges so as to have access to the physical memory of every server attached to it. It can then move data from the memory of any server to the memory of any other server. |
| US09519601B2 |
Data storage system and management method thereof
Data storage system and management method thereof are provided. The method, adopted by a data storage device coupled to a host device via a bus, includes: determining the data storage device requires to use a first temporary memory of the host device to access data in a second temporary memory of the data storage device; based on the determination, issuing a Device Bus Master (DBM) request message via the bus to the host to request for a right to control data transfer on the bus; in response to the DBM request message, detecting the bus to determine whether to receive a first DBM acknowledgement message from the host device; and if the first DBM acknowledgement message is received, then accessing the first temporary memory of the host device. |
| US09519596B2 |
Resource access control in a system-on-chip
A method for controlling access of a processor to a resource, wherein the processor has an instruction set including a virtualization extension, may include executing a resource access instruction by the processor using the virtualization extension, whereby the resource access instruction conveys a virtual address (VA) and a virtual machine identifier. The method may also include translating the virtual address to a physical address based on the virtual machine identifier, and looking-up an access control rule table using the physical address as a search key. Each entry of the rule table includes a virtual machine identifier. The method further includes controlling access to the resource based on the output of the rule table and a match between the virtual machine identifier returned by the table and the virtual machine identifier conveyed in the resource access instruction. |
| US09519594B2 |
Apparatus, system, and method for solid-state storage as cache for high-capacity, non-volatile storage
An apparatus, system, and method are disclosed for solid-state storage as cache for high-capacity, non-volatile storage. The apparatus, system, and method are provided with a plurality of modules including a cache front-end module and a cache back-end module. The cache front-end module manages data transfers associated with a storage request. The data transfers between a requesting device and solid-state storage function as cache for one or more HCNV storage devices, and the data transfers may include one or more of data, metadata, and metadata indexes. The solid-state storage may include an array of non-volatile, solid-state data storage elements. The cache back-end module manages data transfers between the solid-state storage and the one or more HCNV storage devices. |
| US09519593B2 |
Method for increasing cache size
A method for increasing storage space in a system containing a block data storage device, a memory, and a processor is provided. Generally, the processor is configured by the memory to tag metadata of a data block of the block storage device indicating the block as free, used, or semifree. The free tag indicates the data block is available to the system for storing data when needed, the used tag indicates the data block contains application data, and the semifree tag indicates the data block contains cache data and is available to the system for storing application data type if no blocks marked with the free tag are available to the system. |
| US09519587B2 |
Pre-reading file containers storing unread file segments and segments that do not belong to the file
A file reading method, storage device, and reading system, relating to the field of file reading. The method includes receiving, by a storage device, a first read request sent by a client, where to-be-read data requested by the first read request is a part of the file; reading, from a cache, data that is of the to-be-read data and located in the cache, and reading, from a first storage medium, data that is of the to-be-read data and not located in the cache; and pre-reading, from the first storage medium, data in at least one of the containers, and storing the pre-read data into the cache, where the pre-read container includes at least one unread file segment of the file. |
| US09519586B2 |
Methods and apparatus to reduce cache pollution caused by data prefetching
Efficient techniques are described for reducing cache pollution by use of a prefetch logic that recognizes exits from software loops or function returns to cancel any pending prefetch request operations. The prefetch logic includes a loop data address monitor to determine a data access stride based on repeated execution of a memory access instruction in a program loop. Data prefetch logic then speculatively issues prefetch requests according to the data access stride. A stop prefetch circuit is used to cancel pending prefetch requests in response to an identified loop exit. The prefetch logic may also recognize a return from a called function and cancel any pending prefetch request operations associated with the called function. When prefetch requests are canceled, demand requests, such as based on load instructions, are not canceled. This approach to reduce cache pollution uses program flow information to throttle data cache prefetching. |
| US09519584B2 |
System and method for updating data in a cache
In one embodiment, a computing system includes a cache having one or more memories and a cache manager. The cache manager is able to receive a request to write data to a first portion of the cache, write the data to the first portion of the cache, update a first map corresponding to the first portion of the cache, receive a request to read data from the first portion of the cache, read from a storage communicatively linked to the computing system data according to the first map, and update a second map corresponding to the first portion of the cache. The cache manager may also be able to write data to the storage according to the first map. |
| US09519582B2 |
Sense operation flags in a memory device
Memory devices, methods for programming sense flags, methods for sensing flags, and memory systems are disclosed. In one such memory device, the odd bit lines of a flag memory cell array are connected with a short circuit to a dynamic data cache. The even bit lines of the flag memory cell array are disconnected from the dynamic data cache. When an even page of a main memory cell array is read, the odd flag memory cells, comprising flag data, are read at the same time so that it can be determined whether the odd page of the main memory cell array has been programmed. If the flag data indicates that the odd page has not been programmed, threshold voltage windows can be adjusted to determine the states of the sensed even memory cell page. |
| US09519581B2 |
Storage integration for host-based write-back caching
Techniques for enabling integration between a storage system and a host system that performs write-back caching are provided. In one embodiment, the host system can transmit to the storage system a command indicating that the host system intends to cache, in a write-back cache, writes directed to a range of logical block addresses (LBAs). The host system can further receive from the storage system a response indicating whether the command is accepted or rejected. If the command is accepted, the host system can initiate the caching of writes in the write-back cache. |
| US09519580B2 |
Load balancing logical units in an active/passive storage system
An approach is provided in which a storage system includes a first storage controller, a second storage controller, and multiple logical units. The storage system determines that a controller traffic load ratio between the first storage controller and the second storage controller has reached a threshold. In turn, the storage system selects one of the logical units and changes a preferred controller ownership of the selected logical unit from the first storage controller to the second storage controller to balance the controller traffic load ratio. |
| US09519577B2 |
Method and system for migrating data between flash memory devices
The embodiments described herein include systems, methods and/or devices that may enhance the endurance of a storage system including a storage medium. The method includes: dividing a plurality of flash memory devices into logical chunks each logical chunk including one or more flash memory blocks; and detecting a trigger condition with respect to a respective flash memory device of the plurality of flash memory devices. In response to detecting the trigger condition, the method includes: selecting one of the logical chunks of the respective flash memory device for migration in accordance with predefined selection criteria; and storing a replicated logical chunk, comprising a copy of the selected logical chunk, at a second flash memory device. The method includes: remapping an address of the selected logical chunk to a physical location of the replicated logical chunk; and decreasing a number of logical chunks associated with the respective flash memory device. |
| US09519575B2 |
Conditional iteration for a non-volatile device
Apparatuses, systems, methods, and computer program products are disclosed for conditional iteration. A method includes receiving a request comprising a condition. A method includes checking an address mapping structure for entries satisfying a condition for a request. A method includes providing a result for a request based on one or more entries satisfying a condition for a request. |
| US09519568B2 |
System and method for debugging an executing general-purpose computing on graphics processing units (GPGPU) application
A system and method for debugging an executing program. The method includes executing a general-purpose computing on graphics processing units (GPGPU) program. The GPGPU program comprises a first portion operable to execute on a central processing unit (CPU) and a second portion operable to execute on a graphics processing unit (GPU). The method further includes attaching a debugging program to the first portion of the GPGPU program and modifying the first portion of the GPGPU program. The attaching of the debugging program to the first portion of the GPGPU program pauses execution of the first portion of the GPGPU program. The method further includes resuming execution of the first portion of the GPGPU program and accessing a first state information corresponding to the first portion of the GPGPU program. Execution of the first portion of the GPGPU program may then be paused. The first state information may then be used to access a second state information corresponding to the second portion of the GPGPU program. |
| US09519562B2 |
Process demand prediction for distributed power and resource management
Methods and systems for allocating resources in a virtual desktop resource environment are provided. A method includes making a prediction on the future demand for processes running on a distributed environment with several hosts. The prediction is based on the process demand history and includes the removal of historic process demand glitches. Further, the prediction is used to perform a cost and benefit analysis for moving a candidate process from one host to another, and the candidate process is moved to a different host when the cost and benefit analysis recommends such move. In another embodiment, the predictions on future process demand are used for distributed power management by putting hosts in stand-by mode when the overall demand decreases or by adding hosts to the distributed environment when the load increases. |
| US09519552B2 |
Image forming apparatus which executes rebuild processes
An image forming apparatus comprises a first and a second HDDs (Hard Disk Drives), a RAID (Redundant Arrays of Inexpensive Disks) controller to execute rebuilding processes in which data stored in the first HDD is copied to the second HDD restored, and a CPU (Central Processing Unit). When there arises the necessity for accessing from the CPU to at least of the first and the second HDDs, and the priority of data which is the object for access by the CPU is higher than the priority of data which is being processed under the rebuilding processes, the image forming apparatus stops the rebuilding processes. The image forming apparatus restarts the rebuilding processes, when the access from the CPU is finished. |
| US09519547B2 |
Systems and methods for supporting transactional message handling
In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses including, for supporting transactional message handling in an on-demand service environment including, for example: enqueuing a message specifying a transaction to be processed via a host organization; inserting a row into a database of the host organization associating the message with a status of pending, wherein the row is autocommitted to the database upon insertion; updating the status for the row to ready if a commit operation for the transaction is initiated; requesting a lock on the row; and performing final processing for the transaction based on the status for the message and based further on whether the lock is obtained for the row. Final processing may include, for example, a transaction roll back, a transaction commit, a transaction requeue, a termination of transaction processing, or an orphaned transaction clean up. |
| US09519544B2 |
Memory module and operation method thereof
A memory module includes an emergency power supply block, a volatile memory, a nonvolatile memory, and a control block configured to control data of the volatile memory to be backed up in the nonvolatile memory, by using a power supplied from the emergency power supply block, upon a power failure, and control the data of the volatile memory to be recovered, by using data backed up in the nonvolatile memory, upon a power recovery, wherein the control block controls the data of the volatile memory not to be backed up while controlling the data of the volatile memory to be recovered, even upon the power failure. |
| US09519538B2 |
Error recovery following speculative execution with an instruction processing pipeline
An instruction processing pipeline having error detection and error recovery circuitry associated with one or more of the pipeline stages. If an error is detected within a signal value within that pipeline stage, then it can be repaired. Part of the error recovery may be to flush upstream program instructions from the instruction pipeline. When multi-threading, only those instructions from a thread including an instruction which has been lost as a consequence of the error recovery need be flushed from the instruction pipeline. The instruction pipeline may additionally/alternatively be provided with more than one main storage element associated with each signal value with these main storage elements used in an alternating fashion such that if a signal value has been erroneously captured and needs to be repaired, there is still available a main storage element to properly capture the signal value corresponding to the following program instruction. |
| US09519536B2 |
Electronic management system for technology support reporting
Systems and methods for generating a visual indicator based on receiving a report of a transaction processing error, the error comprising an informality in a software instruction code executed during a first attempt to process a transaction. The systems may be configured to determine a preconfigured time period for correcting the software instruction code causing the transaction processing error and compare it to the actual time it took to correct the software instruction code to determine whether the processing error was corrected within the preconfigured time period. The system and method may then generate and communicate a visual indicator based on determining whether the error was corrected within preconfigured time period. |
| US09519532B2 |
Handling system interrupts with long-running recovery actions
A method, processor, and computer system for handling interrupts within a hierarchical register structure. The method includes receiving at a root-level register an indication of an interrupt occurring at a lower level register in the register structure, using a system interrupt handler to invoke an error handler assigned to a set of registers of the structure that includes the lower level register, and using the invoked error handler to handle the interrupt and return to the system interrupt handler. |
| US09519529B2 |
Message communication of sensor and other data
A service may be provided that reads sensors, and that communicates information based on the sensor readings to applications. In one example, an operating system provides a sensor interface that allows programs that run on a machine to read the values of sensors (such as an accelerometer, light meter, etc.). A service may use the interface to read the value of sensors, and may receive subscriptions to sensor values from other programs. The service may then generate messages that contain the sensor value, and may provide these messages to programs that have subscribed to the messages. The messages may contain raw sensor data. Or, the messages may contain information that is derived from the sensor data and/or from other data. |
| US09519527B1 |
System and method for performing internal system interface-based communications in management controller
Certain aspects direct to systems and methods for performing internal system interface-based communications between Intelligent Platform Management Interface (IPMI) stack and management services in management controllers. The system includes a server management device, which has an IPMI stack and at least one management service module. The management service module, when executed, provides a corresponding management service. In operation, the server management device defines an internal system interface, and configures the internal system interface to establish an inter-process communication (IPC) channel between the IPMI stack and the management service using the internal system interface. Thus, an internal communication between the IPMI stack and the management service may be performed through the IPC channel. |
| US09519520B2 |
Federated, policy-driven service meshes for distributed software systems
Platforms, systems, software, and methods for deploying and maintaining distributed computing, networking and storage comprising a configuration of dedicated service meshes. The invention further comprising a module for dynamically managing physical nodes; a module for dynamically managing nodes on physical nodes; a module for dynamically managing services/workers on nodes; a module for governing communication within the system and with the system; a plurality of communication endpoints; a plurality of services, wherein each service is associated with one or more endpoints, wherein services communicate by message exchange via their endpoints; a module for grouping nodes into clusters; a module for grouping endpoints into meshes such that all member services of a mesh can be addressed as a whole or as pertinent subsets thereof; and a module for dynamically effecting topology changes. |
| US09519519B2 |
System and method for managing workload performance on billed computer systems
In a system and method for managing mainframe computer usage, preferred values for service class defined performance goals are determined to optimize workload performance in service classes across a logical partition. A method for managing mainframe computer system usage can include receiving a performance optimization goal for workload performance in a service class, the service class having a defined performance goal. Achievement of the performance optimization goal is assessed, and a preferred value for the defined performance goal is determined based on assessing achievement of the performance optimization goal. Workload criticality can be taken into account, and automatic changes to the performance goal authorized. |
| US09519516B2 |
Migration system, migration method and non-transitory computer-readable medium storing control program
The present invention addresses the problem of providing a migration system and a migration method by which a completion timing of a live migration of virtual machines can be adjusted. The migration system (1) comprises: a transfer means (61A) for transmitting memory data of the virtual machines from a transfer source physical host (31) to a transfer destination physical host (32) to synchronize data of the virtual machines on the physical host (31) and the virtual machines on the physical host (32); a determination means (51A) for determining, for each of the virtual machines, whether the data of the virtual machine (81A) on the transfer source physical host (31) is synchronized with the data of the virtual machine (81B); and a control means (10) for issuing an instruction of switching from the virtual machines on the physical host (31) to the virtual machines on the physical host (32), if the data of all the virtual machines is synchronized based on the determination result. The transfer means (61A) continues transmitting the memory data until the instruction of switching is issued. |
| US09519507B2 |
Executing an instruction of currently active thread before context switch upon receiving inactive context ID to be activated
Systems and methods for managing context switches among threads in a processing system. A processor may perform a context switch between threads using separate context registers. A context switch allows a processor to switch from processing a thread that is waiting for data to one that is ready for additional processing. The processor includes control registers with entries which may indicate that an associated context is waiting for data from an external source. |
| US09519506B2 |
Method and apparatus for enabling remote service task based access to functionality provided by one or more remote services
Methods, apparatuses, and computer program products are provided herein for enabling task based access to functionality provided by one or more remote services. One example method may include generating a task based query, the task based query suggestive of a task to be performed. A method may further include causing the task based query to be provided to a remote service discovery engine. A method may further include receiving an indication of a remote service of a plurality of remote services that is configured to perform the task from the remote service discovery engine, the indication comprising access instructions for querying the remote service. |
| US09519505B1 |
Enhanced configuration and property management system
Embodiments of the invention are directed to systems, methods and computer program products for creating and managing a virtual operating environment on a physical machine connected to a distributed network, the virtual operating environment is virtualized by the physical machine. The invention may categorize the virtual operating environment using a tiered data structure, where each tier of the tiered data structure defines an attribute for categorizing the virtual operating environment. The invention generates a graphical representation of the tiered data structure for display via a user computing device that enables a user to communicate requests for causing the virtual operating environment to perform a function and communicates commands to the physical machine based on receiving such requests. The invention may additionally update the graphical representation after the virtual operating environment has executed the function. |
| US09519504B2 |
Managing a server template
A non-transitory computer-readable storage medium may comprise instructions for managing a server template stored thereon. When executed by at least one processor, the instructions may be configured to cause at least one computing system to at least convert the server template to a corresponding virtual machine, manage the corresponding virtual machine, and convert the corresponding virtual machine back into a template format. |
| US09519503B2 |
Systems and methods for virtual machine attribution with fault resilient memory tag
Systems and methods for Virtual Machine (VM) attribution with hardware information. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a Central Processing Unit (CPU) and a memory coupled to the CPU, the memory having program instructions stored thereon that, upon execution by the CPU, cause the IHS to: provide a management console configured to manage a plurality of hypervisors, each hypervisor configured to be executed in a different one of a plurality of physical servers distinct from the IHS, each hypervisor further configured to create and run at least one Virtual Machine (VM); identify, via the management console, a hardware capability of a given one of the plurality of physical servers; and assign the VM, by the management console, to the given physical server in response to the identification of the hardware capability. |
| US09519498B2 |
Virtual machine assurances
Briefly, aspects of the subject matter described herein relate to virtual machines. In aspects, when a host is reset or powered on, a measured boot is performed. If the measured boot indicates that the host is in a state that satisfies a policy for gaining access to a cryptographic key, the cryptographic key may be obtained. The cryptographic key may be used, directly or indirectly, to decrypt data of a virtual storage device. This decrypted data may then be used to instantiate a virtual machine. |
| US09519496B2 |
Detecting and preventing virtual disk storage linkage faults
In an exemplary embodiment, a virtual disk file can be assigned an identifier and a virtual disk files that is dependent on the virtual disk file can include a copy of the identifier. In the instance that the virtual disk file is opened and data is modified that causes the contents of a virtual disk extent to change the identifier can be changed. If the virtual disk file and the dependent virtual disk file are used to instantiate a virtual disk the difference between identifiers can be detected, which is indicative of the fact that the virtual disk may be corrupted. Other techniques are described in the detailed description, claims, and figures that form a part of this document. |
| US09519494B2 |
Optimizing application resources
A method for optimizing application resources utilized for rendering graphical user interfaces (GUIs) of an application is described herein. The method comprises receiving a current GUI of the application, wherein the current GUI is a graphical interface view currently being displayed to a user on a display screen of a computing device. Further, it is ascertained whether the current GUI is present a current view sequence wherein the current view sequence comprises one or more GUIs previously viewed by the user. Further, the current view sequence, for the current GUI not being present in the current view sequence, is updated to include the current GUI. Further, at least one probable GUI is determined based on the updating. Further, application resources pertaining to the at least one probable GUI for instant rendering of the at least one probable GUI to the user are obtained. |
| US09519488B2 |
External intrinsic interface
An external intrinsic interface. A processor may include a core including a plurality of functional units, an intrinsic module located outside the core, and an interface module to perform relaying between the intrinsic module and a functional unit, among the plurality of functional units. |
| US09519486B1 |
Method of and device for processing data using a pipeline of processing blocks
A method of processing data in an integrated circuit is described. The method comprises establishing a pipeline of processing blocks, wherein each processing block has a different function; coupling a data packet having data and meta-data to an input of the pipeline of processing blocks; and processing the data of the data packet using predetermined processing blocks based upon the meta-data. A device for processing data in an integrated circuit is also described. |
| US09519485B2 |
Confidence threshold-based opposing branch path execution for branch prediction
Embodiments relate to confidence threshold-based opposing path execution for branch prediction. An aspect includes determining a branch prediction for a first branch instruction that is encountered during execution of a first thread, wherein the branch prediction indicates a primary path and an opposing path for the first branch instruction. Another aspect includes executing the primary path by the first thread. Another aspect includes determining a confidence of the branch prediction and comparing the confidence of the branch prediction to a confidence threshold. Yet another aspect includes, based on the confidence of the branch prediction being less than the confidence threshold, starting a second thread that executes the opposing path of the first branch instruction, wherein the second thread is executed in parallel with the first thread. |
| US09519483B2 |
Generating flags for shifting and rotation operations in a processor
A method and apparatus are described for generating flags in response to processing data during an execution pipeline cycle of a processor. The processor may include a multiplexer configured to generate valid bits for received data according to a designated data size, and a logic unit configured to control the generation of flags based on a shift or rotate operation command, the designated data size and information indicating how many bytes and bits to rotate or shift the data by. A carry flag may be used to extend the amount of bits supported by shift and rotate operations. A sign flag may be used to indicate whether a result is a positive or negative number. An overflow flag may be used to indicate that a data overflow exists, whereby there are not a sufficient number of bits to store the data. |
| US09519482B2 |
Efficient conditional instruction having companion load predicate bits instruction
A pipelined run-to-completion processor can decode three instructions in three consecutive clock cycles, and can also execute the instructions in three consecutive clock cycles. The first instruction causes the ALU to generate a value which is then loaded due to execution of the first instruction into a register of a register file. The second instruction accesses the register and loads the value into predicate bits in a register file read stage. The predicate bits are loaded in the very next clock cycle following the clock cycle in which the second instruction was decoded. The third instruction is a conditional instruction that uses the values of the predicate bits as a predicate code to determine a predicate function. If a predicate condition (as determined by the predicate function as applied to flags) is true then an instruction operation of the third instruction is carried out, otherwise it is not carried out. |
| US09519481B2 |
Branch synthetic generation across multiple microarchitecture generations
Branch sequences for branch prediction performance test are generated by performing the following steps: (i) generating a branch node graph, by a branch node graph generator machine logic set, based, at least in part, upon a set of branch traces of a workload or benchmark code; (ii) generating a first assembly pattern file, for use with a first instruction set architecture (ISA)/microarchitecture set, by an assembly pattern generator machine logic set, based, at least in part, upon the branch node graph so as to mimic the control-flow pattern of the workload or benchmark code; and (iii) running the assembly pattern file on the first ISA/microarchitecture set to obtain first execution results. |
| US09519478B2 |
Session management in a mixed mode environment
Systems and methods for managing multiple versions of applications executing on servers in a server pool are provided. A request to generate new session data for a transaction requested by a user is received by a first server executing a first version of an application. A determination is made that the first version of the application is unsuitable to process the request. An identity of a second server executing a second version of the application is requested by the first server in a server pool comprising one or more servers, and an appropriate second server is selected. The first server transmits a hypertext transfer protocol proxy request to the selected second server, which generates the new session data. |
| US09519473B2 |
Facilitating access to multiple instances of a legacy application task through summary representations
Methods, systems, and techniques for supporting access to multiple copies of a legacy task are provided. When there are multiple copies of a task present, then instead of showing the output from a single task, the task workspace area displays task representation pictograms that represent the state and inform the user regarding each particular instance of that legacy task running on the host. The user can use the interface to perform various operations, including to start a new copy of the task, to end a copy of the task, and to select one of the copies for viewing. Example embodiments provide a Role-Based Modernization System (“RBMS”), which uses these enhanced modernization techniques to provide role-based modernization of menu-based legacy applications. |
| US09519468B2 |
Modular co-versioning in a dynamically linked runtime environment
Modular co-versioning may involve the creation of multi-version libraries that may include multiple versions of a class. A multi-version library may include a base version and one or more other versions each of which may correspond to a particular, respective version of a software development kit, runtime environment or software platform, according to various embodiments. At runtime, a multi-version library may be searched in order to load a version of a class that corresponds to the version of the currently executing runtime environment. If the multi-version library does not include a version of the class corresponding to the currently executing version of the environment/platform, a version of the class corresponding to a previous version of the environment may be loaded if found in the multi-version library. Alternatively, if no other version of the class is found, a base version of the class may be loaded from the multi-version library. |
| US09519467B2 |
Efficient and consistent software transactional memory
A method and apparatus for efficient and consistent validation/conflict detection in a Software Transactional Memory (STM) system is herein described. A version check barrier is inserted after a load to compare versions of loaded values before and after the load. In addition, a global timestamp (GTS) is utilized to track a latest committed transaction. Each transaction is associated with a local timestamp (LTS) initialized to the GTS value at the start of a transaction. As a transaction commits it updates the GTS to a new value and sets versions of modified locations to the new value. Pending transactions compare versions determined in read barriers to their LTS. If the version is greater than their LTS indicating another transaction has committed after the pending transaction started and initialized the LTS, then the pending transaction validates its read set to maintain efficient and consistent transactional execution. |
| US09519466B2 |
Executable code for constrained computing environments
A system and method for facilitating adjusting computer code running in computing environments where writing of executable memory is restricted. An example method includes using a virtual machine to generate a first executable image from software code, and employing the first executable image to selectively modify the virtual machine and the first executable image, resulting in an updated virtual machine and a second executable image. The second executable image represents an updated version of the first executable image. To transform dynamic code, such as natively produced computer code, into one or more executable images for running on constrained devices, embodiments may leverage existing dynamic code generators (e.g., within Java HotSpot Performance Engine, also simply called HotSpot), selectively modifying them to generate different, i.e., updated code that is usable on subsequent runs of the associated software application, thereby effectively enabling modification of executable code used to run the software. |
| US09519465B2 |
Method and system for generating code
A computer implemented method and system to generate final code for execution in a runtime environment, the method including creation, via a compiler, of intermediate code from destination source code, wherein the destination source code has been compiled from original source code which includes at least one jump instruction, by omitting the at least one jump instruction, the destination source code existing in a destination programming language and the original source code in a source programming language, loading the intermediate code into an intermediate code manipulation unit, and creation, via the intermediate code manipulation unit, of the final code from the intermediate code, wherein the creation comprises an insertion of at least one jump statement into the final code, and wherein the inserted at least one jump statement is functionally equivalent to the at least one omitted jump instruction. |
| US09519463B1 |
Application for automatically generating graphical flowcharts based on configurable means
Flowchart generation method and tool is provided with an easy-to-use graphical user interface. The graphical user interface of the tool enables a user to select a programming language which the test program was written in, and a test station which the test program was developed for. Upon these selections, a parser will point to the configuration files appropriate for the selected language and test station. The configuration files contain rules and definitions of the chosen programming language and test station, so that the parsing of the test program language can begin. Utilizing the data created from the parsing process, the tool points to other configuration files, referred to as a flowcharting configuration file, that each contain information on how to present the parsed data in a flow chart. |
| US09519460B1 |
Universal single instruction multiple data multiplier and wide accumulator unit
A single-instruction multiple-data (SIMD) multiplier-accumulator apparatus and method. A multiplier block with two 16-bit by 32-bit multiplier circuits transform a selectable number of input multipliers and multiplicands into a selected number of products. Each multiplier circuit comprises an array of full adders that generates and sums partial products using carry-save addition. An accumulator block, with additional data width to help prevent overflow, adds the products to a selectable number of input addends and outputs a number of results. Embodiments perform one to four multiplications together, depending on the number of bits (eight, 16, 24, or 32) selected for the input operands. Embodiments output 20-bit, 40-bit, or 80-bit multiply-accumulate results at rates of at least 1.1 GHz. Embodiments support signed inputs, negated multiplication products, and Q-format data. A hybrid sign extension management approach improves performance for 80-bit outputs. |
| US09519454B2 |
Acoustic signatures
Embodiments described herein provide for acoustic signatures in a playback system. An example implementation involves receiving, from a microphone of the controller device, an audio signal played by a playback device, the audio signal indicating network information corresponding to the playback device. The example implementation further involves identifying the playback device based on the network information and responsively, modifying a user interface on the controller device based on the identification of the playback device. |
| US09519448B2 |
Printing system, printing apparatus, printing control apparatus, sheet management system, printing control apparatus control method, and related storage medium
A printing system includes a printing apparatus and a control apparatus. The printing apparatus obtains first attribute information about a sheet stored in a first sheet holding unit of the printing apparatus, and sends the information to the control apparatus. The control apparatus determines a combination of the first and second attribute information about the sheet and selects at least the first and a second sheet holding units. The control apparatus stores the combination in association with the selected first and second sheet holding units where a user instruction is accepted. The control apparatus obtains the second attribute information based on the received first attribute information, and sends the second attribute information to the printing apparatus. The printing apparatus sets the received second attribute information as attribute information about the sheet stored in the first sheet holding unit. |
| US09519443B2 |
Print data flattening processing of spot color components with any hidden spot color portion removed
A print data processing apparatus includes the following elements. A spot color memory stores a spot color element. A flattening section performs, when a new image element is input in accordance with a rendering order, flattening processing for separating the new image element into a basic color element having only a basic color component and a spot color element having only a spot color component, for updating a configuration of each spot color element stored in the spot color memory to a configuration from which a portion hidden by a configuration of a newly separated spot color element is removed, and for storing the new spot color element in the spot color memory. An output section outputs, when spot color elements obtained by separating all image elements included in each unit of output are stored in the spot color memory, the spot color elements stored in the spot color memory. |
| US09519431B1 |
Collaboration between discrete systems and a shared system to consolidate shared storage-related services
Collaboration between discrete systems and a shared system to consolidate shared storage-related services. In one example, shared, consolidated storage-related services and high-availability are provided by pairing each of a plurality of discrete block storage virtualization modules residing on each discrete computer system to a shared block storage virtualization module residing on a shared computer system, and maintaining logical volume coherency locally by each of the plurality of discrete block storage virtualization modules, and globally by the shared block storage virtualization module. Additionally, allocation of a set of block storage virtualization functions to be performed by at least one of the plurality of discrete block storage virtualization modules or the shared block storage virtualization module can be made according to the pairing. |