| Document | Document Title |
|---|---|
| US09413392B1 |
Post-decoding error check with diagnostics for product codes
In one embodiment, a system includes a controller and logic integrated with and/or executable by the controller. The logic is configured to perform iterative decoding on encoded data to obtain decoded data. At least three decoding operations are performed in the iterative decoding, with the decoding operations being selected from a group consisting of: C1 decoding and C2 decoding. The logic is also configured to perform post-decoding error diagnostics on a first portion of the decoded data in response to not obtaining a valid product codeword in the first portion after the iterative decoding of the encoded data. Other systems, methods, and computer program products for producing post-decoding error signatures are presented in accordance with more embodiments. |
| US09413390B1 |
High throughput low-density parity-check (LDPC) decoder via rescheduling
A LDPC decoder utilizes a new schedule that breaks a dependency between data of different layers of a parity check matrix, so that the forward scan in the next layer can begin to perform after a predetermined time has elapsed (i.e. a delay) since the backwards scan of the previous layer has begun, and before the backwards scan of the previous layer is completed. Accordingly, the computation at the next layer can begin as soon as possible. |
| US09413389B2 |
Automatic synchronization of a transmitter
An electronic device includes a transmission module communicatively coupled to a synchronizer. The transmission module is configured to transform received data for transmission, receive a first instruction from the synchronizer, based on the instruction adjust the phase of a clock signal used to time the transformation of the received data, and send the adjusted clock signal to the synchronizer. The synchronizer is configured to receive the adjusted clock signal, receive a data signal comprising a frequency and a phase of data to be transmitted, based on the adjusted clock signal and the data signal, determine a second instruction for the transmission module, and provide the second instruction to the transmission module. |
| US09413388B1 |
Modified huffman decoding
A plurality of bits is retrieved from a bitstream that comprises encoded media content. The plurality of bits may include at least a portion of a codeword. An integer value of the plurality of bits is used to determine an index into a first table. Based on the index, an extra bits field is retrieved from the first table. If the extra bits field includes a predetermined value, then a first plurality of values is retrieved from the first table. If the extra bits field does not include the predetermined value, then a second plurality of values is retrieved from a second table. |
| US09413387B2 |
Data compression using entropy encoding
Data values can be entropy encoded, as part of a data compression process, according to a predetermined variable-length entropy coding scheme (e.g. based on exponential Golomb coding) such that they have ≧1 prefix bits and ≧0 suffix bits. A corresponding entropy decoding process can be performed, whereby the prefix bits are analysed to determine bit-boundaries between the received entropy encoded data values. The suffix bits and the determined bit-boundaries are used to decode the entropy encoded data values. In this way, multiple bit-boundaries can be found during the same clock cycle, e.g. by analysing the prefix bits in parallel decode units, thereby allowing for multiple entropy encoded data values (encoded using a variable-length coding scheme) to be decoded in the same clock cycle. |
| US09413385B2 |
Efficient decoder for current-steering digital-to-analog converter
A decoder for a current-steering digital-to-analog converter (DAC) is described herein. In an embodiment, the decoder is a dynamic element matching (DEM) row/column decoder that randomizes pairs of row control signals and column control signals that are provided to a matrix of current cells. The randomization is performed in a manner that ensures that the pairs of row control signals are randomized as pairs. In another embodiment, the decoder is an N-dimensional decoder, where N is any integer greater than two. The N-dimensional decoder comprises an N number of decoders that are each configured to provide respective control signals that are provided to current source(s) in current cell(s) in a respective dimension of an N-dimensional matrix of current cells for enabling current source(s) included therein. Such decoders advantageously allow for a simpler, more efficient design compared to a non-segmented, unary DAC due to the smaller area and lower power consumed. |
| US09413384B1 |
Efficient processing and detection of balanced codes
Circuits that are matched to balanced codes may recover transmitted information in a noise resilient and power efficient manner. Circuit components for processing a balanced code may include one or more of: matched amplification of the signals representing the balanced code, matched equalization and/or filtering on the signals representing the balanced code, matched non-linear filtering on the signaling representing the balanced code to detect the presence of particular symbols and matched latching of the signals representing the balanced code. Such matched circuits and circuit components may be achieved at least in part by incorporating suitable common circuit nodes and/or a single energy source into circuit topologies. |
| US09413379B2 |
Successive approximation analog-to-digital converters and methods using shift voltage to support oversampling
An analog-to-digital converter includes a digital-to-analog converter comprising a capacitor divider network comprising a plurality of dividing capacitors and a dummy capacitor. The digital-to-analog converter is configured to selectively apply an input voltage and a reference voltage to the dividing capacitors and to selectively apply the input voltage and a shift voltage to the dummy capacitor. The analog-to-digital converter further includes a comparison circuit configured to compare an output of the capacitor divider network and a common mode voltage and a shift voltage generator circuit configured to generate the shift voltage. The shift voltage generator circuit may be configured to vary the shift voltage for different samples of the input voltage. For example, the shift voltage generator circuit may be configured to change the shift voltage for succeeding samples by an amount corresponding to 1/(2^M) times the reference voltage to support 2^M oversampling of the input voltage. |
| US09413377B1 |
Switched capacitor circuit and compensation method thereof, and analog to digital converter
A switched capacitor circuit with feedback compensation is provided. First terminals of a feedback capacitor and at least one capacitor are coupled to a first input terminal of a differential amplifier. Second terminals of the feedback capacitor and the capacitor are coupled to an input terminal during a first period. A feedback compensation circuit amplifies a first voltage on the first input terminal of the differential amplifier by a gain greater than one to generate a second voltage. The second terminal of the feedback capacitor is coupled to the output terminal of the differential amplifier, and the feedback compensation circuit applies the second voltage to the second terminal of the capacitor during a second period. |
| US09413374B2 |
Method and apparatus for calibrating comparator offset of successive-approximation-register analog-to-digital converter
A circuit and method compensates for comparator offset in a successive approximation register analog-to-digital converter. The circuit includes a multiplexed sampler to sample either a common mode voltage or an input signal. The sampled signal is added to a conversion voltage and an offset correction voltage and input to a comparator. The comparator determines a polarity of deviation of the sum of the sampled signal, conversion voltage and off-set correction voltage. Based on the polarity, the offset correction voltage and the conversion voltage are alternately subjected to a successive approximation process to compensate for the offset of the sum from the sampled input signal or sampled common voltage signal. |
| US09413373B1 |
Amplifier circuit and pipeline type analog-digital converter
According to one embodiment, an amplifier circuit includes a first converter generating a time signal by voltage-time converting an input signal; a second converter generating an output signal by time-voltage converting the time signal; and a correction circuit outputting a control signal by comparing the time signal and a reference signal. The first converter generates the time signal, based on the control signal. |
| US09413369B2 |
Digital phase-locked loop (DPLL), method of controlling DPLL, and ultra low power (ULP) transceiver using DPLL
A phase-locked loop (PLL) includes a counter configured to measure voltage-controlled oscillator (VCO) information of an oscillator during a mask time, and a frequency tuner configured to tune a frequency of the oscillator to a target frequency, based on a comparison result obtained by comparing the VCO information to target frequency information. |
| US09413368B2 |
Auto frequency control circuit and receiver
According to an embodiment, an auto frequency control circuit includes a peak time detector, a first time shifter a zero-crossing time detector, and a second time shifter. The peak time detector detects, from the digital signal, a first time at which the digital signal exhibits one of a maximal value and a minimal value. The first time shifter adds or subtracts a first natural number multiple of the predetermined period to or from the first time. The zero-crossing time detector detects, from the digital signal, a second time at which the digital signal exhibits one of a positive zero-crossing and a negative zero-crossing. The second time shifter adds or subtracts the first natural number multiple of the predetermined period to or from the second time. |
| US09413366B2 |
Apparatus and methods for phase-locked loops with temperature compensated calibration voltage
Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO and a calibration voltage generation circuit that can generate a calibration voltage for controlling a tuning voltage input of the VCO when the VCO is being coarsely tuned. Additionally, the calibration voltage generation circuit can sense a temperature of the PLL, and can control a voltage level of the calibration voltage to provide compensation based on the sensed temperature. The calibration voltage generation circuit can include a bandgap reference circuit configured to generate a zero-to-absolute-temperature (ZTAT) current and a proportional-to-absolute temperature (PTAT) current, and the calibration voltage can be generated based in part on a difference between the PTAT current and the ZTAT current. |
| US09413359B2 |
Method for clock calibration
A system may include a plurality of devices, wherein each device of the plurality of devices has a respective clock source. A first device of the plurality of devices may be configured to generate a first clock signal. A second device of the plurality of devices may be configured to generate a second clock signal, receive the first clock signal from the first device, and modify a first frequency of the first clock signal. The second device may be further configured to adjust a second frequency of the second clock signal dependent upon the modified first frequency of the first clock signal. |
| US09413358B2 |
Forward counter block
A forward counter block may include at least one of a plurality of local counter storage elements for counting events. The forward counter block may also include an update engine, the update engine configured to update an external memory by forwarding a value stored in any of said at lease one of a plurality of local counter storage elements and return a zero value to that local counter storage element, when the value stored in that local counter storage element reaches or surpasses a threshold value. |
| US09413351B2 |
Integrated circuit device and method of implementing power gating within an integrated circuit device
An integrated circuit device comprises at least one power gating arrangement, including at least one gated power domain, and at least one power gating component operably coupled between at least one node of the at least one gated power domain and at least a first power supply node. The at least one power gating component is arranged to selectively couple the at least one node of the at least one gated power domain to the at least first power supply node. |
| US09413350B1 |
Switching circuit for power consumption reduction
A switching circuit includes a first switch, a second switch, and a reservoir capacitor. The first switch includes a first gate, a first source, a first drain, and a first gate-to-source capacitor coupled between the first gate and the first source. The second switch includes a second gate, a second source, a second drain, and a second gate-to-source capacitor coupled between the second gate and the second source. The reservoir capacitor is coupled to both the first gate and the second gate. When the first switch is turned on, the first gate-to-source capacitor is charged by a power voltage source and accumulates charges. When the first switch is turned off, the reservoir capacitor is charged by the charges from the first gate-to-source capacitor. The charges stored in the reservoir can be used to charge the second gate-to-source capacitor. |
| US09413348B2 |
Electronic circuit including a switch having an associated breakdown voltage and a method of using the same
An electronic device can include a switch coupled to a switching node. In an embodiment, the switch has a breakdown voltage is less than 2.0 times the designed operating voltage. In another embodiment, the electronic device can further include another switch, wherein both switches are coupled to each other at a switching node. The switches can have different breakdown voltages. In a particular embodiment, either or both switches can include a field-effect transistor and a zener diode that are connected in parallel. The zener diode can be designed to breakdown at a relatively lower fraction of the designed operating voltage as compared to a conventional device. Embodiments can be used to reduce voltage overshoot and ringing at the switching node that may occur after changing the states of the first and second switches. Processes of forming the electronic device can be implemented without significant complexity. |
| US09413347B1 |
Duty cycle correction apparatus
An exemplary embodiment of the present disclosure illustrates a duty cycle correction apparatus for fast adjusting internal clocks to have specific duty cycles. Firstly, a reference clock is adjusted to have one specific duty cycle in response to analog feedback clocks. Then, by using a phase detector, phases of the reference clock and one internal clock are compared to generate a phase detection signal. Next, by using a digital-analog converter, complementary signals are generated according to a phase detection signal received by the counter, and the signals are used to adjust the duty cycles of the internal clocks. When the complementary signals make the duty cycle of the internal clock equals to the specific duty cycle, codes of the complementary signals are recorded. |
| US09413345B2 |
Method of controlling electronic device and electronic device
A control method and an electronic device are described. The method is applied in an electronic device which includes a first body, a second body and a rotary apparatus. On at least one body of the first body and the second body, there are provided M number of input apparatuses; the first body and the second body are rotatably connected together, where M is an integer greater than or equal to 1. The state-information of the first body and/or the second body is detected, to obtain a detection result; when the detection result indicates that the first body and/or the second body are/is in a motion state, a disable command is generated; the disable command is executed, so that N number of input apparatuses from the M number of input apparatuses are in a disabled state, where N is an integer less than or equal to M. |
| US09413344B2 |
Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systems
Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systems, are disclosed. The adaptive clock distribution system includes a tunable-length delay circuit to delay distribution of a clock signal provided to a clocked circuit, to prevent timing margin degradation of the clocked circuit after a voltage droop occurs in a power supply supplying power to the clocked circuit. The adaptive clock distribution system also includes a dynamic variation monitor to reduce frequency of the delayed clock signal provided to the clocked circuit in response to the voltage droop in the power supply, so that the clocked circuit is not clocked beyond its performance limits during a voltage droop. An automatic calibration circuit is provided in the adaptive clock distribution system to calibrate the dynamic variation monitor during operation based on operational conditions and environmental conditions of the clocked circuit. |
| US09413343B2 |
Method for reducing noise using layout scheme and comparing device
A comparing device includes a first stage comparator and a second stage comparator serially coupled to the first stage comparator, wherein output lines of the second stage comparator are disposed to be overlapped with respective input lines of the second stage comparator. |
| US09413340B1 |
DC-to-DC voltage converter using switching frequency detection
A DC-to-DC voltage converter using switching frequency detection is provided. The DC-to-DC voltage converter includes a voltage conversion block including a power switch configured to be turned on in response to a power driving signal and to provide an input supply voltage to be output as the converted output voltage when the power switch is turned on, wherein the converted output voltage has a level that varies depending on a duty cycle of the power driving signal, and a switching control block that receives the converted output voltage and a feedback signal to control the duty cycle of the power driving signal based on a frequency of a feedback signal, the feedback signal having the same period as the power driving signal. Accordingly, when the level of the input supply voltage is changed, the converted output voltage can be recovered to the target level while the switching frequency of the power driving signal is maintained at the same value as before the change of the level of the input supply voltage. Electronic devices adopting the DC-to-DC voltage converter can be strong against an electromagnetic interference phenomenon and have improved performance in a low frequency band. |
| US09413336B2 |
Multiband-support radio-frequency module
To provide a multiband-support radio-frequency module in which the occurrence of a harmonic signal in an amplifier circuit is suppressed and the output of a radio-frequency signal containing unwanted harmonic components is prevented. A first signal path SL1 and a second signal path SL2 are provided such that they intersect each other at least once in a multilayer substrate 2, as viewed from above. With this configuration, high-output radio-frequency signals output from a first amplifier circuit 31 and a second amplifier circuit 32 can be prevented from interfering with other elements disposed in the multilayer substrate 2. It is thus possible to provide a multiband-support radio-frequency module 1 exhibiting excellent RF characteristics by suppressing the occurrence of harmonic signals in each of the first and second amplifier circuits 31 and 32 and by preventing the output of radio-frequency signals containing unwanted harmonic components. |
| US09413333B2 |
Nanomechanical resonator array and production method thereof
In the present invention, a nanomechanical resonator array (1), which is suitable being used in an oscillator and production method of said nanomechanical resonator array are developed. Said resonator array (1) comprises at least two resonators (2), which are in the size of nanometers, which are vertically arrayed and which are preferably in the form of nano-wire or nano-tube; at least one coupling membrane (3), which mechanically couples said resonators (2) from their one ends, and at least one clamping element (4), which supports mechanical coupling by clamping said coupling membrane (3). Said resonator array (1) can be actuated and its displacements can be sensed. The present invention develops a predictive model of the frequency response of an oscillator comprising the said resonator array (1) for electrostatic actuation and capacitive readout. An oscillator comprised of multiple resonator arrays (1) with different frequency responses connected to a frequency manipulation circuitry can be used as well. For silicon-based systems, said production method comprises the steps of patterning two windows on device silicon layer exposing it to plasma etching using Bosch process; carrying out a further oxidation to form nanowires in an oxide envelop; depositing further sacrificial material. Actuation and readout electrode integration comprises steps of electrode material deposition; self-aligned mask material deposition, chemical mechanical polishing; electrode material etch; releasing nanowires by etching sacrificial material and oxide envelope. For non-silicon-based systems, said production method comprises the steps of structural and sacrificial material deposition; patterning and anisotropic etching of both materials; isotropic etching of sacrificial material. |
| US09413327B2 |
Apparatus and method for filtering a signal
A simplified filter structure, and method thereof, for filtering signals received on a network are provided. The present disclosure is directed to a simplified filter structure, arranged as a dual unbalanced cascade diplexer for a plurality of received signals, including satellite, terrestrial, and home networking signals, e.g., Multimedia Over Cable Alliance (MoCA) signals. The simplified filter structure is designed such that signals within a certain predetermined frequency range are passed, while the impedance is matched in the stopband frequency range both above and below the frequency range of the passed signals. |
| US09413325B2 |
Switchless multiband filter architecture
A cable modem is provided in a premises. The cable modem is operated in a first mode with a first upstream passband. At least one fusible link in the cable modem is caused to be blown, which in turn causes the cable modem to upgrade to a second mode with a second upstream passband, greater than the first upstream passband, without use of any switch. |
| US09413314B2 |
Corona ignition with self-tuning power amplifier
A power amplifier circuit that has an inductor and capacitor connected to one end of the output winding of an RF transformer. The other end of the output winding is connected to a current sensor that in turn is connected to ground. The transformer has two primary windings. Both primary windings have one end connected to a voltage supply. The other end of each primary winding is attached to a switch. All three windings are wound around a core. Current flowing from the DC voltage supply to the switches causes a magnetic flux in the core. A voltage is generated on the secondary winding current sensor by the current that flows through the igniter. This voltage is fed back to the switches, controlling on and off timing. Voltage is provided to the igniter or pulled from the igniter when the current traveling into or from the igniter is at zero. |
| US09413313B2 |
Multimode power amplifier bias circuit with selectable bandwidth
Multimode power amplifier bias circuit with selectable bandwidth. In some embodiments, a bias circuit for a power amplifier can include a first bipolar junction transistor (BJT) configured to pass a reference current. The first BJT can be coupled with a second BJT that performs at least some amplification for the power amplifier. The first and second BJTs can be configured as a current mirror. The bias circuit can further include a coupling circuit that couples the collector and the base of the first BJT. The coupling circuit can include a switchable element to allow the coupling circuit to be in a first state or a second state. The first state can be configured to yield a first bandwidth for the bias circuit, and the second state can be configured to yield a second bandwidth for the bias circuit. |
| US09413310B2 |
Source driver output stage circuit, buffer circuit and voltage adjusting method thereof
A buffer circuit applied to a source driver output stage circuit includes a buffer and a D-class amplifier. The buffer is coupled to an input voltage for accordingly outputting an output voltage. The D-class amplifier includes a comparator and a switch device. The comparator is for comparing the input voltage and the output voltage and accordingly outputting a comparison signal. The switch device is coupled to an operational voltage for adjusting the output voltage according to the comparison signal. |
| US09413304B2 |
Electronic device and control method thereof
An electronic device includes an amplifier which is configured to amplify a sound signal and includes a vacuum tube including a heater configured to heat the vacuum tube; a voltage supply which is configured to supply a first voltage and a second voltage which is higher than the first voltage; and a controller which is configured to control the voltage supply to supply the second voltage to the heater in response to supply of a drive voltage to the amplifier being started and to supply the first voltage to the heater if the vacuum tube reaches a predetermined temperature. |
| US09413303B2 |
Efficient linear integrated power amplifier incorporating low and high power operating modes
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers. |
| US09413302B2 |
Digital predistortion apparatus and method
A digital predistortion apparatus comprising: a nonlinear device; a memory effect compensator; a constant value characteristic acquirer; a cost function generator; and a coefficient updater is described. |
| US09413299B2 |
Systems and methods utilizing adaptive envelope tracking
A communication system utilizing adaptive envelope tracking includes a transmit path, a feedback receiver, a parameter component and an envelope tracking component. The transmit path is configured to generate a transmit signal. The feedback receiver is configured to generate a feedback signal from the transmit signal. The parameter component is configured to generate linearity parameters from the feedback signal and the baseband signal. The envelope tracking component is configured to generate a supply control signal having time delay adjustments. |
| US09413297B2 |
Constant transconductance bias circuit
A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal. |
| US09413295B1 |
Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features
Systems and methods associated with phase frequency detection are disclosed. In one illustrative implementation, a phase frequency detection (PFD) circuit device may comprise first circuitry and second circuitry having a set input, a reset input, and an output, wherein the set input has a higher priority than the reset input, and additional circuitry arranged and operatively coupled to provide advantageous operation of the PFD circuit device. According to some implementations, for example, systems and methods with clock edge overriding reset features, extended detection range(s), and/or reduction of reverse charge after cycle slipping are provided. |
| US09413293B2 |
Crystal device
A crystal device having electrode lands on a principal surface of a first package member, a crystal oscillator bonded to and held by the electrode lands, a second package member bonded to the principal surface of the first package member by an adhesive layer, a glass layer provided on the principal surface of the first package member, and the glass layer having adhesive spread preventing parts and an extended portion. The adhesive spread preventing parts prevent the adhesive of the adhesive layer from spreading out. The extended portion is extended to reach the lower surfaces of the electrode lands. |
| US09413288B2 |
Photovoltaic system with managed output and method of managing variability of output from a photovoltaic system
Photovoltaic systems with managed output and methods for managing variability of output from photovoltaic systems are described. A system includes a plurality of photovoltaic modules configured to receive and convert solar energy. The system also includes a sensor configured to determine an orientation for each of the plurality of photovoltaic modules, the orientations based on a maximum output from the photovoltaic system. The system also includes an orientation system configured to alter the orientation of one or more of the plurality of photovoltaic modules to provide a reduced output from the photovoltaic system, the reduced output less than the maximum output. |
| US09413287B2 |
Photovoltaic module support system
A support system for a solar panel includes a triangular truss with connection points for mounting a photovoltaic module, and a cradle structure that supports the triangular truss and is connected to at least two side supports of the triangular truss. The cradle structure may be driven for rotation about an axis for tracking the sun and several cradle structures can be linked together for tracking movement using a buried linkage system. The truss may also be foldable for ease of transportation and storage. |
| US09413285B2 |
Support member for mounting photovoltaic modules
A support member for mounting photovoltaic modules on a support surface and a mounting system including the same are disclosed herein. The support member may comprise a body portion that includes a ballast receiving portion for accommodating one or more ballasts, the body portion further including a first support portion with a first surface and a second support portion with a second surface, the first support portion being spaced apart from the second support portion by the ballast receiving portion. The support member is configured to bridge a plurality of rows of photovoltaic modules, the first surface of the support member configured to support one or more photovoltaic modules in a first row of the plurality of rows of photovoltaic modules, and the second surface of the support member configured to support one or more photovoltaic modules in a second row of the plurality of rows of photovoltaic modules. |
| US09413280B2 |
Inverter and method of controlling same
An inverter is provided. The inverter includes a current providing unit providing a first axis current and a second axis current to an induction motor; a revolutions per minute (RPM) measuring unit measuring the RPM of the induction motor; and a control unit changing the second axis current according to the measured RPM. |
| US09413276B2 |
DC motor control over wide dynamic range
Various examples are provided for brushless direct current (DC) motor control over a wide dynamic range. In one example, among others, a system including a power drive coupled to a DC motor and a MCU configured to control commutation of the DC motor based upon shaft speed of the DC motor, where the MCU transitions between a motion-based commutation mode and a time-based commutation mode in response to a comparison of the shaft speed with a predefined threshold. In another example, a method includes commutating a DC motor in response to a transition in rotor position of the DC motor and transitioning from a motion-based commutation mode to a time-based commutation mode in response to a comparison of shaft speed of the DC motor to a predefined threshold. |
| US09413268B2 |
Multilevel inverter device and method
An embodiment multilevel inverter comprises a first boost apparatus having an input coupled to a positive dc bus and a second boost apparatus having an input coupled to a negative dc bus. The multilevel inverter further comprise a first switch coupled to an input of an L-C filter and the first boost apparatus, a second switch coupled to the input of the L-C filter and the second boost apparatus, a third switch coupled between the positive dc bus and the first switch and a fourth switch coupled between the negative dc bus and the second switch. |
| US09413265B2 |
Driving device of synchronous rectification apparatus
A driving device of a synchronous rectification apparatus is provided. The driving device includes a voltage detection part disposed on a power input terminal to detect a voltage value of a power inputted through the power input terminal, an adjustment part receiving the voltage value detected through the voltage detection part, the adjustment part adjusting the receive voltage value to output the adjusted voltage value, and a comparison part receiving the voltage value adjusted through the adjustment part into a positive terminal and a synchronous rectification starting value into a negative terminal, the comparison part outputting an command value of the synchronous rectification apparatus, which is obtained by comparing the received voltage value with the synchronous rectification starting value. |
| US09413263B2 |
Systems and methods for a transformerless power supply to limit heat generation at an output transistor via time varying current draws
Systems and methods are provided for a transformerless power supply configured to limit heat generation. A system includes a power supply input configured to receive power from a time-varying input voltage source. A phase control circuit is configured to generate a current control signal, where the current control signal commands power to be drawn from the power supply through an output transistor, where the current control signal commands the drawn power to have a minimum current when the time-varying input voltage is at a maximum, and where the current control signal commands the drawn power to have a maximum current when the time-varying input voltage is at a minimum. A power supply output is responsive to the output transistor, where the power supply output is configured to output power drawn from the power supply input via the output transistor, wherein the outputted power is at a consistent power level. |
| US09413260B1 |
Method of current control of three-phase modular multilevel converter with inductance changes allowed
Current of a three-phase multilevel modular converter (MMC) is controlled. The control is a division-summation (D-Σ) method yet uses integration to replace the two steps of division and summation. Common D-Σ characteristic equations are used for all areas. Inductance changes are considered in the characteristic equations. Current source is used to control converter. Therefore, the current of the converter can be traced to sinusoidal reference current even when the inductance changes become big. The modulation method and the capacitor-voltage balancing method are submodule unified pulse width modulation (SUPWM) and sorted voltage-balancing method, respectively. The current control directly obtains a law of the current change on each conducting module of an arm. It does not need complex sector judgments and table look-ups. Thus, the amount of computation and memory for a processor can be relatively reduced. |
| US09413257B2 |
Enhanced flyback converter
A DC/DC flyback converter that exhibits reduced switch and transformer voltage stresses in comparison to known flyback converters. The flyback converter also employs soft switching. Embodiments of such flyback converters may be used, without limitation, in electric vehicles and hybrid electric vehicles. A front-stage of the flyback converter comprises a DC/AC step-down circuit that may be separately used for various purposes. |
| US09413256B2 |
Control device of DC-DC converter
An object is to suppress deterioration of a high-voltage side battery regardless of the magnitude of a load current. Provided is a control device of a DC-DC converter that is constituted by a primary side circuit that is electrically connected between an input side and a transformer, and a secondary side circuit that is electrically connected between an output side and the transformer. The control device includes a command generating unit 325 that sets an output current limiting value to a predetermined value on the basis of a detected input voltage, a duty generating unit 330 that calculates a duty configured to turn ON/OFF a switching element on the basis of the output current limiting value and a detected output current, and a switching signal generating unit 335 that generates a switching signal on the basis of the duty. The duty generating unit 330 generates the duty so that an output current is limited to the output current limiting value or less. |
| US09413254B2 |
DC-DC conversion circuit and method of protecting devices therein
A protection circuit protects transistors in a DC-DC conversion circuit from over voltages. The transistors in the conversion circuit include first and second transistors. Converted energy is driven across a transformer by an H-bridge circuit. With a first configuration of the H-bridge circuit, a third transistor is turned on to discharge an inductor that was previously charged. The inductor is coupled to the third transistor. The discharging of the inductor boosts an output current of the conversion circuit. A capacitor is charged through a diode. The capacitor and diode are disposed in the protection circuit. The diode is coupled to the first transistor and the charging of the capacitor is effective to limit voltage across the first transistor. |
| US09413251B2 |
Power delivery device, AC adapter, electronic apparatus and power delivery system, having variable function of output voltage value and available output current capacity
The PD device includes: a DC/DC converter disposed between an input and an output; a primary-side controller configured to control an input current of the DC/DC converter; and a secondary-side controller connected with AC coupling to the output, and configured to feed back electric power information of the output to the primary-side controller. The primary-side controller varies an output voltage value and an available output current capacity of the DC/DC converter by controlling the input current on the basis of the electric power information fed back from the secondary-side controller. |
| US09413247B2 |
Signal transmission method and related device
A method of operating an electrical power supply device having a primary side and a secondary side is provided. The method includes transmitting with an optocoupler arranged between the primary side and the secondary side a wide band control signal and a numerical information signal. The method further includes transmitting the control signal and the information signal over a rectangular-wave signal modulated in combination with frequency modulation and pulse width modulation. The control signal and the information signal are the modulating signals for frequency modulation and pulse width modulation of said rectangular-wave signal. |
| US09413244B2 |
Voltage conversion circuit with voltage selection of transistor bulk
A voltage conversion circuit is disclosed. The voltage conversion circuit comprises an energy-storing inductor, an N-type transistor, a P-type transistor, a current comparator, a multiplexer, a first driver and a second driver. When load connected to the voltage conversion circuit is a light load, the P-type transistor will be switched off so as to avoid generating a switching current and the switching current flowing gate-source and gate-drain parasitic capacitor of the N-type transistor is generated from an input voltage. The number of N-type transistor and switching frequency also decrease accordingly so that voltage conversion efficiency of the voltage conversion circuit may be increased. |
| US09413231B2 |
Charge pump circuit for providing voltages to multiple switch circuits
A charge pump circuit generates a charge pump voltage that powers a bias circuit. The bias circuit generates a reference current and generates switch currents from the reference current. Gate-source voltages are generated from the switch currents and applied to switching components of switch circuits to connect two nodes. The gate-source voltages can be generated in the bias circuit and provided to the switch circuits. The gate-source voltages can also be generated in the switch circuits. |
| US09413225B2 |
Method of controlling a power factor correction converter and related closed-loop control system
A method controls a power factor correction converter that includes a boost inductor and a switch. The method generates a sense signal representing a rectified AC input voltage or an inductor current through the boost inductor, turns on the switch in response to determining, based on the sense signal, a zero current condition through the boost inductor, turns off the switch after an on-time interval, generates a feedback signal based on an output voltage of the converter, and compares the feedback signal with a threshold. If the feedback signal is smaller than the threshold, the method generates a command signal, representing a phase domain including 0 and π, based on the feedback signal and the power threshold, and keeps the switch off when a phase of the input rectified AC voltage or of the inductor current is in the phase domain even if the zero current condition has been determined. |
| US09413221B1 |
Power conversion using a series of power converters
A power conversion unit includes power converters arranged sequentially to each other to convert input power that is provided at an input of the power conversion unit to output power. A set of first capacitors are arranged in series with each other and include, for each power converter, a first capacitor that is arranged in parallel with an associated power converter. Each first capacitor is also arranged to store a portion of the input power. A set of second capacitors are connected in series with each other and include a second capacitor connected between each pair of sequential power converters in the sequence. The set of second capacitors are arranged to balance the portion of the input power stored by each first capacitor. |
| US09413219B2 |
System for controlling power-up sequence using DC/DC converter
Disclosed is a system for controlling a power-up sequence applicable to a power controller of a lane departure warning system, including: one DC/DC converter unit configured to convert a first input voltage of input power and output the converted first input voltage as a first output voltage, and including four output terminals; and a comparator block unit including two comparators configured to monitor a state of the input power, and one or more comparators configured to generate a control signal for enabling a power output of a next sequence from the first output voltage. |
| US09413196B2 |
Wireless power transfer
A revised coil loop structure is combined with metamaterials designed to contain and redirect the electromagnetic field to produce an improved inductive coupling system. The efficiency of the inductive power transfer system is increased relative to existing technologies by overcoming the negative effects of distance and misalignment. The transmitting and receiving coils are both constructed by connecting a series of printed circuit boards (PCBs). The individual PCBs are then stacked on top of one another and connected to produce the transmitting and receiving coils. The transmitting and receiving coils further feature a coil shape designed to allow the coils to be actively and variably tuned to one another. The efficiency of power transfer in the system is additionally increased through the use of metamaterials. The metamaterial is used as a backing for the coils and reduces the amount of magnetic flux found on the back of the coils. |
| US09413195B2 |
Microgrid system structured to detect overload conditions and take corrective actions relating thereto
A distribution manager includes a main bus, a first connection coupled to the main bus through a first circuit breaker and being structured to couple the distribution manager to an inter-microgrid connection system, a second connection coupled to the main bus through a second circuit breaker and being structured to couple the distribution manager to the inter-microgrid connection system, and a third circuit breaker coupled to the main bus and being structured to be coupled to a load. The distribution manager is configured to detect an overload condition and in response thereto (i) request to bring an offline distributed source online, (ii) if an offline distributed source cannot be brought online, request to shed the load, and (iii) if the load cannot be shed, cause the second circuit breaker to downwardly adjust the trip curve thereof. |
| US09413190B2 |
Mobile terminal and wireless charging module therefor
The present invention provides a mobile terminal which, when wireless (contactless) charging of a battery is performed by approximating a transmission coil of a charging unit (charging pad) and a reception coil provided in a wireless charging module of a mobile terminal, can adjust the saturation magnetic flux density and eddy currents of a shield sheet to which the reception coil is attached, the shield sheet being provided in the wireless charging module. When the reception coil is placed on the shield sheet to perform wireless charging, the saturation magnetic flux density and eddy current generation in the shield sheet are adjusted for wireless charging purpose because a part of the region in which the magnetic flux density is most quickly saturated was clipped off from the shield sheet. Thus, charging efficiency can be increased, and the problem of heat generation of the shield sheet can be effectively. |
| US09413177B2 |
Efficient apparatus and method for inhibiting corrosion with discharge blocking features in a battery
A battery pack selectively coupled to a portable electronic device and/or a recharging source, and configured to inhibit corrosion with discharge blocking features, the battery pack includes a positive terminal, a negative terminal, and a data terminal accessible from a housing of the battery pack, wherein each of the positive terminal, the negative terminal, and the data terminal are coupled to a battery in the battery pack; and a discharge blocking circuit configured to allow/block voltage across the positive terminal and the negative terminal based on a presence of a steady state pull up on the data terminal, wherein the steady state pull up is based on the battery pack being coupled to the recharging source, via the positive terminal, the negative terminal, and the data terminal. |
| US09413175B2 |
Wireless charging system for transferring power to receivers having different standards using coils of differing shapes
The present disclosure relates to a wireless power transfer method, a wireless power transmitter and a wireless charging system in a wireless power transfer field. That is, a wireless power transmitter configured transfer power to a wireless power receiver in a wireless manner, the transmitter configured to a first coil configured to convert a current into a magnetic flux, a second coil configured to be adjacent to the first coil on a plane, a third coil configured to have a different shape from the first and second coils and have at least part thereof which overlaps the first and second coils, respectively, and a controller configured to determine a coil to be activated among the first, second and third coils. |
| US09413173B2 |
Power conversion device, control device for power conversion device, and control method for power conversion device
A command system of a power conditioning system of the present invention receives return pattern information including a time instance and an upper output limit, and issues a command with respect to the upper output limit of the power conditioning system, the return pattern information being for preventing the frequency of an isolated power system, which is calculated by a planning server, from causing a sharp change. |
| US09413172B1 |
Remote controlled extension cord with embedded housing for a remote control
A remote controlled extension cord. The extension cord has a wire attached to a plug with an integrated base. The base serves to cradle a remote control, which is used to turn power on/off to the extensions on the cord. The extension cord has a number of advanced operations, for example a sequential flash operation which cycles power between all of the individual sockets in the extension cord in sequence, and then repeats the sequence. This can all be controlled by the remote control. |
| US09413171B2 |
Network access coordination of load control devices
An apparatus may control the power delivered from an AC power source to an electrical load, and may comprise a controllably conductive device. The apparatus may also comprise a controller that may be operatively coupled to a control input of the controllably conductive device. The apparatus may also include a first wireless communication circuit operable to communicate via a first protocol and to join a first wireless communication network operable to communicate via the first protocol. The first wireless communication circuit may be in communication with the controller. The controller may be operative to determine a first condition for communicating via the first protocol. The controller may also be operable to control the first wireless communication circuit to join the first wireless communication network upon the first condition being satisfied. |
| US09413170B2 |
Redundant module with symmetrical current paths
The invention relates to a redundant module for decoupling short-circuit currents in a redundant voltage supply. The redundant module comprises at least two power supply units, and the number of inputs corresponds at least to the number of power supply units. Each input is routed via a separate current path to a common current node of an output for providing an output current. Each current path forms a decoupling section, and at least one measuring element for measuring the input voltage, the input current, and/or the input power as well as a control element for regulation purposes are assigned to each decoupling section. |
| US09413168B2 |
ESD protection device
An ESD protection device 1 includes a plurality of input electrodes 21a through 21d and a plurality of output electrodes 21e through 21h. The plurality of input electrodes 21a through 21d are disposed along a first direction. The plurality of output electrodes 21e through 21h are disposed along the first direction. The plurality of output electrodes 21e through 21h oppose the input electrodes 21a through 21d in a second direction which is tilted with respect to the first direction. End portions of the input electrodes 21a through 21d on a side closer to the output electrodes 21e through 21h in the second direction and end portions of the output electrodes 21e through 21h on a side closer to the input electrodes 21a through 21d in the second direction form main discharge units 31a through 31d. |
| US09413166B2 |
Noise-tolerant active clamp with ESD protection capability in power up mode
A circuit is described comprising electrostatic discharge (ESD) protection circuitry, keep-off circuitry and ESD detection circuitry. When the ESD detection circuitry detects an ESD event, the ESD detection circuitry is configured to both enable the ESD protection circuitry and disable the keep-off circuitry. |
| US09413165B2 |
Programmable protected input circuits
An input protection circuit may include an input node to receive an input signal, and may further include an output node to provide a protected output signal based on the input signal. Protection circuitry may be coupled between the input node and the output node to establish a current path that bypasses the input node and pulls the output pin to a specified reference voltage level in the event of a transient at the input node. A push-pull power supply may be used to provide the reference voltage to the current path, and dissipate any excess voltage by burning it off in a semiconductor device included in the push-pull power supply circuitry. |
| US09413164B2 |
Protection system for electrical power distribution system using directional current detection and logic within protective relays
A power distribution system for a dynamically positioned vessel may include: a plurality of busses including a first bus to which a load is connectable; a plurality of switches including a first switch and a second switch, wherein the plurality of busses is connected via the switches in a interjacent manner to form a ring, the first bus is connected between the first switch and the second switch, and the power distribution system is configured to concurrently open the first switch and second switches, if a first current flowing via the first switch towards the first bus is above a predetermined current threshold for longer than a predetermined time and a second current flowing via the second switch towards the first bus is above the predetermined current threshold for longer than the predetermined time, thereby disconnecting the first bus from the ring while all other buses remain connected together. |
| US09413162B2 |
Modular equipment center distributed independent protections
Distributed electronic protections and control architecture enabling simultaneous fault clearance without conflicting fault isolation logic. A plurality of modular equipment centers (MECs) is spatially distributed throughout a vehicle to service equipment loads with power and data. In one embodiment, protective functions are embedded on integrated protection chipsets (IPCs) within the distributed architecture of the vehicle. The IPCs implement a plurality of protective functions where coordinated or independent fault assessments are performed. |
| US09413161B2 |
Protection apparatus and method of terminal
A protection apparatus of a terminal is described in an embodiment of the disclosure, which includes that: a detection module, a driving module and a plugboard, wherein the plugboard is disposed between a mainboard side power supply contact and a battery side power supply contact of the terminal; the mainboard side power supply contact and the battery side power supply contact are connected via the plugboard; the detection module is configured to send a driving instruction to the driving module when detecting that a working parameter of the terminal exceeds a preset threshold; the driving module is configured to push the plugboard so as to break a connection between the mainboard side power supply contact and the battery side power supply contact when receiving the driving instruction sent from the detection module. A protection method of a terminal is also described in an embodiment of the disclosure. With the technical solution in the embodiment of the disclosure, it is able to realize a fast power interruption on a mobile terminal, effectively reduce the damage to the mobile terminal in an emergency and reduce the loss of a user. |
| US09413158B2 |
PTC device
The present invention relates to a new PTC device having a configuration with which protrusion of solder paste and/or an excess portion of epoxy resin do not adversely affect a jig. Such PTC device 30 includes a PTC member 32 and leads 34 and 36 electrically connected to both sides of the PTC member. The PTC member includes a PTC element 38 and metal electrodes 40 and 42 placed on both sides of the PTC element respectively, and each lead is electrically connected to the metal electrode via an electrically conductive connection portion 50. At least one of the leads 36 has a concave portion which is defined with a bottom portion 44 located adjacently to the metal electrode of the PTC member and a wall portion 46 surrounding the electrically conductive connection portion which connects the leads to the metal electrode. |
| US09413154B2 |
Connector with cable retention feature and patch cord having the same
A patch cord including a connector attached to an end of an electrical cable. The connector includes a single-piece attachment member having a management section, a boot, and collar including a retention arrangement. Certain types of retention arrangements include one or more teeth that protrude inwardly from the collar to bite into at least an outer jacket of the electrical cable. |
| US09413151B2 |
Electrical junction box
An electrical junction box includes a body case of the electrical junction box that has an opening part facing electrical components and has a case side locking part, and a cover that covers the opening part, is engaged to the body case of the electrical junction box, and has a cover side locking part. The cover is engaged to or disengaged from the body case of the electrical junction box with the case side locking part and the cover side locking part. The cover has a cover side abutting part to match a position of the cover side locking part. The body case of the electrical junction box has a case side abutting part to match a position of the case side locking part and a position of the cover side abutting part. |
| US09413148B2 |
Electric wall feedthrough for solar installations
A wall feedthrough is provided, which is pluggable on one side, for connecting a voltage-carrying conductor of a solar generator to a combiner box housing. A two-part connector housing having a front housing part and an insert part which can be moved together with an electric terminal element as one unit relative to the front housing part, wherein the terminal element is pluggable on one side and has a spring-force clamp on the other side, and wherein in the closed state, the spring-force clamp is surrounded by a body sleeve of the front housing part, and in the open state the clamping device is pulled out of the body sleeve so as to be openable and closable, and wherein, for this purpose, the insert part has an exposed handle portion for the user. |
| US09413144B1 |
Portable racking tool for electric equipment replacement
A portable racking tool for the installation and removal of electrical equipment, such as circuit breakers, is disclosed herein. Also disclosed is a method of using the portable racking tool. The portable racking tool can be lightweight and rugged for providing electrically operated controlled installation and removal of electrical equipment by an operator from a remote location using a coupling for engagement with the electrical equipment. |
| US09413141B2 |
Spark plug for combustion chamber of a gas turbine engine
A spark plug for combustion chamber of a gas turbine engine including: an external body forming ground electrode, intended to be received mainly in a bypass of the combustion chamber; an internal central electrode; and an interposed insulator with clearance between the external body and the internal electrode, is provided. The spark plug terminates in a nose forming portion to be received in the flame tube of the chamber of the combustion chamber, and a semi-conductor element being interposed between the central electrode and the ground electrode at the level of said nose forming portion. The external body includes at least one cooling air inlet which communicates inside the spark plug with at least one outlet arranged at the level of the nose forming portion. |
| US09413137B2 |
Pulsed line beam device processing systems using laser diodes
Pulsed laser beams provided by laser diodes or arrays of laser diodes are applied to substrates such as amorphous silicon. The optical beam is based on a plurality of beams from respective laser diodes and is shaped, homogenized, and directed to a substrate. Duty cycles of the laser diodes are selected to be less than about 0.2. Exposures are applied to Aft an amorphous silicon layer on a rigid or flexible substrate to produce a polysilicon layer with a mobility of at least 50 cm2/Vs. |
| US09413136B1 |
Stepped diode laser module with cooling structure
A laser module has a unitary base including stepped platforms with an offset relative to an adjacent platform, each stepped platform accommodating a laser source with at least a first and a second plurality of stepped platforms, each platform accommodating a cooling channel inside at a predetermined depth below the top surface of the platform to conduct a flow of cooling fluid provided on an inlet, the cooling channel running under a platform having microchannels, the cooling channels being connected to a fluid inlet with an inlet manifold that provides cooling fluid at the inlet and an outlet manifold to dispose the cooling fluid with waste heat at an outlet, the laser module producing in one embodiment no less than 100 Watt of optical power. |
| US09413135B2 |
Flip chip type laser diode and flip chip type laser diode package structure
A flip chip type laser diode includes a first substrate, a first semiconductor layer disposed on the first substrate, an emitting layer disposed on one part of the first semiconductor layer, a second semiconductor layer disposed on the emitting layer and forming a ridge mesa, a current conducting layer disposed on another part of the first semiconductor layer, a patterned insulating layer covering the second semiconductor layer and the current conducting layer and including a first zone and a second zone which respectively expose a part of the current conducting layer and a part of the second semiconductor layer, a first electrode and a second electrode respectively disposed on the first zone and the second zone. A projection of the ridge mesa projected to the first substrate covers a part of projections of the first electrode and the second electrode projected to the first substrate. |
| US09413134B2 |
Multi-stage ramp-up annealing for frequency-conversion crystals
A frequency-conversion crystal annealing process includes a first ramp-up period (e.g., increasing the crystal's temperature to a first set point in the range of 100° C. to 150° C. over about 2 hours), a first fixed temperature period (e.g., maintaining at the first set point for 10 to 20 hours), a second ramp-up period (e.g., increasing from the first set point to a second set point above 150° C. over about 1 hour or more), a second fixed period (e.g., maintaining at the second set point for 48 to 300 hours), and then a temperature ramp-down period (e.g., decreasing from the second set point to room temperature over about 3 hours). Transitions from the first and second fixed temperature periods are optionally determined by —OH bonds absorption levels that are measured using Fourier transform infrared spectroscopy, e.g., by monitoring the absorption of —OH bonds (including H2O) near 3580 cm−1 in the infra-red spectrum. |
| US09413124B2 |
Telecommunication or data-transmission jack
A jack has a housing and connectors. A dielectric housing part forms with the housing an upwardly open seat shaped to receive and fit with a substantially complementary plug. A second flexible circuit board has a U-shaped outer end formed with a plurality of conductive jack fingers projecting into the seat. The jack fingers are connected via the first circuit board to the connectors. A U-shaped dielectric support fits complementarily within the U-shaped end of the second circuit board, has fingers like the jack fingers and fixed thereto, and is pivotal in the housing part between an inner position and an outer position. A U-shaped leaf spring fits within the support, has fingers like the support fingers, bears outwardly on the support, and is braced against the housing part to bias the jack fingers into the outer position. |
| US09413122B2 |
Modular jack having middle metal plate shielding two adjacent ports
A modular jack has an insulative housing, two adjacent internal modules, and a middle shield disposed between the adjacent internal modules. The insulative housing has a front wall and a plurality of openings therein configured as pairs of first and second aligned openings, and a receptacle located behind the openings. Each opening is configured to receive a plug connector therein in a front-to-back direction. The middle shield extends towards a front wall of the insulative to define two module receiving cavities each receiving one internal module. The middle shield includes a conductive plate and an insulative sheet affixed thereto. The insulative sheet faces to the internal modules for insulation between the internal modules and the conductive plate. The insulative sheet is very thin that it occupies little space of the receptacle, thereby reducing a size of the modular jack. |
| US09413119B2 |
Electrical connector with an improved mating plate
An electrical connector comprises a base plate and a pair of terminal modules, the base plate defines a tongue plate. Each terminal module includes a plurality of terminals and an insulative housing inserted molding with the terminals. A pair of concave portions forms on opposite sides of the tongue plate, the two terminal modules are received in said concave portions respectively. An insulative shell is injection molded over outer sides of the terminal modules and commonly forms a mating plate, the terminals define a contacting portion exposed to two opposite surfaces of the mating plate. Said electrical connector can increase the binding force of the terminal modules and the base plate. |
| US09413118B2 |
Connector and connector assembly
This connector can be connected to a counterpart connector having a counterpart contact, and is provided with an electric current sensor function. Specifically, the connector is provided with a contact, a protective member composed of an insulating material, a core, and an electric current detection member. The contact extends along the longitudinal direction so as to have a longitudinal part that can be connected to the counterpart contact. The protective member surrounds the contact in the plane orthogonal to the longitudinal direction. The core surrounds the protective member in the plane orthogonal to the longitudinal direction. The core has a gap. The electric current detection member is at least partially disposed within the gap. |
| US09413117B2 |
Receptacle
A receptacle comprises a tongue, a plurality of top contacts, a grounding piece and a conductive shell. The tongue is integrated into a printed circuit board. The top contacts are spaced apart along a top row on the tongue and include a pair of top grounding contacts respectively located at both sides of the top row. The grounding piece sequentially has a tail mounted onto the printed circuit board, a base attached to a rear portion of the tongue, a top shielding pad located behind the top contacts and two arms respectively constituting both sides of the tongue. The grounding contacts are respectively located on top surfaces of the two arms. The conductive shell is coupled to the base and surrounds the tongue and the grounding piece. |
| US09413116B1 |
Slotted, clamped termination ring for an electrical connector assembly
A termination ring for an electrical connector has slots for receiving multiple inner conductive shields of a cable. The shields pass through the slots, are folded back onto a rear portion of the termination ring, and are clamped onto the termination ring. After assembling a backshell onto the connector over the termination ring, a void remains between the interior surface of the backshell and the clamped inner conductive shields, thereby enabling proper mechanical engagement of the connector, termination ring, and backshell. |
| US09413113B2 |
Power supply connection structure device
The present invention relates to a power supply connection structure device, a manufacturing method thereof and a circuit connection method. The device, which is used to connect an electrical appliance to a power supply, includes a live wire and neutral wire connection unit and a control unit, the control unit is switched between an activation state and an idle state, when the control unit is in the idle state, the live wire and neutral wire connection unit is not connected to the power supply; and when the control unit is in the activation state, the control unit connects the live wire and neutral wire connection unit to the power supply, thus, by using the control unit, the power supply connection structure device is safe to use, is waterproof and prevents individual from electric shock. |
| US09413112B2 |
Electrical connector having contact modules
An electrical connector includes a housing and a plurality of contact modules and ground plates held by the housing. Each contact module includes left and right signal wafers stacked next to each other along a stack axis. The signal wafers include electrical terminals held by a dielectric body. The electrical terminals have mounting contacts protruding from the dielectric body at a mounting face of the housing. The electrical terminals of at least one of the signal wafers in each contact module are jogged toward the other signal wafer such that the mounting contacts of each contact module align in a column. Each of the ground plates is disposed along an outer side of a corresponding contact module. |
| US09413109B1 |
Method and system for coupling a cable connector to a circuit board
The present invention provides a computer system comprising an enclosure adapted to contain one or more printed circuit boards, the enclosure including a back plane having a recessed port for coupling a data communication cable to a printed circuit board, the recessed port including a receptacle adapter coupled to the printed circuit board adapted to receive a connector of the data communication cable, and a perpendicular clearance space for facilitating alignment of the connector of the data communication cable with the receptacle. |
| US09413108B2 |
Lever-actuated electrical connector and mating system
A lever-actuated electrical connector is disclosed having a housing mateable with a mating connector having complementary mating detection terminal. A mating detection terminal is positioned in the housing to form a detection circuit when in contact with the complementary mating detection terminal. A mating lever is supported by the housing. A housing lock is positioned on the housing and in contact with the mating lever when the housing is mated to the mating connector, with the housing lock being displaceable by an operation of the mating lever. The mating detection terminal is positioned at a distance from the counterpart mating detection terminal when the mating lever is in an unlocked positioned, and is in contact with the counterpart mating detection terminal when the mating lever reaches the final mating position to actuate the detection circuit. |
| US09413107B2 |
Serial bus receptacle with adjustable exterior socket clamping
System and method for communicatively coupling a serial communication plug to a serial communication bus. The system may include a housing. The housing may include a receptacle that is configured to communicatively couple to a bus. The receptacle may include one or more internal retention springs situated inside the receptacle. The one or more internal retention springs may be configured to grip a male plug with a retention force, when the male plug is inserted into the receptacle. The housing may include or may be coupled to a clamp where the clamp is external to the receptacle. When the male plug is inserted into the receptacle, the clamp may be adjustable via a clamp adjustment mechanism to constrain the one or more internal retention springs, thus augmenting the retention force and further securing the male plug in the receptacle. |
| US09413103B2 |
Compact connection system for mains switchgear
An easy-to-assemble compact connection system can be connected to a mains via connection to different switchgear devices, such as a residual-current or thermomagnetic circuit breaker, switches, contact breakers, overvoltage protectors or similar devices, in order to collect or inject signals available on the mains, such as collecting current or voltage signals from the mains or collecting or injecting other signals or parameters. The compact connection system can be connected to both switchgear devices already installed in a switchboard and to new units. |
| US09413100B2 |
Plug connector and method for assembling a plug connector
A plug connector includes a housing formed of a plastics material, where the housing includes a lower housing part. A cover for closing the lower housing part is pivotally arranged on the lower housing part. A receiving element is arranged on the lower housing part and a retainer is arranged on the receiving element. The retainer comprises a bearing on to which the cover is pivotally mounted and a spring element arranged on the retainer which is attached to the cover and the receiving element. |
| US09413097B2 |
High density cabled midplanes and backplanes
A cabled midplane includes a first support plate along a plane between a first connector set and a second connector set that connect to line cards on either side of the cabled midplane. The first connector set and the second connector set include connector slices. A wiring sub-layer includes cable slices to provide a connection between the first connector slice of a connector of the first connector set to the first connector slice of a connector of the second connector set, such that the first wiring sub-layer connects each connector of the first connector set, through one cable slice, to a connector of the second connector set. Additional wiring sub-layers are added, and a second support plate, parallel to the first support plate, is provided to encase and support the wiring sub-layers between the first support plate and the second support plate. Other apparatuses and methods are described. |
| US09413094B2 |
Terminal for an electrical connector
A terminal has a base, a wire covering portion, two connecting portions and two resilient arms. The resilient arms are formed on and protrude forward respectively from front ends of the connecting portions and each resilient arm has an extension section, a U-turn portion and a folding contacting section. The extension section is formed on and protrudes forward from the front end of one of the connecting portions. The U-turn portion is formed on the extension section. The folding contacting section is formed on and extends from the U-turn portion, is parallel to the other folding contacting section, and abuts an inside surface of the extension section. The terminal is structurally strong and durable. |
| US09413088B2 |
Controlled power fade for battery powered devices
A method is provided for operating a power tool having a motor powered by a battery. The method includes: delivering power from the battery to the motor in accordance with an operator input; detecting a condition of the power tool indicating a shutdown of the power is imminent; and fading the power delivered from the battery to the motor, in response to the detected condition, through the use of a controller residing in the power tool. |
| US09413087B2 |
Data and power connector
Embodiments are disclosed for a power and data connector comprising a magnet, a film adhered to a surface of the magnet, and a stage extending away from the film. The power and data connector further comprises a plurality of electrical contacts disposed on the stage, the plurality of electrical contacts having a mirrored signal pin-out. |
| US09413084B2 |
Secondary battery pack based on mechanical connection manner
Disclosed herein is a battery pack constructed in a structure in which a plurality of secondary battery cells are electrically connected to one another via a connection member while the secondary battery cells are mounted in a receiving part of a pack case having no partition, wherein the connection member is located between the battery cells arranged in the longitudinal direction or in both the longitudinal direction and the lateral direction, the connection member is connected, in a mechanical coupling manner, to a lower electrode terminal of the front battery cell in the longitudinal direction and/or to an upper electrode terminal of the rear battery cell in the longitudinal direction, and the connection member is elastically pressed while the connection member is located between the battery cells. |
| US09413081B2 |
Circuit protection system, and wiretap connection assembly and method therefor
A wiretap connection assembly is for a circuit protection system. The circuit protection system includes at least one wire conductor and at least one circuit interrupter. The circuit interrupter includes a line conductor and a load conductor. The wire conductor has an electrically conductive inner core and an electrically insulating outer covering. The wiretap connection assembly includes a wire severing assembly structured to sever the wire conductor, and a number of wiretap assemblies. Each wiretap assembly includes a tapping portion and a connecting portion. The tapping portion is structured to pierce through the electrically insulating outer covering of a corresponding portion of the wire conductor and into the electrically conductive inner core. The connecting portion is structured to electrically connect the electrically conductive inner core of the corresponding portion of the wire conductor to a corresponding one of the line conductor and the load conductor. |
| US09413080B2 |
Electronic apparatus including antenna device
An electronic apparatus is provided. The electronic apparatus includes at least one first antenna radiator, a main board including a feed part that is spaced apart from at least one portion of the at least one first antenna radiator to overlap the at least one portion of the at least one first antenna radiator and feeds an electric current to the at least one first antenna radiator according to an indirect feed method, at least one second antenna radiator disposed on a housing of the electronic apparatus, at least one first connection member for electrically connecting the at least one first antenna radiator to the at least one second antenna radiator, and at least one second connection member for electrically connecting a ground part formed on the main board to the at least one second antenna radiator. Also, other various exemplary may be implemented. |
| US09413079B2 |
Single-package phased array module with interleaved sub-arrays
Embodiments of the present disclosure are directed to a single-package communications device that includes an antenna module with a plurality of independently selectable arrays of antenna elements. The antenna elements of the different arrays may send and/or receive data signals over different ranges of signal angles. The communications device may further include a switch module to separately activate the individual arrays. In some embodiments, a radio frequency (RF) communications module may be included in the package of the communications device. In some embodiments, the RF communications module may be configured to communicate over a millimeter-wave (mm-wave) network using the plurality of arrays of antenna elements. |
| US09413078B2 |
Millimeter-wave system with beam direction by switching sources
Various embodiments of a millimeter-wave wireless point-to-point or point-to-multipoint communication system which enables determining preferred directions of transmissions, and transmitting in such preferred directions without routing radio-frequency signals. The system comprises a millimeter-wave focusing element, multiple millimeter-wave antennas, and multiple radio-frequency-integrated circuits (“RFICs”). In various embodiments, preferred directions are determined, and millimeter-wave beams are transmitted in the preferred directions. |
| US09413075B2 |
Graphene based structures and methods for broadband electromagnetic radiation absorption at the microwave and terahertz frequencies
Structures and methods for cloaking an object to electromagnetic radiation at the microwave and terahertz frequencies include disposing a plurality of graphene sheets about the object. Intermediate layers of a transparent dielectric material can be disposed between graphene sheets to optimize the performance. In other embodiments, the graphene can be formulated into a paint formulation or a fabric and applied to the object. The structures and methods absorb at least a portion of the electromagnetic radiation at the microwave and terabyte frequencies. |
| US09413073B2 |
Augmented E-plane taper techniques in variable inclination continuous transverse (VICTS) antennas
An antenna array employing continuous transverse stubs as radiating elements includes a first conductive plate structure including a first set of continuous transverse stubs arranged on a first surface, and a second set of continuous transverse stubs arranged on the first surface, wherein a geometry of the first set of continuous transverse stubs is different from a geometry of the second set of continuous transverse stubs. A second conductive plate structure is disposed in a spaced relationship relative to the first conductive plate structure, the second conductive plate structure having a surface parallel to the first surface. A relative rotation apparatus imparts relative rotational movement between the first conductive plate structure and the second conductive plate structure. |
| US09413072B2 |
Method for installing antenna device, and antenna device
In a lower-side-columnar-conductor installing process, a first columnar sub-conductor (2), a second columnar sub-conductor (3), and a first main columnar conductor (1) are set up individually, and the first main columnar conductor (1) is disposed between the first columnar sub-conductor (2) and the second columnar sub-conductor (3). In a U-shaped-conductor fastening process, the upper-side end portion of the first columnar sub-conductor (2) is arranged facing one end of a U-shaped conductor (7) bent in a U-shape, the upper-side end portion of the second columnar sub-conductor (3) is arranged facing the other end of the U-shaped conductor (7), and the center portion of the U-shaped conductor (7) is fastened to the tip portion of a second main columnar conductor (4). |
| US09413066B2 |
Method and apparatus for beam forming and antenna tuning in a communication device
A system that incorporates teachings of the subject disclosure may include, for example, determining antenna coupling among a plurality of antennas of the communication device and adjusting beam forming for the plurality of antennas utilizing phase shifters coupled with radiating elements of the plurality of antennas, where the adjusting of the beam forming is based on forming a desired antenna pattern that increases radiated throughput and reduces the antenna coupling among the plurality of antennas. Other embodiments are disclosed. |
| US09413064B2 |
Dual port single frequency antenna
An antenna further comprising: a first port, a second port, where the first port is 180-degrees out of phase with respect to the second port. |
| US09413058B1 |
Loop-feeding wireless area network (WAN) antenna for metal back cover
Antenna structures and methods of operating the same are described. One apparatus includes a metal cover having a first corner portion, a second corner portion, and an elongated portion. The elongated portion is physically separated from the first corner portion by a first cutout in the metal cover and the elongated portion is physically separated from the second corner portion by a second cutout in the metal cover. A radio frequency (RF) circuit is coupled to a feeding element that is coupled to the elongated portion. A capacitor is coupled between the feeding element and the first corner portion near the distal end of the feeding element. The RF circuit is operable to cause the feeding element, the elongated portion, and the first corner portion to radiate electromagnetic energy as a first radiator in a first frequency range with dual resonance. |
| US09413056B2 |
Electronic device with aerial glass cover
An electronic device includes a housing and a communications disposed in the housing. The communications module is configured to transmit and/or receive radio signals using at least one communications standard. An aerial glass cover is mounted on a side of the housing so as to form a skin covering the side of the housing. The aerial glass cover includes a glass carrier having a surface on which at least one antenna is printed, where the at least one antenna is configured to operate in at least one communications band associated with the at least one communications standard. A transmission line is formed between the communications module and the at least one antenna. |
| US09413050B2 |
Distributedly modulated capacitors for non-reciprocal components
An apparatus and method for realizing non-reciprocal components, such as isolators and circulators, for operation over a broad bandwidth without requiring magnetic components/material which would prevent integrated circuit manufacture utilizing standard processes is presented. In one example, a circulator is described including varactor diodes coupled at each unit cell in a balanced manner between halves of a differential signal path and halves of a differential carrier path. In another example, variable capacitors are coupled at each unit cell between a signal path and ground, and having a tuning input of the variable capacitor receiving a signal from a carrier path. |
| US09413049B2 |
Rotary joint including first and second annular parts defining annular waveguides configured to rotate about an axis of rotation
A rotary joint includes a contactless electrical connection that has an annular shape, not extending into a central region surrounded and defined by the annular contactless electrical connection. The annular shape of the electrical connection portions allows other uses for the central region, such as for passing an optical signal through the rotary joint. Feeds are coupled to annular waveguide structures in both halves of the rotary joint, for input and output of signals. The feeds may provide connections to the annular waveguide structures at regularly-spaced circumferential intervals around the waveguide structures, such as at about every half-wavelength of the incoming (and outgoing) signals. The annular waveguide structures propagate signals in an axial direction, parallel to the axis of rotation of the rotary joint. The signals propagate contactlessly (non-electrically-conductively) across a gap in the axial direction between the two annular waveguides. |
| US09413048B2 |
Air cathode with graphite bonding/barrier layer
An electrochemical cell includes a housing, a fuel electrode comprising a metal fuel; an oxidant electrode spaced from the fuel electrode, having fuel electrode and oxidant facing sides, and a liquid ionically conductive medium for conducting ions between the fuel and oxidant electrodes to support electrochemical reactions thereat. The fuel and oxidant electrodes are configured to, during discharge, oxidize the metal fuel at the fuel electrode and reduce a gaseous oxidant at the oxidant electrode to generate a discharge potential difference therebetween for application to a load. The oxidant electrode includes an active layer configured to participate in the electrochemical reactions, and a current collector electrically coupled to the active layer. The oxidant electrode further includes a graphite layer comprising a mixture of graphite particles and solvophobic binder, the graphite layer providing a surface thereof for exposure to a sealant that adheres the oxidant electrode to the housing. |
| US09413047B2 |
Assembly to manage contact between battery cell array and thermal interface component of thermal plate
A vehicle traction battery assembly is provided which may include a support structure, a thermal interface component, and a pressure plate. The support structure may include a center bar arrangement and may be configured to support a thermal plate and battery cell array. The thermal interface component may be disposed between the array and plate. The pressure plate may be on an upper face of the array. The assembly may be configured to exert a force against the pressure plate to compress the thermal interface component between the thermal plate and array. The center bar arrangement may include a center bar extending along the array and may be shaped to define a passageway between the upper face and the center bar. The pressure plate may be at least partially disposed within the passageway. |
| US09413045B2 |
Battery pack
A battery pack includes battery stacks each formed of battery cells stacked on one another and bus bars disposed at a first end side of the battery stack for connection between electrode terminals of the battery cells, a battery pack case housing the battery stacks, a fan device disposed inside the battery pack case for circulating fluid within the battery pack case and a spacer disposed between respective adjacent battery cells to guide the fluid to flow in a direction from the first end side to a second end side opposite to the first end side along lateral sides of the battery cells. Each of the battery cells includes a battery cell case as an outer shell thereof that includes an exposed portion having a predetermined exposed length by which the battery cell case projects from an end at the first end side of the spacer. |
| US09413044B2 |
Battery assembly, unit cell and cut-off device
In an aspect, a battery assembly is adapted to accommodate a plurality of unit cells, the battery assembly has: a unit cell wiring configured to provide at least one connection for the unit cells; a cut-off device having a fuse circuit and a heater circuit, the fuse circuit configured to disconnect the connection by heat produced in the heater circuit; and a power supply wiring configured to supply the heater circuit of the cut-off device with an electric power. |
| US09413039B2 |
Battery pack
The present invention relates to a battery pack including a bare cell for charge/discharge of an electric current; a protection circuit board electrically connected to the bare cell and protecting the bare cell against overcharge/discharge thereof; a connector serving as a current path between the bare cell and an external apparatus; a cover frame disposed on the bare cell to cover the protection circuit board; and a connector housing where the connector is disposed and which is exposed to the outside of the cover frame. The assembly strength of the battery pack is improved due to solid mounting of the connector housing on the protection circuit board and non-separable connection of the connector housing and the cover frame. |
| US09413038B2 |
Battery module of improved stability
Disclosed herein is a battery module having a plurality of battery cells electrically connected to each other, the battery module including a voltage sensing unit including voltage sensing terminals electrically connected to electrode terminal connection portions of the battery cells and a conduction part connected to the voltage sensing terminals to transmit voltages detected by the voltage sensing terminals to a module control unit and a signal cutoff unit located between the voltage sensing terminals and the conduction part to interrupt transmission of the detected voltages when a short circuit occurs in the conduction part. |
| US09413037B2 |
Cell capacity adjusting device
Provided is a cell capacity adjusting device for reducing fluctuations in state of charge (SOC) among cells of a battery pack 101, which is formed by connecting a plurality of cells 111-116 in series, during suspension of operation of electrically-powered equipment whose main power source is the battery pack 101. From among the plurality of cells 111-116, one or a plurality of cells having a voltage value equal to or higher than a cell capacity adjustment target voltage are selected. By the selected cells, an intermittent operation unit 105, which operates even during the suspension of operation of the electrically-powered equipment, is caused to perform an intermittent operation. Through repetition of the intermittent operation, voltage values of the selected cells are decreased. Thus, fluctuations in state of charge (SOC) among cells are reduced without unnecessarily discharging battery stored energy of the battery pack 101. |
| US09413036B2 |
Sodium-halogen secondary cell
A sodium-halogen secondary cell that includes a negative electrode compartment housing a negative, sodium-based electrode and a positive electrode compartment housing a current collector disposed in a liquid positive electrode solution. The liquid positive electrode solution includes a halogen and/or a halide. The cell includes a sodium ion conductive electrolyte membrane that separates the negative electrode from the liquid positive electrode solution. Although in some cases, the negative sodium-based electrode is molten during cell operation, in other cases, the negative electrode includes a sodium electrode or a sodium intercalation carbon electrode that is solid during operation. |
| US09413035B2 |
Electrochemical cell having interrupted electrodes
Provided herein are electrochemical cell element systems. One such system includes a first electrode having a desired length and an interrupted second electrode having one or more interruptions disposed between a plurality of electrode segments. The system also includes one or more separators positioned to separate the first electrode and the interrupted second electrode. The first electrode, the interrupted second electrode, and the one or more separators are wound along the length of the cell element. |
| US09413031B2 |
Apparatus and system for an internal fuse in a battery cell
A battery is disclosed for reducing the severity of thermal runaway. The battery includes an anode sheet, a cathode sheet, and a separator situated between the anode sheet and the cathode sheet. The anode sheet, cathode sheet, and separator may be put together in a jelly roll configuration. The battery also includes internal fuses that subdivide the anode sheet, cathode sheet, or both, into electrically separate areas. The fuses are activated during thermal runaway and isolate separate areas of the sheet, thus reducing the total energy available during thermal runaway and reducing the severity. The fuses may be positive temperature coefficient (PTC) fuses that conduct current at normal operating temperatures but stop conducting current at temperatures above normal operating temperatures. The fuses may be placed in the current collectors, or directly into the anode sheet and cathode sheet themselves. In certain embodiments, the fuses may stop conducting when they reach a predefined threshold temperature or when an excessively large current passes through the fuses. |
| US09413029B2 |
Secondary battery
A secondary battery including a first electrode assembly including first and second electrode plates stacked on each other; and a second electrode assembly including third and fourth electrode plates, wherein the second electrode assembly is wound along an outer circumference of the first electrode assembly. The secondary battery having a high energy density and capable of preventing damage of the electrode plates may be provided. |
| US09413027B2 |
Fuel cell system and the operating method thereof
A fuel cell system includes an air manifold through which air is supplied or exhausted, a fuel gas manifold through which fuel gas is supplied or exhausted, a stack portion that generates electricity by using air and fuel that are supplied by the air manifold and the fuel gas manifold, and an injection array that is disposed along an inside of the air manifold or the fuel gas manifold to inject air or fuel gas. |
| US09413025B2 |
Hybrid flow battery and Mn/Mn electrolyte system
An electrolyte system for a hybrid flow battery has a manganese based anolyte and a manganese based catholyte. |
| US09413017B2 |
High temperature fuel cell system with integrated heat exchanger network
A fuel cell system includes a plurality of fuel cells arranged into a stack. A combustor receives a cathode exhaust flow from the fuel cell cathodes and a flow of fuel. The fuel is oxidized in the combustor by the cathode exhaust to produce a mixed exhaust flow. A cathode air flow path extends between a fresh air source and the fuel cell cathodes. An air preheater is arranged along the cathode air flow path, cathode air passing through the air preheater being heated therein by a flow of uncombusted anode exhaust from the fuel cell anodes. A cathode recuperator is arranged along the cathode air flow path, cathode air passing through the cathode recuperator being heated therein by the mixed exhaust flow. Water passing through a vaporizer is converted to steam by heat from the mixed exhaust flow and directed from the vaporizer to the fuel cell anodes. |
| US09413015B2 |
Non-destructive method for testing the seal of an electrolyte of an electrochemical cell
A method for testing a seal of a part that includes an electrolyte of an electrochemical cell, the method including: forming a closed cavity delimited by a first outer surface of the part including the electrolyte to be tested; contacting a second outer surface of the part, opposite the first surface, with a first fluid; circulating a second fluid, separate from the first fluid, through the closed cavity between an inlet and an outlet of this cavity; and analyzing the fluid extracted via the outlet of the cavity, to detect possible presence of the first fluid. |
| US09413014B2 |
Process of preparing carbon-supported metal catalyst by physical deposition
The present disclosure relates to a method and an apparatus for preparing nanosized metal or alloy nanoparticles by depositing metal or alloy nanoparticles with superior size uniformity on the surface of a powder as a base material by vacuum deposition and then dissolving or melting the base material using a solvent or heat. The method solves the problems of the existing expensive multi-step synthesis method based on chemical reduction and allows effective synthesis of metal or alloy nanoparticles with very uniform size and metal or alloy catalyst nanoparticles supported on carbon at low cost. |
| US09413010B2 |
Lithium secondary battery and method for manufacturing the same
Provided is a lithium secondary battery in which negative-electrode active material particles containing silicon and/or a silicon alloy are used and which prevents the occurrence of breakage of a binder itself and peel-off of the binder at the interfaces with the negative-electrode active material and the negative-electrode current collector and has a high energy density and an excellent cycle characteristic. The lithium secondary battery includes: a negative electrode in which a negative-electrode active material layer including negative-electrode active material particles containing silicon and/or a silicon alloy and a binder is formed on a surface of electrically conductive metal foil serving as a negative-electrode current collector; a positive electrode; and a nonaqueous electrolyte, wherein the binder contains a polyimide resin including a crosslinked structure formed by imidization of a hexavalent or higher-valent carboxylic acid or an anhydride thereof with a diamine. |
| US09413007B2 |
Graphene powder, production method thereof, and electrochemical device comprising same
Provided are a graphene powder, a production method thereof, and an electrochemical device comprising the same. The graphene powder has an elemental ratio of oxygen atoms to carbon atoms of not less than 0.07 and not more than 0.13 and an elemental ratio of nitrogen atoms to carbon atoms of not more than 0.01. In the production method, the graphene powder is produced by using a dithionous acid salt as a reducing agent. Since the graphene has a low content of nitrogen atoms and a proper amount of oxygen atoms and a proper defect, the graphene is provided with good performance of both dispersibility and conductive property, and is usable as a good conductive additive, such as the one for a lithium ion battery electrode. The production method has the advantages of low cost, high efficiency and low toxicity. |
| US09413001B2 |
Functionalized carbon nanotube composite
Provided is a composite including lead oxide particles (PbO2) and functionalized carbon nanotubes (CNTs). |
| US09412999B2 |
Potato-shaped graphite particles with low impurity rate at the surface, method for preparing the same
Modified graphite particles obtained from graphite or based on graphite, the said particles having impurities in their internal structure and having on the surface a low, even nil, rate of an impurity or several impurities. In addition, these particles have at least one of the following characteristics: a tab density between 0.3 and 1.5 g/cc; a potatolike shape; and a granulometric dispersion such that the D90/D10 ratio varies between 2 and 5 and the particles have a size between 1 and 50 μm. These particles can be used for fuel cells, electrochemical generators, or as moisture absorbers and/or oxygen absorbers and they have important electrochemical properties. The electrochemical cells and batteries thus obtained are stable and safe. |
| US09412998B2 |
Energy storage devices
A novel hybrid lithium-ion anode material based on coaxially coated Si shells on vertically aligned carbon nanofiber (CNF) arrays. The unique cup-stacking graphitic microstructure makes the bare vertically aligned CNF array an effective Li+ intercalation medium. Highly reversible Li+ intercalation and extraction were observed at high power rates. More importantly, the highly conductive and mechanically stable CNF core optionally supports a coaxially coated amorphous Si shell which has much higher theoretical specific capacity by forming fully lithiated alloy. The broken graphitic edges at the CNF sidewall ensure good electrical connection with the Si shell during charge/discharge processes. |
| US09412993B2 |
Battery module equipped with sensing modules having improved coupling structure
A battery module according to an exemplary embodiment of the present disclosure includes a plurality of cell cartridges including at least one battery cell having an electrode terminal and a molding case to receive the battery cell, the molding case having a plurality of coupling protrusions protruding outward, and a sensing module connected to the coupling protrusions to couple the plurality of cell cartridges, the sensing module having a voltage sensing terminal coming into contact with the electrode terminal by the coupling.According to one aspect of the present disclosure, a cost and time taken to manufacture the battery module may reduce by simplifying a connection structure of the plurality of battery cells, and simplifying a coupling structure between the battery cell and the sensing module installed to sense the voltage of the battery cell. |
| US09412991B2 |
Secondary battery
A secondary battery includes an electrode assembly having an electrode uncoated portion, a current collector having a pair of collecting parts coupled to the electrode uncoated portion, a case accommodating the electrode assembly, and a cap plate sealing an opening of the case. Each of the collecting parts includes a first surface facing an inner wall of the case. A retainer part extends toward the inner wall of the case from the first surface of each of the collecting parts. The retainer part is moldingly integrated with each of the collecting parts. |
| US09412988B2 |
Separator including coating layer of inorganic and organic mixture, and battery including the same
A porous separator including a porous base film; and a coating layer, the coating layer being on a surface of the porous base film and including a polyvinylidene fluoride homopolymer, a polyvinylidene fluoride-hexafluoropropylene copolymer, and inorganic particles, wherein the separator exhibits a thermal shrinkage of about 30% or less in a machine direction (MD) or in a transverse direction (TD), as measured after leaving the separator at 150° C. for 1 hour, a peel strength of about 50 gf/cm2 or more between the coating layer and the base film, and an adhesive strength of about 20 gf/cm2 or more between the coating layer and electrodes of a battery. |
| US09412982B2 |
Battery pack for electric power tool
A front pressing rib is formed integrally with the cell holder. The front pressing rib bridges a dimensional difference between the inside of the case to be assembled and the cell holder by generating a pressing force on the front side. That is, the cell holder is pressed rearward in the case by a pressing force of the front pressing rib that is applied to the inside of the case. The front pressing rib serves to completely bridge the dimensional difference when the cell holder is inserted into the case. |
| US09412979B2 |
Device for monitoring performance characteristics associated with user activities involving swinging instruments
Exemplary embodiments are directed to devices for attachment to a swinging instrument that generally include a cover, a base, a chassis, and positive and negative electrical contacts. The base includes a fastening portion and a support portion. The chassis supports a printed circuit board. The devices include a cap configured and dimensioned to mate relative to the support portion of the base. The support portion can support the chassis, the printed circuit board, the positive and negative electrical contacts, and the cap. The cover can be configured and dimensioned to detachably interlock relative to the base. In the mated configuration, the cap and the base can form a battery opening configured and dimensioned to receive therethrough a battery. Exemplary embodiments are also directed to methods of device assembly. |
| US09412978B2 |
Pouch type battery
A pouch type battery that can protect a metal layer exposed to ends of a pouch using a photocurable adhesive and can fix adhesion parts to the pouch, thereby achieving a simplified, automated process, instead of a manually taping process. The pouch type battery includes an electrode assembly including a first electrode plate, a second electrode plate and a separator, a pouch accommodating the electrode assembly and having adhesion parts formed by adhering opposing edges, and a photocurable adhesive applied to the adhesion parts of the pouch and sides of the pouch. |
| US09412973B2 |
Organic light emitting diode display device and method of fabricating the same
An organic light emitting diode display device which may improve luminous emitting efficiency by forming a scattering layer with a material including fluorine and a method of fabricating the same are discussed. The organic light emitting diode display device can include a thin film transistor formed on a substrate; an overcoat layer formed on the substrate such that the thin film transistor is covered; a scattering layer formed on the overcoat layer and formed with a material including fluorine; and an organic light emitting cell formed on the scattering layer and including a first electrode, an organic emission layer and a second electrode sequentially laminated, wherein light emitted from the organic light emitting cell passes through the scattering layer and then is emitted through the substrate. |
| US09412971B2 |
Encapsulation structure for an optoelectronic component and method for encapsulating an optoelectronic component
An encapsulation structure for an optoelectronic component may include: a barrier thin-film layer for protecting an optoelectronic component against chemical impurities; a cover layer applied above the barrier thin-film layer and serving for protecting the barrier thin-film layer against mechanical damage; and an intermediate layer applied on the barrier thin-film layer between barrier thin-film layer and cover layer and including a curable material designed such that when the non-cured intermediate layer is applied to the barrier thin-film layer, particle impurities at the surface of the barrier thin-film layer are enclosed by the intermediate layer and the applied intermediate layer has a substantially planar surface, and that after the intermediate layer has been cured, mechanical loads on the barrier thin-film layer as a result of particle impurities during the application of the cover layer are reduced by the intermediate layer. |
| US09412970B2 |
Barrier film composite, display apparatus including the barrier film composite, and method of manufacturing display apparatus including the barrier film composite
A barrier film composite includes a heat-shrinkable layer having a conformable surface conforming to a surface shape of an object in contact with the heat-shrinkable layer, and a flat surface disposed opposite to the conformable surface; and a barrier layer having a smaller thickness than the heat-shrinkable layer and disposed flat on the flat surface of the heat-shrinkable layer. |
| US09412968B2 |
Display device having a spacer
A display device includes a first substrate having a plurality of pixel regions separated by a non-pixel region; a second substrate facing the first substrate; and a spacer disposed between the first substrate and the second substrate to maintain a gap between the first substrate and the second substrate. The pixel regions include a first pixel region and a second pixel region which neighbor each other, the non-pixel region between the first pixel region and the second pixel region is bisected into a first non-pixel region adjacent to the first pixel region and a second non-pixel region adjacent to the second pixel region, and the spacer is formed on the non-pixel region between the first pixel region and the second pixel region. An area of the first non-pixel region occupied by the spacer is smaller than an area of the second non-pixel region occupied by the spacer. |
| US09412963B2 |
Organic electroluminescent element, material for organic electroluminescent element, and light emitting device, display device and illumination device each using the element
The disclosure relates to organic electroluminescent elements, materials for use in the elements, and devices using the elements, which include a compound represented by the following General Formula (1): where R1 to R12 each independently represents a hydrogen atom or a substituent and which may be bound to each other to form a non-aromatic ring, where Z1 to Z4 each independently represents a hydrogen atom or a substituent, and where Z1 and Z2, and Z3 and Z4 may be bound to each other to form a ring. |
| US09412962B2 |
Light-emitting element, light-emitting device, electronic device, and lighting device
A light-emitting element having a long lifetime is provided. A light-emitting element exhibiting high emission efficiency in a high luminance region is provided. A light-emitting element includes a light-emitting layer between a pair of electrodes. The light-emitting layer contains a first organic compound, a second organic compound, and a phosphorescent compound. The first organic compound is represented by a general formula (G0). The molecular weight of the first organic compound is greater than or equal to 500 and less than or equal to 2000. The second organic compound is a compound having an electron-transport property. In the general formula (G0), Ar1 and Ar2 each independently represent a fluorenyl group, a spirofluorenyl group, or a biphenyl group, and Ar3 represents a substituent including a carbazole skeleton. |
| US09412958B2 |
Transparent diffusive OLED substrate and method for producing such a substrate
A transparent diffusive OLED substrate includes the following successive elements or layers: (a) a transparent flat substrate made of mineral glass having a refractive index n1 of between 1.48 and 1.58, (b) a monolayer of mineral particles attached to one side of the substrate by means of a low index mineral binder having a refractive index n2 of between 1.45 and 1.61, and (c) a high index layer made of an enamel having a refractive index n4 between 1.82 and 2.10 covering the monolayer of mineral particles, the mineral particles having a refractive index n3 between n2+0.08 and n4−0.08 and protruding from the low index mineral binder so as to be directly in contact with the high index layer, thereby forming a first diffusive interface between the mineral particles and the low index binder, and a second diffusive interface between the mineral particles and the high index layer. |
| US09412956B2 |
Organometallic iridium complex, light-emitting element, light-emitting device, electronic device, and lighting device
An organometallic iridium complex has high emission efficiency and a long lifetime. The iridium complex includes the structure represented by Formula (G1). In the formula, Ar represents a substituted or unsubstituted arylene group having 6 to 13 carbon atoms. R1 to R6 independently represent any one of hydrogen and a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, and one of R2 and R6 represents the alkyl group. X represents a carbon atom or a nitrogen atom, and when X represents a carbon atom, hydrogen or an alkyl group having 1 to 6 carbon atoms is bonded to the carbon atom. A dihedral angle between a ring bonded to R1 and a phenyl group bonded to R2 to R6 is 30° or more and 90° or less. An interior angle of the pyridine/pyrimidine ring facing R1 is within a range of 118° to 122°. |
| US09412953B2 |
Light-emitting element, light-emitting device, electronic device, lighting device, and heterocyclic compound
A light-emitting element with high heat resistance and high emission efficiency is provided. A novel heterocyclic compound that can be used in such a light-emitting element is provided. One embodiment of the present invention is a light-emitting element which includes, between a pair of electrodes, a layer containing a first organic compound, a second organic compound, and a light-emitting substance; the first organic compound includes one pyrimidine ring and one ring with a hole-transport skeleton; the second organic compound is an aromatic amine; and the light-emitting substance converts triplet excitation energy into light. A combination of the first organic compound, which includes the one pyrimidine ring and the one ring with the hole-transport skeleton, and the second organic compound, which is the aromatic amine, forms an exciplex. |
| US09412952B2 |
Photoelectric conversion element and method of using the same, image sensor, and optical sensor
A photoelectric conversion element includes a transparent conductive film, a conductive film, and a photoelectric conversion layer and an electron-blocking layer disposed between the transparent conductive film and the conductive film. The photoelectric conversion layer includes a condensed polycyclic hydrocarbon which contains at least 5 benzene rings, of which a total number of rings is 7 or more and which contains no carbonyl group. The electron-blocking layer includes a compound A having a residue after removal of at least one group of Ra1 to Ra9 from a compound represented by general formula (A) and having a glass transition point (Tg) of 200° C. or more. The photoelectric conversion element exhibits high photoelectric conversion efficiency and low dark current characteristics even after heating treatment, and can be manufactured with high productivity. |
| US09412951B2 |
Organic materials and organic electroluminescent apparatuses using the same
Organic materials and organic electroluminescent apparatuses using the same are provided. The structural general formula of the materials is shown below, wherein Ar is selected from residues of C6-C30 fused-ring aromatic hydrocarbons, Ar1 and Ar2 are each independently selected from the group consisting of hydrogen, C6-C24 aryl, and C6-C24 heterocyclic aryl, and n is an integer selected from 2 and 3. The present organic materials can be used as electron transport layers in the organic electroluminescent apparatuses. |
| US09412939B2 |
Forming sublithographic heaters for phase change memories
A phase change memory with a heater with sublithographic dimensions may be achieved, in some embodiments, with lower thermal budget. The phase change memory may use a controlled etching process to reduce the lateral dimension of the heater. |
| US09412935B1 |
Method for fabricating magnetic tunnel junction and 3-D magnetic tunnel junction array
A method for fabricating a magnetic tunnel junction cell includes steps of providing a substrate having an active surface, forming a tunnel layer, a fixed layer and a first electrode, forming a U-shaped free layer having a vertical portion substantially perpendicular to the active surface, and forming a second electrode embedded in the U-shaped free layer. The fixed layer lines an inner surface of a through hole substantially perpendicular to the active surface and the first electrode fills the through hole. The tunnel layer may line the inner surface of the through hole or be U-shaped lining an inner surface of the U-shaped free layer. The fixed layer, the tunnel layer and the U-shaped free layer constitute a magnetic tunnel junction. |
| US09412932B2 |
Piezoelectricity ceramic, sinter, method for manufacturing same, and piezoelectricity ceramic device using same
The present disclosure provides a piezoelectricity ceramic material. The piezoelectricity ceramic material includes main components that are represented by a general chemical formula of PbZraTib(Nb2/3Ni1/3)1-a-bO3+c%BaW0.5Cu0.5O3 d%SiO2 and satisfy the following condition: 0.1≦a≦0.4, 0.2≦b≦0.5, 0.1≦c≦3, and 0.05≦d≦1. The low-temperature sintering adopted by the present disclosure reduces energy consumption and reduces the volatilization of PbO, which avoids the fluctuation and deviation of the ceramic components, reduces the pollution to then environment caused by volatilization, and reduces the corrosion to the sintering machine as well. Furthermore, the present disclosure provides a piezoelectricity ceramic sinter and a method for processing the same, as well as a piezoelectricity ceramic device. In a multi-layer device, the device cost is greatly reduced. |
| US09412928B2 |
Thermoelectric device
A thermoelectric device includes a plurality of thin-film thermoelectric elements. Each thin-film thermoelectric element is a Seebeck-Peltier device. The thin-film thermoelectric elements are electrically coupled in parallel with each other. The thermoelectric device may be fabricated using conventional semiconductor processing technologies and may be a thin-film type device. |
| US09412924B2 |
Light emitting diode package having heat dissipating slugs
A light emitting diode package having heat dissipating slugs is provided. The light emitting diode package comprises first and second heat dissipating slugs formed of a conductive material and spaced apart from each other; a package main body coupled to the first and second heat dissipating slugs to support the first and second heat dissipating slugs; and a light emitting diode die electrically connected to the first and second heat dissipating slugs, wherein the respective first and second heat dissipating slugs are exposed to the outside through lower and side surfaces of the package main body. As such, the first and second heat dissipating slugs can be used as external leads. |
| US09412919B2 |
Light source circuit unit, illuminator, and display
Provided are a light source circuit unit that improves light extraction efficiency, as well as an illuminator and a display that include such a light source circuit unit. The light source circuit unit includes: a circuit substrate having a wiring pattern on a surface thereof, the wiring pattern having light reflectivity, a circular pedestal provided on the circuit substrate, a water-repelling region provided at least from a peripheral edge portion of the pedestal to a part of a side face of the pedestal, and one or two or more light-emitting device chips mounted on the pedestal, and driven by a current that flows through the wiring pattern. |
| US09412915B2 |
Lighting apparatus
A lighting apparatus includes a substrate, a plurality of light-emitting dies disposed on the substrate and spaced apart from one another, a continuous structure disposed over the substrate and covering the light-emitting dies within, and a filler. The light-emitting dies each are covered with an individual phosphor coating and the filler is between the continuous structure and the phosphor coating for each of the light-emitting dies. The lighting apparatus has a substantially white appearance when the plurality of light-emitting dies is turned off. |
| US09412909B2 |
Light emitting apparatus, manufacturing method of light emitting apparatus, light receiving and emitting apparatus, and electronic equipment
A manufacturing method is a method for manufacturing a light emitting apparatus including a translucent substrate, and a light emitting section and an optical filer section that are arranged in a first region of the substrate when viewed in a normal direction of a first surface of the substrate. The manufacturing method includes: forming a dielectric multilayer film over the first region of the substrate; forming a first electrode on the dielectric multilayer film included in the light emitting section; forming a functional layer with a light emitting layer over the first electrode and the dielectric multilayer film included in the optical filter section; and forming a second electrode having semi-transmissive reflectivity on the functional layer over the first region of the substrate. |
| US09412904B2 |
Structured substrate for LEDs with high light extraction
A device for back-scattering an incident light ray, including: a host substrate; a structured layer; a first face in contact with a front face of the host substrate; a second flat face parallel to the first face; a first material and a second material which form, in a mixed plane, alternating surfaces at least one of whose dimensions is between 300 nm and 800 nm, the mixed plane is between the first and second face of the structured layer; wherein the refractive index of the first and of the second material are different, the structured layer is covered by a specific layer, the specific layer is made of a material which is different from the first and second materials of the structured layer, and the specific layer is crystalline and semi-conductive. |
| US09412903B2 |
Semiconductor light emitting device
A semiconductor light emitting device includes a stacked semiconductor structure including a first conductivity-type semiconductor layer having a top surface divided into a first region and a second region, and an active layer and a second conductivity-type semiconductor layer disposed sequentially on the second region of the first conductivity-type semiconductor layer. First and second contact electrodes are disposed in the first region of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, respectively. A current spreading layer is disposed on the second contact electrode and comprises a first conductive layer having a first resistivity and a second conductive layer having a second resistivity smaller than the first resistivity alternately stacked. |
| US09412897B2 |
Advanced hydrogenation of silicon solar cells
A method of hydrogenation of a silicon photovoltaic junction device is provided, the silicon photovoltaic junction device comprising p-type silicon semiconductor material and n-type silicon semiconductor material forming at least one p-n junction. The method comprises: i) ensuring that any silicon surface phosphorus diffused layers through which hydrogen must diffuse have peak doping concentrations of 1×1020 atoms/cm3 or less and silicon surface boron diffused layers through which hydrogen must diffuse have peak doping concentrations of 1×1019 atoms/cm3 or less; ii) providing one or more hydrogen sources accessible by each surface of the device; and iii) heating the device, or a local region of the device to at least 40° C. while simultaneously illuminating at least some and/or advantageously all of the device with at least one light source whereby the cumulative power of all the incident photons with sufficient energy to generate electron hole pairs within the silicon (in other words photons with energy levels above the bandgap of silicon of 1.12 eV) is at least 20 mW/cm2. |
| US09412895B2 |
Method of manufacturing photoelectric device
A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted.According to one or more embodiments of the present invention, a photoelectric device having a reduction in the number of processes for manufacturing the photoelectric device and improved output characteristics is provided. |
| US09412890B1 |
Photovoltaic module pin electrical connectors
Provided are novel structures for electrically interconnecting two or more building integrable photovoltaic (BIP) modules with a pin connector. Each module has a cavity and a conductive element positioned inside the cavity. The conductive element may be electrically coupled to one or more photovoltaic cells. In a photovoltaic assembly formed by two modules, a conductive portion of the pin connector extends between two cavities of the respective modules and provides an electrical communication between the two conductive elements. The two cavities are generally coaxially aligned. In certain embodiments, one or both cavities are through holes. A portion of the pin connector may extend outside of such cavities and protrude into a building structure to mechanically secure the modules with respect to the structure. A pin connector may have an insulating head for handling the connector during installation and/or sealing the through hole under the head from the environment. |
| US09412889B2 |
Aligned networks on substrates
Among other things, two networks, one on top of the other, are formed on a substrate based on coating materials containing emulsions or foams. The two networks can be formed of the same material, e.g., a conductive material such as silver, or can be formed of different materials. The coating materials forming the different networks can have different concentration of network materials. |
| US09412886B2 |
Electrical contact
A photovoltaic device with a low-resistance stable electrical back contact is disclosed. The photovoltaic device can have a CuTex or CuTexNy layer. |
| US09412882B2 |
Schottky barrier diode
A Schottky barrier diode includes an n-type semiconductor layer including a Ga2O3-based compound semiconductor with n-type conductivity, and an electrode layer that is in Schottky-contact with the n-type semiconductor layer. A first semiconductor layer in Schottky-contact with the electrode layer and a second semiconductor layer having an electron carrier concentration higher than the first semiconductor layer are formed in the n-type semiconductor layer. The second semiconductor layer includes a β-Ga2O3 substrate including a main plane rotated by an angle not less than 50° and not more than 90° with respect to a (100) plane thereof. |
| US09412880B2 |
Schottky diode with improved surge capability
An SiC Schottky diode die or a Si Schottky diode die is mounted with its epitaxial anode surface connected to the best heat sink surface in the device package. This produces a substantial increase in the surge current capability of the device. |
| US09412877B2 |
Semiconductor device
A transistor or the like having excellent electrical characteristics is provided. A semiconductor device includes a gate electrode; a gate insulating film in contact with the gate electrode; and a multilayer film which is in contact with the gate insulating film and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer in the order from a side farthest from the gate insulating film. The first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer each contain indium, an element M (aluminum, gallium, yttrium, or tin), and zinc. The first oxide semiconductor layer has a thickness greater than or equal to 20 nm and less than or equal to 200 nm. The third oxide semiconductor layer has a thickness greater than or equal to 0.3 nm and less than 10 nm. |
| US09412873B1 |
Alignment features for improved alignment of layered components of a device display
Device display assemblies that include layered components provided with alignment features are disclosed. Protective sheets that are adhered to other layered components of a display assembly may be provided with alignment features that are utilized as part of an alignment process to accurately align the protective sheets with respect to the other layered components as well as to align the display assembly with respect to other device components such as a cover glass. Alignment features may also be provided in other layered components of a display assembly in addition to the protective sheets. |
| US09412871B2 |
FinFET with channel backside passivation layer device and method
A FinFET with backside passivation layer comprises a template layer disposed on a substrate, a buffer layer disposed over the template layer, a channel backside passivation layer disposed over the buffer layer and a channel layer disposed over the channel backside passivation layer. A gate insulator layer is disposed over and in contact with the channel layer and the channel backside passivation layer. The buffer layer optionally comprises aluminum and the channel layer may optionally comprise a III-V semiconductor compound. STIs may be disposed on opposite sides of the channel backside passivation layer, and the channel backside passivation layer may have a top surface disposed above the top surface of the STIs and a bottom surface disposed below the top surface of the STIs. |
| US09412869B2 |
MOSFET with source side only stress
An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement region on the source side only and not forming a stress enhancement region in the drain extension increases the resistance of the drain extension region enabling formation of a DeMOS transistor with reduced area. In a MOS transistor, by forming the stress enhancement region on the source side only and eliminating the stress enhancement region from the drain side, transistor leakage is reduced and CHC reliability improved. |
| US09412868B2 |
Semiconductor device and fabrication method thereof
A method for fabricating a semiconductor device includes forming an isolation feature in a substrate, forming a gate stack over the substrate, forming a source/drain (S/D) recess cavity in the substrate, where the S/D recess cavity is positioned between the gate stack and the isolation feature. The method further includes forming an epitaxial (epi) material in the S/D recess cavity, where the epi material has an upper surface which including a first crystal plane. Additionally, the method includes performing a redistribution process to the epi material in the S/D recess cavity using a chlorine-containing gas, where the first crystal plane is transformed to a second crystal plane after the redistribution. |
| US09412865B1 |
Reduced resistance short-channel InGaAs planar MOSFET
A metal-oxide-semiconductor field effect transistor (MOSFET) and a method of fabricating a MOSFET are described. The method includes depositing and patterning a dummy gate stack above an active channel layer formed on a base. The method also includes selectively etching the active channel layer leaving a remaining active channel layer, and epitaxially growing silicon doped active channel material adjacent to the remaining active channel layer. |
| US09412860B2 |
Multi-layer gate dielectric
A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second dielectric constant different from the first dielectric constant. |
| US09412857B2 |
Nitride semiconductor device and method for manufacturing same
According to one embodiment, a nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a third electrode, a first insulating film and a second insulating film. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer is provided on the first layer, includes a nitride semiconductor, and includes a hole. The first electrode is provided in the hole. The second electrode is provided on the second layer. The third electrode is provided on the second layer so that the first electrode is disposed between the third and second electrodes. The first insulating film is provided between the first electrode and an inner wall of the hole and between the first and second electrodes, and is provided spaced from the third electrode. The second insulating film is provided in contact with the second layer between the first and third electrodes. |
| US09412854B2 |
IGBT module and a circuit
An IGBT module is provided. The IGBT module has at least a first individual IGBT with a first softness during switching-off the IGBT module, and at least a second individual IGBT connected in parallel to the at least one first IGBT. The at least one second individual IGBT has a second softness during switching-off the IGBT module which is different than the first softness. Further a circuit and an electronic power device having two individual IGBTs, which are connected in parallel, are provided. |
| US09412850B1 |
Method of trimming fin structure
A method of trimming a fin structure includes the following operations: (i) forming a fin structure on a substrate; (ii) epitaxially growing an epitaxy structure cladding the fin structure, in which the epitaxy structure has a first lattice plane with Miller index (111), a second lattice plane with Miller index (100) and a third lattice plane with Miller index (110); and (iii) removing the epitaxy structure and a portion of the fin structure to obtain a trimmed fin structure. |
| US09412848B1 |
Methods of forming a complex GAA FET device at advanced technology nodes
The present disclosure provides a method of forming a semiconductor device and a semiconductor device. An SOI substrate portion having a semiconductor layer, a buried insulating material layer and a bulk substrate is provided, wherein the buried insulating material layer is interposed between the semiconductor layer and the bulk substrate. The SOI substrate portion is subsequently patterned so as to form a patterned bi-layer stack on the bulk substrate, which bi-layer stack comprises a patterned semiconductor layer and a patterned buried insulating material layer. The bi-layer stack is further enclosed with a further insulating material layer and an electrode material is formed on and around the further insulating material layer. Herein a gate electrode is formed by the bulk substrate and the electrode material such that the gate electrode substantially surrounds a channel portion formed by a portion of the patterned buried insulating material layer. |
| US09412846B2 |
Thin-film transistor, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same
A thin-film transistor, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same are disclosed. In one aspect, the thin-film transistor includes an active layer including a channel region, a source region, and a drain region, wherein the active layer has a top surface. The transistor also includes a gate insulating layer formed over the active layer and a gate metal layer formed over the gate insulating layer and having a bottom surface. The area of the bottom surface of the gate metal layer is less than the area of the top surface of the active layer and the bottom surface of the gate metal layer overlaps the top surface of the active layer. |
| US09412845B2 |
Dual gate structure
Methods for forming a dual gate structure for a vertical TFT are described. The dual gate structure may be formed by performing a first etching process that includes forming a first set of trenches by etching a first set of oxide pillars to a first depth and forming a second set of trenches by etching a second set of oxide pillars to a second depth higher than the first depth, forming a first set of gate structures within the first set of trenches, forming a second set of gate structures within the second set of trenches, performing a second etching process that includes forming a third set of trenches by etching the first set of gate structures from a second initial depth to a third depth and forming a fourth set of trenches by etching the second set of gate structures to a fourth depth higher than the third depth. |
| US09412842B2 |
Method for fabricating semiconductor device
A gate pattern is formed on a first region of a substrate. An epitaxial layer is formed on a second region of the substrate. A recess is formed in the second region of the substrate by etching the epitaxial layer and the substrate underneath. The first region is adjacent to the second region. |
| US09412837B2 |
Methods of manufacturing semiconductor devices
In a method of manufacturing a semiconductor device, the method comprises: forming a dummy gate pattern on a substrate; and forming first spacers at side surfaces of the dummy gate pattern to expose upper portions of the side surfaces of the dummy gate pattern. Sacrificial film patterns are formed on regions of the upper portions of the side surfaces of the dummy gate pattern which are exposed by the first spacers. Second spacers are formed on the first spacers and the sacrificial film patterns. An interlayer insulating film is formed to cover the substrate, the second spacers and the dummy gate pattern. A top surface of the dummy gate pattern is exposed by planarizing the interlayer insulating film, and a trench is formed by removing the dummy gate pattern and the sacrificial film patterns. |
| US09412832B2 |
Semiconductor device and semiconductor device manufacturing method
In aspects of the invention, an n-type epitaxial layer that forms an n− type drift layer is formed on the upper surface of an n-type semiconductor substrate formed by being doped with a high concentration of antimony. A p-type anode layer is formed on a surface of the n− type drift layer. An n-type contact layer is formed with an impurity concentration in the same region as the impurity concentration of the n-type cathode layer, or higher than the impurity concentration of the n-type cathode layer, on the lower surface of the n-type cathode layer. A cathode electrode is formed so as to be in contact with the n-type contact layer. The n-type contact layer is doped with phosphorus and, without allowing complete recrystallization using a low temperature heat treatment of 500° C. or less, lattice defects are allowed to remain. |
| US09412830B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a material including InAlN and formed on the first semiconductor layer, an insulator layer formed by an oxidized surface part of the second semiconductor layer, a gate electrode formed on the insulator layer, and a source electrode and a drain electrode respectively formed on the first or second semiconductor layer. |
| US09412825B2 |
Semiconductor device
A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode. |
| US09412820B2 |
Semiconductor device with thinned channel region and related methods
A method for making a semiconductor device may include forming a dummy gate above a semiconductor layer on an insulating layer, forming sidewall spacers above the semiconductor layer and on opposing sides of the dummy gate, forming source and drain regions on opposing sides of the sidewall spacers, and removing the dummy gate and underlying portions of the semiconductor layer between the sidewall spacers to provide a thinned channel region having a thickness less than a remainder of the semiconductor layer outside the thinned channel region. The method may further include forming a replacement gate stack over the thinned channel region and between the sidewall spacers and having a lower portion extending below a level of adjacent bottom portions of the sidewall spacers. |
| US09412815B2 |
Solution-assisted carbon nanotube placement with graphene electrodes
A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween. |
| US09412814B2 |
Structure and formation method of FinFET device
Structures and formation methods of a semiconductor device are provided. The semiconductor device structure includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure and a source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device structure further includes an isolation layer between the source/drain structure and the semiconductor substrate. |
| US09412812B2 |
Compound semiconductor device and method of manufacturing the same
An AlGaN/GaN HEMT includes a compound semiconductor stack structure; an element isolation structure which demarcates an element region on the compound semiconductor stack structure; a first insulating film which is formed on the element region and is not formed on the element isolation structure; a second insulating film which is formed on at least the element isolation structure and is higher in hydrogen content than the first insulating film; and a gate electrode which is formed on the element region of the compound semiconductor stack structure via the second insulating film. |
| US09412810B2 |
Super-junction trench MOSFETs with closed cell layout having shielded gate
A super-junction trench MOSFET with closed cell layout having shielded gate is disclosed, wherein closed gate trenches surrounding a deep trench in each unit cell and the shielded gate disposed in the deep trench. Trenched source-body contacts are at least formed between the closed gate trenches and the deep trench. The deep trench has square, rectangular, circle or hexagon shape. |
| US09412805B2 |
Integrated circuits including inductors
An integrated circuit includes a substrate having a surface and an inductor disposed over the surface of the substrate. The inductor includes a first conductive line disposed over the surface and first conductive structures disposed over and electrically coupled with the first conductive line. The inductor includes second conductive structures disposed over and electrically coupled with the first conductive structures. The inductor includes a second conductive line disposed over and electrically coupled with the second conductive structures. The inductor includes third conductive structures disposed over and electrically coupled with the first conductive line and at least one fourth conductive structure disposed over and electrically coupled with the third conductive structures. The inductor includes a third conductive line disposed over and electrically coupled with the at least one fourth conductive structure, the third conductive line extending substantially parallel to the second conductive line. |
| US09412804B2 |
Light emitting device and manufacturing method of the same
The present invention is directed to a light emitting device structured so as to increase the amount of light which is taken out in a certain direction after emitted from a light emitting element, and a method of manufacturing this light emitting device. An upper end portion of an insulating material 19 that covers an end portion of a first electrode 18 is formed to have a curved surface having a radius of curvature, a second electrode 23a is formed to have a slant face as going from its center portion toward its end portion along the curved surface. Light emitted from a light emitting layer comprising an organic material 20 that is formed on the second electrode 23a is reflected at the slant face of the second electrode 23a to increase the total amount of light taken out in the direction indicated by the arrow in FIG. 1A. |
| US09412802B2 |
Organic light emitting display apparatus and method of manufacturing the same
Provided are an organic light emitting display apparatus and a method of manufacturing the same. The apparatus includes a substrate including a display area and a peripheral area outside the display area, a plurality of thin film transistors (TFTs) disposed in the peripheral area of the substrate, a first insulating layer covering the plurality of TFTs, a plurality of conductive layers disposed on the first insulating layer to be located above the plurality of TFTs and to be mutually separated to correspond to spaces among the plurality of TFTs, a second insulating layer covering spaces among the plurality of conductive layers, and an opposite electrode corresponding to the display area and the peripheral area of the substrate, covering the second insulating layer, and being in contact with at least portions of the conductive layers. |
| US09412801B2 |
Organic light emitting diode display device and method for manufacturing the same
An OLED display device includes a display area of a substrate to display images; a non-display area surrounding the display area and applying signals to pixels within the display area; a first thin film transistor formed in the non-display area of the substrate; a second thin film transistor formed in the display area of the substrate; a planarization film formed over the first and second thin film transistors; a first electrode formed on the planarization film in the non-display area and formed with at least one first opening; a second electrode formed on the planarization film and connected to a electrode of the second thin film transistor; a bank pattern formed on the second electrode and the first electrode and exposing a part of the second electrode. The bank pattern is adjacent to the first electrode. |
| US09412792B2 |
Organic light emitting device
Disclosed is an organic light emitting device. The organic light emitting device includes a first emission unit configured to include a first red emission layer which emits red light, a first green emission layer which emits green light, and a first blue emission layer which emits blue light, a second emission unit configured to include a second red emission layer which emits red light, a second green emission layer which emits green light, and a second blue emission layer which emits blue light, a charge generation layer disposed between the first emission unit and the second emission unit, a first electrode formed as a reflective electrode, and configured to supply an electric charge having a first polarity to the first emission unit and the second emission unit, and a second electrode configured to supply an electric charge having a second polarity to the first and second emission units. |
| US09412791B2 |
Solid state imaging element, production method thereof and electronic device
There is provided a solid state imaging element including: an insulation film laminated on a semiconductor substrate; a lower transparent electrode film formed and separated by the insulation film per pixel; a hydrophobic treatment layer laminated on a flat surface of the insulation film and the lower transparent electrode film; an organic photoelectric conversion layer laminated on the hydrophobic treatment layer; and an upper transparent electrode film laminated on the organic photoelectric conversion layer. Also, there is provided a production method thereof and an electronic device. |
| US09412788B2 |
Semiconductor device structure useful for bulk transistor and method of manufacturing the same
A semiconductor device includes: a semiconductor substrate including a first surface and a second surface facing each other, the semiconductor substrate having an element region in which a transistor is provided on the first surface, and a separation region in which an element separating layer surrounding the element region is provided; a contact plug extending from the first surface to the second surface, in the element region of the semiconductor substrate; and an insulating film covering a periphery of the contact plug. |
| US09412784B1 |
Pre-flash time adjusting circuit and image sensor using the same
The present disclosure illustrates a pre-flash time adjusting circuit. The pre-flash time adjusting circuit comprises a first pre-flash time adjusting unit coupled to an image sensing array. The image sensing array comprises a plurality of pixel units. The first pre-flash time adjusting unit comprises a switching module and a storage capacitor. When the image sensing array senses a light beam, the switching module selectively connects a first switch and the storage capacitor, such that the storage capacitor starts to charge the first pixel units of the first pixel group, until base-emitter voltages of a plurality of bipolar junction transistors disposed in the first pixel units reaches a stable state. |
| US09412782B2 |
Imaging array with improved dynamic range utilizing parasitic photodiodes within floating diffusion nodes of pixels
A pixel sensor having a main photodetector and a parasitic photodiode and a method for reading out that pixel sensor are disclosed. The pixel sensor is read by reading a first potential on a floating diffusion node in the pixel sensor while the floating diffusion node is isolated from the main photodiode. The pixel sensor is then exposed to light such that the floating diffusion node and the photodetector are both exposed to the light. A second potential on the floating diffusion node is then readout while the floating diffusion node is isolated from the main photodiode. After the first and second potentials are readout, a third potential on the floating diffusion node is readout. The main photodiode is then connected to the floating diffusion node, and a fourth potential on the floating diffusion node is readout. First and second light intensities are determined from the readout potentials. |
| US09412778B2 |
Semiconductor device, solid-state image sensor, methods of manufacturing the same, and camera
A method of manufacturing a semiconductor device includes forming a silicon compound layer containing nitrogen on a substrate where a silicide layer and an element isolating portion have been formed, forming an opening in the silicon compound layer, and forming an interlayer insulating film which covers the silicon compound layer and the opening. The opening is formed to lie within an area of the silicon compound layer that overlaps the element isolating portion. |
| US09412776B2 |
Solid-state imaging device and method of manufacturing the same, and imaging apparatus
A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion. |
| US09412774B2 |
Image sensor having a metal pattern between color filters
An image sensor includes an inorganic color filter, an organic color filter, and a metal pattern. The inorganic color filter is on a support substrate. The organic color filter is on the support substrate. The organic color filter is spaced apart from the inorganic color filter. The metal pattern is between the inorganic color filter and the organic color filter. |
| US09412773B2 |
Photoelectric conversion apparatus, image pickup system, and method for manufacturing photoelectric conversion apparatus
A photoelectric conversion section contains a semiconductor element having a laminated structure which contains an electroconductor, a semiconductor, and an insulator provided between the electroconductor and the semiconductor, in which the insulator is a silicon oxide film containing nitrogen in a main portion located between the electroconductor and the semiconductor. |
| US09412769B2 |
Transistor, method of manufacturing the transistor, and electronic device including the transistor
Example embodiments relate to a transistor, a method of manufacturing a transistor, and/or an electronic device including the transistor. In example embodiments, the transistor includes a first field effect transistor (FET) and a second FET connected in series to each other, wherein a first gate insulating film of the first FET and a second gate insulating film of the second FET have different leakage current characteristics or gate electric field characteristics. |
| US09412767B2 |
Liquid crystal display device and method of manufacturing a liquid crystal display device
A liquid crystal display device (10) includes: gate wiring (501) formed on a substrate (500) and along a first direction; drain wiring (702) formed on the substrate (500) and along a second direction that is different from the first direction; a common electrode (900) formed so as to cover the drain wiring (702) through intermediation of an insulating film (800); and common wiring (901) formed on the common electrode (900) and along the drain wiring (702). The common wiring (901) is formed so that at least a part of the common wiring (901) overlaps with a region in which the drain wiring (702) is formed. |
| US09412764B2 |
Semiconductor device, display device, and electronic device
To prevent an influence of normally-on characteristics of the transistor which a clock signal is input to a terminal of, a wiring to which a first low power supply potential is appled and a wiring to which a second low power supply potential lower than the first low power supply potential is applied are electrically connected to a gate electrode of the transistor. A semiconductor device including the transistor can operate stably. |
| US09412763B2 |
Display device and electronic unit
A display device includes a substrate, a display element, a transistor as a drive element of the display element, and a holding capacitance element holding electric charge corresponding to a video signal, and including a first conductive film, a first semiconductor layer including an oxide semiconductor, an insulating film, and a second conductive film in order of closeness to the substrate. The display element, the transistor, and the holding capacitance element are provided on the substrate. |
| US09412760B1 |
Array substrate and manufacturing method thereof, and display device
An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed. |
| US09412757B2 |
Semiconductor device
A local interconnect is formed in contact with an upper surface of an impurity diffusion region and extends to below a potential supply interconnect. A contact hole electrically couples the local interconnect to the potential supply interconnect. The local interconnect, which is formed in contact with the upper surface of the impurity diffusion region, is used for electrically coupling the impurity diffusion region to the potential supply interconnect. |
| US09412756B2 |
Nonvolatile semiconductor memory device including pillars buried inside through holes same
In a nonvolatile semiconductor memory device, a stacked body is formed by alternately stacking dielectric films and conductive films on a silicon substrate and a plurality of through holes extending in the stacking direction are formed in a matrix configuration. A shunt interconnect and a bit interconnect are provided above the stacked body. Conductor pillars are buried inside the through holes arranged in a line immediately below the shunt interconnect out of the plurality of through holes, and semiconductor pillars are buried inside the remaining through holes. The conductive pillars are formed from a metal, or low resistance silicon. Its upper end portion is connected to the shunt interconnect and its lower end portion is connected to a cell source formed in an upper layer portion of the silicon substrate. |
| US09412755B2 |
Manufacturing method for semiconductor device
In a manufacturing method for a semiconductor device provided with a MONOS-type FET for a non-volatile memory and high-voltage and low-voltage MOSFETs, a groove having a predetermined depth is formed in a region in which the high-voltage MOSFET on a semiconductor substrate is formed, and an oxide film serving as a gate insulating film of the high-voltage MOSFET is formed within the formed groove by thermal oxidation. Thereafter, a gate electrode film of the low-voltage MOSFET is formed on the entire surface of the semiconductor substrate. Thereafter, a region for the MONOS-type FET is opened, the semiconductor surface of the semiconductor substrate is exposed, and a first potential barrier film, a charge storage film, and a second potential barrier film are sequentially deposited, to thereby form a charge storage three-layer film. Agate electrode film of the MONOS-type FET is formed on the formed charge storage three-layer film. |
| US09412753B2 |
Multiheight electrically conductive via contacts for a multilevel interconnect structure
A method of making multi-level contacts includes providing an in-process multilevel device having a device region and a contact region including a stack of a plurality of alternating sacrificial layers and insulator layers located over a major surface of a substrate. A contact mask with at least one contact mask opening and at least one first terrace mask opening is provided over the stack, where the at least one first terrace mask opening is larger than the at least one contact mask opening. At least one first contact opening and at least one first terrace opening are simultaneously formed extending substantially perpendicular to the major surface of the substrate through the stack to a first sacrificial layer by etching a portion of the stack through the at least one contact mask opening and the at least one first terrace mask opening. A first electrically conductive via contact is deposited in the at least one first contact opening. |
| US09412752B1 |
Reference line and bit line structure for 3D memory
A 3D NAND flash memory includes even and odd stacks of conductive strips. Some of the conductive strips in the stacks are configured as word lines. Data storage structures are disposed on the sidewalls of the even and odd stacks. Active pillars include even and odd semiconductor films on the data storage structures connected at the bottom ends so that the semiconductor films can be thin films having a U-shaped current path. An even pad connected to the even semiconductor film and an odd pad connected to the odd semiconductor film are disposed over the even and odd stacks respectively. A segment of a reference line is connected to the even pad, and an inter-level connector is connected to the odd pad. A segment of a bit line comprises an extension contacting the inter-level connector. |
| US09412749B1 |
Three dimensional memory device having well contact pillar and method of making thereof
A monolithic three dimensional memory device includes a semiconductor substrate having a major surface and a doped well region of a first conductivity type extending substantially parallel to the major surface of the semiconductor substrate, a plurality of NAND memory strings extending substantially perpendicular to the major surface of the semiconductor substrate, and a plurality of substantially pillar-shaped support members extending substantially perpendicular to the major surface of the semiconductor substrate, each support member including an electrically insulating outer material surrounding an electrically conductive core material that extends substantially perpendicular to the major surface of the semiconductor substrate and electrically contacting the doped well region. |
| US09412748B2 |
Method of manufacturing semiconductor device having an implanting from a second direction inclined relative to a first direction
An improvement is achieved in the performance of a semiconductor device. In a method of manufacturing the semiconductor device, using a control gate electrode and a memory gate electrode which are formed over a semiconductor substrate as a mask, n-type impurity ions are implanted from a direction perpendicular to a main surface of the semiconductor substrate. Then, using the control gate electrode, the memory gate electrode, and first and second sidewall spacers as a mask, other n-type impurity ions are implanted from a direction inclined relative to the direction perpendicular to the main surface of the semiconductor substrate. |
| US09412746B2 |
Anti-fuses on semiconductor fins
A device includes a substrate, isolation regions at a surface of the substrate, and a semiconductor region over a top surface of the isolation regions. A conductive feature is disposed over the top surface of the isolation regions, wherein the conductive feature is adjacent to the semiconductor region. A dielectric material is disposed between the conductive feature and the semiconductor region. The dielectric material, the conductive feature, and the semiconductor region form an anti-fuse. |
| US09412745B1 |
Semiconductor structure having a center dummy region
A semiconductor structure is provided, including a substrate, a plurality of first semiconductor devices, a plurality of second semiconductor devices, and a plurality of dummy slot contacts. The substrate has a device region, wherein the device region includes a first functional region and a second functional region, and a dummy region is disposed therebetween. The first semiconductor devices and a plurality of first slot contacts are disposed in the first functional region. The second semiconductor devices and a plurality of second slot contacts are disposed in the second functional region. The dummy slot contacts are disposed in the dummy region. |
| US09412743B2 |
Complementary metal oxide semiconductor device
The present invention provides a complementary metal oxide semiconductor device, comprising a PMOS and an NMOS. The PMOS has a P type metal gate, which comprises a bottom barrier layer, a P work function metal (PWFM) layer, an N work function tuning (NWFT) layer, an N work function metal (NWFM) layer and a metal layer. The NMOS has an N type metal gate, which comprises the NWFT layer, the NWFM layer and the low-resistance layer. The present invention further provides a method of forming the same. |
| US09412741B2 |
Integration of analog transistor
An integrated circuit has two parallel digital transistors and a perpendicular analog transistor. The digital transistor gate lengths are within 10 percent of each other and the analog gate length is at least twice the digital transistor gate length. The first digital transistor and the analog transistor are implanted by a first LDD implant which includes a two sub-implant angled halo implant process with twist angles perpendicular to the first digital transistor gate edge and parallel to the analog transistor gate edge. The second digital transistor and the analog transistor are implanted by a second LDD implant which includes a two sub-implant angled halo implant process with twist angles perpendicular to the second digital transistor gate edge and parallel to the analog transistor gate edge. The first halo dose is at least 20 percent more than the second halo dose. |
| US09412737B2 |
IGBT with a built-in-diode
When an IGBT has a barrier layer 10 that separates an upper body region 8a from a lower body region 8b, conductivity modulation is enhanced and on-resistance decreases. When the IGBT also has a Schottky contact region 6 that extends to reach the barrier layer 10, a diode structure can be obtained. In this case, however, a saturation current increases as well as short circuit resistance decreases. The Schottky contact region 6 is separated from the emitter region 4 by the upper body region 8a. By selecting an impurity concentration in the region 8a, an increase in a saturation current can be avoided. Alternatively, a block structure that prevents a depletion layer extending from the region 6 into the region 8a from joining a depletion layer extending from the region 4 into the region 8a may be provided in an area separating the region 6 from the region 4. |
| US09412728B2 |
Post-CMOS processing and 3D integration based on dry-film lithography
A method for performing a post processing pattern on a diced chip having a footprint, comprises the steps of providing a support wafer; applying a first dry film photoresist to the support wafer; positioning a mask corresponding to the footprint of the diced chip on the first dry film photoresist; expose the mask and the first dry film photoresist to UV radiation; remove the mask; photoresist develop the exposed first dry film photoresist to obtain a cavity corresponding to the diced chip; positioning the diced chip inside the cavity; applying a second dry film photoresist to the first film photoresist and the diced chip; and expose and develop the second dry film photoresist applied to the diced chip in accordance with the post processing pattern. |
| US09412724B2 |
Chip-scale packaged LED device
An LED device includes a substrate, a number (N) of flip-chip LED die(s), an electrical conductive structure and a lens structure. The substrate has upper and lower surfaces and is formed with multiple through holes. A ratio of LED die(s) surface area to an area of the upper surface of the substrate ranges from 22.7% to 76.2%. The electrical conductive structure includes a number (N) of upper bonding pad assembly (assemblies), a number (N+1) of lower bonding pads and a number (2N) of interconnectors. Each upper bonding pad assembly includes two upper bonding pads electrically connected to the LED die(s). The interconnectors are disposed in the through holes and interconnect the upper and lower bonding pads. The lens structure covers the LED die(s). |
| US09412723B2 |
Package on-package structures and methods for forming the same
A package includes a package component, which further includes a top surface and a metal pad at the top surface of the package component. The package further includes a non-reflowable electrical connector over and bonded to the metal pad, and a molding material over the package component. The non-reflowable electrical connector is molded in the molding material and in contact with the molding material. The non-reflowable electrical connector has a top surface lower than a top surface of the molding compound. |
| US09412721B2 |
Contactless communications using ferromagnetic material
A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils. |
| US09412719B2 |
3DIC interconnect apparatus and method
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls of the first opening. One or more etch processes form one or more spacer-shaped structures along sidewalls of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug. |
| US09412717B2 |
Apparatus and methods for molded underfills in flip chip packaging
Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed. |
| US09412716B2 |
Semiconductor package and method for manufacturing the same
A method of manufacturing a semiconductor package includes: forming a strip substrate including a plurality of unit substrates, each being provided with a first connection pad and a second connection pad on a first surface of the unit substrate and each unit substrate being electrically and physically isolated from each other with the intervention of saw lines, first ground connection pads formed on the respective unit substrates, each of the first ground connection pads being electrically coupled with the first connection pad over the respective unit substrates, second ground connection pads formed on the saw line on the first surface side of the unit substrates and electrically isolated from the unit substrates, and test wiring formed on the saw line, the test wiring being electrically isolated from the unit substrates and electrically coupled with the second ground connection pads; and attaching semiconductor chips onto the respective unit substrates. |
| US09412714B2 |
Wire bond support structure and microelectronic package including wire bonds therefrom
A microelectronic package may include a substrate having first and second regions, a first surface and a second surface remote from the first surface; at least one microelectronic element overlying the first surface within the first region; electrically conductive elements at the first surface within the second region; a support structure having a third surface and a fourth surface remote from the third surface and overlying the first surface within the second region in which the third surface faces the first surface, second and third electrically conductive elements exposed respectively at the third and fourth surfaces and electrically connected to the conductive elements at the first surface in the first region; and wire bonds defining edge surfaces and having bases electrically connected through ones of the third conductive elements to respective ones of the second conductive elements and ends remote from the support structure and the bases. |
| US09412711B2 |
Electronic device
The present invention provides an electronic device that is able to achieve an improvement in yield or an electronic device that is able to prevent a sealing resin from exfoliating from a sub-electrode. The electronic device is provided with an electronic element and a wire bonded to the electronic element. The electronic element includes a bonding pad to which the wire is bonded. The bonding pad includes a Pd layer that directly contacts the wire. |
| US09412709B2 |
Semiconductor structure with sacrificial anode and passivation layer and method for forming
A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode. |
| US09412707B2 |
Method of manufacturing semiconductor package
Embodiments of the inventive aspect include a method of manufacturing a semiconductor package including a plurality of stacked semiconductor chips in which edges of a semiconductor wafer substrate may be prevented from being damaged or cracked when the semiconductor package is manufactured at a wafer level, while a diameter of a molding element is greater than a diameter of the semiconductor wafer substrate. The molding element may cover a surface of the wafer substrate and the plurality of stacked semiconductor chips. Embodiments may include a wafer level semiconductor package including a circular substrate having a first diameter, a circular passivation layer attached to the circular substrate, the passivation layer having the first diameter, and a circular molding element covering surfaces of the plurality of semiconductor chips, and covering an active area of the substrate. The circular molding element may have a second diameter that is greater than the first diameter. |
| US09412702B2 |
Laser die backside film removal for integrated circuit (IC) packaging
Embodiments of the present disclosure are directed to die adhesive films for integrated circuit (IC) packaging, as well as methods for forming and removing die adhesive films and package assemblies and systems incorporating such die adhesive films. A die adhesive film may be transparent to a first wavelength of light and photoreactive to a second wavelength of light. In some embodiments, the die adhesive film may be applied to a back or “inactive” side of a die, and the die surface may be detectable through the die adhesive film. The die adhesive film may be cured and/or marked with laser energy having the second wavelength of light. The die adhesive film may include a thermochromic dye and/or nanoparticles configured to provide laser mark contrast. UV laser energy may be used to remove the die adhesive film in order to expose underlying features such as TSV pads. |
| US09412699B2 |
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented. |
| US09412696B2 |
Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented. |
| US09412695B1 |
Interconnect structures and methods of fabrication
Methods and interconnect structures for circuit structure transistors are provided. The methods include, for instance: providing one or more fins above a substrate, and an insulating material over the fin(s) and the substrate; providing barrier structures extending into the insulating material, the barrier structures being disposed along opposing sides of the fin(s); exposing a portion of the fin(s) and the barrier structures; and forming an interconnect structure extending over the fin(s), the barrier structures confining the interconnect structure to a defined dimension transverse to the fin(s). Exposing the portion of the fin(s) and barrier structures may include isotropically etching the insulating material with an etchant that selectively etches the insulating material without affecting a barrier material of the barrier structures. |
| US09412693B2 |
Semiconductor device having jumper pattern and blocking pattern
A semiconductor device includes a substrate having a transistor area, a gate structure disposed on the transistor area of the substrate, a first interlayer insulating layer covering the gate structure, a blocking pattern disposed on the first interlayer insulating layer, and a jumper pattern disposed on the blocking pattern. The jumper pattern includes jumper contact plugs vertically penetrating the first interlayer insulating layer to be in contact with the substrate exposed at both sides of the gate structure, and a jumper section configured to electrically connect the jumper contact plugs. |
| US09412691B2 |
Chip carrier with dual-sided chip access and a method for testing a chip using the chip carrier
Disclosed are chip carriers and methods of using them. The chip carriers each comprise a base with a first surface, a second surface opposite the first surface, and wire bond pads on the first and second surfaces. The first surface also has a chip attach area with opening(s) that extends from the first surface to the second surface. A chip can be attached to the chip attach area and, because of the opening(s), wire bond pads on opposite sides (e.g., on the top and bottom) of the chip are accessible for testing. That is, wire bond pads on the first surface can be electrically connected to one side of the chip (e.g., to the top of the chip) and/or wire bond pads on the second surface can be electrically connected through the opening(s) to the opposite side of the chip (e.g., to the bottom of the chip). |
| US09412689B2 |
Semiconductor packaging structure and method
A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections. |
| US09412680B2 |
Semiconductor module and electrically-driven vehicle
A semiconductor module includes a first semiconductor element, a second semiconductor element, a first heat spreader electrically and thermally connected to the first semiconductor element, a second heat spreader electrically and thermally connected to the second semiconductor element, a DCB substrate including a first metal foil on a top surface of a ceramic insulating substrate and including a second metal foil on a bottom surface, the first metal foil being electrically and thermally joined to the first heat spreader and the second heat spreader, and a cooler thermally connected to the second metal foil of the DCB substrate. The first semiconductor element is disposed on an upstream side, and the second semiconductor element is disposed on a downstream side with respect to a flowing direction of a refrigerant of the cooler. An area of the second heat spreader is greater than an area of the first heat spreader. |
| US09412679B1 |
Power semiconductor device
An insulating substrate includes a base portion that is made of metal and serves as a radiating surface, an insulating layer, and a circuit pattern. The insulating substrate has convex warpage in the radiating surface at ambient temperature. A power semiconductor element is mounted on the circuit pattern. A sealing material has a thickness greater than a thickness of the insulating substrate. The sealing material has a linear expansion coefficient greater than a linear expansion coefficient of the insulating substrate in an in-plane direction of a mounting surface of the insulating substrate. A heat conduction layer is located on the radiating surface of the base portion and is solid at ambient temperature and is liquid at a temperature higher than or equal to a phase-change temperature higher than ambient temperature. |
| US09412676B2 |
Ceramic package
A ceramic package includes a package main body which is formed of a ceramic material, which has a front surface and a back surface having a rectangular shape in plan view, and which has a cavity opening toward the front surface; a first metalized layer which has a frame shape in plan view and is formed on the front surface; and a second metalized layer which is formed on the front surface of the first metalized layer so as to assume a frame shape, and which has a width smaller than the width of the first metalized layer, wherein the width of the second metalized layer at each corner portion of the front surface in plan view is smaller than the width of the second metalized layer in a region other than the corner portion in plan view. |
| US09412672B2 |
In situ etch compensate process
A method includes performing an etching on a mask layer to form an opening in the mask layer. The mask layer is a part of a wafer. The method further includes measuring a lateral size of the opening, comparing the lateral size of the opening with a specified range, and performing a compensation etch to compensate for a difference between the lateral size and the specified range. After the compensation etch, a target layer of the wafer is etched to extend the opening into the target layer. |
| US09412667B2 |
Asymmetric high-k dielectric for reducing gate induced drain leakage
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes performing an implant process on a high-k dielectric sidewall of a gate structure. The method further includes performing an oxygen annealing process to grow an oxide region on a drain side of the gate structure, while inhibiting oxide growth on a source side of the gate structure adjacent to a source region. |
| US09412663B1 |
Dies for RFID devices and sensor applications
Deep reactive ion silicon etching of a device wafer, laser-induced release of individual dies, and individual placement of the dies on flexible substrates facilitate formation of circuits having relatively large external inductors for powering devices such as RFID devices. Small flexible tabs enable die-inductor connection. The absorption properties of both an adhesive layer and an ablation layer may be employed to facilitate debonding of individual dies from a glass handler without damaging integrated circuits associated with the dies. Die packs including cavities for accepting individual dies facilitate fabrication processes using dies having small dimensions. |
| US09412662B2 |
Structure and approach to prevent thin wafer crack
A semiconductor structure and a method of manufacture are provided. Devices, such as integrated circuit dies, are mounted on a substrate, such as another die, packaging substrate, interposer, or the like, and recesses are formed in the substrate along the scribe lines. One or more molding compound layers are formed in the recesses and between adjacent dies. A backside thinning process may be performed to expose the molding compound in the recesses. A singulation process is performed in the molding compound layer in the recesses. In an embodiment, a first molding compound layer is formed in the recess, and a second molding compound is formed over the first molding compound layer and between adjacent dies. The devices may be placed on the substrate before or after forming the recesses. |
| US09412658B2 |
Constrained nanosecond laser anneal of metal interconnect structures
In-situ melting and crystallization of sealed cooper wires can be performed by means of laser annealing for a duration of nanoseconds. The intensity of the laser irradiation is selected such that molten copper wets interconnect interfaces, thereby forming an interfacial bonding arrangement that increases specular scattering of electrons. Nanosecond-scale temperature quenching preserves the formed interfacial bonding. At the same time, the fast crystallization process of sealed copper interconnects results in large copper grains, typically larger than 80 nm in lateral dimensions, on average. A typical duration of the annealing process is from about 10's to about 100's of nanoseconds. There is no degradation to interlayer low-k dielectric material despite the high anneal temperature due to ultra short duration that prevents collective motion of atoms within the dielectric material. |
| US09412655B1 |
Forming merged lines in a metallization layer by replacing sacrificial lines with conductive lines
A method includes forming a plurality of sacrificial lines embedded in a first dielectric layer. A line merge opening and a line cut opening are formed in a hard mask layer formed above the first dielectric layer. Portions of the first dielectric layer exposed by the line merge opening are removed to define a line merge recess. A portion of a selected sacrificial line exposed by the line cut opening is removed to define a line cut recess between first and second segments of the selected sacrificial line. A second dielectric layer is formed in the line cut recess. The hard mask is removed. The plurality of sacrificial lines is replaced with a conductive material to define at least one line having third and fourth segments in locations previously occupied by the first and second segments and to define a line-merging conductive structure in the line merge recess. |
| US09412654B1 |
Graphene sacrificial deposition layer on beol copper liner-seed for mitigating queue-time issues between liner and plating step
After forming a copper seed layer on a diffusion barrier layer present on sidewalls and a bottom surface of at least one opening, a graphene sacrificial layer is deposited over the copper seed layer before the copper seed layer is exposed to an environment that oxidizes the copper seed layer, thus providing process flexibility for longer queue times (Q-times) between copper seed layer deposition and copper plating. Next, the graphene sacrificial layer is subjected to a plasma treatment to introduce disorders and defects into the graphene sacrificial layer for removal just before the copper plating. The entire structure is then immersed in a copper plating solution. The copper plating solution dissolves the plasma treated graphene sacrificial layer and forms a copper-containing layer on the re-exposed copper seed layer. |
| US09412652B2 |
Air gap forming techniques based on anodic alumina for interconnect structures
An aluminum (Al) layer is formed over a semiconductor substrate. A selective portion of the Al layer is removed to form openings. The Al layer is anodized to obtain an alumina dielectric layer with a plurality of pores. The openings are filled with a conductive interconnect material. The pores are widened to form air gaps and a top etch stop layer is formed over the alumina dielectric layer. |
| US09412650B2 |
Interconnect structure and method of forming the same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower etch stop layer (ESL); a middle low-k (LK) dielectric layer over the lower ESL; a supporting layer over the middle LK dielectric layer; an upper LK dielectric layer over the supporting layer; an upper conductive feature in the upper LK dielectric layer, wherein the upper conductive feature is through the supporting layer; a gap along an interface of the upper conductive feature and the upper LK dielectric layer; and an upper ESL over the upper LK dielectric layer, the upper conductive feature, and the gap. |
| US09412649B1 |
Method of fabricating semiconductor device
A method for fabricating a semiconductor device includes forming a hard mask (HM) layer over a material layer, forming a first trench in the HM layer, which extends along a first direction. The method also includes forming a first patterned resist layer over the HM layer. The first patterned resist layer has a first opening and a second opening a second direction. The first opening overlaps with the first trench in a middle portion of the first trench and the second opening overlaps with the first trench at an end portion of the first trench. The method also includes etching the HM layer through the first patterned resist layer to form a second trench and a third trench in the HM layer and forming a first feature to fill in a section of the first trench between the second trench and the third trench. |
| US09412644B2 |
Integrated circuit assembly and method of making
A first wafer is provided that includes an insulating layer, a first active layer, and a handle layer. The insulating layer has a first surface and a second surface. The first active layer contacts the first surface of the insulating layer. The handle layer contacts the second surface of the insulating layer. A second wafer is provided that includes a substrate and a second active layer. The substrate has a first surface and a second surface. The second active layer contacts the first surface of the substrate. The second wafer is bonded to the first wafer by physically connecting the first active layer to the second surface of the substrate. The handle layer is removed. A metal bond pad is formed on the second surface of the insulating layer. The metal bond pad is electrically connected to the first active layer. |
| US09412642B2 |
Semiconductor device, module and system each including the same, and method for manufacturing the semiconductor device
A barrier for preventing a bridge between adjacent storage node contacts is formed below a bit line located between the bit line contacts, so that a contact region between each storage node contact and an active region is increased in size. The semiconductor device includes a device isolation film defining an active region, a bit line contact coupling the active region to a bit line, and a barrier formed below the bit line located between the bit line contacts. |
| US09412634B2 |
Atmosphere replacement apparatus, substrate transport apparatus, substrate transport system, and EFEM
The present invention provides an atmosphere replacement apparatus capable of replacing the atmosphere on the surface of a wafer with a small amount of gas. The apparatus is configured to have a cover capable of facing and covering the wafer to be transported, and a gas supply means that supplies gas having properties different from a surrounding atmosphere from the cover, and replaces the atmosphere on the surface of the wafer by the gas. |
| US09412626B2 |
Method for manufacturing a chip arrangement
A method for manufacturing a chip arrangement, including disposing a chip over a carrier, wherein the bottom side of the chip is electrically connected to the first carrier side via one or more contact pads on the chip bottom side, disposing a first encapsulation material over the first carrier side, wherein the first encapsulation material at least partially surrounds the chip, and disposing a second encapsulation material over a second carrier side, wherein the second encapsulation material is in direct contact with the second carrier side. |
| US09412625B2 |
Molded insulator in package assembly
Embodiments of the present disclosure describe techniques and configurations for package assembly including an embedded element and a molded insulator material. In some embodiments, an apparatus includes an electrical element (such as a die or a bridge interconnect structure) positioned on a surface of an insulator layer, a conductive pad positioned on the surface of the insulator layer and spaced apart from the electrical element, and a molded insulator material disposed on the surface of the insulator layer adjacent to the electrical element and on the conductive pad. Other embodiments may be described and/or claimed. |
| US09412622B2 |
Epitaxial silicon wafer and method for manufacturing same
An epitaxial silicon wafer cut from a silicon single crystal grown by the Czochralski method, and having a diameter of 300 mm or more. In this epitaxial silicon wafer, the time required to cool every part of the silicon single crystal during the growth from 800° C. down to 600° C. is set to 450 minutes or less, the interstitial oxygen concentration is from 1.5×1018 to 2.2×1018 atoms/cm3 (old ASTM standard), the entire surface of the cut silicon wafer is composed of a COP region, and the BMD density in the bulk of the epitaxial wafer after a heat treatment at 1000° C. for 16 hours is 1×104/cm2 or less. In this epitaxial silicon wafer, even if the thermal process in a semiconductor device fabrication process is a low temperature thermal process, epitaxial defects do not occur, as well as sufficient gettering capability being obtainable. |
| US09412620B2 |
Three-dimensional integrated circuit device fabrication including wafer scale membrane
Method and Apparatus so configured for the fabrication of three-dimensional integrated devices. A crystalline substrate within an area of a donor semiconductor wafer is etched. The substrate side is located opposite a device layer and has a buried insulating layer and a substrate thickness. The etching removes at least a substantial portion of the crystalline substrate within the area such that the device layer and the buried insulating layer in the area is to conform to a pattern specific topology on an acceptor surface. The donor semiconductor wafer is supported with a supporting structure that allows the donor semiconductor wafer to flexibly conform to the pattern specific topology within at least a portion of the area after the etching to enable conformality and reliable bonding to the device surfaces of an acceptor wafer to form a three dimensional integrated device. |
| US09412615B2 |
Patterning method and semiconductor structure including forming a plurality of holes using line pattern masks
A patterning method is provided. A substrate including a material layer thereon is provided. A patterned hard mask layer, having a plurality of first holes, is formed on the material layer. Afterward, a mask layer, including a plurality of line pattern masks extending in a direction and dividing each first hole into a second hole and a third hole, is formed. The material layer is patterned using the patterned hard mask layer and the mask layer as masks to form a patterned material layer having a plurality of fourth and fifth holes. Furthermore, a semiconductor structure is provided. |
| US09412612B2 |
Method of forming semiconductor device
A method of forming a semiconductor device is disclosed. A substrate having a first area and a second area is provided. A target layer and a hard mask layer are sequentially formed on the substrate in the first area and in the second area. Transfer patterns are formed in a spacer form on the hard mask layer in the first area. A photoresist layer is formed directly on the hard mask layer, and covers the transfer patterns and the hard mask layer in the first area and in the second area. The photoresist layer in the first area is removed. The hard mask layer is patterned by using the transfer patterns as a mask. |
| US09412609B1 |
Highly selective oxygen free silicon nitride etch
A method for selectively etching silicon nitride with respect to silicon oxide is provided. An oxygen free silicon nitride etch gas comprising H2 and either CF4 or CXHYFZ (X≧1, Y≧1, Z≧1) is provided. An RF power is provided to form the etch gas into a plasma, wherein the silicon nitride is exposed to the plasma. |
| US09412602B2 |
Deposition of smooth metal nitride films
In one aspect, methods of forming smooth ternary metal nitride films, such as TixWyNz films, are provided. In some embodiments, the films are formed by an ALD process comprising multiple super-cycles, each super-cycle comprising two deposition sub-cycles. In one sub-cycle a metal nitride, such as TiN is deposited, for example from TiCl4 and NH3, and in the other sub-cycle an elemental metal, such as W, is deposited, for example from WF6 and Si2H6. The ratio of the numbers of each sub-cycle carried out within each super-cycle can be selected to achieve a film of the desired composition and having desired properties. |
| US09412592B2 |
Imprint mask, method for manufacturing the same, and method for manufacturing semiconductor device
According to one embodiment, an imprint mask includes a quartz plate. The quartz plate has a plurality of concave sections formed in part of an upper surface on the quartz plate, and impurities are contained in a portion between the concave sections in the quartz plate. |
| US09412587B2 |
Method of manufacturing semiconductor device, substrate processing apparatus, gas supply system, and recording medium
A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film. |
| US09412582B2 |
Reaction tube, substrate processing apparatus, and method of manufacturing semiconductor device
A structure for constituting a process chamber in which a plurality of substrates is processed by reacting a predetermined precursor gas therein includes an outer tube having a cylindrical shape with an upper end portion closed and a lower end portion opened, and an inner tube, installed within the outer tube, including a first exhaust slit and a second exhaust slit through which the predetermined precursor gas is exhausted, the first exhaust slit located in a substrate arrangement region in which the plurality of substrates are arranged, and the second exhaust slit located in a region lower than the substrate arrangement region. |
| US09412580B2 |
Methods for forming group III-nitride materials and structures formed by such methods
Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer. |
| US09412579B2 |
Methods and apparatus for controlling substrate uniformity
A dynamically tunable process kit, a processing chamber having a dynamically tunable process kit, and a method for processing a substrate using a dynamically tunable process kit are provided. The dynamically tunable process kit allows one or both of the electrical and thermal state of the process kit to be changed without changing the physical construction of the process kit, thereby allowing plasma properties, and hence processing results, to be easily changed without replacing the process kit. The processing chamber having a dynamically tunable process kit includes a chamber body that includes a portion of a conductive side wall configured to be electrically controlled, and a process kit. The processing chamber includes a first control system operable to control one or both of an electrical and thermal state of the process kit and a second control system operable to control an electrical state of the portion of the side wall. |
| US09412576B2 |
Ion trap mass spectrometer using cold electron source
The present invention relates to an ion trap mass spectrometer using a cold electron source, in a production of a portable mass spectrometer, in which a microchannel plate (MCP) module is used, initial electrons are induced by injecting ultraviolet photons emitted from an ultraviolet diode to a front surface of the MCP module, electron beams amplified from the electrons are amplified using a channeltron electron multiplier (CEM), the amplified electron beams are accurately adjusted and injected into an ion trap, thus increasing the amplification rate, and since a quadrupole field is used as an ion filter which returns the initially injected electrons to the inside of an ion trap mass separator, the ionization rate increases. |
| US09412574B2 |
Parallel elemental and molecular mass spectrometry analysis with laser ablation sampling
An apparatus for mass spectrometry includes a laser ablation sampler comprising a laser ablation chamber and a laser which produces a laser beam. The laser irradiates and ablates a material from a sample placed within the laser ablation chamber so as to generate an ablated sample material. A transfer tube system comprising transfer tubes connect the laser ablation sample with, and provides a parallel and simultaneous transport of the ablated sample material to, each of a soft and a hard ionization source. The soft and hard ionization sources interact with the ablated sample material to respectively generate ion populations having a mass-to-charge ratio distribution. These respective mass-to-charge ratio distributions are respectively transmitted to a molecular mass spectrometer and to an elemental mass spectrometer which provide information on the mass-to-charge ratio distribution. The mass-to-charge ratio distributions are used to characterize a composition of the ablated sample material. |
| US09412573B2 |
Method and apparatus for extraction, detection, and characterization of vapors from explosives, taggants in explosives, controlled substances, and biohazards
An improved method of extraction, detection, and characterization of a vapor from an explosive, a taggant in an explosive, a controlled substance, a biohazard, and mixtures thereof uses a new and improved SPME device for extraction and ion mobility spectrometry for detection and characterization. The new and improved SPME device has an increased capacity to sorb a target vapor. The increased sorption of vapor provides for more accurate detection by an ion mobility spectrometer. A SPME device having increased surface area may be exposed to an atmosphere in an enclosure containing a test object or a volume of gas that was in contact with the test object to allow for sorption of the target vapor and then introduced into an IMS for more accurate detection and characterization of the vapor due to the increased sorption of the vapor by the SPME device described herein. |
| US09412570B2 |
Mass spectrometer
A hardware module which operatively carries out a method of compressing mass spectral data, the method comprising: receiving a first signal output from an ion detector of a mass spectrometer; processing the first signal to a digital signal at an output being data frame types representative of the first signal output; temporarily storing the data frame types in a memory block and reading a data frame from the memory block and determining its data frame type and according to its data frame type compressing the data frame according to one or more compression algorithms to generate a compressed data output stream. |
| US09412566B2 |
Methods and apparatus for depositing and/or etching material on a substrate
Methods are disclosed for depositing material onto and/or etching material from a substrate in a surface processing tool having a processing chamber, a controller and one or more devices for adjusting the process parameters within the chamber. The method comprises: the controller instructing the one or more devices according to a series of control steps, each control step specifying a defined set of process parameters that the one or more devices are instructed to implement, wherein at least one of the control steps comprises the controller instructing the one or more devices to implement a defined set of constant process parameters for the duration of the step, including at least a chamber pressure and gas flow rate through the chamber, which duration is less than the corresponding gas residence time (Tgr) of the processing chamber for the step. |
| US09412565B2 |
Temperature measuring method and plasma processing system
A temperature measuring method for measuring a temperature of a member corresponding to a measuring object arranged within a chamber of a plasma processing apparatus is provided. The temperature measuring method involves obtaining a function (f) for correcting a correction target temperature (Tmeas) according to a measurement window temperature (Tw), the function (f) being computed based on the correction target temperature (Tmeas) corresponding to a temperature of the measuring object measured via a measurement window arranged at the chamber, a reference temperature (Tobj) corresponding to a temperature of the measuring object measured without using the measurement window, and the measurement window temperature (Tw) corresponding to a temperature of the measurement window. The temperature measuring method further involves measuring the correction target temperature (Tmeas), measuring the measurement window temperature (Tw), and correcting the correction target temperature (Tmeas) according to the measurement window temperature (Tw) based on the obtained function (f). |
| US09412559B2 |
Automated slice milling for viewing a feature
A method and apparatus for performing a slice and view technique with a dual beam system. The feature of interest in an image of a sample is located by machine vision, and the area to be milled and imaged in a subsequent slice and view iteration is determined through analysis of data gathered by the machine vision at least in part. A determined milling area may be represented as a bounding box around a feature, which dimensions can be changed in accordance with the analysis step. The FIB is then adjusted accordingly to slice and mill a new face in the subsequent slice and view iteration, and the SEM images the new face. Because the present invention accurately locates the feature and determines an appropriate size of area to mill and image, efficiency is increased by preventing the unnecessary milling of substrate that does not contain the feature of interest. |
| US09412558B2 |
High-resolution amplitude contrast imaging
A method for performing high resolution electron microscopy of a soft matter object is described. The method comprises irradiating a soft matter object using an electron microscope having a spherical aberration correction with a substantially constant transfer function in a frequency band of thermal diffuse scattered electrons scattered at the soft matter object. The method comprises detecting the thermal diffuse scattered (TDS) electrons scattered at the soft matter, and using the detected thermal diffuse scattered electrons for deriving therefrom an image of the soft matter object. |
| US09412555B2 |
Lower electrode assembly of plasma processing chamber
A lower electrode assembly for use in a plasma processing chamber comprises a metal base and upper and lower edge rings. The metal base comprises metal plates brazed together and forming a brazed line on a lower side surface of the base, an edge ring support surface extending horizontally inwardly from the lower side surface and an upper side surface above the edge ring support surface. The upper edge ring comprises a lower surface mounted on the edge ring support surface and the lower edge ring surrounds the lower side surface of the base with a gap between opposed surfaces of the upper and lower edge rings and between the lower edge ring and the outer periphery of the base. The gap has an aspect ratio of total gap length to average gap width sufficient to impede arcing at the location of the braze line. |
| US09412554B2 |
Anode for an X-ray tube of a differential phase contrast imaging apparatus
An Anode for an X-ray tube, comprising an anode disk comprising a circular focal track region being adapted to, upon impact of accelerated electrons, emit X-rays in an emission direction transverse to an impacting direction of the electrons; a ring-like modulating absorption grid; wherein the modulating absorption grid encloses the focal track region; wherein the modulating absorption grid comprises wall portions of X-ray absorbing material, the wall portions being arranged such as to absorb X-rays emitted from the focal track region in the emission direction; wherein the modulating absorption grid comprises slits between neighboring wall portions, the slits being arranged along a circumferential direction of the modulating absorption grid at spacings (s) of less than 100 μm and the slits having a width (ws) in the circumferential direction of less than 50 μm. |
| US09412552B2 |
Multi-source radiation generating apparatus and radiographic imaging system
In a multi-source radiation generating apparatus including a plurality of combinations of a cathode and a target, an extraction electrode is disposed for a plurality of cathodes in common. When a potential of the extraction electrode is constant, potentials for the cathodes are selectively switched between a cutoff potential which is higher than the potential of the extraction electrode and an emission potential which is lower than the potential of the extraction electrode. |
| US09412550B2 |
Electron beam device, a getter sheet and a method of manufacturing an electron beam device provided with said getter sheet
An electron beam device has a body provided with an exit window, said body is forming or is at least partly forming a vacuum chamber, the vacuum chamber comprising therein a cathode housing and at least one electron generating filament. At least one getter sheet is provided between the cathode housing and the filament. The invention is further comprising a getter sheet for use in an electron beam device and a method of manufacturing an electron beam device comprising at least one getter sheet. |
| US09412549B2 |
Electromagnetically enhanced contact separation in a circuit breaker
Various embodiments of a circuit breaker are described where a movable bridge connector is employed as part of the conductive path when the circuit breaker is in a closed configuration. When the circuit is opened, the connector is displaced from the two fixed contacts otherwise bridged by the connector. In one such embodiment, the circuit breaker utilizes the electromagnetic forces generated in response to the opening event to break the circuit. |
| US09412546B2 |
Control unit for circuit breaker and controlling method thereof
Disclosed are a control unit for a circuit breaker capable of controlling and monitoring various types of switches such as a circuit breaker and a switchgear included in power system equipment, by being attached to the switches or by being implemented in the form of an independent module, and a controlling method thereof. The control unit for a circuit breaker, which interworks with a relay and a circuit breaker, includes: an Ethernet drive configured to receive a GOOSE message type control signal from the relay connected thereto through Ethernet communication; a control module configured to operate the circuit breaker based on the GOOSE message type control signal; and a main control unit (MCU) module configured to transmit the GOOSE message type control signal to the control module, if the received GOOSE message type control signal is related to the control unit. |
| US09412543B2 |
ARC energy absorber
A device for cooling exhaust gases caused by an electrical arc in high or medium voltage switch gear, which device comprises a housing with an inlet and an outlet for passage of the gases, wherein a hydrous mineral is arranged in the housing for cooling the gases with the water contained in the hydrous mineral. |
| US09412538B2 |
Rotary operation type electronic component
An easy-to-design rotary operation type electronic component is provided. The component includes a columnar control shaft; a shaft supporter having a circular through shaft hole; an electrical signal control section which is attached to one end of the shaft supporter and allows an electrical signal to be controlled by rotary operation of the control shaft; and a cylindrical spring which is held in a spring holding space formed between the outer periphery of the control shaft and the inner periphery of the through shaft hole, and has a ring shape with an opening cut in the direction of the central axis. The cylindrical spring includes a plurality of leaf spring portions which extend in the direction of the central axis of the control shaft, are connected together in the circumferential direction of the control shaft, and are arranged on the outer periphery of the control shaft. |
| US09412534B2 |
Pushbutton compact component
A pushbutton compact component is shown, including an actuating button having a basic body, on which at least one guide projection is arranged, and a sleeve, in which a locking slide is arranged by way of a spring element. In an embodiment, the guide projection engages the locking slide such that the locking slide is positioned in the sleeve under spring pressure. |
| US09412533B2 |
Low travel switch assembly
A low travel switch assembly and systems and methods for using the same are disclosed. The low travel dome may include a domed surface having upper and lower portions, and a set of tuning members integrated within the domed surface between the upper and lower portions. The tuning members may be operative to control a force-displacement curve characteristic of the low travel dome. |
| US09412529B2 |
Clasping connection structure of contactor
A clasping connection structure of a contactor is disclosed, including a base, a housing and a bobbin; accommodating chambers is formed on the housing and configured to accommodate contact head therein, the accommodating chambers are separated via a side plate, the bobbin and the housing are connected via a first clasp, the first clasp is protruded and extended at a central side plate of the housing, the central side plate is located at an axial center line of the housing, correspondingly, a limiting slot for matching with the central side plate is formed on the bobbin, the bobbin is inserted in the housing, the central side plate passes through the limiting slot, the clasp of the central side plate is hooked on the bobbin at a side of the limiting slot, to connect the bobbin and the housing, the housing and the base are connected via a second clasp. The contactor of the invention is adapted to the automatic assembling, and has reduced manufacturing cost. |
| US09412528B2 |
Switch structure
A switch structure connectable with both bare lead and flat-head terminal lead. The switch structure includes a main body formed with at least one cavity. A retainer member and a conductive metal member are arranged in the cavity for pressing the terminal lead into electrical connection with the conductive metal member. A reciprocally movable carrier body is assembled with the retainer member. The carrier body has an arm assembled with an elastic member. A restriction body is disposed in the cavity. The restriction body is formed with a chamber for receiving the arm and the elastic member of the carrier body. The restriction body restricts the moving direction or distance of the carrier body to increase the structural strength of the switch structure and enhance the lead locking ability of the switch structure. |
| US09412525B2 |
Anode foils for electrolytic capacitors and methods for making same
Anode foils suitable for use in electrolytic capacitors, including those having multiple anode configurations, have improved strength, reduced brittleness, and increased capacitance compared to conventional anode foils for electrolytic capacitors. Exemplary methods of manufacturing an anode foil suitable for use in an electrolytic capacitor include disposing a resist material in a predetermined pattern on an exposed surface of an anode foil substrate such that a first portion of the exposed surface of the anode foil substrate is covered by the resist material, and a second portion of the exposed surface remains uncovered; polymerizing the resist material; exposing at least the second portion of the exposed surface to one or more etchants so as to form a plurality of tunnels; stripping the polymerized resist material; and widening at least a portion of the plurality of tunnels. The resist material may be deposited, for example, by ink-jet printing, stamping or screen printing. |
| US09412517B2 |
Electronic part
An electronic part that includes an electronic part main body and an external electrode on the surface of the electronic part main body. The external electrode includes at least one alloy layer selected from among a Cu—Ni alloy layer and a Cu—Mn alloy layer, and a Sn-containing layer on the outer side of the alloy layer. The Sn-containing layer is the outermost layer of the external electrode. The Sn-containing layer is in contact with the alloy layer. |
| US09412512B2 |
Inductive charging
There is provided a method including transmitting inductively a first signal, receiving inductively a second signal in response to the first signal, determining whether the inductively received signal includes a modulation, and adjusting a power of the transmitted signal on the basis of a modulation of the received signal. |
| US09412500B2 |
Electrostatic coating cable maintenance device
A time period required for replacement work of a divided cable is shortened. An electrostatic coating cable (6) includes a power supply line (12) that supplies power to a high voltage generator (2), a signal line (14) that controls the high voltage generator (2), and a ground line (16). The power supply line (12) and the ground line (16) are connected by a first inspection line (18), the signal line (14) and the ground wire (16) are connected by a second inspection line (20), a first diode (22) is interposed in the first inspection line (18), and a second diode (24) is interposed in the second inspection line (20). The first and the second diodes (22) and (24) inhibit a current from flowing through the first and the second inspection lines (18) and (20) during an operation of the electrostatic coater (1). The first and the second inspection lines (18) and (20) and the first and the second diodes (22) and (24) are contained in a cable connecting section (8) that connects divided cables (10) adjacent to each other. During stoppage of the electrostatic coater (1), a voltage for inspection is applied to the ground line (16). |
| US09412498B2 |
Electric cable, in particular a data transmission cable, equipped with multi-layer strip-type screening sheet
An electric cable, in particular a data transmission cable, includes at least one line, in particular several twisted-pair lines, a screening sheet for the at least one line which screening sheet includes at least one substrate layer of a plastic material and at least one screening layer of an electrically conductive material, in particular metal, which the substrate layer is lined with, wherein the screening layer being provided with spacing gaps for electrical interruption thereof in a longitudinal strip direction, with the spacing gaps extending crosswise of the longitudinal strip direction and recurring at longitudinal intervals, an external envelope of an insulating material, and a semi-conductive shielding layer arranged between the screening sheet and the external envelope. |
| US09412496B2 |
Cable assembly for a cable backplane system
A cable assembly for a cable backplane system includes a tray having a frame and spacer assemblies coupled to the frame that hold cable tray connectors in fixed positions relative to the frame. Each cable tray connector has a housing holding a plurality of contacts and cables extending rearward from the corresponding housing. The housings are configured to be received in corresponding openings in a backplane of the cable backplane system. A flexible cable harness extends from the tray. The flexible cable harness has a flexible shield electrically coupled to the frame and a harness connector electrically connected to at least one corresponding cable tray connector. At least some of the cables are routed from the tray through the flexible shield to the harness connector. The flexible shield provides electrical shielding for the cables. The harness connector is variably positionable relative to the tray. |
| US09412494B2 |
Electrical-wire-protecting member
A electrical wire cover has a corrugated tube fixing portion (29) and engagement projection strips (49) which are integral parts of a cover body (27) which surrounds electrical wires, a electrical wire tie which fixes, that is, tightly fastens, one of first to third corrugated tubes, and tying member restricting portions (53) provided in the corrugated tube fixing portion (29). Each tying member restricting portion (53) has plural, that is, first to third, positioning portions (55, 57, and 59) having different electrical wire tie bridging positions. |
| US09412488B2 |
Electric cable
To provide an electric cable that can satisfy flame retardancy and battery fluid resistance in the CHFUS region provided in ISO 6722 and also satisfy wear resistance and low-temperature impact property by using a halogen-containing flame retardant. An electric cable in which a coat layer is formed of a resin composition that includes (A) 55 to 85 parts by mass of a polypropylene homopolymer, (B) 5 to 20 parts by mass of a polypropylene-based modified resin, (C) 5 to 20 parts by mass of a polyolefin-based copolymer, and (D) 5 to 15 parts by mass of a modified olefin-based elastomer, respectively and further includes 1 to 45 parts by mass of a metal hydroxide and 10 to 80 parts by mass of a halogen-containing flame retardant based on 100 parts by mass of the resins (A), (B), (C), and (D) in total. |
| US09412482B2 |
Cu-Ni-Co-Si based copper alloy sheet material and method for producing the same
A Cu—Ni—Co—Si based copper alloy sheet material has second phase particles existing in a matrix, with a number density of ultrafine second phase particles is 1.0×109 number/mm2 or more. A number density of fine second phase particles is not more than 5.0×107 number/mm2. A number density of coarse second phase particles is 1.0×105 number/mm2 or more and not more than 1.0×106 number/mm2. The material has crystal orientation satisfying the following equation (1): I{200}/I0{200}≧3.0 (1) wherein I{200} represents an integrated intensity of an X-ray diffraction peak of the {200} crystal plane on the sheet material sheet surface; and I0{200} represents an integrated intensity of an X-ray diffraction peak of the {200} crystal plane in a pure copper standard powder sample. |
| US09412478B2 |
Method for removing the 137Cs from polluted EAF dusts
The present invention refers to a method and related plants for removing, by means of redox reactions, the 137Cs from polluted EAF dusts, with an initial average value of radioactivity concentration either higher or lower than 10,000 Bq/kg, the decontamination from the 137Cs initially present in the EAF dusts having a yield of 98%-100%; the present invention also refers to the use of chemical-physical destabilization agents, by means of redox reactions, for obtaining EAF dusts decontaminated from 137Cs. |
| US09412476B2 |
Systems, devices, methods, and compositions including fluidized x-ray shielding compositions
Systems, devices, methods, and compositions are described for providing an x-ray shielding system including a flexible layer including a support structure having a plurality of interconnected interstitial spaces that provide a circulation network for an x-ray shielding fluid composition. |
| US09412470B2 |
Memory device
A memory device including: a memory cell array including normal memory cells and spare memory cells arranged in rows and columns including normal columns including the normal memory cells and at least one spare column including spare memory cells, a segment match determining circuit configured to compare a segment address with row address information corresponding to a failed segment and to generate a load control signal, and a column match determining circuit configured to compare column address information corresponding to a failed column in response to the load control signal with a column address and to generate a column address replacement control signal, wherein the memory cells connected to fail columns of the fail segment are replaced with memory cells connected to columns of the spare memory cells in response to the column address replacement control signal. |
| US09412469B1 |
Weak bit detection using on-die voltage modulation
Methods and apparatuses for performing a disturb test on a memory are disclosed. Circuitry may be configured to store test data into one or more data storage cells. A regulation circuit may adjust a level of a power supply coupled to the one or more data storage cells from a first level to a second level. Once the voltage level of the power supply has reached the second level, the circuitry may perform a read operation on the one or more data storage cells. Upon completion of the read operation, the regulation circuit may return the voltage level of the power supply to the first level, and the circuitry may perform another read operation, the results of which, the circuitry may compare to the test data. |
| US09412466B2 |
Approximate multi-level cell memory operations
The present technology relaxes the precision (or full data-correctness-guarantees) requirements in memory operations, such as writing or reading, of MLC memories so that an application may write and read a digital data value as an approximate value. Types of MLCs include Flash MLC and MLC Phase Change Memory (PCM) as well as other resistive technologies. Many software applications may not need the accuracy or precision typically used to store and read data values. For example, an application may render an image on a relatively low resolution display and may not need an accurate data value for each pixel. By relaxing the precision or correctness requirements is a memory operation, MLC memories may have increased performance, lifetime, density, and/or energy efficiency. |
| US09412464B2 |
Semiconductor memory device and memory module having reconfiguration rejecting function
A semiconductor memory device and a memory module have a reconfiguration preventing function. The semiconductor memory device may include a memory cell array, a test information storing unit, and a control unit. The control unit may include a control signal storing unit and may prevent programming of the test information storing unit according to a control signal stored in the control signal storing unit. |
| US09412462B2 |
3D stacked memory array and method for determining threshold voltages of string selection transistors
This invention provides 3D stacked memory arrays and methods for determining threshold voltages of string selection transistors by LSMP (layer selection by multi-level permutation) for enabling to select layers regardless of the number or as many as possible by the limited numbers of threshold voltage states and SSLs. Thus, this invention enables to maximize the degree of integrity of memory by minimizing the number of SSLs and to select layers with no limitation of the number by considering a recent aspect ratio of the semiconductor etching process. |
| US09412459B2 |
Semiconductor device
A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section. Assuming that the thickness of a gate insulating film of the second transistor section is defined as tc and the thickness of a gate insulating film of the first transistor section is defined as tm, they have a relationship of tc |
| US09412454B2 |
Semiconductor memory device and method for driving the same
According to one embodiment, a semiconductor memory device includes: semiconductor member; electrode member; charge accumulation member; a memory unit; and a control unit. Memory cell is formed at each crossing portion of the semiconductor member and the electrode member. The memory unit retains information indicating that the memory cell belongs to first group or second group. The control unit performs first step and second step, when reducing the charge accumulated in the charge accumulation member. In the first step, first voltage is applied both between the semiconductor member and the electrode member of the first group and between the semiconductor member and the electrode member of the second group. In the second step, second voltage is applied between the semiconductor member and the electrode member constituting the memory cell belonging to the second group. |
| US09412453B2 |
Memory system and method of determining a failure in the memory system
An operating method of a memory system which includes a nonvolatile memory device including memory cells connected to a plurality of word lines, the operating method including pre-charging a selected one of the plurality of word lines; detecting a variation in a voltage or a current on the selected word line after the selected word line is floated; generating runtime failure information according to the detected variation; and determining a state of the selected word line or a state of a memory block including the selected word line, based on the runtime failure information. |
| US09412445B1 |
Resistive memory apparatus and reading method thereof
A resistive memory apparatus and a reading method thereof are provided. In this method, two reading pulses are applied to a resistive memory cell, such that a first reading resistance and a second reading resistance of the resistive memory cell at different temperatures are sequentially obtained. Next, a resistive state of the second reading resistance is determined according to the reading resistances and the temperatures corresponding to the reading resistances. Thereafter, a logic level of storage data of the resistive memory cell is determined according to the resistive state of the second reading resistance. |
| US09412442B2 |
Methods for forming a nanowire and apparatus thereof
A system that incorporates teachings of the subject disclosure may include, for example, a method for depositing a first material that substantially covers a nanoheater, applying a signal to the nanoheater to remove a first portion of the first material covering the nanoheater to form a trench aligned with the nanoheater, depositing a second material in the trench, and removing a second portion of the first material and a portion of the second material to form a nanowire comprising a remaining portion of the second material covering the nanoheater along the trench. Additional embodiments are disclosed. |
| US09412441B2 |
Semiconductor memory device
A semiconductor memory device includes a cell string including dummy memory cells and a plurality of memory cells in which n bit data is stored, and a peripherial circuit configured to store the n bit data in first memory cells, among the memory cells, store n−1 bit data in the rest of second memory cells, and store data which is not stored in the second memory cells in at least one of the dummy memory cells, among the dummy memory cells. |
| US09412437B2 |
SRAM with buffered-read bit cells and its testing
An SRAM with buffered-read bit cells is disclosed (FIGS. 1-6). The integrated circuit includes a plurality of memory cells (102). Each memory cell has a plurality of transistors (200, 202). A first memory cell (FIG. 2) is arranged to store a data signal in response to an active write word line (WWL) and to produce the data signal in response to an active read word line (RWL). A test circuit (104) formed on the integrated circuit is operable to test current and voltage characteristics of each transistor of the plurality of transistors of the first memory cell (FIGS. 7-10). |
| US09412436B1 |
Memory elements with soft error upset immunity
Memory elements are provided that exhibit immunity to soft error upset events when subjected to radiation strikes such as high-energy atomic particle strikes. Each memory element may each have four inverter-like transistor pairs that form a bistable element, a pair of address transistors, and a pair of relatively weak transistors connected between two of the inverters that create a common output node which is resistant to rapid changes to its state. The transistors may be connected in a pattern that forms a bistable memory element that is resistant to soft error upset events due to radiation strikes. Data may be loaded into and read out of the memory element using the address transistor pair. |
| US09412433B2 |
Counter based design for temperature controlled refresh
A DRAM includes: a temperature sensor for monitoring a temperature operating condition of the DRAM; and a binary counter coupled to the temperature sensor, for receiving external commands to perform a refresh operation, and incrementing a count upon each received external command, wherein the refresh operation will be selectively skipped according to a value of the binary counter. The binary counter is activated to a first mode when the temperature sensor determines the temperature operating condition of the DRAM goes below a first threshold and activated to a second mode when the temperature sensor determines the temperature operating condition of the DRAM goes below a second threshold lower than the first threshold. |
| US09412426B2 |
Electronic apparatus and method for memory control
An electronic apparatus having plural memories of different performances such as bus widths facilitates achievement of its potential as a system. The electronic apparatus has a first memory and a memory controller configured to control the first memory. Upon a second memory being detected, the memory controller compares bus widths of the first memory and the second memory with each other. Upon the bus width of the second memory being broader than the bus width of the first memory, the memory controller makes a setting such that access to the second memory precedes access to the first memory. |
| US09412425B2 |
Device and method for improving reading speed of memory
A memory device includes a plurality of sense amplifiers coupled with an array of memory cells, a plurality of output data lines receiving outputs of corresponding sense amplifiers, and a plurality of precharge circuits configured to apply a precharge voltage on the output data lines. A controller provides control signals to the sense amplifiers and to the precharge circuits, including to cause the precharge circuits to precharge the output data lines before the sense amplifiers drive output data signals to the output data lines. The plurality of sense amplifiers includes banks of sense amplifiers, and each bank includes a sense amplifier having an output driving each output data line. The memory device includes data output multiplexers having inputs coupled to the output data lines, and the precharge circuits are coupled to the output data lines between outputs of the sense amplifiers and the data output multiplexers. |
| US09412423B2 |
Memory modules including plural memory devices arranged in rows and module resistor units
A memory module includes a command/address (CA) register, memory devices, and a module resistor unit mounted on a circuit board. The centrally disposed CA register drive the memory devices one or more internal CA signal(s) to arrangements of memory devices using multiple CA transmission lines, wherein the multiple internal CA transmission lines are commonly terminated in the module resistor unit. |
| US09412421B2 |
Memory arrays
Some embodiments include memory arrays. The memory arrays can have global bitlines extending along a first horizontal direction, vertical local bitlines extending perpendicularly from the global bitlines, and wordlines extending along a second horizontal direction which is perpendicular to the first horizontal direction. The global bitlines may be subdivided into a first series at a first elevational level, and a second series at a second elevational level which is different from the first elevational level. The global bitlines of the first series can alternate with the global bitlines of the second series. There can be memory cell material directly between the wordlines and the vertical local bitlines. The memory cell material may form a plurality of memory cells uniquely addressed by wordline/global bitline combinations. Some embodiments include cross-point memory cell units that have areas of about 2F2. |
| US09412415B2 |
Content synchronization system, content-synchronization control device, and content playback device
When long polling is employed under HTTP, a content-synchronization control device can control each content playback device so that content control is synchronized in multiple content playback devices. When receiving an inquiry from a content playback device 90, the response control means 84 waits transmission of an inquiry response in reply to the inquiry for a certain period of time since reception of the inquiry, and when the waiting state of the transmission of an inquiry response is cancelled, the waiting state of transmission of all the inquiry responses are cancelled. After the reception of the request information, the response control means 84 cancels the waiting state of the transmission of each inquiry response when a condition that the transmission of each inquiry response to each content playback device is kept waiting is satisfied. |
| US09412410B1 |
Track-dependent decoding
In one embodiment, a tape drive includes a magnetic head having a plurality of read sensors, each read sensor being configured to read data simultaneously, a controller, and logic integrated with and/or executable by the controller. The logic is configured to read, using the plurality of read sensors, encoded data from a plurality of tracks of a magnetic tape medium simultaneously. The logic is also configured to perform track-dependent erasure decoding on the encoded data based on detection of one or more time-varying signal quality issues associated with at least one of the plurality of tracks read simultaneously from the magnetic tape medium. |
| US09412409B2 |
Controlling a tape speed to manage a tape drive buffer
Provided are a storage device, method, and program for controlling a tape speed to manage a tape drive buffer. A tape speed is increased from a current tape speed to a target tape speed on a predetermined speed-change timing to control the reading or writing of data between the buffer and the tape medium. |
| US09412407B2 |
Multi-stack optical storage medium
The invention relates to an optical storage medium comprising below an entrance face (EF) a higher recording stack (ST0) comprising a higher recording layer (L0) and at least a lower recording stack (ST1), said lower recording stack (ST1) being recorded or read back by a radiation beam (4) entering into the optical storage medium through the entrance face (EF) with a wavelength (λ), focused on said lower recording stack (ST1) and transmitted through the higher recording stack (ST0), a recording of the higher recording layer (L0) causing an optical thickness variation between recorded and unrecorded areas of said first recording layer (L0), which is included into the range [0.03λ, 0.125λ]. |
| US09412406B2 |
Tracking control device, tracking control method, and optical disc apparatus
A tracking control device includes a signal detector that detects a tracking error signal, and a crossing direction, a crossing period and a crossing velocity of an objective lens from a detection signal of an optical detector, a tracking drive signal generator that generates a tracking drive signal on the basis of the tracking error signal, a velocity-reduction drive signal generator that generates a velocity reduction drive signal for converging the crossing velocity into a vicinity of zero on the basis of the crossing direction and the crossing period, a loop switch, and a system controller that causes to executes velocity reduction driving for driving the objective lens actuator on the basis of the velocity reduction drive signal and that controls each of the members so as to switch from the velocity reduction driving to driving for driving the objective lens actuator on the basis of the tracking drive signal. |
| US09412402B2 |
Devices including a gas barrier layer
Devices that include a near field transducer (NFT); a gas barrier layer positioned on at least a portion of the NFT; and a wear resistance layer positioned on at least a portion of the gas barrier layer wherein the gas barrier layer includes tantalum oxide (TaO), titanium oxide (TiO), chromium oxide (CrO), silicon oxide (SiO), aluminum oxide (AlO), titanium oxide (TiO), zirconium oxide (ZrO), yttrium oxide (YO), magnesium oxide (MgO), beryllium oxide (BeO), niobium oxide (NbO), hafnium oxide (HfO), vanadium oxide (VO), strontium oxide (SrO), or combinations thereof; silicon nitride (SiN), aluminum nitride (Al), boron nitride (BN), titanium nitride (TiN), zirconium nitride (ZrN), niobioum nitride (NbN), hafnium nitride (HfN), chromium nitride (CrN), or combinations thereof; silicon carbide (SiC), titanium carbide (TiC), zirconium carbide (ZrC), niobioum carbide (NbC), chromium carbide (CrC), vanadium carbide (VC), boron carbide (BC), or combinations thereof; or combinations thereof. |
| US09412392B2 |
Electronic devices with voice command and contextual data processing capabilities
An electronic device may capture a voice command from a user. The electronic device may store contextual information about the state of the electronic device when the voice command is received. The electronic device may transmit the voice command and the contextual information to computing equipment such as a desktop computer or a remote server. The computing equipment may perform a speech recognition operation on the voice command and may process the contextual information. The computing equipment may respond to the voice command. The computing equipment may also transmit information to the electronic device that allows the electronic device to respond to the voice command. |
| US09412389B1 |
High frequency regeneration of an audio signal by copying in a circular manner
According to an aspect of the present invention, a method for reconstructing an audio signal having a baseband portion and a highband portion is disclosed. The method includes obtaining a decoded baseband audio signal by decoding an encoded audio signal and obtaining a plurality of subband signals by filtering the decoded baseband audio signal. The method further includes generating a high-frequency reconstructed signal by copying in a circular manner a number of consecutive subband signals of the plurality of subband signals and obtaining an envelope adjusted high-frequency signal by adjusting, based on an estimated spectral envelope of the highband portion, a spectral envelope of the high-frequency reconstructed signal. The method further includes generating a noise component based on a noise parameter and obtaining a combined high-frequency signal by adding the noise component to the envelope adjusted high-frequency signal. Finally, the method includes obtaining a time-domain reconstructed audio signal by combining the decoded baseband audio signal and the combined high-frequency signal to obtain a time-domain reconstructed audio signal. The method may be implemented by an audio decoding device comprising one or more hardware elements. |
| US09412388B1 |
High frequency regeneration of an audio signal with temporal shaping
A method for generating a reconstructed audio signal having a baseband portion and a highband portion is disclosed. The method includes deformatting an encoded audio signal into a first part and a second part and extracting, from the first part, temporal envelope information and spectral components of the baseband portion. The method further includes decoding the first part to obtain a decoded baseband audio signal. The decoding includes filtering in a frequency domain at least some of the spectral components of the baseband portion with the reconstruction filter using the temporal envelope information to shape a temporal envelope of the baseband portion. The method also includes extracting, from the second part, a noise parameter and an estimated spectral envelope of the highband portion and obtaining a plurality of subband signals by filtering the decoded baseband audio signal. The method further includes generating a high-frequency reconstructed signal by copying a number of consecutive subband signals of the plurality of subband signals and obtaining an envelope adjusted high-frequency signal by adjusting, based on the estimated spectral envelope of the highband portion, a spectral envelope of the high-frequency reconstructed signal. |
| US09412382B2 |
System and method for detecting synthetic speaker verification
Disclosed herein are systems, methods, and tangible computer readable-media for detecting synthetic speaker verification. The method comprises receiving a plurality of speech samples of the same word or phrase for verification, comparing each of the plurality of speech samples to each other, denying verification if the plurality of speech samples demonstrate little variance over time or are the same, and verifying the plurality of speech samples if the plurality of speech samples demonstrates sufficient variance over time. One embodiment further adds that each of the plurality of speech samples is collected at different times or in different contexts. In other embodiments, variance is based on a pre-determined threshold or the threshold for variance is adjusted based on a need for authentication certainty. In another embodiment, if the initial comparison is inconclusive, additional speech samples are received. |
| US09412380B2 |
Method for processing data and electronic device thereof
An operation method of an electronic device is provided. The method includes detecting audio information from all or some of media data, determining a setting duration as at least one duration which satisfies a reference condition using the audio information, and displaying the setting duration on a display. |
| US09412376B2 |
Speaker verification using co-location information
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying a user in a multi-user environment. One of the methods includes receiving, by a first user device, an audio signal encoding an utterance, obtaining, by the first user device, a first speaker model for a first user of the first user device, obtaining, by the first user device for a second user of a second user device that is co-located with the first user device, a second speaker model for the second user or a second score that indicates a respective likelihood that the utterance was spoken by the second user, and determining, by the first user device, that the utterance was spoken by the first user using (i) the first speaker model and the second speaker model or (ii) the first speaker model and the second score. |
| US09412375B2 |
Methods and apparatuses for representing a sound field in a physical space
Methods and apparatuses for representing a sound field in a physical space are provided and described as embodied in a system that includes a sound transducer array along with a touch surface-enabled display table. The array may include a group of transducers (multiple speakers and/or microphones). The array may be configured to perform spatial processing of signals for the group of transducers so that sound rendering (in configurations where the array includes multiple speakers), or sound pick-up (in configurations where the array includes multiple microphones), may have spatial patterns (or sound projection patterns) that are focused in certain directions while reducing disturbances from other directions. |
| US09412374B2 |
Speech recognition having multiple modes in a motor vehicle
In a method for speech recognition in a motor vehicle, speech inputs from a user are received and at least one of them is supplied to a vehicle-internal onboard speech recognition system without raising a query with the user. The speech recognition system generates a first recognition result, which, however, is not necessarily always correct and thus it has often been necessary up to now to raise a query with the user or allow the user to make corrections. The method provides reliable speech recognition that distracts the user in the motor vehicle as little as possible from the traffic. To this end, a processing unit supplies all or part of the speech input also to a vehicle-external offboard speech recognition system, which transmits a second recognition result to the processing unit. Depending on the first and the second recognition results, the speech text is then determined. |
| US09412369B2 |
Automated adverse drug event alerts
Event audio data that is based on verbal utterances associated with a pharmaceutical event associated with a patient may be received. Medical history information associated with the patient may be obtained, based on information included in a medical history repository. At least one text string that matches at least one interpretation of the event audio data may be obtained, based on information included in a pharmaceutical speech repository, information included in a speech accent repository, and a drug matching function, the at least one text string being associated with a pharmaceutical drug. One or more adverse drug event (ADE) alerts may be determined based on matching the at least one text string and medical history attributes associated with the at least one patient with ADE attributes obtained from an ADE repository. An ADE alert report may be generated, based on the determined one or more ADE alerts. |
| US09412368B2 |
Display apparatus, interactive system, and response information providing method
A display apparatus includes a voice collecting device which collects a user voice, a communication device which performs communication with an interactive server, and a control device which, when response information corresponding to the user voice sent to the interactive server is received from the interactive server, controls to perform a feature corresponding to the response information, and the control device controls the communication device to receive replacement response information, related to the user voice, through a web search and a social network service (SNS). |
| US09412365B2 |
Enhanced maximum entropy models
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, relating to enhanced maximum entropy models. In some implementations, data indicating a candidate transcription for an utterance and a particular context for the utterance are received. A maximum entropy language model is obtained. Feature values are determined for n-gram features and backoff features of the maximum entropy language model. The feature values are input to the maximum entropy language model, and an output is received from the maximum entropy language model. A transcription for the utterance is selected from among a plurality of candidate transcriptions based on the output from the maximum entropy language model. The selected transcription is provided to a client device. |
| US09412363B2 |
Model based approach for on-screen item selection and disambiguation
A model-based approach for on-screen item selection and disambiguation is provided. An utterance may be received by a computing device in response to a display of a list of items for selection on a display screen. A disambiguation model may then be applied to the utterance. The disambiguation model may be utilized to determine whether the utterance is directed to at least one of the list of displayed items, extract referential features from the utterance and identify an item from the list corresponding to the utterance, based on the extracted referential features. The computing device may then perform an action which includes selecting the identified item associated with utterance. |
| US09412361B1 |
Configuring system operation using image data
A system that configures a device's operation based on the device's environment. The system may receive scene data describing a scene in which the device will operate. The scene data may include image data, audio data, or other data. A feature vector comprising the scene data may be processed to identify one or more categories to be associated with the scene. Various processing techniques, such as using Bayesian nonparametric models, may be used to categorize the scene data. The device may then adjust its operation based on the one or more selected categories. |
| US09412356B1 |
Apparatus and method for non-occluded active noise shaping
Non-occluding active noise suppression apparatus and methods are disclosed. A housing includes an inlet to admit ambient sound and an outlet to output personal sound to the ear of a user. An acoustic path and an electronic path are provided from the inlet to the outlet within the housing. For a predetermined frequency range, a phase difference between the acoustic path and the electronic path is substantially 180 degrees. |
| US09412355B2 |
Sound-absorbing material and method for preparing the same
The present invention relates to a sound-absorbing material and a method for preparing same. More particularly, it relates to a sound-absorbing material prepared by impregnating a binder into a nonwoven fabric formed of a heat-resistant fiber, having superior sound-absorbing property, flame retardancy, heat resistance and heat-insulating property, thus being applicable to parts maintained at high temperatures of 200° C. or above, to say nothing of room temperature, and being shapeable owing to the binder, and a method for preparing same. |
| US09412351B2 |
Proportional quantization
A computer-implemented method includes receiving input data including MIDI events arranged in a timeline, determining a target grid position from among the plurality of grid positions, determining a search range around the target grid position, and identifying a set of MIDI events within the search range around the target grid position. The method further includes determining a reference point for the set of MIDI events based on a function of the set of MIDI events, adjusting a position of the reference point toward the target grid position, determining a proportional movement for each MIDI event on the timeline based on its location relative to the adjusted reference point, and adjusting each MIDI event based on the determined proportional movement. The function of the set of MIDI events can be a weighted average based on one or more MIDI characteristics of the set of MIDI events. |
| US09412347B2 |
Device for vibrating a stringed instrument
Provided is a device (20) for vibrating a string instrument (1) to allow the string instrument to be used as a loudspeaker. To press a base member (22) fitted with a vibration generator (50) against a bridge (13) of the string instrument (1) via a load point member (24) of a vibration transmission member (26), the base member (22) is provided with a fulcrum member (30) engaging an upper side of the strings (9) of the string instrument (1) and an anchor member (38) engaging a lower side of the strings (9). In order to urge the vibration transmission member (26) against the bridge (13), a cam mechanism (40) presses the anchor member (38) against the lower side of the strings (9). |
| US09412346B2 |
Musical instrument pitch changer
A musical instrument string bending apparatus for a musical instrument having at least a first and second string is disclosed. The bending apparatus includes a bender lever pivotally secured to the musical instrument, a rocker arm pivotally secured to the instrument for varying the tension in the first string in response to movement of the bender lever between the first and second positions. A rocker arm mount secures the rocker arm to the first selected string in a first bending configuration or to the second selected string in a second bending configuration. The rocker arm is movable between the first selected string and the second selected string of the musical instrument. |
| US09412344B2 |
Stringed instrument apparatus and methods
Methods and apparatus for providing a high performance stringed instrument. In one embodiment, the stringed instrument comprises an electric guitar constructed entirely of sheet metal, with the body and neck permanently joined together to produce a one piece (unitary) style guitar construction. This method of construction results in improved overall consistency of the product. In particular, the construction utilizes a substantially homogenous material throughout the guitar and further includes a stronger, stiffer and straighter neck that allows for a more consistent sound than is possible using traditional manufacturing materials such as wood. Such a construction also offers improved sustain of string vibration, an attribute that is highly desirable to guitar players. The incorporation of a unique supporting structure into the headstock contributes to a unique warm timbre when played that has heretofore been unachievable in combination with improved sustain characteristics. |
| US09412342B2 |
Timing controller, driving method thereof, and liquid crystal display using the same
Disclosed are a timing controller, a driving method thereof, and an LCD device using the same. The timing controller includes a receiver configured to receive a timing signal and input video data, a control signal generator configured to generate a control signal by using the timing signal, a data aligner configured to output image data aligned, and a transferor configured to include a plurality of ports for transferring the aligned image data and the control signal to a plurality of source driving ICs. When number of source driving ICs is greater than number of ports, each of the ports is connected to at least two or more source driving ICs. |
| US09412340B2 |
Transferring state information between electronic devices
Some embodiments enable a first electronic device (e.g., a notebook computer) to obtain state information directly from another electronic device (e.g., a smartphone) so that the first electronic device may replicate a state of content of the other computing device. This is useful when a user of an electronic device desires to switch between one device and another device such that the user may continue an activity (e.g., playing a video game) on another device without having to restart the activity. This is also useful when a user of a first electronic device attempts to replicate the state of the activity on a second device from another user such that both users may participate in the same activity. In some embodiments, a user of a device may obtain content from a server and state information from another device to replicate the state of content on the other device. |
| US09412339B2 |
Display method and display device
A display method and display device are described where the method includes when a first device is in a first status, the first device displays a first output content of the first device in a first display area of a display module, when it is detected that the first device goes into a second status from the first status, the first device displays the first output content in a second display area of the display module, and displays a second output content in a third display area of the display module, wherein, the first output content is different from the second output content, the second area does not overlap with the third area, and the first area contains the second and third areas. |
| US09412338B2 |
Light irradiation device
A light irradiation device to display an image by light irradiation prevents easy perception of distortion occurring in the displayed image due to vibration of the device or movement of viewpoint. A random number is generated, and the refresh rate of the displayed image is distributed at random in correspondence with the random number. The light emission intensity is changed in correspondence with the refresh rate. When the number of lines is changed, the input video signal is subjected to scaling and a display is produced. The refresh rate is changed in correspondence with the frequency of the vibration detected with the vibration monitor. |
| US09412335B2 |
Color calibration and compensation for 3D display systems
A method and system for calibration and compensation of color in a three dimensional display system includes user calibration of individual color channels using a multiplicity of grey screens while viewing with three dimensional glasses. Look-up tables are generated to ease conversion of input pixels to color corrected pixels to pre-distort the color of the pixels being driven by the three dimensional display system. Input pixels are then converted using the look-up tables and color corrected frames are displayed to a user. The pre-distortion effect allows a user to perceive colors in the three dimensional system as intended with the distortions caused by the viewing glasses and other aspects of the three dimensional display system. |
| US09412334B2 |
Liquid crystal display device
According to one embodiment, a liquid crystal display device includes an array substrate including a first color filter configured to transmit light in a first wavelength range, a second color filter configured to transmit light in a second wavelength range of greater wavelengths than the first wavelength range, a first switching element disposed above the second color filter, a second switching element disposed above the second color filter, a first pixel electrode which is electrically connected to the first switching element and is located above the first color filter, and a second pixel electrode which is electrically connected to the second switching element and is located above the second color filter. |
| US09412332B2 |
Method for wirelessly transmitting content from a source device to a sink device
Methods and devices for wirelessly transmitting content from a source device to a sink device are disclosed. The method comprises: identifying one or more data types associated with a display frame displayed on the source device; selecting a transmission format for the display frame in accordance with the one or more identified data types, wherein the transmission format is selected from the group consisting of screencasting, graphics processing unit (GPU) processing, or GPU processing with media streaming; and sending visual information representing the display frame in the transmission selected transmission format to the sink device. One or a combination of latency, image/video quality, and power consumption associated with the wireless transmission may be used to adapt the wireless transmission. |
| US09412328B2 |
HVAC controls or controllers including alphanumeric displays
Disclosed are exemplary embodiments of controls for heating, ventilation, and/or air conditioning systems. In an exemplary embodiment, a control for a heating, ventilation, and/or air conditioning system includes an alphanumeric display and one or more input device. A processor of the control is configured to receive a user input through the input device(s), and in response to the user input, reorient a display of a message relative to the alphanumeric display. |
| US09412323B2 |
Power saving method and related waveform-shaping circuit
The present disclosure provides a power saving method for a LCD comprising a plurality of scan lines. The power saving method comprises segregating the scan lines into a plurality of scan line groups; and individually performing a waveform-shaping function on each of the scan-line groups at different time points. |
| US09412322B2 |
Liquid crystal display device and method for driving same
An exemplary liquid crystal display device includes a liquid crystal panel, a common voltage generator and a scanning voltage regenerator. The liquid crystal panel includes a plurality of pixel regions formed in a matrix form. Each pixel region includes a thin-film transistor and a storage capacitor. The storage capacitor includes a pixel electrode and a storage electrode facing the pixel electrode. The common voltage generator is configured for providing a common voltage to the storage electrode. The scanning voltage regenerator is configured for receiving a feedback common voltage from the storage electrode and generating a regenerated scanning voltage for driving the thin-film transistor according to the feedback common voltage. |
| US09412318B2 |
Display device for adjusting gray-level of image frame depending on environment illumination
A display device for adjusting the gray level of an image frame depending on environment illumination is provided. The display device includes a display-panel, a controller, an optical interface, and an adjusting module. The display-panel displays the image frame with the plurality of pixels. The controller is used to drive the display-panel to display the image frame. The operation interface is used to send an image frame brightening command or an image frame dimming command to the controller. The adjusting module is used to adjust gray-levels of the pixels according to the environment illumination. When the environment illumination is too high, the adjusting module raises the gray-level of partial or all pixels; and when the environment illumination is too low, the adjusting module reduces the gray-level of partial or all pixels; so that visual effect of the display device is enhanced. |
| US09412314B2 |
Methods for driving electro-optic displays
An electro-optic display, having at least one pixel capable of achieving any one of at least four different gray levels including two extreme optical states, is driven by displaying a first image on the display, and rewriting the display to display a second image thereon, wherein, during the rewriting of the display, any pixel which has undergone a number of transitions exceeding a predetermined value without touching an extreme optical state, is driven to at least one extreme optical state before driving that pixel to its final optical state in the second image. |
| US09412312B2 |
Display device
A one-pixel structure of a display panel included in an auto-stereoscopic image display device adopts an in-plane switching mode. Transparent counter electrodes that are not provided in a liquid crystal panel of a normal in-plane switching mode are formed correspondingly to pixel peripheral regions on a second transparent substrate side and, in 3-dimensional image display, a vertical electric field is forcibly generated between the transparent counter electrodes and the comb-shaped electrodes, which causes the liquid crystal molecules to rise to show black display in the pixel peripheral regions. In 2-dimensional image display, meanwhile, the transparent counter electrodes are set to be floating, and the display panel is caused to have a structure substantially equivalent to a structure in which the transparent counter electrodes are not provided, to thereby make the display in pixel peripheral regions identical to the display (brightness) in a pixel main region. |
| US09412306B2 |
Driving apparatus and display device including the same
A driving apparatus includes: a plurality of shift registers disposed at a plurality of stages, respectively, where each of the shift registers includes: a first driver which generates an intermediate output signal and a first output signal based on a first signal, where the first driver includes: an input signal terminal, to which the first signal is applied; and an inversion input signal terminal, to which a second signal, which is an inverted signal of the first signal, is applied; and a second driver which receives the first output signal and generates a second driver output signal having a pulse voltage at a first level based on the first output signal and a pulse voltage at a second level based on a first clock signal or a second clock signal. |
| US09412305B2 |
Pixel circuit of an organic light emitting display device and organic light emitting display device including the same
A pixel circuit according to an embodiment includes: a capacitor; a first switching unit configured to initialize the capacitor in response to a first scan signal received from a first scan line; a second switching unit configured to receive a second scan signal from a second scan line disposed in a first direction from the first scan line, to receive a third scan signal from a third scan line disposed in a second direction opposite to the first direction from the first scan line, and to be turned on in response to one of the second scan signal and the third scan signal that is activated after the first scan signal is activated to store a data signal in the capacitor; and a driving transistor configured to provide a driving current to an OLED in response to the data signal stored in the capacitor. |
| US09412303B2 |
Reduced off current switching transistor in an organic light-emitting diode display device
An active matrix organic light emitting diode (OLED) display device includes an array of pixels, each pixel including an OLED, a driving transistor (DT) coupled to drive current through the OLED, a storage capacitor, and a scanning transistor (ST) coupled to control charge on the storage capacitor corresponding to a data voltage for said pixel. The display device also includes a timing controller configured to control the ST of each pixel to update the charge stored on the storage capacitor of each pixel at a frame rate including at least one frequency within a range of 1-10 Hertz (Hz). |
| US09412297B2 |
Organic light emitting diode display and method of manufacturing the same
An organic light emitting diode display includes a pixel portion displaying an image and a peripheral portion surrounding the pixel portion, a semiconductor layer including a pixel switching semiconductor layer on the pixel portion on the substrate, a being driving semiconductor layer, and a peripheral switching semiconductor layer on the peripheral portion, a first gate insulating layer on the semiconductor layer, a peripheral switching gate electrode on the first gate insulating layer of the peripheral portion, a second gate insulating layer covering the peripheral switching gate electrode and the first gate insulating layer, a pixel switching gate electrode and a driving gate electrode on the second gate insulating layer of the pixel portion, and a third gate insulating layer covering the pixel switching gate electrode, the driving gate electrode, and the second gate insulating layer. |
| US09412296B2 |
Display brightness adjustment
A display comprising an array of pixels having individually adjustable brightness levels; an array of light sensors fixed relative to the pixel array; and a brightness controller for estimating a glare footprint on the pixel array from light level data provided by the sensor array and for adjusting the relative brightness levels of pixels that fall in the estimated glare footprint. |
| US09412293B2 |
Digital data transmission apparatus and digital data transmission method
The present invention has a comparing unit that compares each of image signals in a first clock period with a corresponding one of the image signals in a second clock period subsequent to the first clock period, and a cancelling unit that causes each of the image signals in the second clock period to be cancelled in the case where a comparison result from the comparing unit indicates that each of the image signals in the first clock period agrees with the corresponding one of the image signals in the second clock period. |
| US09412287B2 |
Traffic advisor for emergency vehicles
A traffic advisor for an emergency vehicle. The traffic advisor includes a base capable of being attached to a roof of an emergency vehicle. The traffic advisor additionally includes a display member coupled to the base and shiftable relative to the base between a stowed position and a deployed position. The display member is further configured to display one or more advisory messages. The traffic advisor may also include an actuation system for shifting the display member between the stowed position and the deployed position. As such, in the deployed position, the traffic advisor is operable to display advisory messages that are clearly viewable from a position rearward of the emergency vehicle. |
| US09412279B2 |
Unmanned aerial vehicle network-based recharging
A device receives a request for a flight path for a UAV to travel from a first location to a second location, and determines capability information for the UAV based on component information of the UAV. The device calculates the flight path based on the capability information, identifies multiple recharging stations located on or near the flight path, and selects a recharging station from the multiple recharging stations based on one or more factors. The device generates flight path instructions, for the flight path, that instruct the UAV to stop and recharge at the recharging station. The device provides the flight path instructions to the UAV to permit the UAV to travel from the first location to a location of the recharging station, stop and recharge at the recharging station, and travel from the location of the recharging station to the second location via the flight path. |
| US09412276B2 |
Following distance reminding device and method thereof
A device and method for reminding following distance are provided. The following distance reminding device (FDRD) adapted for a first vehicle is capable of computing a following distance between the first vehicle and a second vehicle. The FDRD comprises an image acquiring module, a reminding module, and a processing module. The image acquiring module receives a vehicle image of the second vehicle. The processing module extracts a license plate image from the vehicle image, and computes the following distance between the first vehicle and the second vehicle according to image characteristics of the license plate image. The processing module computes a safe distance according to a driving speed of the first vehicle and the image characteristics, and determines whether the following distance is more than the safe distance or not, in order to control the reminding module to correspondingly send a reminding message. |
| US09412273B2 |
Radar sensing and emergency response vehicle detection
Methods and systems for a complete vehicle ecosystem are provided. Specifically, systems that when taken alone, or together, provide an individual or group of individuals with an intuitive and comfortable vehicular environment. The present disclosure includes a system that detects emergency signals and presents alerts to devices of a vehicle to notify vehicle users of the emergency signals. Further, the methods and systems provide a presentation approach to continue to alert a user and even control a vehicle when an acceptable response to a first alert, or series of alerts, is not received from the user. |
| US09412272B2 |
Apparatus and method for controlling traffic signals
Device and method of controlling a traffic light on the basis of an analysis result of a broadcast signal transmitted via a broadcast network are provided. The traffic light control device controlling signal light change of a traffic light, includes: a broadcast signal receiving unit that receives a broadcast signal emitted from a traffic control center via a broadcast network; and a traffic light control unit that determines an offset time from a reference traffic light on the basis of an analysis result of the broadcast signal and that outputs a control signal for controlling the light change of a control target traffic light so that a time point which lags by the determined offset time from a signal light display start time point of the reference traffic light is matched with a signal light display start time point of the control target traffic light. |
| US09412271B2 |
Traffic flow through an intersection by reducing platoon interference
Methods, systems, and computer program products for optimizing automobile traffic flow through an intersection by detecting and reducing platoon interference. One method, performed in a computer product, includes steps of identifying a cluster in traffic information of a cycle of a traffic signal, determining that the cluster qualifies as an upstream platoon, calculating properties of the platoon, and generating an Enhanced Purdue Coordination Diagram (EPCD) for the cycle based on the calculated properties of the platoon. Another method includes obtaining, by a computer device, traffic information corresponding to an intersection; determining, by the computer device, platoon properties of the traffic information corresponding to each cycle of a traffic signal; and calculating, by the computer device, a timing change to make to the traffic signal to improve traffic flow through the intersection, the timing change being based on the platoon properties. |
| US09412269B2 |
Object detection based on image pixels
Video analytics is used to track an object of interest represented in video data representing the field of view of a scene observed by a video camera. A multidimensional virtual beam is used to detect whether the tracked object of interest is continually present in a detection zone within the field view of the scene. An occurrence of an event is signaled when the tracked object of interest is continually present in the detection zone during a period beginning when the tracked object of interest enters the detection zone and ending when the tracked object of interest leaves the detection zone through the opposite side, after having completely crossed through the detection zone. Use of a virtual beam detection zone reduces false alarms as compared to the numbers of incidences of false alarms of traditional detection methods, while adding several features and benefits. |
| US09412265B2 |
Programming a universal remote control using an identifying device mark
A method and system for programming a universal remote control (URC) to operate with a new remote controlled device having a digital mark is disclosed. A digital representation of the mark is generated and sent to a multimedia content distribution network (MCDN) server, along with MCDN account information. The digital mark may be used to retrieve programming codes, which are sent to client-premises equipment (CPE) at an MCDN client identified by the MCDN account information. The CPE may be instructed to reprogram the URC to control the new device using the programming codes. The digital mark may be scanned and sent to the server using wireless telephony service provided by the MCDN service provider. |
| US09412264B2 |
Wireless trainable transceiver device with integrated interface and GPS modules
A trainable transceiver having an integrated interface connections with various vehicle modules for use with various remote electronic devices and a method of programming and using the same. The wireless trainable transceiver is in a vehicle with an integrated interface allowing connection to a human to machine interface and vehicle position determination device, such a navigation system and compass and the wireless trainable transceiver has the ability to change functions associated with preset buttons on the trainable transceiver, depending upon the location of the vehicle. |
| US09412263B2 |
Interactive portable carrying case for hand sanitizer
A dispensing system is provided including a housing that removably supports a container. A material is contained within the container. The material is dispensed from the container. The housing includes a wireless communication system that transmits a first set of information related to a user of the dispensing system. An example method of operating the dispensing system is also provided. |
| US09412259B2 |
Medical alarm system and medical alarm indicator
A medical alarm system includes: a bedside monitor which is configured to transmit alarm information when an abnormality is detected in measured biological information of a patient; a position information measuring device which is configured to transmit medical person position information when position information of a medical person is measured; and an information displaying device which is configured to receive and display the alarm information and the medical person position information. The information displaying device includes an alarm information displaying section and a medical person position information displaying section. When receiving the alarm information, the information displaying device displays the alarm information in the alarm information displaying section and the medical person position information in the medical person position information displaying section. |
| US09412252B2 |
Universal fall detection system
A universal fall detect system and its unique designed sensor as well as methodology to detect the fall event are disclosed. The fall event is detected by measuring relative position, and/or orientation between host body and direction of gravity at the spot where falling event happens. The system can present either as a standalone system or a built-in component with supporting software installed on other devices. The system linked to wide network and wide audience can trigger several emergency response and assistances if needed in time when a falling event happens. |
| US09412251B2 |
Monitoring device for monitoring inactive behavior of a monitored person, method and computer program
A monitoring device for monitoring inactive behavior of a monitored person in a monitored zone includes a plurality of monitoring sensors configured to record sensor data. The monitoring sensors are positioned in at least two spatially separated monitored subzones of the monitored zone. The monitoring device further includes an evaluation device including a model module and a test module. The model module produces a first inactivity model in a spatially anonymized manner for a first time period with reference to sensor data in the first time period. The model module produces a second inactivity model for a second time period. At least portions of the second time period are formed later than the first time period. The test module compares the first inactivity model and the second inactivity model and provides a change notification if there is a deviation between the first inactivity model and the second inactivity model. |
| US09412242B2 |
Multifunction point of sale system
A point of sale system capable of operating in an indicia-reading mode or a verification mode is disclosed. In the indicia-reading mode, the point of sale system configures its illumination, imaging, and processing to read indicia as part of a normal checkout process. If triggered by a user or by an event, the point of sale system may operate in a verification mode. In the verification mode, the point of sale system enables the necessary illumination, imaging, and processing to verify an item. This verification includes illuminating the item in a way that causes a noticeable response from a security mark (or marks) on the item. An image of the response may be captured and processed to authenticate/verify the item. The point of sale system may then respond to the verification and/or may store the image/results as a record of the verification. |
| US09412237B2 |
Adaptation of skill-based games for training and enjoyment
An electronic game wherein the user accumulates score which is based upon the appropriateness of the user's moves, regardless of whether the move resulted in a win or lose situation for the user. This approach provides the user with enjoyment of playing the game, but also focuses the user to learn how to make proper moves that would ultimately result in better skills in playing the game. One specific example relates to poker, wherein the user collects chips based upon winning or losing a hand, but at each decision round of playing the hand the user is awarded ProCoins based upon the appropriateness of the user's actions. The user is provided with feedback based upon the user's decisions, rather than based upon winning or losing a hand. |
| US09412234B2 |
Chain reaction
A method of gaming in a gaming system comprising: initiating a bonus game comprising a plurality of levels having a defined sequence; determining a group of participants in the bonus game; associating each participant with a level such that each participant is eligible to a bonus win based on the level with which the participant is currently associated; awarding a bonus win to one of the participants; and associating a subsequent level with each of the participants in response to the bonus win such that each participant is eligible to a subsequent bonus win based on the subsequent level associated with the participant. |
| US09412231B2 |
Method and apparatus for integrated customer tracking and browsing
A system and method for tracking customer activity without need for an extensive interconnecting network. The system includes a plurality of gaming devices that are communicatively isolated from one another. Information, including tracked customer activity, bonus requirements, and in one embodiment, personal information, is stored on a memory device communicable with the gaming devices. This allows implementation of an incentive program at reduced cost because the service devices themselves need not be networked together. |
| US09412229B2 |
System for providing a game at a gaming machine
A server includes a memory, a network interface configured to receive data related to a game available as part of a gaming system, and a processor. The processor is configured to receive the game data via the network interface, determine demand for the game within a gaming environment based on the game data and determine a weighting factor associated with the game based on the demand, and upload the game at one or more gaming machines within the gaming environment based on the weighting factor. The prominence of the game within the gaming environment varies according to the weighting factor. |
| US09412227B2 |
Method and apparatus for offering a mobile device version of an electronic gaming machine game at the electronic gaming machine
A gaming system compatible with patron-controlled portable electronic devices, such as smart phones or tablet computers, is described. When a Player surpasses predetermined game play parameters on a game of an EGM, a bonus game or related game material may be “unlocked” and offered to the Player for download onto the Player's Portable Electronic Device (PED). Upon installation, the game or content may be viewed or played on their PED at a later time and at their leisure. |
| US09412225B2 |
Gaming machine
A gaming machine according to an embodiment of the present invention includes: at least one display panel configured to display images of a game, the display panel including a screen facing downward; at least one beam splitter disposed under the display panel and inclined with respect to the screen to partially reflect the images from the display panel into a forward direction; and a controller configured to execute the game and to control the display panel, wherein an image from each of the at least one display panel is reflected by at least one of the at least one beam splitter. |
| US09412219B2 |
Gaming system and a method of gaming
A method of gaming comprising providing a plurality of display positions and selecting a plurality of symbols for display at respective display positions. A base pay table is defined and is usable to determine a prize for a winning outcome when a winning outcome associated with a particular prize comprising a defined win combination of x symbols occurs. It is determined whether a winning outcome exists and, during normal game mode, the base pay table is used to determine a particular prize applicable for a winning outcome when the winning outcome occurs. It is also determined whether a trigger condition exists and if the trigger condition is determined, special game mode is implemented during which the special pay table is used to determine a particular prize applicable for a winning outcome when the winning outcome occurs. |
| US09412218B2 |
Method and apparatus for linked play gaming
The invention includes a system and method for providing linked play via gaming and other devices. In some embodiments, a casino server registers a group for linked play and a group objective and format are established. The linked play commences according to the group format on the gaming devices while the casino server, or another device, concurrently facilitates interaction between the group members operating the gaming devices. The linked play is terminated according to the group format and a determination is made by the casino server whether the group objective has been achieved. Prizes are awarded via the gaming devices if the group objective was achieved. |
| US09412205B2 |
Extracting sensor data for augmented reality content
A system and method for extracting data for augmented reality content are described. A device identifies a sensing device using an image captured with at least one camera of the device. Visual data are extracted from the sensing device. The device generates an AR content based on the extracted visual data and maps and displays the AR content in the display to form a layer on the sensing device. |
| US09412203B1 |
Systems and methods for generating virtual item displays
Systems, methods, and devices of the various embodiments enable virtual displays of an item, such as vehicle, to be generated. In an embodiment, a plurality of images of an item may be captured and annotation may be provided to one or more of the images. In an embodiment, the plurality of images may be displayed, and the transition between each of the plurality of images may be an animated process. In an embodiment, an item imaging system may comprise a structure including one or more cameras and one or more lights, and the item imaging system may be configured to automate at least a portion of the process for capturing the plurality of images of an item. |
| US09412200B2 |
Selected image acquisition technique to optimize patient model construction
A system and a method are disclosed that allow for generation of a model or reconstruction of a model of a subject based upon acquired image data. The image data can be acquired in a substantially mobile system that can be moved relative to a subject to allow for image acquisition from a plurality of orientations relative to the subject. The plurality of orientations can include a first and final orientation and a predetermined path along which an image data collector or detector can move to acquire an appropriate image data set to allow for the model of construction. |
| US09412199B2 |
Draggable maps
A web server receives a request from a client specifying a location and a bounding area. A mapping engine creates a tile grid centered at the specified location. A seed tile is created, including or adjacent to the center location. The web server creates a resource identifier for each tile in the tile grid, and returns the tile grid including the resource identifiers to the client. The resource identifier for each tile includes the location of the seed tile and a position offset for the tile relative to the seed tile, in one embodiment specified in units of northward and eastward movement. The client requests tiles from the system using the resource identifiers previously provided by the system. Upon receiving the request, the mapping engine dynamically renders each requested tile using map data from the map database, and the web server returns the dynamically-generated tiles to the requesting client. |
| US09412192B2 |
System and method for creating avatars or animated sequences using human body features extracted from a still image
A user may create an avatar and/or animated sequence illustrating a particular object or living being performing a certain activity, using images of portions of the object or living being extracted from a still image or set of still images of the object or living being. The resulting avatar and/or associated animated sequence may be created to include recognizable facial or other features of the individual(s)/objects, and may, for example, be suitable for exchange over the Internet, or as part of a game or other activity. |
| US09412191B2 |
Sex selection in inheritance based avatar generation
The generation of characters within computer animations is currently a labor intensive and expensive activity for a wide range of businesses. Whereas prior art approaches have sought to reduce this loading by providing reference avatars, these do not fundamentally overcome the intensive steps in generating these reference avatars, and they provide limited variations. According to the invention a user is provided with a simple and intuitive mechanism to affect the weightings applied in establishing the physical characteristics of an avatar generated using an inheritance based avatar generator. The inheritance based generator allowing, for example, the user to select a first generation of four grandparents, affect the weightings in generating the second generation parents, and affect the weightings in generating the third generation off-spring avatar from these parents. Accordingly the invention provides animators with a means of rapidly generating and refining the off-spring avatar to provide the character for their animated audio-visual content. |
| US09412189B2 |
Method and system for detecting known measurable object features
A method and system for detecting a known measurable object feature using a video inspection system. The method and system displays an image of a viewed object and detects a known measurable object feature on the viewed object. The method and system then displays a set of available measurement types including a measurement type associated with the detected known measurable object feature and/or automatically positions a plurality of measurement markers on the displayed image based on the measurement type associated with the detected known measurable object feature. |
| US09412188B2 |
Method and image processing system for removing a visual object from an image
A method and image processing system for removing a visual object from an image, e.g., a moving image, is described. An image is provided in which a visual object to be removed is selected, for which a mask is determined. Pixels outside the mask that are intended to be used for replacing pixels inside the mask are selected, based on a similarity measure, comprising an appearance similarity measure representing the visual similarity between a previously selected pixel for replacing the pixel to be replaced and the pixel to be selected, and a geometry similarity measure, representing the closeness of the pixel to be selected to the pixel among the pixels outside the mask that was previously used for replacing the pixel adjacent to the pixel to be replaced. The pixels inside the mask are replaced by copying the properties of the selected pixels to the respective pixels to be replaced. |
| US09412186B2 |
Establishing and displaying dynamic grids
A computer system that assists the user of computer drawing programs to accurately place new objects on a drawing is described. The system establishes and displays dynamic gridlines according to objects already placed on the drawing. As a new object is dragged for placement on the drawing, the system analyzes the areas around the new object for already-placed objects. The system then determines the spacing between the already-placed objects and indicates to the user where the dragged object should be placed to maintain the same spacing as the objects already placed on the drawing. |
| US09412179B2 |
Analyzing system, analyzing program and analyzing method
There is provided an analyzing system including a feature value calculation unit. The feature value calculation unit is configured to calculate, for each time range, a feature value indicating a feature of an amount of movement in a target video image in which a target of analysis is imaged over time. |
| US09412178B2 |
Method, system and apparatus for image capture, analysis and transmission
A method, system and apparatus for image capture, analysis and transmission are provided. A link aggregation method involves identifying controller network ports to a source connected to the same subnetwork; producing packets associating corresponding controller network ports selected by the source CPU for substantially uniform selection; and transmitting the packets to their corresponding network ports. An image analysis method involves producing by a camera an indication whether a region of an image differs by a threshold extent from a corresponding region of a reference image; transmitting the indication and image data to a controller via a communications network; and storing at the controller the image data and the indication in association therewith. The controller may perform operations according to positive indications. A transmission method involves receiving user input in respect of a video stream and transmitting, in accordance with the user input, selected data packets of selected image frames thereof. |
| US09412177B2 |
Picture encoding method and picture decoding method
A picture encoding method of the present invention is a picture encoding method of predictively encoding an input picture with reference to pictures stored in a picture buffer, decoding the encoded input picture, judging whether or not the decoded picture is a picture for reference and whether or not the decoded picture is a picture for output which needs to be stored until its display time, and storing, in the picture buffer, the picture for reference and the picture for output based on the determination result. |
| US09412176B2 |
Image-based feature detection using edge vectors
Techniques are provided in which a plurality of edges are detected within a digital image. An anchor point located along an edge of the plurality of edges is selected. An analysis grid associated with the anchor point is generated, the analysis grid including a plurality of cells. An anchor point normal vector comprising a normal vector of the edge at the anchor point is calculated. Edge pixel normal vectors comprising normal vectors of the edge at locations along the edge within the cells of the analysis grid are calculated. A histogram of similarity is generated for each of one or more cells of the analysis grid, each histogram of similarity being based on a similarity measure between each of the edge pixel normal vectors within a cell and the anchor point normal vector, and a descriptor is generated for the analysis grid based on the histograms of similarity. |
| US09412169B2 |
Real-time visual feedback for user positioning with respect to a camera and a display
Systems, methods, and computer program products provide near real-time feedback to a user of a camera-enabled device to guide the user to capture self-imagery when the user is in a desired position with respect the camera and/or the display of the device. The desired position optimizes aspects of self-imagery that is captured for applications in which the imagery is not primarily intended for the user's consumption. One class of such applications includes applications that rely on illuminating the user's face with light from the device's display screen. The feedback is abstracted to avoid biasing the user with aesthetic considerations. The abstracted imagery may include real-time cartoon-like line drawings of edges detected in imagery of the user's head or face. |
| US09412168B2 |
Image processing device and image processing method for camera calibration
In a calibration device, an image-integration averaging processing unit integrates/averages an image so as to generate an integrated and averaged image, and an edge extracting unit extracts the edges from the integrated and averaged image. A vanishing-point extracting unit calculates vanishing lines by using the edges and identifies the coordinates of the intersection point of the vanishing lines as the coordinates of the vanishing point. An error determining unit compares the coordinates of the current vanishing point with the coordinates of the previous vanishing point so as to determine whether a parameter of the camera needs correcting. In accordance with the result of the determination, a correction processing unit corrects a parameter of the camera. |
| US09412166B2 |
Generating three dimensional digital dentition models from surface and volume scan data
A method and apparatus are disclosed enabling an orthodontist or a user to create an integrated three dimensional digital model of dentition and surrounding anatomy of an orthodontic patient from a three-dimensional digital model obtained using a scanner with a three-dimensional digital model obtained using a Cone Beam Computed Tomography (CBCT) or Magnetic Resonance Tomography (MRT) imaging devices. The digital data obtained from scanning as well as from CBCT imaging are downloaded into a computer workstation, and registered together in order to create a comprehensive 3-D model of the patient's teeth with roots, bones and soft tissues. The invention provides substantial improvement over the traditional two dimensional imaging modalities such as x-rays, photographs, cephalometric tracing for diagnosis and treatment planning. |
| US09412164B2 |
Apparatus and methods for imaging system calibration
A reference set of image features is determined from an electronic data file specifying a reference image in a reference coordinate space. Rendering information describing a physical rendering of the reference image is ascertained. Calibration-enabling data is derived from the reference set of the image features and the ascertained rendering information. The calibration-enabling data is provided to calibrate an imaging system. The calibration-enabling data may be stored. The imaging system may capture an image of the physical rendering of the reference image in relation to a capture coordinate space. An extracted set of image features may be extracted from the captured image. Respective ones of the image features in the reference and extracted sets may be matched. The imaging system may be calibrated based on matched ones of the image features and the rendering information. |
| US09412159B2 |
Method for inspecting flat panel
Disclosed is a method for inspecting a flat panel. The method for inspecting the flat panel includes the steps of: arranging a camera at a measurement location of the flat panel by horizontally moving at least one of the flat panel and the camera; automatically focusing the camera with respect to a measuring target of the flat panel at the measurement location; acquiring a plurality of images for the measuring target by vertically moving the focused camera within a set region on the basis of the present location of the camera when focusing the camera; selecting the image having the most definition for the measuring target among the acquired images; processing the selected image; and determining whether the measuring target is defective or not. |
| US09412157B2 |
Apparatus and method for high speed filtering of image for high precision
Provided are an apparatus and a method for high speed filtering of an image for high precision that may include a coordinate determining unit to determine coordinates (P,Q) on a screen with respect to a first pixel to be filtered, a pixel determining unit to determine a second pixel with coordinates including either P or Q, a block setting unit to set a first block comprising the first pixel, and a second block comprising the second pixel, and a processing unit to filter the first pixel by comparing the first block and the second block. |
| US09412150B2 |
Method and apparatus for visually representing objects with a modified height
A method, apparatus and computer program product are provided to cause a visual representation of a plurality of objects representative of respective physical structures to be provided with the height of at least one of the objects being modified, thereby visually accentuating the object(s). In regards to a method, one or more objects representative of respective physical structures are identified from among a plurality of objects. The plurality of objects therefore include first object(s) that were identified and second object(s) that were not identified. Each object has an associated height. The method may also modify the height associated with at least one of the objects such that a height differential between the first objects and the second objects is altered. The method may also cause a visual representation of the plurality of objects to be provided with at least one of the objects having a modified height. |
| US09412149B2 |
Display device, computer program, and computer-implemented method
A method of processing an image includes receiving an omnidirectional image. An instruction is received with a processor to process the omnidirectional image to generate a rectangular image, in response to user input via a display on the omnidirectional image. At least one intermediate image is generated showing a transition between the omnidirectional image and the rectangular image. |
| US09412148B2 |
Transmission terminal, transmission method, and computer-readable recording medium storing transmission program
A transmission terminal transmits video data and display data of a screen shared with another transmission terminal to the other transmission terminal via a predetermined relay apparatus. The transmission terminal includes a storage unit that stores relay apparatus information of the relay apparatus to which the transmission terminal transmits the video data; a receive unit that receives the display data from an external input apparatus connected to the transmission terminal; and a transmitting unit that transmits the display data received by the receive unit to the relay apparatus indicated by the relay apparatus information stored in the storage unit. |
| US09412144B2 |
Hierarchical watermark detector
The present invention relates generally to digital watermarking. In one implementation, we provide a hierarchical digital watermark detector method. The method includes: i) in a first layer of a hierarchical search, performing watermark detection on blocks of at least a portion of an incoming suspect signal; ii) identifying a first block in the portion that is likely to include a decodable digital watermark; and iii) in a second layer of the hierarchical search, performing additional watermark detection on overlapping blocks in a neighborhood around the first block. Another implementation provides a hierarchical watermark detector including a buffer and a detector. The buffer stores portions of an incoming signal. The detector evaluates watermark detection criteria for blocks stored in the buffer, and hierarchically zooms into a neighborhood of blocks around a block associated with watermark detection criteria that satisfies detection criteria. |
| US09412142B2 |
Intelligent observation and identification database system
An intelligent video/audio observation and identification database system may define a security zone or group of zones. The system may identify vehicles and individuals entering or exiting the zone through image recognition of the vehicle or individual as compared to prerecorded information stored in a database. The system may alert security personnel as to warrants or other information discovered pertaining to the recognized vehicle or individual resulting from a database search. The system may compare images of a suspect vehicle, such as an undercarriage image, to standard vehicle images stored in the database and alert security personnel as to potential vehicle overloading or foreign objects detected, such as potential bombs. The system may further learn the standard times and locations of vehicles or individuals tracked by the system and alert security personnel upon deviation from standard activity. |
| US09412140B2 |
Method and system for inspection of travelers
A kiosk for processing arriving travelers is provided, wherein the kiosk reads information from the traveler's travel document, and either receives a completed declaration form from the traveler or poses a series of questions to the traveler. On obtaining the needed information from the traveler, the kiosk queries a government computer to obtain a code for the traveler. The code, when shown to a government official, such as a customs agent, will determine if the traveler is retained for secondary processing. |
| US09412136B2 |
Creation of real-time conversations based on social location information
A social networking system determines common location information included in a set of posts between a set of users. Using the determined common location information, the social networking system generates a message interface for grouping a set of messages into a conversation thread. For example, the messages may be grouped into a conversation thread based on common location information in the messages and being associated with participants sharing a social relationship. When a group conversation is created, the social networking system presents a message interface containing the conversation thread to one or more participants of the thread. The social networking system adds the set of messages to the conversation thread based on social information about the social relationships among the participants of the conversation thread. The social networking system then presents the message interface for display to one or more of the participants. |
| US09412132B2 |
Method and system for offering a credit product by a credit issuer to a consumer at a point-of-sale
A method for offering at least one credit product by at least one credit issuer to a consumer at a point-of-sale between a merchant and the consumer. The method includes the steps of: providing a credit issuer data set including a plurality of data fields to a central database; initiating a transaction between the consumer and the merchant at the point-of-sale; offering, to the consumer at the point-of-sale, the at least one credit product; and presenting, to the consumer at the point-of-sale, at least one data field in the credit issuer data set. The at least one data field presented to the consumer is populated with data directed to the credit product, the credit issuer, or any combination thereof. An apparatus and system are also disclosed. |
| US09412130B2 |
Assistance on the go
A mobile computerized apparatus or method configured to coordinate towing facilities and roadside assistance providers and their available capacity to tow and provide roadside assistance and match users with those towing facilities and roadside assistance providers is disclosed. The apparatus or method may be configured to consider the following factors in matching the towing facilities/roadside assistance providers and users: (a) availability of nearby towing facilities; (b) telematics information from the vehicle to assist with the diagnosis/repairs; (c) preset preferences of the user; (d) insurance information (such as the type of the vehicle the user has and the user's home address); and (e) the capabilities of the towing facility. |
| US09412129B2 |
Equalization using user input
A system for interacting with an audio reproduction device and a user using the audio reproduction device is disclosed. The system includes: an image capture module capturing an image depicting an audio reproduction device used by a user; an image recognition module performing image recognition to extract recognition data from the image, the recognition data including data describing the audio reproduction device and one or more deteriorating factors that deteriorate a sound quality in the audio reproduction device; a filter module estimating a sound degradation in the audio reproduction device that is caused by the one or more deteriorating factors, the filter module applying a digital filter to compensate the sound degradation in the audio reproduction device; an aggregation module aggregating data associated with the user, the aggregated data including the recognition data; and a recommendation module providing one or more recommended items to the user. |
| US09412128B2 |
System and method for retrieving and normalizing product information
Systems and a method for retrieving and normalizing product information are described. The method selects a normalized representation of a product. The selecting is responsive to receiving a user indication of the product. The normalized representation is based on product information that is collected from two or more suppliers and described differently by the two or more suppliers. The method further identifies a plurality of offerings for the product based on the normalized representation. The plurality of offerings includes offerings from the two or more suppliers that describe the product differently. Finally, a user interface includes information corresponding to the plurality of offerings for the product. |
| US09412127B2 |
Methods and systems for assessing the quality of an item listing
Methods and systems for assessing the quality of an item listing are described. In an example embodiment, a listing quality score for an item listing is derived as a weighted sum of first and second parts. The first part represents a predicted score based on a comparison of item attributes for the item listing that are known at listing time, with item attributes of similar item listings that have historical data available for assessing their actual performance. The second part is based on one or more observed demand metrics representing actual historical performance of the item listing. The weighting factor is derived, such that over time, the emphasis shifts from the predicted to the observed score. |
| US09412126B2 |
System and method for commercializing avatars
A system that incorporates teachings of the present disclosure may include, for example, a system having a controller to offer for sale an avatar engine that generates a visual representation of an interactive avatar capable of engaging in a verbal communication exchange by way of an audio system of a computing device from which the avatar engine is adapted to operate, receive a purchase request from a communication device, transmit to the communication device a usage policy and a copy of the avatar engine responsive to determining that the purchase request involves a request for a reproduction of at least a portion of the avatar engine, and enable the communication device to access services of the avatar engine responsive to determining that the purchase request involves the request for services of the avatar engine. Other embodiments are disclosed. |
| US09412124B2 |
Multi-item scanning systems and methods of items for purchase in a retail environment
A system and method for scanning items for purchase in a retail environment is provided that has the ability to scan multiple items within its scan field of view simultaneously or nearly simultaneously in a multi-scanning type of configuration. In addition to the simultaneous scanning, the identity of each scanned item is discovered and then added to a running tally of items to be later purchased in a point of sale terminal. |
| US09412123B2 |
Keystroke analysis
A system, method and device for detecting keystroke entries in a field entered by keyboard in connection with an online transaction that may be fraudulent or erroneous. A score can be assigned to a keystroke based upon its distance from another keystroke. The scores of keystrokes in a string can be summed to obtain a string score. The string score can be normalized by dividing the string score by the number of keystrokes summed to obtain the normalized string score. A risk of fraud or error can be determined based upon the value of the normalized string score in comparison to a predetermined value. |
| US09412114B2 |
Banking system operated responsive to data read from data bearing records
An exemplary system includes an automated banking machine which is operable to conduct transactions including cash dispensing for users responsive to communication with a transaction host. The machine is also operative to provide output signals which drive external displays which are separate from the machine. The machine is operable to receive visual and audio content from one or more broadcast content sources and to store the content in the machine. The content is then output through the external displays. The machine is also operative to receive and store a plurality of advertising messages. The advertising messages are output in a targeted manner to users of the machine. |
| US09412113B2 |
Performance data search using a query indicative of a tone generation pattern
A user inputs, as a query pattern, a desired search-object rhythm pattern by operating a rhythm input device. At that time, a determination is made of a style of operation performed by a user on a rhythm input device, such as whether the user has operated a single key or a plurality of keys, or duration or intensity of the operation, and then, a user-intended performance part is identified, on the basis of the determined style of operation, from among one or more performance parts constituting a performance data set (automatic accompaniment data set). For the thus-identified performance part, a rhythm pattern search section searches an automatic accompaniment database for an automatic accompaniment data set including a rhythm pattern that matches the input rhythm pattern (query pattern). |
| US09412111B2 |
Network interaction monitoring appliance
An appliance for analyzing a network interaction is disclosed. The appliance includes an input to monitor network traffic that includes a network interaction without interfering with the network traffic. The appliance further includes a processor to analyze network traffic to derive information about the network interaction wherein the information about the network interaction is used to distinguish whether the network interaction is a qualified network interaction with a user. |
| US09412109B2 |
Analysis of clustering solutions
A computing system determines incremental values associated with a plurality of clustering solutions. Each of the clustering solutions groups stores of a retailer into clusters in a different way. For each clustering solution in the plurality of clustering solutions, the incremental value associated with the clustering solution indicates a difference between an estimated revenue associated with the clustering solution and revenue associated with a baseline clustering solution. The computing system then determines, based on the incremental values associated with the plurality of clustering solutions, the appropriate number of clusters. The clustering solutions that group the stores into more or fewer clusters than the appropriate number of clusters tend to be associated with incremental values that are the same or lower than the clustering solutions that group the stores into the appropriate number of clusters. |
| US09412104B2 |
Transaction product with movable member
A transaction product includes a primary member, an auxiliary member, and a machine-readable account identifier. The primary member defines a first panel and a second panel, the first panel defines two or more embossed sections defining interior ledge segments that define a track therebetween, and the first and second panels are coupled to one another such that the track is interposed between the first and second panels. The auxiliary member is interposed between the first and second panels, is partially positioned within the track, and is configured to move within the track in one or more of a first direction and a second direction. Movement of the auxiliary member is limited by interaction between the auxiliary member and the interior ledge segments of the two or more embossed sections. The machine-readable account identifier links the primary member to an account or record and is secured to the primary member. |
| US09412102B2 |
System and method for prepaid rewards
A system and method provide rewards or loyalty incentives to card member customers. The system includes an enrolled card member customer database, an enrolled merchant database, a participating merchant offer database and a registered card processor. The enrolled card member customer database includes transaction accounts of card member customers enrolled in a loyalty incentive program. If the purchase qualifies for a rebate credit, the registered card processor provides the rebate credit to an account of the enrolled card member customer. The registered card processor also provides for electronic notification of rewards offers or credit to prepaid cards, in response to purchases conforming to a specific set of merchant criteria. The system provides a coupon-less way for merchants to provide incentive discounts and/or credits to enrolled customers, along with notifying customers of other available incentive offers. |
| US09412100B1 |
Physical currency management
A payment service system may operate to handle physical currency management for one or more merchants. The payment service system may assign a courier to pickup a currency storage compartment of a merchant. The payment service may then receive a notification related to the arrival of the courier at the location of the currency storage compartment and transfer funds to an account of the merchant. After transferring the funds, the payment service system may then request the merchant device to allow pickup of the currency storage compartment by the courier. |
| US09412099B1 |
Automated item recognition for retail checkout systems
A retail checkout system includes a camera, a database, a processor, and a memory. The camera outputs an image of a purchase item. The database contains features of known items. The processor performs operations to extract features of the purchase item from the image of the purchase item, and identifies matches between the features of the purchase item and the features of known items. The processor identifies a group of candidate items among the known items responsive to insufficient matches between the features of the purchase item and the features of any one of the known items. The processor displays information identifying the candidate items, receives a command selecting one of the candidate items as matching the purchase item, and adjusts information in the database that defines the features of the selected one of the candidate items based on the features of the purchase item. |
| US09412091B2 |
Dynamic adaption of electronic routing slips for financial messaging
Embodiments of the present invention disclose a method, computer program product, and system for generating a routing slip for a message. A computer system determines an appropriate sub-flow for the message. The sub-flow dictates a sequence of processing steps for the message. The computer system generates a routing slip for the message based on the appropriate sub-flow. The routing slip provides an order for executing one or more processing steps of the sub-flow. The computer system associates the routing slip to the message. The processing steps of the sub-flow are executed by the computer system according to the routing slip. In an embodiment, the message is a financial message describing at least one financial transaction. |
| US09412089B2 |
Method for securely linking hospital patients to their service provider accounts
Methods and systems for linking a service provider account with patient care information are disclosed. A patient's account information is received. A service account for the patient is identified, and an association between a patient's care record and the service account is stored. Care information for the patient is received and transmitted to a device associated with the patient's service account. |
| US09412083B2 |
Aggregation and workflow engines for managing project information
A system includes an aggregation engine that initiates a first interface module in response to a first request from a first user that indicates a first type of project information. The aggregation engine also receives, via the first interface module, the first type of project information and stores the first type of project information in a memory. The system additionally includes a workflow engine that initiates one or more workflows that indicate certain project information requested by an external group. The workflow engine retrieves, from the memory and based upon the initiated one or more workflows, a first subset of the first type of project information and formats the first subset of project information according to the workflow. The system also includes an export engine that transmits the formatted first subset of project information to the external group according to the initiated one or more workflows. |
| US09412079B2 |
System and method of scenario versioning
A system and method is disclosed for scenario management. The system includes a database configured to store data describing a plurality of scenarios, each scenario comprising one or more fields and data describing the supply chain network comprising a plurality of network components, each network component configured to supply one or more items to satisfy demand. The system further includes a server coupled with the database; the server accesses the data describing the plurality of scenarios and accesses the data describing the supply chain network. The server further traverses the one or more fields of the plurality of scenarios until a value is determined and stores the determined value in the database for each of the one or more fields of the plurality of scenarios. |
| US09412077B2 |
Method and apparatus for classification
The present invention provides a method and apparatus for classification. In the embodiments of the present invention, data to be predicted is input into M target classifiers respectively, so as to obtain the predicted result output by each target classifier of the M target classifiers, where M is an integer greater than or equal to 2, and each of the target classifiers is independent of another, so that a classification result of the data can be obtained according to the predicted result output by each of the target classifiers and a prediction weight of each of the target classifiers; and since each target classifier of the M target classifiers is independent of another, the classification result of the data can be obtained by making full use of the classification capability of each target classifier, thus improving the accuracy of the classification result. |
| US09412075B2 |
Automated scaling of multi-tier applications using reinforced learning
A module and method for automatically scaling a multi-tier application, wherein each tier of the multi-tier application is supported by at least one virtual machine, selects one of reinforced learning and heuristic operation based on a policy to recommend a scaling action from a current state of the multi-tier application. If reinforced learning is selected, the reinforced learning is applied to select the scaling action from a plurality of possible actions for the multi-tier application in the current state. If heuristic operation is selected, the heuristic operation is applied to select the scaling action using a plurality of defined heuristics. |
| US09412072B2 |
System and method for improving the flight safety
The present invention relates to a system for improving the flight safety, comprising: a prediction component which predicts behaviors of an aircraft; and an indication component which indicates adjustment of an operation of the aircraft to reduce the possibility of occurrence of abnormal flying behaviors. |
| US09412069B1 |
Information infrastructure enabling mind supportable by universal computing devices
Methods and systems provide the infrastructure supporting an omniphysical mind or descriptive self supportable by a computing device. The infrastructure includes descriptive information capabilities and special symbols that support the capabilities. For example, a system may include at least one processor and memory storing a database that includes symbols, definitions of symbols, and processing rules. Symbol in the database may represent awareness capabilities, a categorization capability, a decision capability, a safety capability, a report capability, and a self-initiate capability. One special symbol may represent the ability of the system to organize and call the other special symbols that support the infrastructure. |
| US09412063B2 |
Transform architecture for multiple neurosynaptic core circuits
Embodiments of the present invention provide a method for feature extraction using multiple neurosynaptic core circuits including one or more input core circuits for receiving input and one or more output core circuits for generating output. The method comprises receiving a set of input data via the input core circuits, and extracting a first set of features from the input data using the input core circuits. Each feature of the first set of features is based on a subset of the input data. The method further comprises reordering the first set of features using the input core circuits, and generating a second set of features by combining the reordered first set of features using the output core circuits. The second set of features comprises a set of features with reduced correlation. Each feature of the second set of features is based on the entirety of said set of input data. |
| US09412061B2 |
Sensing radio frequency identification device with reactive strap attachment
A sensing radio frequency identification device with a strap that is reactively attached to an antenna by a sensing material is provided. In one embodiment, the RFID device includes an antenna, an interposer (or strap), an integrated circuit coupled to the interposer, and a sensing material disposed between the interposer and the antenna. As the relative permittivity of the sensing material changes in response to its exposure to an environmental condition, the reactive coupling between the interposer and the antenna likewise changes thereby causing changes in one or more parameters of communication such as frequency. The sensing material 70 may be a dielectric material selected to have a relative permittivity (i.e., dielectric constant) that varies based on exposure to one or more environmental conditions such as, for example, temperature (i.e., hot or cold), humidity, chemical, biological entity, nuclear, physical, pressure, light, liquid, nuclear and/or other condition. |
| US09412056B1 |
Image forming apparatus performing image quality adjustment based on period image forming assembly unloaded and forming final image while image forming assembly replaced
An image forming apparatus includes individually replaceable image forming assemblies forming images of different colors; a storage portion that stores time when at least one image forming assembly currently loaded into the apparatus is unloaded; a calculating portion that calculates an unloaded-engine storage period, time elapsed from when a newly loaded image forming assembly is unloaded last time to when the image forming assembly is newly loaded; and a controller that performs image quality adjustment depending on the unloaded-engine storage period calculated before the newly loaded image forming assembly is used for image formation. The apparatus receives image data of an image that contains a color other than colors that currently loaded image forming assemblies form. The apparatus forms a final image based on the image data on a sheet through image forming operations on the same sheet while at least one of the loaded image forming assemblies is replaced. |
| US09412052B1 |
Methods and systems of text extraction from images
A method for extracting text from an image data is disclosed. The method includes pre-processing, via a processor, the image data to obtain a readable image data. The method further includes filtering, via the processor, a plurality of copies of the readable image data using a plurality of noise filters to obtain a corresponding plurality of noise removed images. Yet further, the method includes performing, via the processor, image data recognition on each of the plurality of noise removed images to obtain a text copy associated with each of the plurality of noise removed images. Moreover, the method includes ranking, via the processor, each word in the text copy associated with each of the plurality of noise removed images based on a predefined set of parameters. Finally, the method includes selecting, via the processor, highest ranked words within the text copy associated with each of the plurality of noise removed images to obtain output text for the image data. |
| US09412048B2 |
Systems and methods for cookware detection
Systems and methods for cookware detection are provided. One example system includes a vision sensor positioned so as to collect imagery depicting a cooktop. The system includes one or more processors and one or more non-transitory computer-readable media storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations. The operations include obtaining a frame of imagery depicting the cooktop and using a classifier to classify the frame of imagery as either depicting cookware or not depicting cookware. When the frame is classified as depicting cookware, the operations include performing one or more operations in response to the detected cookware. |
| US09412047B2 |
Medical information processing apparatus
Disclosed is a medical information processing apparatus including a medical information storage unit in which a piece of position information in a model image of a human body and a piece of medical information are stored, a first display control unit which displays a medical image, a specifying unit which specifies a focus position in the medical image, an extraction unit which converts a piece of position information of the focus position into a piece of position information in the model image and which extracts a piece of medical information corresponding to the piece of position information in the model image from the medical information storage unit, a second display control unit which displays the piece of medical information as a selection candidate, a selection unit which selects a piece of medical information, and a creation unit which creates an interpretation report by using the piece of medical information. |
| US09412045B2 |
Commodity registration apparatus and commodity registration method
A commodity is learnt and stored in an HDD on the basis of a commodity image captured by an image capturing section. Commodity registration is carried out through a key input. The commodity which is not stored in the HDD yet is stored in the HDD as commodity data when the commodity registration is carried out through a key input, in this way, the registration as a learnt commodity is realized. Then the target commodity captured by the image capturing section is read from the commodity data stored in the HDD. In this way, the commodity image can be added and learnt based on that the unregistered commodity is input through a key operation by the operator. |
| US09412036B2 |
Methods and systems for object detection based on column-wise and row-wise sums of pixel values
In one example embodiment, a method includes determining at least one of integral column sums and integral row sums for pixels of an image and determining at least one of a column-wise sum of pixel values and a row-wise sum of pixel values associated with an area within the image based on at least one of the determined integral column sums and the determined integral row sums corresponding to a plurality of the pixels forming the area. |
| US09412035B2 |
Place-based image organization
Systems and methods for image organization are provided. An computing device in accordance with embodiments of the present disclosure includes a processor configured to receive an image set comprising a plurality of images, compare a portion of each image in the image set with a verified cue library including a plurality of visual cues that correspond to different geographic place tags, and display a recommendation panel including a recommended place tag corresponding to a visual cue that matches the portion. |
| US09412033B2 |
Image processing apparatus capable of preventing page missing, control method therefor, and storage medium
An image processing which is capable of preventing page missing even when there is an image having no foreground image. In a case where a foreground image is extracted from an obtained image, the foreground image is generated as an image for one page, and in a case where no foreground image is extracted from the obtained image, an image indicating that no foreground image is extracted is generated as an image for one page. |
| US09412027B2 |
Detecting anamolous sea-surface oil based on a synthetic discriminant signal and learned patterns of behavior
A behavioral recognition system may include both a computer vision engine and a machine learning engine configured to observe and learn patterns of behavior in video data. Certain embodiments may be configured to detect and evaluate the presence of sea-surface oil on the water surrounding an offshore oil platform. The computer vision engine may be configured to segment image data into detected patches or blobs of surface oil (foreground) present in the field of view of an infrared camera (or cameras). A machine learning engine may evaluate the detected patches of surface oil to learn to distinguish between sea-surface oil incident to the operation of an offshore platform and the appearance of surface oil that should be investigated by platform personnel. |
| US09412023B1 |
Method to determine wettability of rock samples using image analysis
A method is disclosed for determining wettability in a subsurface reservoir. Embodiments of the method utilize image analysis techniques for determining wettability indicator values. Wettability indicator values may be determined based on a hydrocarbon wet fraction and a water wet fraction of pore linings, which may both be determined by image analysis of pore walls lined with hydrocarbons using images of sections obtained from core samples. Further details and advantages of various embodiments of the method are described in more detail herein. |
| US09412015B2 |
Image-capturing apparatus, captured image processing system, and recording medium
A mobile terminal apparatus includes a geometrical arrangement detecting section (111) detecting groups of edge pixels arranged in a shape of a line segment in an image captured by an image-capturing apparatus; and a display processing section (112) causes a contour line representative of a contour of a rectangular captured object to be displayed on the captured image displayed on a display section so that the contour line is superimposed on the groups of edge pixels detected by the geometrical arrangement detecting section (111). |
| US09412004B2 |
Biometric coding
A database stores a number N of biometric data representatives which correspond to a set of characteristics of said biometric data. Acquired biometric data is obtained. Then, transformed biometric data is obtained by transforming the acquired biometric data according to said set of characteristics. Next, N deviation values are obtained by applying a comparison between the transformed biometric data and the N representatives in the database. Finally, a vector representing the acquired biometric data is obtained, the representation vector having a number of components less than or equal to N, said components being determined in relation to said N deviation values. |
| US09412002B2 |
Wearable electronic device having a fingerprint identification display
Particular embodiments described herein provide for a wearable electronic device, such as a bracelet, watch, wristband or armband that includes a circuit board coupled to a plurality of electronic components (which may include any type of components, elements, circuitry, etc.). One particular example implementation of a wearable electronic device may include a strap portion and a first display portion included in the strap portion. The first display portion can include a main display and a first fingerprint sensor configured to capture one or more fingerprints placed on the main display at one or more capture locations. The captured fingerprints can be used to identify a user and log-in the user to the device if the user is authorized to log-in to the device. A fingerprint can also be captured for a finger placed on a secondary display that may be contained in a latch portion of the device. |
| US09412000B1 |
Relative positioning of a mobile computing device in a network
In an approach to determining a relative position for each computer of a group of computers within a wireless network to a computer within the wireless network, a computer receives a set of digital image files from each computer and aggregates the set of digital image files into a panoramic digital image file. The computer generates a network map depicting a position of each of the computers based on the panoramic digital image file. The computer determines a relative position map for at least one computer based on the network map and the panoramic digital image file, wherein the relative position map provides a location of each computer of the group of computers with respect to the at least one computer. The computer receives input from the at least one computer, the input using the relative position map to send data to one or more of the group of computers. |
| US09411990B2 |
Working method of a multi-slot card reader based on the standard CCID protocol
A working method of a multi-slot card reader based on the standard CCID protocol comprises: powering up to perform initialization, and establishing a connection with a host through a USB interface; when a USB configuration instruction is received, returning configuration information of the USB interface to the host; waiting to receive an instruction delivered by the host, when a flag bit of a reset is detected, determining the type of the flag bit of the reset, for example, if the flag bit is a contact card flag bit, recording, according to the type of a change of a card placement pin level of a current contact card slot, a corresponding state of the contact card slot, or for example, if the flag bit is a periodic flag bit, sending a card search instruction corresponding to a current non-contact card slot, and recording a corresponding state of the non-contact card slot; and if the flag bit is a USB flag bit, performing a corresponding operation on a current card slot according to the received instruction. The card reader adopts a USB chip having multiple terminations and serves as a composite device of the standard CCID. When accepting access of a host, the card reader access different card slots through different terminations, so that the compatibility is desirable. |
| US09411987B2 |
Low noise and low power passive sampling network for a switched-capacitor ADC with a slow reference generator
Certain aspects of the present disclosure provide various sampling networks for switched-capacitor integrators, which may be used in switched-capacitor analog-to-digital converters (ADCs). Rather than having both an input sampling capacitor and a reference sampling capacitor, certain aspects of the present disclosure use a shared sampling capacitor for the reference voltage and the input voltage, thereby reducing ADC input-referred noise, decreasing op amp area and power, and avoiding anti-aliasing filter insertion loss. Furthermore, by sampling the reference voltage during the sampling phase and sampling the input voltage during the integration phase using the shared sampling capacitor, a high-bandwidth reference buffer need not be used for the reference voltage. |
| US09411980B2 |
Preventing modifications to code or data based on the states of a master latch and one or more hardware latches in a hosting architecture
A service provider can maintain one or more host computing devices that can be accessed as host computing device resources by customers. A hosting platform includes components arranged in a manner to limit modifications to software or firmware on hardware components. In some aspects, the hosting platform may include a master latch that indicates whether the components may be configured, and the master latch may be set once and only reset upon completion of a power cycle. In another aspect, the hosting platform can implement management functions for establishing control plane functions between the host computing device and the service provider that is independent of the customer. Additionally, the management functions can also be utilized to present different hardware or software attributes of the host computing device. |
| US09411977B2 |
System and method for enforcing role membership removal requirements
System and method for enforcing role membership removal requirements are described. In one embodiment, the method includes, responsive to receipt of a removal request, performing a role evaluation of the removal request to generate a policy request; performing a policy evaluation of the policy request; generating a policy response in accordance with the policy evaluation; and enforcing the policy response. |
| US09411975B2 |
Methods and apparatus to securely share data
Methods and apparatus to securely share data are disclosed. An example includes generating, at a first device of a first user of cloud services, an archive file representative of a drive of the first device; encrypting, via a processor, the archive file to form an encrypted archive file; and conveying the encrypted archive file to a cloud service provider, the encrypted archive file to be decrypted by a second device of a second user of the cloud services, the decrypted archive file to be mounted to an operating system of the second device. |
| US09411973B2 |
Secure isolation of tenant resources in a multi-tenant storage system using a security gateway
Machines, systems and methods for handling a client request in a hierarchical multi-tenant data storage system, the method comprising processing a request in subtasks, wherein a subtask is executed with a minimal set of privileges associated with a specific subtenant; extracting a claimed n-level hierarchy of a tenant and sub-tenant identities from the request; extracting authentication signatures or credentials that correspond to a level in the hierarchy; for a first level in the hierarchy, sending the request to a dedicated subtenant authenticator with privilege to validate credentials for a subtenant at the first level; and receiving a confirmation from the dedicated subtenant authenticator, whether the request is authentic. |
| US09411972B2 |
System and method for creating and protecting secrets for a plurality of groups
A method for protecting a first secrets file. The method includes an n-bit generator generating a secrets file name for the secrets file and generating a decoy file names for decoy files. The secrets file includes a secret. Each of the decoy files includes decoy file contents, are a same size as the secrets file, and is associated with a modification time within a range of modification times. The modification time of the secrets file is within the range of modification times. The secrets file and decoy files are stored in a secrets directory. |
| US09411971B2 |
Automatically preventing unauthorized signatories from executing electronic documents for organizations
In some embodiments, an electronic signature service automatically updates electronic documents to prevent execution by an unauthorized signatory. The electronic signature service can receive an electronic document to be electronically signed on behalf of an organization. The electronic signature service can retrieve organization data indicative of signatories that are authorized to electronically sign the electronic document. The organization data may be inaccessible to a first signatory that is associated with the document. The electronic signature service can determine from the organization data that the first signatory is not authorized to electronically sign the document. The electronic signature service can update the electronic document with a second signatory that is determined from the organization data as being authorized to execute the document. The electronic signature service can prevent the first signatory from executing the document and provide access to the electronic document by a computing device associated with the second signatory. |
| US09411968B2 |
Apparatus and method for performing different cryptographic algorithms in a communication system
A communication apparatus performs encryption on data transmitted from another communication apparatus by using first or second cryptographic algorithm, or performs decryption on the data that has been encrypted using the first or second cryptographic algorithm, by using one of the first and second cryptographic algorithms used for the encryption, where the second cryptographic algorithm provides a higher security level than the first cryptographic algorithm. The communication apparatus includes an encryption unit configured to perform, upon receiving the data including a cryptographic class identifying a parameter to be used for performing the encryption or the decryption, the encryption or the decryption by using one of the first and second cryptographic algorithms, based on the cryptographic class. |
| US09411966B1 |
Confidential data access and storage
A system is described for managing storage and access of confidential data downloaded from a server (e.g., an enterprise data server) onto a mobile device. The confidential data may be received over a network directly or be embedded as part of an email or other application. Instead of storing the data item locally, the data item may be communicated to a peripheral device that is communicatively coupled to the mobile device via a peripheral interface. The data item is encrypted and stored on the peripheral device. |
| US09411963B2 |
Visual display of risk-identifying metadata for identity management access requests
An identity management system is augmented to enable a manager to associate “risk” metadata with different types of access requests representing computer system accounts that can be requested by authorized users. When an authorized user then requests access to a particular account, any “risk” associated with that access is shown to the user, typically in the form of a visual “badge” or other such indicator. The badge includes an appropriate informational display (e.g., “High Risk” or “Regulated”) that provides an appropriate risk warning. The risk metadata badge information preferably also is displayed for risk-based access request approval routing; in such context, the risk metadata may also determine the risk approval workflow itself. Thus, for example, if the risk metadata is present when the authorized user requests access, an approval workflow may be modified so that the request approval is routed appropriately. |
| US09411961B2 |
Extension component for authenticating game data
Disclosed are methods, apparatus and systems, including computer program products, implementing and using techniques for authenticating data for playing a game of chance on a gaming machine. A motherboard is provided in the gaming machine. A peripheral component is in communication with the motherboard over a bus. The peripheral component has access to authentication code in a memory. An authentication instruction message is received over the bus. Responsive to receiving the authentication instruction message, the authentication code is executed on a processor to perform an authentication process on the data. A signal is output, indicating whether the authentication process is successful in authenticating the data. In one implementation, the signal enables play of the game of chance on the gaming machine when the authentication process is successful, and disables play of the game of chance when the authentication process is unsuccessful. |
| US09411955B2 |
Server-side malware detection and classification
A server-side system that detects and classifies malware and other types of undesirable processes and events operating on network connected devices through the analysis of information collected from said network connected devices. The system receives information over a network connection and collects information that is identified as being anomalous. The collected information is analyzed by system process that can group data based on optimally suited cluster analysis methods. Upon clustering the information, the system can correlate an anomalous event to device status, interaction, and various elements that constitute environmental data in order to identify a pattern of behavior associated with a known or unknown strain of malware. The system further interprets the clustered information to extrapolate propagation characteristics of the strain of malware and determine a potential response action. |
| US09411954B2 |
Managing software deployment
The method includes identifying an instance of software installed. The method further includes determining a fingerprint corresponding to the instance of software installed. The method further includes determining a security risk associated with the instance of software installed. The method further includes identifying a software management policy for the instance of software based upon the fingerprint, security risk, and designated purpose of the computing device. In one embodiment, the method further includes in response to identifying the software management policy, enforcing, by one or more computer processors, the software management policy on the instance of software installed on the computing device. |
| US09411950B1 |
Methods and systems for user authentication in a computer system using image-based log-ins
Systems and methods are disclosed for computer-based user authentication to prove user identity or to approve access to a resource such as a computer system, in which a user performs a set of actions on at least one verification image on a display screen. Users are authenticated by a computer comparing the set of actions against a key definition for the verification image. The set of actions may include selecting at least one target location on the image, selecting target locations in a selected order, selecting the target locations with a selected pattern, selecting at least one overlay with which to cover a one target location, superimposing a target location with a selected overlay, covering the target locations with overlays in a selected superimposing order; and covering the target locations with overlays in a selected superimposing pattern. |
| US09411948B1 |
Shuffled passcode authentication for cryptographic devices
A first cryptographic device is configured to generate a passcode for submission to a second authentication device. The second authentication device determines a particular type of shuffling to be applied to a passcode in conjunction with submission of that passcode for authentication, and verifies that the passcode has been entered in accordance with the particular type of shuffling. The first cryptographic device may comprise an authentication token and the second cryptographic device may comprise at least one authentication server. By way of example, the second cryptographic device may generate a shuffle indicator signal specifying the particular type of shuffling, such that the shuffle indicator signal can be transmitted and thereby made apparent to a user associated with the first cryptographic device. The user then alters his or her manner of entry of the passcode based on the received shuffle indicator signal, such as entering the passcode in a reverse order. |
| US09411947B2 |
Method for managing security of a data processing system with configurable security restrictions
Techniques for managing security of a data processing system are described herein. According to one embodiment, in response to a request for modifying a security settings of a data processing system, a message is displayed on a display of the data processing system to request a user who operates the data processing system to perform a physical action to prove that the user was physically present to issue the request for modifying the security settings. It is verified whether a user action physically performed by the user conforms to the requested physical action. The security settings of the data processing system is modified, in response to determining that the user action conforms to the requested physical action. |
| US09411944B2 |
Biometric access sensitivity
The present application provides methods and corresponding systems for accessing services on a gaming device which, in certain embodiments, include the step or steps of receiving at least one item of identity verification data from a user of a gaming device; enabling at least one service, such as a wager-type game, on the gaming device based on a match between the at least one item of identity verification data received and at least one item of identity verification data obtained previously; displaying an interface screen comprising graphic objects associated with the wager-type game and at least one selectable element for the user to submit a gaming command and a wagering command during game play; obtaining at least one item of user change data from a user during game play; and prompting the user for identity verification data when a user change is suspected based on the at least one item of user change data. |
| US09411941B2 |
Method and device for computing molecular isotope distributing and for estimating the elemental composition of a molecule from an isotopic distribution
The current invention concerns a method for identifying the elemental composition of and/or quantifying the presence of mono-isotopic elements in a molecule in a sample by computing a solution of a system of linear equations ΣαEiαnα=Fi, whereby the set of numbers Fi comprises said set of relative peak heights from the aggregated isotopic distribution and the coefficients Eiα of said linear system comprise powers and/or power sums of roots rα,iα. The present invention also provides a method for analyzing at least part of an isotopic distribution of a sample, comprising obtaining data comprising at least one probability qj with which a j'th aggregated isotopic variant of said molecule with mass number Aj occurs within said aggregated isotopic distribution; and computing a probability qi with which an i'th aggregated isotopic variant occurs within said aggregated isotopic distribution, by taking a linear combination of said at least one probability qj. |
| US09411937B2 |
Detecting and classifying copy number variation
The invention provides a method for determining copy number variations (CNV) of a sequence of interest in a test sample that comprises a mixture of nucleic acids that are known or are suspected to differ in the amount of one or more sequence of interest. The method comprises a statistical approach that accounts for accrued variability stemming from process-related, interchromosomal and inter-sequencing variability. The method is applicable to determining CNV of any fetal aneuploidy, and CNVs known or suspected to be associated with a variety of medical conditions. CNV that can be determined according to the method include trisomies and monosomies of any one or more of chromosomes 1-22, X and Y, other chromosomal polysomies, and deletions and/or duplications of segments of any one or more of the chromosomes, which can be detected by sequencing only once the nucleic acids of a test sample. |
| US09411932B2 |
Image management apparatus
An image management apparatus includes: a display; a storage unit that stores first operation information, input by a first user, performed on a series of images that are acquired in examination and on the display, such that the first operation information and identification information of the image on which the operation is performed are associated with one another, and stores second operation information, input by a second user, performed on the series of images that are acquired in the examination and on the display, such that the second operation information and identification information of the image on which the operation is performed are associated with one another; and an extraction unit that extracts an image group from the series of images based on whether the identification information of the image associated with the first operation information overlaps with the identification information of the image associated with the second operation information. |
| US09411928B2 |
Discontinuous integration using half periods
Apparatuses and methods of frequency hopping algorithms are described. One method monitors a signal on one or more electrodes of a sense network at a first operating frequency and detects noise in the signal at the first operating frequency. The method then switches to a second operating frequency, based on said detecting, for scanning the electrodes to detect a conductive object proximate to the plurality of electrodes, wherein a constant integration time is used for one half-period when scanning the electrodes at both the first and second operating frequencies. |
| US09411924B2 |
Methodology for pattern density optimization
The present disclosure relates to a method of improving pattern density with a low OPC (optical proximity correction) cycle time, and an associated apparatus. In some embodiments, the method is performed by forming an integrated chip (IC) design that is a graphical representation of an integrated chip. One or more low-pattern-density areas of the IC design are identified having a pattern density that results in a processing failure. The low-pattern-density areas are a subset of the IC design. The pattern density is adjusted within the low-pattern-density area by adding one or more dummy shapes within the low-pattern-density areas. A data preparation process is then performed on the IC design to modify shapes of the one or more dummy shapes within the low-pattern-density areas. By introducing dummy shapes into a local area, rather than into an entire integrated chip design, the demands of the subsequent data preparation process are reduced. |
| US09411922B2 |
Yield optimization of processor with graphene-based transistors
Techniques described herein generally include methods and systems related to the selection of a combination of graphene and non-graphene transistors in an IC design. To reduce the increase in leakage energy caused by graphene transistors, selected non-graphene transistors may be replaced with graphene transistors in the IC design while other non-graphene transistors may be retained in the IC design. To limit the number of graphene transistors in the IC design, graphene transistors may replace non-graphene transistors primarily at locations in the IC design where significant delay benefit can be realized. |
| US09411921B2 |
FET-bounding for fast TCAD-based variation modeling
A method for analyzing circuits includes identifying one or more device zones in a full device structure. The device zones provide areas of interest to be analyzed. A partial device is generated that representatively includes the one or more device zones. Analytical meshes of the partial device are reduced by employing physical characteristics of the full device structure. The partial device is simulated, using a processor, to obtain device output information in the areas of interest that is representative of the full device structure. Systems are also disclosed. |
| US09411919B2 |
Method and apparatus for bitcell modeling
A methodology for the simulation of semiconductor memory devices that exhibits improved accuracy and speed, and the apparatus performing the methodology are disclosed. Embodiments may include determining a state of a bitcell of an integrated circuit (IC) design, determining a first threshold voltage for the bitcell based on the state of the bitcell, and simulating electrical characteristics of the bitcell according to the first threshold voltage to verify the IC design. |
| US09411917B2 |
Methods and systems for modeling crowdsourcing platform
Methods and systems for creating statistical model. Values of at least one output parameter corresponding to each combination of values of a set of input parameters are collected. The at least one output parameter and the set of input parameters are associated with one or more crowdsourcing tasks. Each combination of the values of the set of input parameters is determined based on at least one of one or more design of experiments or a historical data. Further, a distribution of the values of the at least one output parameter is determined. The statistical model is created based on the values of the set of input parameters and one or more characteristics associated with the distribution of the values of the at least one output parameter. |
| US09411913B2 |
Wear-out detection methods for printed circuit board assembly components used in downhole oilfield environments
A method, apparatus and computer-readable medium for determining a lifespan of an electronic component in a downhole environment is disclosed. A first wear-out model is created that is related to a selected electronic component. A physical condition of the selected electronic component is examined at a selected examination time. The physical condition is generally due to the downhole environment in which the electronic component is disposed. A second wear-out model for the selected electronic component is created from the first wear-out model and the examined physical condition of the selected electronic component. |
| US09411909B2 |
Method and apparatus for pushing network information
A method and apparatus for pushing network information are provided. The method includes: obtaining browser data uploaded by a browser; classifying the browser data uploaded via a classification model and determining a category of the browser data; obtaining network information related to the category, pushing the network information obtained to the browser. |
| US09411903B2 |
Generalized faceted browser decision support tool
Embodiments of the present invention provide a faceted browser for decision-making that enables interactive visualization of a decision space as choices are made. According to one embodiment, a computer-implemented method comprises receiving a selection of a first choice from a user. The first choice is displayed in a user interface that includes a plurality of facets, each facet including a plurality of choices. The method further comprises disabling at least one second choice in response to the selection of the first choice, and determining a first result set in response to the selection of the first choice. The user interface is then updated in real-time to display the selected status of the first choice, the disabled status of the second choice, and the first result set to the user. |
| US09411902B2 |
Retrieving content from website through sandbox
A client system interacts with a sandbox environment to host a web browser control within the sandbox. A webpage URL, a URL to a script file to be injected into the webpage, a name of the script method to be invoked, and the event to look for to trigger the script method sent to the sandbox environment from the client. The sandbox environment downloads the script file from the cloud using the script URL and loads a rendering engine with the specified webpage URL. The specified script file is subsequently injected into the loaded webpage at the sandbox environment. After the specified event is fired, the sandbox environment triggers the specified script method and stores the results within a results array, accessible to the client system. |
| US09411901B2 |
Managing satellite and aerial image data in a composite document
A method in a computing device for generating a composite document includes receiving drawing data from a user interface, where the drawing data includes a plurality of two-dimensional shapes, and generating a first data structure that includes the received drawing data. The method further includes receiving a reference to a geographic location from the user interface and, in response to receiving the reference to the geographic location, retrieving photograph data corresponding to the received reference, where the photograph data includes at least one of satellite image data and aerial image data for the geographic location. |
| US09411899B2 |
Contextual breadcrumbs during navigation
A system and method of providing contextual breadcrumbs is disclosed. A current page may be caused to be displayed on a device. Contextual breadcrumbs may be caused to be displayed on the current page. The contextual breadcrumbs may comprise a simplified representation of a first different page. The first different page may be different from the current page. The simplified representation of the first different page may comprise context information regarding a function of the first different page. The context information regarding a function of the first different page may comprise a visual representation of functional options of the first different page. At least one of the contextual breadcrumbs may be configured to enable the user to act upon the functional options of the first different page from the current page. |
| US09411895B2 |
Personalized deeplinks for search results
Search results are provided with personalized deeplinks for an end user. User behavior information is gathered regarding web pages visited by the end user. When the end user submits a search query, the website category of a search result is identified and user behavior information regarding web pages visited at other websites within the website category is identified. At least one deeplink is selected for the search result based on that user behavior information. In some instances, user behavior information may be tracked for a group of end users. The user behavior information for the group of end users may be used in conjunction with the user behavior information for the end user to facilitate deeplink selections for search results returned in response to search queries from the end user. |
| US09411888B2 |
Hosted video discovery and publishing platform
A hosted system provides any Internet user with the ability to quickly set up and customize a video channel, preferably as a web page or site that can be reached from any Internet-accessible device having a browser. The solution includes tools for use by channel site creators to customize look, feel, and page design. A particular web page or site may be associated with a given subject. A page or site that has such an association is sometimes referred to as “subject-specific.” Once a subject-specific channel is created, a site administrator or individual visitors can search and choose to bring those search results into the channel architecture. The system also enables a multiplatform search, and search results may be automatically populated into the channel content. The system enables the characterization of the material returned, preferably according to a user-generated taxonomy. |
| US09411886B2 |
Ranking advertisements with pseudo-relevance feedback and translation models
Methods, computer products, and systems for selecting advertisements in response to an internet query are provided. The method provides for receiving an internet query having query terms, and retrieving and ranking a first set of advertisements using a query likelihood model. Sampling words are selected using pseudo-relevance feedback and translation models, the internet query, and the first set of ad materials. Sampling words are chosen from the words in the first set, and the pseudo-relevance feedback model is used to select word w in the distribution of words based on a probability that w generates query term q(p(q|w)). The translation model calculates p(q|w) based on a translation probability that w translates into q(t(q|w)). A second set of ad materials are retrieved and ranked using an expanded query which adds the selected sampling words to the original query. The second set of ad materials is presented to the user. |
| US09411884B1 |
Noise based interest point density pruning
Systems and methods for noise based interest point density pruning are disclosed herein. The systems include determining an amount of noise in an audio sample and adjusting the amount of interest points within an audio sample fingerprint based on the amount of noise. Samples containing high amounts of noise correspondingly generate fingerprints with more interest points. The disclosed systems and methods allow reference fingerprints to be reduced in size while increasing the size of sample fingerprints. The benefits in scalability do not compromise the accuracy of an audio matching system using noise based interest point density pruning. |
| US09411883B2 |
Audio signal processing apparatus and method, and monitoring system
The invention discloses an audio signal processing apparatus and method and a monitoring system. The audio signal processing apparatus includes: a window dividing unit for sequentially reading an inputted audio signal using a sliding window; an energy calculating unit for calculating energy of each frame of the audio signal in each window; a segmenting unit for segmenting, according to distribution of the energy of each frame of the audio signal in each window, the audio signal in the window into multiple segments, such that each segment includes successive frames with approximate energies; a classifying unit for classifying the audio signal in each segment using at least one sound model; and a recognizing unit for recognizing a sound class of the audio signal in each segment according to a result of the classifying by the classifying unit. |
| US09411880B2 |
System and method for dynamically configuring content-driven relationships among data elements
A computer system configures data elements based on textual sources by identifying subunits of a textual source, indexing the subunits into a sequence comprised of terms, identifies based on a target a base subsequence of the sequence, and stores the terms in such a way that they can be expanded or contracted and a user can rapidly and efficiently derive relevant information and context even from a vast amount of information including by navigable display to the user. Other methods and systems of configuring and displaying data elements from textual sources are provided. |
| US09411879B2 |
Systems, methods, and interfaces for aggregating and providing information regarding legal professionals
The present inventors devised systems, methods, interfaces, and software that can facilitate identification of law firms and/or legal professionals. One exemplary system receives queries from users regarding a legal topic and responds with a listing of attorneys or law firms that are associated with information ranking them based on their experience in handling matters related to the legal topic. The ranking information is based on links between attorneys and public legal documents, such as judicial opinions, court dockets, briefs, litigation documents, journal articles, patents, trademarks, and so forth that mention them by name. |
| US09411878B2 |
NLP duration and duration range comparison methodology using similarity weighting
A mechanism is provided in a question answering system for duration similarity weighting in a question answering system. The question answering system receives an input question. The question answering system generates a plurality of candidate answers to the input question using a corpus of information. The question answering system identifies a question-side duration value for the input question and identifies a policy-side duration value for a policy to be applied to an entity identified in the input question. The question answering system determines a duration similarity weight for each of the plurality of candidate answers. The question answering system applies the duration similarity weight to each of the plurality of candidate answers. The question answering system ranks the plurality of candidate answers and outputs one or more of the candidate answers. |
| US09411877B2 |
Entity-driven logic for improved name-searching in mixed-entity lists
According to one embodiment of the present invention, a method for name searching in mixed-entity lists is provided which comprises dividing a mixed list of entities into a plurality of entity-specific lists. A name to be searched is then categorized into a category and a specialized search logic is applied to the name to be searched. The specialized search logic is selected to be adapted to the category and uses a one of the entity-specific lists that corresponds to the category of the name to be searched. A shared search logic may also be employed, which is used for all names to be searched. |
| US09411875B2 |
Tag refinement strategies for social tagging systems
Techniques are generally described related to tag refinement strategy. One example method for refining homonyms and synonyms in a plurality of tags may include receiving, by a tag refinement system, a plurality of tagging actions each of which associates one or more of the plurality of tags with a digital object. The method may further include extracting, by the tag refinement system, a first subset of tags from the plurality of tags, wherein the first subset of tags have a higher collective relativity-similarity score comparing to a second subset of tags selected from the plurality of tags, and the first subset of tags, different from the second subset of tags, have a same predetermined tag count as the second subset of tags. |
| US09411870B2 |
System and method for location aware fine-grained multi-channel synchronization of mobile repositories along with aggregate analytic computation
System and method for location aware fine-grained multi-channel synchronization of mobile repositories along with aggregate analytic computation is disclosed. The System is able to improve upon existing systems by allowing for custom policies on synchronization to be stored and applied when data synchronization happens, these policies are persisted in the Sync Data Repository and applied during sync. The System is able to improve upon existing systems by allowing for persistent marking of states of the sync repository as Sync Points. This way data can be pulled from a sync point. The System is able to improve upon existing systems by having a computation framework that is able to push down aggregate analytics to user, these analytics are computed by analyzing data in the Sync Channel along various dimensions such as temporal, geo. |
| US09411869B2 |
Replication between sites using keys associated with modified data
Systems and methods are disclosed for replicating data stored in an in-memory data cache to a remote site. An example system includes an in-memory data cache and an in-memory keys cache. The system also includes a key insert module that detects a modification to the in-memory data cache, identifies one or more keys of the plurality of keys based on the modification, and inserts the identified one or more keys into the in-memory keys cache. The system further includes an update module that retrieves from the in-memory keys cache a set of keys, retrieves from the in-memory data cache modified data associated with the set of keys, and transmits to a remote site a modification list including the set of keys and the modified data associated with the set of keys. |
| US09411862B1 |
Systems and methods for dynamic sharding of hierarchical data
A method for serving a request for hierarchical data includes receiving, at a processing circuit, a request for hierarchical data stored in one or more databases. The request includes an indication of a particular data hierarchy. The method further includes identifying, by the processing circuit, one or more entity count records corresponding to the particular data hierarchy. The entity count records indicate a distribution of the hierarchical data within the data hierarchy. The method further includes splitting the request for hierarchical data into a plurality of sharded requests based on the distribution of the hierarchical data indicated by the one or more entity count records, assigning the plurality of sharded requests to one or more processing sites for processing at least a subset of the sharded requests in parallel, and reporting a combined result of processing the plurality of sharded requests. |
| US09411861B2 |
Multiple result sets generated from single pass through a dataspace
A method, apparatus and program product are provided for performing a query of a database. A database query is received, which includes first and second operations respectively configured to generate first and second disjoint results sets from a dataspace. The database query is analyzed to identify a set of attributes from the dataspace that are used by at least one of the first and second operations in the database query. During execution of the database query, a plurality of records from the dataspace is iteratively processed in a single pass, including, for each of the plurality of records, processing such record by retrieving the plurality of attributes for such record from the dataspace and performing each of the first and second operations on the record using the retrieved attributes for such record to build the first and second disjoint results sets. |
| US09411859B2 |
External linking based on hierarchical level weightings
Certain implementations of the disclosed technology include systems and methods for external linking based on hierarchal level weightings. The method may include associating external query data having one or more query field values with a record in a linked hierarchical database. The linked hierarchical database may include a plurality of records, each record having a record identifier and representing an entity in a hierarchy, each record associated with a hierarchy level, each record including one or more fields, each field configured to contain a field value. The associating may include receiving the external query data, wherein the external query data includes one or more search values; and identifying, from the plurality of records in the linked hierarchical database, one or more matched fields having field values that at least partially match the one or more search values. |
| US09411855B2 |
Triggering actions in an information feed system
Disclosed are systems, apparatus, methods, and computer readable media for performing actions in response to information updates provided in an information feed. In one implementation, an information update is selected for comparison with a data record creation rule. The data record creation rule may specify a data record creation operation for creating a data record based the selected information update. The selected information update may be capable of being displayed in an information feed. A determination may be made as to whether the selected information update includes information satisfying a trigger condition associated with the data record creation rule. When the information in the selected information update satisfies the trigger condition, the data record creation operation may be performed to create the data record. The data record creation operation may identify information to include in the data record. |
| US09411853B1 |
In-memory aggregation system and method of multidimensional data processing for enhancing speed and scalability
An in-memory aggregation (IMA) system having a massive parallel hardware (HW) accelerated aggregation engine uses the IMA for providing maximal utilization of HW resources of any processing unit (PU), such as a central processing unit (CPU), general purpose GPU, special coprocessors, and like subsystems. The PU accelerates business intelligence (BI) application performance by massive parallel execution of compute-intensive tasks of in-memory data aggregation processes. |
| US09411852B2 |
Techniques for processing group membership data in a multi-tenant database system
In accordance with embodiments, there are provided techniques for processing group membership data in a multi-tenant database system. These techniques for processing group membership data in a multi-tenant database system may enable embodiments to provide great flexibility to a tenant of the architecture to select the content that may be perceived by the tenant users while allowing the owner of the architecture control over the content. |