最新美国发明专利第2016-04-12期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09312556B2	Polymer electrolyte membrane, method for producing polymer electrolyte membrane, and solid polymer fuel cell A polymer electrolyte membrane having good resistance to radicals is provided. A polymer electrolyte membrane is characterized of containing organic/inorganic hybrid particles in which a surface of an inorganic particle, which is a radical scavenger, is modified with organic compounds in a polymer electrolyte. As the organic/inorganic hybrid particles in which a surface of an inorganic particle is modified with organic compounds, a radical scavenger prepared by reacting inorganic particles with organic compounds in a solvent by supercritical or subcritical hydrothermal synthesis is preferred.
US09312554B2	Hydrogen generator and fuel cell system A hydrogen generator includes: a tubular reformer configured to generate a hydrogen-containing gas by a reforming reaction using a material gas; a CO reducer configured to reduce carbon monoxide contained in the hydrogen-containing gas generated in the reformer; a tubular hydro-desulfurizer provided at an outer periphery of the reformer and configured to remove a sulfur compound contained in the material gas; and a material gas supply passage through which the material gas to be supplied to the hydro-desulfurizer flows. The material gas supply passage is configured to perform heat exchange with the CO reducer, and a material gas inlet port of the hydro-desulfurizer is provided at an end surface closer to the CO reducer.
US09312553B2	Apparatus and method for controlling fuel cell system Disclosed herein is an apparatus for controlling a fuel cell system, including: a plurality of stack state detecting units for detecting respective states of a plurality of fuel cell stacks; a switching unit for connecting at least parts of the plurality of fuel cell stacks to each other in series or in parallel; and a control unit for detecting at least one degraded stack based on the states of the stacks detected by the plurality of stack state detecting units, and forming at least one degraded stack unit including the detected at least one degraded stack by controlling the operation of the switching unit, so the apparatus can quickly and easily connect the stacks to each other in series, in parallel or in series-parallel using cheap electric switches instead of using a plurality of power conditioning system (PCS).
US09312545B2	Platinum and palladium alloys suitable as fuel cell electrodes The present invention concerns electrode catalysts used in fuel cells, such as proton exchange membrane (PEM) fuel cells. The invention is related to the reduction of the noble metal content and the improvement of the catalytic efficiency by low level substitution of the noble metal to provide new and innovative catalyst compositions in fuel cell electrodes. The novel electrode catalysts of the invention comprise a noble metal selected from Pt, Pd and mixtures thereof alloyed with a further element selected from Sc, Y and La as well as any mixtures thereof, wherein said alloy is supported on a conductive support material.
US09312542B2	Electrode plate for nonaqueous electrolyte secondary battery, nonaqueous electrolyte secondary battery including the same, and method for manufacturing the same An electrode active material layer containing an electrode active material and a binder. The electrode active material layer includes a portion containing the smallest amount of the binder in a middle region across the thickness of the electrode active material layer. The binder is distributed in the electrode active material layer such that the amount of the binder increases continuously from the portion toward the core and an outer surface of the electrode active material layer. Preferably, the amount of the binder present in the electrode active material layer per unit thickness is limited to more than 10 in a region extending 10% of the thickness from the outer surface of the electrode active material layer, with 10 being assigned to the amount of the binder present in the electrode active material layer per unit thickness if the binder is uniformly distributed.
US09312541B2	Cobalt oxide, composite of cobalt oxide, and method for making the same A cobalt oxide is disclosed and is represented by a chemical formula of Co1-yMyO2, wherein 0≦y≦0.9, and M is selected from the group consisting of alkali metal elements, alkaline-earth metal elements, Group-13 elements, Group-14 elements, transition metal elements, and rare-earth elements. A composite of cobalt oxide includes a cobalt oxide and an aluminum phosphate layer coated on a surface of the cobalt oxide.
US09312540B2	Conformal coating on nanostructured electrode materials for three-dimensional applications A fabrication process for conformal coating of a thin polymer electrolyte layer on nanostructured electrode materials for three-dimensional micro/nanobattery applications, compositions thereof, and devices incorporating such compositions. In embodiments, conformal coatings (such as uniform thickness of around 20-30 nanometer) of polymer Polymethylmethacralate (PMMA) electrolyte layers around individual Ni—Sn nanowires were used as anodes for Li ion battery. This configuration showed high discharge capacity and excellent capacity retention even at high rates over extended cycling, allowing for scalable increase in areal capacity with electrode thickness. Such conformal nanoscale anode-electrolyte architectures were shown to be efficient Li-ion battery system.
US09312539B2	Active material According to one embodiment, a negative electrode active material includes monoclinic system titanium dioxide having an average pore diameter falling within a range of 8 nm to 25 nm. A volume of pores having a diameter of 10 nm or less falls within a range of 10% to 30% of a total pore volume.
US09312537B2	Potato-shaped graphite particles with low impurity rate at the surface, method for preparing the same A method for modifying graphite particles having a prismatic shape or a cylindrical shape characterized by an edge function fe and a basal function fb, said method providing increase of the edge function and lowering of the basal function, wherein the method includes submitting the graphite particles to at least one physical means selected from attrition, jet mill, ball mill, hammer mill, or atomizer mill, in the presence of at least one chemical compound chosen from the group of compounds of the formula MFz, in which M represents an alkaline or alkaline-earth metal and z represents 1 or 2, NaCl and NH4F or a mixture thereof, said compound or compounds being added in solid form, at the beginning of the step using the physical means.
US09312536B2	Negative electrode active material for nonaqueous electrolyte battery, method of producing the same, nonaqueous electrolyte battery and battery pack According to one embodiment, a negative electrode active material for nonaqueous electrolyte battery includes a titanium oxide compound having a crystal structure of monoclinic titanium dioxide. When a monoclinic titanium dioxide is used as the active material, the effective capacity is significantly lower than the theoretical capacity though the theoretical capacity was about 330 mAh/g. The invention comprises a titanium oxide compound which has a crystal structure of monoclinic titanium dioxide and a (001) plane spacing of 6.22 Å or more in the powder X-ray diffraction method using a Cu-Kα radiation source, thereby making an attempt to improve effective capacity.
US09312534B2	Nonaqueous electrolytic solution secondary battery, and positive electrode and negative electrode used in the same Provided is a nonaqueous electrolytic solution secondary battery having a high energy density, and a positive electrode and a negative electrode used therefor. The nonaqueous electrolytic solution secondary battery includes a positive electrode and a negative electrode, wherein: the negative electrode contains a negative electrode active material having an initial charge/discharge efficiency of 75% or less when charged and discharged by employing metallic Li as a counter electrode; and the positive electrode contains a metal oxide (X) represented by AxMeOy (wherein A is Na and/or K, Me is Ni and/or Cu, x satisfies 1.9≦x≦2.1, and y satisfies 1.9≦y≦2.1).
US09312529B2	Secondary battery and secondary battery assembly A secondary battery and a secondary battery assembly are provided. The secondary battery includes a bare cell, a housing, an opening and a terminal portion. The housing surrounds the bare cell. The opening is formed any one side of the housing, and includes a first opening, a second opening and a third opening formed adjacent to any one of the first and second openings. The terminal portion has at least one portion exposed to the outside of the housing through the opening so as to electrically connect between an external device and the bare cell. Accordingly, the two secondary batteries can be used by being easily connected to each other.
US09312528B2	Rechargeable battery and battery module A rechargeable battery including an electrode assembly; a case housing the electrode assembly; a first terminal post electrically coupled to an electrode of the electrode assembly; and a first terminal plate including a first plate coupled to the first terminal post and a second plate coupled to the first plate, wherein the first plate and the second plate are made from different materials.
US09312524B2	Mobile battery modules for high power applications Some embodiments of the present disclosure relate to a mobile battery module for high power applications. The mobile battery module includes a case having a chamber therein, wherein one or more engagement elements are disposed on an inner surface of the case. A number of blocks removably engage the one or more engagement elements, wherein each block includes a pair of opposing sidewalls. Within each block, a number of end caps extend from the opposing sidewalls to cooperatively hold a number of respective cells there between.
US09312519B2	Organic light emitting element, organic el display panel, organic el display device, coated device, and method for manufacturing these An organic light-emitting element including: a substrate; a light-emitting part above the substrate, the light-emitting part including an organic layer; and banks defining bounds of the organic layer in a direction along a main surface of the substrate. In the organic light-emitting element, in plan view, a surface of the organic layer is longer in a first direction than in a second direction perpendicular to the first direction, and in the second direction, the surface of the organic layer is convex, protruding upwards in a thickness direction of the organic layer, and in the first direction, the surface of the organic layer is concave, protruding downwards in the thickness direction.
US09312518B2	Method of manufacturing mask substrate and method of manufacturing organic electroluminescent display using the same A first conductive member is positioned on a base substrate. A second conductive member is positioned on the first conductive member, the second conductive member being electrically coupled to the first conductive member, and having a resistivity higher than that of the first conductive member. A mask substrate is positioned on the second conductive member. A portion of the mask substrate that contacts the second conductive member is removed.
US09312516B2	Functional film and organic EL device A functional film of the present invention includes a support body of which a retardation value is less than or equal to 300 nm; a protective inorganic layer which is formed on the support body; one or more combinations of an inorganic layer and an organic layer which are formed on the protective inorganic layer; and a mixed layer having a thickness of 1 to 100 nm which is formed between the support body and the underlying inorganic layer, and is mixed with a component of the support body and a component of the protective inorganic layer.
US09312512B2	Flexible organic light-emitting display apparatus and method of manufacturing the same A flexible organic light-emitting display apparatus includes a flexible substrate, a barrier layer on the flexible substrate, a display portion on the barrier layer, an encapsulation layer covering the display portion, and a porous layer between the flexible substrate and the display portion.
US09312505B2	Organic electroluminescent materials and devices In certain embodiments, the invention provides metal complexes having Formula (I): wherein each Lx is independently a monodentate ligand, and any two adjacent Lx may optionally combine to form a bidentate ligand; wherein M1 is cobalt(I), rhodium(I), iridium(I), nickel(II), platinum(II), palladium(II), silver(III), gold(III), or copper(III); wherein m is a value from 1 to the maximum number of ligands that may be attached to M1; wherein m+n is the maximum number of ligands that may be attached to M1; wherein G1 is O or CR4R5; and R1 to R5 are various substituents, which can optionally combine with each other, among themselves, or with any Lx. In certain embodiments, the invention provides devices, such as organic light emitting devices, that comprise such metal complexes.
US09312504B2	Flexible organic light emitting diode display device and manufacturing method thereof A flexible organic light emitting diode display device, comprising: a first flexible substrate and a second flexible substrate opposite to the first flexible substrate wherein on the first flexible substrate, there are formed in sequence a thin film transistor, a first passivation layer, a first electrode, an organic electroluminescence layer, a second electrode, a stress absorption layer is disposed between the second electrode and the second flexible substrate, and material for the stress absorption layer is a resin material. The stress absorption layer of the flexible organic light emitting diode display device can absorb a stress occurring as it is bent, so as to prevent electrodes from being broken due to the action of the stress and affecting the display quality. There is further disclosed a manufacturing method of the flexible organic light emitting diode display device.
US09312496B2	Organic electroluminescent element Provided are a novel nitrogen-containing aromatic heterocyclic compound and an organic electronic device using the compound. Specifically provided is an organic electroluminescent device, including a plurality of organic layers between an anode and a cathode laminated on a substrate, in which at least one of the organic layers contains a nitrogen-containing aromatic compound represented by the following formula (1). In the formula, L represents an n+m-valent group arising from an alkane, a cycloalkane, an aromatic hydrocarbon, an aromatic heterocyclic compound, a triarylamine, or a diarylsulfone, A represents an alkyl group, a cycloalkyl group, an alkenyl group, an alkynyl group, a silyl group, an acyl group, an aromatic hydrocarbon group, or an aromatic heterocyclic group, X represents C(R)2, oxygen, S, or Se, R represents H, an alkyl group, a cycloalkyl group, an alkenyl group, an alkynyl group, an aromatic hydrocarbon group, or an aromatic heterocyclic group, m represents an integer of 1 to 4, and n represents an integer of 0 to 3. The total number of m and n is 2 to 4.
US09312494B2	Organic light emitting device Provided is an organic light emitting device with enhanced durability during continuous driving. The organic light emitting device includes: an anode, a cathode, and an organic compound layer being placed between the anode and the cathode and including at least a hole transport layer and an emission layer, in which: the emission layer contains a blue light emitting material; the hole transport layer contains a plurality of kinds of organic compounds; and an organic compound having the smallest ionization potential among the organic compounds includes a compound having no absorption spectrum peak in a blue color wavelength region in a radical cation state.
US09312492B2	Polymeric blends and related optoelectronic devices The present invention relates to all-polymer blends including an electron-acceptor polymer and an electron-donor polymer, capable of providing improved device performance, for example, as measured by power conversion efficiency, when used in photovoltaic cells.
US09312485B2	Process and materials for making contained layers and devices made with same There is provided a process for forming a contained second layer over a first layer, including the steps: forming the first layer including a fluorinated material and a photoinitiator, and having a first surface energy; treating the first layer with a priming layer including an aromatic amine compound; exposing the priming layer patternwise with activating radiation, resulting in exposed areas and unexposed areas; developing the priming layer to effectively remove the priming layer from the unexposed areas resulting in a first layer having a patterned priming layer, wherein the patterned priming layer has a second surface energy that is higher than the first surface energy; and forming the second layer by liquid deposition on the patterned priming layer on the first layer.
US09312475B2	Magnetoresistive element, magnetic memory, and method of manufacturing magnetoresistive element According to one embodiment, a magnetoresistive element includes first and second magnetic layers, a first nonmagnetic layer, a conductive layer. The first and second magnetic layers have axes of easy magnetization perpendicular to a film plane. The first and second magnetic layers have variable and invariable magnetization directions, respectively. The first nonmagnetic layer is between the first and second magnetic layers. The conductive layer is on a surface of the first magnetic layer opposite to a surface on which the first nonmagnetic layer is formed. The first magnetic layer has a structure obtained by alternately laminating magnetic and nonmagnetic materials. The nonmagnetic material includes at least one of Ta, W, Nb, Mo, Zr, Hf. The magnetic material includes Co and Fe. One of the magnetic materials contacts the first nonmagnetic layer. One of the nonmagnetic materials contacts the conductive layer.
US09312474B2	Electronic devices having semiconductor memory units having magnetic tunnel junction element Disclosed are electronic devices comprising a semiconductor memory unit capable of reducing the switching current of a variable resistance element for switching between different resistance states. One implementation of a disclosed electronic device may include a first magnetic layer having an easy magnetization axis in a first direction and having a variable magnetization direction, a third magnetic layer having a magnetization direction pinned in the first direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and having a magnetization direction pinned in a second direction different from the first direction, a tunnel barrier layer interposed between the first magnetic layer and the second magnetic layer, and a non-magnetic layer interposed between the second magnetic layer and the third magnetic layer.
US09312473B2	Vertical hall effect sensor In one aspect, a vertical Hall effect sensor includes a semiconductor wafer having a first conductivity type and a plurality of semiconductive electrodes disposed on the semiconductor wafer. The plurality of semiconductive electrodes have the first conductivity type and include a source electrode, a first sensing electrode and a second sensing electrode, arranged such that the source electrode is between the first sensing electrode and the sensing electrode and a first drain electrode and a second drain electrode, arranged such that the first sensing electrode, second sensing electrode, and source electrode are between the first drain electrode and the second drain electrode. The vertical Hall effect sensor also includes a plurality of semiconductor fingers disposed on the semiconductor wafer and interdigitated with the plurality of semiconductive electrodes, the semiconductor fingers having a second conductivity type.
US09312467B2	Apparatus and method for generating sinusoidal waves, and system for driving piezo actuator using the same An apparatus for generating sinusoidal waves may include: a look-up table storage unit storing a look-up table including a plurality of sampling points determined based on a base frequency and a sampling frequency; a sinusoidal wave generating unit calculating an integer ratio of a target frequency to the base frequency and obtaining sampling points from the look-up table by reflecting the integer ratio so as to generate a sinusoidal wave; and a correction control unit calculating noise information in the generated sinusoidal wave, and controlling the sinusoidal wave generating unit to correct the sampling frequency if the noise information fails to meet a predetermined requirement.
US09312462B2	LED module A lead 1 includes a die-bonding portion 11 with an opening 11a penetrating in a thickness direction. Another lead 2 is spaced from the lead 1. An LED unit 3 includes an LED chip 30 with a electrode terminal 31 connected to the lead 1 and another electrode terminal 32 connected to the lead 2. The LED unit 3, mounted on a surface of the die-bonding portion 11 on a first side in z direction, overlaps the opening 11a. A wire 52 connects the lead 2 and the electrode terminal 32. A support member 4 supporting the leads 1-2 is held in contact with another surface of the die-bonding portion 11 on a second side in z direction. These arrangements ensure efficient heat dissipation from the LED chip 30 and efficient use of light emitted from the LED chip 3.
US09312460B2	Light emitting device, method for manufacturing light emitting device, and package array In a light emitting device, a first lead has a first terminal part that is contiguous with a first connector. The first terminal part includes a first convex part that is exposed from a molded article at the inner peripheral face of a mounting recess, and a first concave part that is formed in the rear face of the first convex part.
US09312459B2	Light emitting device having vertical structure and package thereof A light emitting device having a vertical structure and a package thereof, which are capable of damping impact generated in a substrate separation process, and achieving an improvement in mass productivity. The device and package include a sub-mount, a first-type electrode, a second-type electrode, a light emitting device, a zener diode, and a lens on the sub-mount.
US09312458B2	Lighting device Provided is a lighting device, comprising: a light source module comprising: at least one light source disposed on a printed circuit board; and a resin layer disposed on the printed circuit board so that the light source is embedded; an indirect light emission unit which is formed in at least any one of one side and another side of the light source module, and which reflects light irradiated from the light source; and a diffusion plate having an upper surface formed on the light source module, and a side wall which is integrally formed with the upper surface and which is adhered onto an outer side surface of the indirect light emission unit, wherein a first separated space is formed between the light source module and the upper surface of the diffusion plate, whereby flexibility of the product itself can be secured, and durability and reliability of the product can be also improved while indirect light emission using a flare effect can be implemented.
US09312456B2	Encapsulating sheet and optical semiconductor element device An encapsulating sheet is formed from an encapsulating resin composition which contains an encapsulating resin and silicone microparticles, and the mixing ratio of the silicone microparticles with respect to the encapsulating resin composition is 20 to 50 mass %.
US09312454B2	Sulfur-containing phosphor coated with ZnO compound Provided is a novel coated phosphor capable of effectively suppressing the adverse effects of hydrogen sulfide gas generated by the reaction between a sulfur-containing phosphor and moisture in the air. Provided is a sulfur-containing phosphor having a configuration in which ZnO compound containing Zn and O is present on the surface of a sulfur-containing phosphor having a host material which includes sulfur.
US09312452B2	Method for producing a conversion lamina and conversion lamina A method for producing at least one conversion lamina for a radiation-emitting semiconductor component is specified. A base material including a conversion substance contained therein is applied to a substrate by means of a double-layered stencil. Furthermore, a conversion lamina for a radiation-emitting semiconductor component includes a base material and a conversion substance embedded therein. The thickness of the conversion lamina is in a range of between 60 μm and 170 μm inclusive.
US09312450B2	Light emitting device and light emitting device package Disclosed are a light emitting device and a light emitting device package. The light emitting device includes a first electrode, a light emitting structure including a first semiconductor layer, an active layer, and a second semiconductor layer on the first electrode, a nano-tube layer including a plurality of carbon nano tubes on the light emitting structure, and a second electrode on the light emitting structure.
US09312445B2	LED with multilayer light extractor having a refractive index gradient The light emitting device includes a first semiconductor layer, a second semiconductor layer and an active layer provided between the first semiconductor layer and the second semiconductor layer. A first light extraction layer is provided on the first semiconductor layer and includes a nitride semiconductor layer. The first light extraction layer includes a plurality of first layers. The refractive indexes of the first layers decrease with increasing distance from the first semiconductor layer.
US09312444B2	Semiconductor light emitting device and manufacturing method thereof A semiconductor light emitting device includes a supporting substrate, a light emitting layer including a nitride semiconductor, and a nitride multilayer film. The nitride multilayer film includes a first layer including a first nitride semiconductor containing aluminum nitride, a second layer including a second nitride semiconductor containing gallium nitride, and a third layer including the first nitride semiconductor containing aluminum nitride.
US09312443B2	Semiconductor light device and manufacturing method for the same Provided is a semiconductor light device comprising a semiconductor substrate having a first conduction type; a first cladding layer having the first conduction type deposited above the semiconductor substrate; an active layer; a second cladding layer having a second conduction type; and a contact layer. The active layer includes a window portion that is disordered via diffusion of vacancies and a non-window portion having less disordering than the window portion, and the contact layer includes a first region and a second region that is below the first region and has greater affinity for hydrogen than the first region.
US09312435B2	Optoelectronic semiconductor device An optoelectronic semiconductor device includes a first light source that emits green, white or white-green light and includes a semiconductor chip that emits in the blue spectral range, and a first conversion element attached directly to the semiconductor chip, a second light source that emits red light, having a semiconductor chip, that emits in a blue spectral range, and having a second conversion element attached directly to the semiconductor chip, and/or having a semiconductor chip that emits in a red spectral range, a third light source that emits blue light and has a semiconductor chip emitting in the blue spectral range, and a filler body having a matrix material into which a conversion agent is embedded, wherein the filler body is disposed downstream of the light sources collectively.
US09312434B1	Light-emitting diode fabrication method A LED fabrication method includes: providing a substrate; forming a low-temperature AlxGa1-xN (0≦x≦1) layer over the growth substrate; setting the growth pressure from high to low and temperature and rotation rate from low to high to realize change from three-dimensional growth to two-dimensional growth of the GaN structure layer before growth of the multiple quantum-well layer, in which, Si is doped at position approximate to the multiple quantum-well layer to form an undoped gradient GaN layer and an N-type gradient GaN layer; growing a multiple quantum-well layer, an AlxGa1-xN (0≦x≦1) layer and a P-type layer; and during later chip fabrication, dividing the epitaxial wafer over the etched N-type platform into chip grains and immersing them in chemical solutions for wet etching; and forming an inverted pyramid structure with rough side wall over the multiple quantum-well layer to improve light-emitting efficiency.
US09312430B2	Multi-color light emitting devices with compositionally graded cladding group III-nitride layers grown on substrates A light emitting device includes a substrate, multiple n-type layers, and multiple p-type layers. The n-type layers and the p-type layers each include a group III nitride alloy. At least one of the n-type layers is a compositionally graded n-type group III nitride, and at least one of the p-type layers is a compositionally graded p-type group III nitride. A first ohmic contact for injecting current is formed on the substrate, and a second ohmic contact is formed on a surface of at least one of the p-type layers. Utilizing the disclosed structure and methods, a device capable of emitting light over a wide spectrum may be made without the use of phosphor materials.
US09312429B2	Semiconductor light emitting device, semiconductor wafer with first and second portions with different lattice polarities According to one embodiment, a semiconductor light emitting device includes a light emitting layer and a first semiconductor layer. The first semiconductor layer is arranged with the light emitting layer in a first direction. The first semiconductor layer includes a first portion and a second portion. The first portion and a second portion include a nitride semiconductor. The first portion has a first lattice polarity. The second portion has a second lattice polarity different from the first lattice polarity.
US09312427B2	Semiconductor structure and method for forming the same A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (100); and a plurality of zigzag structures (200) formed on a surface of the substrate (100), in which each zigzag structure (200) has a first long side (202) and a first short side (204), the first long side (202) of one zigzag structure (200) is adjacent to the first short side (204) of another zigzag structure (200) adjacent to the one zigzag structure (200), each first long side (202) defines a first surface (300) of each zigzag structure (200), each first short side (204) defines a second surface (302) of each zigzag structure, and each first surface (300) is a growth surface for a compound semiconductor layer.
US09312425B2	Crack resistant solar cell modules A crack resistant solar cell module includes a protective package mounted on a frame. The protective package includes a polyolefin encapsulant that protectively encapsulates solar cells. The polyolefin has less than five weight percent of oxygen and nitrogen in the backbone or side chain. In other words, the combined weight percent of oxygen and nitrogen in any location in the molecular structure of the polyolefin is less than five. The polyolefin also has a complex viscosity less than 10,000 Pa second at 90° C. as measured by dynamic mechanical analysis (DMA) before any thermal processing of the polyolefin. The protective package includes a top cover, the encapsulant, and a backsheet. The solar cell module allows for shipping, installation, and maintenance with less risk of developing cracks on the surfaces of the solar cells.
US09312419B2	Solar energy converter According to one aspect, there is provided a solar energy converter, including: a lens; a base plate having a first surface that faces the lens and a second surface that is opposite to the first surface; and a solar cell sandwiched between the lens and the base plate, wherein both the lens and the base plate are each provided with at least one channel for fluid for cooling the solar cell. Also contemplated is provision of at least one fin on both the lens and the base plate for cooling the solar cell. According to a second aspect, there is provided a method for cooling a solar energy converter having a lens, a base, and at least one solar cell sandwiched between said lens and said base plate, the method comprising the step of: cooling the at least one solar cell on two opposing sides.
US09312418B2	Frameless photovoltaic module A photovoltaic module employing an array of photovoltaic cells disposed between two optically transparent substrates such as to define a closed-loop peripheral area of the module that does not contain a photovoltaic cell. The module is sealed with a peripheral seal along the perimeter; and is devoid of a structural element affixed to an optically transparent substrate and adapted to mount the module to a supporting structure. The two substrates may be bonded together with the use of adhesive material and, optionally, the peripheral seal can include the adhesive material. The module optionally includes diffraction grating element(s) adjoining respectively corresponding PV-cell(s).
US09312416B2	Method of forming an electronic article An electronic article has a perimeter and includes a superstrate, an optoelectronic element disposed on the superstrate, and a silicone encapsulant that is formed from a curable silicone composition and that is disposed on the optoelectronic element sandwiching the optoelectronic element between the superstrate and the silicone encapsulant. The electronic article is formed using a method that includes the step of depositing the curable silicone composition on the optoelectronic element in a pattern defining at least one passage extending from an interior of the electronic article to a perimeter of the electronic article. The method also includes laminating the superstrate, the optoelectronic element, and the curable silicone composition. The curable silicone composition has a complex viscosity of from 10,000 to 50,000,000 cPs at 25° C. as measured at 1 radian per second at 1 to 5% strain. During lamination, the curable silicone composition cures to form the silicone encapsulant and air escapes from through the at least one passage.
US09312415B2	Multi-layered sheet and method of preparing same Provided are a multi-layered sheet, a backsheet for a photovoltaic cell, a method of preparing the same and a photovoltaic module. The multi-layered sheet in which a resin layer including a fluorine-based resin has excellent durability and weather resistance, and also exhibits strong interfacial adhesion to a substrate or polymer coating layer is provided. When a drying process is performed at a low temperature in preparation of the multi-layered sheet, production cost can be reduced, producibility can be increased, and degradation in the quality of a product caused by thermal deformation or thermal shock can be prevented. Such a multi-layered sheet may be effectively used as a backsheet for various photovoltaic cells.
US09312413B2	Method for producing a substrate having a colored interference filter layer, this substrate containing a colored interference filter layer, the use of this substrate as a colored solar cell or as a colored solar module or as a component thereof, as well as an array including at least two of these substrates A colored substrate and a method for producing a substrate having a colored interference filter layer containing a polycrystalline metal oxide or polycrystalline metal oxides with the aid of physical or chemical vapor deposition using a coating system, in particular with the aid of a sputtering gas, in which at least two, in particular at least six, coating layers are vapor deposited one on top of the other forming polycrystalline metal oxides in each case.
US09312408B2	Imager having a reduced dark current through an increased bulk doping level The disclosure relates to an image sensor comprising a substrate region in a semiconductor material; an active layer in contact with the substrate region; and a photodiode array formed in the active layer. The substrate region has a doping level such that the resistivity of the substrate region is less than 6 mOhm·cm.
US09312404B2	Composition for manufacturing electrode of solar cell, method of manufacturing same electrode, and solar cell using electrode obtained by same method A composition for manufacturing an electrode of a solar cell, comprising metal nanoparticles dispersed in a dispersive medium, wherein the metal nanoparticles contain silver nanoparticles of 75 weight % or more, the metal nanoparticles are chemically modified by a protective agent having a main chain of organic molecule comprising a carbon backbone of carbon number of 1 to 3, and the metal nanoparticles contains 70% or more in number-average of metal nanoparticles having a primary grain size within a range of 10 to 50 nm.
US09312400B2	Power harvesting device Techniques are described to harvest power from a single current carrying conductor to furnish power to a powered device. The techniques employ a power harvesting device that is coupled to the conductor. In implementations, the conductor has a first path and a second path. The power harvesting device includes a first switch coupled to the second path. An energy storing element is coupled to the first path and configured to store energy based upon the direct current flowing through the first path. The power harvesting device also includes a power condition and management device coupled to the energy storing element configured to switch the first switch to a closed configuration when the energy storing element is measured to have a predefined high voltage threshold, and to switch the first switch to an open configuration when the energy storing element is measured to have a predefined low voltage threshold.
US09312399B2	Systems and methods for mapping the connectivity topology of local management units in photovoltaic arrays Provided are a system and method for determining a connectivity topology of local management units (LMUs) in a solar photovoltaic power generation (SPVPG) system. Each of the LMUs is connected within the SPVPG between a solar panel and a set of power lines of the SPVPG. The set of power lines connects the LMUs to form a network. The connectivity topology of LMUs in the network is determined using, for example, indirect indications of connections of an LMU and the SPVPG and indications of the physical location of the LMU with respect to other elements of the SPVPG.
US09312398B2	Energy storage device with large charge separation High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.
US09312396B2	Nonvolatile semiconductor memory transistor and method for manufacturing nonvolatile semiconductor memory A nonvolatile semiconductor memory transistor includes an island-shaped semiconductor having a source region, a channel region, and a drain region formed in this order from the silicon substrate side, a floating gate arranged so as to surround the outer periphery of the channel region with a tunnel insulating film interposed between the floating gate and the channel region, a control gate arranged so as to surround the outer periphery of the floating gate with an inter-polysilicon insulating film interposed between the control gate and the floating gate, and a control gate line electrically connected to the control gate and extending in a predetermined direction. The inter-polysilicon insulating film is interposed between the floating gate and the lower and inner side surfaces of the control gate and between the floating gate and the lower surface of the control gate line.
US09312391B2	Solution composition for forming oxide semiconductor, and oxide semiconductor and electronic device including the same A solution composition for forming an oxide semiconductor includes a metal oxide precursor, and one of a metal thioacetate and a derivative thereof.
US09312388B2	Methods of forming epitaxial semiconductor material in trenches located above the source and drain regions of a semiconductor device One method disclosed includes, among other things, forming a gate structure above an active region of a semiconductor substrate, wherein a first portion of the gate structure is positioned above the active region and second portions of the gate structure are positioned above an isolation region formed in the substrate, forming a sidewall spacer adjacent opposite sides of the first portion of the gate structure so as to define first and second continuous epi formation trenches comprised of the spacer that extend for less than the axial length of the gate structure, and forming an epi semiconductor material on the active region within each of the first and second continuous epi formation trenches.
US09312382B2	High voltage transistor device with reduced characteristic on resistance Technologies are generally described for reduction of the characteristic on resistance for a transistor device. In some examples, a transistor device may include a source region, a drain region, an n-type epitaxial region between the source and drain regions, a p-type body region, and a deep p-type trench region formed below the body region. The trench region may be configured to charge compensate the n-type epitaxial region. In other examples, the characteristic on resistance may be reduced by replacing the silicon below the body region with lower resistance conductive material. A backside of a wafer that includes the transistor device may be thinned by using a support or carrier on the front side of the wafer to provide mechanical support, and etching trenches in both the substrate silicon and the epitaxial silicon located below the body region of the transistor device. The trenches may be subsequently filled with conductive material.
US09312376B2	Semiconductor device, method for fabricating the same, and memory system including the semiconductor device Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.
US09312369B2	Bipolar transistor structure and a method of manufacturing a bipolar transistor structure According to various embodiments, a bipolar transistor structure may include: a substrate; a collector region in the substrate; a base region disposed over the collector region, an emitter region disposed over the base region; a base terminal laterally electrically contacting the base region, wherein the base terminal includes polysilicon.
US09312366B1	Processing of integrated circuit for metal gate replacement Embodiments of the present disclosure provide a method of processing an integrated circuit (IC) structure for metal gate replacement, the method comprising: providing a structure including a first semiconductor fin and a second semiconductor fin positioned over a buried insulator layer of a silicon-on-insulator (SOI) substrate, and a gate structure positioned over the first and second semiconductor fins, wherein the gate structure includes a gate dielectric layer and a metal layer positioned over the gate dielectric layer; forming a planarizing resist over the first and second semiconductor fins, wherein the planarizing resist includes: a first organic planarizing layer (OPL), and a second OPL over the first OPL; removing a portion of the second OPL; removing an exposed portion of the first OPL and a portion of the metal layer positioned over the second semiconductor fin; and forming a replacement metal gate (RMG) over the gate dielectric layer.
US09312362B2	Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET) Variation resistant metal-oxide-semiconductor field effect transistors (MOSFETs) are manufactured using a high-K, metal-gate ‘channel-last’ process. A cavity is formed between spacers formed over a well area having separate drain and source areas, and then a recess into the well area is formed. The active region is formed in the recess, comprising an optional narrow highly doped layer, essentially a buried epitaxial layer, over which a second un-doped or lightly doped layer is formed which is a channel epitaxial layer. The high doping beneath the low doped epitaxial layer can be achieved utilizing low-temperature epitaxial growth with single or multiple delta doping, or slab doping. A high-K dielectric stack is formed over the channel epitaxial layer, over which a metal gate is formed within the cavity boundaries. In one embodiment of the invention a cap of poly-silicon or amorphous silicon is added on top of the metal gate.
US09312359B2	Semiconductor structure and fabrication method thereof A semiconductor structure includes a gate structure disposed on a substrate and having an outer spacer, a recess disposed in the substrate and adjacent to the gate structure, a doped epitaxial material filling up the recess, a cap layer including an undoped epitaxial material and disposed on the doped epitaxial material, a lightly doped drain disposed below the cap layer and sandwiched between the doped epitaxial material and the cap layer, and a silicide disposed on the cap layer and covering the doped epitaxial material to cover the cap layer together with the outer spacer without directly contacting the lightly doped drain.
US09312357B1	Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a first dielectric layer thereon. The first dielectric layer is provided with a trench. Then, a metal layer is formed to fill the trench and to cover the surface of the first dielectric layer. The metal layer is partially removed so that a remaining portion of the metal layer covers the first dielectric layer. A treatment process is performed to transform the remaining portion of the metal layer into a passivation layer on the top portion and a gate metal layer on the bottom portion. A chemical-mechanical polishing process is performed until the first dielectric layer is exposed so that a remaining portion of the passivation layer remains in the trench.
US09312355B2	Stripe structures and fabrication method thereof A method is provided for fabricating stripe structures. The method includes providing a substrate; and forming a to-be-etched layer on the substrate. The method also includes forming a hard mask pattern having a first stripe on the to-be-etched layer; and forming a photoresist pattern having a stripe opening on the to-be-etched layer and the hard mask pattern having the first stripe. Further, the method includes forming a polymer layer on a top surface and side surfaces of the photoresist pattern to reduce a width of the stripe opening; forming hard mask patterns having a second stripe by etching the hard mask pattern having the first stripe using the photoresist pattern having the polymer layer as an etching mask; and forming the stripe structures by etching the to-be-etching layer using the hard mask pattern having the second stripe as an etching mask until the substrate is exposed.
US09312349B2	Semiconductor device and method for manufacturing semiconductor device To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as a transistor is miniaturized can be suppressed. The semiconductor device includes a first semiconductor film, a source electrode and a drain electrode electrically connected to the first semiconductor film, a gate insulating film, and a gate electrode in contact with the gate insulating film. The gate insulating film includes a first insulating film and a trap film, and charge is trapped in a charge trap state in an interface between the first insulating film and the trap film or inside the trap film.
US09312346B2	Semiconductor device with a charge carrier compensation structure and method for the production of a semiconductor device A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first type. An edge region which surrounds the cell field has a higher blocking strength than the cell field, the edge region having a near-surface area which is undoped to more weakly doped than the drift zones, and beneath the near-surface area at least one buried, vertically extending complementarily doped zone is positioned.
US09312344B2	Methods for forming semiconductor materials in STI trenches A method includes annealing a silicon region in an environment including hydrogen (H2) and hydrogen chloride (HCl) as process gases. After the step of annealing, a semiconductor region is grown from a surface of the silicon region.
US09312343B2	Transistors with semiconductor interconnection layers and semiconductor channel layers of different semiconductor materials A transistor may include a semiconductor drift layer of a first semiconductor material and a semiconductor channel layer on the semiconductor drift layer. The semiconductor channel layer may include a second semiconductor material different than the first semiconductor material. A semiconductor interconnection layer may be electrically coupled between the semiconductor drift layer and the semiconductor channel layer, and the semiconductor interconnection layer may include a third semiconductor material different than the first and second semiconductor materials. In addition, a control electrode may be provided on the semiconductor channel layer.
US09312335B2	Lateral PNP bipolar transistor with narrow trench emitter A lateral bipolar transistor includes trench emitter and trench collector regions to form ultra-narrow emitter regions, thereby improving emitter efficiency. The same trench process is used to form the emitter/collector trenches as well as the trench isolation structures so that no additional processing steps are needed to form the trench emitter and collector. In embodiments of the present invention, the trench emitter and trench collector regions may be formed using ion implantation into trenches formed in a semiconductor layer. In other embodiments, the trench emitter and trench collector regions may be formed by out-diffusion of dopants from heavily doped polysilicon filled trenches.
US09312334B2	Semiconductor component A semiconductor component is disclosed. One embodiment provides a semiconductor body having a cell region with at least one zone of a first conduction type and at least one zone of a second conduction type in a rear side. A drift zone of the first conduction type in the cell region is provided. The drift zone contains at least one region through which charge carriers flow in an operating mode of the semiconductor component in one polarity and charge carriers do not flow in an operating mode of the semiconductor component in an opposite polarity.
US09312333B2	Resonator having terminals and a method for manufacturing the resonator A resonator and a method for manufacturing a resonator are provided. The method may include doping a wafer, and forming on the wafer a substrate, a drain electrode, a source electrode, a gate electrode, and at least one nanowire.
US09312329B2	Semiconductor device A first impurity diffusion region is provided within a semiconductor substrate, a second impurity diffusion region is provided within the first impurity diffusion region, a third impurity diffusion region is provided within the second impurity diffusion region, a first portion of a fourth impurity diffusion region is provided within the second impurity diffusion region so as to be spaced from the third impurity diffusion region, and a second portion of the fourth impurity diffusion region is provided in a third portion of the first impurity diffusion region on a side of a surface of the semiconductor substrate, a first contact is provided so as to be in contact with the second portion, the first contact and the third portion overlap in plan view, and a first power supply is connected to the third impurity diffusion region.
US09312327B2	Semiconductor device A semiconductor device having a capacitor which includes a first electrode electrically coupled to a transistor and a second electrode separate from the first electrode and covered with an interlayer insulating film, in which a plurality of coupling holes are formed in the interlayer insulating film and are in contact with the second electrode at the lower ends; and, when the capacitance of the second electrode is represented by C [nF] and the total area of the lower ends of the coupling holes is represented by A [μm2], the following expression (1) is satisfied. C/A≦1.98 [nF/μm2] (1) The elution of the second electrode constituting the capacitor at the lower ends of the coupling holes is suppressed.
US09312326B2	Metal-insulator-metal capacitor structures Capacitor structures capable of providing both low-voltage capacitors and high-voltage capacitors are described herein. In one embodiment, a capacitor structure comprises a first electrode formed from a first metal layer, a second electrode formed from a second metal layer, and a third electrode formed from a third metal layer, wherein second and third electrodes are spaced farther apart than the first and second electrodes. The capacitor structure also comprises a first dielectric layer between the first and second electrodes, and a second dielectric layer between the second and third metal layers, wherein the second dielectric layer has a larger thickness than the first dielectric layer. The first electrode is coupled to a first power-supply rail, the third electrode is coupled to a second power-supply rail, and the second power-supply rail has a higher power-supply voltage than the first power-supply rail.
US09312325B2	Semiconductor metal insulator metal capacitor device and method of manufacture A method for forming a semiconductor device includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. A thickness of the first portion of the dielectric layer is adjusted by either reducing the thickness or depositing additional dielectric material. A capacitor top plate is formed over the first portion of the dielectric layer.
US09312324B2	Organic thin film transistor comprising banks, organic thin film transistor array substrate and display device Embodiments of the invention provide an organic thin film transistor, an organic thin film transistor array substrate and a display device. The organic thin film transistor comprises a transparent substrate; source and drain electrodes formed on the transparent substrate; an active layer formed on the transparent substrate by an organic semiconductor material and disposed between the source and drain electrodes; a gate insulating layer formed on the active layer; a gate electrode formed on the gate insulating layer; and first and second banks disposed on the transparent substrate, inner sides of the first and second banks being covered by the source and drain electrodes, respectively.
US09312317B2	Organic electroluminescent display device and method for manufacturing the same An organic electroluminescent display device includes a substrate, plural pixel electrodes that are disposed on the substrate, an insulating layer that is disposed in areas between the pixel electrodes adjacent to each other, and extends integrally to upper and lower portions of ends of the pixel electrodes adjacent to each other, an organic electroluminescent film that is disposed on the substrate with the inclusion of a common layer that continuously covers the plural pixel electrodes and the insulating layer; and a common electrode that is disposed on the organic electroluminescent film.
US09312313B2	Organic light emitting diode device An organic light emitting device includes an organic light emitting element and a sensor. The organic light emitting element includes an organic layer between an anode and cathode. The sensor detects a quality that provides an indication of the degradation of the organic layer of the light emitting element. The sensor may be a chemical sensor or another type of sensor. The sensor may be fixed permanently within or outside the light emitting element, and electronic measures may be taken to reduce performance loss as a result of the detected degradation of the organic layer.
US09312311B2	Organic luminescence display and method of manufacturing the same Provided are organic luminescence display and method for manufacturing the same. According to an aspect of the present invention, there is provided an organic luminescence display comprising a substrate and a plurality of pixels disposed on the substrate. The pixels comprise a plurality of first pixels, each comprising a first organic light-emitting layer, and a plurality of second pixels which are smaller than the first pixels and each of which comprises a second organic light-emitting layer. The surface roughness of the second organic light-emitting layer is greater than the surface roughness of the first organic light-emitting layer.
US09312304B2	LED illuminating device comprising light emitting device including LED chips on single substrate A light emitting device includes: a ceramic substrate; a plurality of LED chips; a printed resistor(s) connected in parallel with the plurality of LED chips; a dam resin made of a resin having a low optical transmittance; a fluorescent-material-containing resin layer; and an anode-side electrode and a cathode-side electrode, (a) which are provided on a primary surface of the ceramic substrate so as to face each other along a first direction on the primary surface and (b) which are disposed below at least one of the dam resin and the fluorescent-material-containing resin layer. With the configuration in which a plurality of LEDs, which are connected in a series-parallel connection, are provided on a substrate, it is possible to provide a light emitting device which can achieve restraining of luminance unevenness and an improvement in luminous efficiency.
US09312301B2	Imaging element and method of manufacturing the same A solid-state image sensor including a substrate having a photoelectric conversion element disposed therein, the photoelectric conversion element converting an amount of incident light into a charge amount, a memory unit disposed at a side of the photoelectric conversion element, the memory unit receiving the charge amount from the photoelectric conversion element, a first light-shielding section formed at a first side of the memory unit and disposed between the charge accumulation region and the photoelectric conversion element, and a second light-shielding section formed at a second side of the memory unit such that the second side is opposite the first side.
US09312300B2	Solid-state imaging device, method of manufacturing the same, and electronic apparatus A solid-state imaging device includes an Si substrate in which a photoelectric conversion unit that photoelectrically converts visible light incident from a back surface side is formed, and a lower substrate provided under the Si substrate and configured to photoelectrically convert infrared light incident from the back surface side.
US09312298B2	Solid-state imaging device with a signal storing portion including first and second semiconductor regions According to one embodiment, in a solid-state imaging device, a signal storage portion in each of a plurality of pixels includes a first semiconductor region and a second semiconductor region. The first semiconductor region is of a first conductive type. The first semiconductor region coveres a side wall of an element isolation portion on a side of the signal storage portion. The second semiconductor region is of a second conductive type. The second conductive type is an opposite conductive type to the first conductive type. The second semiconductor region is arranged vertically in a depth direction from a deeper position than a front surface in a semiconductor substrate and extending in a plate shape along the first semiconductor region.
US09312297B2	Semiconductor apparatus and electronic apparatus A semiconductor apparatus includes a first semiconductor chip, a second semiconductor chip, and a flare prevention plate. On the first semiconductor chip, a photoelectric conversion unit configured to perform photoelectric conversion on light received in a light receiving area is formed. The second semiconductor chip is electrically connected to the first semiconductor chip, the second semiconductor chip being disposed on a surface of the first semiconductor chip on a side of the light receiving area. The flare prevention plate is disposed on the second semiconductor chip, the flare prevention plate being configured to block light, the flare prevention plate being in contact with the second semiconductor chip.
US09312295B2	Semiconductor device and a manufacturing method thereof A semiconductor device has a chip region including a back-side illumination type photoelectric conversion element, a mark-like appearance part, a pad electrode, and a coupling part. The mark-like appearance part includes an insulation film covering the entire side surface of a trench part formed in a semiconductor substrate. The pad electrode is arranged at a position overlapping the mark-like appearance part. The coupling part couples the pad electrode and mark-like appearance part. At least a part of the pad electrode on the other main surface side of the substrate is exposed through an opening reaching the pad electrode from the other main surface side of the substrate. The mark-like appearance part and coupling part are arranged to at least partially surround the outer circumference of the opening in plan view.
US09312290B2	Sensor and method for fabricating the same A sensor and its fabrication method are provided, wherein the sensor includes: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, and a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a TFT device and a photodiode sensing device, wherein the TFT device is a top gate TFT. The photodiode sensing device includes: a receiving electrode connected with a source electrode, a photodiode disposed on the receiving electrode, a transparent electrode disposed on the photodiode, and a bias line disposed on and connected with the transparent electrode, the bias line is disposed as parallel to the gate line. In comparison with the conventional technology, the method for fabricating the sensor of the invention reduces the number of mask as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the defect free rate.
US09312289B2	Photoelectric conversion apparatus, manufacturing method thereof, and image pickup system A light guide portion includes a low refractive index portion and a high refractive index portion. The low refractive index portion has a refractive index equal to or lower than that of an insulating layer. The high refractive index portion has a refractive index higher than that of the low refractive index portion. The low refractive index portion is located above a separating portion, and is sandwiched by the high refractive index portion in a first direction. A width in the first direction of the low refractive index portion at a first position distant from the separating portion in a second direction is narrower than a width in the first direction of the low refractive index portion at a second position closer to the separating portion than the first position in the second direction.
US09312288B2	Thin film transistor array panel with overlapping floating electrodes and pixel electrodes According to an embodiment of the present invention, a thin film transistor array panel includes a gate line and a data line insulated from each other an insulating substrate where the gate line and the data line cross each other to define a pixel region, a thin film transistor (TFT) disposed at an intersection of the gate line and the data line, a floating electrode where at least a portion of the floating electrode overlaps the data line, and a pixel electrode disposed at the pixel region where the pixel electrode is connected to the TFT and overlaps the at least a portion of the floating electrode.
US09312285B2	Thin film transistor array panel and a method for manufacturing the same A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
US09312284B2	Active device array substrate An active device array substrate includes a substrate, first signal lines, second signal lines, pixel units, selection units, an insulating layer, and a driving unit. The second signal lines and the selection lines are electrically connected with the driving unit. The insulating layer is disposed among the first signal lines, the second signal lines and the selection lines and has contact holes. The contact holes are disposed corresponding to the first signal lines, and a portion of the selection lines are electrically connected with the first signal lines via the contact holes. The selection line corresponding to the contact hole the farthest from the driving unit and the closest to a reference axis of the substrate and the selection line corresponding to the contact hole the closest to the driving unit and the reference axis respectively receive a start signal and a terminal signal provided by the driving unit.
US09312281B2	TFT array substrate, LCD panel and wiring repairing method A TFT array substrate includes a pixel region and a wiring region disposed outside the pixel region. The wiring region has a wiring layer including scan or data wirings. A repair wiring layer including repair wiring is disposed insulatedly below or above the wiring layer. A scan or data wiring has a first intersection and a second intersection with a repair wiring section of the repair wiring. When the scan or data wiring is broken, a repair wiring section is cut off the repair wiring by a first cut-off point and a second cut-off point, and the broken scan or data wiring is electrically connected to the repair wiring section through soldering the first intersection and the second intersection. Thus, products that would otherwise be rejected in the manufacturing process of LCD panels can be repaired, which decreases the reject ratio, increases the yield and saves the production cost.
US09312279B2	Thin film transistor array substrate, method of manufacturing the same, and display apparatus including the same A thin film transistor (TFT) array substrate includes a substrate, a gate electrode, a gate line, a first data line, and a second data line on the substrate, a gate insulating layer that covers the gate electrode and the gate line and includes a first opening that exposes a portion of the first data line and a second opening that exposes a portion of the second data line, an active layer disposed on the gate insulating layer so that at least one portion of the active layer overlaps the gate electrode, a drain electrode and a source electrode that extend from opposite sides of the active layer, a pixel electrode that extends from the drain electrode, and a connection wiring that extends from the source electrode, and connects the first data line to the second data line through the first and second openings of the gate insulating layer.
US09312275B2	FinFET with reduced capacitance An finFET structure including a plurality of fins etched from a semiconductor substrate, a plurality of gates above and perpendicular to the plurality of fins, each comprising a pair of spacers on opposing sides of the gates, and a gap fill material above the semiconductor substrate, below the gate, and between the plurality of fins, wherein the gate separates the gap fill material from each of the plurality of fins.
US09312271B2	Non-volatile memory device and method for manufacturing same According to an embodiment, a non-volatile memory device includes electrodes, an inter-layer insulating film between the electrodes and at least one semiconductor layer extending through the electrodes and the inter-layer insulating film. The device includes a charge storage layer between the semiconductor layer and each electrode, a first insulating film between the charge storage layer and the semiconductor layer, and a second insulating film. The second insulating film includes a first portion between the charge storage layer and each electrode, a second portion between each electrode and the inter-layer insulating film, and a third portion that links the first portion and the second portion. In a cross-section of the third portion parallel to the first direction and a second direction toward each electrode from the charge storage layer, a curved surface on the charge storage layer side has a curvature radius larger than a surface on the electrodes side.
US09312267B2	Semiconductor device In a memory cell array region and a source contact region defined in a surface of a semiconductor substrate, a memory cell transistor including a floating gate electrode and a control gate electrode is formed. In a gate contact region, a dummy floating gate electrode is arranged to partially be superimposed on a dummy element formation region in a two-dimensional view. In a first interlayer insulating film and a second interlayer insulating film covering the memory cell transistor, a contact plug is formed to penetrate the first interlayer insulating film and a via is formed to penetrate a second interlayer insulating film.
US09312265B2	Apparatus for high speed ROM cells A ROM cell comprises a first first-level contact formed on a first active region of a transistor of a memory cell, a second first-level contact formed on a second active region of the transistor of the memory cell, wherein the second first-level contact is coupled to a first VSS line and a second VSS line formed in a first interconnect layer, wherein the second VSS line is electrically coupled to the first VSS line, and wherein the second VSS line is of a direction orthogonal to a direction of the first VSS line. The ROM cell further comprises a first bit line formed in the first interconnect layer, wherein the first bit line is formed in parallel with the second VSS line and a second bit line formed in the first interconnect layer, wherein the second bit line is formed in parallel with the second VSS line.
US09312264B2	Non-volatile memory device The present invention provides a non-volatile memory device using a memory transistor including an oxide semiconductor, capable of writing with low power consumption, without receiving an influence of deterioration of a selection transistor connected in series to the memory transistor. A memory cell 1 includes a memory transistor Qm, and first and second selection transistors Q1 and Q2. During a writing operation, the memory transistor Qm and the first selection transistor Q1 are set to the ON state, and the second selection transistor Q2 is set to the OFF state. A writing current is flown to a series circuit of the memory transistor Qm and the first selection transistor Q1. The memory transistor Qm is transited from a first state that indicates a transistor characteristic to a second state that indicates an ohmic resistance characteristic. During a reading operation, the first selection transistor Q1 is set to the OFF state, the second selection transistor Q2 is set to the ON state, a voltage is applied to a series circuit of the memory transistor Qm and the second selection transistor Q2, and it is detected whether the memory transistor Qm is in the first state or the second state.
US09312259B2	Integrated circuit structure with thinned contact Embodiments of mechanism for an integrated circuit (IC) structure are provided. The IC structure includes a substrate including a first diffusion region, a second diffusion region, and an isolation structure separating the first diffusion region and the second diffusion region. The IC structure further includes a gate structure formed over the substrate, and the gate structure extends from the first diffusion region to the second diffusion region. The IC structure further includes a contact formed over the substrate, and the contact includes a wide portion over the first diffusion region and the second diffusion region and a thin portion over the isolation structure.
US09312258B2	Strained silicon structure A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.
US09312252B2	Method of manufacturing a semiconductor device having a chip mounted on an interposer A semiconductor device 100 includes: a first semiconductor package 10; a first interposer 12 having an upper surface on which the first semiconductor package 10 is mounted; a first molding resin 14 that is provided on the upper surface of the first interposer 12 and seals the first semiconductor package 10; a second semiconductor package 20 mounted on an upper surface of the first molding resin 14; a second interposer 22 on which the second semiconductor package 20 is mounted by flip chip bonding; and a second molding resin 40 that is provided on the upper surface of the first interposer 12 and seals the first molding resin 14, the second semiconductor package 20, and the second interposer 22. The second semiconductor package 20 is mounted, with a surface thereof opposite to another surface mounted on the second interposer 22 faced down, on the upper surface of the first molding resin 14 via an adhesive 30.
US09312246B2	Light emitting device and lighting system having the same The present invention provides a light emitting device comprising a first light emitting portion that emits white light at a color temperature of 6000K or more and a second light emitting portion that emits white light at a color temperature of 3000K or less, which include light emitting diode chips and phosphors and are independently driven. The present invention has an advantage in that a light emitting device can be diversely applied in a desired atmosphere and use by realizing white light with different light spectrums and color temperatures. Particularly, the present invention has the effect on health by adjusting the wavelength of light or the color temperature according to the circadian rhythm of humans.
US09312242B2	Dense-pitch small-pad copper wire bonded double IC chip stack packaging piece and preparation method therefor A dense-pitch small-pad copper wire bonded double IC chip stack package comprises a plastic package body, in which a lead frame carrier and a frame lead inner pin are arranged; the upper surface of the lead frame carrier is fixedly connected with a first IC chip; a second IC chip is stacked on the first IC chip; the upper surface of the first IC chip and the upper surface of the second IC chip are respectively provided with a plurality of pads which are arranged as two lines of pad groups in parallel; the two pad groups are respectively a first pad group and a second pad group; a metal ball is implanted on each pad; each metal ball is connected with a first copper bonding ball; and a third copper bonding wire is formed by looping and arching on a corresponding metal ball between the second IC chip and the first IC chip. The preparation process of the present invention comprises thinning, scribing, loading the chip, performing pressure welding, plastic packaging and post-curing, trimming, electroplating, printing, forming and separating, and packaging. The package and the preparation method of the invention avoid the hidden danger of open circuit of a plastic packaging punching wire caused by the crater on the pad, the short circuit of adjacent welding spots, and the easy damage of a previous wire.
US09312241B2	Semiconductor device A semiconductor device includes an operation circuit formed on a top surface of a semiconductor substrate, a memory array formed over the operation circuit, an inner pad group formed on an intermediate layer between the operation circuit and the memory array and coupled to the operation circuit, a first outer pad group formed on a bottom surface of the semiconductor substrate, and a wiring structure passing through the semiconductor substrate, and coupling the inner pad group to the first outer pad group.
US09312237B2	Integrated circuit package with spatially varied solder resist opening dimension An integrated circuit (IC) package stack with a first and second substrate interconnected by solder further includes solder resist openings (SRO) of mixed lateral dimension are spatially varied across an area of the substrates. In embodiments, SRO dimension is varied between at least two different diameters as a function of an estimated gap between the substrates that is dependent on location within the substrate area. In embodiments where deflection in at least one substrate reduces conformality between the substrates, a varying solder joint height is provided from a fixed volume of solder by reducing the lateral dimensioning of the SRO in regions of larger gap relative to SRO dimensions in regions of smaller gap. In embodiments, the first substrate may be any of an IC chip, package substrate, or interposer while the second substrate may be any of another IC chip, package substrate, interposer, or printed circuit board (PCB).
US09312228B2	Semiconductor device and method for manufacturing semiconductor device An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the semiconductor chip. The sealing resin layer extends to a side surface of the passivation film to cover the side surface.
US09312227B2	Method of joining semiconductor substrate A method of joining semiconductor substrates, which may include: forming an alignment key on a first semiconductor substrate; forming an insulating layer on the first semiconductor substrate and the alignment key; forming a first metal layer pattern and a second metal layer pattern on the insulating layer; forming a first protrusion and a second protrusion, and an alignment recess positioned between the first protrusion and the second protrusion on a second semiconductor substrate; forming a third metal layer pattern and a fourth metal layer pattern on the first protrusion and the second protrusion, respectively; and joining the first semiconductor substrate and the second semiconductor substrate, in which the alignment key is positioned at the alignment recess when the first semiconductor substrate and the second semiconductor substrate are joined, is provided.
US09312226B2	Semiconductor device having an identification mark A semiconductor device includes a chip, a contact pad arranged over the front side of the chip and an identification mark arranged over the contact pad. The identification mark includes an information about a property of the chip.
US09312223B2	Method for fabricating a carbon nanotube interconnection structure The present invention relates to an interconnection structure and a method for fabricating the same. According to the present invention, cavities are formed between the interconnection dielectric by using a sacrificial layer, carbon nanotubes are used as the interconnection material for local interconnection between via holes, graphene nanoribbons are used as the interconnection material for metal lines, and cavities are included in the interconnection dielectric. In addition, the conventional CMOS BEOL Cu interconnection technique is applied to the intermediate interconnection level and the global interconnection level. In this way, the high parasitic resistance and parasitic capacitance in the Cu interconnection technique, which may occur when the local interconnection is relatively small in size, can be effectively overcome.
US09312222B2	Patterning approach for improved via landing profile The present disclosure is directed to a semiconductor structure and a method of manufacturing a semiconductor structure in which a spacer element is formed adjacent to a metal body embedded in a first dielectric layer of a first interconnect layer. A via which is misaligned relative to an edge of the metal body is formed in a second dielectric material in second interconnect layer disposed over the first interconnect layer and filled with a conductive material which is electrically coupled to the metal body. The method allows for formation of an interconnect structure without encountering the various problems presented by via substructure defects in the dielectric material of the first interconnect layer, as well as eliminating conventional gap-fill metallization issues.
US09312221B2	Variable capacitance devices A variable capacitance device includes a capacitor having a first capacitance and a variable resistor coupled in series with the capacitor. The variable resistor includes a gate structure formed over a channel region defined in a doped well formed in a semiconductor substrate. A resistance of the variable resistor is based on a voltage applied to the gate structure, which adjusts a resistance of the channel and a capacitance of the variable capacitance device.
US09312217B2	Methods for making a starting substrate wafer for semiconductor engineering having wafer through connections The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).
US09312216B2	Semiconductor device with semiconductor chip and wiring layers To improve noise immunity of a semiconductor device. A wiring substrate of a semiconductor device includes a first wiring layer where a wire is formed to which signals are sent, and a second wiring layer that is mounted adjacent to the upper layer or the lower layer of the first wiring layer. The second wiring layer includes a conductor plane where an aperture section is formed at a position overlapped with a portion of the wire 23 in the thickness direction, and a conductor pattern that is mounted within the aperture section of the conductor plane. The conductor pattern includes a main pattern section (mesh pattern section) that is isolated from the conductor plane, and plural coupling sections that couple the main pattern section and the conductor plane.
US09312210B2	Semiconductor device with air gap and method for fabricating the same A method for fabricating a semiconductor device includes forming, over a substrate, a plurality of first conductive structures which are separated from one another; forming multi-layered dielectric patterns including a first dielectric layer which covers upper ends and both sidewalls of the first conductive structures; removing portions of the first dielectric layer starting from lower end portions of the first conductive structures to define air gaps, and forming second conductive structures which are filled between the first conductive structures.
US09312205B2	Methods of forming a TSV wafer with improved fracture strength A method including forming a through-substrate via through a thickness of a substrate, the thickness of the substrate is measured from a front side of the substrate to a back side of the substrate, removing a first portion of the substrate to form an opening in the back side of the substrate such that a second portion of the substrate remains in direct contact surrounding a vertical sidewall of the through-substrate via, and filling the opening with an alternate material having a lower modulus of elasticity than the substrate.
US09312204B2	Methods of forming parallel wires of different metal materials through double patterning and fill techniques An integrated circuit and a method of forming an integrated circuit including a first dielectric layer including a surface, a plurality of first trenches defined in the dielectric layer surface, and a plurality of first wires, wherein each of the first wires are formed in each of the first trenches. The integrated circuit also includes a plurality of second trenches defined in the dielectric layer surface, and a plurality of second wires, wherein each of the second wires are formed in each of the second trenches. Further, the first wires comprise a first material having a first bulk resistivity and the second wires comprise a second material having a second bulk resistivity, wherein the first bulk resistivity and the second bulk resistivity are different.
US09312202B2	Method of forming a semiconductor substrate including a cooling channel A semiconductor substrate for use in an integrated circuit, the semiconductor substrate including a channel defined on a surface of the substrate. The channel includes a first wall, a second wall, and a third wall. The first wall is recessed from the surface. The second wall extends from the surface to the first wall. The third wall extends from the surface to the first wall and faces the second wall across the channel. At least one of the second wall and the third wall includes a plurality of structures projecting into the channel from the second wall or the third wall.
US09312196B2	Curable silicone composition, cured product thereof, and optical semiconductor The present invention relates to a curable silicone composition comprising: (A) an organopolysiloxane having at least two alkenyl groups in a molecule and represented by the average unit formula; (B) a straight chain organopolysiloxane having at least two alkenyl groups in a molecule and having no silicon-bonded hydrogen atoms; (C) an organosiloxane i) represented by the general formula, an organopolysiloxane (C2) having at least two silicon-bonded hydrogen atoms in a molecule and represented by the average unit formula, or a mixture of components (C1) and (C2); and (D) a hydrosilylation reaction catalyst. The curable silicone composition forms a cured product having a high refractive index and a low gas permeability.
US09312195B2	Semiconductor device A first photosensitive organic insulating film (PO1) formed in contact with a passivation film (PL) covers the entire circumference of a stepped portion (TRE) at a surface of the passivation film PL formed by a topmost conductive layer (TCL) and has an outer circumferential edge (ED1) positioned, along the entire circumference, on the outer circumferential side with respect to the stepped portion (TRE). This can prevent the first photosensitive organic insulating film (PO1) from peeling off the passivation film (PL).
US09312194B2	Integrated circuit packaging system with terminals and method of manufacture thereof A method of manufacture of an integrated circuit packaging system includes: providing a leadframe having a mounting platform; applying an attach layer on the mounting platform; mounting an integrated circuit die on the attach layer; forming an encapsulation on the integrated circuit die and the attach layer, the mounting platform exposed from the encapsulation; and forming a terminal having a terminal protrusion from the leadframe, the terminal protrusion below a horizontal plane of the mounting platform.
US09312191B2	Block patterning process for post fin A method of reducing etch time needed for patterning an organic planarization layer (OPL) in a block mask stack so as to minimize damages to gate structures and fin structures in a block mask patterning process is provided. The block mask stack including an OPL, a developable antireflective coating (DARC) layer atop the OPL and a photoresist layer atop the DARC layer is employed to mask one conductivity type of FinFET while exposing the other conductivity type FinFET during source/drain ion implantation. The OPL is configured to have a minimum thickness sufficient to fill in spaces between semiconductor fins and to cover the semiconductor fins. The DARC layer is configured to planarize topography of semiconductor fins so as to provide a planar top surface for the ensuing lithography and etch processes.
US09312190B2	Semiconductor device and method of manufacturing the same The present disclosure relates to a semiconductor device and a method of manufacturing the same. The semiconductor device may include a first metal gate electrode provided in a NMOS region of a substrate; and a second metal gate electrode provided in a PMOS region of the substrate, wherein the first and second metal gate electrodes may be formed of TiN material or TiAlN material. Here, the first metal gate electrode may have a higher titanium (Ti) content than the second metal gate electrode, and the second metal gate electrode may have a higher nitrogen (N) content than the first metal gate electrode.
US09312187B2	Semiconductor device and method of manufacturing the same The present invention discloses a semiconductor device, comprising a first MOSFET; a second MOSFET; a first stress liner covering the first MOSFET and having a first stress; a second stress liner covering the second MOSFET and having a second stress; wherein the second stress liner and/or the first stress liner comprise(s) a metal oxide. In accordance with the high-stress CMOS and method of manufacturing the same of the present invention, a stress layer comprising a metal oxide is formed selectively on PMOS and NMOS respectively by using a CMOS compatible process, whereby carrier mobility of the channel region is effectively enhanced and the performance of the device is improved.
US09312186B1	Method of forming horizontal gate all around structure This disclosure provides a horizontal structure by using a double STI recess method. The double STI recess method includes: forming a plurality of fins on the substrate; forming shallow trench isolation between the fins; performing first etch-back on the shallow trench isolation; forming source and drain regions adjacent to channels of the fins; and performing second etch-back on the shallow trench isolations to expose a lower portion of the fins as a larger process window for forming gates of the fins. Accordingly, compared to conventional methods limited by fin height from the STI, the double STI recess method provides greater fin height, which is a larger process window for HGAA nanowire formation, to easily produce multi-stack HGAA nanowires with high current density. The number of layers used in the multi-stack HGAA nanowires is not limited and may vary based on different designs.
US09312185B2	Formation of metal resistor and e-fuse Embodiments of present invention provide a method of forming metal resistor. The method includes forming a first and a second structure on top of a semiconductor substrate in a replacement-metal-gate process to have, respectively, a sacrificial gate and spacers adjacent to sidewalls of the sacrificial gate; covering the second structure with an etch-stop mask; replacing the sacrificial gate of the first structure with a replacement metal gate; removing the etch-stop mask to expose the sacrificial gate of the second structure; forming a silicide in the second structure as a metal resistor; and forming contacts to the silicide. In one embodiment, forming the silicide includes siliciding a top portion of the sacrificial gate of the second structure to form the metal resistor. In another embodiment, forming the silicide includes removing the sacrificial gate of the second structure to expose and silicide a channel region underneath thereof.
US09312184B2	Semiconductor devices and methods of manufacturing the same In a method of manufacturing a semiconductor device, a split gate structure is formed on a cell region of a substrate including the cell region and a logic region. The logic region has a high voltage region, an ultra high voltage region and a low voltage region, and the split gate structure includes a first gate insulation layer pattern, a floating gate, a tunnel insulation layer pattern and a control gate. A spacer layer is formed on the split gate structure and the substrate. The spacer layer is etched to form a spacer on a sidewall of the split gate structure and a second gate insulation layer pattern on the ultra high voltage region of the substrate. A gate electrode is formed on each of the high voltage region of the substrate, the second gate insulation layer pattern, and the low voltage region of the substrate.
US09312180B2	Method for forming semiconductor structure The present invention provides a method for forming a semiconductor structure, including the following steps: Firstly, a substrate is provided, the substrate has a first region defined thereon, a plurality of fin structure is disposed within the first region, and an insulating layer is disposed on the substrate and between each fin structure; next, a first material layer is then formed on the insulating layer, and the fin structures is exposed simultaneously, afterwards, the fin structure is partially removed, and an epitaxial layer is then formed on the top surface of each remained fin structure.
US09312179B2	Method of making a finFET, and finFET formed by the method A method includes forming first and second fins of a finFET extending above a semiconductor substrate, with a shallow trench isolation (STI) region in between, and a distance between a top surface of the STI region and top surfaces of the first and second fins. First and second fin extensions are provided on top and side surfaces of the first and second fins above the top surface of the STI region. Material is removed from the STI region, to increase the distance between the top surface of the STI region and top surfaces of the first and second fins. A conformal stressor dielectric material is deposited over the fins and STI region. The conformal dielectric stressor material is reflowed, to flow into a space between the first and second fins above a top surface of the STI region, to apply stress to a channel of the finFET.
US09312178B2	Method of dicing thin semiconductor substrates A method of dicing a plurality of integrated devices included in a semiconductor substrate using laser energy comprises the steps of directing a first laser beam onto a cutting line along the substrate to ablate a portion of the substrate located along the cutting line to be diced, the portion of the substrate that is ablated forming a recast material adjacent to the cutting line of the substrate that has been diced. A second laser beam is directed onto another portion of the substrate adjacent to the cutting line to conduct heat processing of the recast material formed adjacent to the cutting line.
US09312177B2	Screen print mask for laser scribe and plasma etch wafer dicing process Methods of using a screen-print mask for hybrid wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits separated by streets involves screen-printing a patterned mask above the semiconductor wafer, the patterned mask covering the integrated circuits and exposing the streets of the semiconductor wafer. The method also involves laser ablating the streets with a laser scribing process to expose regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the exposed regions of the semiconductor wafer to singulate the integrated circuits. The patterned mask protects the integrated circuits during the plasma etching.
US09312176B2	Removing conductive material to form conductive features in a substrate Apparatuses having, and methods for forming, conductive features are described. A hole is formed in a substrate and a conductive material is deposited in the hole. A part of the conductive material that occupies a first lengthwise portion of the hole is removed, and a conductive feature that occupies a second lengthwise portion of the hole remains in the substrate.
US09312175B2	Surface modified TSV structure and methods thereof Microelectronic elements and methods of their manufacture are disclosed. A microelectronic element may include a substrate including an opening extending through a semiconductor region of the substrate, a dielectric layer cover a wall of the opening within at least a first portion of the opening, a first metal disposed within the first portion of the opening, a second metal disposed within a second portion of the opening. The second metal may form at least part of a contact of the microelectronic element.
US09312171B2	Semiconductor devices having through-electrodes and methods for fabricating the same The present inventive concepts provide semiconductor devices and methods for fabricating the same. The method includes forming an inter-metal dielectric layer including a plurality of dielectric layers on a substrate, forming a via-hole vertically penetrating the inter-metal dielectric layer and the substrate, providing carbon to at least one surface, such as a surface including carbon in the plurality of dielectric layers exposed by the via-hole, forming a via-dielectric layer covering an inner surface of the via-hole, and forming a through-electrode surrounded by the via-dielectric layer in the via-hole.
US09312167B1	Air-gap structure formation with ultra low-k dielectric layer on PECVD low-k chamber Methods for reducing the k value of a layer using air gaps and devices produced by said methods are disclosed herein. Methods disclosed herein can include depositing a carbon containing stack over one or more features in a substrate, depositing a porous dielectric layer over the carbon containing stack, and curing the substrate to volatilize the carbon containing stack. The resulting device includes a substrate with one or more features formed therein, a porous dielectric layer formed over the features with an air gap formed in the features.
US09312159B2	Transport apparatus and exposure apparatus A substrate is transported between a first space and a second space, which are separated by a partition wall, through an opening portion formed in the partition wall. A transport apparatus includes a support device having a support portion which supports the substrate, the support device being provided so as to block the opening portion while a clearance between the partition wall and the support device is formed, the support device moving the support portion from a state where the support portion faces the first space to a state where the support portion faces the second space; and an adjustment device which adjusts an amount of the clearance, thereby suppressing the movement of fluid from the first space to the second space.
US09312157B2	Wafer carrier A front opening wafer container suitable for large wafers such as 450 mm utilizes componentry with separate fasteners to lock the componentry together in an expedient manner providing robust connections and cost efficiencies. A container portion has an open front and receives on a bottom surface a base plate secured by twist lock connectors that also provide recesses for purge grommets. Kinematic coupling components readily and robustly lock onto the base plate. Interior wafer support components latch onto brackets on the side walls utilizing a separate locking insert with holding tabs and locking detents. A wafer retainer provides support and counters enhanced wafer sag associated with 450 mm wafers when the door is installed and seated.
US09312153B2	Substrate processing system, transfer module, substrate processing method, and method for manufacturing semiconductor element A substrate processing system is provided with: a first transfer unit, which extends from a loader module to a first processing chamber for processing substrates, to transfer the substrates; and a second transfer unit, which is provided below or above the first transfer unit and extends from the loader module to a second processing chamber for processing substrates, to transfer the substrates. The first processing chamber and the second processing chamber do not overlap in the vertical direction, and are disposed at positions separated from each other in a plan view. At the same time, at least a part of the first transfer unit and at least a part of the second transfer unit overlap each other in the vertical direction.
US09312150B2	Semiconductor device and method of forming a metallurgical interconnection between a chip and a substrate in a flip chip package A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.
US09312149B2	Method for forming chip-on-wafer assembly A device includes a bottom chip and an active top die bonded to the bottom chip. A dummy die is attached to the bottom chip. The dummy die is electrically insulated from the bottom chip.
US09312143B1	Formation of isolation surrounding well implantation Embodiments of present invention provide a method of making well isolations. The method includes forming a hard-mask layer on top of said substrate; forming a first resist-mask on top of a first portion of the hard-mask layer and applying the first resist-mask in forming a first type of wells in a first region of the substrate; forming a second resist-mask on top of a second portion of the hard-mask layer and applying the second resist-mask in forming a second type of wells in a second region of the substrate; applying the first and second resist-masks in transforming the hard-mask layer into a hard-mask, the hard-mask having openings aligned to areas overlapped by the first and second regions of the substrate; etching at least the areas of the substrate in creating deep trenches that separate the first and second types of wells; and filling the deep trenches with insulating materials.
US09312141B2	Vapor phase chemical mechanical polishing of magnetic recording disks A method for polishing a carbon overcoat of a magnetic media that results in a smooth surface free of carbon cluster debris. The method involves forming a magnetic disk having a carbon overcoat formed thereon. The carbon overcoat is then polished in the presence of ozone (O3). The heat from the polishing process along with the presence of the ozone, cause any carbon particles removed by the polishing to form CO2 gas so that there is no remaining carbon particle debris on the surface of the disk.
US09312140B2	Semiconductor structures having low resistance paths throughout a wafer A semiconductor structure with low resistance conduction paths and methods of manufacture are disclosed. The method includes forming at least one low resistance conduction path on a wafer, and forming an electroplated seed layer in direct contact with the low resistance conduction path.
US09312138B2	Method for forming gate dielectric layer A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate. The method includes forming a buffer layer over the semiconductor substrate. The buffer layer is in an amorphous state. The method includes nitriding the buffer layer into a nitride buffer layer. The method includes forming a gate dielectric layer over the nitride buffer layer. The method includes performing a thermal annealing process to convert the gate dielectric layer into a crystalline gate dielectric layer. The method includes forming a gate electrode over the crystalline gate dielectric layer.
US09312137B2	Reduction of native oxides by annealing in reducing gas or plasma Native oxide growth on germanium, silicon germanium, and InGaAs undesirably affects CET (capacitive equivalent thickness) and EOT (effective oxide thickness) of high-k and low-k metal-oxide layers formed on these semiconductors. Even if pre-existing native oxide is initially removed from the bare semiconductor surface, some metal oxide layers are oxygen-permeable in thicknesses below about 25 Å thick. Oxygen-containing species used in the metal-oxide deposition process may diffuse through these permeable layers, react with the underlying semiconductor, and re-grow the native oxide. To eliminate or mitigate this re-growth, the substrate is exposed to a gas or plasma reductant (e.g., containing hydrogen). The reductant diffuses through the permeable layers to react with the re-grown native oxide, detaching the oxygen and leaving the un-oxidized semiconductor. The reduction product(s) resulting from the reaction may then be removed from the substrate (e.g., driven off by heat).
US09312132B2	Method of forming high-density arrays of nanostructures A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.
US09312130B2	Surface doping and bandgap tunability in hydrogenated graphene A method of introducing a bandgap in single layer graphite on a SiO2 substrate comprising the steps of preparing graphene flakes and CVD grown graphene films on a SiO2/Si substrate and performing hydrogenation of the graphene. Additionally, controlling the majority carrier type via surface adsorbates.
US09312125B2	Cyclic deposition method for thin film formation, semiconductor manufacturing method, and semiconductor device A cyclic deposition method for thin film formation includes forming a silicon thin film on an object by injecting a silicon precursor into a chamber in which the object is loaded, depositing silicon on the object, and performing a first purge, removing an unreacted portion of the silicon precursor and reaction by-products from the interior of the chamber, pre-processing a surface of the silicon thin film by forming a plasma atmosphere in the chamber and supplying a first reaction source having a hydrogen atom, and forming the silicon thin film as an insulating film including silicon, by forming the plasma atmosphere in the chamber and supplying a second reaction source having one or more oxygen atoms, one or more nitrogen atoms, or a mixture thereof.
US09312123B2	Method of manufacturing semiconductor device and substrate processing apparatus Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: (a) forming a discontinuous first layer including the first element and having a thickness of less than one atomic layer on the substrate by supplying a gas containing the first element into a process vessel accommodating the substrate; and (b) forming a second layer including the first element and the second element by supplying a gas containing the second element into the process vessel to modify the first layer under a condition where a modifying reaction of the first layer by the gas containing the second element is not saturated.
US09312119B2	Open trap mass spectrometer An open electrostatic trap mass spectrometer is disclosed for operation with wide and diverging ion packets. Signal on detector is composed of signals corresponding to multiplicity of ion cycles, called multiplets. Using reproducible distribution of relative intensity within multiplets, the signal can be unscrambled for relatively sparse spectra, such as spectra past fragmentation cell of tandem mass spectrometer, past ion mobility and differential ion mobility separators. Various embodiments are provided for particular pulsed ion sources and pulsed converters such as orthogonal accelerators, ion guides, and ion traps. The method and apparatus enhance the duty cycle of pulsed converters, improve space charge tolerance of the open trap analyzer and extends the dynamic range of time-of-flight detectors.
US09312116B2	Mass distribution spectrometry method and mass distribution spectrometer The present invention provides a mass distribution spectrometry which reduces an influence of the dispersion in the times at which ionizing beams irradiate a sample, on a mass spectrometry result, and can measure the mass distribution with high reliability. The mass distribution spectrometry is a mass spectrometry which includes irradiating the sample with a primary ion beam and detecting generated secondary ions, wherein this primary ion beam has a spread toward a direction perpendicular to a travelling direction, has a path length of each primary ion contained in the primary ion beam between a primary ion source and a surface of the sample adjusted by deflecting a trajectory, and is obliquely incident on the surface of the sample.
US09312112B2	Evacuating a sample chamber In one general aspect, a sample is transferred into a mass spectrometer by capturing a sample on a collector, inserting the collector into a sample chamber coupled to the mass spectrometer and a vacuum pump, evacuating the sample chamber using the vacuum pump to reduce an internal pressure of the sample chamber to a level less than atmospheric pressure, heating the collector to release the sample from the collector, and introducing the sample into the mass spectrometer from the evacuated sample chamber.
US09312106B2	Digital phase controller for two-phase operation of a plasma reactor Phase angle between opposing electrodes in a plasma reactor is controlled in accordance with a user selected phase angle. Direct digital synthesis of RF waveforms of different phases for the different electrodes is employed. The synthesis is synchronized with a reference clock. The address generator employed for direct digital synthesis is synchronized with an output clock signal that is generated in phase with the reference clock using a phase lock loop. The phase lock loop operates only during a limited initialization period.
US09312104B2	Coil antenna with plural radial lobes A low inductance coil antenna for a plasma reactor has plural conductor lobes extending radially from respective RF supply connections.
US09312101B2	Endpoint detection for photolithography mask repair A method includes scanning a lithography mask with a repair process, and measuring back-scattered electron signals of back-scattered electrons generated from the scanning. An endpoint is determined from the back-scattered electron signals. A stop point is calculated from the endpoint. The step of scanning is stopped when the calculated stop point is reached.
US09312100B2	Sensitivity correction method for dose monitoring device and particle beam therapy system In a particle beam therapy system which scans a particle beam and irradiates the particle beam to an irradiation position of an irradiation subject and has a dose monitoring device for measuring a dose of the particle beam and an ionization chamber smaller than the dose monitoring device, the ionization chamber measuring a dose of a particle beam passing through the dose monitoring device, the dose of the particle beam irradiated by the dose monitoring device is measured; the dose of the particle beam passing through the dose monitoring device is measured by the small ionization chamber; and a correction coefficient of the dose measured by the dose monitoring device corresponding to the irradiation position is found based on the dose of the particle beam measured by the small ionization chamber.
US09312099B2	Charged particle beam device and method for analyzing defect therein The present invention provides a charged particle beam device capable of automatically setting proper analysis positions for defects having various shapes. This charged particle beam device includes: an electron source for emitting an electron beam; a condenser lens for converging the electron beam emitted from the electron source; deflection means for changing a position of the electron beam converged by the condenser lens; an objective lens for constricting the electron beam changed by the deflection means so as to irradiate an inspection object therewith; a sample stage on which the inspection object is to be mounted; and defect analysis means for analyzing a defect based on information as to elements released from a defective portion of the inspection object by the irradiation with the electron beam, wherein the defect analysis means determines an analysis point based on a shape of the defect from among defect areas decided as one defect by the defect analysis means.
US09312098B2	Method of examining a sample in a charged-particle microscope Examining a sample in a charged-particle microscope of a scanning transmission type includes: Providing a beam of charged particles that is directed from a source through an illuminator so as to irradiate the sample; Providing a detector for detecting a flux of charged particles traversing the sample; Causing said beam to scan across a surface of the sample, and recording an output of the detector as a function of scan position, resulting in accumulation of a charged-particle image of the sample, Embodying the detector to comprise a plurality of detection segments; Combining signals from different segments of the detector so as to produce a vector output from the detector at each scan position, and compiling this data to yield a vector field; and Mathematically processing said vector field by subjecting it to a two-dimensional integration operation, thereby producing an integrated vector field image.
US09312097B2	Specimen holder used for mounting samples in electron microscopes A novel specimen holder for specimen support devices for insertion in electron microscopes. The novel specimen holder of the invention provides mechanical support for specimen support devices and as well as electrical contacts to the specimens or specimen support devices.
US09312095B2	Method and system for automating sample preparation for microfluidic cryo TEM A method and system is provided for automatically preparing transmission electron microscopy (TEM) samples for examination by depositing extremely small samples onto a grid without need for a blotting step. A sample liquid droplet is formed at the end of a capillary, wherein a portion of the liquid is transferred to the TEM sample grid by contact. The excess volume in the liquid droplet is then retracted by an adjacent capillary. After a predetermined time interval, the retraction capillary is moved toward the drop of the sample to remove the excess volume. As compared to a conventional machine, where the blotting procedure can deform the structure of the molecule of interest, the present invention utilizes a very low shear rate for removal of the excess sample fluid.
US09312093B1	Particle beam device comprising an electrode unit A particle beam device comprises a beam generator for generating a particle beam having charged particles and an electrode unit having a first electrode and a second electrode, wherein the first electrode interacts with the second electrode, in particular for guiding, shaping, aligning or correcting the particle beam. Moreover, the particle beam device comprises a low-pass filter being connected with at least one of: the first electrode and the second electrode, using an electrical connection. Additionally, the particle beam device comprises a mounting unit having an opening for the passage of the particle beam, wherein the at least one low-pass filter, the first electrode and the second electrode are arranged at the mounting unit. The electrode unit may comprise more than two electrodes, for example up to 16 electrodes.
US09312091B2	Charged particle beam apparatus In order to provide a charged particle beam apparatus enabling reduction of deflecting coma aberration in cases such as where wide field-of-view scanning is carried out, a charged particle beam apparatus is provided with an electromagnetic objective lens and a stage on which a sample is placed, wherein the electromagnetic objective lens is provided with the following: a plurality of magnetic paths; an objective lens coil; an opening disposed so as to face the sample; an inner lens deflector disposed more on the objective lens coil side than the end of the opening.
US09312081B2	Arcless fusible switch disconnect device for DC circuits A fusible switch disconnect includes a fuse, a primary switch connected in series with the fuse. and a semiconductor switch device connected in parallel with the fuse. The semiconductor device is configured to resist current flow through the fuse and the primary fuse to facilitate arcless operation of the primary switch when connected to energized, DC circuitry.
US09312080B2	Power tool A power tool includes at least one grip housing having at least one handle-shaped grip region and at least one switching unit having at least one movably mounted latch element. The at least one movably mounted latch element has a maximum width that extends over at least a major part of at least one maximum width of the at least one handle-shaped grip region of the at least one grip housing.
US09312079B2	Keyswitch and keyboard therewith A key switch disposed on a base of a keyboard includes a key cap, a linkage bar, an edge plate and a recess portion. The key cap is disposed above the base. The linkage bar connects the key cap and the base. The edge plate is connected to the base. A slot is formed on the edge plate, and an end of the linkage bar is slidably latched in the slot. The recess portion is formed on the base and adjacent to the slot. A step is between a holding surface of the recess portion and a top surface of the base. The end of the linkage bar is caved in the recess portion and held on the holding surface of the recess portion when the end of the linkage bar is slidably latched in the slot.
US09312078B2	Patterned graphite oxide films and methods to make and use same The present invention relates to patterned graphite oxide films and methods to make and use same. The present invention includes a novel strategy developed to imprint any required conductive patterns onto self-assembled graphene oxide (GO) membranes.
US09312071B2	Electronic device having variable capacitance element and manufacture method thereof An electronic device having a variable capacitance element, includes a support substrate providing physical support, a pair of anchors formed on the support substrate, and having support portions in a direction perpendicular to a surface of the substrate, a movable electrode supported by the support portions of the pair of anchors, having opposing first and second side surfaces constituting electrode surfaces, and at least partially capable of elastic deformation, a first fixed electrode supported above the support substrate, and having a first electrode surface opposing to the first side surface of the movable electrode, and a second fixed electrode supported above the support substrate, and having a second electrode surface opposing to the second side surface of the movable electrode.
US09312069B2	Laminated ceramic capacitor and manufacturing method therefor A laminated body that contains a perovskite-type compound containing Sr, Ba, Zr, and Ti and containing; Si; Mn; Al; and V. When the total content of Zr and Ti is 100 parts by mol, the total content m of Sr and Ba meets 100≦m≦105, the Si content a meets 0.1≦a≦4.0, the Mn content b meets 0.1≦b≦4.0, the Al content c meets 0.01≦c≦3.0, the V content d meets 0.01≦d≦0.3, the molar ratio w of Sr and Ba to Sr meets 0.60≦w≦0.95, the molar ratio z of the total of Zr and Ti to Zr meets 0.92≦z≦0.98, w and y meets and the crystal grains are 1.2 μm or less in average grain size.
US09312063B2	Contactless power transfer system and method A contactless power transfer system is provided. The system includes a first coil configured to produce a magnetic field. The system also includes a second coil configured to receive power from the first coil via the magnetic field. The system further includes a field focusing element. The field focusing element includes a plurality of resonators arranged in an array. Each of the plurality of resonators, upon excitation, interfere constructively in a direction of the second coil and interfere destructively in a remaining space to focus the magnetic field onto the second coil and enhance the coupling between the first coil and the second coil.
US09312061B2	Pulse transformer Disclosed herein is a pulse transformer that includes a drum core having a winding core portion and first and second flange portions, a plate core connected to the first and second flange portions, and a plurality of wires that are wound around the winding core portion. The first and second flange portions and the plate core are ground such that an inductance of the pulse transformer is 350 μH or more when a bias current of 8 mA is applied to the wires.
US09312060B2	Transformer circuits having transformers with figure eight and double figure eight nested structures A transformer includes a first loops and second loops. The first loops include a first set of input terminals. The first loops include at least three loops that are conductively coupled to each other in series by first crossovers. The second loops include a first set of output terminals. The second loops include at least three loops that are conductively coupled to each other in series by second crossovers. Each of the second conductive loops is inductively coupled to and nested within a respective one of the first conductive loops.
US09312056B2	Coil assembly A coil assembly is provided, comprising a coil former, a coil, and a connection block which is pivotally joined to the coil former. The coil is wound while the connection block is pivoted away, the winding wire ends are soldered to the terminal pins, and the connection block is pivoted close to the coil.
US09312054B2	Thermistor element, temperature sensor, and method for manufacturing the thermistor element A thermistor element includes a thermistor main body having a rectangular parallelepiped shape, and a first covering layer having reduction resistance and covering the periphery of the thermistor main body. At least a portion (exposed outer surface) of the outer surface of the first covering layer is exposed to the outside. When the shortest distance in a straight line in the first covering layer extending from a starting point on the thermistor main body to the exposed outer surface is defined as an exposed layer thickness at the starting point, the first covering layer is formed such that an exposed layer thickness measured by using any vertex of the rectangular parallelepiped thermistor main body as a starting point is equal to or greater than the smallest one of exposed layer thicknesses measured by using points on three sides and three flat surfaces which form the vertex.
US09312052B2	Superconducting wire material, superconducting wire material connection structure, superconducting wire material connection method, and treatment method of superconducting wire material end Superconducting wire material, superconducting wire material connection structure, superconducting wire material connection method, and treatment method of superconducting wire material end are shown. According to one implementation, a superconducting wire material connection structure includes, a first superconducting wire material, a second superconducting wire material, and a third superconducting wire material. The first superconducting wire material and the second superconducting wire material each include an end provided with a concave section in which at least a superconducting layer is removed and a filling section in which filling material is filled in the concave section. The first superconducting wire material and the second superconducting wire material are positioned so that the ends oppose to each other. A third superconducting wire material is connected to both the first superconducting wire material and the second superconducting wire material.
US09312051B2	Coaxial conductor structure The invention is a coaxial conductor structure for fault-free transmission of a TEM Mode of a HF signal wave within at least one band of frequency bands forming in the context of a dispersion relation. An inner conductor and an outer conductor are spaced radially apart from the inner conductor and an axially extending common conductor section of the inner and the outer conductor. A number n of electrically conductive ring-shaped structures are each fitted between the inner and outer conductor to be radially spaced apart, each of which have an electrical path completely surrounding the inner conductor and are arranged with a spatially periodic sequence with an equal distance between the two ring-shaped structures which are adjacent along the conductor section.
US09312050B2	Tinsel wire A tinsel wire is formed of a central fiber and at least one metallic lead wire combined with the central fiber. The central fiber is made of graphene.
US09312044B2	Semiconducting fused thiophene polymer ink formulation A formulation including: an organic semiconducting polymer selected from the diketopyrrolopyrrole (DPP) and fused thiophene co-polymer structures of the formulas (I), (II), or combinations thereof, or salts thereof, in an amount of from 0.1 to 5 wt % based on the total weight of the formulation: formulas (I) and (II), respectively, where m is an integer from 1 to 2, n is an integer from 4 to 80, X and Y are independently selected from a divalent heteroaryl, such as a thiophene, R1, R2, R3, and R4 is each a hydrocarbylene substituent as defined herein, a first solvent is selected from a cyclic aliphatic in an amount of from 2 to 98 wt %; and a second solvent selected from an aromatic in an amount of from 98 to 2 wt %. Also disclosed are method of making and using the disclosed formulations, for example, for use in electronic devices.
US09312042B2	Metal seed layer for solar cell conductive contact Metal seed layers for solar cell conductive contacts and methods of forming metal seed layers for solar cell conductive contacts are described. For example, a solar cell includes a substrate. A semiconductor region is disposed in or above the substrate. A conductive contact is disposed on the semiconductor region and includes a seed layer in contact with the semiconductor region. The seed layer is composed of aluminum (Al) and a second, different, metal.
US09312040B2	Adaptive x-ray filter for changing the local intensity of x-rays An adaptive x-ray filter for changing a local intensity of x-rays includes an x-ray absorbing first fluid and electrically deformable control elements. The electrically deformable control elements change a layer thickness of the first fluid at a site of a respective electrically deformable control element by at least partially displacing the x-ray absorbing first fluid.
US09312039B2	Confocal double crystal monochromator A monochromator is adapted to select at least one band of wavelengths from diverging incident radiation. The apparatus includes a first crystal and a second crystal. A band of emitted wavelengths of the first crystal is adapted to the at least one band of wavelengths. A surface curvature of the first crystal is adapted to focus emitted radiation in a first plane. A band of emitted wavelengths of the second crystal also is adapted to the at least one band of wavelengths. Parallel faces of a lattice structure of the second crystal are oriented at a first predetermined angle from a surface of the second crystal. In another embodiment, an apparatus is adapted to select at least one band of wavelengths from diverging incident synchrotron radiation in a given range of wavelengths with an energy resolution finer than about five parts in 10000 and optical efficiency greater than about 50 percent.
US09312034B2	Passive residual heat removal system and nuclear power plant equipment The invention includes a heat exchanger provided at a position higher than a primary containment vessel; a condensate storage tank disposed below the heat exchanger and above an upper end of a reactor core placed in a reactor pressure vessel; a non-condensate gas discharge line connected to an upper section of the condensate storage tank and to a suppression pool; a second condensate discharge line connected to a position below that section of the condensate storage tank to which a first end of the non-condensate gas discharge line is connected, and to the suppression pool; and a condensate return line connected to a position below that section of the condensate storage tank to which a first end of the second condensate discharge line is connected, and to a side portion of the reactor pressure vessel, the side portion being above the upper end of the core.
US09312033B2	NOR-type flash memory device configured to reduce program malfunction Embodiments of the present invention include a NOR-type flash memory device capable of reducing or eliminating program malfunctions. In some embodiments, the device includes a memory array, row selection circuit, column selection circuit, and program driver circuit. The memory array includes a memory sector having a first sector bit line and a second sector bit line. The memory array also includes a plurality of flash memory cells disposed on a matrix structure having a plurality of cell bit lines and a plurality of word lines arranged sequentially. The cell bit lines are alternately defined as first cell bit lines and second cell bit lines in sequential order. The first cell bit lines are connected to the first sector bit line in response to column selection signals thereof, and the second cell bit lines are connected to the second sector bit line in response to column selection signals thereof.
US09312032B2	Semiconductor memory apparatus and data processing system with main memory blocks and redundant memory blocks sharing a common global data line A semiconductor memory apparatus includes: a memory area including a plurality of memory banks having main memory areas configured to transmit and receive data to and from the outside through a plurality of global data lines, respectively, and one or more redundancy memory areas configured to use any one of the global data lines as a common global data line; and a controller configured to control data to be transmitted and received through the common global data line, as a redundancy program mode, a redundancy read mode, or a redundancy erase mode is enabled.
US09312029B2	Memory device and associated controlling method A memory device and associated controlling method are provided. The memory device includes a memory cell array, a sensing unit and a controller. The memory cell array has a plurality of memory cells. The sensing unit is electrically connected to the memory cell array and the controller. The sensing unit senses characteristic of a memory cell of the plurality of memory cells. The controller determines whether the characteristic of the one of the memory cells deviates and accordingly controls the memory cell array.
US09312024B2	Flash memory device having efficient refresh operation Provided is a flash memory device capable of efficiently performing a refresh operation. The flash memory device includes a normal memory array including a plurality of normal memory cells arranged in a matrix of word lines and bit lines, wherein the plurality of normal memory cells are divided into a plurality of memory blocks and are programmable and erasable; a refresh address generation unit configured to generate a refresh block address, wherein the refresh block address is sequentially increased in response to activation of a refresh driving signal; and a refresh driving unit driven to refresh a memory block specified by the refresh block address among the memory blocks of the normal memory array in a unit refresh frame, and generate the refresh driving signal. In the flash memory device, a refresh operation may be efficiently performed to fix a data disturbance.
US09312019B1	Memory device and method for operating the same According to an embodiment, an operation method for a memory device which has a first memory element and a second memory element respectively provided on both sides of a semiconductor member includes applying a first voltage to a second word line, the first voltage being negative for a voltage of a cell source line, and applying a second voltage to a first word line, the second voltage being positive for the voltage of the cell source line when reading out a data from the first memory element.
US09312014B2	Single-layer gate EEPROM cell, cell array including the same, and method of operating the cell array A cell array portion of a single-layer gate EEPROM device includes a plurality of unit cells formed over a substrate to share a first well region in the substrate. Each of the plurality of unit cells includes a floating gate having a first part disposed over the first well region and a second part extending from the first part to have a stripe shape, a selection gate spaced apart from the floating gate and disposed to be parallel with the second part of the floating gate, and an active region disposed in the substrate to intersect the floating gate and the selection gate.
US09312010B1	Programming of drain side word line to reduce program disturb and charge loss Techniques are provided for programming the memory cells of a drain-side edge word line of a set of word lines before programming memory cells of any other word line of the set. Pass voltages applied to the other word lines act as stress pulses which redistribute holes in the charge-trapping material of the memory cells of the other word lines to reduce short-term charge loss and downshifting of the threshold voltage. Additionally, one or more initial program voltages used for the drain-side edge word line are relatively low and also act as stress pulses. The memory cells of the drain-side edge word line are programmed to a narrower Vth window than the memory cells of the other word lines. This compensates for a higher level of program disturb of erased state memory cells of the drain-side edge word line due to reduced channel boosting.
US09312007B2	Memory device and method having charge level assignments selected to minimize signal coupling A non-volatile memory device programs memory cells in each row in a manner that minimizes the coupling of spurious signals. A control logic unit programs the cells in a row using a set of bit state assignments chosen by evaluating data that are to be written to the cells in the row. The control logic unit performs this evaluation by determining the number of cells in the row that will be programmed to each of a plurality of bit states corresponding to the write data. The control logic unit then selects a set of bit state assignments that will cause the programming level assigned to each bit state to be inversely proportional to the number of memory cells in the row that are programmed with the bit state. The selected set of bit states is then used to program the memory cells in the row.
US09312006B2	Non-volatile ternary content-addressable memory with resistive memory device A scheme for non-volatile ternary content-addressable memory with resistive memory device is proposed. The non-volatile ternary content-addressable memory comprises five transistors including a pair of search transistors with a first search transistor and a second search transistor, a read transistor, a write transistor and a match line transistor, wherein a match line is coupled to the match line transistor; and a pair of variable resistances have a first variable resistance and a second variable resistance. The pair of search transistors is coupled to the pair of variable resistances.
US09312004B1	Driver for semiconductor memory and system including the same A driver for a semiconductor memory may reduce an error in writing data in memory cells by adjusting the height and width of a spike current, when the memory cells in which data having the same level are written are arranged at different distances. In addition, the driver may reduce the error by controlling the amount of charges supplied to each of the memory cells that are arranged at different distances.
US09312000B1	Semiconductor apparatus A semiconductor apparatus includes first and second variable resistors, a variable resistor selection unit and a threshold voltage adjustment unit. The variable resistor selection unit includes a plurality of transistors suitable for electrically coupling each of the first and second variable resistors to a sense amplifier in response to resistor selection signals. The threshold voltage adjustment unit provides a first voltage to bulks of the plurality of transistors during a read operation, and a second voltage that is different than the first voltage to the bulks of the plurality of transistors during operations other than the read operation.
US09311996B2	Semiconductor storage device having resistance-change storage elements A semiconductor storage device according to an embodiment includes a plurality of resistance-change storage elements. A plurality of bit lines are connected to the storage elements, respectively. A voltage control circuit controls a decreasing rate of an absolute value of a voltage of a selected bit line among the bit lines when data is written to one of the storage elements.
US09311991B2	Solid state drive with hybrid storage mode A solid state drive (SSD) with a hybrid storage mode includes a flash memory, and a data processing module in information communication with the flash memory. The flash memory includes a first storage sector that stores data by a first potential storage mode, and a second storage sector that stores data by a second potential storage mode. The first storage sector corresponds to physical block addresses P0 to PM−1 and logical block addresses L0 to LM−1. The second storage sector corresponds to physical block addresses PM to PM+N−1 and logical block addresses LM to LM+1−1. The data processing module has a data processing mode. In the data processing mode, the data processing module identifies the logical block address included in a command, and executes the command at the corresponding physical block address. Accordingly, an SSD having a high stability and a high data storage capacity is provided.
US09311989B2	Power gate for latch-up prevention In an embodiment of the invention, power is provided to an SRAM array without causing latch-up by charging the positive voltage node in the SRAM array and the Nwell regions in the SRAM at approximately the same rate.
US09311988B2	Storage control system and method, and replacing system and method A row buffer 102 in DRAM 100 stores any data read from a memory array 101 in a specified data length unit. An LLC 206 is cache memory, and extracts and stores a part of data stored in the row buffer 102 as cache data. In a MAC 701, when push-out control of the LLC 206 is performed, it is predicted that data at which DIMM address is stored in the row buffer 102 in the near future based on the queuing state of an MRQ 203. In the MAC 701, each physical address of the cache data in a push-out target range 702 on the LLC 206 is converted into a DIMM address. If the converted address matches the predicted address of the data, then the cache data corresponding to the matching addresses is pushed out on a priority basis from the LLC 206.
US09311983B2	Dynamically applying refresh overcharge voltage to extend refresh cycle time A refresh voltage control engine selectively applies different high voltages to use in refresh operations. The control engine can detect that a portion of a memory device needs to be refreshed, and determine that the refresh cycle time is too short for a state of the portion of the memory device. The memory device typically has an associated refresh cycle time or time between refreshes based on the device and system architecture. The control engine can generate one or more control signals to cause the system to apply an overcharge refresh to overcharge the portion of the memory device with a refresh operation to extend the refresh cycle time for the portion of the memory device.
US09311982B2	Semiconductor device, electronic component, and electronic device A highly reliable semiconductor device. In a configuration where a precharged source line is discharged to a bit line by establishing electrical continuity between the source line and the bit line through a transistor to read a potential retained at a gate of the transistor, the potential of the bit line is switched in accordance with a change in potential of the source line due to the discharge. With this configuration, the voltage between the source and drain of the transistor can be kept lower than a predetermined voltage by discharge. Accordingly, the source-drain voltage of the transistor can be kept lower than its breakdown voltage, so that the semiconductor device can have high reliability.
US09311979B1	I/O pin capacitance reduction using TSVs Methods for reducing pin capacitance and improving off-chip driver performance by using TSVs to enable usage of off-chip drivers located within selected and unselected die of a plurality of stacked die are described. A reduction in pin capacitance allows for faster switching times and/or lower power operation. In some embodiments, a TSV may connect an internal node (e.g., the output of a pre-driver) within a selected die of a plurality of stacked die with the input of an off-chip driver within an unselected die of the plurality of stacked die. In some cases, only a single die within a die stack may be selected (or enabled) at a given time. Using a TSV to connect internal nodes associated with off-chip drivers located within both selected and unselected die of the die stack allows for reduced off-chip driver sizing and thus reduced pin capacitance.
US09311974B1	Input/output strobe pulse control circuit and semiconductor memory device including the same An input/output strobe pulse control circuit includes a control signal generator suitable for generating first to third control signals in response to a column selection enable signal and a first input/output strobe pulse signal, a first latch suitable for generating a second input/output strobe pulse signal in response to the first and second control signals, wherein the second input/output strobe pulse signal is enabled at a failing edge of the column selection enable signal and disabled at a falling edge of the first input/output strobe pulse signal, and a second latch suitable for generating a selection control signal for selectively outputting the first input/output strobe pulse signal or the second input/output strobe pulse signal based on whether the first input/output strobe pulse signal is enabled within an enabling section of the column selection enable signal, in response to the second and third control signals.
US09311973B2	Input buffer for semiconductor memory device and flash memory device including the same An input buffer includes an amplifier circuit configured to amplify an input signal and output an amplified signal to a first output node. The input signal is amplified according to a first bias voltage set, at a bias node, to a first level based on a power supply voltage and a reference voltage. The input buffer includes an output circuit configured to receive and buffer the amplified signal and output an output signal to a second output node. The input buffer includes a dynamic bias voltage generator configured to change the first bias voltage to a second level in response to a transition of the output signal.
US09311969B2	Systems and methods of storing data A method of writing data is performed in a data storage device with a controller and a memory. The memory includes latches and multiple storage elements and is operative to store a first number of bits in each storage element according to a first mapping of sequences of bits to states of the storage elements. The method includes loading data bits into the latches within the memory and generating manipulated data bits in the latches by manipulating designated data bits in the latches using one or more logical operations. The method also includes storing sets of the manipulated data bits to respective storage elements of the group of storage elements according to the first mapping. The designated data bits correspond to states of the respective storage elements according to a second mapping of sequences of bits to states. The second mapping is different than the first mapping.
US09311967B2	Configurable voltage reduction for register file A system, a memory device and a method are contemplated in which the apparatus may include a plurality of memory cells, a plurality of voltage reduction circuits, and control circuitry. The plurality of voltage reduction circuits may be configured to reduce a voltage level of a power supply coupled to the plurality of memory cells. The control circuitry may be configured to select one of the voltage reduction circuits based on one or more operating parameters. The control circuitry may be further configured to activate the selected voltage reduction circuit upon receiving a write command directed towards the memory cells. The control circuitry may be further configured to execute the write command. Upon completion of the write command, the control circuitry may be further configured to de-activate the selected one of the voltage reduction circuits.
US09311966B1	Hemmed seal for a storage device enclosure A storage device enclosure may include a baseplate having a bottom portion and walls extending from a perimeter of the bottom portion, a cover that includes a planar interface surface with the baseplate, and a gasket configured to be compressed between the baseplate and the cover at the interface surface. The cover may include a skirt extending about a perimeter of the cover and one or more discrete areas with a hem in place of the skirt. The baseplate may include one or more close clearance areas are thinner and that correspond to areas of the cover that include the hem. One or more hemmed seals are formed when the baseplate and the cover are pressed together.
US09311963B2	Recording apparatus and control method thereof An apparatus, comprises an obtaining unit which obtains moving image data; a recording unit which records the obtained moving image data on first and second media; and a control unit which controls the recording unit to, in accordance with an instruction to start recording on the second medium during recording of the moving image data on the first medium, start recording of the moving image data on the second medium, and in accordance with an instruction to stop recording on the second medium during recording of the moving image data on the first medium, stop recording of the moving image data on the second medium and record, on the first medium, additional information about positions in the moving image data recorded on the first medium that correspond to the start and stop instructions.
US09311961B2	Image extracting device, image extracting method, and recording medium The image processing device includes an image data input unit for receiving data of moving images and still images; an image grouping unit for classifying the moving images and the still images into groups; an image analyzer for analyzing the moving images and the still images classified by group, and obtaining analysis information of the images, and information on relationship between the moving images and the still images; a frame image extractor for extracting frame images from the moving images according to at least one of the analysis information and the relationship information; a layout determining unit for determining a layout of the still images and the frame images according to at least one of the analysis information and the relationship information; and an image arranging unit for arranging the still images and the frame images according to the layout.
US09311959B1	Read channel optimization using multi-dimensional smoothing Apparatus and method for optimizing read channel parameters in a storage device. In some embodiments, a method includes obtaining raw error rate data for different read channel parameter values in each of a plurality of zones of a memory. The raw error rate data for each of the different reach channel parameter values are filtered to provide a sequence of second order polynomial curves with smoothed data points in each of the zones. A second order regression is applied to the smoothed data points in each of the zones to provide a sequence of regression curves. An optimal read channel parameter value for each of the zones is selected using the sequence of regression curves, and the optimal read channel parameter values are used during subsequent read operations to retrieve data stored in the zones.
US09311958B2	Recording/reproducing system and server If a fault, or deterioration in read-out quality, is detected during recording processing with respect to a first recording face, a duplication is made, with respect to the recorded data on the second recording face of the same recording medium, on a separate recording medium.
US09311957B2	Multi-channel audio signal converting device using time-varying digital filter, electronic system including the same, and method of converting multi-channel audio signal A multi-channel audio signal converting device using a time-varying digital filter, an electronic system including the same, and a method of converting an audio signal using the time-varying digital filter are provided. The multi-channel audio signal converting device includes a first signal channel and a second signal channel configured to perform analog-to-digital conversion or digital-to-analog conversion using a first clock signal; and a first time-varying filter configured to synchronize a digital audio signal synchronized with a second clock signal different from the first clock signal with the first clock signal and to input the digital audio signal to the second signal channel when digital-to-analog conversion is performed or to synchronize an output signal of the second signal channel with the second clock signal when analog-to-digital conversion is performed.
US09311956B2	Information processing device, information processing method, and program An information processing device includes: a data processing unit that executes a process of reproducing content recorded in a medium, wherein the data processing unit acquires a token from the medium, the token being management data corresponding to content recorded in the medium, compares a server ID recorded in the acquired token with a server ID recorded in a server certificate acquired from a server from which the management data is acquired, and halts reproduction of content when the two server IDs are not identical.
US09311953B2	Recording layer, information recording medium, and target The present invention relates to an information recording medium that has good enough recording characteristics even without containing Pd. The information recording medium has a recording layer including an oxide of Mn in which Mn atoms are partially or fully present as Mn with a valence of +4.
US09311943B2	Compensation of laser diode introduced flying height changes Embodiments described herein generally relate to controlling the flying height of a slider. The methods can include transmitting radiation from a radiation source, determining a change in temperature, the change in temperature being the difference between a first temperature and an ambient temperature and changing the flying height of the slider and head based on the change in temperature. The devices generally include a head with a supporting surface and a media facing surface, a radiation source submount, a radiation source, and a temperature sensor positioned proximate the radiation source submount or the radiation source.
US09311942B2	Information storage device with multiple-use fields in servo pattern An embodiment of the present invention implements some or all major servo subfunctions for a storage device in integrated servo fields comprising sequences of encoded bits having selected mathematical properties. The integrated servo field is composed of a number of encoded sequences, which are members of a selected sequence set that is constrained to preferably provide some or all of the following functions: the Servo Track Mark (STM), the Position Error Signal (PES) and positional information such as the track-ID. The integrated servo fields can provide a Position Error Signal (PES) in relation to the center of a data track through the amplitude of the signal read for adjacent sequences. The servo system detects the sequences in the signal from the read head using a set of digital filters for the set of encoded sequences.
US09311941B1	Erase coarse guide spiral-based in-drive erase process In an in-drive erase process for erasing disk surfaces of a hard disk drive, erase spirals are written on multiple disk surfaces and at a different write frequency than that of other data patterns on the disk surfaces. The erase spirals written on a first disk surface can be used to control an erase process on a portion of the remaining disk surfaces. Erase spirals are then written on a different disk surface and can then be used to erase all data on the first disk surface. Consequently, even when every disk surface includes previously written data patterns that can potentially interfere with control of the erase process, the erase spirals so written can control the erase process with sufficient precision to thoroughly erase each disk surface.
US09311939B1	Write-through media caching Write-through media caching for a Data Storage Device (DSD) including at least one disk for storing data. A write command is received for storing data in the DSD and the data is written for the write command in a first region of the at least one disk with a first track density. The data for the write command is also written in a second region of the at least one disk with a second track density greater than the first track density without reading the data for the write command from the first region.
US09311936B2	Magnetic recording head and disk drive provided therewith According to one embodiment, a magnetic recording head includes a main pole configured to apply a recording magnetic field to a recording layer of a recording medium, a trailing shield opposed to the main pole with a write gap therebetween, and a high-frequency oscillator between the main pole and the trailing shield in a range of a width of the main pole in a track width direction, and configured to generate a high-frequency magnetic field. The high-frequency oscillator includes a spin injection layer, an intermediate layer, and an oscillation layer, and at least the oscillation layer comprises divided oscillation regions.
US09311935B2	Method and apparatus for magnetic recording head having a waveguide A method of forming a wave guide for a heat assisted magnetic recording slider of a disk drive includes depositing a layer of waveguide material onto a substrate, and depositing a layer of a hard mask material onto the waveguide material. The method then includes depositing a layer of photoresist onto the hard mask material, and exposing the photoresist to produce a hard mask pattern that includes a waveguide pattern. The method also includes stripping the photoresist material leaving the hard mask pattern having a first line edge roughness. The method also includes removing the waveguide material not covered by the hard mask, the waveguide having sidewalls which having a line edge roughness which is substantially equal to the first line edge roughness. Also disclosed is an apparatus for accomplishing the method.
US09311934B1	Symmetrical STO for oscillation with both polarity bias Embodiments disclosed herein generally relate to a MAMR head. The MAMR head includes an STO and a current switching system electrically coupled to the STO. The current switching system can be used to optimize the STO frequency by changing the STO bias polarity, i.e., by changing the direction of the current flowing to the STO. As a result, the difference between the STO frequency and the magnetic media frequency is minimized, which improves recording capability of the MAMR head.
US09311931B2	Context assisted adaptive noise reduction Methods and apparatuses for context assisted noise reduction are disclosed. In one example, noise data associated with background noise detected by a microphone at a mobile device is received. The noise data is processed to identify whether a threshold noise level has been exceeded. An event notification is transmitted, where the event notification is operable to initiate identifying a location having a reduced background noise.
US09311930B2	Audio based system and method for in-vehicle context classification A method of determining contexts for a vehicle, each context corresponding to one or more events associated with the vehicle, for example that the radio is on and a window is open. The method comprises detecting sound activities in an audio signal captured in the vehicle, and assigning context to the vehicle based on the detected sound activities. Non-audio data such as the operational status of a vehicle system or device is used to help assign contexts.
US09311929B2	Digital processor based complex acoustic resonance digital speech analysis system A speech analysis system uses one or more digital processors to reconstruct a speech signal by accurately extracting speech formants from a digitized version of the speech signal. The system extracts the formants by determining an estimated instantaneous frequency and an estimated instantaneous bandwidth of speech resonances of the digital version of the speech signal in real time. The system digitally filters the digital speech signal using a plurality of complex digital filters in parallel having overlapping bandwidths to ensure that substantially all of the bandwidth of the speech signal is covered. This virtual chain of overlapping complex digital filters produces a corresponding plurality of complex filtered signals. A first estimated frequency and a first estimated bandwidth is generated for each of the filtered signals, and speech resonances of the input speech signal are identified therefrom.
US09311928B1	Method and system for noise reduction and speech enhancement System and method for producing enhanced speech data associated with at least one speaker. The process of producing the enhanced speech data comprises: receiving distant signal data from a distant acoustic sensor; receiving proximate signal data from a proximate acoustic sensor located closer to the speaker than the distant acoustic sensor; receiving optical data originating from an optical unit configured for optically detecting acoustic signals in an area of the speaker and outputting data associated with speech of the speaker; processing the distant and proximate signals data for producing a speech reference and a noise reference; operating an adaptive noise estimation module, which identifies stationary and/or transient noise signal components, using the noise reference; and operating a post filtering module, which uses the optical data, speech reference and identified noise signal components for creating an enhanced speech data.
US09311920B2	Voice processing method, apparatus, and system Methods, apparatus, and systems for voice processing are provided herein. An exemplary method can be implemented by a terminal. A voice bit stream to be sent can be obtained. Voice control information corresponding to the voice bit stream to be sent can be obtained. The voice control information can be used for a voice server to determine a voice-mixing strategy. The voice bit stream and the voice control information can be sent to the voice server. At least one voice bit stream, returned by the voice server based on the voice-mixing strategy, can be received. The at least one voice bit stream can be outputted.
US09311918B2	Automated communication techniques Various technologies and techniques are disclosed for providing an autoresponder that allows subscribers to opt-in to one or more autoresponder campaigns using their spoken voice. Voice input is received from a subscriber and converted to text. The subscriber is added to at least one campaign. A contact communication identifier is stored in a subscriber contact record from the text that was converted from the voice input. One or more messages are sent to the subscriber using the contact communication identifier, and according to a schedule specified in the campaign. A virtual seminar playback system is described that simulates a live virtual seminar and allows subscribers to access a playback of a media recording over a communication connection at a specified time. An autoresponder system is described that delivers messages to subscribers in multiple available formats, based upon selections received by the subscribers.
US09311908B2	Diaphragm and process for producing a diaphragm for an ultrasonic transducer The invention relates to a diaphragm (1) for an ultrasonic transducer having a diaphragm body (2) which is made of metallic material and is provided on an outer surface region (5; 8) with a coating (10). In order to make it possible for the diaphragm surface to be provided with a particularly damage-resistant coating, the coating (10) has a transparent form such that the surface region (5; 8) of the diaphragm body (2) is visible through the coating (10).
US09311906B2	Electronic organ with free-combined keys and a method to realize free combination The present invention discloses a kind of electronic organ with free-combined keys and the method to realize free combination of key groups. The electronic organ comprises host processor and key groups. The method includes steps: S1, Connect freely combined key groups to the electronic organ; S2, The host processor obtains the number of the key groups, address information and locations of keys in key groups; S3, The host processor sets the function or scale for each key according the number of key groups, address information and locations of keys in key groups. The present invention realizes free combination and disassembly of key groups by a method recognizing the free-combined key groups. It makes miniaturization and portability of electronic organ possible and strengthens user experience. Its structure is simple and it brings good economic and social benefits. The present invention can be applied to a variety of electronic organs.
US09311903B1	Adjustable and foldable shoulder rest for violin or viola An adjustable and foldable shoulder rest for a violin or viola includes a shoulder-engaging body having first and second foldable forks at first and second ends of the body for attaching to the violin or viola, first and second slidable end members for supporting the first and second forks, the first and second slidable end members being slidable between retracted and extended position, wherein the first and second slidable end members each comprises a pull-tab adjustment mechanism for relocating a protrusion shaped to engage one of a first plurality of apertures disposed in a slot. The shoulder rest may have a foam cushion with openings attached to the shoulder-engaging side of the shoulder rest. The end members may define rotational housings for receiving respective rotatable drums that receive threaded stems of the forks, thereby enabling the height of the forks to be adjusted and further enabling the forks to fold.
US09311902B2	Method of fabricating bow stick of stringed instrument and bow stick of stringed instrument A method of fabricating a bow stick includes winding a prepreg, in which a fiber is impregnated with a resin, on a mandrel with a diameter gradually decreasing toward a distal end, setting a semi-fabricated product, in which the prepreg is wound on the mandrel, into a mold and molding the semi-fabricated product in a shape corresponding to a cavity formed between the mold and the mandrel by heating and pressurizing the semi-fabricated product in the mold, and taking out the mandrel from a molded product molded in the shape corresponding to the cavity to acquire a long and hollow stick body. When adjusting at least one of a weight distribution, a center of gravity, and a weight of the stick body, the volume of the cavity is changed using the mandrel of which the diameter or the diameter variation is gradually changed in an axis direction.
US09311898B2	Display zoom controlled by proximity detection Various embodiments provide a user device comprising a touch screen display having a touch screen input; a proximity detector arrangement comprising a plurality of sensors for detecting a location of an input device; and a control unit comprising a processor. The control unit is configured to receive data from the proximity detector to determine the location of the input device, including a value related to the distance of the input device to the display; and control the display to perform a zoom function to enlarge or reduce the size of content on a portion of the display based on the value related to the distance of the input device to the display. The proximity detector arrangement and control unit are configured to detect the location of the input device within a detection volume and to provide a gradual variation in enlargement or reduction of the size of content as the distance of the input device to the display varies. Providing a gradual variation in zoom allows for a more precise and enjoyable user experience.
US09311897B2	Convergent matrix factorization based entire frame image processing Drive signals for a display device may be generated using Separable Non-negative Matrix Series Representation (SNMSR) of source image data and applying a nonnegative matrix factorization (NNMF) process to source image data to generate approximation image data (Ii), partial sum image data (Pi) and residue image data (Ji). Iteratively, NNMF may be applied to Ji such that subsequent Ii and Ji may be generated, where each Ii can be associated with a corresponding sub-frame image. At each iteration, the Ii may be sent to the display buffer for selective activation of multiple row and column drivers during a single sub-frame interval. At each iteration, a determination may be made if a predetermined criterion is satisfied. The iterations may be terminated and the series truncated when the predetermined criterion is satisfied. Integration of the sub-frame images displayed over a complete frame interval by human eye effectively corresponds to the source image.
US09311896B2	Glyph rendering Among other things, one or more techniques and/or systems are disclosed for rendering a glyph. Rendering data for the glyph can be received, such as size, shape, color, etc., along with first sub-pixel position for initially rendering the glyph on a display. A first rendering quality can be identified for the first sub-pixel position and second rendering quality can be identified for a second sub-pixel position, which may comprise an alternate rendering position. A sub-pixel position shift can be selected for the glyph based at least upon a comparison of the first and second rendering qualities. The sub-pixel position shift can comprise a difference between the first sub-pixel position and the second sub-pixel position, where the second rendering quality is selected/preferable over the first rendering quality. The glyph can be rendered by applying the selected sub-pixel position shift.
US09311893B2	Display device A display device includes a display panel which displays an image corresponding to input image data and is divided into a display blocks, a light source module which includes a light source blocks respectively corresponding to the display blocks, each of the light source blocks including a first light source which emits light of a first color, and a second light source which emits light of a combination of second and third colors, a dimming controller which outputs a dimming signal, a light source module driver which drives each of the light source blocks based on the dimming signal, where the dimming controller detects block image data corresponding to each of the display blocks from the image data, calculates color data based on the block image data, and provides a first dimming signal and a second dimming signal to the light source module driver.
US09311892B2	Electronic paper display device and driving method Embodiments of the present invention relate to an electronic paper display device and its driving method. The electronic paper display device comprises a plurality of pixels. Each of the pixels includes at least two thin film transistors, and each thin film transistor is electrically connected to a corresponding data line and a corresponding gate line respectively, and within one refresh cycle, is turned on once separately. Embodiments of the invention can make refresh rate quicker and requirement on storage capacitance lower so as to achieve faster grayscale refresh.
US09311888B2	Image processing device, image processing method and program An image processor includes a input converter converting an input image into linear first image data of a first color gamut; a color gamut converter converting first image data into second image data expressing a second color gamut narrower than the first color gamut; a blend coefficient selector selecting a first blend coefficient when hue and saturation belong to a first color domain range, a second blend coefficient, having a reduced synthesis ratio of second image data compared with the first blend coefficient, when hue and saturation belong to a second color domain range, and a third blend coefficient, between the first and second blend coefficients, when hue and saturation belong to a color domain between the first color domain range and the second color domain range; and a color synthesis unit synthesizing first image data and second image data according to the decided blend coefficient.
US09311886B2	Display device including signal processing unit that converts an input signal for an input HSV color space, electronic apparatus including the display device, and drive method for the display device According to an aspect, a display device includes an image display panel on which pixels each including sub-pixels for displaying a first color, a second color, a third color, and a fourth color are arranged, and a signal processing unit that converts an input value of an input signal for an input HSV color space into an output signal for an extended HSV color space. The signal processing unit divides the extended HSV color space into a plurality of spaces, sets limit proportion values different from each other with respect to at least two spaces of the divided spaces respectively, calculates an extension coefficient α with respect to the input signal by using the input signal and a limit proportion value set with respect to a space according to the input signal, and calculates the output signal based on at least the input signal and the extension coefficient α.
US09311882B2	Display device A display device includes a data driver having i data output terminals (i being a natural number greater than 1) and outputting data voltages to the i data output terminals in accordance with a source output enable signal provided from a timing controller, an output controller connected between the i data output terminals and i data lines, and i garbage switches respectively connected to the i data lines and connecting the i data lines to a ground terminal at a power input timing when a power supply voltage is applied to the display device, and interrupting the connection between the i data lines and the ground terminal at a timing later than an output timing of a first source output enable signal provided from the timing controller after the power input timing.
US09311878B2	Display panel and scanning circuit A display panel and a scanning circuit are disclosed herein. The scanning circuit includes a plurality of shift registers. Each of the shift registers includes a driving unit, a control unit, and an operating unit. The driving unit is configured to receive a start signal and a driving clock signal, and provide a scan signal to an output end according to the start signal and the driving clock signal. The control unit is configured to provide a second voltage to the output end according to a first voltage on a control node, and to provide the second voltage to a driving end according to the first voltage on the control node. The operating unit is configured to operatively provide the first voltage to the control node according to an operating clock signal after the scan signal is outputted.
US09311877B2	Liquid crystal display having high and low luminances alternatively represented A liquid crystal display includes: a liquid crystal capacitor; a first switching element which transmits a data voltage to the liquid crystal capacitor; a second switching element connected to the liquid crystal capacitor; and a transformation capacitor connected to the second switching element. A difference between a first time when the first switching element is turned on and a second time when the second switching element starts is turned on is greater than 1 horizontal period and less than 1 frame period.
US09311874B2	Power connection structure of driver IC chip A power connection structure of a driver IC chip including a first power terminal unit formed on one side thereof, a second power terminal unit formed on the other side thereof, and a dummy power terminal unit formed between the first power terminal unit and the second power terminal unit. The driver IC chip is mounted to a liquid crystal panel of a liquid crystal display device in a chip-on-glass (COG) type. Both of the first power terminal unit and the dummy power terminal unit and both of the dummy power terminal unit and the second power terminal unit are connected through routing lines in the driver IC chip.
US09311869B2	Display system The present invention discloses a display system, comprising at least one jointed screen which is composed of a plurality of liquid crystal display panels jointed with each other, in which, each liquid crystal display panel is provided with a first polarizer only at a light entering side thereof, so that a visible angle at which contents displayed by the liquid crystal display panel can be seen from a light exiting side thereof is an obtuse angle; two adjacent jointed liquid crystal display panels are jointed with each other at their adjacent sides, and a joint angle formed at the light exiting side is greater than a right angle, such that the light exiting side of each display panel is located in a region covered by an angle range of the visible angle of at least one display panels other than said display panel.
US09311868B2	Liquid crystal display device having a kickback detector A liquid crystal display device that can reduce picture quality deterioration due to a kickback voltage and can accurately detect a kickback voltage is provided. The liquid crystal display device includes: a liquid crystal panel including a detector configured to generate a kickback voltage detection signal, a detection line for supplying the kickback voltage detection signal, and a ground pattern along and adjacent to one side of the detection line; and a common voltage generator connected to the detection line and configured to generate a common voltage corresponding to the kickback voltage detection signal and to supply the generated common voltage to the liquid crystal panel.
US09311861B2	Display device in which feature data are exchanged between drivers A display device includes a display panel including a display region and first and second drivers. Feature data indicating feature values of first and second images displayed on first and second portions of the display region are exchanged between the first and second drivers, and the first and second drivers drive the first and second portions of the display region in response to the feature data.
US09311854B2	Pixel unit driving circuit, pixel unit and display device A pixel unit driving circuit, a pixel unit and a display device, wherein said pixel unit driving circuit of the pixel unit comprises a switching unit (201) having a first terminal connected to a high-voltage signal terminal (Vdd), a second terminal connected to a light-emitting device (OLED), a third terminal connected to a first control line (CN1), and a fourth terminal connected to a second control line (CN2); a driving transistor (T1) having a drain connected to the switching unit (201), and a source connected to a low-voltage signal terminal (Vss); and a capacitance storage unit (202) having a first terminal connected to the gate of the driving transistor (T1), a second terminal connected to the source of the driving transistor (T1), and a third terminal connected to the second control line (CN2). Amount and on-off of the driving current Ioled and data current Idata can be controlled via the switching unit (201) to make the current scaling ratio Idata/Ioled change inversely as Ioled changes, thus guaranteeing the data current Idata can quickly charge the first capacitor regardless of amount of the driving current Ioled.
US09311853B2	Display device, method of laying out light emitting elements, and electronic device Disclosed herein is a display device in which light emitting elements of a plurality of colors including a light emitting element emitting blue light are formed in each pixel on a substrate on which a transistor is formed for each sub-pixel, and a plurality of pixels formed with sub-pixels of the plurality of colors as a unit are arranged in a form of a matrix, wherein relative positional relation between transistors of sub-pixels of respective light emission colors including blue light and a light emitting section of a light emitting element emitting the blue light is laid out such that distances between the transistors of the sub-pixels of the respective light emission colors including the blue light and the light emitting section of the light emitting element emitting the blue light are equal to each other for the respective colors.
US09311852B2	Pixel circuit and organic light-emitting display comprising the same Provided are a pixel circuit and an organic light-emitting display. The pixel circuit comprises a driving thin film transistor and a light-emitting diode which is connected between a low level input terminal and a high level input terminal of a driving power supply in series, the pixel circuit further comprises a first capacitor and a driving control unit, a first terminal of the first capacitor is electrically connected with a first electrode of the driving thin film transistor through the driving control unit, a second terminal of the first capacitor is connected with a gate of the driving thin film transistor, a second electrode of the driving thin film transistor is electrically connected with the gate of the driving thin film transistor through the driving control unit, the driving control unit is connected with a gate line and a data line. Since respective pixel circuits may output uniform currents, the brightness of light-emitting diodes in the pixel circuits is uniform, and in turn the display brightness of the organic light-emitting display comprising the pixel circuits is uniform.
US09311851B2	Pixel circuit, display device using the same, and display device driving method A pixel circuit includes: an organic light emitting diode (“OLED”); a threshold circuit which generates an output signal based on an input signal, where the threshold circuit has a hysteresis characteristic with respect to the input signal; a first transistor including a first electrode connected to a data line, a second electrode connected to an input terminal of the threshold circuit, and a gate electrode connected to a scan line; and a second transistor including a first electrode connected to a first power, a second electrode connected to an anode of the organic light emitting diode, and a gate electrode connected to an output terminal of the threshold circuit, where the second transistor controls a current amount that flows to the organic light emitting diode from the first power based on the output signal of the threshold circuit.
US09311847B2	Display system having monitoring circuit and methods thereof A modular multi-panel display system includes a mechanical support structure, an array of light emitting diode (LED) display panels arranged in rows and columns and mounted to the mechanical support structure so as to form an integrated display. A receiver box is mounted to the mechanical support, where the receiver box is housed in a housing that is separate from housings of each of the led display panels. The receiver box includes a receiver card coupled to feed data to be displayed on the integrated display to a plurality of the led display panels, where the receiver box includes a network interface card configured to receive data from a control box disposed at a remote location. A monitoring circuit is disposed within the receiver box, where the monitoring circuit is configured to generate an operational data of the array of LED display panels, where the network interface card is configured to send the operational data from the monitoring circuit to a monitoring server.
US09311846B2	Display apparatus and control method thereof A display apparatus and control method are provided. The display apparatus includes a transparent display panel, an image processor that processes an image signal to display an image on the transparent display panel based on the processed image signal, a sensor which senses a user located in front of and behind the transparent display panel. The display apparatus includes a controller that determines by the sensor whether a user is located in front of, or behind, the transparent display panel if the image is displayed on the transparent display panel to be normally recognized by a user located in front of the transparent display panel. The controller controls the image processor to selectively display on the transparent display panel a reverse image of the image to be normally recognized by a user located behind the transparent display panel according to the determination.
US09311844B2	Source driver and method to reduce peak current therein A source driver and a method to reduce peak current of the source driver are provided. The source driver includes a latch circuit, a level shifter and a digital-to-analog converter (DAC) circuit. The latch circuit latches current bit-data. The latch circuit is coupled to an input terminal of the level shifter. The DAC circuit is coupled to an output terminal of the level shifter. When the current bit-data is not a complement of previous bit-data, the latch circuit selects and outputs the current bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the output data of the level shifter. When the current bit-data is the complement of the previous bit-data, the latch circuit selects and outputs the previous bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the current bit-data.
US09311843B2	Image display device An image display device includes a flexible display unit transformable by a force between a first state and a second state having different curved degrees; a pressing member disposed at a rear surface of the flexible display unit, to apply the force to the flexible display unit; a driving unit to push or pull the pressing member such that a curved state of the pressing member is implemented; and an adjusting unit to couple the pressing member and the driving unit to each other, and movable with respect to the driving unit, the adjusting unit to adjust the curved state of the pressing member.
US09311840B2	Display and operating method thereof A display and an operating method of the display are provided. The display includes a display panel, a timing controller, and a plurality of source drivers. The source drivers are coupled to the timing controller and the display panel, and the source drivers are coupled to one another. The timing controller outputs a plurality of training packets to the source drivers. When the source drivers lock a clock of the timing controller according to the training packets, the timing controller outputs a plurality of color data packets and a plurality of control packets to the source drivers according to a lock signal. The source drivers respectively output pixel voltages to the display panel and determine output timings of the pixel voltages according to the clock of the timing controller and the control packets. The training packets and the color data packets are serially transmitted to the source drivers.
US09311839B2	Method for driving liquid crystal panel, method for testing flicker and liquid crystal display apparatus A method for driving a liquid crystal panel, a method for testing flicker and a liquid crystal display apparatus are disclosed. They relate to the technical field of liquid crystal display. By changing the driving mode of polarity inversion, it is achieved that the flicker test is performed on the liquid crystal panel with the Z inversion array arrangement on basis of the flicker test pattern of 1+2H. In two adjacent columns of pixel units in the plurality of pixel units, one column common data line is connected with the pixel electrodes located at the opposed sides of the common data line alternatively through the thin film transistors. The method for driving the liquid crystal panel comprises: applying the data line driving signals with opposed polarities to the odd columns of data lines and the even columns of data lines within one frame of picture, wherein the polarities of the data line driving signals are inversed, each time two rows of the gate lines have been scanned, to form a specific polarity arrangement, the initial data line driving signals for two adjacent frames of pictures have opposed polarities.
US09311835B2	Lighting mount for interior-lighted signage and method of retrofitting a lighted sign A lamp support assembly, retrofit kit, and method are provided for lighting a sign from an interior thereof. The assembly can be used as a drop-in replacement for high-voltage gas-discharge tube lamps such as high-output fluorescent lamps, and may be used to retrofit signs originally built for gas-discharge tube lamps with low-voltage, high-efficiency lighting such as LED lighting. The assembly includes an elongate support member for supporting electric lamp units, with end caps at opposite ends of the support member for engaging the original electro-mechanical mounts (or replacement mounts) in the sign. Thus, the lamp support assembly can be supported in the sign in a similar manner as gas-discharge tube lamps, and can be powered by a low-voltage power source, which may replace a higher-voltage power source in the case of a retrofit.
US09311834B2	Display module including transparent display panel and display system including the display module Disclosed is a display module including a transparent display panel and a frame to fix a side of the transparent display panel, wherein the frame has a communication unit to receive data from the outside, a controller to process the received data and to output a drive command corresponding to the processed data and a display drive unit to drive the transparent display panel in response to the drive command from the controller. A display system includes a system body and a display module detachably mounted in the system body.
US09311833B2	Trailer with display screen storage and support A trailer with display screen storage and support includes infrastructure necessary to store, support and adjust the position and orientation of a large display screen displaying audio/video programming. The trailer has a bed facilitating storage of screen sections on one side of a telescoping support. A portion of the roof is attached to the telescoping support so the telescoping support emerges from within the trailer by lifting the roof portion integrated with the telescoping support. The screen display is separable into top and bottom halves, the top half affixed to the telescoping support and the bottom half separable from the top half and laterally movable to and from a storage position and to and from a position at which it may be releasably connected to the top half of the screen display. The screen display may have ends pivotable from extended to retracted configurations with respect to a center section.
US09311825B2	Biometric sensing and processing apparatus for mobile gaming, education, and wellness applications An apparatus for interoperably utilizing multiple biosensor data obtained from a finger of the user. A biometric sensor board is retained in a housing adapted for retaining a finger of the user and maintaining multiple sensors in contact with the skin thereof. Implementations are described for fingertip and ring mounted sensor boards. In one implementation, these sensors can be sensors electrodermal response (EDR), or photoplethysmograph (PPG) signals, or temperature, or acceleration in three axes, and combinations thereof. The biometric sensor board registers and processes the signals from the sensors and communicates them to a mobile device which interoperably utilizes multiple sensor information to determine aspects of user emotional state within an application to generate results which are displayed on the mobile device.
US09311823B2	Caching natural language questions and results in a question and answer system Mechanisms are provided for answering an input question. An input question to be answered from a source is received and processed to one or more extract features of the input question. The extracted one or more features are compared to cached features stored in one or more entries of a question and answer (QA) cache. A determination is made as to whether there is a matching entry in the one or more entries of the QA cache based on results of the comparing and, if so, candidate answer information is retrieved from the matching entry. The retrieved candidate answer information is returned to the source of the input question as candidate answer information for answering the input question.
US09311822B2	Interactive puzzle book assembly An interactive book assembly has first and second page portions, and a plurality of uniquely-shaped workpieces. The first page portion removably retains the workpieces in a plurality of first receiving areas. The second page portion has a plurality of second receiving areas that have unique shapes that each match a respective one of the workpieces so as to receive and retain a mating. Each second receiving area has a switch area located to correspond to the position of an indicia area of the mating workpiece when the mating workpiece is positioned in the respective second receiving area. Membrane switches are positioned adjacent to a switch area of each second receiving area to align with the indicia area of the workpiece inserted into the matching second receiving area. When a reader presses the activation indicium on the workpiece, the workpiece will press against the switch area, causing activation of the associated membrane switch and generation of a sound relating to the workpiece.
US09311820B2	Configurability options for information, airspace, and property utilized by an unmanned aerial vehicle platform A device receives aviation information associated with aviation in a geographical region, and receives configurability options associated with the aviation information. The device analyzes the aviation information based on the configurability options to generate analyzed information, and receives a request for a flight path for a UAV to travel from a first location to a second location in the geographical region. The device calculates the flight path from the first location to the second location based on the analyzed information and capability information associated with the UAV, and generates flight path instructions for the flight path. The device provides the flight path instructions to the UAV to permit the UAV to travel from the first location to the second location via the flight path.
US09311814B2	System and method for automatically setting up a universal remote control A system and method for configuring a remote control to command the operation of appliances, to capture demographic data, and to provide services, such as automated warranty registration, instructions, viewing guides, etc., relevant to the appliances is provided. The system includes a database and associated server that are located remotely from the remote control and accessible via a network connection. Command codes, graphical user interface elements, and services are accessed and downloaded to the remote control, as appropriate, using data supplied to the server that identifies the appliances and/or functional capabilities of the appliances. This data can be supplied by the appliances directly or can be obtained from other sources such as barcode labels, network devices, etc.
US09311810B2	Implementing standardized behaviors in a hosting device A system includes a standard functionality hosting device. The hosting device includes standard functionality hosting logic that includes machine-readable instructions stored on a tangible, non-transitory machine-readable medium configured to implement, control, or implement and control management functionalities defined by a standard, for one or more devices that are not independently enabled to implement, control, or implement and control the management functionalities. Further, the hosting device includes a processor configured to implement the alarm standard hosting logic.
US09311807B2	Environmental monitor device An environmental monitoring device comprises a data bus, a multitude of sensors, at least one processing unit, input/output device(s); communications interface(s), and memory. Communications interface(s) communicate with at least one environmental sensor device comprising with a multitude of sensors. The multitude of sensors may include particle counter(s), pressure sensor(s) and/or the like. The memory is configured to hold data and machine executable instructions. The machine executable instructions are configured to cause at least one processing unit to: collect sensor data from at least one environmental sensor device; and generate a report of sensor data that exceeds at least one threshold.
US09311802B1	Systems and methods for avoiding collisions with mobile hazards A safety system, and associated methods of operation, for detecting a mobile hazard on a pathway and reporting to a user information relating to the object to help the user avoid a collision with the mobile hazard. The safety system includes a sensor system for detecting the concurrent presence of both a user and a mobile hazard within a monitoring zone of the sensor system. Upon detection of both the user and the mobile hazard within the monitoring zone, the sensor system generates a sensor signal. The sensor signal is received by a reporting system, which in response, generates a warning signal to alert the user to the presence of the mobile hazard.
US09311801B2	Emergency notification apparatus and method A system, apparatus and method for alerting an emergency responder to an emergency, which includes a processor obtaining data from at least one sensor, determining, that the data indicates an emergency condition, based on the determining, obtaining location information and a unique identifier, and communicating the location information and the unique identifier to a node via a network connection.
US09311800B2	Safety device for a technical installation or a technical process The disclosure relates to a safety device and a method for detecting and evaluating the degree of attention of an operator of a technical installation or a technical process, which includes a first module which records values of predefined physiological parameters of the operator and determines a first characteristic number from the recorded values, compares the determined first characteristic number with a predefined first characteristic value, which activates a second module which records further values provided by a checking or triggering mechanism. The second module determines a second characteristic number for the degree of attention of the operator from the recorded further values, compares the second characteristic number with at least one second predefined characteristic value, which triggers an activation module in order to take countermeasures which increase the attention of the operator of the installation.
US09311791B2	Tactile feel control device A tactile feel control device is disclosed. The tactile feel control device can include an electric motor configured to be mechanically coupled to a manual control interface that is movable by a user. The tactile feel control device can also include a bias module operable to generate a bias to be applied by the electric motor. The bias can be configured to provide a desired tactile feel to the user at the manual control interface. In addition, the tactile feel control device can include a control module operable to output a drive signal to the electric motor configured to apply the bias. The bias can be insufficient, alone, to cause movement of the manual control interface.
US09311779B2	Power winners processing method A system and method is disclosed for a multi-site casino or resort wide promotional winners selection. The system selects a winner based on playing with a card at a table game or slot machine, or just being at an active slot machine, opened table game, or other activity within a resort.
US09311776B2	Local game-area network system A local game-area network includes a plurality of gaming devices and local game-area servers. Each local game-area server is associated with a corresponding gaming device. Each local game-area server in the local game-area network is operatively associated with every other local game-area server in the local game-area network. Additionally, one of the local game-area servers is a host local game-area server while the remaining gaming devices and associated local game-area servers are clients. Furthermore, the host status of the host local game-area server moves dynamically to an available local game-area server in the local game-area network in response to the host local game-area server becoming non-operational.
US09311775B2	Data import/export architecture between online properties A secure architecture can provide a bridge between the utility and entertainment value of online properties. An architecture that employs an internal entity that controls import and export of data (“import/export controller”) and an external entity that operates as a liaison (“data liaison”) between the import/export controller and one or more other online properties allows this bridge in a secure manner. The import/export controller and the data liaison handle data transmissions (e.g., data feeds, data updates, etc.) between the online properties without exposing resources of the online properties. The import/export controller applies rules that regulate import and export of data, and the data liaison allows the import/export controller to operate in obscurity.
US09311773B2	Table game tournaments using portable devices Table game tournament systems can include player terminal(s), electronic gaming table(s), and/or a remote server. A player terminal can have an outer housing, a controller located therewithin or thereabout, input and output component(s), and a communications interface to an outside gaming network having other functionally similar gaming device(s), gaming table(s), and a remote server. The controller and/or server can facilitate providing tournament information to a player, which information can include whether the player would qualify for the next tournament round, who is the most serious opponent to the player, and/or the chip difference therebetween. A terminal can also facilitate asynchronous and individually paced tournament play, switching between different tournament tables on demand, and play of other non-tournament table games thereat simultaneously with the play of the table game tournament. Portable computing devices can be used as player terminals and can permit players to play in actual or practice play-along modes.
US09311772B2	Jackpot interfaces and services on a gaming machine A disclosed a player tracking unit provides a touch screen display with a touch screen controller integrated into the touch screen sensor assembly. Game service interfaces may be presented on the touch screen display that allow a user to obtain one or more game services. With the touch screen sensor, a user may navigate through the game service interface and supply information required to obtain a game service. Types of interfaces provided with the gaming machine include a jackpot interface for displaying one or more jackpots selected by the player or one or more jackpots that the player is eligible to win.
US09311771B2	Presenting autostereoscopic gaming content according to viewer position A wagering game system and its operations are described herein. In some embodiments, the operations can include determining a position of a player in physical world space (“player's position”) in front of an autostereoscopic display (“display”). The display includes optical units configured to project views of wagering game content with an autostereoscopic, three-dimensional effect. The operations can further include performing a repeating subroutine for each of the optical units associated with the wagering game content. The repeating subroutine, for each one of the optical units, determines that one of the views has a viewing angle that corresponds to the player's position, configures a virtual camera in virtual world space according to the viewing angle and renders, based on configuration of the virtual camera, a portion of the wagering game content that corresponds to pixels of the autostereoscopic display associated with the one of the optical units.
US09311770B2	Player controls The patent involves the use of a portable device with a universal serial bus connector and memory which can store the unique biometrics of its registered owner for the purposes of identification; record the biometrics of any person attempting to use the device; confirm whether the user is the registered owner of the device; control access to electronic devices; monitor and record the operational activity of its user; store pre-defined value, duration and budgetary constraints; compare activity to pre-defined values, durations and budgetary constraints; store monetary value; visually indicate when operative; be electronically locked and de-activated; and connect and communicate directly or remotely to other electronic devices.The device can be used for example in the identification and elimination of problem gamblers from gambling devices/services while either physically present at a gambling venue or through remote access via the internet, interactive television, intranets, extranets, telephones or other digital communication services.
US09311767B2	System for storage shelving and methods of use thereof The present invention relates to a system for product storage and methods of categorizing, storing, and delivering products to end users via the system, the system's components including a processor, a “smart shelving” device, boxes for insertion into and utilization by the “smart shelving” device, and ID readers. Through the present invention, products are able to be securely and more certainly delivered to the proper recipient of the products.
US09311766B2	Wireless communicating radio frequency signals The present disclosure is directed to a system and method for wirelessly communicating Radio Frequency (RF) signals. In some implementations, a microSD payment system includes an antenna element and a card element. The antenna element affixes to a surface of a mobile device and includes antenna for wireless communicating RF signals with retail terminals and a connection to a microSD card element. The card element includes a shape and dimensions approximately equal to a standard microSD card and wirelessly executes transactions with the retail terminals using the antenna of the antenna element.
US09311765B2	Banknote deposit apparatus A banknote deposit apparatus includes: a storing box 70 configured to receive the banknote stacked in a stacking unit 60 so as to store the banknote; and a clamping and transporting mechanism 10 configured to clamp surfaces of the banknote stacked in the stacking unit 60 and to transport the banknote to a direction parallel to the surfaces of the clamped banknote so as to store the banknote in the storing box. A front opening 61 through which the stacked banknote is taken out from outside, and a front shutter unit 62 configured to open and close the front opening are disposed on a front surface of the stacking unit 60.
US09311764B2	Coin counting apparatus A coin counting apparatus includes a mounting unit with a base plate, and a guiding unit connected to the mounting unit. The guiding unit includes a guiding member connected to the base plate, a cover member cooperating with the base plate to define a guiding space, an adjusting plate connected to the base plate, a positioning bolt connected to a pivotable swing arm and slidable in a guidance sliding groove of the cover member and a base sliding groove of the base plate, and two fastener members fastening the adjusting plate to the base plate. The adjusting plate is movable relative to the base plate to cover a portion of the base sliding groove so that a range of the sliding movement of the positioning bolt is adjustable.
US09311763B2	Systems and methods for video capture, user feedback, reporting, adaptive parameters, and remote data access in vehicle safety monitoring A method for vehicle data management according to embodiments of the present invention includes receiving an accelerometer signal from an accelerometer mounted in a vehicle, determining an accelerometer specific force based on the accelerometer signal, receiving a speed signal from a speed sensor or GPS or other source on the vehicle, wherein the speed signal indicates a speed of the vehicle, determining an instantaneous acceleration of the vehicle by calculating a rate of change of the speed based on the speed signal, selecting a current observed acceleration as a lower value of the accelerometer specific force and the instantaneous acceleration, capturing video footage with a camera mounted on the vehicle, and flagging the video footage corresponding to a time when the current observed acceleration exceeds a preset safe force value.
US09311762B2	Vehicle control system The present invention relates to a mobile communication system having a safe driving system central micro-processor which interfaces with a vehicle's controller area network or CAN BUS network and communicates between multiple transceiver micro controllers and their respective and discrete modules to remotely monitor a vehicle's operation and remotely execute commands to the vehicle.
US09311758B2	Vehicle control device and method A vehicle control method according to an embodiments includes: collecting data in a first communication data format from at least one electronic unit in a vehicle; converting the data collected in the first communication data format into a second communication data format in order to be transmitted to a pre-connected destination; transmitting the converted data to the destination; receiving, from the destination, control data of the second communication data format corresponding to the transmitted data; converting the control data of the second communication data format into the first communication data format; and outputting the control data of the first communication data format to a corresponding electronic unit.
US09311755B2	Self-disclosing control points A smart object represents a 3D graphics object whose control points are disclosed to a user. The control points are displayed for a user to use in performing simple and complex transformations on the 3D graphics object. The control points are positioned in areas where transformations are more likely to be made by a user. A transformation may be an action along one or more axes of the object, such as, rotation, scaling, and translation. The user may utilize the control points to perform a series of transformations that create a particular 3D graphics object without requiring expertise in the 3D graphics modeling application.
US09311753B2	System for creating a composite image and methods for use therewith A system includes a video device for capturing, at a viewing time, a first video image corresponding to a foundation scene at a setting, the foundation scene viewed at the viewing time from a vantage position. A memory stores a library of image data including media generated at a time prior to the viewing time. A vantage position monitor tracks the vantage position and generating vantage position of a human viewer. A digital video data controller selects from the image data in the library, at the viewing time and based on the vantage position data, a plurality of second images corresponding to a modifying scene at the setting, the modifying scene further corresponding to the vantage position. A combiner combines the first video image and the plurality of second images to create a composite image for display.
US09311752B2	Image displaying method for a head-mounted type display unit Disclosed herein is an image displaying method for a head-mounted type display unit which includes a frame of the glasses type for being mounted on the head of an observer, an image display apparatus attached to the frame, and a control section for controlling image display of the image display apparatus. The image display apparatus includes an image forming apparatus, and an optical apparatus. The image displaying method includes the steps of: storing a data group configured from a plurality of data in a storage section; adding a data identification code to each of the data; sending a designation identification code and display time information at predetermined intervals of time; and reading out the data whose data identification code coincides with the received designation identification code from the storage section and controlling the image forming apparatus to display an image based on the read out data.
US09311751B2	Display of shadows via see-through display Various embodiments are disclosed that relate to the presentation of images of shadows cast over a real-world background by images of objects displayed on a see-through display. For example, one disclosed embodiment provides a method of operating a display device having a see-through display screen. The method comprises displaying on the see-through display screen an image of an object, and while displaying the image of the object, displaying an image of a shadow cast by the object onto the background scene by acquiring an image of a background scene, determining a location of the shadow in the image of the background scene, rendering an enhanced image of the background scene by increasing a relative brightness in a region adjacent to the shadow compared to a brightness within the shadow, and displaying the enhanced image of the background scene.
US09311750B2	Rotation operations in a mapping application A mapping program for execution by at least one processing unit of a device is described. The device includes a touch-sensitive screen and a touch input interface. The program renders and displays a presentation of a map from a particular view of the map. The program generates an instruction to rotate the displayed map in response to a multi-touch input from the multi-touch input interface. In order to generate a rotating presentation of the map, the program changes the particular view while receiving the multi-touch input and for a duration of time after the multi-touch input has terminated in order to provide a degree of inertia motion for the rotating presentation of the map.
US09311749B2	Method for forming an optimized polygon based shell mesh The present invention relates to a computer implemented method for controlling an image processing apparatus configured for forming an optimized polygon based shell mesh for a three-dimensional graphics image. The present invention also relates to a corresponding image processing apparatus and a computer program product.
US09311748B2	Method and system for generating and storing data objects for multi-resolution geometry in a three dimensional model Methods and systems for generating data objects for multi-resolution geometry in a three-dimensional model are provided. A region of high resolution geometry in the three-dimensional model having a level of detail that is higher than a level of detail associated with geometry data surrounding the region of high resolution geometry can be identified. A boundary of the region of high resolution geometry can be extended and high resolution geometry can be generated within the extended boundary. The high resolution geometry can be spatially partitioned into a plurality of geospatial data objects according to a hierarchical spatial partitioning scheme. The geospatial data objects can be selectively stored in a memory. For instance, geospatial data objects associated with the extended boundary can be identified and excluded from a hierarchical tree data structure storing geometry data associated with the three-dimensional model.
US09311745B2	Systems and methods of analysis of granular elements Systems and methods are described for performing mechanical analysis of particulate systems by describing particle morphology of particles within the system using Non-Uniform Rational Basis Spline (NURBS). One embodiment includes generating a NURBS description for the particle morphology of a plurality of particles within a particulate system, determining contact points between at least two particles based on the NURBS description, determining a magnitude of the contact between the at least two particles based on the NURBS description, determining normal forces and associated moments based upon the contact points and the magnitude of the contact between the at least two particles, determining tangential forces and associated moments based upon the contact points and the magnitude of the contact between the at least two particles, and performing mechanical analysis of the particulate system based on the contact between the at least two particles and the resulting forces and associated moments.
US09311744B2	System and method for generating an outer layer representation of an object A system and method for generating a representation of an outer layer of a three-dimensional object is disclosed. The object is represented by a plurality of two-dimensional triangles. The method comprises receiving the plurality of two-dimensional triangles representing the object and determining a three-dimensional bounding box comprised of a plurality of voxels that encapsulates the object. The method also includes determining an intersecting set of voxels of the plurality of voxels. A member of the intersecting set of voxels intersects with at least one triangle of the plurality of triangles. The method also includes determining an outer set of voxels from the intersecting set of voxels, wherein a member of the outer set of voxels shares a face with a voxel that is not a member of the intersecting set of voxels. The method further includes determining an outer layer set of triangles from the plurality of triangles.
US09311739B2	Ray tracing core and ray tracing chip having the same A ray tracing core comprising a ray generation unit and a plurality of T&I (Traversal & Intersection) units with MIMD (Multiple Instruction stream Multiple Data stream) architecture is disclosed. The ray generation unit generates at least one eye ray based on an eye ray generation information. The eye ray generation information includes a screen coordinate value. Each of the plurality of T&I units receives the at least one eye ray and checks whether there exists a triangle intersected with the received at least one eye ray. The triangle configures a space.
US09311737B1	Temporal voxel data structure Systems and methods can be used to store data in a temporal voxel buffer. A first voxel array is stored in association with a first voxel in a voxel grid. The first voxel array includes a plurality of time values. A parameter value is stored in association with each time value of the first voxel array. A second voxel array is stored in association with a second voxel in the voxel grid. The second voxel array stores at least one time value. At least one parameter value is stored in association with the at least one time value of the second voxel array. At least one of the time values stored in the first voxel array is different from each of the at least one time value included in the second voxel array.
US09311736B2	Clothing and body covering pattern creation machine and method Body art, such as tattoos, are integrated or extended onto clothing. Clothing patterns may be integrated or extended onto body art, such as temporary tattoos. In one embodiment, a computer analyzes an image of a body with a tattoo and generates an image suitable for application to clothing. When applied to clothing, the image displays the portion of the tattoo that is covered by the clothing, or may extend the appearance of the tattoo from the skin to the adjacent clothing.
US09311734B1	Adjusting a digital image characteristic of an object in a digital image Methods and systems for highlighting portions of digital images. In one aspect, a digital image including an object is received. A user selection of a portion of the digital image including at least a portion of the object is received, and the selected portion of the digital image is highlighted. User selected tagging information associated with the selected portion of the digital image is received and transmitted to a computing system.
US09311730B2	Aggregating graph structures The present invention provides a display apparatus adapted to display a plurality of graph structures each of which is made up of a plurality of elements, by aggregating the plurality of graph structures into a single graph structure as well as provides a display method of the display apparatus and a program used for the display apparatus, the display apparatus including: an acquisition hardware unit adapted to acquire a plurality of graph structures; a distinguishing hardware unit adapted to distinguish the plurality of elements between unchanged elements which have not changed in the plurality of graph structures and changed elements which have changed with transition between/among the plurality of graph structures; an aggregating hardware unit adapted to aggregate the plurality of graph structures; and a display hardware unit adapted to display the aggregated graph structure such that the unchanged elements and the changed elements will be identifiable.
US09311728B2	Methods for creating dynamic lists from selected areas of a power system of a utility company Methods are provided for creating dynamic lists from selected areas of a power system of a utility company. The utility company has an energy management system with a control panel. The energy management system is used to access one or more source displays of a site. Rubber-banding or lassoing is used to create selected areas from at least a portion of the source displays. Lists are dynamically created. Operator defined information is displayed for each element type in a list of network elements from the selected areas that have been rubber-banded or lassoed.
US09311719B2	Image monitoring apparatus for estimating gradient of singleton, and method therefor An image monitoring apparatus includes: a singleton selector selecting at least one singleton from a plurality of objects in an image; a single foreground image generator generating a single foreground image of the singleton; an eigenvector extractor extracting an eigenvector of a foreground singleton contained in the single foreground image using at least one of a centroid of the foreground singleton, the number of pixels of the foreground singleton and coordinate values of the pixels; a vanishing point location calculator generating a reference vector by connecting a predetermined point in the image to the centroid of the foreground singleton, and determining the predetermined point as a vanishing point when the predetermined point minimizes an angle between the reference vector and the eigenvector; and a gradient determiner determining a gradient of the foreground singleton using the vanishing point, and correct an inclination of a bounding box of the foreground singleton.
US09311717B2	Processing and displaying a breast image with overlaid glandular contour A system for processing a breast image is described. A glandular tissue contour detector (1) is arranged for detecting a contour (407) of a glandular tissue (303) represented in the breast image (310), the glandular tissue detector (1) detecting the contour of a region within the image that comprises the mammary glands of a breast (301) represented in the breast image (310).The glandular tissue contour detector (1) comprises a concave hull determiner (2) for determining a concave hull of the region to obtain the contour (407).A display unit (3) is arranged for displaying the breast image (310) with the contour (407) superimposed.
US09311715B2	Method and system to segment depth images and to detect shapes in three-dimensionally acquired data A method and system analyzes data acquired by image systems to more rapidly identify objects of interest in the data. In one embodiment, z-depth data are segmented such that neighboring image pixels having similar z-depths are given a common label. Blobs, or groups of pixels with a same label, may be defined to correspond to different objects. Blobs preferably are modeled as primitives to more rapidly identify objects in the acquired image. In some embodiments, a modified connected component analysis is carried out where image pixels are pre-grouped into regions of different depth values preferably using a depth value histogram. The histogram is divided into regions and image cluster centers are determined. A depth group value image containing blobs is obtained, with each pixel being assigned to one of the depth groups.
US09311713B2	Estimator training method and pose estimating method using depth image An estimator training method and a pose estimating method using a depth image are disclosed, in which the estimator training method may train an estimator configured to estimate a pose of an object, based on an association between synthetic data and real data, and the pose estimating method may estimate the pose of the object using the trained estimator.
US09311712B2	Image processing device and image processing method An image processing device including a subject frame setting section which, by operating a subject detector which detects a subject captured in an image, sets a subject frame which surrounds a predetermined range of the subject detected from the image; an acceptance frame setting section which sets an acceptance frame with a range wider than the subject frame according to the context of the image; a position detecting section which detects a specified position on an image which is specified by a user; and a recognizing section which recognizes a subject which is a tracking target based on the acceptance frame set by the acceptance frame setting section and the specified position detected by the position detecting section.
US09311711B2	Image processing apparatus and image processing method According to one embodiment, an image processing apparatus includes a processed-image generating unit, a detection unit, and a calculation unit. The processed-image generating unit generates processed images by scaling the image picked up by the camera provided on a vehicle by respective ones of scale factors. The detection unit scans each processed image by a frame, determines likelihood using a dictionary of the detection object, and detects a scan frame having high likelihood. Each processed image is associated with respective image distance which is a predetermined estimated distance from the vehicle. The calculation unit determines an estimated distance from the vehicle to the detection object according to an image distance associated with a processed image to which the detected scan frame belongs, and calculates and outputs, based on a history of determined estimated distances and on the image distances, a time until the vehicle and the detection object collide.
US09311708B2	Collaborative alignment of images Techniques for aligning images are disclosed. The frames might have been captured by a video camera on a hand held device, as one example. Collaboratively aligning related frames of image data is taught. Collaborative alignment determines a correspondence between pixels in pairs of the frames of image data, as well as a confidence in that correspondence. A coordinate system (or transformation) is assigned to each of the frames that is consistent with the correspondences between each of the frame pairs. The confidence in the respective correspondences may be used to provide a weighting to a correspondence when assigning the coordinate systems. Outlying frames may be discarded, and the process repeated for a robust solution.
US09311707B2	System and method for attenuation correction of phantom images A method for attenuation correction of a phantom image in a PET imaging system includes obtaining raw scan data of a scanned phantom, a non attenuation corrected template image of a stock phantom of like type to the scanned phantom, and an attenuation map of the stock phantom. The method further includes generating a non-attenuation corrected raw image of the scanned phantom based on the raw scan data, registering the template image and attenuation map to the raw image through a rigid image transform, and applying the registered attenuation map to the raw scan data to enable reconstruction of an attenuation corrected final image.
US09311695B2	Image processing method and radiographic apparatus using the same An image processing method is provided including the steps of generating a first band image through high-pass filter processing to a source image having an image of a subject falling thereon; generating a reduction image through reduction of the source image; performing low-pass filter processing to the reduction image to generate a low-pass image; magnifying the low-pass image to generate a magnified low-pass image; generating a second band image based on the source image, the first band image, and the magnified low-pass image; generating a third band image through performing of band-pass filter processing to the reduction image; and performing image processing to the source image with each of the band images.
US09311694B2	Method for image processing using local statistics convolution A method for filtering a digital image, comprising segmenting the digital image into a plurality of tiles; computing tile histograms corresponding to each of the plurality of tiles; deriving a plurality of tile transfer functions from the tile histograms preferably using 1D convolutions; interpolating a tile transfer function from the plurality of tile transfer functions; and filtering the digital image with the interpolated tile transfer function. Many filters otherwise difficult to conceive or to implement are possible with this method, including an edge-preserving smoothing filter, HDR tone mapping, edge invariant gradient or entropy detection, image upsampling, and mapping coarse data to fine data.
US09311692B1	Scalable buffer remote access A method and apparatus for scalable buffer remote access is provided. Scalable buffer remote access may include generating, at a client device, a scalable display buffer request indicating a portion of a display area of an operating environment of a host device and a scaling factor ratio, transmitting the scalable display buffer request to the host device, receiving rendered content including a scaled rendering of a representation of the portion of the display area of the host device, presenting a client display window including the rendered content as a window into the display area of the operating environment of the host device, receiving a zoom indication, and presenting an updated client display window based on the rendered content and the zoom indication or based on updated rendered content received from the host device.
US09311689B2	Apparatus and method for registration of surface models An apparatus includes: an input/output interface configured to have a reference surface model and a floating surface model inputted thereto; a memory having instructions for registration of the reference surface model and the floating surface model stored therein; and a processor configured for registration of the reference surface model and the floating surface model according to the instructions. The instructions perform: selecting initial transformation parameters corresponding to the floating surface model by comparing depth images of the reference surface model and the floating surface model; transforming the floating surface model according to the initial transformation parameters; calculating compensation transformation parameters through a matrix calculated by applying singular value decomposition to a cross covariance matrix between the reference surface model and the floating surface model; and transforming the floating surface model according to the compensation transformation parameters, and executing registration of the reference surface model and the floating surface model.
US09311688B1	Rendering pipeline for color electrophoretic displays A plurality of different procedures are used to improve a quality of an RGBW color mosaic image displayed on an electronic paper display, such as an electrophoretic display of an electronic device. By processing lines of an input color image within a pipeline, less memory is required, since intermediate images need not be stored between each successive procedures. The different procedures can include contrast enhancement, color downsampling, saturation boosting, fringe reduction, and dithering to reduce color banding. Fringe reduction is implemented by computing desired and perceived values for each color component of a pixel currently being processed, and desired and perceived values for the luma of an input pixel, and then convolving these values using convolution filters having values selected so that a total color component weight is the same for all of the color filters, thereby preserving color balance in the color image that is to be rendered.
US09311682B2	Systems and methods to identify candidates for targeted advertising in an online social gaming environment Systems and methods to identify candidates for targeted advertising in an online social gaming environment are disclosed. Example methods include generating a network graph representative of relationships between users associated with an online social gaming environment, the relationships based on connections between the users. Example methods also include collecting first social gaming data corresponding to participation by a first user and a second user in the online social gaming environment during a first period of time. The example methods further include calculating a first degree of influence of the first user of the online social gaming environment on the second user of the online social gaming environment, the first degree of influence based on the first social gaming data.
US09311681B2	Claiming conversations between users and non-users of a social networking system Users of a social networking system initiate conversations between other users and additional users who may not be registered to use the social networking system. Each additional user is identified by an item of contact information, and conversation messages are sent to an additional user using the contact information. The conversations are associated with the item of contact information and saved in the social networking system. A user of the social networking system may subsequently claim the item of contact information. The claiming user is given access to the associated conversations if the social networking system can verify that the item of contact information belongs to the claiming user.
US09311679B2	Enterprise social media management platform with single sign-on Managing an enterprise social media management platform includes: receiving a request by a user to perform an action on a social media asset that is maintained at an external social media platform; checking whether the user has permission to perform the action on the social media asset, based at least in part on a mapping of the social media asset and a permission level associated with the user; in the event that the user is determined to have permission to perform the action, allowing the user to proceed with the action on the social media asset; and in the event that the user is determined not to have permission to perform the action, disallowing the user to proceed with the action on the social media asset.
US09311675B2	Facilitation of payments between counterparties by a central counterparty A system for moving money between accounts of traders by a central counterparty to facilitate payments, i.e. the movement of funds, there between is disclosed which provides a flexible mechanism which supports simpler accounting, new types of derivatives contracts as well new types fees. The disclosed futures contract, referred to as a “payer” contract, comprises a “no-uncertainty” futures contract, i.e. the initial value and settlement value parameters are defined, that leverages the mechanisms of the clearing system to, for example, accommodate related payments. Accordingly, a 1-to-many relationship between contracts and prices is provided whereby each price component may be assigned its own payer contract. The function of the payer contract may be to guarantee the movement of money from related positions. In one embodiment, payer contracts are dynamically created whenever a payment is needed.
US09311673B2	Security transaction matching A securities processor includes non-volatile storage, a first-in-first-out queue maintained in the non-volatile storage to store events, a random access memory, and an order book maintained in the random access memory to store one or more events corresponding to quotes or outstanding orders related to a security. A matching process receives the events from the queue, determines whether the event can be matched with a contra-side event stored in the order book, and executes a transaction between the received event and a matched contra side event if a match is found.
US09311671B2	System and method of providing replenishment and pick-up services to one or more cash handling devices A transport carrier (i.e., an armored vehicle or any mode of transportation) may be equipped with cash storage and recycling capabilities. The transport carrier may be equipped to replenish funds as needed and/or pick up a surplus of funds. The transport carrier may be in communication with a financial institution and/or a central server. In some arrangements, the central server may dynamically route the transport carrier to cash handling devices as various locations in order to efficiently meet the needs of the devices and associated clients.
US09311666B2	Complementary item recommendations using image feature data An apparatus and method to facilitate finding complementary recommendations are disclosed herein. One or more fashion trend or pleasing color combination rules are determined based on data obtained from one or more sources. One or more template images and rule triggers corresponding to the fashion trend or pleasing color combination rules are generated, each of the rule triggers associated with at least one of the template images. A processor compares a first image attribute of a particular one of the template images to a second image attribute of each of a plurality of inventory images corresponding to the plurality of inventory items to identify the inventory items complementary to the query image. The particular one of the template images is selected based on the rule trigger corresponding to the particular one of the template images being applicable for a query image.
US09311661B1	Continuous value-per-click estimation for low-volume terms An estimated conversion rate for a desired advertisement term is calculated. A total number of conversion events for terms having a conversion rate is determined for each of a plurality of conversion rates, and data is generated that describes a first distribution function representing the conversion rates and the associated numbers of conversion rates. Additionally, data describing a second distribution function representing the probability of a given number of conversion events occurring is also generated. Based at least in part on the first distribution function and the second distribution function, the estimated conversion rate for the desired advertisement term is computed.
US09311660B2	Hot spot use in advertising The delivery of targeted advertisements (ads) to wireless mobile handheld display devices (MHDDs) with client specific advertisement and dynamic content for response and feedback is becoming important in advertising. As the return for ads on MHDDs becomes higher, there is a push to show larger and more interactive ads on devices that have small displays. This has created a need to maximize the area available for ad viewing. The need for larger viewing area reduces the area available for call-to-action response enabling switches or inserts on the screen for customer interaction. To overcome this deficiency and provide the necessary end-to-end response capability, hot-spots on the ad image are provided as call-to-action response regions without limitation on the ad viewing area. The use of such hot-spots provides users of MHDDs a preferred interaction mechanism for responding to the advertisement, while maintaining a large ad viewing area.
US09311657B2	Provisioning of location-based content during a customer service session The disclosed embodiments relate to a system or method of providing location-based content during a customer service session between a mobile device of a customer service requestor and a communication device associated with a customer service provider via a communication channel. The disclosed method includes establishing the customer service session between the customer service provider and the mobile device of the customer service requestor. The method also includes determining, by a processor, a geographic location of the mobile device. The method further includes providing, by the processor, during or after the customer service session, to the customer service requestor via the mobile device, content based on the determined geographic location of the mobile device.
US09311655B2	Display of location-related promotional message with search query results Briefly, embodiments of methods or systems for display of a location-related promotional message with search query results are disclosed.
US09311649B2	System and method for managing media advertising enterprise data A system and method for managing media advertising enterprise data. An enterprise data management (EDM) module can be configured to include a set of rules at an enterprise level to manage disparate and disconnected records. A scoring function with respect to each record can be computed based on the rules to determine the highest priority. The rules in association with the scoring function can be stored locally in an EDM database. A matching process can then be performed to accurately match similar records regardless of manual input, location, and format of the records in a distributed system. Each record can then be assigned with a parent enterprise advertiser. Such an optimization mechanism can interactively manage and report records at the enterprise level in a simple and efficient manner.
US09311645B2	Techniques for checkout security using video surveillance Techniques for checkout security using video surveillance are provided. A customer is video tracked while in a store, the pauses made in aisles and the arm movements are recorded. Expected purchased items, based on movements and pauses by the customer within the store, are then compared to actual purchased items and a determination is made whether a checkout audit is needed for the customer.
US09311639B2	Methods, apparatus and arrangements for device to device communication This disclosure relates to device to device communication. For example, the devices may include one or more smartphones, wearable devices (e.g., wrist watch), tablets, pads, etc. One combination recites: A portable apparatus comprising: a touch screen display; an input; memory comprising a payload; and one or more electronic processors. The one or more electronic processors are configured for: processing the payload with an erasure code generator, in which the erasure code generator produces a plurality of outputs corresponding to the payload; obtaining a plurality of graphics; embedding one of the plurality of outputs in one of the plurality of graphics and proceeding with embedding until each of the plurality of outputs is so embedded, respectively, in one of the plurality of graphics, in which the embedding utilizes digital watermarking; and causing the touch screen display to display embedded graphics of the plurality of graphics, so that a digital watermark reader analyzing captured image data representing the display can recover the payload. Of course, other combinations are disclosed as well.
US09311638B1	Apparatus, system and method for pre-authorizing international use of a credit card using an electronic card case The present invention is directed to an apparatus, system and method for pre-authorizing international use of an electronic credit or debit card (collectively “payment card”) using an electronic card case with biometric verification means for validating the card holder's biometric sample. Card holder may select a payment card housed within the electronic card case, which releases the selected payment card for use upon validation of the biometric sample and also causes the activation of the locator unit positioned within to determine location information for the electronic card case and by extension the selected payment card. The electronic card case's processor transforms the geographical location information into pre-authorized location information for the selected payment card, to now include the geographical location and identifying card account information and the electronic card case communication means transmit the pre-authorized location information to the issuing bank for pre-authorization of the international financial transaction.
US09311637B2	Apparatus and method for commercial transactions using a communication device An apparatus for effecting commercial transactions with a server using a transaction card via a communication device is provided. The apparatus includes a transaction device coupled with the communication device for capturing information from the transaction card and a controller for converting the captured card information into an encrypted audio signal and for transmitting the audio signal to the communication device. The communication device delivers the audio signal to the server for processing the commercial transaction.
US09311623B2	System to view and manipulate artifacts at a temporal reference point One or more artifact drafts may be associated with each of a plurality of artifacts, each of the artifact drafts representing a state of the associated artifact at a point in time and one or more commands in a command stack that transformed the artifact draft's parent into the artifact draft. Multiple traceability links and traceability vertices represent connections between the artifact drafts of the artifacts. A traceability link includes an edge between an artifact draft of an artifact and an artifact draft of another artifact. A module is operable to navigate through said one or more artifacts of the plurality of artifacts from a reference temporal point via the plurality of traceability links.
US09311621B2	Annotating collaborative information structures Embodiments of the present invention address deficiencies of the art in respect to collaborative information object management and provide a method, system and computer program product for annotating collaborative information structures. In an embodiment of the invention, a method for annotating collaborative information structures can be provided. The method can include creating a collaborative information structure document (ISD) with each of an object section and an annotation section, adding a collaborative object in a collaborative computing environment to the object section of the collaborative ISD, adding an annotation for the collaborative ISD to the annotation section of the collaborative ISD, and storing the collaborative ISD for use as a collaborative object in the collaborative computing environment.
US09311620B2	System and process for ranking content on social networks such as twitter A system and process for ranking at least one of the quality and importance of content on a social network is disclosed. The system and process include monitoring one of actions and information of social network users, determining whether the actions or information of the social network users fits a predefined definition of a game between at least two social network users, determining the results of the game between the at least two social network users, applying a sports ranking algorithm to the results between the at least two social network users, and determining a rank of at least one of the quality and importance of content of the social network users based on an outcome of the sports ranking algorithm.
US09311619B2	Systems and methods for consumer-generated media reputation management A computing system configured to gather social media content includes a memory; a content collection and ingestion system, stored in the memory and configured, when executed on a computer processor, to communicate with one or more computing systems to direct a search of a content source using a received collection request and to ingest the results of the directed search into a data store; and a content management system, stored in the memory and configured, when executed on a computer processor, to display the ingested results on a display.
US09311615B2	Infrastructure asset management An approach for infrastructure asset management is provided. This approach comprises an end-to-end analytics driven maintenance approach that can take data about physical assets and additional external data, and apply advanced analytics to the data to generate business insight, foresight and planning information. Specifically, this approach uses a maintenance analysis tool, which is configured to: receive data about a set of physical assets of an infrastructure, and analyze the data about the set of physical assets to predict maintenance requirements for each of the set of physical assets. The maintenance analysis tool further comprises an output component configured to generate a maintenance plan based on the predicted maintenance requirements for each of the set of physical assets.
US09311611B2	Automated service level management system A method for service level management comprises identifying connected enterprise application components and, under control of an automated system, relating historical performance for the connected enterprise application components and electronically creating a service level agreement based on the historical performance relation.
US09311608B2	Teaching system and teaching method A teaching system includes an image generating unit, a projecting unit, a work line generating unit, an arithmetic unit, and a job generating unit. The image generating unit generates a virtual image including a robot and a workpiece having a processed surface to be processed by the robot. The projecting unit generates a projection plane orthogonal to a normal direction of a desired point on the processed surface selected on the virtual image and projects the processed surface onto the projection plane. The work line generating unit generates a work line for the robot based on setting contents received via the projection plane. The arithmetic unit calculates a teaching value including the position and the posture of the robot at each point of the target points. The job generating unit generates a job program for operating the robot in an actual configuration based on the teaching value.
US09311605B1	Modeling of time-variant grain moisture content for determination of preferred temporal harvest windows and estimation of income loss from harvesting an overly-dry crop A modeling framework for evaluating the impact of weather conditions on farming and harvest operations applies real-time, field-level weather data and forecasts of meteorological and climatological conditions together with user-provided and/or observed feedback of a present state of a harvest-related condition to agronomic models and to generate a plurality of harvest advisory outputs for precision agriculture. A harvest advisory model simulates and predicts the impacts of this weather information and user-provided and/or observed feedback in one or more physical, empirical, or artificial intelligence models of precision agriculture to analyze crops, plants, soils, and resulting agricultural commodities, and provides harvest advisory outputs to a diagnostic support tool for users to enhance farming and harvest decision-making, whether by providing pre-, post-, or in situ-harvest operations and crop analysis.
US09311603B2	Real time safety management system and method A system and method assesses and manages risk of an operation of a user. A rules engine of computer executable instructions stored in the storage device determines at least one of a safety risk measurement based on key performance indicators, an operational safety risk measurement for the operation as a function of the operational safety risk measurement information stored in a storage device and/or a conditional safety risk measurement for the operation as a function of the conditional safety risk measurement information stored in the storage device. A processor connected to the storage device executes the rules engine. An output interface connected to the processor indicates the determined safety risk for the operation.
US09311599B1	Methods, systems, and media for identifying errors in predictive models using annotators Methods, systems, and media for identifying errors in predictive models using annotators are provided. In some embodiments, a method for evaluating predictive models in classification systems is provided, the method comprising: causing an input region to be presented to a user, where the input region receives an instance from the user that corresponds to a predictive model; retrieving a classification conducted by the predictive model for the received instance and a confidence value associated with the classification; determining whether the received instance has been incorrectly classified by the predictive model; determining a reward associated with the incorrect classification made by the predictive model in response to determining that the received instance has been incorrectly classified by the predictive model, where the reward is based on the confidence value associated with the classification of the received instance; and providing the reward to the user.
US09311598B1	Automatic capture of detailed analysis information for web application outliers with very low overhead A system monitors a network or web application provided by one or more distributed applications and provides data for each and every method instance in an efficient low-cost manner. The web application may be provided by one or more web services each implemented as a virtual machine or one or more applications implemented on a virtual machine. Agents may be installed on one or more servers at an application level, virtual machine level, or other level. The agent may identify one or more hot spot methods based on current or past performance, functionality, content, or business relevancy. Based on learning techniques, efficient monitoring, and resource management, the present system may capture data for and provide analysis information for outliers of a web application with very low overhead.
US09311591B2	Antenna system for contactless microcircuit The present invention relates to a method for manufacturing a microcircuit card, including steps of: forming a first antenna coil in a card, the first antenna coil having a part following the edge of the card, forming a module having a microcircuit and a second antenna coil around and connected to the microcircuit, and implanting the module into the card at a precise position in relation to the edge of the card, the first antenna coil being coupled by induction to the second antenna coil, the first antenna coil being pre-formed in such a way that only one part of the second antenna coil is at a distance from the first antenna coil of less than 5% of the width of the second antenna coil.
US09311584B2	Multidimensional color barcode The invention provides architecture of a multidimensional color barcode. The multidimensional color barcode includes a plurality of data cells and a plurality of palette cells which are placed in a predefined order on each side of the multidimensional color barcode. The multidimensional color barcode also includes one or more alternating black and white tic marks placed on two sides of the multidimensional color barcode. Data is encoded and decoded in the multidimensional color barcode using color assigned to each of the plurality of data cells and the plurality of palette cells.
US09311583B2	Barcode copy protection system A copy protection system for barcode includes a barcode pattern that is printed together with a security pattern that includes a line screen that intersects elements of the barcode pattern. A difference in print density between the barcode elements and the security pattern is sufficient to allow the barcode pattern to be read by a barcode scanner. However, upon reproduction of the printed barcode pattern and security pattern by a copier, the barcode pattern is not similarly readable on the resulting reproduction.
US09311579B2	Printing apparatus A printer includes a first sensor configured to identify a section to be identified of a movable tray. A computer in the printer drives a motor in a direction where the movable tray heads to a supplying position and stops driving the motor when an impact, where the drive load on the motor exceeds a threshold due to the movable tray hitting a separating mechanism which is at the supplying position, is detected. In addition, the computer drives the motor in a direction where the movable tray heads to a setting position, and stops driving the motor and arranges the movable tray at the setting position when the first sensor is on due to the section to be identified being identified.
US09311578B2	Printing system and control method thereof In a printing system capable of supplying a sheet of a job having undergone print processing by the printing unit of a printing apparatus to a post-processing unit capable of executing at least a specific type of post-processing among a plurality of types of post-processes, when the target job requires the specific type of post-processing, the printing apparatus is inhibited from executing print processing of the job without explicitly determining a sheet necessary for the print processing of the job by a user using a user interface unit. When the target job does not require the specific type of post-processing, the printing apparatus is permitted to execute print processing of the job without explicitly determining a sheet necessary for the print processing of the job by the user using the user interface unit.
US09311577B2	Image forming apparatus for changing sheet information associated with sheet cassette, control method therefor, and storage medium storing control program therefor An image forming apparatus that is capable of decreasing the stopping time during which the image forming apparatus stops and of increasing productivity. An image forming unit executes print jobs in order. An operation unit receives an instruction inputted by a user. A generation unit generates a setting job concerning a device setting based on a user's instruction inputted through the operation unit. A setting unit sets execution timing of the setting job generated by the generation unit based on a user's instruction inputted through the operation unit. A control unit stops an operation of the image forming unit and to execute the setting job generated by the generation unit at the execution timing set by the setting unit, and resumes the operation of the image forming unit after the setting job finishes.
US09311576B2	Correction method of printing data Disclosed is a correction method of printing image data, including correcting printing data for printing, based on color information of an adhering medium bonded to a printing medium after performing printing on the printing medium.
US09311571B2	Electronic card connector and electronic device using same An electronic device includes a housing and an electronic card connector. The peripheral sidewall defines a through hole. The electronic card connector includes a tray, a fixing member, a push rod and a connecting rod. The tray defines a defined space for receiving an electronic card and at least one notch. The fixing member includes at least one elastic arm having a hook. The push rod partially passes through the through hole and protrudes from of the housing. The at least one connecting rod connects the second end to the at least one elastic arm. When the at least one hook engages with the at least one notch, the tray is engaged with the housing, and when the push rod is driven to disengage the at least one hook from the at least one notch, the tray is disengaged from the housing.
US09311567B2	Manifold learning and matting Systems for manifold learning for matting are disclosed, with methods and processes for making and using the same. The embodiments disclosed herein provide a closed form solution for solving the matting problem by a manifold learning technique, Local Linear Embedding. The transition from foreground to background is characterized by color and texture variations, which should be captured in the alpha map. This intuition implies that neighborhood relationship in the feature space should be preserved in the alpha map. By applying Local Linear Embedding using the disclosed embodiments, the local image variations can be preserved in the embedded manifold, which is the resulting alpha map. Without any strong assumption, such as color line model, the disclosed embodiments can be easily extended to incorporate other features beyond RGB color features, such as gradient and texture information.
US09311564B2	Face age-estimation and methods, systems, and software therefor Age-estimation of a face of an individual is represented in image data. In one embodiment, age-estimation techniques involves combining a Contourlet Appearance Model (CAM) for facial-age feature extraction and Support Vector Regression (SVR) for learning aging rules in order to improve the accuracy of age-estimation over the current techniques. In a particular example, characteristics of input facial images are converted to feature vectors by CAM, then these feature vectors are analyzed by an aging-mechanism-based classifier to estimate whether the images represent faces of younger or older people prior to age-estimation, the aging-mechanism-based classifier being generated in one embodiment by running Support Vector Machines (SVM) on training images. In an exemplary binary youth/adult classifier, faces classified as adults are passed to an adult age-estimation function and the others are passed to a youth age-estimation function.
US09311545B2	Multicolor biometric scanning user interface A mobile computing device may include a biometric sensor in proximity with a color-controlled layer. Where the color of the color-controlled layer may be changed, a processor of the mobile computing device may control the color of the color-controlled layer responsive to sensing various conditions. For example, the color of the color-controlled layer may be controlled, by default, to match the housing of the mobile computing device. Responsive to sensing an approaching user finger, the color-controlled layer may be controlled to change color. The color-controlled layer may be controlled to change color again upon contact of the finger, upon removal of the finger and upon determining authentication success. The color-controlled layer may be structured as a mix of heating elements and thermochromic polymer elements.
US09311539B1	Aircraft contrail detection Concepts and technologies described herein provide for the detection of aircraft contrails through the identification of contrail shadows in real time imagery provided during a flight. According to one aspect of the disclosure provided herein, an antisolar point is located on a surface from the perspective of the aircraft in flight. Real time imagery encompassing the antisolar point is received and analyzed for a contrail indicator. When the contrail indicator is detected, it is determined that the aircraft is creating a contrail.
US09311537B2	Method, apparatus and system for detecting a supporting surface region in an image A method of detecting a supporting surface region in an image captured by a camera is disclosed. An object in the image is detected. One or more regions of the image in which a lower part of the detected object exists are determined. A degree of confidence for each of the regions is determined. The degree of confidence indicates likelihood of a corresponding region being a supporting surface region. One or more of the regions are selected based on each corresponding degree of confidence. Similarity of other regions in the image to at least one of the selected regions is determined. The supporting surface region is detected based on the determined similarity.
US09311536B2	Systems and methods for capturing artifact free images The present disclosure is directed towards methods and systems for capturing artifact-free biometric images of an eye. The eye may be in motion and in the presence of partially-reflective eyewear. The method may include acquiring, by a first sensor, a first image of an eye while the eye is illuminated by a first illuminator. The first image may include a region of interest. The first sensor may be disposed at a fixed displacement from the first illuminator and a second sensor. The second sensor may acquire, within a predetermined period of time from the acquisition of the first image, a second image of the eye. The second image may include the region of interest. An image processor may determine if at least one of the first and second images include artifacts arising from one or both of the first illuminator and eyewear, within the region of interest.
US09311535B2	Texture features for biometric authentication One aspect comprises obtaining one or more image regions from a first image of an eye. Each of the image regions may include a view of a respective portion of the white of the eye. The aspect may further comprise applying several distinct filters to each of the image regions to generate a plurality of respective descriptors for the region. The several distinct filters may include convolutional filters that are each configured to describe one or more aspects of an eye vasculature and in combination describe a visible eye vasculature in a feature space. A match score may be determined based on the generated descriptors and based on one or more descriptors associated with a second image of eye vasculature.
US09311531B2	Systems and methods for classifying objects in digital images captured using mobile devices A method includes receiving or capturing a digital image using a mobile device, and using a processor of the mobile device to: determine whether an object depicted in the digital image belongs to a particular object class among a plurality of object classes; determine one or more object features of the object based at least in part on the particular object class at least partially in response to determining the object belongs to the particular object class; build or select an extraction model based at least in part on the one or more determined object features; and extract data from the digital image using the extraction model. The extraction model excludes, and/or the extraction process does not utilize, optical character recognition (OCR) techniques. Related systems and computer program products are also disclosed.
US09311528B2	Gesture learning Systems and methods that incorporate various techniques for teaching gestures to a user of a multi-touch sensitive device are disclosed herein. Such techniques can include presenting visible feedback of gestures, such as animated motion trails and/or hand motions, along with affirmative feedback for correctly performed gestures and negative feedback for incorrectly performed gestures. Such techniques can be expanded to provide training exercises that present tasks requiring a particular gesture or sequence of gestures to be performed. These training exercises can take the form of games or other engaging activities to encourage use.
US09311525B2	Method and apparatus for establishing connection between electronic devices A method, performed in an electronic device, for connecting to a target device is disclosed. The method includes capturing an image including a face of a target person associated with the target device and recognizing an indication of the target person. The indication of the target person may be a pointing object, a speech command, and/or any suitable input command. The face of the target person in the image is detected based on the indication and at least one facial feature of the face in the image is extracted. Based on the at least one facial feature, the electronic device is connected to the target device.
US09311524B2	Image processing apparatus and image processing method An image processing apparatus and method may accurately separate only humans among moving objects, and also accurately separate even humans who have no motion via human segmentation using a depth data and face detection technology. The apparatus includes a face detecting unit to detect a human face in an input color image, a background model producing/updating unit to produce a background model using a depth data of an input first frame and face detection results, a candidate region extracting unit to produce a candidate region as a human body region by comparing the background model with a depth data of an input second or subsequent frame, and to extract a final candidate region by removing a region containing a moving object other than a human from the candidate region, and a human body region extracting unit to extract the human body region from the candidate region.
US09311522B2	Apparatus and method for improving face recognition ratio An apparatus for improving a face recognition ratio includes a digital signal processing unit which generates a first image having a size different from that of a live-view image and, when the size of a face detected from the first image is smaller than a reference size, maps information about the face detected from the first image on the live-view image and performs smile and/or blink recognition.
US09311521B2	Method for providing images of a tissue section A method for differentiating areas in a series of digital images, the method comprising the steps of: providing a series of images comprising undetermined marker areas; evaluating every image 1n for 1≦n≦N according to predetermined selection criteria and defining image marker areas as undetermined marker areas fulfilling the predetermined selection criteria; providing a new image 1new; and inserting new image marker areas in the new image 1new, said new image marker areas having the same shape and location as image marker areas present in image 1n but not in image 1n−1, and said new image marker areas being identifiable in 1new by a unique feature. Further, the application discloses a method for visualizing cell populations in tissue sections of a histological sample. Further, the application discloses a method for visualizing three-dimensional distribution of multiple cell populations in a histological sample.
US09311517B2	Methods and systems for reducing the likelihood of false positive decodes Systems and methods for reducing the likelihood of false positive decodes within a set of barcodes are disclosed. The method can be implemented in a computing device, which includes: providing a list of barcode configurations that meet damage tolerance criteria; reducing, if possible, each configuration list to barcode configurations that have a compatible configuration pair between sets; and comparing all possible combinations of barcode type configurations to find at least one set of configurations that are resistant to false positives decodes between barcode types during decoding processes.
US09311515B2	Automatic tuning of scanner lighting Various embodiments herein each include devices, system, methods, and software for automatic scanner lighting tuning. One method embodiment includes determining a distance from a scanning surface to a surface of an item presented for scanning, determining an illumination setting based on the determined distance, and illuminating a scanning field according to the determined setting. Another embodiment is a scanner including a scanning module with a scanning surface imaged by an imaging device and a lighting module including at least one adjustable lighting element that illuminates according a received illumination setting. The scanner further includes a distance determining module that determines a distance between the scanning surface and a presented item and a lighting controller that receives a determined distance from the distance determining module, determines the illumination setting based on the determined distance, and provides the illumination command to the lighting module.
US09311514B2	Imaging barcode scanner with multiple independent fields of view A barcode scanner which uses different wavelengths of light to produce different fields of view. An example barcode scanner includes a plurality of light devices each having a different wavelength of light and each associated with a different field of view for illuminating an item with a barcode, a plurality of waveband mirrors each reflecting one of the different wavelengths of light from the light devices and transmitting other wavelengths of light, an imager for receiving the different wavelengths of light reflected from the waveband mirrors and for producing corresponding images, and a controller configured to sequentially activate the light devices and the imager and to decode the barcode in an at least one of the images received from the imager.
US09311512B2	Apparatus and method to harden computer system In some embodiments, a processor-based system may include a processor, the processor having a processor identification, one or more electronic components coupled to the processor, at least one of the electronic components having a component identification, and a hardware security component coupled to the processor and the electronic component. The hardware security component may include a secure non-volatile memory and a controller. The controller may be configured to receive the processor identification from the processor, receive the at least one component identification from the one or more electronic components, and determine if a boot of the processor-based system is a provisioning boot of the processor-based system. If the boot is determined to be the provisioning boot, the controller may be configured to store a security code in the secure non-volatile memory, wherein the security code is based on the processor identification and the at least one component identification. Other embodiments are disclosed and claimed.
US09311509B2	Creation and delivery of encrypted virtual disks The present application is directed to methods and systems for receiving a request for a virtual disk and creating a virtual disk that includes the virtual disk attributes identified in the request or determined by an organization's security policies. The created virtual disk can then be encrypted and in some aspects, an encryption key for the encrypted virtual disk can be stored in an encryption key database. Upon creating and encrypting the virtual disk, the virtual disk can be transmitted to a client. The client, upon receiving the encrypted virtual disk, can mount the virtual disk into the client system. The encrypted virtual disk may be stored as a file within an unencrypted virtual disk, and the unencrypted virtual disk backed up to a local or remote storage location.
US09311507B2	Method and apparatus for remotely provisioning software-based security coprocessors A virtual security coprocessor is created in a first processing system. The virtual security coprocessor is then transferred to a second processing system, for use by the second processing system. For instance, the second processing system may use the virtual security coprocessor to provide attestation for the second processing system. In an alternative embodiment, a virtual security coprocessor from a first processing system is received at a second processing system. After receiving the virtual security coprocessor from the first processing system, the second processing system uses the virtual security coprocessor. Other embodiments are described and claimed.
US09311505B2	Method and apparatus for providing abstracted user models An approach is provided for providing abstracted user models in accordance with one or more access policies. A model platform determines an ontology for specifying a hierarchy of one or more abstraction levels for items data used in latent factorization models. The model platform further causes, at least in part, a generation of one or more user models for the one or more abstraction levels. The model platform also causes, at least in part, a selection of at least one of the one or more user models for generating one or more recommendations for one or more applications, one or more services, or a combination thereof based, at least in part, on one or more privacy policies, one or more security policies, or a combination thereof.
US09311499B2	Data security system and with territorial, geographic and triggering event protocol The method, program and information processing system secures data, and particularly security sensitive words, characters or data objects in the data, in a computer system with territorial, geographic and triggering event protocols. The method and system determines device location within or without a predetermined region and then extracts security data from the file, text, data object or whatever. The extracted data is separated from the remainder data and stored either on media in a local drive or remotely, typically via wireless network, to a remote store. Encryption is used to further enhance security levels. Extraction may be automatic, when the portable device is beyond a predetermined territory, or triggered by an event, such a “save document” or a time-out routine. Reconstruction of the data is permitted only with security clearance and within certain geographic territories. An information processing system for securing data is also described.
US09311495B2	Method and apparatus for associating data loss protection (DLP) policies with endpoints A method of policy management in a Data Loss Prevention (DLP) system uses a policy model that associates a user with one or more DLP endpoints. When an endpoint is added to the system, a set of policies for that endpoint are determined using an identity of the user that is associated with the endpoint and a list of roles or groups for that user. At policy distribution time, the method determines a set of endpoints to which the policy is to be distributed.
US09311488B2	System and method for removing customer personal information from an electronic device A system and method for processing electronic devices to determine removal of customer personal information (CPI). An electronic device is connected to a test device. A number of electronic devices including the electronic device are received for determining that the CPI is removed from a number of sources. The number of electronic devices include a number of makes and models of electronic devices. A determination of whether CPI is included on the electronic device is made. An identification of the electronic device is recorded in response to determining that CPI is included on the electronic device. The CPI is cleared form the electronic device in response to determining that the CPI is included on the electronic device. The identification of the electronic devices and metadata is reported in response to determining the CPI was included on the electronic device.
US09311487B2	Tampering monitoring system, management device, protection control module, and detection module A management device 200d comprises: a key share generation unit 251d generating a plurality of key shares by decomposing a decryption key, the decryption key being for decrypting an encrypted application program generated as a result of encryption of the application program; and an output unit 252d outputting each of the key shares to a different one of a plurality of detection modules. The detection modules acquire and store therein the key shares. The protection control module 120d comprises: an acquisition unit 381d acquiring the key shares from the detection modules; a reconstruction unit 382d reconstructing the decryption key by composing the key shares; a decryption unit 383d decrypting the encrypted application program with use of the decryption key; and a deletion unit 384d deleting the decryption key, after the decryption by the decryption unit is completed.
US09311480B2	Server-assisted anti-malware client An antimalware support system is provided to support one or more host-based antimalware clients. A query is received from a particular host device that identifies a file detected by an antimalware tool local to the particular host device. Reputation data is determined for the file, and a response to the query is sent to the particular host device. The query response includes the reputation data determined for the file.
US09311479B1	Correlation and consolidation of analytic data for holistic view of a malware attack According to one embodiment, a method for correlating and consolidating analytic data to provide a holistic view of a malware attack. The method comprises receiving analytic data from a plurality of electronic devices. The analytic data from each electronic device of the plurality of electronic devices comprises input attributes and analysis attributes. Thereafter, the analytic data is correlated by determining whether a first analysis attribute provided by a first electronic device of the plurality of electronic devices matches a second analysis attribute provided by a second electronic device of the plurality of electronic devices. In response determining that the first analysis attribute provided by the first electronic device matches the second analysis attribute provided by the second electronic device, the input attributes associated with the first analysis attribute and the second analysis attribute are consolidated for subsequent display.
US09311476B2	Methods, systems, and media for masquerade attack detection by monitoring computer user behavior Methods, systems, and media for masquerade attack detection by monitoring computer user behavior are provided. In accordance with some embodiments, a method for detecting masquerade attacks is provided, the method comprising: monitoring, using a hardware processor, a first plurality of user actions in a computing environment; generating a user intent model based on the first plurality of user actions; monitoring a second plurality of user actions in the computing environment; determining whether at least one of the second plurality of user actions deviates from the generated user intent model; determining whether the second plurality of user actions include performing an action on a file in the computing environment that contains decoy information in response to determining that at least one of the second plurality of user actions deviates from the generated user intent model; and generating an alert in response to determining that the second plurality of user actions include performing an action on a file in the computing environment that contains decoy information.
US09311473B2	Unattended secure device authorization Unattended secure device authorization techniques are provided. An operating system (OS) module, which is responsible for device validation when that device is interfaced to a host device, is enhanced. The enhanced OS module silently checks the peripheral device's identifier against a white list and if a match occurs, the enhanced OS module grants permission to the host device applications; if no match occurs, the enhanced OS module silently rejects application access to the device. In an embodiment, the enhanced OS module interacts with the device to determine whether the device is to be authorized or rejected.
US09311470B2	Method and system for authenticating a user The invention relates to a system and a method for authenticating a user. A removable storage medium (12) has at least one storage area in which identification data for identifying the removable storage medium (12) are stored, in this storage area or in a further storage area of the removable storage medium (12) data of a digital certificate (14) being stored. Further, a data processing system (18) is provided to which the removable storage medium (12) is connected via a data transfer connection. The identification data and the data of the digital certificate (14) are transferred from the removable storage medium to the data processing system (18). The data processing system (18) processes the identification data and the data of the digital certificate (14) and authenticates the user.
US09311469B2	Authorization server system, control method thereof, and non-transitory computer-readable medium An authorization server system that manages authorization information configured to enable providing of a service without requiring input of authentication information, comprises: a management unit which manages the authorization information; a providing unit which provides a deletion screen that includes the authorization information generated when an authorization operation of a user is performed but not the authorization information generated without performing the authorization operation of the user in accordance with reception of a request of the deletion screen configured to delete the authorization information managed by the management unit; and a deletion unit which deletes the authorization information managed by the management unit, in accordance with reception of a deletion instruction via the deletion screen.
US09311468B2	Electronic device and method for controlling access to the electronic device Method of unlocking an electronic device includes outputting a first portion of a predetermined video file, on a display device of the electronic device when the electronic device is locked. A second portion of the predetermined video file is outputting when a first time length of a detected microphone signal is greater than a first predetermined duration. The electronic device is unlocked when a second time length of the detected microphone signal is greater than a second predetermined duration, while the second portion of the predetermined video file is outputting.
US09311463B2	Multi-level password authorization A method and system for using multi-level passwords is provided. The method includes receiving a request for access to a first level of access associated with secure components associated with a device of a user. In response, a portion of a passcode is received. The portion of the passcode does not include an entire portion. The portion of the passcode is compared to security group policy it is determined that the portion of the passcode meets requirements the security group policy. Access is enabled to a group of components of secure components based on the security requirements. The group of components is associated with the first level of security access.
US09311462B1	Cross platform social networking authentication system Disclosed in one example is a method of authenticating with multiple social network services. The method may include storing first authentication information associated with a user for a first social networking service using at least one computer processor, receiving second authentication information associated with the user for a second social networking service from a social networking application, and sending to the social networking application the first authentication information. The first authentication information may enable the social networking application to utilize a protected application programming interface call for the first social networking service and the second authentication information may enable the social networking application to utilize a protected application programming interface call for the second social networking service.
US09311461B2	Security system based on questions that do not publicly identify the speaker A method and system for authenticating a user seeking access to a secured system in a public area. Access is granted when a user demonstrates sufficient knowledge of the user's personal characteristics stored in the system. The user initiates the access process by tapping into the stored characteristics without overtly stating information that may be overheard. The user statements reflect an awareness about the categories of user uniqueness without divulging details. The system response statements act to elicit further information from the user for response and the response statements are scored. After a cumulative score threshold is met, the user is granted access.
US09311460B2	Programmable controller system, tool device, tool program, storage medium, and programmable controller A programmable controller system, a tool device, a tool program, a storage medium, and a programmable controller capable of affording greater convenience in terms of preventing unauthorized use of user program running on the programmable controller. In the programmable controller system, the tool device sets up a first user program execution ID in a second non-volatile memory provided in the PLC and sets up a second user program execution ID in a project provided in the tool device. The PLC performs a matching operation to determine whether or not the first user program execution ID matches the second user program execution ID and blocks the execution of the user program if there is a mismatch.
US09311459B2	Application-driven playback of offline encrypted content with unaware DRM module Application-driven interceptor module enables offline playback of Digital Rights Management (DRM) protected content to work in a same way as online playback. Communications with the DRM module are intercepted by the application-driven interceptor that is aware of the client device's network connection status. When the interceptor application determines that the client device is offline, requests for the protected content, and license/key to the protected content may then be managed by the interceptor application. In one embodiment, the interceptor application may retrieve requests for the key/license from a locally protected data store, and provide the key/license to the DRM module. In this manner, the DRM module may be unaware that its messages are being intercepted, and may then operate the same, unaware of whether or not the client device is online or offline.
US09311455B1	System, method, and computer program for distributing payment to digital content owners A system, method, and computer program are provided for distributing payment to digital content owners. In use, usage of digital content is identified, utilizing a source of the usage of the digital content. Further, a record of the usage of the digital content is transmitted to a central collection system, for use in distributing payment to an owner of the digital content.
US09311453B2	Utilizing time-to-positivity to generate treatment recommendations Computerized methods and systems, and computer-readable media having computer-executable instructions embodied thereon, for utilizing a time-to-positivity associated with a blood culture to generate at least one treatment recommendation are provided. Methods according to embodiments of the present invention may include receiving an indication that a blood culture is positive for the presence of a particular bacterium, determining a time-to-positivity for the presence of the bacterium, and automatically generating at least one treatment recommendation utilizing the time-to-positivity. If desired, the method may further include one or more of receiving verification of the indication that the blood culture is positive for the presence of the bacterium in question and communicating the positivity determination as appropriate, e.g., utilizing alerts.
US09311451B2	Medication dispensing apparatus for preventing medication dispensing error A medication dispensing apparatus for preventing a medication dispensing error is provided. The medication dispensing apparatus includes: a communication unit configured to communicate with a manager server; a medication collecting unit configured to contain capsules or tablets for one dose which are discharged from cartridges; a medication image acquiring unit configured to acquire an image of the capsules or tablets contained in the medication collecting unit; and a control unit configured to comprise a dispensing information delivery unit to transmit to the manager server the medication information acquired by the medication image acquiring unit, and a dispensing control unit to continue a medication dispensing process or control capsules or tablets to be re-dispensed according to a user's dispensing control instruction received from the manager server. Accordingly, it is possible to prevent a medication dispensing error.
US09311449B2	Hospital unit demand forecasting tool An embodiment in accordance with the present invention provides a method of forecasting a demand for a particular hospital unit. The method can be executed by programming the steps into a computer readable medium. One step includes logging a total number of beds in the particular hospital unit and available nursing slots to determine a capacity for the particular hospital unit. The method also includes analyzing data for patients scheduled to stay in the particular hospital unit data to predict stochastic arrivals in order to estimate a total inflow. A length of stay of a patient in the particular hospital unit is predicted using a survival analysis based on physician orders to estimate a total outflow. Additionally, the method includes executing an algorithm designed to use the capacity, total inflow, and total outflow to determine the demand for the particular hospital unit.
US09311448B2	Method for adapting threshold windows, control device, medical treatment apparatus and medical monitoring apparatus The present invention relates to a method of adapting of a second threshold window of at least a second measured variable depending on the change of a first threshold window of a first measured variable, wherein the adaptation is performed by the use of a control unit having been provided and/or configured therefor. The present invention further relates to a control device, a medical treatment apparatus, a medical monitoring apparatus, a digital storage means, a computer program product and a computer program.
US09311447B2	Method for identifying nucleotide sequence, method for acquiring secondary structure of nucleic acid molecule, apparatus for identifying nucleotide sequence, apparatus for acquiring secondary structure of nucleic acid molecule, program for identifying nucleotide sequence, and program for acquiring secondary structure of nucleic acid molecule The object of the present invention is to provide a method for identifying a nucleotide sequence necessary for expressing affinity for a target substance with respect to a nucleotide sequence of a nucleic acid molecule such as an aptamer having such affinity for the target substance, based on similarity between nucleotide sequences and an evaluated value of the affinity of the nucleotide sequence, and a method for predicting a secondary structure of the nucleic acid molecule including the identified nucleotide sequence. The method of present invention includes the steps of extracting a single-stranded region by excluding based capable of forming a stem structure from the nucleotide sequence of the nucleic acid molecule; and searching a motif sequence from the single-stranded region, based on an evaluated value of the affinity.
US09311446B1	Multicast transmission for power management in an ad-hoc wireless system In an ad-hoc wireless network, a single multicast message can be used to announce availability of queued data to one or more WLAN devices in the ad-hoc network. A wireless network device in the ad-hoc network can determine network identifiers associated with the other wireless network devices in the ad-hoc network for which the queued data is available. The wireless network device transmits the multicast message, which identifies the wireless network devices for which queued data is available, to indicate the wireless network devices that should remain in an active power state. On receiving the multicast message, a receiving WLAN device can read a network identifier bit associated with the receiving WLAN device to determine whether or not the receiving WLAN device should remain in the active power state. This can reduce transmission overhead and improve power savings, efficiency, and data reliability.
US09311445B2	Method, process, and system for high efficiency gas turbine exhaust duct flow-path Methods, systems, and apparatuses for high efficiency exhaust duct flow path. In an embodiment, an exhaust duct flow path may be created by calculating the efficiency of an exhaust duct flow path with an initial measurement. The initial measurement may be changed and the efficiency analyzed. Then the efficiency of the exhaust duct flow path with the changed measurement may be compared to the efficiency of the exhaust duct flow path with the initial measurement.
US09311443B2	Correcting for stress induced pattern shifts in semiconductor manufacturing Apparatus, method and computer program product for reducing overlay errors during a semiconductor photolithographic mask design process flow. The method obtains data representing density characteristics of a photo mask layout design; predicts stress induced displacements based on said obtained density characteristics data; and corrects the mask layout design data by specifying shift movement of individual photo mask design shapes to pre-compensate for predicted displacements. To obtain data representing density characteristics, the method merges pieces of data that are combined to make a photo mask to obtain a full reticle field data set. The merge includes a merge of data representing density characteristic driven stress effects. The density characteristics data for the merged reticle data are then computed. To predict stress-induced displacements, the method inputs said density characteristics data into a programmed model that predicts displacements as a function of density, and outputs the predicted shift data.
US09311440B2	System and method of electromigration avoidance for automatic place-and-route A method includes identifying at least one local power segment of a circuit, estimating at least one performance parameter of the at least one power segment based on a computer-based simulation of the circuit, and changing a design of the circuit based on at least one electromigration avoidance strategy if the at least one parameter is greater than or equal to a threshold value. A data file representing the circuit is stored if the at least one parameter is less than the threshold value.
US09311435B2	Method for determining a cut for a gemstone Method for determining a cut for a gemstone, comprising selecting a generic shape for the cut; selecting a plurality of cut designs of a group of cut designs having the selected generic shape; simulating a number of optical metrics for the plurality of cut designs using simulation models having modeling coefficients; selecting one or more cut designs of the plurality of cut designs based on the simulated optical metrics; varying the geometry parameters for each selected cut design within a range, simulating a number of optical metrics for said range of geometry parameters, and determining an optimized cut design having optimized geometry parameters based on the simulated number of optical metrics for said range; cutting and polishing of the gemstone using the optimized cut design having the optimized geometry parameters; analyzing the visual appearance of the polished gemstone; changing or adapting the simulation models and/or the modeling coefficients thereof and/or the range for varying the geometry parameters and/or a cut design of the plurality of cut designs, and/or adding one or more new cut designs to the group of cut designs, on the basis of the analysis of the visual appearance.
US09311433B2	Systems and methods for improving the execution of computational algorithms A system for solving equations of a given scientific code for a large dataset represented as a mesh includes first computing circuitry, second computing circuitry, and communication circuitry. The first computing circuitry includes software to arrange the mesh in a sequential order, and a memory to store the mesh data and the results obtained in the execution of the scientific code. The second computing circuitry includes software to execute the scientific code for one vertex of the mesh, and a cache memory to store all the neighboring vertices to the one vertex. The communication circuitry is between the first and second computing circuitry so that the first computing circuitry fed the second computing circuitry with the vertices of the mesh following the sequential order, and the scientific code is executed for all the vertices of the mesh and its results are returned to the first computing circuitry.
US09311431B2	Secondary target design for optical measurements The disclosure is directed to improving optical metrology for a sample with complex structural attributes utilizing custom designed secondary targets. At least one parameter of a secondary target may be controlled to improve sensitivity for a selected parameter of a primary target and/or to reduce correlation of the selected parameter with other parameters of the primary target. Parameters for the primary and secondary target may be collected. The parameters may be incorporated into a scatterometry model. Simulations utilizing the scatterometry model may be conducted to determine a level of sensitivity or a level of correlation for the selected parameter of the primary target. The controlled parameter of the secondary target may be modified until a selected level of sensitivity or a selected level of correlation is achieved.
US09311429B2	Canonical data model for iterative effort reduction in business-to-business schema integration The present disclosure describes methods, systems, and computer program products for providing and maintaining an evolving canonical data model (CDM) which consolidates current knowledge of the correspondences of existing schemas. One computer-implemented method includes receiving the plurality of source hierarchical schemas, each source hierarchical schema being stored as a computer-readable document in computer-readable memory, processing, using a computer, the source hierarchical schemas to generate a merged graph, the merged graph comprising a plurality of merged nodes, each merged node being provided based on one or more nodes from at least two of the source hierarchical schemas, and determining, using the computer, that the merged graph includes one or more conflicts and, in response, resolving each conflict of the one or more conflicts to generate a computed-transitive-edge-free, conflict-free merged graph as a unified data model (UDM), wherein resolving comprises splitting one or more merged nodes into respective sub-sets of merged nodes.
US09311423B1	System and method for website categorization Systems and methods for the categorization of websites are presented. A website is categorized using one or a combination of its domain name and its web page content. The domain name is tokenized, and the tokens compared to categories in a category structure to determine probabilities that the token belongs to each category. Combinations of tokens are similarly compared to the categories. A category may be determined with reference to a vector space in which a training set of websites having known categories is converted according to a methodology into reference vectors containing keyword frequencies. A target website is converted to a target vector using the same methodology, and a distance score of the target vector to each reference vector is calculated. The website represented by the target vector is assigned the category of the reference vector having the lowest distance score.
US09311420B2	Customizing web 2.0 application behavior based on relationships between a content creator and a content requester The present invention discloses a solution for developer customization of Web 2.0 applications based on relationships between a content creator and a content requester. In the solution, Web 2.0 content can be received from a content creator. One or more creator established customizations can also be received where the customizations are each a set of one or more users. In the method, a communication can be established with a user who requests the Web 2.0 content. It can be determined that the user is a member of a set specified by the content creator. The customization associated with the set can be applied. Web 2.0 content as modified by the customization can be served to the user. In one embodiment, users can also establish customizations, which are also applied to the served Web 2.0 content.
US09311419B2	System for data card emulation An improved system for data card emulation involves a watch that can emulate any one of multiple data cards corresponding to multiple entities. The watch includes a memory for storing bar code information corresponding to data cards of the multiple entities. It provides an interface for identifying an entity and a display for displaying a bar code corresponding to a data card of the entity. The interface may include at least one of a bar code reader or a bar code emulator. The interface may include at least one of a magnetic stripe reader or a magnetic stripe emulator. The interface may receive a transmission such as a pulsed light transmission or a radio frequency transmission.
US09311418B2	Information processing apparatus, information processing method , information management apparatus, information management method, recording medium, and information processing system An information processing apparatus includes a collection information obtaining unit configured to collect information stored in a plurality of apparatuses so as to obtain collection information assigned to predetermined category groups, and a display controller configured to control display of the collection information. The category groups include first and second category groups. The display controller controls display of an image including a first category group display region which displays categories of the first category group, a second category group display region which displays categories of the second category group, and a content display region which displays concrete content of the collection information which corresponds to one of the categories selected in the first category group and which corresponds to one of the categories selected in the second category group.
US09311413B1	Faceted application search The subject matter of this specification can be implemented in, among other things, a method that includes receiving, from a computing device, one or more user inputs that include levels of relevance for multiple facets of multiple applications. Each of the facets represents a different set of behaviors from a plurality of behaviors of the applications. Each one of the applications has an associated value for each of the facets based on the set of behaviors of each of the applications. The method further includes organizing a list of the applications based on the levels of relevance for the facets and the value of each of the facets for each of the applications. The method further includes providing, to the computing device, the list of the applications for presentation on a display device at the computing device.
US09311408B2	Methods and systems for processing media files Systems and methods for processing media files are described. In one embodiment, one or more events are captured having associated event data and associated with a client device, wherein each event is associated with an article and at least one of the articles is a media file, wherein at least one of the events is captured in real time upon the occurrence of the event, at least some of the event data and articles associated with the events are indexed and stored, a search query is received, and the at least one media file is determined as relevant to the search query.
US09311406B2	Discovering trending content of a domain Systems and methods for identifying trending content on one or more domains is presented. In response to receiving a request for trending content on each domain of a set of domain, network activity data corresponding to network activity of a recent period of time is obtained. According to various embodiments, the network activity data corresponds to activity in the immediately previous time period and includes any of query logs from one or more search engines, social data from one or more social network sites, and browsing data corresponding to the browsing history of a plurality of computer users. Trending content from the network activity data for each domain of the set of domains is identified and the identified content is returned in response to the received request.
US09311405B2	Search engine for video and graphics A method of selecting graphic or video files having corresponding locators used to locate such graphic or video files using a computer. Identifiers are created by searching an area within a web page near a graphic or video file for searchable identification terms and searching an area within a web page near links to a graphic or video for searchable identification terms. The identifiers are stored in a database. User requests for graphic or video file content are received and the database of identifiers is searched to find graphic and video files corresponding criteria of the user. Graphic or video file content is then provided to the user.
US09311402B2	System and method for invoking functionalities using contextual relations A method for obtaining contextually related instances. The method comprises providing a map of a plurality of contextual relations between a plurality of instance types and a plurality of functionalities. Each one of the functionalities is associated with one of the mapped contextual relations and configured for providing one or more instances of a respective type. The method further comprises receiving a contextual linkage between a known instance and a requested instance, identifying a match between the contextual linkage and a segment of the map, and obtaining the requested instance by using the known instance along with a group of which is selected from the functionalities; each member of the group is associated with a contextual relation in the segment.
US09311399B2	System and method for providing an updating on-line forms and registrations Improved approaches to completing, submitting and updating on-line forms or registrations are disclosed. In one embodiment, an on-line form completion agent or an on-line registration agent intelligently guides an on-line form completion or registration process. In another embodiment, a registration is automatically monitored to determine whether and when the registration needs updated.
US09311397B2	Method and apparatus of providing street view data of a real estate property Video drive-by data provides a street level view of a neighborhood surrounding a selected geographic location. A video and data server farm incorporates a video storage server that stores video image files containing video drive-by data corresponding to a geographic location, a database server that processes a data query received from a user over the Internet corresponding to a geographic location of interest, and an image processing server. In operation, the database server identifies video image files stored in the video storage server that correspond to the geographic location of interest contained in the data query and transfers the video image files over a pre-processing network to the image processing server. The image processing server converts the video drive-by data to post-processed video data corresponding to a desired image format and transfers the post-processed video data via a post-processing network to the Internet in response to the query.
US09311392B2	Document analysis apparatus, document analysis method, and computer-readable recording medium A document analysis apparatus comprises: a feature expression acquisition unit acquiring a feature expression appearing during an attention period in an analysis object document collection; a document collection acquisition unit acquiring a feature expression containing document (FECD) collection in which a feature expression appears, from an analysis population including an analysis object document collection; a context determination unit specifying an analysis/FECD corresponding to an analysis object document among a FECD collection for every feature expression, and specifies a context in which the feature expression appeared in multiple analysis/FECDs; a context comparison determination unit specifying a non analysis/FECD not corresponding to an analysis object document among a FECD collection, and within that, compares a context in which the feature expression has appeared and a context specified previously; and a feature degree setting unit performing giving or the like of a feature degree to a feature expression from the comparison.
US09311382B2	Method and apparatus for personal characterization data collection using sensors A processor-based personal electronic device (such as a smartphone) is programmed to automatically respond to data sent by various sensors from which the user's activity may be inferred. A wireless communication link may be used by the device to obtain data from remote sensors which may be worn by the user. A personal “scorecard” may be generated from the raw data and from data concerning other users. Personal, raw characterization data may be computed into personal statistical data by averaging over time. Then, it may be sent (anonymously) to a server that receives such data from many (or all) users. The server may return personal statistical positioning to enable comparison of the user to other participants. In certain embodiments, the generation of a personal scorecard from the personal position in the group statistics may be performed in the user's device.
US09311371B2	Data cell cluster identification and table transformation Various embodiments may operate to access individual lines of information included in a file stored in an electronic storage medium, to detect the existence of data clusters in the file based on neighboring cell content in a horizontal direction (corresponding to the individual lines), and in a vertical direction (orthogonal to the horizontal direction), to identify at least some of the data clusters as being associated with predefined table types (comprising vertical tables, horizontal tables, or cross tables), to merge some of the data clusters into section tables having common properties, and to transform the tables resulting from the merging activity, as well as remaining un-merged data clusters, into a single flat table. The stored file may comprise a spreadsheet file.
US09311370B2	Virtual attribute federation system The present invention may comprise a system and method for a Virtual Attribute Federation System (VAFS) and may be composed of a Virtual Attribute Federation Manager (VAFM) and a system of Virtual Attribute Enabled Directories (VAED) modified to accept federation of virtual attributes. The VAFM produces signed and trusted calculation methods and coordinates a synchronized dispersal of these methods to the VAEDs. The VAEDs may have local mappings which allow for federation-time configuration of the calculation methods.
US09311367B2	Database extension structure A digital repository 20 includes data items. A user can add additional functionality or program routines to data item by including as a data item a data processing identifier pointing to at least one data processing routine. Such routines are accessed by a client 22 by sending from a client to the digital repository 20 a request to access a data item, wherein the repository provides an interface description document 32 from the digital repository 20 to the client 22 as the response to the request. The client 22 can then transmit a data processing request from the client to a service 26 identified by the data processing identifier of the interface description document 32, the data processing request including the identifier from the interface description document.
US09311365B1	Music identification A system and method for managing music associated with a user account of an online music provider including receiving a request from a client device to add a song to the user account. A first match search is performed for the corresponding hash pair in a matching pipeline. Each hash pair in the matching pipeline includes a logical link corresponding to a song in a master repository. A second match search is performed when the first match search determines that the song is missing from the master repository. The second match search includes fingerprint matching. The song is associated with the user account when either first or second match search identifies the song to be in the master repository. An upload of the song to the online music provider is requested when the first and second match search determines that the song is missing from the master repository.
US09311363B1	Personalized entity rankings Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing personalized evaluations of products, services, or providers are disclosed. In one aspect, a method includes obtaining, for an entity, quality feedback including quality scores representing measures of quality for the entity and including feedback text submitted with the quality scores. A characteristic of the entity is identified from the feedback text, and an influence of the characteristic on the quality scores is determined. A quality profile specifying a measure of importance of the characteristic to the user is identified. An estimated quality value for the entity is determined based on the influence of the characteristic and the characteristic weight, and the entity is ranked based on the estimated quality score.
US09311358B2	Smart cache component for demand chain management Demand Chain Management (DCM) refers to a suite of analytical applications for retail business, that provides retailers with the tools they need for product demand forecasting, planning and replenishment. The reliable development and user-friendly interface of DCM applications ensures improved customer satisfaction, increased sales, improved inventory turns and significant return on investment. The present subject matter provides a self-contained reusable smart cache component for DCM development and interface. The smart cache component gives a DCM developer the ability to automatically have a configurable amount of information temporarily stored in readily available memory on an application server. The information can be retrieved in a high speed fashion without the need for additional calls to the original location of the information.
US09311356B2	Database calculation engine A select query or a data referencing a calculation scenario is received by a database server from a remote application server. The specified calculation scenario is one of a plurality of calculation scenarios and it defines a data flow model that includes one or more calculation nodes. Each calculation node defines one or more operations to execute on the database server. Thereafter, the database server instantiates the specified calculation scenario and executes the operations defined by the calculation nodes of the instantiated calculation scenario to result in a responsive data set. This data set is then provided by the database server to the application server. Related apparatus, systems, techniques and articles are also described.
US09311354B2	Method for two-stage query optimization in massively parallel processing database clusters Queries may be processed more efficiently in an massively parallel processing (MPP) database by locally optimizing the global execution plan. The global execution plan and a semantic tree may be provided to MPP data nodes by an MPP coordinator. The MPP data nodes may then use the global execution plan and the semantic tree to generate a local execution plan. Thereafter, the MPP data nodes may select either the global execution plan or the local execution plan is accordance with a cost evaluation.
US09311350B2	Central place indexing systems Spatial location systems can be based on multi-resolution grids such as mixed aperture combinations of hexagonal cells. A particular finest resolution can be selected based on a suitable combination of intermediate grid apertures such as arbitrary combinations of aperture 3, aperture 4, and aperture 7 hexagons. Location identifiers can be uniquely assigned by generating child cells from a parent cell so that the generated child cells do not overlap child cells of other parent cells. One or more child blocks can be used at any resolution to avoid such overlap. For aperture three and aperture four hexagonal cells, blocks of four and three child cells, respectively, can be used to provide unique location identifiers.
US09311348B2	Method and system for implementing an array using different data structures Disclosed are a method and system for implementing an array data type of a programming language using various data structures. The disclosed method includes a plurality of implementations in which the array data type may be implemented. The implementations provide an efficient way to retrieve elements from the array, especially in the order they are inserted into the array. The data structures also minimize the computing resources required to manage and access the array. The disclosed technique also selects one of the many implementations based on criteria such as access pattern or size of the array.
US09311343B2	Using a sequence object of a database A method and system of managing a database is disclosed. The database may be structured to include a sequence object. The sequence object can have a set of sequential values. The set of sequential values may be used as a set of key values for a set of jobs. A count of jobs accessing the sequence object may be monitored. Based on the count of jobs accessing the sequence object, a quantity of sequential values of the set of sequential values may be allocated.
US09311342B1	Tree based image storage system The present disclosure generally relates to methods and computer program products for storing images in a computer memory, and in particular to a method and computer program product for storing a plurality of JPEG encoded images in a tree data structure, wherein common parts of images in upper tree nodes are utilized for compressing images in lower parts of the tree.
US09311331B2	Detecting out-of-band (OOB) changes when replicating a source file system using an in-line system Examples described herein include a computer system, positioned in-line with respect to a plurality of clients that actively use a source file system, to replicate a source file system on a target memory in presence of out-of-band events which alter the source file system.
US09311330B1	Method and system for performing full backup in a failover cluster This disclosure relates to a method, article of manufacture, and apparatus of performing backup in a failover cluster. In some embodiments, this includes determining whether a repository is part of a failover cluster, based on a determination that the repository is part of the failover cluster, analyzing a role associated with the repository, upon a determination that the role indicates the repository is a failover candidate within the failover cluster, triggering a secondary backup of the repository, and upon a determination that the role indicates the repository is a primary repository within the failover cluster, triggering a primary backup of the repository.
US09311327B1	Updating key value databases for virtual backups A method, article of manufacture, and apparatus for protecting data. This might include identifying a file modification, modifying a previous file entry, wherein the previous file entry is stored in a key value database, and creating a new file entry in the key value database. Modifying the previous file entry might include modifying the end version of the entry.
US09311325B2	Protecting data segments in a computing environment Exemplary method, system, and computer program product embodiments for protecting data segments by a processor device in a computing environment, are provided. In one embodiment, by way of example only, a history table is configured to accompany data segments for consultation during a replication operation. If the history table indicates an ownership conflict, the replication operation is inhibited.
US09311323B2	Multi-level inline data deduplication Technologies are presented for data deduplication that operates at relatively high throughput and with relatively less storage space than conventional techniques. Building upon content-dependent chunking (CDC) using Rabin fingerprints, data may be fingerprinted and stored in variable-size chunks. In some examples, data may be chunked on multiple levels, for example, two levels, variable size large chunks in the first level and fixed-size sub-chunks in the second level, in order to prevent sub-chunks common to two or more data chunks from not being deduplicated. For example, at a first level, a CDC algorithm may be employed to fingerprint and chunk data in content-dependent sizes (variable sizes), and at a second level the CDC chunks may be sliced into small fixed-size chunks. The sliced CDC chunks may then be used for deduplication.
US09311319B2	Method and system for administration of storage objects An exemplary embodiment of the present invention provides a method of generating a representation of a storage network. The method includes obtaining an request from a client system to view contents of a node in a tree model. The method also includes receiving tree information corresponding to the node and adding the tree information to the tree model.
US09311317B1	Injecting custom data into files in zip format containing apps, without unzipping, resigning or re-zipping the files Custom data is injected into a comment field in an APK file. This creates a data driven, customized app, without unzipping, resigning or re-zipping the APK file. The APK file and the injected custom data are transmitted to a mobile computing device. The custom data can be injected into a comment field at the end of the APK file, which allows the non-customized version of the APK file and the custom data to be transmitted to the mobile computing device in succession, such that the transmission is received as a single, customized APK file. The content of the non-customized APK file and the custom data can instead be written to a new, customized APK file, which is then transmitted to the mobile computing device.
US09311314B2	System and method for migrating data from a source file system to a destination file system with use of attribute manipulation A system for migrating data from a source file system to a destination file system while the source file system is in active use, in part by transitioning the client's use of the source file system to that of the destination file system without unmounting the client from the source file system.
US09311306B2	Information processing apparatus, information processing method and storage medium in which program thereof is recorded An information processing apparatus uses unique IDs to manage items, such as electronic files and folders, to be operated and includes: an information share window ID managing section managing, in a share window ID management DB, information of the window Ids corresponding to windows of Web browsers that are to share information; an item storing processing section storing item information in an item information DB when a first operation for the item is instructed from a first Web browser; a stored item processing section executing a second operation based on the item information stored in the item information DB and the information of the window Ids stored in the share window ID management DB when the second operation is instructed from a second Web browser; This apparatus enables collaborative operations between two windows of Web browsers.
US09311301B1	Systems and methods for large scale global entity resolution Systems and methods for coreference resolution are disclosed. In one embodiment, a method includes locating, for each of a selected plurality of chains of coreferent mentions, a particular context-based name from the respective chain, wherein the coreferent mentions correspond to entities and the context-based name is a longest name in the respective chain, a last name in the respective chain, or a most frequently occurring name in the respective chain. The method also includes determining an entity category for each respective one of the plurality of chains and determining one or more entity attributes from structured data and unstructured data. The method further includes, based on the located particular context-based name, the entity category, and the one or more attributes, assigning high-probability coreferent chains to high-confidence buckets, such as to produce a Zipfian-like distribution having a head region and a tail region.
US09311296B2	Semantic phrase suggestion engine A semantic phrase suggestion engine that provides term and sentence suggestions based on context-specific user groups. Knowledge domains within a semantic network may be automatically derived from user software applications, and each term within the knowledge domain includes meta-data about the terms, e.g., term type and an importance indicator. The indicators may be defined within the context of specific user groups and relate to how many times that group has used the term (e.g., in documents, emails, etc.) The semantic phrase suggestion engine may also include spelling conditions and grammar conditions, which can then provide phrase suggestions according to the conditions and importance indicators, specific to a user group.
US09311295B2	Procedure extraction and enrichment from unstructured text using natural language processing (NLP) techniques A method for extraction and enrichment of a procedure from a document is provided. The method may include identifying a potential location of a procedure in the document. The method may also include detecting a beginning boundary and an end boundary associated with the identified potential location of the procedure. The method may further include validating a text associated with the identified potential location of the procedure in the document. Additionally, the method may include determining an intent from the identified potential location of the procedure based on at least one of the beginning boundary, the end boundary, a surrounding text associated with the identified potential location of the procedure, a context associated with the document, and a title of the document. The method may also include enriching the procedure based on the determined intent.
US09311294B2	Enhanced answers in DeepQA system according to user preferences A semantic search engine is enhanced to employ user preferences to customize answer output by, for a first user, extracting user preferences and sentiment levels associated with a first question; receiving candidate answer results of a semantic search of the first question; weighting the candidate answer results according to the sentiment levels for each of the user preferences; and producing the selected candidate answers to the first user. Optionally, user preferences and sentiment levels may be accumulated over different questions for the same user, or over different users for similar questions. And, supplemental information may be retrieved relative to a user preference in order to further tune the weighting per the preferences and sentiment levels.
US09311290B2	Approximate named-entity extraction According to one embodiment, a method is provided for approximate named-entity extraction from a dictionary that includes entries, where each of the entries includes one or more words. Words are read from the entries of the dictionary, and network resources are searched to determine a frequency of occurrence of the words on the network resources. In view of the frequency of occurrence of the words located on the network resources, domain relevancy of the words in the entries of the dictionary is determined. A domain repository is created using top-ranked words as determined by the domain relevancy of the words. In view of the domain repository, signatures for both the entries of the dictionary and strings of an input document are computed. The strings of the input document are filtered by comparing the signatures of the strings against the signatures of the entries to identify approximate-match entity names.
US09311279B2	Notification of a change to user selected content A method for notification of a change to content of a document may include providing a mechanism for selecting a certain portion of content of a document by a user that the user desires to receive notification of changes to the certain portion of content. The method may also include detecting a change to the certain portion of content being made by another user. The method may further include creating the notification of the change to the certain portion of content in response to a predefined condition being meet and transmitting the notification of the change to the certain portion of content to at least the user in response to the change to the certain portion of content of the document being saved by the other user.
US09311277B2	Method of identifying materials from multi-energy X-rays A calibration method for a device for identifying materials using X-rays, including: a) determining at least one calibration material and, for each calibration material, at least one calibration thickness of this material, b) measuring, for each of the calibration materials and for each of the selected calibration thicknesses, attenuation or transmission coefficients for X radiation, c) calculating statistical parameters from the coefficients, d) determining or calculating, for each calibration material and for each calibration thickness, a presence probability distribution law, as a function of the statistical parameters.
US09311273B2	Parallelization method, system, and program A segment including a set of blocks necessary to calculate blocks having internal states and blocks having no outputs is extracted by tracing from blocks for use in calculating inputs into the blocks having internal states and from the blocks having no outputs in the reverse direction of dependence. To newly extract segments in which blocks contained in the extracted segments are removed, a set of nodes to be temporarily removed is determined on the basis of parallelism. Segments executable independently of other segments are extracted by tracing from nodes whose child nodes are lost by removal of the nodes in the upstream direction. Segments are divided into upstream segments representing the newly extracted segments and downstream segments representing nodes temporarily removed. Upstream and downstream segments are merged so as to reduce overlapping blocks between segments such that the number of segments is reduced to the number of parallel executions.
US09311269B2	Network proxy for high-performance, low-power data center interconnect fabric A system and method are provided for network proxying. The network proxying may occur in a node of a fabric or across nodes in the fabric. In the network proxying, the node has a processor with a low power mode and the system remaps, by a management processor of the node, a port identifier for a processor that is in a low power mode to the management processor. The management processor then processes a plurality of packets that contain the port identifier for the processor that is in the low power mode to maintain a network presence of the node.
US09311264B2	Pass-through converged network adaptor (CNA) using existing Ethernet switching device According to one embodiment, a switch system includes an external host connected via a peripheral component interconnect express (PCIe) port to a switch system, the external host being configured to perform functionality of a management plane and a control plane for the switch system, the external host having a processor. In another embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code including computer readable program code configured to perform functionality of a management plane and a control plane for a switch system using a processor of an external host. Other systems, computer program products, and methods are described according to more embodiments.
US09311262B2	Transmission control device, memory control device, and PLC including the transmission control device A transmission control device in the present invention includes: a data storage memory in which data are written; a plurality of data copy memories into which the data written in the data storage memory are copied; an unread copy-memory selection unit that selects one of the data copy memories for which reading of data is not performed from among the data copy memories; a memory copy unit that copies the data written in the data storage memory into a data copy memory selected by the unread copy-memory selection unit; a read copy-memory selection unit that selects a data copy memory into which the memory copy unit copies data from among the data copy memories; and a data output unit that reads data from a data copy memory selected by the read copy-memory selection unit and outputs the read data to a transmission unit.
US09311261B2	Universal serial interface and semiconductor device including the same A universal serial interface (USI) includes two transceivers configured to separately support a plurality of serial communication standards; a buffer configured to store received data and data to be transmitted; and a transceiver controller configured to connect one of the two transceivers to the buffer based on a configuration signal received from outside of the USI.
US09311260B2	Context preservation during thread level speculative execution A microarchitecture can be configured to allow a thread's speculative state to be stored when the thread is preempted. The stored speculative state can then be loaded back into the microarchitecture when the thread is resumed to thereby enable the thread to resume execution at the speculative state that existed when the thread was preempted. By maintaining the speculative state of threads, a greater amount of parallel processing is achieved.
US09311259B2	Program event recording within a transactional environment A transaction is initiated within a computing environment, and based on detecting a program event recording event, an interrupt is presented for the transaction. Subsequent to the interrupt, one or more controls are set to inhibit presentation of another interrupt based on detecting another PER event. Thereafter, the transaction is re-executed and PER events detected during execution of the transaction are ignored.
US09311251B2	System cache with sticky allocation Methods and apparatuses for implementing a system cache within a memory controller. Multiple requesting agents may allocate cache lines in the system cache, and each line allocated in the system cache may be associated with a specific group ID. Also, each line may have a corresponding sticky state which indicates if the line should be retained in the cache. The sticky state is determined by an allocation hint provided by the requesting agent. When a cache line is allocated with the sticky state, the line will not be replaced by other cache lines fetched by any other group IDs.
US09311247B1	Method and apparatus for detecting patterns of memory accesses in a computing system with out-of-order program execution A method for detecting patterns of memory accesses in a computing system with out-of-order program execution is provided. The method comprises identifying a first memory operation instruction that is part of a memory stream that would benefit from memory prefetches, marking with program order a plurality of other memory operation instructions prior to execution that are part of the same memory stream as the first memory operation instruction while the plurality of other memory operation instructions are in program order, and, subsequent to out of program order execution of at least two of the plurality of marked memory operation instructions but before execution of all of the plurality of marked memory operation instructions, determining an expected offset value between memory addresses to be accessed by consecutively marked memory operation instructions using the marked memory operation instructions that have executed.
US09311244B2	Enforcing ordering of snoop transactions in an interconnect for an integrated circuit An interconnect has transaction tracking circuitry for enforcing ordering of a set of data access transactions so that they are issued to slave devices in an order in which they are received from master devices. The transaction tracking circuitry is reused for also enforcing ordering of snoop transactions which are triggered by the set of data access transactions, for snooping master devices identified by a snoop filter as holding cache data for the target address of the transactions.
US09311238B2	Demote instruction for relinquishing cache line ownership A computer system microprocessor core having a cache subsystem executes a demote instruction to cause an exclusively owned demote instruction specified cache line owned by the same microprocessor core to be shared or read-only.
US09311235B2	Method of erasing information stored in a nonvolatile rewritable memory, storage medium and motor vehicle computer Method of erasing information stored in a nonvolatile rewritable memory of a computer, wherein a master module sends erasing requests to a slave module of the computer, the memory including at least two interleaved sectors. The method includes preliminary steps of determining a virtual memory addressing space associated with the memory, in which each sector extends over a specific range of consecutive virtual memory addresses, and establishing a first correspondence function for determining, from a range of virtual memory addresses, the sector or sectors whose contents must be erased, and for each erasing request received by the slave module indicating a range of virtual memory addresses, a step of determining the sector or sectors whose contents must be erased by the slave module. The memory includes a plurality of segments, each segment breaking down into a plurality of sectors and at least two segments including interleaved physical memory addresses.
US09311234B2	Method for reliably addressing a large flash memory and flash memory A flash memory for a host system has a multiplicity of memory blocks. The memory blocks are subdivided into memory pages which can be written to and each memory page are also subdivided into partial pages and each partial page having a physical partial page address which is assigned a logical partial page address which can be addressed. The physical partial page addresses assigned to the logical partial page addresses are able to be determined using hierarchically organized structures of address tables for converting logical partial page addresses into physical partial page addresses. The multiplicity of memory blocks of the flash memory are divided into areas which comprise at least one static area of memory blocks which have been written to, a write area to which new and changed useful data are written, a block management area which stores management data for the memory blocks, and a logbook area.
US09311233B2	Load-through fault mechanism A mechanism is provided for accessing data in a hybrid hardware managed cache in front of flash memory enabling load/store byte addressability to flash memory. A determination is made as to whether a real address associated with the effective address associated with a request resides in a page table. Responsive to the real address existing in the page table, responsive to the real address referring to a flash page, and, responsive to the flash page failing to reside in the hybrid hardware managed cache, a load-through fault is issued that allows the faulting processor executing the request to execute other work while the flash page is brought into the hybrid hardware managed cache. The operation is then issued to the new hybrid hardware managed cache real address.
US09311228B2	Power reduction in server memory system A system and method for reducing power consumption of memory chips outside of a host processor device inoperative communication with the memory chips via a memory controller. The memory can operate in modes, such that via the memory controller, the stored data can be localized and moved at various granularities, among ranks established in the chips, to result in fewer operating ranks. Memory chips may then be turned on and off based on host memory access usage levels at each rank in the chip. Host memory access usage levels at each rank in the chip is tracked by performance counters established for association with each rank of a memory chip. Turning on and off of the memory chips is based on a mapping maintained between ranks and address locations corresponding to sub-sections within each rank receiving the host processor access requests.
US09311227B2	Memory management Methods and devices are provided for memory management. One embodiment includes creating a memory control block including a number of sub-blocks, where the number of sub-blocks are capable of storing at least one data structure in a memory device. The method also includes scanning the control block for a free-able data structure having a defined data structure property, marking the free-able data structure as free-able in a bit map, and de-allocating the free-able data structure.
US09311224B1	Manipulating a test based on a subset of similar divergent routes from different organizations System, method, and non-transitory medium for utilizing routes followed by runs of test scenarios to manipulate a test scenario template. Runs of test scenarios run by users belonging to different organizations on software systems associated with the different organizations are analyzed to identify routes that the runs follows; the identified routes may be stored in a database. A route retriever receives a certain template route belonging to a test scenario template and retrieves from the database divergent routes that diverge from the template route. A subset selector selects from the divergent routes a subset of divergent routes that are similar to each other. A template manipulator manipulates the test scenario template according to the subset if the size of the subset reaches a predetermined threshold.
US09311223B2	Prioritizing test cases using multiple variables A computer identifies lines of code of a product program that have been modified after an initial test of the product program. The computer determines the overlap between lines of code that have been modified and a mapped test case. The computer determines a weighted value for the mapped test case based on two or more of, an environment of the test case, the degree of the overlap, a time the test case was last executed, a time the test case takes to execute, and a priority of a defect. The environment of the test case is configured to replicate a working environment where the product program is to be deployed and includes an operating system, a hardware configuration, and the configuration of the operating system.
US09311221B2	Recording program execution Among other things, a method includes, at a computer system on which one or more computer programs are executing, receiving a specification defining types of state information, receiving an indication that an event associated with at least one of the computer programs has occurred, the event associated with execution of a function of the computer program, collecting state information describing the state of the execution of the computer program when the event occurred, generating an entry corresponding to the event, the entry including elements of the collected state information, the elements of state information formatted according to the specification, and storing the entry. The log can be parsed to generate a visualization of computer program execution.
US09311217B2	Analyzing computer programs to identify errors A method of analyzing a computer program under test (CPUT) using a system comprising a processor and a memory can include performing, by the processor, static analysis upon the CPUT and runtime analysis upon at least a portion of the CPUT. A static analysis result and a runtime analysis result can be stored within the memory. Portions of the CPUT analyzed by static analysis and not by runtime analysis can be determined as candidate portions of the CPUT. The candidate portions of the CPUT can be output.
US09311216B2	Defining multi-channel tests system and method A method, computer program product, and computer system for defining, at a computing device, one or more channels for executing one or more test scenarios. One or more keyword keywords, each with one or more associated keyword implementations for at least one channel of the one or more channels, are defined. One or more test scenarios is defined, wherein at least one test scenario of the one or more test scenarios includes at least one keyword implementation of the one or more keywords.
US09311214B2	System and methods for tracing individual transactions across a mainframe computing environment A performance management system is provided for monitoring performance of an application across a distributed computing environment, including within one or more mainframe computers. In the mainframe environment, a transaction manager is configured to receive a transaction request from an application executing remotely from the mainframe computer. An event agent is invoked via a user exit by the transaction manager and operates to detect events caused by the handling of the transaction by the transaction manager. Upon detecting such events, the event agent generates event messages for select events associated with the transaction, where the event message includes identifying information for the transaction. A translator agent is configured to receive the event messages from the event agent and transmit the event data record to a server located remotely from the mainframe computer, where the event data record includes the identifying information for the transaction.
US09311212B2	Task based voting for fault-tolerant fail safe computer systems A system includes a first application that writes a first plurality of tasks to a first memory buffer; a second memory buffer that receives a copy of the first plurality of tasks; a second application that writes a second plurality of tasks to a third memory buffer; and a fourth memory buffer that receives a copy of the second plurality of tasks. The system further includes a first comparison module that generates a first voting signal based on a first comparison between a first task and a second task. The system further includes a second comparison module that generates a second voting signal based on a second comparison between the first task and the second task. The system further includes a first central processing unit (CPU) that selectively determines whether to de-assert a module health signal based on the first voting signal and the second voting signal.
US09311210B1	Methods and apparatus for fault detection In some embodiments, a method includes receiving, at a data collection module implemented in at least one of a memory or a processing device, from a processing system, an observation value for a variable. The observation value of the variable is associated with operation of the processing system at a time. The method further includes computing a deviation value of the variable from a baseline value at the time based on the observation value. The method further includes computing a stableness value of the variable at the time based on the baseline value and a variance of the variable during a time period including the time. The method further includes transmitting an indication of the processing system as operating with a fault in response to the deviation value meeting a first criterion and the stableness value meeting a second criterion.
US09311199B2	Replaying jobs at a secondary location of a service Jobs submitted to a primary location of a service within a period of time before and/or after a fail-over event are determined and are resubmitted to a secondary location of the service. For example, jobs that are submitted fifteen minutes before the fail-over event and jobs that are submitted to the primary network before the fail-over to the second location is completed are resubmitted at the secondary location. After the fail-over event occurs, the jobs are updated with the secondary network that is taking the place of the primary location of the service. A mapping of job input parameters (e.g. identifiers and/or secrets) from the primary location to the secondary location are used by the jobs when they are resubmitted to the secondary location. Each job determines what changes are to be made to the job request based on the job being resubmitted.
US09311198B2	Active hot standby redundancy for broadband wireless network In embodiments of the present disclosure systems and methods implementing active-hot standby redundancy in server architectures are described. In an active-hot standby redundancy architecture, two matching service instances are installed in a network on different host computers. A standby service instance may maintain state information for every session maintained at an active service instance that it is poised to replace using a publish-subscribe communications network. When a failure occurs in the active instance, the standby instance may promote itself to active, and assume all aspects of the service identity and role of the Active instance it is replacing. Service to user entities continues without interruption, although transactions that are ongoing just as the failure occurs may be lost.
US09311196B2	Method and apparatus for managing connection path failure between data centers for cloud computing A first cloud computing data center and a second cloud computing data center are connected through a provider backbone bridge network (PBBN), and a plurality of working connection paths and protection connection paths are formed between end points between the first cloud computing data center and the second cloud computing data center and between end points within a cloud computing data center through the PBBN. When a failure occurs in the working connection path, the working connection path is switched to a corresponding protection connection path.
US09311195B2	SCSI reservation status information on a SAN disk A method is disclosed for retrieving the reservation status information of a storage area network (SAN) device, a host transmits a persistent reservation in command with service action setting of ‘read reservation’ to a first LUN, wherein the host is connected to a port of the data storage server to which the LUN belongs. The host receives a message from the LUN. The host determines that the message is a success. The host sends to the LUN a persistent reservation in command with service action setting of ‘read keys’, responsive to a success message. The host determines that the LUN responds with a zero data length. The host determines the LUN is reserved with type 2 reservation, responsive to a determination that the LUN responds with a non-zero data length.
US09311194B1	Efficient resource utilization in data centers A method for efficiently using resources (e.g., memory devices) in data centers of a distributed storage system includes identifying high-availability jobs and low-availability jobs that demand usage of resources of the distributed system. The method further includes allocating resource usage to the jobs, determining a first load of the jobs on resources available during a failure event, and determining a second load of the jobs on the resources lost during the failure event. The method includes determining a scaled third load of the jobs on the resources available during the failure event based on the first and second loads and reallocating resource usage assigned to the low-availability jobs to the high-availability jobs during the failure event. The reallocation is associated with the scaled third load of the jobs.
US09311192B2	Methods, systems, and products for data backup Methods, systems and computer program products automatically back-up data. Communication is established among a first device, a second device, and a network-based storage device. Key words associated with uniform resource locators are identified and stored in the network-based storage device. When corruption is detected of the data stored in the first device, the key words are automatically retrieved from the network-based storage device and listed in a user interface displayed at the second device.
US09311190B1	Capturing post-snapshot quiescence writes in a linear image backup chain Capturing post-snapshot quiescence writes in a linear image backup chain. In one example embodiment, a method for capturing post-snapshot quiescence writes in a linear image backup chain may include taking a first snapshot of a source storage at a first point in time, identifying a first set of block positions of blocks that are allocated in the source storage at the first point in time, identifying a second set of block positions of blocks that are written to the first snapshot during post-snapshot quiescence of the first snapshot, resulting in a first quiesced snapshot, copying the blocks in the first set of block positions from the first snapshot to a full image backup, and copying the blocks in the second set of block positions from the first quiesced snapshot to a first incremental image backup.
US09311189B2	Method and device for inputting data in multimedia service database on embedded device The present invention discloses a method and a device for inputting data in a multimedia service database on an embedded device. The method includes: when multimedia file scanning is performed, storing generated directory information of a multimedia file in a random access memory database (RAM-DB), and performing a RAM-DB to backup database (BAK-DB) data backup operation in a scanning process; and if an interruption occurs in the scanning process, and when the scanning continues after the scanning interruption ends, copying data in the BAK-DB to the RAM-DB, and continuing to scan, according to existing data in the RAM-DB, a multimedia file that is not scanned. In the present invention, two database files RAM-DB and BAK-DB are configured in a multimedia service system.
US09311187B2	Achieving storage compliance in a dispersed storage network A method begins by a dispersed storage (DS) processing module receiving a request to store data in a dispersed storage network and determining dispersed storage error encoding parameters for encoding the data into sets of encoded data slices. The method continues with the DS processing module determining whether the request includes a desired write reliability indication. When the request includes the desired write reliability indication, the method continues with the DS processing module determining whether storage of the sets of encoded data slices is meeting the desired write reliability indication. When storage of a set of encoded data slices is not meeting the desired write reliability indication, the method continues with the DS processing module determining a storage compliance process for the set of encoded data slices to meet the desired write reliability indication and executing the storage compliance process for the set of encoded data slices.
US09311183B2	Adaptive target charge to equalize bit errors across page types Systems, methods and/or devices are used to adapt a target charge to equalize bit errors across page types for a storage medium, such as flash memory, in a storage system. In one aspect, the method includes performing a sequence of operations, including: (1) determining a first target charge, a second target charge, and a third target charge, the first, second, and third target charges used for controlling first, second, and third charge distributions, respectively, in cells of the storage medium when data is written to the cells, wherein the second charge distribution is between the first charge distribution and the third charge distribution, (2) determining a first error indicator for lower/fast pages of the storage medium, (3) determining a second error indicator for upper/slow pages of the storage medium, and (4) adjusting the second target charge in accordance with the first error indicator and the second error indicator.
US09311179B2	Threshold decoding of data based on trust levels A method begins by a set of storage units of a dispersed storage network (DSN) receiving a plurality of read requests regarding a plurality of sets of encoded data slices from a requesting device of the DSN and outputting a plurality of read responses that includes encoded data slices and corresponding trust level indicators. The method continues with the requesting device arranging the encoded data slices of the plurality of read responses into received sets of encoded data slices. The method continues with the requesting device selecting a decode threshold number of encoded data slices from each received set of encoded data slices based on the corresponding trust level indicators to produce selected sets of encoded data slices and decoding the selected sets of encoded data slices to recapture data segments of a data object.
US09311178B2	Salvaging hardware transactions with instructions A transactional memory system salvages a hardware transaction. A processor of the transactional memory system executes a salvage indicator instruction, such execution including obtaining a salvage indication information specified by the salvage indicator instruction, and saving the salvage indication information comprising a salvage indication. Based on a pending point of failure being detected, the processor uses the saved salvage indication information to avoid aborting a hardware transaction, wherein absent salvage indication information, the pending point of failure causes a hardware transaction to abort. The processor detects the point of failure, and based on the detecting, determines whether the salvage indication has been recorded. Based on determining that the salvage indication has been recorded, the processor executes an about-to-fail handler, and based on determining that the salvage indication has not been recorded, the processor aborts the transactional execution of the code region.
US09311177B2	Mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor A mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor is disclosed. A method of the disclosure includes receiving, by a processing device, a system management interrupt (SMI) event. The method further includes invoking, in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality.
US09311175B2	Method and system for processing log information An approach for collecting log information for a plurality of services according to a common format for a connector string, each service running at least one instance of a process, parsing the log information in relation to a key map, and storing the parsed information in a database.
US09311174B2	Providing task-based information Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing task-based information are disclosed. In one aspect, a method includes identifying a set of previous interactive sessions for a particular task. For each identified interactive session in the set of previous interactive sessions, a set of implements used during the interactive session are identified based on content of the interactive session. At least one implement in the identified set of implements is classified as a required implement for the particular task. The classification is based, at least in part, on a portion of the previous interactive sessions in which the implement was identified. Classified implements are indexed according to the particular task. Data identifying the indexed implements are provided in response to receipt of a search query referencing the particular task.
US09311173B2	Systems and methods for increasing robustness of a system with a remote server Systems and methods for increasing robustness of a system with a remote server are provided. Some methods can include a first system remotely controlling a second system, detecting a failure in the first system or in a communication link between the first system and the second system, and temporarily removing control of the second system from the first system.
US09311172B2	External electronic device A computer system and its booting and setting method are disclosed. Power supplying and a booting process of the computer system are controlled by a basic input/output system (BIOS). The computer system includes a super input/output chip, a south bridge chipset, and a power supply module. The super input/output chip includes a timer. A counting time is set by the BIOS and the timer counts down when booting the computer system, wherein the counting time is longer than a normal booting time. The south bridge chipset is electrically connected with the super input/output chip and exchanges data between a south bridge chipset and a peripheral device. The power supply module is used for providing power to the computer system. The BIOS controls the timer to stop counting down when the computer system is capable of booting normally.
US09311164B2	System and method for ballooning with assigned devices A system and method for ballooning with assigned devices includes inflating a memory balloon, determining whether a first memory page is locked based on information associated with the first memory page, when the first memory page is locked unlocking the first memory page and removing first memory addresses associated with the first memory page from management by an input/output memory management unit (IOMMU), and reallocating the first memory page. The first memory page is associated with a first assigned device.
US09311161B2	Automatically configured management service payloads for cloud IT services delivery A system, apparatus, method, and computer program product for automatically configuring management service payloads for cloud IT service delivery are disclosed. A container that provides the cloud IT service comprises a container specification that specifies the payloads that are required to implement the at least one service provided by that container and that comprises automation scripts for downloading and configuring those payloads. And that container is implemented by reading the container specification, invoking the automation scripts to download the payloads that are required to implement the at least one service, and invoking the automation scripts to link the downloaded payloads to the one or more containers.
US09311159B2	Systems, methods, and articles of manufacture to provide cloud resource orchestration Systems, methods, and articles of manufacture to provide cloud resource orchestration are disclosed. An example method includes converting, with a processor, a plurality of constraints and a goal for a cloud deployment into a constraint optimization problem, calculating, with the processor, a solution for the constraint optimization problem, and generating instructions to perform cloud resource orchestration for the cloud deployment based on the solution of the constraint optimization problem.
US09311155B2	System and method for auto-tab completion of context sensitive remote managed objects in a traffic director environment Described herein are systems and methods for providing software administration tools, for use in administering server configurations, such as in a traffic director or other type of server environment. In accordance with an embodiment, the system comprises a command-line interface and/or command-line shell which provides an autocompletion feature for remote objects including wherein, in response to an instruction from an administrator to invoke the feature, the system determines configurable remote back-end objects based on the context of the command-line at the time of invocation, and uses the information to one of autocomplete the command-line input or provide a list of remote back-end objects.
US09311153B2	Core affinity bitmask translation Technologies are generally described for systems, methods, and devices related to core affinity bitmask translation. An example system may include first, second, third and fourth cores, and a dispatcher. The dispatcher may be configured to receive a first request where the first request include a core affinity bitmask and instructions. The core affinity bitmask can identify at least the first core and the second core. The dispatcher may be configured to determine a first affinity between the first core and the second core. The dispatcher may then identify the third core and the fourth core as having similar affinity to achieve a substantially similar performance. The dispatcher may also be configured to generate a second request that includes a translated core affinity bitmask. The translated core affinity bitmask may be effective to identify the third core and the fourth core as appropriate cores to execute the instructions.
US09311148B2	Pseudo-random hardware resource allocation through the plurality of resource controller based on non-repeating sequence of index list entries Methods and apparatus for pseudo-random hardware resource allocation through a plurality of hardware elements. In an embodiment, resource list entries are configured to each identify one hardware element of the plurality of hardware elements. Index list entries are configured to each identify one resource list entry. An index list pointer is set to identify a first index list entry of the plurality of index list entries, and hardware resources are requested from a first hardware element of the plurality of hardware elements by identifying, using the index list pointer, the first index list entry; identifying, using the first index list entry, a first resource list entry; selecting the hardware element identified by the first resource list entry as the first hardware element; and sending a request for hardware resources to the first hardware element.
US09311145B2	Using platform idle duration information to notify platform devices of upcoming active periods Methods and systems may provide for determining a next active window for a platform and notifying one or more of a plurality of devices of the platform of the next active window being determined. Additionally, one or more of the plurality of devices may be notified of an onset of the next active window. In one example, a pre-warm message is issued to notify one or more of the plurality of devices of the next active window being determined.
US09311140B2	Method and apparatus for extending local area networks between clouds and migrating virtual machines using static network addresses The current document discloses methods and systems for extending an internal network within a first cloud-computing facility to a second cloud-computing facility and deploying a virtual machine or virtual application previously running on a first cloud-computing facility within the context of the extended internal network in the second cloud-computing facility. The currently disclosed methods and systems which provide internal-network extension and redeployment of virtual machines and virtual applications, referred to as “stretch deploy,” allow a virtual machine or virtual application formerly executing on a first cloud-computing facility to resume execution on a second cloud-computing facility, using the computational and storage facilities of the second cloud-computing facility but depending on network support from the first cloud-computing facility, without changing IP and local network addresses and the network connectivity, based on those addresses, between the virtual machines and virtual applications and other local and remote computational entities with which the virtual machines and virtual applications communicate.
US09311133B1	Touchless multi-domain VLAN based orchestration in a network environment An example method for touchless multi-domain VLAN based orchestration in a network environment is provided and includes receiving mobility domain information for a virtual machine associated with a processor executing the method in a network environment, the mobility domain information comprising a mobility domain identifier (ID) indicating a scope within which the virtual machine can be moved between servers, generating a virtual station interface (VSI) discovery protocol (VDP) message in a type-length-value (TLV) format with the mobility domain information, and transmitting the VDP message to a leaf switch directly attached to the server, wherein the leaf switch provisions a port according to the mobility domain information.
US09311130B2	Dynamically deployed virtual machine A virtual machine data handling system includes a data handling system, a hypervisor, and a dynamically deployed virtual machine. The data handling system includes a plurality of physical computing resources (e.g., a processor and a memory). The hypervisor is implemented by the processor and the memory and deploys virtual machines from a master image. The dynamically deployed virtual machine is initially deployed by the hypervisor as a Linked Clone of the master image. The dynamically deployed virtual machine is subsequently dynamically deployed by the hypervisor copying a plurality of virtual memory segments from the master image until the dynamically deployed virtual machine is an independent Full Clone of the master image. The hypervisor may copy the plurality of virtual memory segments from the master image if at least one of the physical resources is operating below a utilization threshold.
US09311127B2	Managing configuration and system operations of a shared virtualized input/output adapter as virtual peripheral component interconnect root to single function hierarchies A computer implemented method of managing an adapter includes enabling an adapter to be shared by operating systems and logical partitions. The adapter includes a plurality of multiple virtual functions. A virtualization intermediary may assign a virtual function of the plurality of virtual functions to at least one of an operating system and a logical partition. The virtual function may be used to modify an operational status of the adapter.
US09311126B2	System and method for virtual partition monitoring A method is provided in one example embodiment that includes rebasing a module in a virtual partition to load at a fixed address and storing a hash of a page of memory associated with the fixed address. An external handler may receive a notification associated with an event affecting the page. An internal agent within the virtual partition can execute a task and return results based on the task to the external handler, and a policy action may be taken based on the results returned by the internal agent. In some embodiments, a code portion and a data portion of the page can be identified and only a hash of the code portion is stored.
US09311120B2	Method and system for virtual machine networking Aspects of a method and system for networking are provided. In this regard, one or more circuits and/or processors in a network adapter of a first network device may determine whether to communicate traffic between virtual machines running on the first network device via a path that resides solely within the first network device, or via a path that comprises a second network device that is external to the first network device. The determination may be based, at least in part, on characteristics of the traffic. The determination may be based, at least in part, on capabilities and/or available resources of the network adapter. The determination may be based, at least in part, on management information exchanged between the one or more circuits and/or processors and one or more of: software running on the first network device, the second network device, and a third network device.
US09311117B2	System and method of capacity management Systems and methods are disclosed herein to a method for providing a system name of a computer system, comprises generating a system ID key based on a system type of the computer system using an external key generator module; installing the system ID key on the computer system in an active operating state by extracting the system name from the system ID key; updating operating system structures for immediate use of the system name; writing a machine name index into halt/load parameters that are implemented by the computer system for subsequent restarts of the computer system after suspending the computer system, wherein the machine name index identifies a location of the system name in a system registry; and writing the system name into the system registry from the system ID key.
US09311116B1	Systems and methods for handshaking with a memory module A memory module is operatively coupled to a memory controller of a host computer system and configured to operate in at least two modes including an operational mode in which the memory module performs memory operations in response to memory commands from the memory controller in accordance with an industry standard. The memory module comprises a controller circuit configured to cause the memory module to enter an initialization mode during which the memory module executes at least one initialization sequence, the initialization mode being one of the at least two modes. The memory module further comprises at least one output having a defined function in the operational mode according to the industry standard but is undefined by the industry standard in the initialization mode. During the initialization mode, the memory module is configured to output a notification signal indicating a status of the initialization mode to the memory controller via the at least one output. The memory controller is configured to execute an interrupt routine in response to the notification signal.
US09311112B2	Event recognition An electronic device executes one or more software elements. Each software element is associated with a particular view, which includes one or more event recognizers. Each event recognizer has one or more event definitions based on one or more sub-events, and an event handler. The event handler is configured to send an action to a target in response to the event recognizer detecting an event corresponding to a particular event definition. The electronic device detects a sequence of sub-events, and identifies actively involved views. The electronic device delivers a respective sub-event to event recognizers for actively involved views. At least one event recognizer for actively involved views has a plurality of event definitions, one of which is selected in accordance with an internal state of the electronic device. The at least one event recognizer processes the respective sub-event in accordance with the selected event definition.
US09311111B2	Programming environment with support for handle and non-handle user-created classes A language processing environment provides facilities for defining and using handle classes. A handle class is a class that always and only exists as a handle to stored data, yet that data is accessed in the same manner as with non-handle classes. The language processing environment provides syntax such that all values in the language are members of some class and all classes are defined using the same syntax. Methods and properties are supported on both handle and non-handle classes.
US09311105B2	Communicating operating system booting information Disclosed embodiments relate to communicating operating system booting information. A machine-readable storage medium may include instructions for reading data related to booting of an operating system of an electronic device from a non-volatile storage, instructions for writing the read data to a volatile storage prior to the booting of an operating system on the electronic device, and instructions for communicating the data written to the volatile storage to the electronic device via a serial communication interface. The machine-readable storage medium may further include instructions for receiving data, from the electronic device via the serial communication interface, related to the booting of the operating system of the electronic device and instructions for writing the received data to the non-volatile storage.
US09311104B1	Managing an operating system to set up a computer association tool Certain aspects of the present disclosure relates to processing managing an operating system to set up a computer association tool. The technique includes processing an Operating System Deployment (OSD) functionality of a Microsoft System Center Configuration Manager (SCCM) to configure a server, wherein the OSD causes the server to a Pre-boot Execution Environment (PXE Boot). The SCCM may be launched for the PXE boot process to be associated with the server and configuring the SCCM to associate with a specific OSD Task Sequence. Boot from a Network Interface Card (NIC) that has an associated MAC address, using the PXE, wherein the PXE boot process then hands the operation over to the designated OSD Task Sequencer (TS) which handles the configuration process according to at least one variable.
US09311094B2	Predicting a pattern in addresses for a memory-accessing instruction when processing vector instructions The described embodiments provide a processor that executes a vector instruction. In the described embodiments, while executing instructions, the processor encounters a vector memory-accessing instruction that performs a memory operation for a set of elements in the memory-accessing instruction. In these embodiments, if an optional predicate vector is received, for each element in the memory-accessing instruction for which a corresponding element of the predicate vector is active, otherwise, for each element in the memory-accessing instruction, upon determining that addresses in the elements are likely to be arranged in a predetermined pattern, the processor predicts that the addresses in the elements are arranged in the predetermined pattern. The processor then performs a fast version of the memory operation corresponding to the predetermined pattern.
US09311088B2	Apparatus and method for mapping architectural registers to physical registers An apparatus and method are provided for performing register renaming. Available register identifying circuitry is provided to identify which physical registers form a pool of physical registers available to be mapped by register renaming circuitry to an architectural register specified by an instruction to be executed. Configuration data whose value is modified during operation of the processing circuitry is stored such that, when the configuration data has a first value, the configuration data identifies at least one architectural register of the architectural register set which does not require mapping to a physical register by the register renaming circuitry. The register identifying circuitry is arranged to reference the modified data value, such that when the configuration data has the first value, the number of physical registers in the pool is increased due to the reduction in the number of architectural registers which require mapping to physical registers.
US09311084B2	RDA checkpoint optimization A system and method for efficiently performing microarchitectural checkpointing. A register rename unit within a processor determines whether a physical register number qualifies to have duplicate mappings. Information for maintenance of the duplicate mappings is stored in a register duplicate array (RDA). To reduce the penalty for misspeculation or exception recovery, control logic in the processor supports multiple checkpoints. The RDA is one of multiple data structures to have checkpoint copies of state. The RDA utilizes a content addressable memory (CAM) to store physical register numbers. The duplicate counts for both the current state and the checkpoint copies for a given physical register number are updated when instructions utilizing the given physical register number are retired. To reduce on-die real estate and power consumption, a single CAM entry is stores the physical register number and the other fields are stored in separate storage elements.
US09311083B1	Machine interface configuration system for coerced inconsistencies on different machine platforms A method of operating a machine includes receiving via a network machine interface a schema defining a hierarchy of page objects for application logic on a plurality of different machine platforms. The schema is applied to operate shell logic specific to a particular machine platform including the network machine interface via which the schema was received to provide a look and feel for application logic native to the particular machine platform. Layout logic and navigation logic of the shell logic are operated cooperatively to cause the look and feel of the application logic native to the particular machine platform as defined by the hierarchy of page objects to be inconsistent on the plurality of different machine platforms.
US09311082B2	System and method for processing graph objects A system and method for generating object graph data and transmitting the object graph over a network. For example, a computer-implemented method according to one embodiment comprises: analyzing relationships between objects within a network of objects to determine an object network structure; generating object graph data representing the object network structure; serializing the object graph data and transmitting the object graph data over a network to a requesting computer; and interpreting the object graph data to render a view of the object network structure in a graphical user interface.
US09311081B2	Generating and employing operational abstractions of transforms Methods and arrangements for employing a software model transform. A software model transform is accepted, and the transform is manipulated to obtain a transform representation. At least one functional path is explored with respect to the transform representation. A trace is conducted of at least one explored path, and an abstraction of the transform is produced via utilizing the trace, the abstraction comprising a simplified semantic view of the transform.

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