Document Document Title
US09219693B2 Network devices with time aware medium access controller
A network device includes a memory, a MAC module, a host control module, and a selector module. The memory stores frames and timestamps corresponding to the frames. The MAC module receives the frames and the timestamps and forwards the frames to a physical layer device. The MAC module includes queues that store the frames received from the memory, and shaping modules that receive the frames from the queues and spread data in the frames over time to generate blocking signals. The host control module transfers ownership of the frames to the MAC module. The host control module or the MAC module masks the transfer of the ownership of first frames including gating the first frames based on the timestamps to delay reception of the first frames in the queues. The selector module selects one of the blocking signals, and forwards the selected blocking signal to the physical layer device.
US09219691B2 Source-driven switch probing with feedback request
Embodiments relate to proactively probing the packet queues of elements in a physical or virtual network to predict and prevent the occurrence of congestion points. An aspect includes receiving a first feedback request at a central controller connected to a plurality of switches in a network. The first feedback request includes a request to periodically probe a status of queues of switches in the network. A second feedback request is then transmitted to one or all the switches in a path leading to a designated destination. Responses to the second feedback request are received at the central controller from a designated proxy switch, which aggregated the responses into a single data packet. Accordingly, the responses extracted from the single data packet at the central controller are used to preventing future congestion points.
US09219686B2 Network load balancing and overload control
Load balancing and overload control techniques are disclosed for use in a SIP-based network or other type of network comprising a plurality of servers. In a load balancing technique, a first server receives feedback information from at least first and second downstream servers associated with respective first and second paths between the first server and a target server, the feedback information comprising congestion measures for the respective downstream servers. The first server dynamically adjusts a message routing process based on the received feedback information to compensate for imbalance among the congestion measures of the downstream servers. In an overload control technique, the first server utilizes feedback information received from at least one downstream server to generate a blocking message for delivery to a user agent.
US09219684B2 Methods and systems for packet delivery based upon embedded instructions
New communication system with packet's retransmission elements that do not use and do not depend on any routing protocol provides definite mechanisms to deliver packets from sender to receiver. Packet's retransmission elements are no longer in charge for calculating and maintaining routing tables in order to make decision regarding packet forwarding from ingress port to egress port. Each packet besides data contains set of instructions that presents complete path description from sender to receiver and rules of packet's processing on its way depending on various network metrics. The set of instructions is devised to be executed or interpreted by each network element that packet passing through. The outcome of instructions execution provides decision regarding packet forwarding and transformation. In order to provide information for path calculation and rules of packet processing there are centralized services—Network map, Pathfinder, Name registrar and Network policy.
US09219682B2 Mintree-based routing in highly constrained networks
In one embodiment, a capable node in a computer network may host a path computation element, receive one or more neighborhood discovery messages including neighborhood information from a plurality of nodes in the computer network, and compute a minimum spanning tree (MinTree) for the computer network based on the neighborhood information. The MinTree may divide the plurality of nodes in the computer network into a first subset of routing nodes and a second subset of host nodes. The first subset of routing nodes may form one or more interconnected paths of routing nodes within the MinTree, and each host node within the second subset of host nodes may be located within one hop of at least one routing node. The capable node may then communicate a MinTree message to the plurality of nodes in the computer network to build the MinTree by enabling routing on each routing node.
US09219678B2 Method, system, and computer program product for sending and receiving messages
A system and method for enabling the interchange of enterprise data through an open platform is disclosed. This open platform can be based on a standardized interface that enables parties to easily connect to and use the network. Services operating as senders, recipients, and in-transit parties can therefore leverage a framework that overlays a public network.
US09219675B2 Communication device, communication system, and computer program product
A communication device connected to a plurality of communication target devices, includes an address storage unit storing addresses of the communication target devices; a destination changing unit changing a destination address included in an outgoing message to any one of the addresses stored in the address storage unit, the outgoing message being generated using target software to be evaluated; a transmitting unit transmitting the outgoing message for which the destination address has been changed to the communication target device with the changed destination address; a receiving unit receiving, from the communication target device, a reply message in response to the outgoing message; a source changing unit changing a source address included in the reply message to the destination address that is obtained before being changed by the destination changing unit; and an output unit outputting, to the software, the reply message for which the source address has been changed.
US09219673B2 Crisscross cancellation protocol
Technologies, systems, and methods for ordered message delivery that avoid message races or crisscrosses between communicating nodes. For example, if Node A sends message 3 towards Node B and, shortly thereafter, Node B sends message X to Node A, Node A would like to know whether or not message X reflects Node B's state after receiving message 3. If Node B received message 3 prior to sending message X, then proper state may be maintained between the nodes. But if messages 3 and X crisscrossed, or if message 3 was never properly received by Node B, then the state between the nodes may be corrupt. Technologies, systems, and methods are provided to avoid such corruption.
US09219670B2 Link-aware throughput acceleration profiles
An arrangement is provided for exposing TCP/IP profiles to a client application operating in a mobile computing environment where each profile comprises a set of TCP/IP configuration parameters that are mapped to a specific network type. An application programming interface (“API”) enables the client application to propagate configuration parameters in a selected TCP/IP profile to a TCP/IP layer in a communication protocol stack that resides on a mobile device. The TCP/IP configuration parameters are applied to data communications with a remote terminal over a network that is comprised of several links and which typically includes a wireless link.
US09219658B2 Quality of service optimization management tool
A device may receive traffic information associated with traffic flows assigned to a group of quality of service (QoS) treatment levels and travelling via a network device. The device may identify a group of target performance metrics corresponding to the group of QoS treatment levels. The device may determine a group of weight factors based on the traffic information and the group of target performance metrics. The group of weight factors may be determined such that a group of predicted performance metrics is optimized with respect to the group of target performance metrics. The device may output information identifying the group of weight factors to cause a parameter, associated with the network device, to be updated based on the group of weight factors. The parameter may relate to a manner in which the traffic flows are processed by the network device.
US09219656B2 Remote managing system and method
Provided are approaches for remote managing comprising at least one or more agents being resident in at least one or more management terminals connected to each other through a network and controlling the corresponding management terminals; and a management server transmitting to the agents a request for a service for managing the management terminals, where the management server transmits the request to the agent through a control channel. An independent control channel is formed between a management server and a management device separately from an ordinary communication channel and, in case the management device is required to perform a server role for a particular service, makes the corresponding management device require a request related to the service through a control channel and thus, the server role is assigned to the management server at the time of carrying out a service.
US09219653B2 Resource management with conditioned policies
A resource management solution based on management policies is provided, where each management policy comprises an indication of a management activity and at least one of the management policies comprising an indication of an application condition. A corresponding method comprises deploying a set of operative management policies assigned to each one of a set of target computing machines onto the target computing machine to cause the target computing machine to verify the application condition of each assigned operative management policy according to status information available on the target computing machine.
US09219652B2 Service configuration assurance
Systems, methods, and other embodiments associated with service configuration assurance are described. One example method includes comparing an expected device configuration model with an actual device configuration model for the network device and communicating service identifiers in the expected device configuration for which there is no corresponding service configuration item in the actual device configuration model to a user. The example method may also include generating a service-impact event notification when a likely service-impacting configuration change is detected.
US09219647B2 Modular device and data management system and gateway for a communications network
A gateway provides duplex-directional, multimedia ad hoc mesh networking, peer-to-peer direct communications, power optimization, dynamic configuration, and data management, while operating within various devices and network topologies. A multitasking virtual machine monitor for mobile networked devices, that is capable of functional expandability and portability to various operating environments, interoperability with a variety of operating systems, the Gateway Control System (GCS) performs functional capabilities in both a local and a networked topology using local and remote hardware and software. Software within the GCS is partitioned into sequentially, autonomous code, referred to herein as “modules,” each module being configured to communicate with hardware and other gateway modules. Collectively, all gateway modules are referred to herein as the gateway stack (GS). Each member of the GS can be turned on or off, downloaded from a remote site, and dynamically configured.
US09219642B2 Method, apparatus and system for processing device faults
The present invention relates to the communication field and discloses a method, an apparatus, and a system for processing device faults, which are used to recover the device fault in a timely manner and improve user's service experience. The processing method includes: receiving a connection deletion request message sent by a network device in the case of a fault, where the connection deletion request message includes a global packet data network connection identifier FQ-CSID; locally deleting a packet data network PDN connection related to the FQ-CSID, or retaining a PDN connection related to the FQ-CSID and receiving downlink data corresponding to the PDN connection; and performing a network-triggered service recovery procedure. The solutions provided in the present invention are applicable to device fault recovery scenarios.
US09219641B2 Performing failover in a redundancy group
A method, system, and computer program product for performing failover in a redundancy group, where the redundancy group comprises a plurality of routers including an active router and a standby router, the failover being characterized by zero black hole or significantly reduced black hole conditions versus a conventional failover system. The method comprises the steps of: receiving an incoming message at a switch; sending a request of identification to the plurality of routers to identify a current active router, where the current active router represents a virtual router of the redundancy group; and in response to receiving a reply containing an identification from the current active router within a predetermined time, forwarding the incoming message to the current active router.
US09219635B2 Server apparatus and privilege receiving opportunity notification method
A server apparatus includes a memory that stores location information that identifies a second website from which a privilege is granted when the second website is used after having been accessed through a first website; and a processor coupled to the memory. The processor executes first determining whether the location information acquired includes information that is identical to location information that identifies the first website. The processor executes second determining, when it is determined that the information identical to the location information of the first website is not included therein, whether location information of the second website is stored in the memory, the location information being identical to the location information acquired. The processor executes when the identical location information is stored in the memory, generating appeal information with which to appeal for accessing the second website through the first website, and notifying the user of the appeal information.
US09219631B2 System and method for increasing spot beam satellite bandwidth
A device and method for demodulation of multiple received signals is provided. The device can have a receiver configured to receive a composite signal having two or more constituent signals overlapped in frequency. The device can have one or more processors configured to determine a at least one modulation type and at least one symbol rate corresponding to the two or more constituent signals. The one or more processors can further resample the composite signal at a sampling rate that is a multiple of the at least one symbol rate to determine the characteristics of the two or more constituent signals. The one or more processors can separate and output the two or more constituent signals using the determined characteristics.
US09219630B2 Apparatus and method for sending and receiving broadcast signals
An apparatus for transmitting a broadcast signal includes an input formatting module configured to de-multiplex an input stream into at least one Data Pipe (DP); a BICM module configured to perform error correction processing on data of the at least one DP; a signal frame building module configured to map the data of the DP to symbols within a signal frame; and an OFDM generation module configured to generate a transmission broadcast signal by inserting a preamble into the signal frame and performing OFDM modulation. The OFDM generation module includes a pilot signal insertion module configured to insert a pilot signal including Continual Pilots (CP) and Scattered Pilots (SP) into the transmission broadcast signal, and the CPs are inserted into every symbol of the signal frame, and location and number of the CPs are determined based on a Fast Fourier Transform (FFT) size.
US09219629B1 Adaptive low complexity channel estimation for mobile OFDM systems
Adaptive low complexity minimum mean square error (MMSE) channel estimator for OFDM systems operating over mobile channel. Complexity of the estimator is reduced by partitioning sub-carriers into windows where, window size is optimized by considering channel model mismatch error (MME). Three types of adaptive windowed MMSE (W-MMSE) estimators include: A first type, a simplified delay profile applied as channel reference model, and optimum window size adaptive to the estimated signal-to-noise ratio. A second type, a group of candidate channel reference models are considered. The receiver roughly estimates and selects current reference model from candidate group, then adapts optimum window size based on the estimated SNR and selected channel model. A third type, the current channel statistics are finely estimated and window size is iteratively optimized at receiver. The first two adaptive W-MMSE estimators are tolerant to channel model mismatch error and the third captures channel variations to realize real-time estimation.
US09219627B2 Circuit and method for transmitting or receiving signal
A circuit, including a receiving path, for converting a first analog radio frequency (RF) input signal to a digital intermediate frequency (IF) input signal, wherein the first analog RF input signal includes a first signal component conforming to a first wireless transmission standard and a second signal component conforming to a second wireless transmission standard; a first digital down converter, for receiving and processing the digital IF input signal to generate a first digital baseband signal corresponding to the first signal component; a second digital down converter, for receiving and processing the digital IF input signal in order to generate a second digital baseband signal corresponding to the second signal component; a first baseband processing module, for processing the first digital baseband signal according to the first wireless transmission standard; and a second baseband processing module, for processing the second digital baseband signal according to the second wireless transmission standard.
US09219623B2 Adaptive delay base loss equalization
A method, system and apparatus to self-determine equalization parameters for a channel. An initiator sends an equalization insensitive signal (EIS) to a responder on channel to be equalized and begins a count. A responder responds with an EIS. When the initiator receives the response EIS the count is terminated. The count, which constitutes a measure of delay in the channel, may be used to determine desirable equalization parameters for the channel.
US09219620B2 Enhanced unified messaging system with a quick view facility
This invention provides an enhancement to messaging systems by providing a message notification feature which allows a user to manage only new messages for which a notification has not yet been cleared without having to access or download the entire set of messages. This management may be performed in single window that operates in conjunction with an application associated with the messaging system. The notification management permits manipulation of the message notifications without influencing the status of the messages themselves, while providing access to the data contained in these messages. This addresses the needs of those users who frequently check their incoming communications queues and need to determine very quickly which items need urgent attention and which ones can be deferred. The present invention further provides specific functionalities for handling a particular message when it does need urgent attention.
US09219619B2 Selecting viewports in a messaging application with multiple viewports for presenting messages in different orders
In a method for displaying messages, a system displays messages from a single user account in multiple viewports. Each viewport orders messages based on an importance score that is calculated based on the user's prior interactions with messages in his user account through that viewport. Each viewport associated with the user account orders messages using a distinct message importance model.
US09219615B2 Remote information communication system and linking method thereof
A remote information communication system comprises an administration server, at least one linking server and at least one remote device. The linking method of the remote information communication system comprises steps of: the administration server authenticating the remote device and linking server; the proximal device requesting the administration server to find out a specified remote device; the administration server responding an address of the linking server for establishing a link with the specified remote device; the proximal device linking with the linking server through the address responded from the administration server to find out the specified remote device via the linking server; and the linking server establishing a link between the proximal device and the specified remote device.
US09219611B1 Systems and methods for automating cloud-based code-signing services
A computer-implemented method for automating cloud-based code-signing services may include identifying, at a cloud-based code-signing service, an automatically generated request from a signing automation agent on a remote client to sign at least one file. The method may further include verifying a security credential that authorizes the remote client to access the cloud-based code-signing service. The method may also include receiving, at the cloud-based code-signing service, the file from the signing automation agent. The method may additionally include signing, by the cloud-based code-signing service, the file. The method may further include sending the signed file from the cloud-based code-signing service to the remote client. Various other methods, systems, and computer-readable media are disclosed.
US09219607B2 Provisioning sensitive data into third party
A method for providing identity data to network-enabled devices includes receiving a request for identity data from a network-enabled device that is deployed to an end-user. The network-enabled device is pre-provisioned with a PIN, a global key pair, a user-accessible first device identifier, and a second device identifier usable by a service provider delivering a service to the device. The identity data request includes the first and second identifiers, a protected rendition of the PIN, and an encryption key or other data from which an encryption key is derivable. The identifiers, the protected rendition of the PIN, and the encryption key or the other data are signed by a private key in the global key pair. The validity of the PIN included in the request is verified to authenticate the device. If the PIN is valid, identity data for the device is generated, encrypted and sent to the network-enabled device.
US09219606B2 Method and device for digital data blocks encryption and decryption
Method and System for encrypting plaintext digital data divided into a sequence comprising successive plaintext blocks of a same length of bits each and a residual plaintext block having a length of bits lower than the length of one of the successive plaintext blocks. The successive plaintext blocks are ciphered with the main encryption key by using a ciphering algorithm based on a cipher block chaining mode to obtain a sequence of successive ciphered blocks having the same length as the successive plaintext blocks. A set of round keys having a same length, are generated by applying a key schedule function on a string obtained by adding the last ciphered block to the main encryption key. The round keys of the set are added together to obtain a resulting string having a length equal to the length of a block of the sequence. The residual plaintext block is then added to the most left bits of the resulting string forming a string) having a length equal to the length of the residual block to obtain a residual ciphered block. The method and the system apply also to decipher a sequence of successive ciphered blocks followed by a residual ciphered block.
US09219604B2 Generating an encrypted message for storage
A method begins by a dispersed storage (DS) processing module generating a shared secret key from a public key of another entity and a private key using a first modulo prime polynomial function, wherein a public key is generated from the private key using a second modulo prime polynomial function and wherein the public key of the other entity is derived using the second modulo prime polynomial function on a private key of the other entity. The method continues with the DS module encrypting a message using the shared secret key to produce an encrypted message. The method continues with the DS module outputting the encrypted message to the other entity.
US09219602B2 Method and system for securely computing a base point in direct anonymous attestation
A method and system computes a basepoint for use in a signing operation of a direct anonymous attestation scheme. The method and system includes computing a basepoint at a host computing device and verifying the base point at a trusted platform module (TPM) device.
US09219599B2 Clock and data recovery circuit
A clock and data recovery (CDR) circuit employing zero-crossing linearizing (ZCL) technique. The circuit including a voltage controlled oscillator (VCO), an inject-locked divider (ILD), a variable delay unit, a linearized loop, a bang-bang loop, and a loop filter (LP). The differential clock generated by VCO passes through ILD for frequency dividing and variable delay unit to generate 8-phase clocks. Then using these clocks, the PDs over-sample the input data, followed by synchronization and logic operation to control the CPs output current pulses. These currents filtered by LP control the VCO to finish the loop. The circuit recovers 4 channel data and corresponding clocks of the input with low power broken-down and preferable jitter performance and locking property.
US09219598B2 Circuit arrangement and method for transmitting signals
On the basis of single-ended signals based on logic levels, and of differential, in particular common-mode-based, signals, a circuit arrangement and a corresponding method are proposed, in which a serialized signal transmission is always performed in an error-free and stable manner.
US09219593B2 Device-to-device data transmission method in wireless access system supporting device-to-device communication, and apparatus therefor
Disclosed are a device-to-device (D2D) data transmission method in a wireless access system supporting D2D communication and an apparatus therefor. According to one embodiment of the present invention, a D2D data transmission method in a wireless access system which supports D2D communication and cellular communication can comprise: a step in which a first device, which performs D2D communication with a second device, transmits first data to the second device only through a physical channel using an uplink of the cellular communication; and a step in which the first device receives second data from the second device through the physical channel.
US09219592B1 Growth metric predicted loading on wireless access nodes
Systems, methods, and software for operating a wireless communication system to predict loading on a wireless access node are provided herein. In one example, a method includes allocating past wireless communication usage in a geographic area served by the wireless access node among different wireless communication device types, identifying a growth metric for each of the wireless communication device types based on past device sales in a geographic region larger than the geographic area, and applying the growth metric for each of the wireless communication device types to the past communication usage allocated to each of the wireless communication device types to predict future communication usage for each of the wireless communication device types at the wireless access node. The method also includes aggregating the predicted future communication usage loading for each of the wireless communication device types to predict the future loading on the wireless access node.
US09219591B2 Method and apparatus for providing acknowledgement bundling
An approach is provided for acknowledgement bundling. Dynamically scheduling of one or more of subframes per bundling window is performed by reusing an assignment index field (e.g., downlink assignment index (DAI) field). The assignment index field has a value greater than or equal to number of previously assigned subframes within the bundling window. The bundling window defines a group of subframes for common acknowledgement.
US09219589B2 Uplink transmission method and apparatus in carrier aggregation system
The invention discloses an uplink transmission method and apparatus in a carrier aggregation system and relates to the field of radio communications so as to address the issue of how to perform uplink transmission in a secondary cell when a base station configures a user equipment additionally with the secondary cell. In the invention, a user equipment selects, under a preset reference carrier selection rule, one of downlink carriers corresponding to cells having already established downlink synchronization with a base station as a timing reference downlink carrier used by a secondary cell after the base station configures the user equipment additionally with the secondary cell; and the user equipment performs uplink transmission in the secondary cell according to downlink timing of the timing reference downlink carrier. With the invention, a timing reference downlink carrier used by an additionally configured secondary cell in uplink transmission can be determined and uplink transmission can be further preformed over the timing reference downlink carrier.
US09219584B2 Method, system and apparatus for transmitting data in carrier aggregation manner
A method, a system and an apparatus can be used for transmitting data in a CA manner. A first base station currently serving a user equipment (UE), creates EPS bearers under different component carriers CC Groups for the UE. The UE sets different access stratum entities corresponding to the CC Groups to process data in the process of creating the EPS bearers. The UE determines, when transmitting or receiving data, a corresponding CC Group according to an EPS bearer that bears the data. An access stratum entity corresponding to the CC Group processes the data that needs to be transmitted or received, a site is a first base station currently serving the UE or a second base station currently serving the UE.
US09219580B2 Method and apparatus for allocating resources and processing confirmation information
A method and an apparatus for allocating ACKnowledgement (ACK)/Non-ACKnowledgement (NACK) channel resources and processing confirmation information are disclosed. The method includes: The network side determines one physical channel area among multiple physical channel areas to be used by an ACK/NACK channel, and notifies the determined physical channel area to a User Equipment (UE) so as to enable the UE to determine a channel for receiving or sending ACK/NACK information in the determined physical channel area according to a mapping rule. Moreover, the network side may send or receive ACK/NACK information on the physical channel area that includes the ACK/NACK channel. The method and apparatus improve the utilization ratio and flexibility of the ACK/NACK channel, and reduce the probability of conflict generated by the ACK/NACK channel.
US09219578B2 Device, system and method of communicating aggregate data units
Some demonstrative embodiments include devices, systems and/or methods of communicating aggregate data units. For example, a device may include a wireless communication unit to communicate an aggregate data unit including a plurality of data units in an increasing order of sequence numbers assigned to the data units, such that a first data unit having a first sequence number always precedes a second data unit having a second sequence number, greater than the first sequence number.
US09219572B2 OFDMA with adaptive subcarrier-cluster configuration and selective loading
A method and apparatus for allocating subcarriers in an orthogonal frequency division multiple access (OFDMA) system is described. In one embodiment, the method comprises allocating at least one diversity cluster of subcarriers to a first subscriber and allocating at least one coherence cluster to a second subscriber.
US09219571B2 Aperiodic CQI reporting in a wireless communication network
According to certain aspects, techniques for aperiodically reporting channel state information (CSI) on protected and unprotected resources are provided. The protected resources may include resources in which transmissions in a first cell are protected by restricting transmissions in a second cell. According to certain aspects, a request for channel quality indicator (CQI) may be sent in a first subframe, CQI may be measured for a second subframe having a first offset from the first subframe, and a corresponding CQI report sent in a third subframe having a second offset from the first subframe.
US09219568B2 Systems and methods for interaction with thermal detectors
A system for interacting with a thermal detector includes at least one unmanned aerial vehicle and a sensor mounted to the at least one unmanned aerial vehicle. The sensor is configured to determine the presence of a component of the thermal detector and to generate a signal indicative of the presence of the component. The system also includes a beam emitter mounted to the at least one unmanned vehicle and in communication with the sensor. The beam emitter includes a beam source configured to direct a beam of thermal radiation to the thermal detector in response to the signal from the sensor.
US09219565B2 Optical transmission apparatus and dummy light inserting method
An optical transmission apparatus includes a wavelength multiplexing unit that performs wavelength multiplexing with respect to dummy light for each channel of WDM and dummy light for each sub-band including the channels in plural; and a selecting unit that measures for each sub-band and corresponding to intensity of the channel-specific dummy light, transmission characteristics at a reception end, and according to measurement results, selects for each of the sub-bands, any one among the channel-specific dummy light and the sub-band-specific dummy light. The wavelength multiplexing unit wavelength multiplexes any of the channel-specific dummy light selected for each of the sub-bands by the selecting unit.
US09219564B2 Wireless terminal apparatus and wireless base station apparatus
Both a wireless terminal apparatus and wireless base station apparatus are provided that can, in an operation of encoding the control signals of the upstream link transmitted from the multiple terminal stations while encoding with regard to each of the terminal stations, increase a number of the terminal stations to which different codes are respectively assigned. A wireless terminal apparatus includes: an encoding information receiving portion receiving encoding information which is used at the wireless terminal apparatus from the base station; a phase-shifting unit which conducts a phase-shifting operation on a predetermined first code based on the encoding information; a code selection unit which, based on the received encoding information, selects a second code from multiple codes orthogonally crossing each other; and a control signal encoding portion which conducts an encoding operation on the control signal that is going to be transmitted to the base station by using both the first code on which the phase-shifting operation has been conducted and the second code.
US09219563B2 Method and system for addressing interference between co-existing radios of differing radio access technologies
Methods and systems for addressing interference between co-existing radios of differing radio access technologies (RATs) are provided. One RAT radio send an indication to a second RAT radio when it is transmitting, but does so after determining there is an actual likelihood that the first RAT transmission will interfere with reception by the second RAT radio. Optionally, the second RAT radio makes its own determination of whether there is a likelihood of interference, and ignores the indication if it is determined interference is not likely. Alternatively, the second RAT radio sends an indication to the first RAT radio when it is receiving, only after determining there is a likelihood that first RAT transmissions will interfere with reception by the second RAT radio.
US09219561B2 Method and apparatus for multiplexing and demultiplexing multi-channel signals and system for transmitting multi-channel signals
A method for multiplexing multi-channel signals includes: acquiring sample signals of K channels of signals by using a first signal, in which K is a natural number greater than or equal to 2, the first signal has a first frequency F1 and the highest frequency of the K channels of signals is a third frequency F3, the first frequency F1 is S times as high as the third frequency F3, and S is the times of sampling by using the first signal in each period; generating a data string containing the sample signals in a preset format; and sending the data string by using a second signal, in which the second signal has a second frequency F2, the second frequency F2 divided by the first frequency F1 is greater than or equal to K, that is, F2/F1≧K. Therefore, the real-time performance of signal processing is enhanced.
US09219557B2 Circuits, systems and methods for constructing a composite signal
Circuits, systems, and methods for assembling a composite signal include a frequency translation circuit coupled to receive an input signal and operable to generate a plurality of frequency-translated versions of the input signal at a respective plurality of different frequencies, the plurality of frequency-translated input signals defining a group of frequency translated signals. The plurality of frequency translated signals may each be processed to provide a composite signal.
US09219549B2 WDM Mux/DeMux employing filters shaped for maximum use thereof
Filters shaped differently from those commonly used in WDM Mux/DeMux optical devices are described. Different from the prior art devices that commonly use filters shaped in cuboid, the filters in the embodiment of the present invention are shaped in parallelepiped. In other words, a cross section of such filter is not in parallelogram. According to one embodiment of the present invention, a filter is so cut that a cross section thereof presents a cutting angle not being 90 degrees. As a result, the filter is fully used in WDM Mux/DeMux optical devices. Such filters are advantageously used in compact optical modules.
US09219546B2 Extremely high frequency (EHF) distributed antenna systems, and related components and methods
Extremely High Frequency (EHF) distributed antenna systems and related components and methods are disclosed. In one embodiment, a base unit for distributing EHF modulated data signals to a RAU(s) is provided. The base unit includes a downlink data source input configured to receive downlink electrical data signal(s) from a data source. The base unit also includes an E-O converter configured to convert downlink electrical data signal(s) into downlink optical data signal(s). The base unit also includes an oscillator configured to generate an electrical carrier signal at a center frequency in the EHF band. The base unit also includes a modulator configured to combine the downlink optical data signal(s) with the electrical carrier signal to form downlink modulated optical signal(s) comprising a downlink optical data signal(s) modulated at the center frequency of the electrical carrier signal. The modulator is further configured to send the downlink modulated optical signal to the RAU(s).
US09219544B2 LED based identification and communication systems
In one aspect, identification and communication systems are described herein. In some embodiments, an identification and communication system comprises one or more query units and one or more response units, wherein at least one query unit comprises a query beam source comprising a light emitting diode (LED) operable to emit a query beam. In some embodiments, the query beam is substantially collimated. In some embodiments, an identification and communication system comprises one or more query units and one or more response units, wherein at least one query unit comprises a first query beam source operable to emit a first component beam and a second query beam source operable to emit a second component beam. In some embodiments, the first query beam source comprises an LED and the second query beam source comprises a laser. In some embodiments, the first component beam and the second component beam are substantially concentric.
US09219541B2 Baseband data transmission and reception in an LTE wireless base station employing periodically scanning RF beam forming techniques
The present disclosure is related to a large-scale broadband wireless network capable of providing a very high wireless data capacity, wherein one aspect of the system utilizes a periodic beam forming system. When a wireless base station cell operates a periodic beam forming system, it is necessary to locate each user served by the cell within a sub-area covered by one of the m times N RF beams generated by the system. Methods for locating users within RF beam sub-areas are disclosed herein, where a user may be scheduled for transmission or reception only when an RF beam is focused on the sub-area that covers the user location. The present disclosure pertains to the systems and methods that may be used to process transmissions of and receptions by the baseband system of an LTE wireless base station that employs a periodic beam forming RF and antenna system.
US09219540B2 Method and system for phase compensation in multi-path communication device
A method and apparatus for a radio base station (300) aligns IQ data blocks for transmission over multiple radio frequency (RF) signal paths (318, 328, 338) between a base station controller (304) and a plurality of antennas (340) at the base station by determining a path delay (317, 327, 337) for each RF signal path, and then transmitting IQ data blocks from JESD 204 transmit interfaces (301-303) over each RF signal path ahead of a first predetermined time slot by an advance time period equaling the path delay for each RF signal path, thereby aligning IQ data block signaling to the first predetermined time slot at the antennas.
US09219538B2 System and method for one cell to cover multiple areas
A system, method and network device for covering a plurality of areas by one cell are disclosed. The system includes: a plurality of radio frequency groups and at least one base band unit. One radio frequency group corresponds to one area of the cell, one radio frequency group corresponds to one date channel, and one base band unit is connected to a plurality of radio frequency groups through a plurality of date channels. The embodiment of the invention reduces the signal interference among each area of the same cell, increases the system capacity, and benefits cell splitting, i.e., benefits increasing the capacity and upgrading during network enhancement.
US09219537B2 Method and system for transmitting information in relay communication network
The disclosure discloses an information transmission method and system in a relay communication network, the method comprises: establishing a first tunnel and a second tunnel, wherein the first tunnel is a tunnel between an Access Service Network Gateway (ASN GW) and a Base Station (BS), the second tunnel is a tunnel between the BS and a Relay Station (RS); performing signaling and/or data transmission between the ASN GW and the RS through the first tunnel and the second tunnel. The invention implements the transmission of signaling and/or data in Layer3 relay.
US09219530B2 Method and apparatus for signal transmission in comp scheme
The present system relates to a method for signal transmission in a CoMP scheme. Each cell that performs a CoMP operation in capable of setting and allocating a particular carrier and a particular CoMP zone in order to execute a particular CoMP scheme. Using the particular CoMP zone and the allocated carrier, a terminal can transmit and receive a CoMP signal corresponding to the particular CoMP zone and the allocated carrier. The terminal can perform measurement of a carrier or a particular zone within the carrier and select a carrier or a particular zone, on the basis of the measurement value. On the other hand, a serving base station can select a carrier or a particular zone, on the basis of the measurement value that is received from the terminal.
US09219525B2 Socket
Provided is a socket including a socket body and a jack, wherein a network communication module is arranged inside the socket body; and the network communication module is connected with a mains line; and the network communication module is configured to provide a user with transmission of a network signal of the Internet through the mains line. The network communication module is arranged inside the socket body to provide the user with transmission of the network signal of the Internet through the mains line, so that the function to access the Internet through the mains line by means of the socket is enabled, to thereby address the problems of one of limited jack locations occupied, a part of an indoor space occupied and some of resources wasted for a wall-plugged power modem.
US09219524B2 TDD repeater for a wireless network and method for operating said repeater
A repeater (1) particularly suitable for a time-division duplex transmission of communication signals is provided. The repeater (1) comprises a master unit (2) for communicating with a base station (3) of a wireless network, at least one remote unit (4) for communicating with a network terminal, as well as a waveguide (11) connecting the remote unit (4) with the master unit (2) for transmitting the communication signals in an uplink direction (6) from the remote unit (4) to the master unit (2) and in a downlink direction (5) from the master unit (2) to the remote unit (4). Both the master unit (2) and the remote unit (4) comprise one switch (19, 20) each for changing over the signal transmission between uplink direction (6) and downlink direction (5). Both switches (19, 20) are selected by a synchronizing unit (21) arranged in the master unit (2), the synchronizing unit (21) being designed for determining a clock pulsing from the communication signal fed to the master unit (2)—in particular from the base station (3)—and for supplying a control signal corresponding to this clock pulsing to the switches (19, 20).
US09219519B2 Proximity wireless transmission/reception device
A proximity wireless transmission/reception device of an embodiment includes a first transmission/reception unit, of a first communication scheme, including a first tuned circuit and a first modulation/demodulation circuit, a second transmission/reception unit, of a second communication scheme, including a second tuned circuit and a second modulation/demodulation circuit, an antenna where communication signals of the first and second communication schemes are induced, a switch unit configured to connect the antenna and the first transmission/reception unit or to connect the antenna and the second transmission/reception unit, a reception determination unit configured to determine reception states of the first and second transmission/reception units, and a switch switching unit configured to control the switch unit according to a determination result of the reception determination unit.
US09219517B2 Temperature compensated bulk acoustic wave devices using over-moded acoustic reflector layers
Embodiments of apparatuses, systems and methods relating to temperature compensated bulk acoustic wave devices. In some embodiments, temperature compensated bulk acoustic wave devices are described with an over-moded reflector layer.
US09219510B2 Signal receiving system, semiconductor device, and signal receiving method
A signal receiving device obtains information data based on a plurality of signals received at a plurality of antennas. The signal receiving device is divided into a first receiving unit and a second receiving unit. The first receiving unit carries out certain part of an entire receiving process, and the second receiving unit carries out the remaining part of the receiving process. The first receiving unit demodulates and synthesizes the received signals and decodes the synthesized signal to recover received information data. The first receiving unit modulates the received information data to obtain a modulation signal and transmits the modulation signal to the second receiving unit via a transmission cable. The second receiving unit recovers the received information data by demodulating the modulation signal received via the transmission cable, and obtains the information data by decoding the recovered information data.
US09219507B2 Blocker-tolerant wideband noise-canceling receivers
Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering.
US09219504B2 LEH memory module architecture design in the multi-level LDPC coded iterative system
A memory in a LDPC decoding system includes data banks organized into a ping-pong memory. The ping-pong memory is connected to an interleaver and a de-interleaver. The interleaver interleaves L values; the interleaved L values are then stored in the ping-pong memory. A LDPC decoder retrieves L values from the ping-pong memory and returns E values to the ping-pong memory. The de-interleaver de-interleaves the E values and sends data to a LE queue and HD queue.
US09219501B2 LDPC encoding/decoding method and device using same
Disclosed are an LDPC encoding/decoding method and a device using same. The method includes the steps of: (a) generating an information bit sequence by determining information bits to be encoded from among a group of information bits; (b) generating a modified information bit sequence by inserting a preset error floor prevention bit into at least one preset position in the information bit sequence; (c) generating a parity check bit on the basis of the modified information bit sequence; and (d) performing encoding by using the modified information bit sequence and the parity check bit. According to the disclosed method, performance degradation of LDPC encoding and decoding due to an error floor phenomenon can be prevented.
US09219500B2 Navigation devices and methods carried out thereon
This invention concerns a method of determining a route using map data comprising a plurality of navigable paths, the map data divided into a plurality of regions. The method comprises using at least one processing apparatus to: receive an origin and a destination on the map data and a travel time, determine a route from the origin to the destination using the map data and minimum cost data that identifies minimum cost paths between regions of the map data. The minimum cost data identifies more than one minimum cost path between a pair of the regions if different minimum cost paths exist between the pair of regions at different times and determining a route comprises identifying from the minimum cost paths for the pair of regions comprising the origin and destination, the minimum cost path having a lowest cost at the travel time.
US09219498B2 Method and device for arithmetic encoding or arithmetic decoding
The invention proposes a method and a device for arithmetic encoding of a current spectral coefficient using preceding spectral coefficients. Said preceding spectral coefficients are already encoded and both, said preceding and current spectral coefficients, are comprised in one or more quantized spectra resulting from quantizing time-frequency—transform of video, audio or speech signal sample values. Said method comprises processing the preceding spectral coefficients, using the processed preceding spectral coefficients for determining a context class being one of at least two different context classes, using the determined context class and a mapping from the at least two different context classes to at least two different probability density functions for determining the probability density function, and arithmetic encoding the current spectral coefficient based on the determined probability density function wherein processing the preceding spectral coefficients comprises non-uniformly quantizing absolutes of the preceding spectral coefficients for use in determining of the context class.
US09219493B1 Analog-to-digital converter with expected value nonlinearity calibration
A system includes an analog-to-digital converter (ADC) for converting an analog input signal to a digital signal output and a nonlinearity corrector for correcting nonlinear error in the digital signal output to produce a corrected digital signal output. A source of the nonlinear error is associated with the ADC, wherein an analog calibration signal is introduced to the source of the nonlinear error during conversion of the analog calibration signal to a digital calibration output having the nonlinear error. After conversion of the analog calibration signal to the digital calibration output, a calibration circuit calculates expected values of correlation sums in response to the digital calibration output and determines correction coefficients using the expected values of the correlation sums. The calibration circuit provides correction data based upon the correction coefficients to the nonlinearity corrector.
US09219491B2 Analog-to-digital conversion device
An electronic analog-to-digital conversion device includes an analog-to-digital conversion block having a first input for receiving a voltage signal to be converted based on a reference voltage signal provided to a second input, and an input block connected to the first input of the analog-to-digital conversion block. The input block receives an input signal at a first resistive network connected to a second resistive network, which is then connected to a reference potential. The input block also includes an active network connected between an output of the first resistive network and the first input of the analog-to-digital conversion block. The active network has a first input terminal directly connected to the second input of the analog-to-digital conversion block for receiving the same reference voltage signal so that the input voltage signal received at a second input of the active network is processed based on the reference voltage signal.
US09219488B2 AD conversion circuit
An analog-to-digital (AD) conversion circuit includes an analog filter configured to remove a high frequency component of an analog signal to generate a first signal, an AD converter (ADC) configured to AD-convert the first signal to generate a second signal, and a digital filter configured to remove a high frequency component of the second signal to generate a digital signal.
US09219487B1 Frequency ramp generation in PLL based RF frontend
An RF transceiver circuit is disclosed herein. In accordance with one example of the disclosure the RF transceiver circuit includes a phase-locked-loop (PLL) with a fractional-N multi-modulus divider. The PLL operates in accordance with a PLL clock frequency and generates a frequency modulated RF output signal. The RF transceiver circuit further includes a modulator unit, which is configured to generate a sequence of division values dependent on a set of modulation parameters. The modulator operates in accordance with a system clock frequency, which is lower than the PLL clock frequency. A sample rate conversion unit is coupled between the modulator unit and a fractional-N multi-modulus divider. The sample rate conversion unit is configured to interpolate the sequence of division ratios to provide an interpolated sequence of division ratios at a rate corresponding to the PLL clock frequency.
US09219484B2 Reference clock compensation for fractional-N phase lock loops (PLLS)
In one embodiment, a method includes determining a phase difference between a reference clock and a feedback clock in even and odd cycles for a phase lock loop (PLL). The even and odd cycles are alternating clock periods. A delta value based on the phase difference is determined. The method then adjusts a division value used by a divider to generate the feedback clock during the even cycle based on the delta value where the delta value is of a first polarity. Also, the method adjusts the division value used by the divider to generate the feedback clock during the odd cycle based on the delta value where the delta value is of a second polarity.
US09219483B1 Integrated circuit floorplans
An integrated circuit is disclosed. The integrated circuit may include an interface circuit region and logic circuitry region. The interface circuit region includes interface circuits that transfers signals in and out of the integrated circuit. The logic circuitry region includes logic circuitry that is configured to implement a logic function. The logic circuitry region surrounds the interface circuit region from at least two sides, from at least three sides, or from all four sides.
US09219481B2 Capacitive coupling, asynchronous electronic level shifter circuit
An asynchronous level shifter electronic circuit including: a transmitter, which can be coupled to a first voltage and generates a communication signal; a receiver, which can be coupled to a second voltage; and a capacitive coupling stage, which receives the communication signal and supplies a corresponding filtered signal to the receiver. The receiver includes: a threshold device, which has an input terminal and an output terminal and switches an electrical quantity on the output terminal between a first value and a second value, as a function of corresponding transitions through a threshold of a first intermediate signal present on the input terminal, to generate a second intermediate signal; and a biasing circuit, which generates the first intermediate signal to have a d.c. component, which is a function of the second intermediate signal, and superposed on which is a variable component, which is a function of the filtered signal.
US09219474B2 Driver circuit for switching element
A driver circuit is connected to a control terminal of a voltage-controlled switching element via a connection line. The drive circuit drives the switching element. The switching element is switched to an ON state by charging the control terminal of the switching element via the connection line. The switching element is switched to an OFF state by discharging the control terminal of the switching element via the connection line. A voltage at a predetermined position on the connection line is detected. An open circuit state between the control terminal and the predetermined position is detected based on a speed of change in the detected voltage at the predetermined position when the switching element is switched to the ON state or the OFF state.
US09219464B2 Bulk acoustic wave (BAW) resonator structure having an electrode with a cantilevered portion and a piezoelectric layer with multiple dopants
A bulk acoustic wave (BAW) resonator, comprises: a first electrode; a second electrode comprising a plurality of sides. At least one of the sides comprises a cantilevered portion. The bulk acoustic wave (BAW) resonator also comprises a piezoelectric layer disposed between the first and second electrodes. The piezoelectric layer comprises a piezoelectric material doped with a plurality of rare earth elements, and the cantilevered portion extends above the piezoelectric layer. The bulk acoustic wave (BAW) resonator comprises a gap between the cantilevered portion and the piezoelectric layer.
US09219461B2 Capacitive blind-mate module interconnection
A blind-mate capacitive coupling interconnection between a main module enclosure one or more sub-module enclosures has coupling surfaces each with a ground portion and an aperture, an inner element provided in the aperture, spaced away from the ground portion. The coupling surfaces may be provided, for example, as traces on a printed circuit board. To accommodate a degree of mis-alignment, one of the inner elements may be provided larger than the other. Capacitive coupling between the coupling surfaces occurs when the coupling surfaces are mated together, retained in position, for example, by a mechanical fixture.
US09219460B2 Audio settings based on environment
Embodiments described herein may involve dynamically adjusting the equalization of a playback device based on the environment in which the playback device is operating. One embodiment may involve emitting a first audio signal from a playback device, detecting, by the playback device, a second audio signal, where at least a portion of the second audio signal is a reflection of the first audio signal, in response to the detecting, determining one or more reflection characteristics, where each of the one or more reflection characteristics are based on at least the second audio signal, adjusting an equalization setting of the playback device based on the one or more reflection characteristics, and causing an audio track to play according to the adjusted equalization setting.
US09219459B2 Receiving device and remote control system
A receiving device includes a rectifier configured to rectify a received signal and a bias supply unit configured to intermittently supply the rectifier with a bias voltage corresponding to a threshold voltage of the rectifier. The receiving device further includes a detector configured to detect the received signal based on an output of the rectifier and a controller configured to control the bias supply unit to stop supplying the bias voltage upon detection of the received signal by the detector.
US09219458B2 Methods and systems of AGC and DC calibration for OFDM/OFDMA systems
Methods and apparatus for automatic gain control (AGC) and DC calibration for orthogonal frequency-division multiplexing (OFDM) or orthogonal frequency division multiple access (OFDMA) systems are provided in an effort to avoid saturation of the analog-to-digital converter (ADC) in a radio frequency (RF) front end of a receiver, to handle dynamic received signal power, or to avoid interruptions in a communication link for DC calibration. For certain embodiments, the quantization error in the RF front end may also be decreased.
US09219452B2 Dual mode receiver with RF splitter using programmable passive components
One embodiment of the present invention relates to a dual mode receiver that includes an RF splitter configured to operate in two modes, wherein in a first mode a single low noise amplifier is active to receive an RF input signal, and in a second mode two low noise amplifiers are active to receive the RF input signal. The receiver further includes a programmable degeneration component operably coupled to the RF splitter, and configured to provide a first performance characteristic in the first mode, and a second, different performance characteristic in the second mode, wherein the first and second performance characteristics influence an input impedance of the RF splitter to be substantially the same in the first and second modes.
US09219445B2 Optimization methods for amplifier with variable supply power
Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).
US09219441B2 Magnet flux amount estimation device, synchronous motor driving device, and electric motor car
According to one embodiment, a magnet flux amount estimation device includes a magnetic pole position detector configured to detect a magnetic pole position of a permanent magnet synchronous motor including a permanent magnet within a rotor; an inductance-equivalent value determination module configured to determine an inductance-equivalent value of a d-axis corresponding to a determined magnetic pole direction; and a magnet flux amount estimator configured to calculate an estimation value of a magnet flux amount of the permanent magnet, based on the inductance-equivalent value.
US09219439B2 Electric motor control device
An electric motor control device includes a current vector controller that follows a target command value for controlling an electric current of the motor by separating the current into a d-axis current and q-axis current orthogonal to each other. The motor control device further includes a driver for driving the motor, a phase-angle generator a phase-angle command generator for generating a phase-angle command β* based on difference Δv* between an absolute value |v*| of a voltage command supplied from the current vector controller to the driver and a given reference value Vlmt, a d-axis current command generator for generating d-axis current command id* based on a sine value of the phase-angle command β*, and a q-axis current limiter for setting a limit value of q-axis current command iq* based on a cosine value of the phase-angle command β*. This structure allows canceling a voltage saturation, and driving the motor stably with high output around a voltage saturation region even if a target command value exceeding an output limit of the motor is input.
US09219437B2 Position signal compensation unit of motor, and motor including the same
Provided is a motor including a motor driving unit outputting a plurality of switching signals and any one of estimated three-phase voltages, in response to a control signal and a compensated position signal; a pulse width modulation (PWM) inverter outputting three-phase voltages and any one of estimated three-phase currents corresponding to the one estimated phase voltage, in response to the plurality switching signals; a motor unit operating based on the three-phase voltages and outputting a position signal according to the operation; and a position signal compensation unit receiving the position signal, the estimated phase voltage and the estimated phase current, detecting a phase difference between the estimated phase voltage and the estimated phase current and compensating for the position signal in response to the detected phase difference.
US09219434B2 Motor control device and motor control program
A motor control device according to the present invention includes: a boost converter circuit 30 that boosts a direct-current voltage; an inverter 40 that generates a drive pulse for a motor 50 from the direct-current voltage of the boost converter circuit 30; and a control section 60 that presets a set value Id_hold obtained by multiplying a set value Id_max by an intermediate current threshold coefficient α, controls a pulse width of the drive pulse of the inverter 40 based on a speed deviation, controls a d-axis current in the motor 50 based on the speed deviation so that the pulse width of the drive pulse of the inverter 40 does not exceed a threshold value, and controls the direct-current voltage of the boost converter circuit 30 based on the speed deviation so that the d-axis current in the motor 50 does not exceed the set value Id_hold.
US09219431B2 Motor control device
The present invention relates to a motor control device provided with the function of detecting the rotor position of a synchronous motor in a sensor-less fashion. The motor control device previously stores a current phase β defined by the two parameters that are an induced voltage peak value Ep and the subtracted value (θe−θi) obtained by subtracting an induced voltage electrical angle θe from a current electrical angle θi, and based on the actual detected Ep, θi, and θe, selects β by referring to the β previously stored, and calculates the rotor position θm by subtracting the selected β from the actual detected θi. Then, in case of selecting β, the actual detected Ep and θe are corrected according to changes in the current flowing through the coil. As a result, a detection accuracy for the rotor position during a transition period is enhanced.
US09219429B2 Linear ultrasonic motor and lens apparatus and image pickup apparatus using the same
A linear ultrasonic motor includes a vibrator having a piezoelectric element, a movable part applying a pressurization force to the vibrator and bringing the vibrator into pressurized contact with a base part, a cover part being fixed to the base part, a rolling part being rollably held between a movable guide part of the movable part and a cover guide part of the cover part, and a body to be driven having a transmission member that is pivotably supported and being able to move only in the movable direction. The transmission member includes a bias part that abuts on a transmission part of the movable part and applies a biasing force of biasing the movable part to the rolling part, to the transmission part. The rolling part is held by a resultant force of the pressurization force or a reaction force of the pressurization force, and the biasing force.
US09219425B2 Electric power converter
An electric power converter includes a semiconductor module that has a semiconductor element therein, a cooler that cools the semiconductor module, a circuit board provided with a semiconductor control circuit that controls the semiconductor module, a capacitor electrically connected to the semiconductor module, and a quick discharge resistor for discharging an electric charge accumulated in the capacitor. The circuit board is provided with a discharge control circuit that controls a current that flows into the quick discharge resistor. The semiconductor module, the cooler, the capacitor, and the quick discharge resistor are disposed on one major surface of the circuit board.
US09219423B2 Converter bridge arm suitable for high-voltage applications and application system thereof
A converter bridge arm suitable for high-voltage applications and an application system thereof. The converter bridge arm comprises an energy storage capacitor (C) and a plurality of reverse-conducting switches, and is formed by serial connection of an upper telescopic arm (Bu), a lower telescopic arm (Bd) and an inductor (Lb). The upper telescopic arm (Bu) and the lower telescopic arm (Bd) are respectively formed by cascading connection of a plurality of units. The converter bridge arm has a simple modular structure, is easy to control, reliable and convenient for starting a high-voltage circuit, has self-balancing voltage sharing effect, and can operate without a transformer and has the characteristic of power bidirectional flow, does not require high-voltage isolation auxiliary power supply, has the advantages of suitability for high-frequency operation and electromagnetic compatibility, and can remarkably reduce the dimension of a filter.
US09219420B1 Overvoltage protection using a tapFET
Systems and processes for protecting a power converter against overvoltage conditions are disclosed. In one example, an overvoltage protection circuit may be used to sense the input voltage of the power converter to determine whether the input voltage is greater than a threshold value. In response to determining that the sensed input voltage is greater than the threshold value, an input capacitance and/or capacitance of an EMI filter of the power converter may be discharged to ground or an input return through a tapFET of a switching element of the power converter to protect the components of the device. The capacitance(s) may continue to be discharged through the tapFET for a duration of time after the sensed input voltage falls below the threshold value to allow the capacitance(s) to discharge to a safe level.
US09219419B2 Switched mode power supplies
An example embodiment relates to a switched-mode power supply comprising a transformer with a first winding and a second winding. There is a transmitter configured to: detect a detectable variable (Vout) at the first winding, generate a transformer relayed signal in accordance with the detectable variable (Vout), and provide the transformer relayed signal to the first winding. A receiver is configured to: receive the transformer relayed signal from the second winding, and control a controllable variable at the second winding in response to the transformer relayed signal, wherein the transformer relayed signal is a symbol stream comprising a plurality of symbols.
US09219416B2 Buck converter having self-driven BJT synchronous rectifier
A switching converter has a self-driven bipolar junction transistor (BJT) synchronous rectifier. The BJT rectifier includes a BJT and a parallel-connected diode, and has a low forward voltage drop. In a first portion of a switching cycle, a main switch is on and the BJT rectifier is off. Current flows from an input, through the main switch, through the first inductor, to an output. Current also flows through the main switch, through the second inductor, to the output. In a second portion of the cycle, the main switch is turned off but the inductor currents continue to flow. Current flows from a ground node, through the BJT rectifier, through the first inductor, to the output. The BJT is on due to the second inductor drawing a base current from the BJT. In one example, the main switch is a split-source NFET that conducts separate currents through the two inductors.
US09219415B2 Switching power supply circuit
There is provided a switching power supply circuit (1) for supplying a power supply voltage to a load through a transmission line PL. The switching power supply circuit (1) includes: a voltage conversion unit (11) for inputting thereinto an input voltage VIN and a control signal Vc, converting the input voltage VIN into an output voltage Vo having a magnitude corresponding to the control signal Vc, and outputting the output voltage Vo to the transmission line PL; a signal generation unit (12) for monitoring a load current ILOAD flowing through the transmission line PL and generating a signal corresponding to a voltage dropped in the transmission line PL; and a low pass filter (13) for outputting the signal generated in the signal generation unit (12) to the voltage conversion unit (11) as the control signal Vc.
US09219414B2 Load current readback and average estimation
A switching regulator or other apparatus or techniques can include load current monitoring to provide a digital representation of an estimated load current. Load current monitoring can be performed by a circuit including a counter circuit, a comparator circuit, and a digitally-controlled source coupled to the counter circuit and configured to adjust a bias condition of a sensing device in response to a count provided by the counter circuit in order to establish a proportional relationship between a current conducted by the sensing device and a corresponding current conducted by a power switching device. The counter circuit is configured to increment and decrement the count in response to information provided by the comparator output and the count is generally indicative of the estimated load current, such as an average load current.
US09219413B2 Power supplies responsive to multiple control signal formats
A power supply includes a power circuit for converting an input voltage or current to an output voltage or current, at least one interface port for receiving signals from one or more external devices, and a control circuit coupled to the power circuit and the at least one interface port. The control circuit is adapted to operate the power circuit in response to control signals having a plurality of different control signal formats that are received by the at least one interface port.
US09219412B2 Buck converter with reverse current protection, and a photovoltaic system
A buck converter is disclosed comprising a series combination of high-side and low-side switches, and including a protection switch in anti-series with the high-side switch. The protection switch is controlled by means of a shutter switch, which is powered from the output of the converter and gated from the half bridge node of the converter. Also disclosed is a photovoltaic system comprising such a buck converter and a solar panel.
US09219410B2 Charge pump supply with clock phase interpolation
A voltage generator may include a plurality of charge pumps, plural sets of delay pipelines and a phase controller. Given M delay pipelines having N stages each, there may be M*N charge pumps each having a triggering input coupled to a respective stage or a respective pipeline. The phase controller may include a plurality of phase control stages interconnecting among the delay pipelines to induce timing offsets among the outputs of the delay stage. In an alternate design, intermediate nodes among the pipeline's delay stages may be coupled to triggering inputs of a sub-set of the charge pumps. The phase controller may have a plurality of phase control stages coupled, respectively, between the intermediate nodes of the delay pipeline and intermediate nodes of the phase control stages may be coupled to triggering inputs of another sub-set of the charge pumps.
US09219408B2 Transition mode PFC power converter adapted to switch from DCM to CCM under high load and control method
A transition mode power factor correction converter comprising a boost inductor, a switch, a diode, and output tank capacitor, has circuit means of limitation of the off-time interval of the switch to a fraction of the off-time interval, “complementary” to the on-time interval that is normally controlled for regulating the output voltage, during part of a cycle of a rectified sinusoidal voltage waveform input to the converter, when the current flowing in the inductor reaches a maximum threshold, causing the mode of operation of the device to switch from transition mode to continuous current mode for a middle phase angle region of a rectified sinusoidal input voltage waveform, under high load conditions, defined by said maximum current threshold. Current peaks amplitude and ripple are effectively reduced for same output power.
US09219406B1 Systems and methods for assessing current in a resonant circuit
Methods and systems for assessing current flowing through a link inductor in a resonating current is disclosed. The method includes first integration of an actual voltage measure to obtain an integrated current. A scaling factor can be applied to the integrated current to obtain an actual current. The scaling factor can be determined by a second integration to the integrated current, which can result in an integrated voltage. The integrated voltage can then be compared with actual measured voltage. Subsequently, the scaling factor can be adjusted according to the comparison between the actual and the integrated voltage. A match between the actual and the integrated voltage can serve as an indication that application of the scaling factor to integrated current can result in a match to actual current.
US09219405B2 Portable driven generator
A portable driven generator for a bicycle includes a power generator assembly and a power generating circuitry. The power generator assembly includes a power generator supported on a bicycle frame, a driven shaft rotatably extended from the power generator, and a frictional member attached on the driven shaft and is in physical contact with a tire of the bicycle, wherein when the wheel rotates, the frictional member and the driven shaft are driven to rotate accordingly for generating electricity by the power generator. The power generating circuitry electrically connected to the power generator and the electrical appliance, wherein when power generator is activated to generate electricity, the electricity is regulated by the power generating circuitry, which is arranged to control an output current of the electricity supplied to the electrical appliance so as to uniformly and constantly transmit electrical power to the electrical appliance for operation thereof.
US09219403B2 Magnetic shear force transfer device
A magnetic shear force transfer device for transferring shear forces across a non-magnetic gap includes a first magnetic structure comprising concentric circular tracks of magnetic sources magnetically printed into a first magnetizable material a second magnetic structure comprising concentric circular tracks of magnetic sources magnetically printed into a second magnetizable material. Each concentric circular track has an even number of magnetic sources where adjoining magnetic sources alternate in polarity. One or more tracks of the first magnetic structure are rotated relative to one or more tracks of the second magnetic structure such that a maximum torque condition coincides to one angular orientation between the first and second magnetic structures.
US09219401B2 Vibrator and electronic device including the same
There are provided a vibrator and an electronic device including the same, the vibrator including a housing having an internal space; a shaft included in the internal space; a vibrating part suspended in the internal space by elastic members at both ends thereof, including a magnetic field part, and having a bearing member slidably and movably installed on the shaft; and a coil generating vibrations of the vibrating part through electromagnetic interaction with the magnetic field part and provided on an outer peripheral surface of the shaft while facing the magnetic field part.
US09219393B2 Electric drive system
The present invention relates to an electric drive system comprising an electric motor (10) arranged to rotate a drive shaft (16); a drive planetary gear configuration (70) being in driving engagement with said drive shaft (16) and an output shaft (50) rotatable relative to said drive shaft (16); and means for providing change in rotational speed of said output shaft (50), wherein said rotational speed changing means (80, 82) are disposed on opposite sides of the motor (10) respectively. The present invention also relates to a motor driven unit, for example a motor vehicle.
US09219391B2 Rotor for an electric machine and electric machine
A rotor for an electric machine includes a pole core having a coolable magnetisable rotor section which is made of a super-conducting material. The rotor section has a rotationally symmetric geometry. The pole core is formed as a cylinder and the rotor section is arranged on an outer surface of the cylinder so as to be encircling.
US09219390B2 Rotating electrical machine
The disclosure discloses a rotating electrical machine including a stator and a rotor. The rotor includes a cylindrical iron core that is fixed to a shaft and comprises a radial direction and an axial direction, a plurality of permanent magnets that is embedded in the iron core, a plurality of air gaps that are respectively provided in a portion on an inner side of the iron core in the radial direction, a wedge portion that is provided along the axial direction so as to protrude within the air gap, and a non-magnetic reinforcing member that is filled in the air gap.
US09219388B2 Synchronous motor with permanent magnets
The present invention relates to synchronous motor comprising a cylindrical rotor (4) provided with permanent magnets (3) located inside a cylindrical stator provided with a winding (U, V, W), characterized in that the rotor is provided with protuberances (41) facing the said winding.
US09219385B2 Cooperative wireless power signal transmission method and device
Disclosed are a method and device for cooperatively sending and receiving power wirelessly. Wireless power charging coverage at the level of data signal transmission can be ensured by establishing one or more modes for transmitting, to a specific terminal, a power transmission signal from any of a plurality of nodes which is (are) not engaged in data transmission, and by matching the phase synchronization of the power transmission signal between the one or more nodes and then transmitting, to the specific terminal, a power transmission signal of which the phase synchronization has been matched by means of the one or more modes.
US09219371B2 Apparatus and method for charging a battery pack
According to certain embodiments, an apparatus and method for charging a battery pack for an electronic apparatus includes an earphone connection unit, a charge determining switching unit, a charge circuit, and a control unit. The earphone connection unit is configured to be connected to the electronic apparatus to selectively receive one of an earphone unit for an earphone mode and the spare battery pack for a charge mode. The charge determining switching unit is configured to switch to one of the earphone mode and the charge mode according to the unit connected electrically to the earphone connection unit. The charge circuit is configured to open a charge path for charging the spare battery pack with an external voltage applied to the electronic apparatus, according to the switching of the charge determining switching unit. The control unit is configured to measure a resistance value of the spare battery pack applied to the charge determining switching unit, switches the mode, and opens the charge circuit.
US09219367B2 Method and apparatus for controlling a power supply device with aid of full-featured modularized functional blocks
A method and apparatus for controlling a power supply device is provided, where the apparatus includes at least one portion of the power supply device. The apparatus includes at least one battery module, each of which is a battery module of a set of battery modules connected in series within the power supply device, where each battery module of the set of battery modules includes at least one battery cell, at least one processing circuit, and at least one balancing circuit, which is electrically connected to the battery cell and the processing circuit. The processing circuit controls operations of the aforementioned each battery module of the set of battery modules. In addition, under control of the processing circuit, the balancing circuit performs balancing of the battery cell. Additionally, the balancing circuit provides the processing circuit with a bias voltage, and the processing circuit obtains electric power from the balancing circuit.
US09219364B2 Public power supply system
A public power supply system makes it possible to use power in a public location both conveniently and safely without erroneous operations. An outlet, to which power is supplied from a distribution line, is installed in advance in a predetermined public location and a communication terminal requesting the outlet to supply power and a center server are connected in advance via an Internet and when there is a request to the outlet to supply power, the center server outputs a current supply command to a current control unit via a communication network (Internet or telephone network) and the current control unit permits supply of a current to be supplied to the outlet when there is a current supply command and there is information to allow supply of a current to the outlet generated using a remote control prevention device installed near the outlet.
US09219360B2 Safe quick disconnect leakage protector
The present disclosure provides a safe quick disconnect leakage protector, including a power supply circuit, a sampling circuit, a couple of single-pole single-throws, an on and off control circuit, and a testing circuit. The sampling circuit collects the leakage current signal between the live wire and the neutral wire and outputting the leakage current signal; the main control circuit receives the leakage current signal outputted from the sampling circuit, amplifies the leakage current signal, and outputs a grounding failure control signal when the leakage current reaches the predetermined value; the on and off control circuit receives the grounding failure control signal outputted from the main control circuit and controls the single-pole single-throw switches to disconnect the load from the external power supply according to the grounding failure control signal, thereby protecting the load and improves the safety of the leakage protection of an electrical appliance.
US09219359B2 Sliding power supply device
Provided is a sliding power supply device which can reduce entire length of a case extendably housing a wiring harness, for a large slide stroke of a sliding seat and such. The sliding power supply device includes a long case extendably housing a wiring harness, a slider arranged slidable in a longitudinal direction of the case and arranged to lead out the wiring harness to outside of the case, and an extra length absorption portion arranged to support a wiring harness portion lead outside of the case such that the wiring harness portion is lead out at location further away from a movement end of the slider in the longitudinal direction of the case. The extra length absorption portion is a subcase having at least a bottom plate portion. Both ends of the wiring harness portion in a movement direction of the slider are positioned at the same height.
US09219357B1 Kit for covering outdoor electrical devices
A kit for covering electrical devices includes a housing having a rear panel which receives adapter plates. An opening in an adapter plate is defined by a forwardly tapered chamfered wall. A frustum insert having a chamfered wall opening may be received in the adapter plate opening and successive frustum inserts, each having a smaller chamfered wall opening, may be inserted within the opening of the prior insert. Each of the openings is dimensioned to receive the face of a different electrical device. A frustum plug having a rectangular toggle switch opening can be received in one of the chamfered openings. The top and side of the housing include arrays of hinge pins and a lid includes mating arrays of hinge knuckles. The lid is mounted to either array of pins. Selected pins have enlarged heads to prevent inadvertent disengagement.
US09219356B2 Electrical junction box
An electrical junction box provides a frame and a cover that covers an opening portion of the frame. There is a difference of elevation in an edge of the frame, and the edge includes a lower portion, a higher portion, and an inclination portion. A double wall formed of an exterior wall and an interior wall and positioning the edge of a peripheral wall between the exterior wall and the interior wall is provided to the cover. There is a difference of elevation in the edge of the interior wall similarly the frame, and the edge includes the lower portion, the higher portion, and the inclination portion. Also, a lapping amount between the peripheral wall and the interior wall at the inclination portion is formed larger than a lapping amount at the lower portion.
US09219355B2 Breakable protector plate
A breakable protector plate is provided for preventing damage to wires or cables which are behind the protector plate. The plate comprises a weakened break line. To prevent nails or screws from penetrating the reduced material thickness at the break line, the surface of the break line is raised with respect to the plate in order to redirect nails or screws into a greater thickness area of the plate.
US09219354B2 Main circuit switchgear
There is provided a main circuit switchgear that includes a breaker; a leg part that supports the breaker; a disconnector that is connected to the breaker; a leg part that supports the disconnector; a metal container that accommodates therein the breaker and the disconnector and includes a bottom plate in which an opening is provided at a position corresponding to a position of the leg part, where the leg part is fixed onto the bottom plate, and a support frame that includes a top panel on which the bottom plate is placed and a leg part that supports the top panel, where the leg part is fixed onto the top panel via the opening.
US09219353B2 Equipment-rack power distribution system with cooling
An equipment-rack power distribution system is described which includes a PDU housing, a power input penetrating the housing, a plurality of power outlets disposed on a surface of the housing, circuitry enclosed in the housing interconnecting the power input and the power outlets, one or more air inlets associated with the housing, one or more air outlets associated with the housing, and an air flow device in fluid communication with one or more of the air inlets and the air outlets. An environmental sensor may activate the air flow device upon detection of predetermined environmental conditions, such as a temperature that is above a defined limit.
US09219347B2 Optical semiconductor device
An optical semiconductor device includes a ring laser including a ring resonator in which an optical gain element having an optical gain by current injection is provided, a waveguide optically coupled to the ring laser, and a reflector provided at an end portion of the waveguide and configured to reverse the advancing direction of light outputted from the ring laser and propagating in the waveguide.
US09219346B2 Laser diode assembly
A laser diode assembly includes: a mode-locked laser diode device; a diffraction grating that configures an external resonator, returns primary or more order diffracted light to the mode-locked laser diode device, and outputs 0-order diffracted light outside; and an imaging section provided between the mode-locked laser diode device and the diffraction grating and imaging an image of a light output end face of the mode-locked laser diode device on the diffraction grating.
US09219344B2 Generating ultrashort laser pulses based on two-stage pulse processing
Techniques and devices for producing short laser pulses, including generating ultrashort laser pulses by separating a nonlinear processing of laser pulses via nonlinear self-phase modulation (SPM) in a nonlinear optical medium from a subsequent linear processing of the laser pulses to achieve ultrashort laser pulses.
US09219343B1 Crystal capture housing with non-contact fluid cooling
A crystal capture housing (housing) for cooling an optical device including a crystal having optical end faces and non-optical faces spanning a length between the optical end faces. An outer housing body (body) has end openings and a crystal mount assembly (CMA) includes a thermally conductive material having end openings connected to an internal opening sized to mount the crystal therein. The CMA thermally contacts each of the non-optical faces of said crystal. The CMA includes a plurality of embedded liquid coolant conduit channels (coolant channels) formed therethrough spanning the length, and the CMA is sized to fit within the body and provide an air gap between the CMA and the body.
US09219337B2 Jumper and jumper terminal arrangement
A jumper for a connecting terminal arrangement (34) having a contact element (12), which has a contacting area (16) and a holding area (18), and a holding element (14) made from an insulating material is arranged on the holding area (18). The holding area (18) has a perforation (22) which is penetrated by the insulating material of which the holding element is made (14).
US09219332B2 Connecting terminal having toggle lever actuation
A connecting terminal includes a receptacle body and a clamping element configured to clamp a conductor inserted into the connecting terminal against a current rail arranged in the connecting terminal in order to form a contact in a contacting state. The connecting terminal also includes a first lever arm rotatably mounted on the clamping element, a compression spring, and a second lever arm rotatably mounted on the compression spring. The second lever arm is configured to engage the first lever arm in the contacting state such that the first and second lever arms are guided together to tension the compression spring and transfer a spring force from the compression spring to the clamping element via the first and second lever arms.
US09219329B2 Harsh duty receptacle connector
A sealed electrical receptacle connector, either male or female, includes, in combination, a bushing and a shell threadably coupled together in an end-to-end manner. The bushing is adapted to receive a cable having plural conductors arranged in a spaced manner and separated from another along their respective lengths by an elongated nonconductive insert having plural radially extending spaced members, each disposed between a pair of adjacent conductors. A split washer is disposed between and in abutting contact with adjacent inner end portions of the receptacle and the shell and includes a slot extending therethrough. The split washer facilitates receptacle connector assembly and its slot is adapted to receive the plural conductors and an elongated axial strength member, such as a multi-strand steel cable, disposed within and along the length of the nonconductive insert to provide the receptacle connector and cable combination with high strength.
US09219328B2 Terminal block with protective cover
Terminal fittings (11, 12) are connected to a side surface side of a housing (24) of a terminal block (20). A protection cover (50) covers the side surface side of the housing (24) and includes an upper surface cover (51) for covering an upper surface (24T) of the housing (24). The upper surface cover (51) includes an upper surface proximate portion (51P) to be arranged proximate to the upper surface (24T) of the housing (24). A step is formed between an outer edge (51E) of the upper surface cover (51) and the housing (24), the upper surface proximate portion (51P) is rearward than the outer edge (51E) of the upper surface cover (51) and a clearance larger than the one between the upper surface proximate portion (51P) and the upper surface (24T) of the housing (24) is formed below the outer edge (51E) of the upper surface cover (51).
US09219322B1 Under mounted leaf spring connector
An apparatus includes a support structure and a leaf spring connector coupled to the support structure. The leaf spring connector has a working height measured from a first surface of the two-sided support structure to a mating surface of the leaf spring connector when the leaf spring connector is in a compressed position. The leaf spring connector is mounted below the first surface of the support structure in order to reduce the working height of the leaf spring connector by at least a portion of a thickness of the support structure.
US09219320B2 Foolproof structure for sharing card slot space
The present invention discloses a structure for sharing card slot space. The structure includes a housing. A first card slot and a second card slot are disposed inside the housing. The insertion port of the first card slot is disposed opposite the insertion port of the second card slot. A common space is disposed between the first card slot and the second card slot. A groove is disposed inside the housing of the common space. A stopper is disposed inside the groove. The stopper can slide in the groove between the first card slot and the second card slot and is configured to prevent a card corresponding to the second card slot from being inserted into the first card slot or to prevent a card corresponding to the first card slot from being inserted into the second card slot.
US09219313B2 Antenna with effective and electromagnetic bandgap (EBG) media and related system and method
An apparatus includes an antenna having multiple layers. At least a first of the layers includes both an effective medium and an electromagnetic bandgap (EBG) medium. The antenna could include a ground plane and a feed line, and the first layer of the antenna can be located between the ground plane and the feed line. The antenna could also include a slot ground and a planar antenna structure, and the first layer of the antenna could be located between the slot ground and the planar antenna structure. The antenna could further include a first substrate between a feed line and a slot ground and a second substrate covering a planar antenna structure, and the first layer could include one of the first and second substrates.
US09219312B2 Feed horn sealing structure and method of sealing the feed horn
A feed horn assembly includes a tubular horn body, a film and a sealing structure. The tubular horn body has a first end and an opposite, second end. The first end includes a peripheral groove defined by an inner peripheral portion and an outer peripheral portion. The film covers the first end. A peripheral bending portion and a periphery portion of the film are disposed inside the groove. The sealing structure is disposed in the groove, and includes a first sealing component urging against the peripheral bending portion and the periphery portion of the film, and a second sealing component urging against the peripheral bending portion and the first sealing component. The outer peripheral portion has a peripheral chamfer portion formed by crimping. The peripheral chamfer portion urges against the sealing structure, such that a sealed condition is formed between the film and the inner peripheral wall.
US09219311B2 Antenna device having antenna element and ground element defining planar rectangular region with gap therebetween
An antenna device includes an antenna element to be fed with electric power from an external power supply and a ground element to be coupled to the antenna element. The antenna element and the ground element are formed of a conductive film and arranged to define a rectangular region in a plan view with at least one gap between the antenna element and the ground element. The antenna element has a shape of one of a polygon, a circle, and a part of the polygon or the circle. The antenna element includes a feeding part in its portion close to the ground element.
US09219304B2 Electronic timepiece with internal antenna
An electronic timepiece has a case; a time display unit housed in the case; an annular dielectric that is housed in the case and has a conductive driven element to which a specific potential is supplied; and a conductive ground plane with an annular shape that is housed in the case and supplied with ground potential. The dielectric body and the ground plane are disposed coaxially to the same center axis with the gap therebetween in the axial (z-axis) direction less than or equal to the thickness of the dielectric in the axial direction.
US09219302B2 Compact antenna system
The various embodiments include multiple antenna system designs for use in smaller sized mobile computing devices where spatial isolation of antennas may not be feasible. The various embodiments include at least an embodiment first antenna having a first arm and a second arm. The first arm and the second arm are positioned proximate to one another in an intersecting perpendicular configuration. The at least first arm and second arm may be formed a plane that is laterally offset from a plane containing a printed circuit board operating as a ground plane. The at least first arm and second arm may also be positioned in a corner of the printed circuit board. Additional embodiments include a second monopole antenna formed in the same plane as the printed circuit board and having a feed contact positioned proximate to a feed and ground contact of the first antenna.
US09219299B2 Resonator, multilayer board and electronic device
A resonator is connected to a first plane which is one of a power plane and a ground plane, wherein the power plane and the ground plane are apart from each other in an up-down direction. The resonator comprises a connecting portion and a body portion. The connecting portion is connected to the first plane. The connecting portion extends in the up-down direction beyond a second plane, which is a remaining one of the power plane and the ground plane, while not being in electrical contact with the second plane. The body portion is connected to the connecting portion while not being in contact with the second plane. The body portion is arranged so that the second plane is located between the body portion and the first plane in the up-down direction.
US09219297B2 Amplifier module with multiple 90 degree hybrids
The invention relates to an amplifier module, comprising at least one amplifier (PA), an antenna port (ANT), a transmission port (TX), a reception port (RX), and a circuit arrangement having at least three 90 DEG hybrids (HYB1, HYB2, HBY3), which each divide a respective input signal into two output signals, wherein the two output signals have a relative phase shift of 90 DEG from each other, wherein the antenna port (ANT), the transmission port (TX), and the reception port (RX) are each connected to at least one 90 DEG hybrid (HYB1, HYB2, HBY3).
US09219294B2 Power management system that changes the operating conditions of a battery charger
Some embodiments relate to a power management system. The power management system includes a generator that provides a voltage output to a bus. The bus is adapted to be connected to a load. The power management system further includes a battery charger that is adapted to charge a battery. A generator controller operates the generator and also adjusts operating conditions of the battery charger. In some embodiments, the generator includes an internal combustion engine that drives an alternator. Embodiments are contemplated where the battery charger is adapted to receive power from a primary power source. As an example, the primary power source may be utility power or some other form of generator power.
US09219290B2 Battery and method for producing the same
A method for producing a battery includes forming a space by expanding a liquid housing portion, the liquid housing portion being present at one end of an outer package that houses a battery element, through supply of gas from an opening portion formed at the other end of the outer package; injecting an electrolytic solution from the opening portion to store the electrolytic solution in the space of the liquid housing portion; degassing the outer package through the opening portion in a vacuum state; sealing the opening portion; and impregnating the electrolytic solution into the battery element.
US09219289B2 Equipping motor vehicle battery housings with sets of electrode plates
The invention relates to an equipping station for equipping motor vehicle battery housings with sets of electrode plates for manufacturing a motor vehicle battery wherein the equipping station has at least one feed section for unequipped battery housings, at least one discharge station for equipped battery housings, at least one apparatus for feedings sets of electrode plates and at least one first equipping section, which is arranged between the feed section and the discharge section and in which sets of electrode plates which have been fed by means of the apparatus for feeding sets of electrode plates are inserted into the battery housing, wherein the first equipping section has a base part, wherein the base part is formed without a conveying apparatus for the battery housing, and the equipping station has at least one first extendable slide, via which a battery housing is horizontally displaceable.
US09219287B2 Fuel cell
An example fuel cell assembly may include a proton exchange membrane (or membrane electrode assembly) that has a first major surface and a second major surface. An anode electrode, which may include a patterned metal layer with a plurality of apertures extending through the patterned metal layer, may also be provided. An anode gas diffusion layer secured to an anode adhesive frame may be situated between the anode electrode and the first major surface of the proton exchange membrane. A cathode electrode may, in some instances, include a patterned metal layer with a plurality of apertures extending through the patterned metal layer. A cathode gas diffusion layer secured to a cathode adhesive frame may be situated between the cathode electrode and the second major surface of the proton exchange membrane. In some instances a fuel cell assembly may be flexible so that the fuel cell assembly can be rolled into a rolled configuration that defines an inner cavity with open ends. A fuel pellet may be inserted into the inner cavity, and one or more end caps may be provided to cover and seal the open ends.
US09219285B2 Method for the early detection of liquid water formation in a fuel cell
A method for the early detection of liquid water formation in a fuel cell (1), in which a fuel gas and an oxidant gas flow, delivered by a gas supply circuit (50) that has a control module (110). According to the invention, the method includes: monitoring the temperature change in one of said gases over time, detecting a variation in said temperature by measuring a temperature differential by unit of time and comparing it to a threshold value, and generating a signal representative of said detection via said control module (110).
US09219279B2 Method for producing aluminum foil
An object of the present invention is to provide a method for producing a high-ductility, high-purity aluminum foil at a high film formation rate by electrolysis using a plating solution having a low chlorine concentration. A method for producing an aluminum foil of the present invention as a means for achieving the object is characterized in that an aluminum film is formed on a surface of a substrate by electrolysis using a plating solution at least containing (1) a dialkyl sulfone, (2) an aluminum halide, and (3) at least one nitrogen-containing compound selected from the group consisting of an ammonium halide, a hydrogen halide salt of a primary amine, a hydrogen halide salt of a secondary amine, a hydrogen halide salt of a tertiary amine, and a quaternary ammonium salt represented by a general formula: R1R2R3R4N.X (wherein R1 to R4 independently represent an alkyl group and X represents a counteranion for the quaternary ammonium cation), and then the film is removed from the substrate.
US09219278B2 Non-aqueous electrolyte secondary battery and use thereof
The non-aqueous electrolyte secondary battery provided by this invention comprises a positive electrode and a negative electrode, wherein the positive electrode has a positive electrode active material layer comprising a positive electrode active material as a primary component, and the negative electrode has a negative electrode active material layer comprising a negative electrode active material as a primary component, having a negative electrode active material's linseed oil absorption number B (mL/100 g) to positive electrode active material's DBP absorption number A (mL/100 g) ratio B/A of 1.27 to 1.79.
US09219271B2 Battery electrode structure
Solid composite electrodes with electrode active layers that include an electrode active material, an optional electron conductive material, an optional binder and other optional additives for batteries which are not fuel cells are provided. The solid composite electrodes are formed by the deposition of an electrode composition (slurry) onto a current collector in one or many layers. The electrode structure may be characterized by a porosity of the electrode composition layer that decreases in a direction from the back side of the layer (close to the current collector) towards the outer side of the layer. The electrode structures can be used in for example chemical sources of electric energy such as primary (non-rechargeable) as well as secondary (rechargeable) batteries.
US09219264B2 Separator for rechargeable lithium battery and rechargeable lithium battery including the same
A separator for a rechargeable lithium battery including a tungsten-doped vanadium oxide (VO2) phase transition material and the rechargeable lithium battery including the separator. Here, an explosion possibility of the rechargeable lithium battery including the separator may be prevented and delayed when the battery is excessively heated.
US09219263B2 Center pin for secondary battery and secondary battery having the same
A center pin for a secondary battery and a secondary battery having the same, which optimizes a void volume of the secondary battery. The center pin is inserted into an electrode assembly of the secondary battery. The center pin has a longitudinal hole and includes a sealing member to seal a portion of the hole. The sealing member can include walls disposed within the center pin, to seal the portion of the hole. The sealing member can include a second center pin, which is inserted into the hole, to seal the portion of the hole.
US09219262B2 Assembled battery and vehicle
An assembled battery including a plurality of cells of cylindrical shape arranged in a plane including a diameter direction, each of the cells including a groove portion extending in a circumferential direction, and a fixing plate including an engagement portion engaging with each of the groove portions of the cells to fix the plurality of cells. A bus bar electrically connecting terminal electrodes of adjacent two of the cells may be fixed to the fixing plate.
US09219261B2 Battery pack
A battery pack including: a plurality of secondary batteries, each including an electrode terminal having a cooling groove; a cooling pipe configured to pass a heat transfer medium therethrough, the cooling pipe being received in the cooling groove of each of the plurality of secondary batteries; and a bus bar electrically connecting the electrode terminals of adjacent secondary batteries of the plurality of secondary batteries.
US09219258B2 Mounting apparatus for battery module
A mounting apparatus for securing a battery module to an enclosure includes a bracket and a latching member. The bracket is secured to the enclosure and defines a receiving space for receiving the battery module. The latching member is attached to the bracket and includes a resilient portion and a blocking flange perpendicularly connected to the resilient portion. The blocking flange is engaged with the battery module to prevent the battery module from disengaging from the receiving space, and the resilient portion is resiliently deformable to disengage the blocking flange from the battery module so that the battery module is easily installed or detached from the enclosure without extra tools.
US09219257B2 Non-aqueous electrolyte battery with gas adsorbing carbon material
Disclosed is a non-aqueous electrolyte battery for suppressing the swell of a film-shaped exterior material. A gas adsorbing carbon material added to an anode mixture layer 9 of an anode 4 and/or to a cathode mixture layer 13 of a cathode 5 adsorbs a gas generated in the battery to suppress the gas storage in the battery, so that it is possible to suppress the swell of a film-shaped exterior material 3 caused by the storage of the gas generated within the battery.
US09219256B2 Handling device and handling method thereof
A handling device is used for handling a substrate. The handling device includes a holder, a moving element, at least one first adhesive chuck, and at least one second adhesive chuck. The moving element is located adjacent to the holder for moving relative to the holder along a first axial direction. The first adhesive chuck is located on a first surface of the holder and the second adhesive chuck is located on a first surface of the moving element, in which the first adhesive chuck and the second adhesive chuck are used to be respectively separated from the substrate adhered thereon. In addition, another embodiment of the invention discloses a handing method of the handing device.
US09219252B2 Organic EL element and method for manufacturing same
In an organic EL element, a concave-convex pattern layer having a first concave-convex shape, a first electrode, an organic layer, and a second electrode layer are stacked on a substrate in this order. Further, an auxiliary layer is provided between the concave-convex pattern layer and the first electrode. A surface of the auxiliary layer on the first electrode side has a second concave-convex shape. The change ratio of the standard deviation of depths of the second concave-convex shape with respect to the standard deviation of depths of the first concave-convex shape is 70% or less. The organic EL light-emitting element, which has a high light extraction efficiency while preventing the occurrence of a leak current, can be obtained.
US09219251B2 Organic light emitting display apparatus
An organic light emitting display apparatus includes a substrate divided into a first light emission region, and a transmission region adjacent to the first light emission and through which an external light is transmitted, an organic light emitting device on the substrate and in the first light emission region, and including a pixel electrode, an intermediate layer on the pixel electrode and including an organic light emission layer, and an opposite electrode on the intermediate layer; and a light scattering layer on the substrate and in the transmission region, and configured to scatter a light incident thereto from the intermediate layer in the first light emission region.
US09219250B2 Optical film for reducing color shift and organic light-emitting display device employing the same
An optical film includes: a high refractive index pattern layer including a material having a refractive index greater than 1 and having a first surface and a second surface which face each other, where a plurality of grooves is defined in the first surface, and each of the plurality of grooves is defined by a curved surface portion of the first surface of the high refractive index pattern and has a depth greater than a width thereof; and a low refractive index pattern layer including a plurality of protruding patterns disposed in the plurality of grooves, having a refractive index less than the refractive index of the high refractive index pattern layer, and including a plurality of layers having different refractive indices from each other.
US09219246B2 Organic electronic device with encapsulation
The invention relates to an organic electronic device, particularly an OLED device (100), and to a method for its manufacturing. The device (100) comprises at least one functional unit (LU1, LU2, LU3) with an organic layer (120). On top of this functional unit (LU1, LU2, LU3), at least one inorganic encapsulation layer (140, 141) and at least one organic encapsulation layer (150, 151) are disposed in which at least one conductive line (161, 162) is embedded. In this way an OLED with a thin film encapsulation can be provided that can electrically be contacted at contact points (CL) on its back side.
US09219245B2 Organic light emitting diode display and manufacturing method thereof
An organic light emitting diode (OLED) display comprises: a thin film transistor substrate including an organic light emitting element; and a sealing substrate attached to the thin film transistor substrate, thereby sealing the thin film transistor substrate. The sealing substrate has a folded portion enclosing a side surface and a bottom surface of an edge portion of the thin film transistor substrate.
US09219244B2 Organic light-emitting display apparatus and method of manufacturing organic light-emitting display apparatus
An organic light-emitting display apparatus basically comprises a thin film transistor, an organic light-emitting device and a pad electrode, and provides an improved adhesive force between a pad portion and an electrode and a stable signal supply. A method of manufacturing the organic light-emitting display apparatus comprises mask processes for forming on a curve layer of a thin film transistor, a pixel electrode and a first pad electrode, a gate electrode and a second pad electrode, contact holes and an interlayer insulating layer, source and drain electrodes and a third pad electrode, and a pixel define layer.
US09219242B2 Organic electroluminescent element
An organic EL device includes a pair of electrodes and an organic compound layer between pair of electrodes. The organic compound layer includes an emitting layer including a first material, a second material and a third material, in which singlet energy EgS(H) of the first material, singlet energy EgS(H2) of the second material, and singlet energy EgS(D) of the third material satisfy a specific relationship.
US09219236B2 Organometal complex and light-emitting element using the same
An organometallic complex according to the present invention comprises a structure represented by the following general formula (1). In the formula, R1 to R5 are any one selected from the group consisting of hydrogen, a halogen element, an acyl group, an alkyl group, an alkoxy group, an aryl group, a cyano group, and a heterocyclic group, Ar is an aryl group having an electron-withdrawing group or a heterocyclic group having electron-drawing group, and M is an element of Group 9 or an element of Group 10.
US09219228B2 Semiconductor device and method for producing semiconductor device
The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased. The semiconductor device of the present invention comprises a first pillar-shaped semiconductor layer, a gate insulating film formed around the first pillar-shaped semiconductor layer, a gate electrode made of a metal and formed around the gate insulating film, a gate line made of a metal and connected to the gate electrode, a second gate insulating film formed around an upper portion of the first pillar-shaped semiconductor layer, a first contact made of a second metal and formed around the second gate insulating film, a second contact which is made of a third metal and which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer, a second diffusion layer formed in a lower portion of the first pillar-shaped semiconductor layer, a pillar-shaped insulating layer formed on the second contact, a resistance-changing film formed around an upper portion of the pillar-shaped insulating layer, a lower electrode formed around a lower portion of the pillar-shaped insulating layer and connected to the resistance-changing film, a reset gate insulating film that surrounds the resistance-changing film, and a reset gate that surrounds the reset gate insulating film.
US09219221B2 Piezoelectric actuator having prismatic piezoelectric element
A piezoelectric actuator includes a prismatic piezoelectric element body having side surfaces, and external surface electrodes provided on at least three of the side surfaces of the piezoelectric element body.
US09219218B2 Method of manufacturing electric wiring layer, member for forming electric wiring layer, electric wiring layer, method of manufacturing electric wiring board, member for forming electric wiring board, electric wiring board, vibrator, electronic apparatus, and moving object
A method of manufacturing an electric wiring layer including an electric wiring includes obtaining a pressed powder molded layer by pressurizing a powder including a metal particle with an insulating layer, the metal particle being constituted by a metal particle having conductivity and a surface insulating layer which is located on a surface of the metal particle and which mainly contains a glass material; and irradiating the pressed powder molded layer with energy rays and forming the electric wiring in an irradiation region.
US09219215B1 Nanostructures having high performance thermoelectric properties
The invention provides for a nanostructure, or an array of such nanostructures, each comprising a rough surface, and a doped or undoped semiconductor. The nanostructure is an one-dimensional (1-D) nanostructure, such a nanowire, or a two-dimensional (2-D) nanostructure. The nanostructure can be placed between two electrodes and used for thermoelectric power generation or thermoelectric cooling.
US09219214B2 Thermoelectric conversion element and producing method thereof
The invention provides a thermoelectric conversion element having a lot of pn junction pairs per unit area and having a thermoelectric material chip which is hardly broken, and a producing method thereof. In the thermoelectric conversion element of the invention, plural substrates in each of which a film-shaped thermoelectric material is formed in a surface thereof are disposed. As a result, because the number of pn junction pairs per unit area is increased, a high output can be obtained. Because the thermoelectric material is formed into the film shape, reliability degradation caused by a breakage of the thermoelectric material can be prevented, even in the thermoelectric material having many pn junction pairs per unit area, namely, a sectional area is small.
US09219213B2 Cooking stoves
A solid fuel, portable stove reduces smoke emissions and provides for a high temperature of combustion in a compact and easily manufacturable design. A main housing (11) comprises a combustion chamber (12) for containing fuel for combustion and a fan (50) configured to force air into the combustion chamber. A rechargeable electrical power source (40) is used for driving the fan (50) and a thermoelectric element (31) provides power to the fan and to the rechargeable power source. In one embodiment, the thermoelectric element also provides excess output power to a connected device (D) such as a low voltage white light emitting diode, thereby providing a self illuminating, rechargeable stove which is suitable for sunset or early evening cooking.
US09219212B2 Display apparatus and television receiving apparatus
Disclosed is a display apparatus, wherein a holding frame includes a placing portion which protrudes in a direction substantially perpendicular to a back surface of a display panel (a liquid crystal panel 1), and is long in a direction along a side face of the display panel (the liquid crystal panel 1), such that a heat dissipater (a heat spreader) is placed on the placing portion in a longitudinal direction thereof, the substrate (a base substrate) has information (rank information) regarding the light emitting element (a white LED) described on the other surface thereof, and the heat dissipater (the heat spreader) has an opening portion (a window portion 46) formed in a surface thereof to which the substrate (the base substrate) is fixed at a position corresponding to a position in which the information (the rank information) is described.
US09219210B2 Method for producing optoelectronic semiconductor components, leadframe assemblage and optoelectronic semiconductor component
A method serves to produce optoelectronic semiconductor components. A leadframe assemblage includes a number of leadframes. The leadframes each comprise at least two leadframe parts and are connected together at least in part via connecting webs. Electrical connections are attached between neighboring leadframes. A potting body connects the leadframes and the leadframe parts mechanically together. At least some of the connecting webs are removed and/or interrupted, the resulting structure is singulated into the semiconductor components.
US09219209B2 P-N separation metal fill for flip chip LEDs
A light emitting diode (LED) structure (10) has semiconductor layers, including a p-type layer, an active layer, and an n-type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface through which light is emitted. Portions of the p-type layer and active layer are etched away to expose the n-type layer. The surface of the LED is patterned with a photoresist, and copper is plated over the exposed surfaces to form p and n electrodes electrically contacting their respective semiconductor layers. There is a gap between the n and p electrodes. To provide mechanical support of the semiconductor layers between the gap, a dielectric layer (34) is formed in the gap followed by filling the gap with a metal (42). The metal is patterned to form stud bumps (40, 42, 44) that substantially cover the bottom surface of the LED die, but do not short the electrodes. The substantially uniform coverage supports the semiconductor layer during subsequent process steps.
US09219206B2 Package and manufacturing method of the same
Provided are a package including a first conductive layer on a patterned layer, an insulating layer on the patterned layer burying the first conductive layer, a second conductive layer on an outer surface of the insulating layer, and a third conductive layer in the insulating layer electrically connecting the first conductive layer with the second conductive layer. A substrate is formed by printing or coating a paste- or ink-type insulator and conductor on a patterned layer formed on a sapphire wafer. No void is created between the substrate and LED chip, thus enhancing attachment strength. The ceramic-containing insulator is cured at a low temperature, thereby minimizing contraction of and damage to the wafer when the ceramic is fired. Printing methods utilizing viscous paste or ink solves problems with co-planarity of substrate that occur in existing wafer-to-wafer bonding processes and renders several steps of the existing substrate manufacturing process unnecessary.
US09219201B1 Blue light emitting devices that include phosphor-converted blue light emitting diodes
Light emitting devices include a blue LED that emits blue light having a peak wavelength between 430 nanometers and 480 nanometers and a recipient luminophoric medium that includes luminescent materials that down-convert a portion of the blue light emitted by the blue LED to light having a peak wavelength that is between about 500 nanometers and about 545 nanometers. The combination of the blue light emitted by the blue LED and the light emitted by the luminescent materials in the recipient luminophoric medium comprises light that is perceived as blue light having a color point that falls within the region on the 1931 CIE Chromaticity Diagram defined by ccx, ccy chromaticity coordinates of (0.1355, 0.0399), (0.175, 0.0985), (0.1743 0.1581), (0.1096, 0.0868), (0.1355, 0.0399).
US09219200B2 Large emission area light-emitting devices
Light-emitting devices, and related components, systems and methods are disclosed.
US09219199B2 Method of producing an optoelectronic component having a sulfur-adhesion layer bonded to a dielectric layer
An optoelectronic component includes a semiconductor layer sequence having an optoelectronically active region; a dielectric layer on the semiconductor layer sequence; and a metal layer on the dielectric layer, wherein an adhesion layer is arranged between the dielectric layer and the metal layer, the adhesion layer being covalently bonded to the dielectric layer and to the metal layer.
US09219198B2 Method for forming metal electrode, method for manufacturing semiconductor light emitting elements and nitride based compound semiconductor light emitting elements
A method for forming a metal electrode and a method for manufacturing semiconductor light emitting elements include providing a substrate having a semiconductor layer formed thereon; forming a bonding metal layer and a reflective metal layer on the semiconductor layer; and forming a metal electrode by layer inversion of the bonding metal layer and the reflective metal layer through a heat treatment process. An interface characteristic between a semiconductor layer and an electrode having a reflective metal layer is enhanced by a layer inversion phenomenon. High reflectivity can be obtained, because a reflection metal layer is uniformly distributed on a semiconductor layer. Further, out-diffusion of a reflective metal layer is prevented through layer inversion to enhance the thermal stability of an electrode. And the number of accepters for generating holes is increased through heat treatment under an oxygen atmosphere, so that contact resistance can be lowered.
US09219191B2 Tuneable quantum light source
A photon source comprising a semiconductor heterostructure, said semiconductor heterostructure comprising a quantum well, a barrier region adjacent said quantum well and a quantum dot provided in said quantum well, the photon source further comprising electrical contacts and a power supply coupled to first and second electrical contacts configured to apply a tuneable electric field across said quantum dot to control the emission energy of said quantum dot, said electric field being tuneable across an operating range an wherein the tunneling time of carriers from said quantum dot to said first electrical contact and the tunneling time of carriers from said quantum dot to said second electrical contact are greater than the radiative decay time of an exciton in said quantum dot over said operating range for controlling the emission energy, said photon source being configured such that emission from a single quantum dot exits said photon source.
US09219188B2 Optoelectronic semiconductor structure and method for transporting charge carriers
An optoelectronic semiconductor structure (20) comprises an n-type semiconductor region (3); a p-type semiconductor region (1); a p-n junction formed between the n-type and p-type semiconductor regions; and an active region (2). According to the present invention, the optoelectronic semiconductor structure (20) is configured to transport, when in use, charge carriers between the active region (2) and each of the retype semiconductor region (3) and the p-type semiconductor region (1) through a single substantially planar boundary surface (9) of the active region.
US09219186B2 Electrodeposition of thin-film cells containing non-toxic elements
A structure and method of making a thin-film solar cell is provided. A thin-film solar cell includes a substrate, absorber layer and a buffer layer. The absorber layer is deposited by a single-step bulk electrochemical process, or a multi-layer electrochemical process. The buffer layer is deposited by an electrochemical deposition process such as a multi-layer deposition or an atomic layer deposition. The absorber and buffer layers are non-toxic materials which can include sulfur incorporated during the deposition process or incorporated after deposition by an anneal step.
US09219182B2 Optoelectronic devices incorporating fluoropolymer compositions for protection
The fluoropolymer compositions of the present invention generally incorporate ingredients comprising one or more fluoropolymers, an ultraviolet light protection component (hereinafter UV protection component), and optionally one or more additional ingredients if desired. The UV protection component includes a combination of at least one hindered tertiary amine (HTA) compound having a certain structure and a weight average molecular weight of at least 1000. This tertiary amine is used in combination with at least one organic, UV light absorbing compound (UVLA compound) having a weight average molecular weight greater than 500. When the HTA compound and the UVLA compound are selected according to principles of the present invention, the UV protection component provides fluoropolymer compositions with significantly improved weatherability characteristics for protecting underlying materials, features, structures, components, and/or the like. In particular, fluoropolymer compositions incorporating the UV protection component of the present invention have unexpectedly improved ability to resist blackening, coloration, or other de gradation that may be caused by UV exposure. As a consequence, devices protected by these compositions would be expected to have dramatically improved service life. The compositions have a wide range of uses but are particularly useful for forming protective layers in optoelectronic devices.
US09219180B2 Optoelectronic arrangement provided with a semiconductor nanowire with a longitudinal section that is surrounded by a part of a mirror
The optoelectronic arrangement comprises a semiconductor nanowire intended to participate in the processing, notably in a reception and/or an emission, of a light concerned and a mirror reflecting the light concerned. The semiconductor nanowire comprises a first section and a second section, and the mirror surrounds, at least longitudinally, the first section of the semiconductor nanowire, said second section extending out of the mirror.
US09219179B2 Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates
A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate.
US09219176B2 Radial ray detector and method for manufacturing the same
A light receiving section and a substrate-side electrode pad of a photoelectric conversion substrate, a base-side electrode pad and an interconnect arranged on a surface side of a base are integrally coated with a protective layer. A scintillation layer is formed on a surface side of the protective layer. Corrosion of a photoelectric conversion element of the light receiving section, the electrode pads and the interconnect is prevented by the protective layer. When they are integrally coated with the protective layer, the light receiving section and the substrate-side electrode pad of the photoelectric conversion substrate can be arranged with a distance therebetween shortened, thereby realizing miniaturization of a detector and enlargement of the light receiving section.
US09219174B2 Module fabrication of solar cells with low resistivity electrodes
One embodiment of the present invention provides a solar module. The solar module includes a front-side cover, a back-side cover, and a plurality of solar cells situated between the front- and back-side covers. A respective solar cell includes a multi-layer semiconductor structure, a front-side electrode situated above the multi-layer semiconductor structure, and a back-side electrode situated below the multi-layer semiconductor structure. Each of the front-side and the back-side electrodes comprises a metal grid. A respective metal grid comprises a plurality of finger lines and a single busbar coupled to the finger lines. The single busbar is configured to collect current from the finger lines.
US09219172B2 Optoelectronic component
An optoelectronic component having an outer surface facing the environment of the optoelectronic component and which is formed by a hydrophobic layer applied at least partly on a surface of the optoelectronic component.
US09219170B2 Trench schottky rectifier device and method for manufacturing the same
A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage.
US09219167B2 Non-volatile memory (NVM) cell
A method of forming a flash memory cell includes forming a first hard mask and a second hard mask on a substrate. A select gate is formed as a spacer around the first hard mask. A charge storage layer is formed over the first and second hard masks and the select gate. A control gate is formed as a spacer around the second hard mask. A recess in the control gate is filled with a dielectric material. The recess is formed between a curved sidewall of the control gate and a sidewall of the charge storage layer directly adjacent the curved sidewall of the control gate.
US09219163B2 Display device and manufacturing method thereof
The display device includes a gate electrode, a gate insulating film provided over the gate electrode, a semiconductor film provided over the gate insulating film to overlap with the gate electrode, an island-shaped first insulating film provided over the semiconductor film to overlap with the gate electrode, a first conductive film provided over the semiconductor film, a pair of second conductive films which is provided over the semiconductor film and between which the first insulating film is sandwiched, and a second insulating film provided over the first insulating film, the first conductive film, and the pair of second conductive films. In the second insulating film and the semiconductor film, an opening portion which is positioned between the first conductive film and the one or the other of the pair of second conductive films is provided.
US09219156B2 Display substrate and method of manufacturing the same
A display substrate includes a gate line disposed on a base substrate and extending in a direction. A data line crosses the gate line. A thin film transistor comprises a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The thin film transistor is connected to the gate line and the data line. A pixel electrode is connected to the thin film transistor. A light blocking pattern overlaps the semiconductor pattern. The light blocking pattern includes a haze-processed material of substantially the same material as the pixel electrode.
US09219147B2 LDMOS with improved breakdown voltage
An LDMOS is formed with a field plate over the n− drift region, coplanar with the gate stack, and having a higher work function than the gate stack. Embodiments include forming a first conductivity type well, having a source, surrounded by a second conductivity type well, having a drain, in a substrate, forming first and second coplanar gate stacks on the substrate over a portion of the first well and a portion of the second well, respectively, and tuning the work functions of the first and second gate stacks to obtain a higher work function for the second gate stack. Other embodiments include forming the first gate stack of a high-k metal gate and the second gate stack of a field plate on a gate oxide layer, forming the first and second gate stacks with different gate electrode materials on a common gate oxide, and forming the gate stacks separated from each other and with different gate dielectric materials.
US09219146B2 High voltage PMOS and the method for forming thereof
A high voltage PMOS replacing the lightly doped region of the drain region with a low voltage P-well adopted in the low voltage devices, so as to save a mask. In order to achieve the high breakdown voltage and the low on resistance, a thick gate oxide applied in the DMOS is inserted. The N-type well region surrounding the source region may be replaced by a low voltage N-well adopted in the low voltage device to further save a mask.
US09219145B2 Semiconductor device and method of manufacturing the same
To satisfy both suppression of rise in contact resistance and improvement of breakdown voltage near the end part of a trench part. The trench part GT is provided between a source offset region and a drain offset region at least in plan view in a semiconductor layer, and is provided in a source-drain direction from the source offset region toward the drain offset region in plan view. A gate insulating film GI covers the side surface and the bottom surface of the trench part GT. A gate electrode is provided in the trench part at least in plan view, and contacts the gate insulating film GI. A contact GC contacts the gate electrode GE. The contact GC is disposed, shifted in a first direction perpendicular to the source-drain direction relative to the centerline in the trench part GT extending in the source-drain direction in plan view, and is provided in the trench part GT in plan view.
US09219143B2 Semiconductor device and super junction semiconductor device having semiconductor mesas
A semiconductor device includes semiconductor mesas of a first conductivity type extending between a first surface and a bottom plane of a semiconductor portion, and a semiconductor structure of a second, complementary conductivity type extending along sidewalls of the semiconductor mesas and outwardly from the semiconductor mesas. A thickness of the semiconductor structure has a local maximum value at a first distance to both the first surface and the bottom plane.
US09219139B2 Semiconductor devices having fin structures, and methods of forming semiconductor devices having fin structures
A semiconductor device including at least two fin structures on a substrate surface and a functional gate structure present on the at least two fin structures. The functional gate structure includes at least one gate dielectric that is in direct contact with at least the sidewalls of the two fin structures, and at least one gate conductor on the at least one gate dielectric. The sidewall of the gate structure is substantially perpendicular to the upper surface of the substrate surface, wherein the plane defined by the sidewall of the gate structure and a plane defined by an upper surface of the substrate surface intersect at an angle of 90°+/−5°. An epitaxial semiconductor material is in direct contact with the at least two fin structures.
US09219134B2 Semiconductor device and method of manufacturing the same
A semiconductor device has a semiconductor layer, a floating gate electrode provided over the semiconductor layer via a first insulation film, and an erase gate electrode to which an erase voltage is applied. The floating gate electrode has an opposing region that opposes via a second insulation film to the erase gate electrode. The opposing region has such a shape that multiple electric field concentrating portions are formed when the erase voltage is applied to the erase gate electrode.
US09219133B2 Method of making a semiconductor device using spacers for source/drain confinement
A method of making a semiconductor device includes forming a first spacer for at least one gate stack on a first semiconductor material layer, and forming a respective second spacer for each of source and drain regions adjacent the at least one gate. Each second spacer has a pair of opposing sidewalls and an end wall coupled thereto. The method includes filling the source and drain regions with a second semiconductor material while the first and second spacers provide confinement.
US09219123B2 Method of producing a nitride semiconductor crystal with precursor containing carbon and oxygen, and nitride semiconductor crystal and semiconductor device made by the method
A method of producing a nitride semiconductor crystal uses a metal organic chemical vapor deposition process and offers good controllability with respect to a p-type nitride semiconductor crystal. To that end, an organic metal compound of a group III element, a hydride of nitrogen, and an organic compound having any of the partial structures C—C—O, C—C═O, C═C—O, C═C═O, C≡C—O, and C—O—C are used as source materials, and by a metal organic chemical vapor deposition process, C and O atoms are simultaneously introduced into the crystal to obtain p-type conductivity.
US09219120B2 Semiconductor film with adhesion layer and method for forming the same
Presented herein is a method for forming a semiconductor film using an adhesion layer, comprising providing an oxide layer disposed over a substrate, forming at least one adhesion layer over the oxide layer, and forming a film layer over the at least one adhesion layer in a same process step as the forming the at least one adhesion layer. Forming the at least one adhesion layer further comprises at least forming a first adhesion layer over the oxide layer and forming a second adhesion layer over the first adhesion layer. Forming the first adhesion layer comprises providing the terminating gas at a substantially constant first flow rate, and wherein the forming the second adhesion layer comprises ramping a flow rate of the terminating gas to a zero flow rate from the first flow rate.
US09219113B2 Semiconductor device having breakdown voltage enhancement structure
A semiconductor device includes a substrate of a first conductivity type, a first impurity region of a second conductivity type formed on a top surface side of the substrate, a second impurity region of the second conductivity type formed on the top surface side of the substrate and in contact with the first impurity region, the second impurity region laterally surrounding the first impurity region and having a greater depth than the first impurity region, as viewed in cross-section, and a breakdown voltage enhancing structure of the second conductivity type formed to laterally surround the second impurity region. A boundary between the first and second impurity regions has a maximum impurity concentration equal to or less than that of the second impurity region, and a current is applied between a top surface and a bottom surface of the substrate.
US09219111B2 Nitride semiconductor structure and method of preparing the same
A nitride semiconductor structure of the present invention is obtained by growing an h- or t-BN thin film (12) and a wurtzite-structure AlxGa1-xN (x>0) thin film (14) as buffer layers and forming a single-crystal wurtzite-structure AlGaInBN thin film (13) thereon. While GaN, AlGaN, AlN, and the like have the wurtzite structure with sp3 bonds, h-BN or t-BN has the graphite structure with sp2 bonds, and has a completely different crystal structure. Accordingly, it has heretofore not been considered that a wurtzite-structure AlGaInBN thin film can be grown on a graphite-structure h-BN thin film. However, when a wurtzite-structure AlxGa1-xN (x>0) thin film (14) is formed as a buffer layer on a graphite-structure boron nitride thin film (12), a wurtzite-structure AlGaInBN (13) nitride semiconductor structure such as GaN can be grown on the buffer layer.
US09219110B2 MIM capacitor structure
The present disclosure relates to a MIM capacitor, and an associated method of formation. In some embodiments, the MIM capacitor has a first electrode having a bottom capacitor metal layer disposed over a semiconductor substrate. A second electrode having a middle capacitor metal layer overlies the bottom capacitor metal layer. A third electrode having a top capacitor metal layer has a stepped structure is laterally and vertically separated from the middle capacitor metal layer by a capacitor dielectric layer continuously extends from a first position between the bottom capacitor metal layer and the middle capacitor metal layer, to a second position between the middle capacitor metal layer and the top capacitor metal layer. The capacitor dielectric layer allows for the MIM capacitor to have a structure that improves fabrication of the capacitor.
US09219108B2 Semiconductor device and method of manufacturing the same
A semiconductor device including a semiconductor substrate having a main surface; a first insulating layer formed on the main surface and having a first main surface, the first main surface including a first region and a second region without the first area; a first coil formed on the first region of the first insulating layer; a plurality of first wirings formed on the second region of the first insulating layer; a second insulating layer formed on the first coil and on the first wirings, the second insulating layer having a second main surface; a third insulating layer formed on the second main surface above the first region of the first insulating layer and having a third main surface; and a second coil formed on the third main surface of the third insulating layer.
US09219107B2 Inductive element with interrupter region and method for forming
A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is over the top surface. An inductive element is over the dielectric layer, wherein the inductive element is over the first doped regions.
US09219104B2 Self-emissive display and manufacturing method thereof
A self-emissive display and manufacturing method thereof are disclosed. In one aspect, the device includes a substrate, a first electrode formed over the substrate, and a pixel defining layer (PDL) formed above at least an end portion of the first electrode, wherein the PDL defines a light emission area and a non-emission area. A light-emitting layer is formed over the first electrode in the light emission area and a second electrode is formed over the light-emitting layer. A protrusion is formed in the PDL in an area over the end portion of the first electrode.
US09219102B2 Flexible organic electroluminescent device having an island patterned silicon nitride layer
A flexible organic electroluminescent device is disclosed which includes: a flexible substrate; a buffer layer entirely formed on the flexible substrate; a thin film transistor formed on the buffer layer and configured to include an active layer; a planarization film formed to cover the thin film transistor; an organic light emitting diode formed on the planarization film and configured to include a first electrode, an organic emission layer and a second electrode; and at least one silicon nitride layer formed above the active layer of the thin film transistor but under the planarization film and patterned into a plurality of island patterns.
US09219099B1 Memory structure and preparation method thereof
A memory structure includes a control unit and a memory unit electrically connected to the control unit. The control unit includes a source and a drain; an active layer in contact with a portion of the source and a portion of the drain; a gate layer; and a gate insulation layer disposed between the active layer and the gate layer. The memory unit includes a bottom electrode layer; a top electrode layer; and a resistive switching layer interposed between the bottom electrode layer and the top electrode layer, which the resistive switching layer and the active layer are formed of aluminum zinc tin oxide (AZTO).
US09219097B2 Method for production of solid-state imaging element, solid-state imaging element, and imaging apparatus
A method for producing a solid-state imaging element which has photoconversion pixels, the method including forming an impurity region of the first conduction type and a second impurity region of the second conduction type on the impurity region of the first conduction type by ion implantation by using the same mask; forming on the surface of the semiconductor substrate a transfer gate constituting the charge transfer section which extends over the second impurity region of the second conduction type; forming a charge accumulating region of the first conduction type constituting the sensor section by ion implantation; and forming a first impurity region of the second conduction type, which has a higher impurity concentration than the second impurity region of the second conduction type, by ion implantation.
US09219092B2 Grids in backside illumination image sensor chips and methods for forming the same
A device includes a semiconductor substrate, which has a front side and a backside. A photo-sensitive device is disposed on the front side of the semiconductor substrate. A first and a second grid line are parallel to each other, and are disposed on the backside of, and overlying, the semiconductor substrate. A stacked layer includes an adhesion layer, a metal layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.
US09219091B2 Low profile sensor module and method of making same
A host substrate assembly includes a first substrate with opposing first and second surfaces, an aperture extending therethrough, circuit layers, and first contact pads electrically coupled to the circuit layers. A sensor chip includes a second substrate with opposing first and second surfaces, a plurality of photo detectors formed on or in the second substrate and configured to receive light incident on the second substrate first surface, and a plurality of second contact pads formed at the second substrate first or second surfaces and are electrically coupled to the photo detectors. A spacer is mounted to the second substrate first surface. A protective substrate is mounted to the spacer and disposed over the photo detectors. Electrically conductive conduits each extend through the spacer and are in electrical contact with one of the second contact pads. Electrical connectors electrically connect the first contact pads and the conduits.
US09219088B2 Array substrate, manufacturing method thereof, and display device
Embodiments of the present invention provide an array substrate, a manufacturing method thereof, and a display device. The array substrate comprises: a pixel region, a data-line pad region and a gate-line pad region; the pixel region comprises: a pixel electrode, a gate electrode of a TFT, source and drain electrodes of the TFT, a connection electrode, and a common electrode; the data-line pad region comprises: an insulating layer, a semiconductor layer, a data line, and a data-line connection pad; the data line and the source and drain electrodes are of a same layer and a same material; and the gate-line pad region comprises: a gate line, an insulating layer, and a gate-line connection pad; the gate line and the gate electrode are of a same layer and a same material; and the gate-line connection pad and the source and drain electrodes are of a same layer and a same material. The array substrate can reduce the number of masks and exposure times, thereby reducing manufacturing costs and improving production efficiency.
US09219084B2 Display device including a thin film transistor having wiring and electrodes with different ionization tendencies
A display device includes a thin film transistor and a wiring layer. The thin film transistor including a control electrode, a semiconductor layer facing the control electrode, a first electrode electrically connected to the semiconductor layer, and a second electrode including a metal film having resistance lower than that of the light transmissive material. The second electrode is electrically connected to each of the semiconductor layer and the wiring layer. A difference in ionization tendency between a material configuring the metal film and a conductive material configuring a part or whole of the wiring layer is smaller than a difference in ionization tendency between the light transmissive material and the conductive material.
US09219083B1 Array substrate and liquid crystal display panel
The present invention provides an array substrate and a liquid crystal display panel. In the array substrate, as to thin film transistors connected with one scan line, a width-to-length ratio of the thin film transistor(s) corresponding to the middle of the scan line is larger than the width-to-length ratio of the thin film transistors corresponding to two ends of the scan line, and thereby when data lines input voltage signals, a voltage difference between a pixel electrode(s) connected with the thin film transistor(s) corresponding to the middle of the scan line and the pixel electrodes connected with the thin film transistors corresponding to the two ends of the scan line is smaller than a threshold value. By the above described manner, the present invention can improve the uniformity of image brightness.
US09219079B2 Group III-N transistor on nanoscale template structures
A III-N semiconductor channel is formed on a III-N transition layer formed on a (111) or (110) surface of a silicon template structure, such as a fin sidewall. In embodiments, the silicon fin has a width comparable to the III-N epitaxial film thicknesses for a more compliant seeding layer, permitting lower defect density and/or reduced epitaxial film thickness. In embodiments, a transition layer is GaN and the semiconductor channel comprises Indium (In) to increase a conduction band offset from the silicon fin. In other embodiments, the fin is sacrificial and either removed or oxidized, or otherwise converted into a dielectric structure during transistor fabrication. In certain embodiments employing a sacrificial fin, the III-N transition layer and semiconductor channel is substantially pure GaN, permitting a breakdown voltage higher than would be sustainable in the presence of the silicon fin.
US09219078B2 Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs
A method for semiconductor fabrication includes providing channel regions on a substrate including at least one Silicon Germanium (SiGe) channel region, the substrate including a plurality of regions including a first region and a second region. Gate structures are formed for a first n-type field effect transistor (NFET) and a first p-type field effect transistor (PFET) in the first region and a second NFET and a second PFET in the second region, the gate structure for the first PFET being formed on the SiGe channel region. The gate structure for the first NFET includes a gate material having a first work function and the gate structures for the first PFET, second NFET and second PFET include a gate material having a second work function such that multi-threshold voltage devices are provided.
US09219077B2 Semiconductor device and fabrication method therefor
A semiconductor device includes: a first substrate on which a first field effect transistor is provided; and a second substrate on which a second field effect transistor of a second conductive type is provided; the first and second substrates being bonded to each other at the substrate faces thereof on which the first and second field transistors are provided, respectively; the first field effect transistor and the second field effect transistor being electrically connected to each other.
US09219076B2 Nonvolatile semiconductor memory device and method for manufacturing the same
On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface of the trench, and a channel silicon crystalline film is formed on the silicon oxide film. Next, a silicon oxide layer is formed at an interface between the silicon oxide film and the channel silicon crystalline film by performing thermal treatment in an oxygen gas atmosphere.
US09219073B2 Parallelogram cell design for high speed vertical channel 3D NAND memory
Roughly described, a memory device has a multilevel stack of conductive layers. Pillars oriented orthogonally to the substrate each include series-connected memory cells at cross-points between the pillars and the conductive layers. String select lines (SSLs) are disposed above the conductive layers, and bit lines are disposed above the SSLs. The pillars are arranged on a regular grid having a unit cell which is a non-rectangular parallelogram. The pillars may be arranged so as to define a number of parallel pillar lines, each having an acute angle θ>0° relative to the bit line conductors, each line of pillars having n>1 pillars intersecting a common one of the SSL. The arrangement permits higher bit line density, a higher data rate due to increased parallelism, and a smaller number of SSLs, thereby reducing disturbance, reducing power consumption and reducing unit cell capacitance.
US09219071B1 Semiconductor device
A semiconductor device includes a substrate, a plurality of element regions that are partitioned in a line-and-space shape and extend in a first direction in the substrate, a plurality of selection gates that are formed on the substrate to extend in a second direction intersecting the first direction. In addition, the semiconductor device includes a contact region that includes a plurality of contact plugs which are provided between two selection gates adjacent to each other and are connected to the respective element regions in the substrate. Further, the contact plug includes an upper portion and a lower portion. The upper portion has a first width and is formed of a first conductive film and a second conductive film. The lower portion has a second width smaller than the first width and is formed of the first conductive film.
US09219067B2 Configuration bit architecture for programmable integrated circuit device
An array of memory cells on an integrated circuit device includes a plurality of memory cells arranged in at least one column. Each of the memory cells includes a plurality of transistors forming two complementary memory nodes. Each of the complementary memory nodes is connected to a respective pair of pull-up or pull-down transistors, which are connected in series and have a shared node between them. For a particular one of the memory cells, one of the shared nodes associated with one of the complementary memory nodes is directly connected to a corresponding respective shared node associated with a corresponding complementary memory node in a second one of the memory cells, and another of the shared nodes associated with another of the complementary memory nodes is directly connected to a corresponding shared node associated with a corresponding complementary memory node in a third one of the memory cells.
US09219066B2 Method of manufacturing semiconductor storage device and semiconductor storage device
Method of manufacturing a semiconductor device includes forming, in a first region, a first trench through a second gate electrode film and an interelectrode insulating film, and a second trench partially extending into a sacrificial film in an isolation trench, filling the second trench with a first insulating film; forming a third gate electrode film above the second gate electrode film and into the first trench such that the third gate electrode film contacts the first gate electrode film; etching the third and the second gate electrode film, the interelectrode insulating film, and the first gate electrode film to form select gate electrodes in the first region and a group of memory-cell gate electrodes in the second region; removing the sacrificial film; and forming a second insulating film over the element regions and the isolation trench to define an unfilled gap in the isolation trench below the memory-cell gate electrodes.
US09219062B2 Integrated circuits with improved source/drain contacts and methods for fabricating such integrated circuits
Integrated circuits and methods for fabricating integrated circuits are provided. In accordance with an exemplary embodiment, an integrated circuit includes a semiconductor substrate with a fin structure overlying the semiconductor substrate and having a source region, a drain region, and a channel region between the source region and drain region. The source region and the drain region each have a recessed surface. A source contact is adjacent the recessed surface in the source region and a drain contact is adjacent the recessed surface in the drain region. Linear current paths are defined from the channel region to the source contact and from the channel region to the drain contact.
US09219061B2 Semiconductor device and manufacturing method of semiconductor device
A semiconductor device capable of reducing an inter-source electrode resistance RSS(on) and reducing a chip size is provided. A semiconductor device according to the present invention includes a chip partitioned into three areas including a first area, a second area, and a third area, and a common drain electrode provided on a back surface of the chip, in which the second area is formed between the first and third areas, a first MOSFET is formed in the first area and the third area, and a second MOSFET is formed in the second area.
US09219060B2 Semiconductor device
According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, third, fourth, fifth, sixth, and seventh semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first electrode and the first semiconductor region. The third and fourth semiconductor regions are provided between the first electrode and the second semiconductor region. The fifth semiconductor region is positioned between the third semiconductor region and the second electrode, and is provided between the first semiconductor region and the second electrode. The sixth semiconductor region is positioned between the fourth semiconductor region and the second electrode, and is provided between the first semiconductor region and the second electrode. The seventh semiconductor region is provided between the fifth semiconductor region and the second electrode. The third electrode is provided on the seventh, fifth, and first semiconductor regions.
US09219057B2 Electrostatic discharge protection device and method for manufacturing the same
An electrostatic discharge (ESD) protection device for protecting an internal circuitry from being damaged during electrostatic discharge, and a method for manufacturing the ESD protection circuit are provided. The electrostatic discharge (ESD) protection device includes: a gate electrode over a substrate; first and second doping regions provided in the substrate exposed at both sides of the gate electrode, the first and second doping regions having the same conductivity type; a third doping region provided in the second doping region and having an opposite conductivity type to that of the second doping region; and fourth and fifth doping regions spaced apart from the gate electrode and provided in the substrate exposed at both sides of the gate electrode, the fourth and fifth doping regions having the same conductivity type as the first and second doping regions.
US09219056B2 Passive devices for FinFET integrated circuit technologies
Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A portion of a device layer of a semiconductor-on-insulator substrate is patterned to form a device region. A well of a first conductivity type is formed in the epitaxial layer and the device region. A doped region of a second conductivity type is formed in the well and defines a junction with a portion of the well. The epitaxial layer includes an exterior sidewall spaced from an exterior sidewall of the device region. Another portion of the device layer may be patterned to form fins for fin-type field-effect transistors.
US09219049B2 Compound structure and method for forming a compound structure
A compound structure including a carrier wafer and at least one semiconductor piece bonded onto the carrier wafer by a bonding material obtained by a ceramic-forming polymer precursor.
US09219048B2 Substrate having pillar group and semiconductor package having pillar group
The present disclosure provides a substrate and a semiconductor package. The substrate includes a body, at least one pad group, a plurality of traces and at least one pillar group. The pad group includes a plurality of pads. Each pad has at least one inner side and at least one outer side. The inner side of a first pad is faced to the inner side of an adjacent second pad with a spaced section between. Each pillar group includes a plurality of pillars disposed on respective ones of the pads. The use of pad groups having multiple pads on which to form pillars allows an increase in the number of the pillars available in a given area so as to increase the amount of I/O connections. Furthermore, for a given number of I/O connections, the area occupied by the pads, pillars and traces can be reduced.
US09219046B2 Strength of micro-bump joints
A device includes a work piece including a metal bump; and a dielectric layer having a portion directly over the metal bump. The metal bump and a surface of the portion of the dielectric layer form an interface. A metal finish is formed over and contacting the metal bump. The metal finish extends from over the dielectric layer to below the interface.
US09219044B2 Patterned photoresist to attach a carrier wafer to a silicon device wafer
Patterned photoresist is used to attach a carrier wafer to a silicon device wafer. In one example, a silicon wafer is patterned for contact bumps by applying a photoresist over a surface of the wafer and removing the photoresist in locations at which the contact bumps are to be formed. The contact bumps are formed in the locations at which the photoresist is removed. A temporary carrier is attached to the photoresist over the wafer. The back side of the wafer opposite the contact bumps is processed while handling the wafer using the temporary carrier. The temporary carrier is removed. The photoresist on the front side of the wafer with the contact bumps is removed after removing the temporary carrier.
US09219043B2 Wafer-level package device having high-standoff peripheral solder bumps
A wafer-level package device and techniques for fabricating the device are described that include a second integrated circuit chip electrically coupled to a base integrated circuit chip, where the second integrated circuit chip is placed on and connected to the base integrated circuit chip between multiple high-standoff peripheral pillars with solder bumps. In implementations, the wafer-level package device that employs example techniques in accordance with the present disclosure includes a base integrated circuit chip, multiple high-standoff peripheral pillars with solder bumps, and a second integrated circuit chip electrically coupled to the base integrated circuit chip and placed on the base integrated circuit chip in the center of an array of high-standoff peripheral pillars with solder bumps.
US09219042B2 Semiconductor device and manufacturing method thereof
Provided are a semiconductor device and a method of manufacturing the same. A carrier is removed after a first semiconductor die and a second semiconductor die are stacked on each other, and then a first encapsulant is formed, so that the carrier may be easily removed when compared to approaches in which a carrier is removed from a wafer having a thin thickness.
US09219039B2 Interposer and semiconductor package with noise suppression features
Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.
US09219038B2 Shielding for through-silicon-via
3D integrated circuit devices include first and second semiconductor bodies. The first semiconductor body has an active area, a through-silicon-via outside the active area, and two or more disjoint guard rings. The first guard ring encircles the via. The second guard ring encircles the active area, but not the via. The guard rings can reduce the noise coupling coefficient between the via and the active area to −60 dB or less at 3 GHz and 20 μm spacing.
US09219036B2 Interconnect structure for semiconductor devices
A method of manufacturing a semiconductor device with a cap layer for a copper interconnect structure formed in a dielectric layer is provided. In an embodiment, a conductive material is embedded within a dielectric layer, the conductive material comprising a first material and having either a recess, a convex surface, or is planar. The conductive material is silicided to form an alloy layer. The alloy layer comprises the first material and a second material of germanium, arsenic, tungsten, or gallium.
US09219035B2 Integrated circuit chips having vertically extended through-substrate vias therein
Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode.
US09219031B2 Chip arrangement, and method for forming a chip arrangement
A chip arrangement may include: a chip including a plurality of electrical nets, wherein each electrical net includes at least one bonding pad; and a plurality of pillars formed on the at least one bonding pad of a majority of the plurality of electrical nets, wherein the plurality of pillars may be configured to connect the at least one bonding pad of the majority of the plurality of electrical nets to a chip-external connection region.
US09219022B2 Cold plate with combined inclined impingement and ribbed channels
Heat transfer devices and methods for making the same that include a first enclosure having at least one inlet port; a second enclosure having a bottom plate and one or more dividing walls to establish channels, at least one internal surface of each channel having rib structures to create turbulence in a fluid flow; and a jet plate connecting the first enclosure and the second enclosure having impinging jets that convey fluid from the first enclosure to the channels, said impinging jets being set at an angular deviation from normal to cause local acceleration of fluid and to increase a local heat transfer rate.
US09219016B2 Structure design for 3DIC testing
A work piece includes a first copper-containing pillar having a top surface and sidewalls, and a first protection layer on the sidewalls, and not over the top surface, of the first copper-containing pillar. A test pad includes a second copper-containing pillar having a top surface and sidewalls. The test pad is electrically coupled to the first copper-containing pillar. A second protection layer is disposed on the sidewalls, and not over the top surface, of the second copper-containing pillar. The first and the second protection layers include a compound of copper and a polymer, and are dielectric layers.
US09219015B2 Phosphor layer-covered optical semiconductor element, producing method thereof, optical semiconductor device, and producing method thereof
A method for producing a phosphor layer-covered optical semiconductor element includes a step of opposing a phosphor layer containing a phosphor to an optical semiconductor element and an adjusting step of adjusting a color tone of light emitted from the optical semiconductor element and exited via the phosphor layer by adjusting the thickness of the phosphor layer.
US09219013B2 Technique for manufacturing semiconductor devices comprising transistors with different threshold voltages
When forming semiconductor devices including transistors with different threshold voltages, the different threshold voltages of transistors of the same conductivity type are substantially defined by performing different halo implantations. As the other implantations performed typically in the same manufacturing step, such as pre-amorphization, source and drain extension implantation and extra diffusion engineering implantations, may be identical for different threshold voltages, these implantations, in addition to a common halo base implantation, may be performed for all transistors of the same conductivity type in a common implantation sequence. Higher threshold voltages of specific transistors may be subsequently achieved by an additional low-dose halo implantation while the other transistors are covered by a resist mask. Thus, the amount of atoms of the implant species in the required resist masks is reduced so that removal of the resist masks is facilitated. Furthermore, the number of implantation steps is decreased compared to conventional manufacturing processes.
US09219012B2 Semiconductor device
A method for fabricating a semiconductor device is provided. A substrate comprising a P-well is provided. A low voltage device area and a high voltage device area are defined in the P-well. A photoresist layer is formed on the substrate. A photomask comprising a shielding region is provided. The shielding region is corresponded to the high voltage device area. A pattern of the photomask is transferred to the photoresist layer on the substrate by a photolithography process using the photomask. A P-type ion field is formed outside of the high-voltage device area by selectively doping P-type ions into the substrate using the photoresist layer as a mask.
US09219007B2 Double self aligned via patterning
A method including forming a penta-layer hardmask above a substrate, the penta-layer hardmask comprising a first hardmask layer above a second hardmask layer; forming a trench pattern in the first hardmask layer; transferring a first via bar pattern from a first photo-resist layer above the penta-layer hardmask into the second hardmask layer resulting in a first via pattern, the first via pattern in the second hardmask layer overlapping the trench pattern and being self-aligned on two sides by the trench pattern in the first hardmask layer; and transferring the first via pattern from the second hardmask layer into the substrate resulting in a self-aligned via opening, the self-aligned via opening being self-aligned on all sides by the first via pattern in the second hardmask layer.
US09219006B2 Flowable carbon film by FCVD hardware using remote plasma PECVD
Embodiments of the present invention generally relate to methods for forming a flowable carbon-containing film on a substrate. In one embodiment, an oxygen-containing gas is flowed into a remote plasma region to produce oxygen-containing plasma effluents, and a carbon-containing gas is combined with the oxygen-containing plasma effluents in a substrate processing region which contains the substrate. A carbon-containing film is formed in trenches which are formed on the substrate and a low K dielectric material is deposited on the carbon-containing film in the trenches. The carbon-containing film is decomposed by an UV treatment and airgaps are formed in the trenches under the low K dielectric material.
US09219005B2 Semiconductor system and device
A 3D IC based mobile system including: a first semiconductor layer including first mono-crystallized transistors, where the first mono-crystallized transistors are interconnected by at least one metal layer including aluminum or copper; a second layer including second mono-crystallized transistors and overlaying the at least one metal layer, where the at least one metal layer is in-between the first semiconductor layer and the second layer; a plurality of thermal paths between the second mono-crystallized transistors and a heat removal apparatus, where at least one of the plurality of thermal paths includes a thermal contact adapted to conduct heat and not conduct electricity; and a heat spreader layer between the second layer and the at least one metal layer.
US09218996B2 Substrate position aligner
A substrate position aligner includes a substrate holding assembly, a plurality of rollers, a rotation mechanism, and a sensor. The substrate holding assembly is configured to hold a substrate in a vertical orientation. The plurality of rollers include at least two idler rollers and a drive roller. Each roller has a point on its perimeter spaced on a common radius from a center of substrate rotation defined within the substrate holding assembly. The sensor is positioned approximately on the common radius and configured to detect the presence of an orientation cut in the substrate when the orientation cut is not orientated within a range between about −44 degrees and about +44 degrees from horizontal. A method of aligning a substrate having an orientation cut includes sensing a presence of the orientation cut when the orientation cut is not orientated within the above recited range.
US09218994B2 Two-dimensional transfer station used as interface between a process tool and a transport system and a method of operating the same
By providing a space-efficient transfer buffer system in a manufacturing environment, which may act as a local interface between an automated transport system and the load port assembly of a process tool under consideration, the I/O capability of the process tool may be significantly enhanced, while not unduly contributing to the overall width of the process tools. In particular embodiments, an array-like arrangement of respective buffer places is used, wherein each buffer place is accessible by the transport system and may also interact with each of the load ports of the process tool.
US09218993B2 Method of manufacturing semiconductor device and method of processing substrate
Provided is a method of forming a tantalum oxide-based film having good step coverage while controlling an oxygen concentration in the film. The method includes forming a tantalum nitride layer on a substrate by supplying a source gas including a tantalum and a nitriding agent into a process chamber wherein the substrate is accommodated under a condition where a chemical vapor deposition (CVD) reaction is caused; oxidizing the tantalum nitride layer by supplying an oxidizing agent into the process chamber under a condition where an oxidation reaction of the tantalum nitride layer by the oxidizing agent is unsaturated; and forming on the substrate a conductive tantalum oxynitride film wherein an oxygen is stoichiometrically insufficient with respect to the tantalum and a nitrogen by alternately repeating forming the tantalum nitride layer on the substrate and oxidizing the tantalum nitride layer a plurality of times.
US09218992B2 Hybrid laser and plasma etch wafer dicing using substrate carrier
Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.
US09218986B2 Hard mask edge cover scheme
A method includes forming at least one trench in a dielectric layer using a hard mask. An edge cover layer is formed over the hard mask. The at least one trench is filled with a metal layer.
US09218983B2 Etching method and device
The etching method of the present invention comprises first and second etching steps (S1, S3) having different types of films to be etched and different types of process gases. During a transition from the first etching step (S1) to the second etching step (S3), a first switching process step (S2) is performed in which the process container is filled with a cleaning gas and the cleaning gas is turned into a plasma to remove the reaction product deposited in the process container in the first etching step. During a transition from the second etching step (S3) to the first etching step (S1), a second switching process step (S4) is performed in which the process container is filled with a cleaning gas and the cleaning gas is turned into a plasma to remove the reaction product deposited in the process container in the second etching step.
US09218980B2 Surface treatment to improve CCTBA based CVD co nucleation on dielectric substrate
Embodiments of the present invention generally relate to a method of forming a cobalt layer on a dielectric material without incubation delay. Prior to depositing the cobalt layer using CVD, the surface of the dielectric material is pretreated at a temperature between 100° C. and 250° C. Since the subsequent CVD cobalt process is also performed at between 100° C. and 250° C., one processing chamber is used for pretreating the dielectric material and forming of the cobalt layer. The combination of processing steps enables use of two processing chambers to deposit cobalt.
US09218976B2 Fully silicided gate formed according to the gate-first HKMG approach
When forming field-effect transistors, a common problem is the formation of a Schottky barrier at the interface between a metal thin film in the gate electrode and a semiconductor material, typically polysilicon, formed thereupon. Fully silicided gates are known in the state of the art, which may overcome this problem. However, formation of a fully silicided gate is hindered by the fact that silicidation of the source and drain regions and of the gate electrode are normally performed simultaneously. The claimed method proposes two consecutive silicidation processes which are decoupled with respect to each other. During the first silicidation process, a metal silicide is formed forming an interface with the source and drain regions and without affecting the gate electrode. During the second silicidation, a metal silicide layer having an interface with the gate electrode is formed, without affecting the transistor source and drain regions.
US09218975B2 Methods of forming a replacement gate structure having a gate electrode comprised of a deposited intermetallic compound material
Disclosed herein are various methods of forming a replacement gate structure with a gate electrode comprised of a deposited intermetallic compound material. In one example, the method includes removing at least a sacrificial gate electrode structure to define a gate cavity, forming a gate insulation layer in the gate cavity, performing a deposition process to deposit an intermetallic compound material in the gate cavity above the gate insulation layer, and performing at least one process operation to remove portions of intermetallic compound material positioned outside of the gate cavity.
US09218974B2 Sidewall free CESL for enlarging ILD gap-fill window
An integrated circuit structure includes a first gate strip; a gate spacer on a sidewall of the first gate strip; and a contact etch stop layer (CESL) having a bottom portion lower than a top surface of the gate spacer, wherein a portion of a sidewall of the gate spacer has no CESL formed thereon.
US09218972B1 Pattern forming method for manufacturing semiconductor device
In a manufacturing method of a semiconductor device according to an embodiment, a processing target film is formed above a substrate. A buffer layer in a polycrystalline state or an amorphous state is formed on the processing target film. A mask material is formed on the buffer layer. The processing target film is etched using the mask material as a mask. The buffer layer has an etching rate smaller than the processing target film.
US09218958B2 Method for forming a semiconductor device
A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.
US09218954B2 Defect capping method for reduced defect density epitaxial articles
A method for forming an epitaxial layer on a substrate surface having crystalline defect or amorphous regions and crystalline non-defect regions includes preferential polishing or etching the crystalline defect or amorphous regions relative to the crystalline non-defect regions to form a decorated substrate surface having surface recess regions. A capping layer is deposited on the decorated substrate surface to cover the crystalline non-defect regions and to at least partially fill the surface recess regions. The capping layer is patterned by removing the capping layer over the crystalline non-defect regions to form exposed non-defect regions while retaining the capping layer in at least a portion of the surface recess regions. Selective epitaxy is then used to form the epitaxial layer, wherein the capping layer in the surface recess regions restricts epitaxial growth of the epitaxial layer over the surface recess regions.
US09218952B2 Electric lamp including a built-in-lamp having a pinch seal
An electric lamp having a longitudinal axis is provided. The electric lamp may include a base; and a built-in lamp, which has a pinch seal. Two power supply lines protrude out of the pinch seal. Two pins for connection to the power supply lines are provided on the base side. In each case one pin and one power supply line are connected by means of a mounting clip. A mounting clip is a punched sheet-metal part having a bottom which is configured so as to be substantially rectangular with a width B and a length L. Two spring arms are attached to the bottom, which spring arms surround the pinch seal of the built-in lamp. In each case one means for fastening a pin and one means for fastening a power supply line are provided on the mounting clip.
US09218948B2 Mass spectrometer
The larger an m/z to be adjusted, the wider a peak width which represents change in intensity in relation to change in voltage. This allows voltage step size to be increased during a search for an optimum voltage without overlooking a maximum intensity. Thus, a relational expression which gives a narrow voltage step size for a low m/z and gives a wide voltage step size for a high m/z is prestored in a voltage step information storage unit (32), an optimum voltage adjustment controller (31) finds an optimum voltage step size for the m/z to be adjusted, during automatic voltage adjustment using the stored information, and controls a power supply unit 21 so as to change a voltage applied to a first ion guide (8) stepwise. Ion intensity obtained each time the applied voltage changes is determined, and a voltage value which gives a maximum ion intensity is found and stored in an optimum voltage information storage unit (33). Consequently, during automatic adjustment of a voltage applied to an ion transport optical element such as an ion guide, the time required for the adjustment can be reduced without overlooking an optimum voltage value which gives a maximum ion intensity.
US09218937B2 Charged particle beam apparatus having improved needle movement control
A charged particle beam apparatus includes: a charged particle beam column configured to irradiate an irradiation target with a charged particle beam; a detector configured to detect secondary charged particles emitted from the irradiation target by the irradiation of the charged particle beam; a needle arranged in an irradiation area of the charged particle beam; a needle actuator configured to actuate the needle; and a controller configured to control the needle actuator to actuate the needle along a movement route that is configured by a preset target position and preset way points. The controller controls the needle actuator to set an actuating direction of the needle for each of the way points.
US09218933B2 Low-dose radiographic imaging system
An inspection system for scanning cargo and vehicles is described which employs an X-ray source that includes an electron beam generator, for generating an electron beam; an accelerator for accelerating said electron beam in a first direction; and, a first set of magnetic elements for transporting said electron beam into a magnetic field created by a second set of magnetic elements, wherein the magnetic field created by said second set of magnetic elements causes said electron beam to strike a target such that the target substantially only generates X-rays focused toward a high density section in the scanned object, which is estimated in a second pulse using image data captured by a detector array in a first pulse. The electron beam direction is optimized by said X-ray source during said second pulse to focus X-rays towards said high density section based on said image data in said first pulse.
US09218931B2 Electromagnetic force driving device
An electromagnetic force driving device having reduced size and weight, and easily changeable electromagnetic characteristics and holding force, is provided. The device includes: a first housing; a second housing installed under the first housing; a partitioning wall partitioning the first and second housings; a first mover installed on a top of the first housing; a coil unit installed at a lower portion of the second housing to be movable according to a direction of current supplied; a second mover including one end combined with the coil unit, and another end passing through the partitioning wall and connected to the first mover to operate the first mover according to a movement of the coil unit; an upper magnet installed in the first housing to maintain a predetermined position of the first mover; and a lower magnet arranged in the second housing to form a magnetic field at the coil unit.
US09218928B2 Circuit breaker bail mechanism
An operating system for a circuit breaker includes a bail and a base that supports the circuit breaker and the bail. The bail extends around the circuit breaker and is pivotally attached to the base, such as by snap engagement. The bail and the base are made of an insulative plastic material such that the circuit breaker may vent hot gases, charged particles, plasma and the like without transferring charge to the operating system components. Additional features may be molded into the parts, such as supports and operators for auxiliary switches.
US09218922B2 Fuse assembly including controlled separable contacts and power system including the same
A fuse assembly structured for use with a power circuit includes: a fuse holder defining a space and including first and second terminals structured to electrically connect to the power circuit; a fuse disposed in the space defined by the fuse holder; and a relay disposed in the space defined by the fuse holder. The relay includes separable contacts, an operating mechanism structured to open and close said separable contacts, and a control circuit cooperating with said operating mechanism to cause said operating mechanism to open or close said separable contacts. Current flowing between the first and second terminals flows through the separable contacts and the fuse and opening the separable contacts interrupts said current flowing between said first and second terminals.
US09218917B2 Energy storage media for ultracapacitors
An ultracapacitor includes at least one electrode that includes carbon nanotubes. The carbon nanotubes may be applied in a variety of ways, and a plurality of layers may be included. Methods of fabrication of carbon nanotubes and ultracapacitors are provided.
US09218914B2 Photoelectrochemical solar cell comprising sensitizing anthocyanin dyes and method of preparing same
The present invention relates to the use of sensitising dyes of natural origin in photoelectrochemical solar cells and to the process for obtaining such vegetal extracts from fruits and vegetables.
US09218913B2 Wet capacitor cathode containing an alkyl-substituted poly(3,4-ethylenedioxythiophene)
A wet electrolytic capacitor that contains an anodically oxidized porous anode body, a cathode containing a metal substrate coated with a conductive coating, and a working electrolyte that wets the dielectric on the anode. The conductive coating contains an alkyl-substituted poly(3,4-ethylenedioxythiophene) having a certain structure. Such polymers can result in a higher degree of capacitance than many conventional types of coating materials. Further, because the polymers are generally semi-crystalline or amorphous, they can dissipate and/or absorb the heat associated with the high voltage. The degree of surface contact between the conductive coating and the surface of the metal substrate may also be enhanced in the present invention by selectively controlling the manner in which the conductive coating is formed.
US09218912B2 Electrochemical capacitor
An electrochemical capacitor includes electrolytic solution, a capacitor element, and a housing. The electrolytic solution contains cations, anions, solvent formed of materials other than lactones, and a lactone component. The capacitor element includes a negative electrode, a positive electrode, and a separator. The negative electrode includes an electrode layer capable of storing the cations, and the positive electrode includes a polarizable electrode layer and confronts the negative electrode. The separator is disposed between the negative and positive electrodes, and they are layered or wound together. The capacitor element is impregnated with the electrolytic solution. The housing accommodates the capacitor element and the electrolytic solution that contains the lactone component in a quantity ranging from 0.001 wt % to 5 wt % (inclusive) relative to the solvent.
US09218910B2 Multilayer ceramic capacitor, manufacturing method of the same, and circuit board with multilayer ceramic capacitor mounted thereon
There is provided a multilayer ceramic capacitor including: a ceramic body including a dielectric layer; a first internal electrode having a first non-pattern portion and a first pattern portion having one end exposed to one or more of surfaces of the ceramic body; a second internal electrode having an overlap region with the first pattern portion with the dielectric layer interposed therebetween and having a second non-pattern portion and a second pattern portion having one end exposed to one or more of surfaces of the ceramic body; and first and second external electrodes electrically connected to the first and second internal electrodes, respectively, wherein the first and second pattern portions have a metal oxide region having a predetermined width from an exposed end portion of a region thereof not connected to the first or the second external electrode, among exposed end portions, toward a central portion thereof, respectively.
US09218905B2 AC/DC current transformer
A method for processing output from a current transformer comprising deriving signal data from the output; converting the signal data from analog to digital format; removing a carrier signal from the signal data; squaring the signal data; and performing a recursive RMS algorithm on the signal data.
US09218903B2 Reconfigurable multi-stack inductor
A reconfigurable multi-stack inductor formed within a semiconductor structure may include a first inductor structure located within a first metal layer of the semiconductor structure, a first ground shielding structure located within the first metal layer that is electrically isolated from and circumferentially bounds the first inductor structure, and a second inductor structure located within a second metal layer of the semiconductor structure, whereby the second inductor structure is electrically coupled to the first inductor structure. A second ground shielding structure located within the second metal layer is electrically isolated from and circumferentially bounds the second inductor structure, whereby the first and second inductor generate a first inductance value based on the first ground shielding structure and second ground shielding structure being coupled to ground, and the first and second inductor generate a second inductance value based on the first ground shielding structure and second ground shielding structure electrically floating.
US09218901B2 Two terminal multi-layer thin film resistance switching device with a diffusion barrier and methods thereof
An electric-pulse-induced-resistance change device (EPIR device) is provided which is a resistance switching device. It has a buffer layer inserted between a first active resistance switching layer and a second active resistance switching layer, with both active switching layers connected to electrode layers directly or through additional buffer layers between the active resistance switching layers and the electrodes. This device in its simplest form has the structure: electrode-active layer-buffer layer-active layer-electrode. The second active resistance switching layer may, in the alternative, be an ion donating layer, such that the structure becomes: electrode-active layer-buffer layer-ion donating layer-electrode. The EPIR device is constructed to mitigate the retention challenge.
US09218896B2 Narrow annulus permanent canal seal plate
A permanent seal for a refueling canal of a nuclear power plant. The seal includes a support structure and a membrane. The support structure includes a first annular plate with ribs connected to and extending from a lower surface of the annular plate. The support structure is positioned atop the shield wall on the refueling canal floor, encircling and positioned near the annulus. The membrane includes a first end that is connected to the seal ledge and a second end that is connected to the refueling canal floor. The membrane has a stepped profile, with side walls extending substantially perpendicularly from a central annular plate to form a pocket configured to fit over the support structure. Loads imparted to the membrane are transferred through the support structure annular plate and ribs to the refueling canal floor.
US09218895B2 Memory card test interface
A memory card and methods for testing memory cards are disclosed herein. The memory card has a test interface that allows testing large numbers of memory cards together. Each memory card may have a serial data I/O contact and a test select contact. The memory cards may only send data via the serial data I/O contact when selected, which may allow many memory cards to be connected to the same serial data line during test. Moreover, existing test socket boards may be used without adding additional external circuitry. Thus, cost effective testing of memory cards is provided. In some embodiments, the test interface allows for a serial built in self test (BIST).
US09218885B2 System to control a width of a programming threshold voltage distribution width when writing hot-read data
An apparatus comprising a memory and a controller. The memory is configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules. Each memory module has a size less than a total size of the memory. The controller is configured to write user data using a plurality of threshold voltages. The data considered hot-read data is written using a first voltage threshold. The data not considered hot-read data is written using a second voltage threshold. The first voltage threshold reduces an impact on endurance of the memory.
US09218878B2 Semiconductor device and control method for semiconductor device
A semiconductor device is provided with the variable resistance element, and a control circuit that controls a resistance state of the variable resistance element by controlling current between a first end and a second end of the variable resistance element. The control circuit causes the variable resistance element to change from a first resistance state to a second resistance state by having a first current flow from the first end to the second end of the variable resistance element. In addition, after a second current smaller than the first current is made to flow from the first end to the second end of the variable resistance element, the control circuit causes the variable resistance element to change from the second resistance state to the first resistance state by having a third current flow from the second end to the first end thereof.
US09218877B2 Differential bit cell
A differential bit cell includes two memory elements that are configured to have different states. Each of the two memory elements is connected to a respective switching element. Each of these switching elements may have process variances, which may result in a degradation of read and/or write margins. To mitigate the effect of such variances, another switching element is coupled to the two memory elements and their respective switching elements in a manner that couples the aforementioned switching elements in a parallel fashion. In this way, the mismatch effects between the switching elements can be negated during read operations. During programming operations, such a configuration allows for the programming of both memory elements to different states with a single current pulse and also reduces the effective resistance of the programming path.
US09218874B1 Multi-pulse programming cycle of non-volatile memory for enhanced de-trapping
When writing a multi-state non-volatile memory, a de-trapping operation is included in the programming cycle. To reduce the performance penalty of including a de-trapping operation, the programming cycle of a single series of increasing pulses alternating with verify operations is replaced with a cycle including a pulse from each of two or more staircases, where each staircase is for a corresponding subset of the data states. After the multiple pulses, but before the following verify, a de-trapping operation is inserted in the programming cycle.
US09218871B2 Semiconductor memory device, information processing system including the same, and controller
To include first and second data input/output terminals allocated to first and second memory circuit units, respectively, and an address terminal allocated in common to these memory circuit units. When a first chip selection signal is activated, the first memory circuit unit performs a read operation or a write operation via the first data input/output terminal based on an address signal regardless of an operation of the second memory circuit unit. When a second chip selection signal is activated, the second memory circuit unit performs a read operation or a write operation via the second data input/output terminal based on the address signal regardless of an operation of the first memory circuit unit. With this configuration, a wasteful data transfer can be prevented, and the effective data transfer rate can be increased.
US09218870B2 Semiconductor memory device
To increase a storage capacity of a memory module per unit area, and to provide a memory module with low power consumption, a transistor formed using an oxide semiconductor film, a silicon carbide film, a gallium nitride film, or the like, which is highly purified and has a wide band gap of 2.5 eV or higher is used for a DRAM, so that a retention period of potentials in a capacitor can be extended. Further, a memory cell has n capacitors with different capacitances and the n capacitors are each connected to a corresponding one of n data lines, so that a variety of the storage capacitances can be obtained and multilevel data can be stored. The capacitors may be stacked for reducing the area of the memory cell.
US09218869B2 Memory device
A memory device includes: a memory element which includes three or more resistance states by using plural magneto-resistive elements each having a first resistance state or a second resistance state; and a comparison and determination circuit which compares the resistance states of the memory element before and after one first magneto-resistive element from among the plural magneto-resistive elements in the memory element is rewritten into the first resistance state, and determines the resistance state of the memory element in accordance with the comparison result.
US09218868B2 Magnetic memory
A magnetic memory according to an embodiment includes: a plurality of memory cells, each memory cell including a first MTJ element and a first selection unit; a pair of a first and second bit lines provided to each column of the memory cells; a word line provided to each row of the memory cells; an equalizer circuit provided to each column of the memory cells, and to connect between the first and second bit lines; and a control circuit that sets the first and second bit lines connected to a selected memory cell to be a first and second potentials to conduct a write operation, and after the write operation, transmits a control signal to the equalizer circuit between the first and second bit lines to activate the equalizer circuit to equalize potentials of the first bit line and the second bit line, thereby bringing into floating states.
US09218866B2 High capaciy low cost multi-state magnetic memory
One embodiment of the present invention includes a multi-state current-switching magnetic memory element includes a stack of two or more magnetic tunneling junctions (MTJs), each MTJ having a free layer and being separated from other MTJs in the stack by a seeding layer formed upon an isolation layer, the stack for storing more than one bit of information, wherein different levels of current applied to the memory element causes switching to different states.
US09218865B2 Self-referenced sense amplifier for spin torque MRAM
Circuitry and a method provide a plurality of timed control and bias voltages to sense amplifiers and write drivers of a spin-torque magnetoresistive random access memory array for improved power supply noise rejection, increased sensing speed with immunity for bank-to-bank noise coupling, and reduced leakage from off word line select devices in an active column.
US09218863B2 STT-MRAM cell structure incorporating piezoelectric stress material
A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.
US09218860B2 Multiple data rate memory with read timing information
A memory includes a memory array, read circuitry, and a strobe generator. The read circuitry is configured to provide read data from the memory array in response to a read request, wherein the read circuitry provides the read data in accordance with a first clock. The strobe generator is configured to provide a strobe signal with the read data, wherein the strobe generator provides the strobe signal in accordance with a second clock. The second clock is out of phase with the first clock by a phase in a range of 30 degrees to 150 degrees.
US09218852B2 Smart bridge for memory core
An apparatus includes a first semiconductor device including a memory core. The apparatus also includes a second semiconductor device including periphery circuitry associated with the memory core. The second semiconductor device includes a second serializer/deserializer communication interface coupled to a first serializer/deserializer communication interface of a memory controller.
US09218850B1 Exchange break layer for heat-assisted magnetic recording media
A heat-assisted magnetic recording (HAMR) medium having improved signal-to-noise ratio capabilities includes a high-temperature exchange break layer (EBL) inserted between magnetic recording layers, where the high-temperature exchange break layer material is capable of maintaining its chemical properties at temperatures exceeding 300° C. The high-temperature EBL may include a non-metallic compound including at least one of an oxide, a carbide, and a nitride.
US09218849B1 Data loss mitigation in a heat assisted magnetic recording data storage device
A data storage device may employ a heat assisted magnetic recording data writer separated from a plurality of data bits stored on a media surface of a data storage medium. At least one controller and a prediction circuit that is connected to the heat assisted magnetic recording data writer can be configured to remap the media surface in response to a predicted heat assisted magnetic recording data writer failure.
US09218846B2 Demodulation method of magnetic data and demodulation device of magnetic data
A demodulation method of magnetic data may include a first data creating step which creates a preliminary data string for creating the demodulation data on a basis of an interval that is a time interval between peaks of a read signal of an analog-shaped magnetic data, and a second data creating step which creates a demodulation data creating data for creating the demodulation data on a basis of the preliminary data string created in the first data creating step. When a peak of the read signal is not detected for a predetermined time, a pseudo-peak is generated and a pseudo-interval is stored in a data storage section, and steps similar to the first data creating step and the second data creating step are executed, and the pseudo-peak is generated until the demodulation data creating data corresponding to a final interval is created.
US09218843B2 Audio controller of a docking station
A method for managing audio of a device including scanning for an audio controller of a docking station coupled to the device, determining whether an audio device is coupled to an audio interface of the docking station if the device is coupled to the audio controller, and transferring audio between the device and the audio controller of the docking station if the audio device is coupled to the audio interface of the docking station.
US09218839B2 Operating a tape storage device
An apparatus for operating a tape storage device comprises a first tape skew determination unit for providing a first tape skew value concerning a skew of a tape in the tape storage device, and a second tape skew determination unit for providing a second tape skew value concerning the skew of the tape. An actuator adjusts one or more of a rotational orientation of a tape head of the tape storage device which tape head is provided for reading and/or writing data from/to the tape, and a motion direction of the tape dependent on the first tape skew value and the second tape skew value.
US09218837B2 Control of storage device
Sensor data and audio data are received by a controller. The controller determines if the audio data is above a threshold level. The controller also determines if the sensor data is above a threshold level. The controller can suspend operation of a hard drive based on the data being above or below the threshold level.
US09218836B2 Heat assisted magnetic recording head having dual waveguides
Systems that include an energy source configured to provide transverse electric (TE) mode energy; a channel waveguide configured to receive energy from the energy source, the channel waveguide having at least one mirror plane; and a near field transducer (NFT) configured to receive energy from the channel waveguide, the NFT having at least one mirror plane.
US09218835B1 Thermally-assisted magnetic recording head including a heat sink
A thermally-assisted magnetic recording head includes a main pole and a heat sink. The heat sink includes two first portions and two second portions. The two first portions are located on opposite sides of the main pole in the track width direction and are each spaced from the main pole. The two second portions are located between the main pole and the two first portions. The main pole and the two first portions are each formed of a magnetic metal. The two second portions are formed of a nonmagnetic metal.
US09218832B2 Method of removing slider from flexure without large displacement of the slider
A method of surely removing a read/write slider from a flexure without large displacement of the slider, the slider attached to the flexure of the head suspension through an adhesive, comprises heating the slider so that the adhesive is heated through an adhered surface of the slider being in contact with the adhesive; and applying ultrasonic vibration to the slider so that the adhered surface of the slider vibrates at ultrasonic frequency with respect to the adhesive.
US09218826B1 Tuned horizontally symmetric magnetic stack
A data storage device may be constructed as a data reader in various embodiments with a magnetic stack that has a barrier layer disposed between first and second magnetically free layers. The magnetic stack may have a horizontally symmetrical configuration that provides negative exchange coupling between the magnetically free layers.
US09218823B2 Read head with multiple reader stacks
A read head includes a bottom shield and a bottom isolation layer that electrically isolates the bottom shield. The read head includes left and right reader stacks having respective bottom layers disposed on at least a portion of the bottom isolation layer. The left and right reader stacks are cross-track adjacent to one another. The read head also includes left and right bottom contacts electrically coupled to respective left and right bottom layers. A top shield is configured as a common top contact electrically coupled to respective top layers of the left and right reader stacks.
US09218818B2 Efficient and scalable parametric stereo coding for low bitrate audio coding applications
The present invention provides improvements to prior art audio codecs that generate a stereo-illusion through post-processing of a received mono signal. These improvements are accomplished by extraction of stereo-image describing parameters at the encoder side, which are transmitted and subsequently used for control of a stereo generator at the decoder side. Furthermore, the invention bridges the gap between simple pseudo-stereo methods, and current methods of true stereo-coding, by using a new form of parametric stereo coding. A stereo-balance parameter is introduced, which enables more advanced stereo modes, and in addition forms the basis of a new method of stereo-coding of spectral envelopes, of particular use in systems where guided HFR (High Frequency Reconstruction) is employed. As a special case, the application of this stereo-coding scheme in scalable HFR-based codecs is described.
US09218817B2 Low-delay sound-encoding alternating between predictive encoding and transform encoding
An encoder and a method for encoding a digital signal are provided. The method includes encoding a preceding frame of samples of the digital signal according to a predictive encoding process, and encoding a current frame of samples of the digital signal according to a transform encoding process. The method is implemented such that a first portion of the current frame is also encoded by predictive encoding that is limited relative to the predictive encoding of the preceding frame by reusing at least one parameter of the predictive encoding of the preceding frame and only encoding the parameters of said first portion of the current frame that are not reused. A decoder and a decoding method are also provided, which correspond to the described encoding method.
US09218815B2 System and method for dynamic facial features for speaker recognition
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for performing speaker verification. A system configured to practice the method receives a request to verify a speaker, generates a text challenge that is unique to the request, and, in response to the request, prompts the speaker to utter the text challenge. Then the system records a dynamic image feature of the speaker as the speaker utters the text challenge, and performs speaker verification based on the dynamic image feature and the text challenge. Recording the dynamic image feature of the speaker can include recording video of the speaker while speaking the text challenge. The dynamic feature can include a movement pattern of head, lips, mouth, eyes, and/or eyebrows of the speaker. The dynamic image feature can relate to phonetic content of the speaker speaking the challenge, speech prosody, and the speaker's facial expression responding to content of the challenge.
US09218811B2 Electronic device and method for managing voice entered text using gesturing
An electronic device for managing voice entered text using gesturing comprises a housing, display, power source, speech recognition module, gesture recognition module, and processor. A first speech input is detected, and textual words are displayed. One or more swipe gestures are detected, and a direction of the swipe gesture(s) is determined. Each textual word is highlighted one-by-one along a path of the direction of the swipe gesture(s) highlighting for each swipe gesture. For one embodiment, a second speech input may be detected and a highlighted textual word may be substituted with a second textual word. For another embodiment, a type of the swipe gesture(s) may be determined. A textual word adjacent to a currently highlighted word may be highlighted next for the first type, and a textual word non-adjacent to the currently highlighted word may be highlighted next for the second type.
US09218809B2 Fast, language-independent method for user authentication by voice
A method and system for training a user authentication by voice signal are described. In one embodiment, a set of feature vectors are decomposed into speaker-specific recognition units. The speaker-specific recognition units are used to compute distribution values to train the voice signal. In addition, spectral feature vectors are decomposed into speaker-specific characteristic units which are compared to the speaker-specific distribution values. If the speaker-specific characteristic units are within a threshold limit of the speaker-specific distribution values, the speech signal is authenticated.
US09218807B2 Calibration of a speech recognition engine using validated text
A system and method provide acoustic training of a voice or speech recognition engine and/or voice or speech recognition software application. Instead of requiring a user to read from a prepared or predetermined script, the system and method described herein enable acoustic training using any free text spoken phrases provided by the user directly, or by a previously recorded speech, presentation, or the like, performed by the user.
US09218806B1 Generation and use of multiple speech processing transforms
Features are disclosed for selecting and using multiple transforms associated with a particular remote device for use in automatic speech recognition (“ASR”). Each transform may be based on statistics that have been generated from processing utterances that share some characteristic (e.g., acoustic characteristics, time frame within which the utterances where processed, etc.). When an utterance is received from the remote device, a particular transform or set of transforms may be selected for use in speech processing based on data obtained from the remote device, speech processing of a portion of the utterance, speech processing of prior utterances, etc. The transform or transforms used in processing the utterances may then be updated based on the results of the speech processing.
US09218805B2 Method and apparatus for incoming audio processing
A system includes a processor configured to receive a verbal request to active an audio playback application on a remote device wirelessly connected to the processor. The processor is also configured to relay the request to the remote device for handling. The processor is further configured to receive a request from the remote device for audio playback. The processor is also configured to select a source channel for incoming audio. The processor is additionally configured to receive incoming audio from the remote device over the selected source channel and playback the incoming audio over a vehicle output.
US09218800B2 Sound transmission material, sound control plane structure including building use using the sound transmission material, windscreen for microphone, protective grille, sound transmission projection screen, and speaker
A sound transmission material is made of fibers entangled with each other and has a self-standing property and a high performance sound transmission property, namely the TABER™ stiffness is not less than 5 mN×m, the bending resistance is not less than 100 mN, the porosity is not less than 50%, and the thickness is not more than 3 mm.
US09218795B1 Stringed instrument tuning device
A device for setting the tension in a string of a stringed musical instrument whereby a musician can instantly retune the string to play either one of two predetermined notes by merely actuating a lever. The device is preferably attached between the tailpiece or body of the instrument and an end of the string. The element of the tuner to which the string is attached (a string anchor) moves with a rectilinear motion to change the string tension. Two embodiments are disclosed, one of which used a rotating cam to position the string anchor, and the other of which uses a two-bar linkage to position the string anchor.
US09218793B2 Intermediate value storage within a graphics processing apparatus
A tile-based graphics processor includes tile processing circuitry that has both a tile buffer and a per-pixel general purpose data store. The per-pixel general purpose data store is read accessible and write accessible by the tile processing circuitry to store intermediate values. These intermediate values are generated by the tile processing circuitry and then consumed by the tile processing circuitry to generate the output values for the tile being processed.
US09218788B2 Information-processing device and program for displaying a window group including a plurality of windows
An information-processing device, if an instruction to display a window group is received, displays the window group in a first size in a display area of display means, and then displays at least a part of the window group in a second size that is greater than the first size in the display area. If operation means receives an instruction to specify a window that is displayed in the display area, the information-processing device executes a process based on the specified window.
US09218786B2 Image display device
A change in the white balance caused due to the temperature is reduced in an image display device using MEMS and a laser light source. An image processing unit of the device superposes a signal based on a first measured value of a light quantity at a first temperature on a image signal to be supplied to the laser light source. An amplification factor of the light source drive unit is changed so that a second measured value at a second temperature comes close to the first measured value at the first temperature as a target value based on the second measured value at which the light quantity of light generated at the laser light source is measured at the second temperature different from the first temperature on the signal based on the first measured value.
US09218784B2 Adjusting the color output of a display device based on a color profile
Disclosed embodiments relate to adjusting the color output of a display device. For example, a method for adjusting the color output of a display device based on a color profile may comprise receiving, by a display device, a color profile indicative of the native properties of a display device, generating, by the display device, a color mapping based on the received color profile, and storing, by the display device, the color mapping. The method may further comprise displaying, by the display device, an image based on the stored color mapping.
US09218772B2 Backlight driver of liquid crystal display device and method of driving the same
A backlight driver and a method of driving the same are disclosed. The backlight driver includes a vertical synchronization signal filter for generating a second vertical synchronization signal based on an input first vertical synchronization signal, and selecting one of the first vertical synchronization signal and the second vertical synchronization signal as a third vertical synchronization signal according to whether a period difference between adjacent first vertical synchronization signals satisfies a preset threshold range, a duty ratio detector for detecting a duty ratio of an input pulse width modulation (PWM) signal, a PWM generator for generating an output PWM signal synchronized with the third vertical synchronization signal output from the vertical synchronization signal filter and having the duty ratio and outputting the output PWM signal to a backlight unit.
US09218771B2 Image compensation method for side-emitting backlight and LCD apparatus with the same
The present application provides a an image compensation method for side-emitting backlight comprising steps of: S1, dividing the display screen into several regions; S2, arranging virtual light sources at one side of each region where actual light sources are located for imitating the actual light sources; S3, inputting a pixel value and a coordinate of the point to be compensated; S4, computing a ratio value between an all-full-lighting backlight brightness of the point to be compensated when fully lighted and an all-reduced backlight brightness of the point to be compensated when reduced in brightness; S5, obtaining a compensation factor of the point to be compensated, according to the ratio value; S6, compensating the pixel value of the point to be compensated by using the compensation factor; S7, determining whether all the points to be compensated in the image to be compensated have been compensated or not.
US09218762B2 Dimming techniques for emissive displays
This describes power saving techniques for emissive displays. In one example, the outputs of emissive elements in an emissive display are selectively reduced in order to save power when the emissive display does not change its output imagery for a defined period. The techniques of this disclosure may achieve effects in emissive displays that appear visually similar to, or better than, the effects in conventional transmissive displays when the backlight dims over time.
US09218760B2 Driving circuit for liquid crystal display device and method for driving the same
A driving circuit for a liquid crystal display device includes a liquid crystal panel comprising a plurality of pixel areas to display an image; a data driver configured to drive data lines of the liquid crystal panel; a gate driver configured to drive gate lines of the liquid crystal panel; and a timing controller configured to generate an internal enable signal in an initial driving where an external power is applied, to control the gate and data drivers, and configured to control the gate and data drivers based on synchronization signals, after controlling the driving of the gate driver to be stopped for one frame period when at least one synchronization signals are input from outside.
US09218748B2 System and method for providing exercise in playing a music instrument
A system and method for providing exercise in playing a music instrument. With prior art solutions there is a common problem of inadequate motivation of the user to continue practicing, and inadequate learning of items which are difficult for a specific user. The present solution detects characteristics of the user's play detected and uses them to provide a suitable program of exercises and to provide feedback which enhances motivation of the user.
US09218744B2 System and method for managing aircraft ground operations
A method for managing aircraft ground operations includes receiving an initial gate assignment schedule, an initial operational task schedule, and a current flight schedule. The method also includes determining a first adjusted gate assignment schedule based at least in part on the initial gate assignment schedule and the current flight schedule to reduce costs associated with reassigning aircraft to alternative gates. In addition, the method includes determining a first adjusted operational task schedule based at least in part on the initial operational task schedule and the current flight schedule to reduce costs associated with reassigning ground crew members to alternative tasks. Furthermore, the method includes determining a second adjusted gate assignment schedule and a second adjusted operational task schedule based at least in part on the current flight schedule, the first adjusted gate assignment schedule, and the first adjusted operational task schedule.
US09218742B2 System and method for airport noise monitoring
Described are a system and a method for airport noise monitoring. The system may include (a) a data receiving arrangement receiving, from a data source, information corresponding to an airport; (b) a data comparing arrangement comparing the received information to noise rules; and (c) an alert generating arrangement generating a noise alert based on the comparison of the received information to the noise rules.
US09218741B2 System and method for aircraft navigation based on diverse ranging algorithm using ADS-B messages and ground transceiver responses
A method of aircraft navigation via receiving signals emitted by other aircraft and corresponding reply message transmitted by ground transceivers and the using a new diverse-ranging algorithm that solves for the positions of a eavesdropping aircraft and the positions of direct-reply aircraft emitting the signals received by the eavesdropping aircraft.
US09218737B2 Receiving control circuit for a wall control interface with phase modulation and detection for power management
A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.
US09218728B2 Methods and apparatus for acoustic event detection
Methods and apparatus to identify a type of acoustic event Mel Frequency Cepstral Coefficients (MFCCs). In one embodiment, received sound is processed using the MFCCs to locate a peak for comparison with a stored event to determine if the peak corresponds to the acoustic event.
US09218727B2 Vibration in portable devices
One embodiment may take the form of a method of reducing noise from vibration of a device on a hard surface. The method includes activating a haptic device to indicate an alert and sensing an audible level during activation of the haptic device. Additionally, the method includes determining if the audible level exceeds a threshold and initiating mitigation routines to reduce the audible level to a level below the threshold if the threshold is exceeded.
US09218726B2 Automated teller machine and medium detecting device
A medium detecting device is provided. The medium detecting device includes a sensor adapted to detect magnetism of a medium being transferred; and a pressing unit adapted to press the medium toward the sensor, and the pressing unit includes at least one supporting part including a plurality of supporters to press the medium toward the sensor; and an elastic member adapted to elastically support the supporting part.
US09218723B2 Methods and systems for a gesture-controlled lottery terminal
A method including providing a lottery terminal that includes a graphical user interface and a motion capture device to facilitate a user to play in a lottery. The method further includes displaying, on the graphical user interface, a first image with content that includes drawing lottery tickets, instant lottery tickets, lottery games, dynamically-generated animations, and advertisements and detecting, by the motion capture device, a gesture of the user in a three dimensional space surrounding the lottery terminal. The method may further includes displaying, on the graphical user interface, a second image with content based, at least in part, on the gesture of the user; receiving, by the lottery terminal, a payment from the user for playing the lottery; and distributing, by the lottery terminal, a lottery ticket, based, at least in part, on the gesture of the user.
US09218719B2 Electronic gaming machine and gaming method
An electronic gaming machine includes an electronic game controller and a display where game symbols are arranged in an array of predetermined game positions. The appearance of a first special symbol causes a group of predetermined game positions to be selected where each game symbol occupying a predetermined game position in the group is changed into a second special symbol either during a play of a game or at the completion of the play, the change into the second special symbol being visible to the player. A gaming method is also provided.
US09218713B2 Gaming machine peripheral control method
A request for authorization for use of one or more peripheral devices of a wager gaming machine may be transmitted to another device (e.g., a central server) via a network. The request may, for example, include a machine-specific identifier and a peripheral identifier. The request may be sent from the wager gaming machine or from another device. The request may be sent automatically in response to certain conditions, e.g., when a peripheral device has been replaced and/or when the wager gaming machine initializes. The central server may determine (inter alia) whether the peripheral is approved for use in the registered jurisdiction and then send the appropriate authorization (or denial). Software (e.g., driver software) may accompany an authorization.
US09218708B2 Gaming machine
On a lower image display panel 141, a game result of rearranged of symbols 501 is randomly determined. When the result is winning of a bonus game, individual indication data and common indication data associated with the type of the bonus game are specified. After an indication effect starts based on the common indication data, an indication effect is executed based on the individual indication data.
US09218707B2 System gaming
A system for enabling tournament gaming provides a plurality of gaming machines and a tournament controller in communication with the gaming machines. At least a first gaming machine enables play of a first base game and at least a second gaming machine enables play of a second base game. The first base game has a first set of parameters and the second base game has a second set of parameters. The first base game with the first set of parameters is a different game theme from the second base game with the second set of parameters. The base game play data from each gaming machine is converted into a normalized tournament score that is designed to substantially equalize differences resulting from the base games that have differing sets of parameters, wherein calculation of the normalized tournament score uses monitored data spanning multiple base game plays.
US09218704B2 Dispensing system and user interface
A dispensing system may be configured to dispense a custom product based on a user selection. The user selection may be provided via a user interface of the dispensing system. The user interface may simultaneously display selectable icons for the available types of products (e.g., types of beverages) and other icons for modifying a chosen product (e.g., a flavoring or additive to a beverage, such as a sweetener or a cherry flavoring). The user interface may receive input from a user in order for the user to select a custom product (e.g., a custom drink) and the dispensing system may dispense the custom product to the user.
US09218702B2 Currency acceptor, security device and method
A device and method for preventing fraudulent withdrawal of a bill from a bill acceptor after credit has been given. The device includes a cash box, a punch plate and a security device. The security device includes at least one bill-cutting edge and at least one string-cutting surface. A method uses a security device to cut a bill when a fraudulent withdrawal of the bill is attempted.
US09218700B2 Method and system for secure and authorized communication between a vehicle and wireless communication devices or key fobs
A system is provided that includes a wireless communication device (or end device), a vehicle having a central module, and a key provisioning server. The key provisioning server is communicatively coupled to the wireless communication device and the central module via wireless connections. The central module can establish a wireless connection with the wireless communication device to initiate a current communication session. When the wireless connection is established with the central module, the wireless communication device communicates a request message to request temporary security information (e.g., public key and/or a digital certificate). The key provisioning server can then provide, in response to the request message, the temporary security information to the wireless communication device and/or the central module. The temporary security information can then be used to encrypt communications between the wireless communication device and the central module.
US09218698B2 Vehicle damage detection and indication
Methods and systems for vehicle damage detection, identification and communication are disclosed. Specifically, a method to detect damage to a vehicle, identify the extent and location of the damage, and communicate the damage event is provided. In the event of damage to a vehicle, the system may take a number of actions. In one embodiment, the actions comprise notifying authorized users of the vehicle, a maintenance provider, an insurance provider and/or an emergency agency, disabling the vehicle, and emitting a visual or audio alarm.
US09218695B2 System and method for monitoring an estimated wheel speed of a vehicle using a transmission output shaft sensor
Methods and systems are described for monitoring a determined wheel speed of a wheel. A three wheel speed values—each indicative of a measured wheel speed of a different wheel—are each received from a different wheel speed sensor. An estimated wheel speed value for a fourth wheel is determined based on at least one of the three wheel speed values. A calculated wheel speed value is determined based on information received from a vehicle system. A fault condition is detected based on deviations between the estimated wheel speed value for the fourth wheel and the calculated wheel speed value for the fourth wheel.
US09218692B2 Controlling rights to a drawing in a three-dimensional modeling environment
A first user having a certain set of privileges with respect to an initial three-dimensional (3D) model associates a watermark with the initial 3D model, so that the watermark is displayed whenever the initial 3D model is viewed or edited. A second user having a smaller set of privileges with respect to the initial 3D model is permitted to view, copy and/or modify the initial 3D model, but is not permitted to remove or alter the content of the watermark. The watermark is continuously displayed as the second user works with the initial 3D model. When the second user applies a change to the initial 3D model, an indication of the modifications applied by the second user is generated and stored with the model data corresponding to the updated 3D model.
US09218691B1 System and method for enabling scene program functionality
One embodiment of the present invention sets forth a technique for specifying scene programs, where the effect of executing a particular scene program is to generate a sequence of graphics commands. The application programming interface is extended to include calls used to specify a high-level scene program. Upon receiving a high-level scene program, the graphics driver generates a machine code scene program. When an application program emits a call to execute one or more machine code scene programs, the graphics driver transmits corresponding scene programs execution commands to the graphics pre-processing unit. For each scene program execution command, the graphics pre-processing unit processes instructions, programmatically reconfigures the graphics pipeline based on the execution of the machine code scene program, and launches one or more parallel threads that execute commands within the graphics pipeline. Advantageously, using scene programs, application developers may tailor application programs to more effectively dispatch tasks to the GPU.
US09218682B2 Method and apparatus for generating an image
In accordance with an example embodiment of the present invention, an apparatus, comprising a processor configured to determine a position information related to a first media object, determine a position information related to a second media object, and automatically generate at least one image based at least in part on the position information related to the first media object and based at least in part on the position information related to said second media object is disclosed.
US09218680B2 Systems and methods for rendering graphical content and glyphs
Disclosed are techniques and systems for rendering pages or documents with both graphical and textual content.
US09218678B2 Multi-view rasterization using an analyticl visibility function
Multi-view rasterization may be performed by calculating visibility over a camera line. Edge equations may be evaluated iteratively along a scanline. The edge equations may be evaluated using single instruction multiple data instruction sets.
US09218677B2 Presenting data records based on binning and randomization
In one embodiment, data records associated with attributes are received. A check is made to determine whether the data records are greater than a maximum data record limit of a graph. Further, when the maximum number of data records in the bin is less than or equal to the maximum data record limit of the graph, the data records are retrieved and presented in the graph. When the data records are greater than the maximum data record limit of the graph, the data records are grouped into bins based on initial bin sizes corresponding to the plurality of attributes. Furthermore, weighted densities of the bins are determined using a maximum number of data records associated with a bin and a maximum data record limit of the bin. Further, the graph is rendered to present the weighted densities of the bins using a randomization technique to analyze the data records.
US09218676B2 Displaying computer dashboard information
Exemplary method, system, and computer program product embodiments for displaying computer dashboard information are provided. In one embodiment, by way of example only, historical values associated with time intervals are displayed in a single gauge. The historical values are arranged in such a manner that at least one of the historical values is contrasted against a current value for comparison as a single metric. Additional system and computer program product embodiments are disclosed and provide related advantages.
US09218672B2 Device and method for generating procedural images with a cache
An image generation engine capable of generating images for a host application from procedural data includes an image generation, a sequential procedural graph traversal module, an intermediate result computation module, an intermediate result rendering time computation module, an intermediate result weight computation module, memory modules for storing the graph G and the corresponding L0, L1, L2, L3 and M lists, and a comparison and deletion module adapted to compare the memory space available for storing new intermediate result data or previously existing data with a given minimum threshold and delete intermediate result data if said memory space available for storing new intermediate result data is below the threshold.
US09218663B2 Apparatus and method for automatic image guided accuracy verification
A method includes receiving during a first time interval associated with a path of motion of a dynamic body, image data associated with a plurality of images of the dynamic body. The plurality of images include an indication of a position of a first marker coupled to a garment at a first location, and a position of a second marker coupled to the garment at a second location. The garment is coupled to the dynamic body. During a second time interval, an image from the plurality of images is automatically identified that includes a position of the first marker that is substantially the same as a position of a first localization element relative to the dynamic body and a position of the second marker that is substantially the same as a position of the second localization element relative to the dynamic body.
US09218661B2 Image analysis for specific objects
A system and method for automatic detection of an object feature, such as a lesion, across a plurality of sets of image data, taken from the same subject, which may optionally be a human patient but which may also optionally be any type of animal or a non-biological subject.
US09218659B2 Method and apparatus for obtaining a magnetic resonance spectrum of a voxel in a magnetic resonance image
A method obtains a magnetic resonance (MR) spectrum of a voxel in a magnetic resonance (MR) image obtained from a magnetic resonance imaging (MRI) apparatus. The method includes configuring a sampling pattern of k-space data; sampling predetermined data from the k-space data based on the configured sampling pattern; and obtaining the MR spectrum of the voxel by using the sampled data.
US09218657B2 Method of obtaining and analyzing data from an upright MRI from the spinal region of a subject
A method of analyzing a spinal region of a subject. The method includes steps of obtaining a first sagittal image of the spinal region of the subject using an upright magnetic resonance imaging unit; identifying a first vertebral edge on a first side of a first disc in the first sagittal image; identifying a second vertebral edge on a second side of the first disc in the first sagittal image; and determining a first angle between the first vertebral edge and the second vertebral edge for the first disc.
US09218655B2 Brightness measuing method and system of device with backlight
A brightness measuring method of device with backlight is performed by a controlling device, for measuring legends of backlight provided by a backlight module of a device under test (DUT). The method includes turning on a uniform light source external to the DUT for illuminating the DUT; capturing and receiving an image of the DUT illuminated with uniform light as a base image; identifying a complete pattern of a to-be-measured legend in the base image; turning off the uniform light source and turning on the backlight of the DUT so as to illuminate the legend of DUT; capturing and receiving an image of the DUT illuminated with backlight as a comparison image, wherein the scope of the comparison image overlaps the scope of the base image; and calculating brightness values of a plurality of pixels in the comparison image whose positions overlap the positions of the complete pattern.
US09218654B2 Apparatus and method of recognizing an object, and apparatus and method of mounting a semiconductor chip
An apparatus for recognizing an object may include a lens, a camera and a signal-processing unit. The lens may include two cross sections having different focal lengths. The camera may be configured to photograph the object having a first part through the lens. The first part may have a first shape. The signal-processing unit may be configured to recognize a height of the first part based on deviations of the first shape in an image obtained from the camera. Thus, the apparatus may only include the cylindrical lens interposed between the object and the camera except for the softwares for processing the signals. As a result, the apparatus may have a simple structure without a structure of a laser irradiation.
US09218647B2 Image processing apparatus, image processing method, and storage medium
An image processing apparatus that generates an output image by deforming an input image by coordinate transformation, comprises a divisor calculation unit calculates a minimum value and a maximum value of a divisor, used in division operation of coordinate transformation; a coefficient calculation unit obtains a range of the divisor in a way that a result of the division operation becomes equal to or smaller than an allowable error, and calculates a normalization parameter by dividing a minimum value of the range by the minimum value of the divisor; a parameter adjustment unit calculates an adjustment parameter used in the coordinate transformation, and outputs the adjustment parameter; and an image deformation processing unit performs transformation processing of the coordinate information using the adjustment parameter, and outputs a result of the transformation processing.
US09218641B1 Algorithm for calculating high accuracy image slopes
A method of determining slope of pixel intensities in an image includes the following steps: (a) receiving, from an imaging device, input pixel samples of a region of interest; (b) forming an impulse response function (IPR) for use in resampling the input pixel samples into output pixel intensities; and (c) calculating a derivative of the IPR. Also included is the step of convolving the derivative of the IPR with the input pixel samples to determine the slope of the output pixel intensities in the region of interest. In addition, the input pixel samples are generated in a first coordinate system by the imaging device, and the output pixel intensities are generated in a second coordinate system.
US09218635B2 Systems and methods for optimizing shipping practices
According to various embodiments, a load planning system is provided for simulating shipments based on a shipping entity's planned routing of packages and a shipper's (e.g., shipping entity customer) historical shipping volume. By using the load planning system to simulate shipments according to a variety of package routing plans, a user of the load planning system may identify shipping routes along which certain shipments may by-pass the sorting process of regional shipping hubs. These by-passing routes allow the shipping entity to provide the shipper with more efficient and less costly shipping options according to various embodiments.
US09218633B2 Cooking management
A cooking management system is described that identifies a customer and orders a product for the customer based at least on current temporal data. The cooking management system identifies customers associated with previous product requests that occurred during a predetermined range of time based at least on a comparison of current temporal data with temporal data associated with the previous product requests. The cooking management system causes presentation of identifiers of the identified customers on a display. Responsive to determining that the identifier for a particular customer has been selected, the cooking management system automatically causes a cooking device to prepare a product for the particular customer based at least on customer data associated with the particular customer.
US09218627B2 Call-termination-triggered social interface
Methods and systems directed to a call-termination triggered social interface that leverages information associated with an incoming phone number for display to a user of a mobile device post-call and permits the user to conveniently issue commands to the mobile device or social networking system to take specific actions for the number or entity associated with the number on the social network.
US09218625B2 Method and interface for historical display of market information
Trading software may receive information from an exchange. The trading software may track historical bid and ask information for a tradeable object. The trading software may display historical market depth information for the tradeable object on a trading screen.
US09218622B2 System and method of decoupling and exposing computing device originated location information
A system and method is provided to determine location information of a portable computing device and, in particular, to a secure and scalable system and method of decoupling and exposing handset originated location information to third parties. The system includes a location platform to determine location information of a remote user, and an encryption service configured to secure the location information of the remote user and send the secure location information to a content provider.
US09218620B2 System and method for dynamically changing the content of an internet web page
A host Web page includes an evolving interactive dialog box wherein an Internet user may enter user data to be processed. When the user completes entering user data in a first revolution of the interactive dialog box, the first revolution is replaced with a second revolution of the evolving interactive dialog box without disturbing or affecting any other part of the host Web page being displayed. Beneficially, the first and second revolutions may be communicated to a user computer together with and at a same time as the host Web page. Also, the second revolution may include a variety of data which is selected or customized to match the user data submitted in the first revolution. Each revolution of the evolving interactive dialog box may be comprised of any combination of general textual data entry fields, category (pull-down) menus, contact information data entry fields, and opt-in/opt-out buttons.
US09218619B2 Internet transaction and user interface therefor
A user account including a personal profile is stored by a server for subsequent use. The user is provided a list of displayable entries sortable using specified criteria in a manner that allows the user to review a selection of entries and to make a change to the selection prior to submitting a transaction for processing. Responsive to a request to log into the user account, the identity of the user is verified. Once verified, the transaction is facilitated between a vendor and the user pursuant to instructions from the user. The instructions are generated based on a shopping cart screen rendered by a client device of the user. The user is sent a confirmation message regarding the transaction while the user is logged in the server. The user can be provided an account screen allowing access to information relating to user transactions and information relating to an account balance.
US09218615B2 Automated optimization of an advertisement placement engine
A system and method for predicting a performance of a target advertisement placement via a simulation for optimum tuning is disclosed. A simulator receives a set of queries from a production engine, selects a subset of simulation queries from the queries by filtering, modifies query parameters as needed, transmits the simulation queries to the target engine for simulation, collects search results from the target engine, and computes a summary metric, which includes data fields retrieved from the search results and quantities calculated by using a prediction model derived from a production data warehouse. The simulator may further produce a simulation report, an indicator of performance prediction for the target engine, which comprises multiple metrics for the target engine, calculated with varying engine parameters.
US09218613B2 Method and system for internet based interactive reverse marketing communication via SMS/MMS/EMS communications network
The present invention is a short message service (“SMS”) based interactive information and marketing system, which provides the User with a means to rapidly and effectively communicate with its customer base. The system represented by this invention is a completely voluntary, opted-in system, by which the customer provides its mobile telephone number or the telephone number of its chosen mobile device to the User and requests that the User forward marketing, promotional and informational materials to the customer. The present invention permits the customer to request that certain product specific information be transmitted by the User to the customer visa short message service (“SMS”) text, as said information becomes available. The present invention permits both the User and the customer to transmit a URL link from the User's website to a mobile number via short message service (“SMS”) text directly from the web site page. The present invention permits the User to forward via short message service (“SMS”) text, a Short Cut Icon to reside on the home page of the customer's mobile phone or mobile device, which when clicked, will act as a short-cut to the User's web site.
US09218611B1 System and method for determining bid amount for advertisement to reach certain number of online users
Methods, systems, and computer programs include receiving, from an advertiser, advertisement criteria associated with an advertisement; and receiving, from a database, information regarding advertisement auctions in which the advertisement participated during a predetermined time period. A simulation is run of a first of the advertisement auctions a plurality of times, wherein the bid amount for the advertisement is changed for each simulation run An identification is made of a number of users to whom the advertisement would have been presented had the bid amount of the advertisement in the first of the advertisement auction been equal to the bid amount of the advertisement in the one of the times the simulation is run. Information related to the number of users identified for each one of the plurality of times the simulation is run is provided in a report.
US09218598B2 Portable e-wallet and universal card
Universal cards are used in place of all the other traditional cards which a person may want to carry. The universal card can include a short range communications transceiver to communicate with a mobile device. The mobile device can include a user interface and an e-wallet application so that the user can interface with the e-wallet application for programming the universal card via the short range communication link. Once programmed, the universal card emulates a function of a traditional card.
US09218597B2 Wireless devices for storing a financial account card and methods for storing card data in a wireless device
A system and method for enabling a wireless device to use card data during a transaction are provided. The method is performed by one or more processors configured to receive first financial card data, associate a first transaction type with the first financial card data, receive second financial card data, and associate a second transaction type with the second financial card data. The method further comprises receiving transaction type data, automatically selecting the first financial card data or the second financial card data based on the received transaction type data, and communicating the automatically selected financial card data for use in the transaction.
US09218596B2 Method and apparatus for providing real time mutable credit card information
A method for using a smartcard is provided. The smartcard may include a microprocessor chip, a button, a dynamic transaction authorization number, a Bluetooth low energy (“BLE”) device, and a battery. The battery may power the BLE and the microprocessor chip. The smartcard may also include memory. The memory may store the dynamic transaction authorization number. The smartcard may also include a dynamic magnetic strip. The dynamic magnetic strip may include a digital representation of the dynamic transaction authorization number. The method may include pressing the button. The method may also include transmitting an instruction to a smartphone for a request for a dynamic transaction authorization number. The transmission of an instruction may be in response to the pressing of the button. The method may also include receiving a dynamic transaction authorization number from a smartphone.
US09218594B2 Social network-assisted electronic payments
Techniques, a system and an article of manufacture for social network-assisted electronic payments. A method includes determining one or more members of a user's social network to query for a financial contribution towards payment of a real-time transaction between the user and a merchant, querying said one or more members in an order based on descending likelihood of member financial contribution until sufficient funds for payment of the transaction are received or all of said one or more members have been queried, and processing a money transfer from the user and/or each of said one or more members to the merchant to complete the real-time transaction.
US09218593B2 Notification control method and electronic device for the same
A method for controlling a notification in an electronic device includes detecting notification events, confirming whether the detected notification events exist within a first reference time, when the notification events exist within the first reference time, confirming whether the number of unconfirmed notifications including the notification events exceeds a reference number, and, when the number of unconfirmed notifications exceeds the reference number, outputting the notification events after a second reference time.
US09218590B2 Time tracking system and method of use
A system and method of managing time and, more particularly, to a system and method for automatically tracking time in an electronic system. The system includes a time tracking tool is configured to be integrated with an instant messaging system. The time tracking tool is configured to associate a received instant message with one or more projects and track a session time in which the received instant message is active.
US09218588B2 Offline processing systems and methods for a carrier management system
The present invention includes system and methods for the continued operation of a carrier management system having one or more user terminals that normally communicate with at least one data center over a network (online), when the one or more user terminals are unable to communicate with the data center (offline). Once communication is re-established between the one or more user terminal and the data center, local files and data on the user terminals that were used to rate and ship packages while offline are synchronized between the one or more user terminals and the data center.
US09218584B2 Method and system for measuring quality of performance and/or compliance with protocol of a clinical study
A method is proposed for determining clinical study compliance. The method includes obtaining criteria for the clinical study and accessing stored clinical data relating to the clinical study. Thereafter, the criteria and clinical data are correlated to determine a measure of compliance with the criteria of the clinical study.
US09218583B2 Computing system predictive build
Features to include within a predictive build of a computing system are selected. The predictive build is an anticipated final build of the computing system prior to receiving a firm customer order for the computing system in accordance with which an actual final build of the computing system is then built. A marginal cost of first building the predictive build and then modifying the predictive build to realize the actual final build, as compared to building the actual final build without first building the predictive build and then modifying predictive build to realize the actual final build, is estimated based on the features selected. Responsive to determining that the marginal cost is less than a predetermined acceptable marginal cost limit, the predictive build is built prior to receiving the firm customer order, and then is modified to realize the actual final build upon receiving the firm customer order.
US09218573B1 Training a model using parameter server shards
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for training a model using parameter server shards. One of the methods includes receiving, at a parameter server shard configured to maintain values of a disjoint partition of the parameters of the model, a succession of respective requests for parameter values from each of a plurality of replicas of the model; in response to each request, downloading a current value of each requested parameter to the replica from which the request was received; receiving a succession of uploads, each upload including respective delta values for each of the parameters in the partition maintained by the shard; and updating values of the parameters in the partition maintained by the parameter server shard repeatedly based on the uploads of delta values to generate current parameter values.
US09218569B2 Rules-based management system and method for processing medical information
A rules-based management system includes a rule repository to store a plurality of rules relating to medical information, a rule query language engine to generate a query based on a received signal and to search the rule repository based on the query, and a rule processing engine to formulate an instruction based on one or more rules produced by the search of the rule repository and to generate a signal based on the instruction. The system further includes an interface to a cloud network connected to a plurality of doctors, nurses, technicians, and/or other personnel or patients.
US09218566B2 Detecting disallowed combinations of data within a processing element
Techniques are described for detecting disallowed combinations of data within a processing element. Embodiments of the invention may generally receive data to be processed using the processing element and determine whether the received data and a current working state violate one or more rules describing disallowed combinations of data. If a disallowed combination is detected, embodiments of the invention may handle the processing of the received data in an alternate way that prevents disallowed combinations of data within the processing element.
US09218564B2 Providing transposable access to a synapse array using a recursive array layout
Embodiments of the invention relate to providing transposable access to a synapse array using a recursive array layout. One embodiment comprises maintaining synaptic weights for multiple synapses connecting multiple axons and multiple neurons, wherein the synaptic weights are maintained based on a recursive array layout. The recursive array layout facilitates transposable access to the synaptic weights. A neuronal spike event between an axon and a neuron is communicated via a corresponding connecting synapse by accessing the synaptic weight of the corresponding connecting synapse in the recursive array layout.
US09218562B2 Method for producing a contactless microcircuit
The invention relates to a method for manufacturing a contactless microcircuit antenna coil, including steps of: depositing a first electrically conducting layer on a first face of a wafer, and forming in the first layer an antenna coil in a spiral having several turns, including an internal turn coupled to an internal contact pad and an external turn coupled to an external contact pad, the external turn following the entire contour of antenna coil except for a zone through which a conducting path coupling the external contact pad to the external turn can pass, the external and internal contact pads of the antenna coil being formed in a central zone of the external turn, the antenna coil having a bypass zone in which each turn bypasses the external contact pad.
US09218559B2 Composite RF tag, and tool mounted with the composite RF tag
The present invention relates to a composite RF tag for transmitting and receiving information using an electromagnetic induction method, comprising a magnetic antenna mounted with an IC, and a resin layer formed around the magnetic antenna, wherein the magnetic antenna comprises a central core formed of a magnetic material and a coil-shaped electrode material disposed around the core. The RF tag according to the present invention comprises the magnetic antenna surrounded by the resin, and therefore can provide a composite magnetic RF tag which can minimize adverse influence by surrounding water or metals in view of maintenance of tools or parts to which the composite RF tag is mounted, and is free from occurrence of any failure or cracking.
US09218558B2 High-frequency fragile RFID electronic tag with anti-transfer function and preparation method therefor
The tag comprises a bearing substrate, a first adhesive layer, a resin film, an etching antenna layer, a chip, a first insulating layer, a conductive circuit layer, a second adhesive layer, and a pattern-bearing layer. The resin film is disposed between the bearing substrate and the etching antenna layer. The etching antenna layer is etched by copper foil or aluminum foil. The conductive circuit layer and the etching antenna layer are combined to construct a compound high-frequency antenna of the fragile RFID electronic tag. The conductive circuit layer fulfills a communication of a jumper wire on the etching antenna layer. The first insulating layer is disposed between the conductive circuit layer and the etching antenna layer. The chip is connected to the etching antenna layer. The etching antenna layer, the conductive circuit layer, the first insulating layer and the chip are combined to construct a core assembly. The pattern-bearing layer is adhered to the other side of the core assembly via the second adhesive layer.
US09218551B2 Method and device for rasterizing page digital image
The application discloses a method and an apparatus for rasterizing a page digital image. The method comprises steps of parsing a page digital image to obtain basic information, position information and rasterization information of the image, with the basic information including image data, image type, a width, height and bit depth of the image (S10); decoding data encoding type to obtain the image data and saving the image data into a buffer (S20); acquiring the image data from the buffer and rasterizing the image data by using the image type, the width, height and bit depth of the image and the position information to obtain a rasterized page lattice (S30). The solution may reduce the reading and writing operations for data files on disk and improve the rasterization efficiency of the digital image.
US09218549B2 Printing apparatus and print control method
A number of printable images on a continuous sheet and printing throughput can be increased when printing an image in which images of different sizes coexist and are arranged. In a printing apparatus which prints a plurality of images by using a full-line inkjet printhead while conveying the sheet, the size of an image and a position of a sheet where the image is printed are analyzed from inputted image data. A necessary type of preliminary discharge is determined in accordance with the analysis result. Then, print data is generated by adding, to the image data, data for preliminary discharge complying with the determined type of preliminary discharge. It is controlled to print by the full-line printhead based on the generated print data.
US09218545B2 Method and system for human action recognition
A method and a system for human action recognition are provided. In the method, a plurality of training data corresponding to a plurality of gestures are received and clustered into at least one group according to similarity between the training data, where the training data represent the gestures, and a corresponding relationship between the training data and the gestures may be one-to-one or many-to-one. An image sequence of human action is captured, and a data representing the human action to be identified is obtained there from. Then, a specific group having the highest similarity with the data to be identified is selected from the groups, and a ranking result of all the training data within the specific group is obtained through a rank classifier and the data to be identified. Finally, the human action is identified as the gesture represented by the first training data in the ranking result.
US09218544B2 Intelligent matcher based on situational or spatial orientation
Predicting likely fingerprint information (most likely finger, orientation, or otherwise), responsive to situational information or spatial orientation, for matching with a function button. The device determines first, second, and further likely choices. Responsive to display orientation and an accelerometer, the device determines whether the function button is on the right or left. Responsive to recent movement, the device determines the user's most likely hand movements. Responsive to a lifetime average, situational information, or accessories coupled to the device, the device determines the user's most likely finger choice. Responsive to most likely choice, the device can de-crypt match information while collecting fingerprints.
US09218540B2 Apparatus and computer readable medium for signal classification using spectrogram and templates
A classification apparatus includes: a spectrogram generation unit that generates a spectrogram of a time variation signal of a classification object by processing the time variation signal of the classification object obtained by a sensor; a two-dimensional Fourier transform calculation unit that calculates a two-dimensional Fourier transform of the generated spectrogram; a similarity calculation unit that calculates a similarity between an template image and an image of the obtained two-dimensional Fourier transform, for each template image corresponding to each phenomenon stored in the template image memorizing unit; and a determination unit that determines whether the time variation signal of the classification object conforms to any of one or more phenomena, on the basis of the calculated similarity.
US09218537B2 Image processing device and image processing method
An image processing device includes a processor; and a memory which stores a plurality of instructions which, when executed by the processor, cause the processor to execute: acquiring a picked image; selecting pixels, which are adjacent to each other, to be connected based on value of the pixels in the image; generating a pixel connected area which includes the connected pixels; extracting a feature point from an outer edge of the pixel connected area; and calculating a moved amount of the feature point on the basis of the feature point of a plurality of images that have been picked at the first time and the second time by the acquiring.
US09218533B2 Method and device for assigning sources and sinks to routes of individuals
A method for assigning a source or a sink to a route of an individual has the steps: defining source/sink location data indicating possible sources and/or sinks in a monitored compound, monitoring a route of a moving individual in the monitored compound, generating routing data from the monitored route with initial and terminal location data. After determining an initial and/or a terminal movement vector from the initial and/or the terminal location data, a plurality of initial distance vectors between each of the source location data and the initial location data and/or a plurality of terminal distance vectors between each of the sink location data and the terminal location data are determined, which are correlated with each of the initial distance vectors and/or terminal distance vectors in order to assign respective source location data and/or sink location data to the monitored route on the basis of the correlation results.
US09218530B2 Smartphone-based methods and systems
Methods and arrangements involving portable devices, such as smartphones and tablet computers, are disclosed. One arrangement enables a creator of content to select software with which that creator's content should be rendered—assuring continuity between artistic intention and delivery. Another arrangement utilizes the camera of a smartphone to identify nearby subjects, and take actions based thereon. Others rely on near field chip (RFID) identification of objects, or on identification of audio streams (e.g., music, voice). Some of the detailed technologies concern improvements to the user interfaces associated with such devices. Others involve use of these devices in connection with shopping, text entry, sign language interpretation, and vision-based discovery. Still other improvements are architectural in nature, e.g., relating to evidence-based state machines, and blackboard systems. Yet other technologies concern use of linked data in portable devices—some of which exploit GPU capabilities. Still other technologies concern computational photography. A great variety of other features and arrangements are also detailed.
US09218527B2 Anomaly detection in streaming data
An example method for anomaly detection in streaming data includes applying statistical analysis to streaming data in a sliding window. The method also includes extracting a feature. The method also includes determining class assignment for the feature using class conditional probability densities and a threshold.
US09218526B2 Apparatus and method to detect a paper document using one or more sensors
An apparatus and method for detecting paper documents, books, or other objects using one or more sensors on one or more computing devices is disclosed. The one or more computing devices communicate and share information such that a paper document, book, or other object is detected and identified. Once identified, information relevant to the paper document, book, or other object is retrieved. Such an apparatus and method is disclosed to help to create a smart or interactive paper environment.
US09218525B2 Shape recognition using partial shapes
Shape recognition is performed based on determining whether one or more ink strokes is not part of a shape or a partial shape. Ink strokes are divided into segments and the segments analyzed employing a relative angular distance histogram. The histogram analysis yields stable, incremental, and discriminating featurization results. Neural networks may also be employed along with the histogram analysis to determine complete shapes from partial shape entries and autocomplete suggestions provided to users for conversion of the shape into a known object.
US09218524B2 Automatic spatial context based multi-object segmentation in 3D images
Methods and systems for automatic classification of images of internal structures of human and animal bodies. A method includes receiving a magnetic resonance (MR) image testing model and determining a testing volume of the testing model that includes areas of the testing model to be classified as bone or cartilage. The method includes modifying the testing model so that the testing volume corresponds to a mean shape and a shape variation space of an active shape model and producing an initial classification of the testing volume by fitting the testing volume to the mean shape and the shape variation space. The method includes producing a refined classification of the testing volume into bone areas and cartilage areas by refining the boundaries of the testing volume with respect to the active shape model and segmenting the MR image testing model into different areas corresponding to bone areas and cartilage areas.
US09218522B2 Method for determining fingerprint authenticity and device for the same
A method capable of determining fingerprint authenticity is disclosed. The method includes capturing a fingerprint image, performing an analysis program when executed analyzing the fingerprint image using a first color model to obtain a first chromaticity coordinate corresponding to the fingerprint image, performing a conversion program when executed converting the first chromaticity coordinate into a second chromaticity coordinate, performing a verification program when executed determining whether the second chromaticity coordinate satisfies a second predetermined skin color threshold, when the second chromaticity coordinate satisfies the second predetermined skin color threshold confirming the fingerprint image is authentic, and concluding the fingerprint image is forged when the second chromaticity coordinate fails to satisfy the second predetermined skin color threshold.
US09218518B2 Method of operating contactless IC card reader, detection circuit of contactless IC card reader, contactless IC card reader and card system including the same
A method of operating a contactless integrated circuit (IC) card reader includes calculating a first transition time of at least one first magnetic pulse during a first transition interval and calculating a second transition time of a second magnetic pulse during a second transition interval. The first transition time is calculated in a calibration phase, and the second transition time is calculated in a detection phase. A contactless IC card is determined to be within a communication rage of the reader based on a comparison of the first and second transition times.
US09218517B2 Card reader device and method of use
A card reader device for reading a card having data stored on a magnetic stripe incorporated into the card is disclosed in which the card reader device comprises a read head for passing a magnetic stripe of a card by to read data stored on a magnetic stripe and for producing a signal indicative of data stored on a magnetic stripe, and an output plug adapted to be inserted into a headset jack associated with a host device for providing the signal indicative of data stored on a magnetic stripe to a host device.
US09218515B2 Radio frequency identification communication and applications thereof
Embodiments of the present disclosure describe devices, methods, computer-readable media and system configurations for communicating and utilizing data received in radio frequency identification (“RFID”) signals to perform various actions. For example, a query signal may be transmitted to a plurality of RFID tags associated with a plurality of objects. A plurality of reply signals may be received from the plurality of RFID tags. Various actions may be performed based on one or more of the reply signals. In various embodiments, an RFID query device may include components such as a camera to capture image data and/or a global positioning system (“GPS”) component. Data from one or more of these components may be used in conjunction with received RFID data to perform various actions. Other embodiments may be described and/or claimed.
US09218514B2 Apparatuses and method of switched-capacitor integrator
Provided is a switched-capacitor integrator, a method of operating the switched-capacitor integrator, and apparatuses including the switched-capacitor integrator. The switched-capacitor integrator including an amplifier including a first input terminal, a second input terminal, and an output terminal, a first capacitor disposed between the first input terminal and the output terminal, and a switched capacitor circuit configured to sample an input signal in response to control signals, and to integrate a difference between a feedback signal and the input signal while sampling the input signal.
US09218512B2 Portable computer and operating method thereof
A portable computer and an operating method thereof are provided. The portable computer comprises an input device, a power button, a non-volatile memory, a central processing unit (CPU), an embedded controller (EC), and a chipset. The input device inputs a user password, and the non-volatile memory stores a default password. The EC, in a soft off status, determines whether the power button protection item is enabled. The EC locks the power button if the power button protection item is enabled. The EC determines whether the user password is the same as the default password. The EC unlocks the power button if the user password is the same as the default password. The chipset is coupled to the non-volatile memory, the CPU and the EC.
US09218510B2 Personal writing device with user recognition capabilities and personal information storage
Systems and method for a handheld biometrically secured user input device are described. A biometric authentication device may be coupled with a handheld enclosure, the biometric authentication device capable of collecting user authentication information from a user to authenticate the user's identity. A computer-readable storage device may be coupled with the handheld enclosure for storing confidential financial information of the user, wherein access to the confidential financial information is granted only after the user's identity has been authenticated. A sensor may be coupled with the handheld enclosure, capable of capturing the user's handwriting. Also, a communication device may be configured to transmit information gathered with the sensor to a computer system.
US09218508B2 Electronic device and protection method thereof
An electronic device includes a positioning module, a micro processing unit and a first storing device. The micro processing unit electrically connects with the positioning module and the first storing device. The electronic detects a position thereof via the positioning module and generates a positioning coordinate datum. The micro processing unit determines whether the electronic device is in a preset working area through the positioning coordinate datum. When the electronic device is not in the preset working area, the micro processing unit stops the electronic device from accessing the first storing device. When the electronic device is in the preset working area, the micro-processing unit allows the electronic device to access the first storing device and boot a first operating system stored thereon.
US09218507B2 Method and apparatus for managing confidential information
The invention is a method and apparatus for managing the secure acquisition, storage and disclosure of confidential information, to facilitate identity rights management; and/or preemptively authorized data querying techniques to preserve the anonymity of disclosed personal data.
US09218506B2 Methods and systems for preventing hardware trojan insertion
Provided are methods and systems for preventing hardware Trojan insertion. An example method can comprise determining unused space in an integrated circuit (IC), selecting a plurality of built-in self-authentication (BISA) filler cells based on the determined unused space, and placing the selected plurality of BISA filler cells onto the unused space. The plurality of BISA filler cells can be connected to form a plurality of BISA blocks. The plurality of BISA blocks can correspond to a plurality of signatures. A modification of one or more BISA filler cell can lead to an alteration of one or more signatures.
US09218497B2 Incentive-based app execution
Systems and methods of a personal daemon, executing as a background process on a mobile computing device, for providing personal assistant to an associated user is presented. Also executing on the mobile computing device is a scheduling manager. The personal daemon executes one or more personal assistance actions on behalf of the associated user. The scheduling manager responds to events in support of the personal daemon. More particularly, in response to receiving an event the scheduling manager determines a set of apps that are responsive to the received event and from that set of apps, identifies at least a first subset of apps for execution on the mobile computing device. The scheduling manager receives feedback information regarding the usefulness of the executed apps of the first subset of apps and updates the associated score of each of the apps of the first subset of apps.
US09218493B2 Key camouflaging using a machine identifier
A method is provided for generating a human readable passcode to an authorized user including providing a control access datum and a PIN, and generating a unique machine identifier for the user machine. The method further includes modifying the controlled access datum, encrypting the controlled access datum using the PIN and/or a unique machine identifier to camouflage the datum, and generating a passcode using the camouflaged datum and the PIN and/or the unique machine identifier. A mobile user device may be used to execute the method in one embodiment. The passcode may be used to obtain transaction authorization and/or access to a secured system or secured data. The unique machine identifier may be defined by a machine effective speed calibration derived from information collected from and unique to the user machine.
US09218490B2 Using a trusted platform module for boot policy and secure firmware
Embodiments of apparatuses and methods for using a trusted platform module for boot policy and secure firmware are disclosed. In one embodiment, a trusted platform module includes a non-volatile memory, a port, and a mapping structure. The port is to receive an input/output transaction from a serial bus. The transaction includes a system memory address in the address space of a processor. The mapping structure is to map the system memory address to a first location in non-volatile memory.
US09218489B2 Systems and methods involving features of hardware virtualization such as separation kernel hypervisors, hypervisors, hypervisor guest context, hypervisor contest, rootkit detection/prevention, and/or other features
Systems, methods, computer readable media and articles of manufacture consistent with innovations herein are directed to computer virtualization, computer security and/or data isolation. According to some illustrative implementations, innovations herein may utilize and/or involve a separation kernel hypervisor which may include the use of a guest operating system virtual machine protection domain, a virtualization assistance layer, and/or a rootkit defense mechanism (which may be proximate in temporal and/or spatial locality to malicious code, but isolated from it), inter alia, for detection and/or prevention of malicious code, for example, in a manner/context that is isolated and not able to be corrupted, detected, prevented, bypassed, and/or otherwise affected by the malicious code.
US09218484B2 Control method and information processing apparatus
A control method is executed by an information processing apparatus that includes a first processor; a second processor that executes a program to be protected; first memory that is shared between the first and the second processors; and non-volatile second memory that stores the program to be protected. The control method includes reading the program that is to be protected and stored in the second memory, when the information processing apparatus is started up; encrypting the read program only once after start up of the information processing apparatus; writing the encrypted program into the first memory; and decrypting the encrypted program that is written in the first memory, and causing the second processor to execute the decrypted program.
US09218479B2 Method and system for computing code management platform
A method for authenticating a computing device includes: storing an account profile, the profile including data related to a service account including an alphanumeric code; generating a session identifier and a seed value; computing a first hash using the session identifier; computing a second hash using the session identifier and the alphanumeric code; computing a third hash using the second hash and a utilized seed value; transmitting the session identifier to a computing device via a first communication protocol; transmitting the session identifier and first hash to a remote notification service for transmission to the computing device via a second communication protocol; receiving a fourth hash and the session identifier from the computing device via the first communication protocol; validating the fourth hash based on a comparison of the fourth hash and the computed third hash; and transmitting a validation result to the computing device based on the validation step.
US09218475B2 Scalable groups of authenticated entities
Example embodiments provide various techniques for securing communications within a group of entities. In one example method, a request from an entity to join the group is received and a signed, digital certificate associated with the entity is accessed. Here, the signed, digital certificate is signed with a group private key that is associated with a certification authority for the group. The signed, digital certificate is added to a group roster, and this addition is to admit the entity into the group. The group roster with the signed, digital certificate is itself signed with the group private key and distributed to the group, which includes the entity that transmitted the request. Communication to the entity is then encrypted using the signed, digital certificate included in the group roster.
US09218474B1 Enhanced biometric security measures
Functionality is disclosed for enhancing the security of a computing device equipped with a fingerprint input device. A pre-unlock operation is performed when a duress fingerprint is used to access a locked device. The pre-unlock operation may include one or more computer-implemented mechanisms to secure, hide, remove, move, encrypt, disassociate, communicate or modify data stored on the device and/or remote locations. In some embodiments, the pre-unlock operation may direct a device to capture information and communicate such information to remote computers contemporaneously with the receipt of a duress fingerprint.
US09218471B2 Lock function handling for information processing devices
Embodiments relate to a method, program product and an information processing device for handling lock functions. The device includes a lock function for restricting user operations and a lock setting unit responsive to the lock function for transitioning the information processing device to a locked state after a period of inactivity. It also includes a lock releasing unit responsive to the lock setting unit for releasing the locked state in response to the input of a predetermined first password and a changing unit responsive to the lock releasing unit for changing the number of characters to be inputted in the first password to release the locked state.
US09218470B2 Systems and methods for non-destructive testing user profiles
A non-transitory computer readable medium may include executable instructions which, when executed by a processor, cause the processor to authenticate a user, and to retrieve a user profile based on the user. The instructions further cause the processor to apply the user profile to restrict an operation of a non-destructive testing (NDT) device.
US09218468B1 Systems and methods for verifying attributes of users of online systems
For sharing of information in a virtual or online environment, methods and systems are provided which enable verifying attributes of an individual. An individual registered for participation in a virtual or online environment may provide evidence of the attributes from a verification source that exists outside the virtual or online environment. An administrator associated with the virtual or online environment verifies the attributes by receipt of the evidence. Alternatively, the attribute for the individual may be verified after receipt of one or more signals indicating individuals registered for participation in the virtual or online environment have corroborated the attributes. A verification indication for an attribute may be shared with other individuals in the virtual or online environment.
US09218467B2 Intra stack frame randomization for protecting applications against code injection attack
A method of randomizing locations of variables in a stack includes: identifying a plurality of stack locations corresponding to a plurality of variables; shuffling the stack locations of the variables to produce shuffled stack locations; and updating the stack locations of the variables with the shuffled stack locations.
US09218466B2 Systems and methods for detecting copied computer code using fingerprints
Systems and methods of detecting copying of computer code or portions of computer code involve generating unique fingerprints from compiled computer binaries. The unique fingerprints are simplified representations of the compiled computer binaries and are compared with each other to identify similarities between the compiled computer binaries. Copying can be detected when there are sufficient similarities between at least portions of two compiled computer binaries.
US09218465B2 Digital media content creation and distribution methods
A system and methods for digital content creation and upload through a managed website for providing network-based access to authorized users who pay for predetermined rights that allow for use of the content by the authorized user on a multiplicity of devices, without having to repurchase access to the same content.
US09218457B2 Systems and methods for identifying unknown drug targets via adverse event data
The present disclosure is directed to systems and methods for identifying unknown drug targets via adverse event data. An analyzer receives an identification of a first drug having one or more unknown target proteins and identifies a second drug related to the first drug. The analyzer retrieves, from an adverse event database, a first side effect profile associated with the first drug, and a second side effect profile associated with the second drug. The analyzer generates a third side effect profile including a subset of the first side effect profile not shared by the second side effect profile, and identifies a third drug having a fourth side effect profile including the third side effect profile. The analyzer retrieves a list of one or more target proteins of the third drug not targeted by the second drug, and presents the retrieved list as potential target proteins of the first drug.
US09218456B2 Communication protocol for medical devices that supports enhanced security
A diabetes management system is provided that employs a communication protocol with enhanced security. The diabetes management system includes: a medical device operable to perform a diabetes care function in relation to a patient and store data related to the operation thereof; and a diabetes care manager in data communication with the medical device using a communication protocol defined in accordance with IEEE standard 11073. The diabetes care manager is able to request access to a given security role supported by the medical device, where the given security role is associated with a set of commands that are defined as a private extension of the communication protocol.
US09218455B2 Dynamic pairing of devices with a medical application
Mobile or embedded devices are dynamically paired with medical applications. By displaying identifying information associated with the medical application and capturing the display with a sensing device, the identifying information may be used by a server to route sensed data from the sensing device to the medical application for the patient. Barcodes or other identifying information may be used. The mobile device may be a smart phone, allowing smart phones to be dynamically paired with the medical application as desired by the user.
US09218453B2 Blood glucose management and interface systems and methods
A blood glucose management device is operable to seamlessly provide a sequence of at least two displays of data relating to one or more blood glucose measurements to a user, upon minimal user interaction, with the blood glucose management device.
US09218452B2 Method and system to automatically load user settings to wireless ultrasound probe
An ultrasound imaging system is provided, including a beamformer in communication with a transducer probe to acquire ultrasound image data for communication by a transceiver. An identity server can include a series of profiles each including a unique identifier of an external environment and a unique predefined system setting of the system. A tracking system can scan for a first tag having a unique identifier of a user of the system and for a second tag having a unique identifier of the patient. The identity server is operable to select a match of one of the series of profiles based on the acquired unique identifier and automatically communicate the profile to the transceiver for automatic activation of the system settings to the ultrasound imaging system.
US09218451B2 Processing data from genotyping chips
Processing genetic data includes receiving two or more genetic data sets for an individual from one or more genetic data sources, wherein the genetic data sets comprises data pertaining to the individual's deoxyribonucleic acid (DNA); merging the genetic data sets from the one or more genetic data sources to obtain a set of merged genetic data for the individual, including: identifying data in the genetic data sets that is conflicting, the identified data corresponding to a genetic marker associated with a variation that occurs at a region in the individual's genome; analyzing the identified data to resolve a discrepancy attributed to the identified conflicting data and automatically determine an appropriate value that corresponds to the genetic marker, the analysis and the determination being based at least in part on contextual information; and storing the appropriate value in the set of merged genetic data.
US09218443B1 Heterogeneous multiprocessor program compilation targeting programmable integrated circuits
OpenCL program compilation may include generating, using a processor, a register transfer level (RTL) description of a first kernel of a heterogeneous, multiprocessor design and integrating the RTL description of the first kernel with a base platform circuit design. The base platform circuit design provides a static interface within a programmable integrated circuit to a host of the heterogeneous, multiprocessor design. A first configuration bitstream may be generated from the RTL description of the first kernel using the processor. The first configuration bitstream specifies a hardware implementation of the first kernel and supporting data for the configuration bitstream. The first configuration bitstream and the supporting data may be included within a binary container.
US09218442B2 Firmware and hardware verification using Opcode comparison
A verification method is provided and includes randomly choosing a hardware executed instruction in a predefined program to force Opcode Compare on, determining an identity of a corresponding opcode from the chosen instruction and initializing Opcode Compare logic to trap the chosen instruction to firmware and creating firmware to initiate performance of hardware verification in the firmware and re-initiating performance of the hardware verification in hardware.
US09218438B2 Computing architecture for storing a graph database based on temporal aspects of its edges
Data specifying a new edge of a graph database may be received. A data store for storing the new edge may be identified from amongst a plurality of data stores utilized to store one or more portions of the graph database. Each of the plurality of data stores may be associated with a set of values corresponding to an aspect of edges of the graph database. The data store for storing the new edge may be identified based on the new edge being associated with a value corresponding to the aspect of edges of the graph database that is within a set of values corresponding to the aspect of edges of the graph database associated with the data store for storing the new edge.
US09218437B1 Systems and methods providing event data
Computer applications may generate a large volume of different types of record data. In one example, the large volume of record data may represent millions of different processes occurring every second. Described herein are systems, methods and devices for generating parsed data based on the large volume of record data. The parsed data may be consumed by computing nodes within a designated amount of time from the generation of the record data.
US09218433B2 Online logo tool
An online tool allows a user, such as an online merchant, to access a page of a service provider, select a format, customize funding sources and designs, and copy and paste the code to the merchant page to quickly and easily create a customized funding source graphic.
US09218432B2 Personnel crisis communication management system
Systems and methods are disclosed for providing personnel communications management within an enterprise or group of related enterprises during crisis situations. In particular, the systems and methods provide event management, shared situational awareness, personnel tracking, and unified crisis notification management to multiple users.
US09218431B2 System for linked and networked document objects
Systems and methods for searching relationships between and among documents are disclosed. A user interface for presenting document objects and relationships between document objects located on a network is also disclosed. The document objects provided to the user may be determined based on document object references corresponding to the document objects. Document object information, relationship information, and contextual relationship information may also be provided to the user.
US09218427B1 Dynamic semantic models having multiple indices
Embodiments are directed towards dynamic semantic models having multiple indices. Source data may be provided to a network computer from at least one separate data source. A raw data graph may be generated from the source data such that the structure of the raw data graph may be based on the structure of the source data. Elements of the raw data graph may be mapped to a concept graph. Concept instances may be generated based on the concept graph, the raw data graph, and the source data. Model-identifiers (MIDs) that correspond to the concept instances may be generated to include at least a path in the concept graph The MID values may be indexed into a plurality of indices based on a content-type of the data associated with the MIDs. In response to a query, a result set may be generated that includes result MIDs.
US09218422B2 Personalized deeplinks for search results
Search results are provided with personalized deeplinks for an end user. User behavior information is gathered regarding web pages visited by the end user. When the end user submits a search query, the website category of a search result is identified and user behavior information regarding web pages visited at other websites within the website category is identified. At least one deeplink is selected for the search result based on that user behavior information. In some instances, user behavior information may be tracked for a group of end users. The user behavior information for the group of end users may be used in conjunction with the user behavior information for the end user to facilitate deeplink selections for search results returned in response to search queries from the end user.
US09218419B2 Snapshot generation for search results page preview
Methods, systems, and programming for providing web page snapshots are disclosed. A URL is received. A snapshot of the web page associated with the URL is generated. A plurality of features is extracted from the snapshot. A determination is made regarding whether the snapshot is high quality based on the plurality of extracted features of the snapshot. The generated snapshot is provided as a viewable and actionable link to the URL.
US09218418B2 Search expression generation system
A search expression is automatically generated for designating a target element for a Web page whose contents change according to a system state or the number of elements to be displayed. The search expression generation device comprises the model sentence accumulation unit which accumulates a plurality of model sentences of structured documents, the element designation unit which designates an element to be searched in a model sentence, the structured document analysis unit which analyzes a structure of a model sentence, and the search expression structuring unit which adds or deletes the element selected to or from a search expression, wherein the structured document analysis unit analyzes a structure of a model sentence to generate a search expression with a condition added which is common to a plurality of model sentences of the same kind.
US09218416B2 Method for forming database on basis of relationship between video data, and database formation system
The present invention relates to a method and system for constructing a database (DB) based on mutual relations between pieces of video data. The present invention provides the method of constructing a DB based on mutual relations between pieces of video data, including 1) generating one or more nodes so that pieces of identical video data are included in an identical node, 2) generating pieces of node information about respective generated nodes, 3) comparing comparison target video data with pieces of video data of the respective nodes, and then setting relations between the comparison target video data and the pieces of video data of the respective nodes, and 4) updating pieces of node information about the respective nodes, based on the set relations, and also provides a DB construction system using the method.
US09218415B2 System and method for providing broadcast listener participation
A method of allowing listeners to participate in broadcast programming is provided, the method generally comprising one or more of providing a library of media elements accessible by a plurality of listeners; receiving from each of at least two of the listeners a playlist of media elements, wherein at least one of the media elements in each playlist is from the library of media elements; editing the playlists using broadcast scheduling software; providing the edited playlists to the plurality of listeners for playback, and for feedback regarding the playlists; and receiving feedback from at least one of the listeners regarding the playlists. A system and apparatus are similarly provided.
US09218414B2 System, method, and user interface for a search engine based on multi-document summarization
A method for searching multiple documents on a computer system includes steps for sending a query to a system core where the query is passed to a search component for searching the documents. The system core in turn receives results from the search component indicating related documents to the query and passes to a summarization component a specified number of the results. The summarization component processes related documents corresponding to the specified number of results to produce a multi-document summary. The system core receives the summary from the summarization component. The multi-document summary is received from the system core.
US09218413B2 Venue-related multi-media management, streaming, online ticketing, and electronic commerce techniques implemented via computer networks and mobile devices
Various aspects described or referenced herein are directed to different methods, systems, and computer program products relating to multi-media management and streaming techniques implemented over a computer network, including, for example, one or more features and/or functions relation to one or more of the following (or combinations thereof): venue-based streaming radio stations, mobile user graphical user interfaces, creation and streaming of dynamic streaming radio stations based on a user's geolocation, ticketing and reservations, etc.
US09218409B2 Method for generating and using a reusable custom-defined nestable compound data type as database qualifiers
A method for generating and using a reusable custom-defined nestable compound data type for use as a database qualifier provides significant advantages over using traditional non-reusable structured tables of RDBM systems is described. The method and data structures of the invention may be used to define and instantiate flexible nested-record structures that reverse and better expose the relationship between parent records and private child sub-records in a database schema to provide improved referential integrity and visibility into database structure.
US09218406B2 System and method for managing user data in a plurality of storage appliances over a wide area network for collaboration, protection, publication, or sharing
In various embodiments, the present invention relates to a method of operating a server to manage user data in a plurality of storage appliances. The method involves establishing in a database system, via the server, information for each registered user; establishing and storing in the database system a set of relationships, based on designations by the users, among registered storage appliances and container designations; and using a central service running on the server to deliver storage appliance-container relationship data to the storage appliances so as to enable the appliances to substantiate the containers therein, and to replicate user data with other storage appliances that have substantiated corresponding containers, in a manner consistent with the stored relationships, and wherein the central service operates without interaction with user data stored in the containers.
US09218404B2 Replication support for heterogeneous data types
A method, system and computer readable storage medium for replicating database data of heterogeneous data type are disclosed. The method includes determining the data type of an element of heterogeneous data type to be replicated. The element is packed into a predetermined transfer format as an opaque data type, based on the determined data type, and replicated to a replication server. The replication server is instructed to not modify the element noted as opaque.
US09218399B2 Global value networks
A method and system to develop a digital platform by organizing of data sets, interactions and communications of the participants in structured categories and thereby deriving value networks of any economic entity or industry comprising of individuals or groups or legal entities or any combination of those to facilitate, enhance and encourage evolving value network cycles commencing from value creation to value consumption. The platform may comprise a service database configured to store information associated with value networks, a user interface coupled with and configured to interact with the service database, a search engine coupled with the user interface and configured to perform searches in the service database, a catalog creation and updation module configured to create a catalog and store the same in the service database, said catalog comprising one or more data structures including but not limited to industry, sub-sectors, functions, sub-functions, supporting functions, and components; and further update the value networks thus created.
US09218394B2 Reading rows from memory prior to reading rows from secondary storage
In an embodiment, a first plurality of rows of a first table are read from memory in an order of page addresses of pages in the memory that comprise the first plurality of rows. First selected rows from the first plurality of rows that meet a query predicate are stored into a result set. After the reading the first plurality of rows in the order of the page addresses, a second plurality of rows of the first table are read from secondary storage, in an order of row identifiers of the second plurality of the rows in the first table. Second selected rows from the second plurality of rows that meet the query predicate are stored into the result set.
US09218392B1 Interest related search results
Technology is described for providing search results based on a search query. The method may include receiving the search query. A user interest based on the search query may also be identified. The user interest may be compared with currently trending interests. Interest items based on the currently trending interests that relate to the user interest may be identified.
US09218390B2 Query parser derivation computing device and method for making a query parser for parsing unstructured search queries
A system and method is provided which may comprise parsing an unstructured geographic web-search query into a field-based format, by utilizing conditional random fields, learned by semi-supervised automated learning, to parse structured information from the unstructured geographic web-search query. The system and method may also comprise establishing semi-supervised conditional random fields utilizing one of a rule-based finite state machine model and a statistics-based conditional random field model. Systematic geographic parsing may be used with the one of the rule-based finite state machine model and the statistics-based conditional random field model. Parsing an unstructured local geographical web-based query in local domain may be done by applying a learned model parser to the query, using at least one class-based query log from a form-based query system. The learned model parser may comprise at least one class-level n-gram language model-based feature harvested from a structured query log.
US09218381B2 Method and apparatus for portable index on a removable storage medium
Techniques for supporting a portable index include, in response to determining that a removable computer-readable storage medium is recently mounted on a particular drive having a particular drive identifier, determining a particular media identifier for the removable computer readable storage medium. Before harvesting metadata from each file of a set of one or more files on the removable computer-readable storage medium, it is determined whether a portable index file is stored on the removable computer-readable storage medium. The portable index file includes, for each file of the set, data that associates the media identifier (312) and a relative directory path (314) for one file of the set with metadata (316) for the one file. If the portable index file is stored, then an index is caused to be retrieved from the portable index file without harvesting metadata from each file of the set.
US09218379B2 Method, apparatus, and computer-readable medium for efficiently performing operations on distinct data values
An apparatus, computer-readable medium, and computer-implemented method for efficiently performing operations on distinct data values, including storing a tokenized column of data in a table by mapping each unique data value in a corresponding domain to a unique entity ID, and replacing each of the data values in the column with the corresponding entity ID to generate a column of tokenized data containing one or more entity IDs, receiving a query directed to the column of data, the query defining one or more group sets for grouping the data retrieved in response to the query, and generating an entity map vector for each group set, the length of each entity map vector equal to the number of unique entity IDs for the domain, and the value of each bit in the entity map vector indicating the presence or absence of a different unique entity ID in the group set.
US09218374B2 Collaborative restore in a networked storage system
A storage system according to certain embodiments includes a client-side signature repository that includes information representative of a set of data blocks stored in primary storage. During restore operations, the system can use the client-side signature repository to identify data blocks located in primary storage. The system can also use the client-side signature repository to identify multiple locations within primary storage where instances of some of the data blocks to be restored are located. Accordingly, during a restore operation of one client computing device, the system can source a data block to be restored to the client computing device from another client computing device that is in primary storage.
US09218373B2 In-memory data profiling
In an example embodiment, a method of performing data profiling in an in-memory database is provided. A command requesting a data attribute calculation on data in the in-memory database may be received. A precreated procedure stored in the in-memory database may then be used to perform the data attribute calculation on the data in the in-memory database The precreated procedure may be described in a computer language utilized by the in-memory database. Finally, a result of the performing of the data attribute calculation may be returned to the client computer.
US09218371B2 Automatic table cleanup for relational databases
An approach for an automatic table cleanup process of use, implemented in relational databases, are provided. A method includes setting up a table cleanup process in a database which is operable to perform an automatic table cleanup on a table within the database using an auto purge value associated with the table. The method further includes altering the table with a virtual column to keep track of dates on the table. The method further includes turning on an automatic table maintenance capability of the database to include and initiate the table cleanup process. The method further includes running the table cleanup process to perform the automatic table cleanup using dates which are automatically filled in during an insert or update operation on the table, the table cleanup process comprising looking through the records and automatically purging the table when the auto purge value has been met.
US09218369B2 Ranking image search results using hover data
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for ranking images using hover data. In one aspect, a method includes determining a click count and a hover count for an image and a search query pair. The click count specifies a number of times that an image search result that includes a representation of the image has been selected when provided in response to the search query. The hover count specifies a number of times that the representation of the image has been hovered over when the image search result has been provided in response to the search query. A quality measure for the image with respect to the search query is determined. The quality measure is based on the click count and the hover count. A ranking of the image is adjusted for the search query based on the quality measure for the image.
US09218368B2 System and method for organizing files based on an identification code
A system for determining a time that a file was created and associating an ID with the file based on the file creation time is disclosed. The system adjusts the creation time by a time zone offset. In the case of image files, the file creation time may be based on information associated with the image: (1) by the camera that took the picture (exchangeable image file data); (2) when the photo was last modified in memory (file modification time data); (3) based on the raw date and time the photo file was created (file date-time data); and (4) when the photo was imported onto a client device. The system may rename the file with this adjusted creation time to create a standardized name. As a result, the standardized name provides a filename nomenclature that is based on the actual or estimated time of when the file was created.
US09218367B2 Method and interface for indexing related media from multiple sources
The invention relates generally to the field of digital image processing, and in particular to a method for associating and viewing related video and still images. In particular, the present invention is directed to methods for associating and/or viewing digital content records comprising ordering a first set of digital content records and the second set of digital content records based upon information associated with each of the digital content records.
US09218365B2 Device, system, and method of visual inference by collaborative composition
Device, system, and method of visual inference by collaborative composition. A method of searching for similar target content-items for a plurality of source content-items, the method implementable on a computing device, comprises: for each of said plurality of source content-items, searching for similar target content-items in a dataset, while taking into account collaborative feedback exchanged among at least some of currently-searched said plurality of source content-items.
US09218364B1 Monitoring an any-image labeling engine
A system for monitoring an image tagging system comprises a processor and a memory. The processor is configured to provide a user display for a type of monitoring of an image tagging system. The user display includes image tagging monitoring for: a) in the event that a computer vision match is found, a computer vision match and an associated computer vision tag and, b) in the event that no computer vision match is found, a human vision match and an associated human vision tag. A memory coupled to the processor and configured to provide the processor with instructions.
US09218363B2 System and method for maintaining location information in a database
The invention relates to a method for maintaining location information in a database. An application running in a client device scans for stationary devices that have a unique identifier. If such a device is found, the location of the device by means of the unique identifier is looked up from a central server comprising a database. If the unique identifier is in the database the physical location of the stationary device could be retrieved. As the stationary device is in the vicinity of the stationary device, the physical location of the user using the stationary device is known. If the unique identifier of the stationary device is not found, the user is asked once to identify its location. The unique identifier and location is then stored in the data structure of the database. Subsequent requests by a client device for the same stationary device will result in a known location.
US09218359B2 Method and system for profiling virtual application resource utilization patterns by executing virtualized application
A method and system for profiling execution of an application implemented by an application file comprising a plurality of data blocks. The application is executed in response to an execute command from a management process. Read messages are sent to the management process each time the application reads one or more of the plurality of data blocks of the application file. The management process records information about the read operations in one or more transcripts which may be used to create a streaming model for the application allowing the application to be downloaded using a conventional download protocol without using a specialized streaming protocol.
US09218352B2 Methods and systems for storing sequence read data
The present invention generally relates to storing sequence read data. The invention can involve obtaining a plurality of sequence reads from a sample, identifying one or more sets of duplicative sequence reads within the plurality of sequence reads, and storing only one of the sequence reads from each set of duplicative sequence reads in a text file using nucleotide characters.
US09218350B2 Searching and placeholders
Aspects of the subject matter described herein relate to file system placeholders. In aspects, placeholders may be used by a client to represent remote file system objects. The placeholders may include metadata, searchable text, and may also include none, some, or all of the content of the represented remote file system objects. Search data from the placeholders is integrated into a local search database of the client such that the client is able to satisfy queries and identify relevant local and remote file system objects even when the client is offline with respect to remote storage.
US09218345B1 System and method for backing up a computer system
A backup computer storage system that protects and/or recovers data on a primary computer storage system is disclosed. The backup computer system may be used to backup databases, files, and/or applications. In some embodiments, the backup system may be used to backup an image of the primary computer storage system. In other embodiments, the backup system may be used to backup one or more databases, replicate an image of data that is on the primary computer storage system, restore data from the backup system to the primary computer storage system, restore data to a database while non-affected portions of the database are available and can be used, record all transactions in real time without overwriting any previously stored backup data, and maintain historical and/or chronological information related to backed up data.
US09218343B2 Partition file system for virtual machine memory management
A virtual machine of an information handling system (IHS) initializes an operating system to provide partition file system memory management during application execution. The operating system employs multiple partitions that include one or more applications for execution within the virtual machine. A file system tool identifies write operations to a global file system and generates local and common file system information. The file system tool populates the local file systems that include delta local file systems and differential file systems with write operation data. The file system tool may generate stackable common delta file system information to store write operation data common to two or more partitions that employ executing applications. The file system tool may combine or separate stackable common delta file system information to provide improvements in virtual machine memory utilization.
US09218342B2 Conversion of a document while retaining a format of an element of the document
One or more techniques and/or systems are disclosed for high fidelity conversion of a document to a less rich format. A bounding area can be identified in the document that comprises an unsupported element, and/or a blending of elements that is not supported in the less rich format. The bounding area that comprises the unsupported element(s) can be rasterized, by creating an image and identifying raster data for the image. Those elements in the document that are outside the bounding area are not rasterized, and their vector data-based format is retained in the converted document.
US09218339B2 Computer-implemented systems and methods for content scoring of spoken responses
Systems and methods are provided for scoring a non-scripted speech sample. A system includes one or more data processors and one or more computer-readable mediums. The computer-readable mediums are encoded with a non-scripted speech sample data structure, where the non-scripted speech sample data structure includes: a speech sample identifier that identifies a non-scripted speech sample, a content feature extracted from the non-scripted speech sample, and a content-based speech score for the non-scripted speech sample. The computer-readable mediums further include instructions for commanding the one or more data processors to extract the content feature from a set of words automatically recognized in the non-scripted speech sample and to score the non-scripted speech sample by providing the extracted content feature to a scoring model to generate the content-based speech score.
US09218334B2 Pronounceable domain names
Embodiments of the present teachings relate to systems and methods for generating pronounceable domain names. The method includes proving a list of character strings; filtering the list of character strings through a first filter based on a phonetic model to produce a first filtered list of character strings; filtering the list of character strings through a second filter based on a character order mode to produce a second filtered list of character strings; and generating, by a processor, a list of pronounceable domain names based on the first filtered list of character strings and the second filtered list of character strings.
US09218333B2 Context sensitive auto-correction
Methods, systems, and computer program products are provided for adaptively autocorrecting text according to context. Text may be received at a mobile electronic device that was input by a user. The received text may be displayed at a display component of the mobile electronic device. An auto-correct dictionary is selected from a plurality of auto-correct dictionaries. The auto-correct dictionary may be selected based at least on usage information that is representative of a usage context of the mobile electronic device. The displayed text is auto-corrected according to the selected auto-correct dictionary.
US09218329B2 Independent submission of forms in a portal view
Embodiments of the present invention address deficiencies of the art in respect to processing forms submissions in a portal environment and provide a method, system and computer program product for independently refreshing a forms submission in a portal view. In one embodiment, a system for independently submitting forms in a portal view can include a portal server configured to render a portal view and a portlet aggregator coupled to the portal server. The portal aggregator can be configured to provide portlet markup for different portlets in the portal view where at least one of the different portlets includes a visible form includes one or more form elements.
US09218327B2 Optimizing the layout of electronic documents by reducing presentation size of content within document sections so that when combined a plurality of document sections fit within a page
A method of optimizing a layout of an electronic document. An electronic document can be processed to identify a plurality of document sections within the document. A plurality of document sections can be recursively combined in at least a first page of a modified document and a presentation size of content within the document sections can be reduced. With each recursive combination of document sections, a first perceptual delta value can be generated based on perceptual differences between the document sections as originally presented in the electronic document and the document sections as presented when combined into the first page. When the first perceptual delta value at least equals the first threshold value, the recursive combination of document sections into the first page can cease.
US09218319B2 Method and apparatus for regular expression processing with parallel bit streams
One embodiment of the present invention is a method for increasing the speed of a computer in identifying occurrences of strings in a character stream that match a string pattern involving repetitions of characters of a particular character class. The method uses a parallel bit stream processing module of the computer, which processing module includes a processor equipped with parallel processing instructions, to form a plurality of parallel property bit streams Pj.
US09218317B2 Parallelization method, system, and program
A segment including a set of blocks necessary to calculate blocks having internal states and blocks having no outputs is extracted by tracing from blocks for use in calculating inputs into the blocks having internal states and from the blocks having no outputs in the reverse direction of dependence. To newly extract segments in which blocks contained in the extracted segments are removed, a set of nodes to be temporarily removed is determined on the basis of parallelism. Segments executable independently of other segments are extracted by tracing from nodes whose child nodes are lost by removal of the nodes in the upstream direction. Segments are divided into upstream segments representing the newly extracted segments and downstream segments representing nodes temporarily removed. Upstream and downstream segments are merged so as to reduce overlapping blocks between segments such that the number of segments is reduced to the number of parallel executions.
US09218315B2 X-ray analysis apparatus
An X-ray analysis apparatus having a function for enabling a plurality of measurement methods to be implemented, the X-ray analysis apparatus having: a measurement system capable of implementing a plurality of measurement methods; measurement software for implementing, in a selective manner, each of the measurement methods; a material evaluation table for storing information relating to a material that may be measured, and a name of an evaluation performed on the material; an input device for inputting the information relating to the material; a wizard program for performing computation for selecting the name of an evaluation on the basis of the information relating to the material inputted using the input device; and a wizard program for selecting a corresponding measurement method on the basis of the selected name of the evaluation.
US09218313B2 Shared-bandwidth multiple target remote copy
In one embodiment, a method for sharing bandwidth in a data processing system having a plurality of locations includes splitting data into a plurality of data elements, sending each one of the plurality of data elements to a different location selected from the plurality of locations, wherein each data element is different, and sending a message to each of the locations. In another embodiment, a method for sharing bandwidth in a data processing system having a plurality of locations, wherein the plurality of locations comprises a first location and plurality of further locations, includes receiving a first data element, receiving a message, wherein the message comprises an address of each of the further locations, and sending the first data element to each of the further locations of the plurality of further locations, responsive to determining the address of each of the further locations.
US09218312B2 Memory device and memory system including the same
A memory device includes an interface unit and a memory unit. The interface unit receives a clock signal, a command signal and a data signal, internally adjusts input impedance based upon at least one of the command signal and the clock signal, and generates internal control signal of the memory device based upon the command signal and data signal. The memory unit performs read/write operations based upon the internal control signal.
US09218311B2 Packet-based digital display interface signal mapping to micro serial interface
A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. At the other end is a micro serial interface connector, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously. The cable adaptor has an auxiliary and hot plug detect (HPD) controller utilized to map the auxiliary channel and HPD signals of the packet-based digital display to the micro serial interface ID signal.
US09218310B2 Shared input/output (I/O) unit
A system includes a bus, a processor operably coupled to the bus, a memory operably coupled to the bus, a plurality of input/output (I/O) devices operably coupled to the bus, where each of the I/O devices has a set of control registers, and a first shared I/O unit operably coupled to the bus. The first shared I/O unit has a plurality of shared functions and is configured to perform the shared functions, where the shared I/O functions are not included as functions on the I/O devices and the I/O devices and the processor interact with the first shared I/O unit to use one or more of the shared functions performed by the first shared I/O unit.
US09218305B2 Reader-writer synchronization with high-performance readers and low-latency writers
Data writers desiring to update data without unduly impacting concurrent readers perform a synchronization operation with respect to plural processors or execution threads. The synchronization operation is parallelized using a hierarchical tree having a root node, one or more levels of internal nodes and as many leaf nodes as there are processors or threads. The tree is traversed from the root node to a lowest level of the internal nodes and the following node processing is performed for each node: (1) check the node's children, (2) if the children are leaf nodes, perform the synchronization operation relative to each leaf node's associated processor or thread, and (3) if the children are internal nodes, fan out and repeat the node processing with each internal node representing a new root node. The foregoing node processing is continued until all processors or threads associated with the leaf nodes have performed the synchronization operation.
US09218303B2 Live migration of virtual machines using virtual bridges in a multi-root input-output virtualization blade chassis
A method for managing migration of a virtual machine includes accessing a first information handling system and a second information handling system, accessing a network information handling resource, using one or more switches to virtualize access of the network information handling resource to the first and second information handling systems, accessing a virtual bridge associated with the network information handling resource, accessing a virtual machine configured to access the resources of the first information handling system, and copying the operational state of the virtual machine from the first information handling system to the second information handling system using the first virtual bridge. The first and second information handling systems, share the network information handling resource using the virtualized access and the network information handling resource is configured to bind a driver to one or more ports, indicating availability to a virtualization environment regardless of an actual connection status.
US09218302B2 Page table management
Page table data for each page within a memory address space includes a write permission flag and a dirty-bit-modifier flag. The write permission flag is initialised to a value indicating that write access is not permitted. When a write access occurs, then the dirty-bit-modifier flag indicates whether or not the action of the write permission flag may be overridden. If the action of the write permission flag may be overridden, then the write access is permitted and the write permission flag is changed to indicate that write access is thereafter permitted. A page for which the write permission flag indicates that writes are permitted is a dirty page.
US09218299B2 Recovering data segment contents in a distributed shared memory
Systems and methods for implementing a distributed shared memory (DSM) in a computer cluster in which an unreliable underlying message passing technology is used, such that the DSM efficiently maintains coherency and reliability. DSM agents residing on different nodes of the cluster process access permission requests of local and remote users on specified data segments via handling procedures, which provide for recovering of lost ownership of a data segment while ensuring exclusive ownership of a data segment among the DSM agents detecting and resolving a no-owner messaging deadlock, pruning of obsolete messages, and recovery of the latest contents of a data segment whose ownership has been lost.
US09218297B2 Systems and methods for transformation of logical data objects for storage
Systems and methods for encrypting a plaintext logical data object for storage in a storage device operable with at least one storage protocol, creating, reading, writing, optimization and restoring thereof. Encrypting the plaintext logical data object comprises creating in the storage device an encrypted logical data object comprising a header and one or more allocated encrypted sections with predefined size; encrypting one or more sequentially obtained chunks of plaintext data corresponding to the plaintext logical data object thus giving rise to the encrypted data chunks; and sequentially accommodating the processed data chunks into said encrypted sections in accordance with an order said chunks received, wherein said encrypted sections serve as atomic elements of encryption/decryption operations during input/output transactions on the logical data object.
US09218296B2 Low-latency, low-overhead hybrid encryption scheme
A hybrid encryption scheme for storing data lines in a memory includes identifying data lines determined to be frequently accessed, and encrypting the data lines using a first encryption scheme. The hybrid encryption scheme also includes encrypting data lines determined not to be frequently accessed using a second encryption scheme.
US09218295B2 Methods and systems for implementing time-locks
A computer accesses a storage device. The computer includes a processor and a non-transitory computer-readable storage medium storing computer-readable instructions, when executed by the processor, the computer-readable instructions cause the computer to perform: storing a first time-lock and a second time-lock in the storage device; and, when both the first time-lock and the second time-lock are successfully stored in the storage device by the computer, to obtain an exclusive access privilege during a particular time interval associated with the first time-lock and the second time-lock.
US09218293B2 Data processing system with cache linefill buffer and method of operation
When data in first and second requests from a processor does not reside in cache memory, a first data element responsive to the second request is received by a cache controller from an external memory module after a first data element responsive to the first request and before the second data element responsive to the first request. Ownership of a linefill buffer is assigned to the first request when the first data element responsive to the first request is received. Ownership of the linefill buffer is re-assigned to the second request when the first data element responsive to the second request is received after the first data element responsive to the first request is received.
US09218292B2 Least-recently-used (LRU) to first-dirty-member distance-maintaining cache cleaning scheduler
A technique for scheduling cache cleaning operations maintains a clean distance between a set of least-recently-used (LRU) clean lines and the LRU dirty (modified) line for each congruence class in the cache. The technique is generally employed at a victim cache at the highest-order level of the cache memory hierarchy, so that write-backs to system memory are scheduled to avoid having to generate a write-back in response to a cache miss in the next lower-order level of the cache memory hierarchy. The clean distance can be determined by counting all of the LRU clean lines in each congruence class that have a reference count that is less than or equal to the reference count of the LRU dirty line.
US09218291B2 Implementing selective cache injection
A method, system and memory controller for implementing memory hierarchy placement decisions in a memory system including direct routing of arriving data into a main memory system and selective injection of the data or computed results into a processor cache in a computer system. A memory controller, or a processing element in a memory system, selectively drives placement of data into other levels of the memory hierarchy. The decision to inject into the hierarchy can be triggered by the arrival of data from an input output (IO) device, from computation, or from a directive of an in-memory processing element.
US09218289B2 Multi-core compute cache coherency with a release consistency memory ordering model
A method includes storing, with a first programmable processor, shared variable data to cache lines of a first cache of the first processor. The method further includes executing, with the first programmable processor, a store-with-release operation, executing, with a second programmable processor, a load-with-acquire operation, and loading, with the second programmable processor, the value of the shared variable data from a cache of the second programmable processor.
US09218287B2 Virtual computer system, virtual computer control method, virtual computer control program, recording medium, and integrated circuit
A virtual machine system comprises: a processor for executing a secure operating system and a normal operating system; and a cache memory. The cache memory stores data in a manner that allows for identification of whether the data has been read from a secure storage area of an external main memory. The cache memory writes back data to the main memory in a manner that reduces the number of times data is intermittently written back to the secure storage area which occurs when the processor is executing the normal operating system.
US09218286B2 System cache with partial write valid states
Methods and apparatuses for processing partial write requests in a system cache within a memory controller. When a write request that updates a portion of a cache line misses in the system cache, the write request writes the data to the system cache without first reading the corresponding cache line from memory. The system cache includes error correction code bits which are redefined as word mask bits when a cache line is in a partial dirty state. When a read request hits on a partial dirty cache line, the partial data is written to memory using a word mask. Then, the corresponding full cache line is retrieved from memory and stored in the system cache.
US09218285B2 Variable mapping of memory accesses to regions within a memory
An apparatus for processing data 2 includes a memory 4 having a plurality of memory regions 28 to 38. A mapping controller 56 applies a variable mapping to map memory addresses of access requests to different regions within the memory 4. The mapping controller varies the mapping applied in dependence upon both one or more memory behavioral parameters indicative of behavioral characteristics of the different regions and one or more access behavioral parameters indicative of behavioral characteristics of an access request to be mapped. The memory behavioral parameters may include the temperature of the regions and/or the refresh period of the regions. The access behavior able parameters may include the quality of service level, the access frequency, the access volume and/or the identity of the source of the access request.
US09218284B2 Storage device command interval controller
In some implementations, an apparatus includes a first programmable hardware timer that specifies an initial wait time before issuing two or more commands to a storage device, and a second programmable hardware timer that specifies an interval time between at least two commands of the two or more commands.
US09218281B2 Maintaining ordering via a multi-level map of a solid-state media
Described embodiments provide a media controller that processes requests including a logical address and address range. A map of the media controller determines physical addresses of a media associated with the logical address and address range of the request. The map is a multi-level map having a plurality of leaf-level map pages that are stored in the media, with a subset of the leaf-level map pages stored in a map cache. Based on the logical address and address range, it is determined whether a corresponding leaf-level map page is stored in the map cache. If the leaf-level map page is stored in the map cache, a cache index and control indicators of the map cache entry are returned in order to enforce ordering rules that selectively enable access to a corresponding leaf-level map page based on the control indicators and a determined request type.
US09218279B2 Atomic write command support in a solid state drive
A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices configured to store a plurality of physical pages. The method may comprise storing data in a plurality of logical pages (L-Pages), each associated with a logical address. A logical-to-physical address translation map may be maintained in the volatile memory, and may be configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address. The data specified by a received atomic write command may be stored one or more L-Pages. Updates to the entry or entries in the translation map associated with the L-Page(s) storing the data specified by the atomic write command may be deferred until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.
US09218276B2 Storage pool-type storage system, method, and computer-readable storage medium for peak load storage management
A storage apparatus is provided, including a first storage unit; a load information obtaining unit that obtains load information for each of a plurality of portions defined by dividing the first storage unit; a portion identifying unit that identifies a candidate portion that is to be relocated in the first storage unit based on the load information; a determining unit that determines whether or not data in the candidate portion is allowed to be migrated to a second storage unit, the second storage unit having a performance value higher than a performance value of the first storage unit; an adder that adds the second storage unit, when the determining unit determines that the data in the candidate portion is not allowed to be migrated; and a relocation unit that migrates the data in the candidate portion from the first storage unit to the added second storage unit.
US09218272B2 System level architecture verification of a transactional execution
Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution, testing, by the computing device, the transaction execution in a uni-processing system based on the instruction stream, and outputting, by the computing device, a status of the test to one or more output devices. A determination may be made that an abort occurs in the transaction execution based on the testing.
US09218269B2 Testing multiple target platforms
An automated REpresentational State Transfer (REST) testing tool receives a file representing a set of tests to run on a target test platform and identifies a type of the file. Then the testing tool parses the file based on the type to extract test parameters, and performs test actions on the target test platform based on the test parameters.
US09218267B1 Page rendering feedback
A page rendering feedback technology is described. A page component and a script are sent to a rendering device as elements of a page. Feedback is received from the script regarding positional rendering information for the page component within the page. The component position may also be compared with a model component layout position to determine whether the component position was correctly rendered.
US09218264B2 Techniques for translating policies into storage controller requirements
Techniques for translating Service Level Agreement (SLA) policy into storage controller requirements within a cloud storage environment are presented. System resource metrics for a storage controller are derived. The SLA policy is defined in terms of SLA parameters. Heuristics are used to translate the SLA parameters into defined percentages of system resources for the storage controller, which are compared to the system resource metrics and adjustments are updates are made as needed.
US09218262B2 Dynamic memory cell replacement using column redundancy
A memory chip comprises a main memory array having a plurality of memory columns, a redundancy memory column associated with the main memory array, and a hit logic circuitry configured to generate a plurality of hit logic signals by a plurality of hit logic units in the hit logic circuitry to enable dynamic replacement of a defective memory cell in one of the memory columns for dynamic replacement by the redundancy memory column when the memory array is in operation.
US09218250B2 Recovering from a defective boot image
Methods, apparatus and computer program products implement embodiments of the present invention that include detecting, by a first computer having a first memory, a software stack in a second memory of a second computer coupled to the first computer via a network. The software stack is copied from the second memory to the first memory, and the copied software stack is executed by the first computer.
US09218248B2 Recovering from a defective boot image
Apparatus and computer program products implement embodiments of the present invention that include detecting, by a first computer having a first memory, a software stack in a second memory of a second computer coupled to the first computer via a network. The software stack is copied from the second memory to the first memory, and the copied software stack is executed by the first computer.
US09218244B1 Rebuilding data across storage nodes
A method for proactively rebuilding user data in a plurality of storage nodes of a storage cluster is provided. The method includes distributing user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can read the user data, using erasure coding, despite loss of two of the storage nodes. The method includes determining that one of the storage nodes is unreachable and determining to rebuild the user data for the one of the storage nodes that is unreachable. The method includes reading the user data across a remainder of the plurality of storage nodes, using the erasure coding and writing the user data across the remainder of the plurality of storage nodes, using the erasure coding. A plurality of storage nodes within a single chassis that can proactively rebuild the user data stored within the storage nodes is also provided.
US09218243B2 Memory system for error detection and correction coverage
A memory system supporting error detection and correction (EDC) coverage. The system includes a memory controller and a memory buffer. The memory buffer includes an interface to a first group of memory devices and an interface to a second group of memory devices. The memory buffer accesses data from the first group of memory devices and accesses first error information corresponding to the data from the second group of devices. The memory buffer also accesses additional data from the second group of memory devices and accesses second error information corresponding to the additional data from a device in the first group of memory devices. EDC coverage may also be configured by the memory controller so that some data accesses have EDC coverage and other data accesses do not have EDC coverage.
US09218237B1 Network of interconnected circuit protection devices
A network of interconnected circuit protection devices in a datacenter that can communicate over a network. Each circuit protection device can have a management component such that each device could know the state of every other device or a centralized management component could know the state of all devices. The states of the protection devices could include, fault or non-fault (e.g., high-current, current-imbalance and high temperature). Using this information, the management component(s) can prevent a single-device failure from triggering circuit-protection devices in other sections of the data center to open. The breaker logic can operate such that if a single device short-circuited and all devices upstream in the power delivery system sensed the short-circuit, then the lowest-level device would open and if the fault was still detected upstream, then the next level device would open.
US09218235B2 Systems and methods of verifying operational information associated with an imaging device
The invention is directed to a method for performing failure analysis on an imaging device that includes retrieving an encrypted error log containing one or more error conditions that occurred on the imaging device, decrypting the retrieved encrypted error log, determining if the retrieved encrypted error log has been altered based on the decrypted error log, and upon determining that the retrieved encrypted error log has not been altered, performing failure analysis on the imaging device using the decrypted error log.
US09218234B2 Memory dump and analysis in a computer system
Systems and methods for executing a memory dump in a computer system are provided. A trigger event is detected in the computer system. The computer system is configured to detect both a kernel panic and a system hang and to execute memory dump if either of the kernel panic or the system hang is detected. The memory dump is executed in the computer system in response to the detecting of the trigger event. The executing of the memory dump includes storing a current context of the computer system in a portion of a memory device. The current context is stored without reserving the portion prior to the detecting of the trigger event. The computer system is restarted and a bootstrap program is executed, where a running space of the bootstrap program is restricted to the portion of the memory device. The bootstrap program is used to upload the current context to a host device.
US09218232B2 Anomaly detection methods, devices and systems
A method for detecting an anomaly in operation of a data analysis device, comprising: receiving present real-time readings of multiple sensors associated with the data analysis device, and maintaining a history of past real-time readings; determining which of said multiple sensors are correlated; computing a deviation between at least some of said present and at least some of said past real-time readings of said correlated sensors; and declaring an anomaly when said deviation exceeds a predetermined threshold.
US09218230B2 Method for transmitting messages in a redundantly operable industrial communication network and communication device for the redundantly operable industrial communication network
A method for transmitting messages in a redundantly operable communication network includes a first subnetwork with a tree topology and a second subnetwork, wherein messages are transmitted in the first subnetwork in accordance with a spanning tree protocol, communication devices associated with network nodes of the first subnetwork interchange messages containing topology information with one another in order to form a tree topology, messages are transmitted in the second subnetwork in accordance with a parallel or ring redundancy protocol, and a virtual network node which is connected to all network nodes of the second subnetwork via a respective virtual connection which is uninterruptable by an error is configured as the root network node of the first subnetwork.
US09218229B2 Event notification system and method
A notification system comprises a plurality of claim checks and a plurality of communication device identifiers. The notification system further comprises a messaging module that is configured to receive an electronic notification of an event. The messaging module is further configured to associate at least one of the claim checks and one of the communication device identifiers with the event. The messaging module is also configured to generate a message that contains the associated claim check and transmit the message to a communications device identified by the communication device identifier. In one embodiment, the notification system further comprises a retrieval module that is responsive to a request to access the event. In another embodiment, the messaging module is configured to receive an electronic notification of a second event and associate the claim check and another communication device identifier with the message.
US09218222B2 Physical manager of synchronization barrier between multiple processes
A computer device with synchronization barrier including a memory and a processing unit capable of multiprocess processing on various processors and enabling the parallel execution of blocks by processes, the blocks being associated by groups in successive work steps. The device further includes a hardware circuit with a usable address space to the memory, capable of receiving a call from each process indicating the end of execution of a current block, each call comprising data. The hardware circuit is arranged to authorize the execution of blocks of a later work step when all the blocks of the current work step have been executed. The accessibility to the address space is achieved by segments drawn from the data of each call.
US09218220B2 Elastic and scalable publish/subscribe service
A system and method are disclosed for an elastic and scalable publish/subscribe scheme. Subscription information is received at a dispatcher node. A plurality of matching nodes is selected in an overlay network to store the subscription information on a computer readable storage medium. Upon receiving an event at a dispatching node, at least one of the matching nodes with the stored subscription information is selected to process the event.
US09218213B2 Dynamic placement of heterogeneous workloads
Techniques for managing a system of heterogeneous applications are provided. A plurality of applications is classified into a plurality of application types. One or more of the plurality of applications in each of the plurality of application types are classified into one or more collections. A utility function of possible resource allocations is computed for each of the one or more collections. An application placement is computed that optimizes a global utility of the plurality of applications in accordance with the one or more utility functions. Placement and resource allocation of the plurality of applications are modified in the system in accordance with the application placement.
US09218210B2 Distributed processing system
A management node includes a distributed task management unit that divides a task including a plurality of processing targets and allocates the task to a plurality of execution nodes, and an execution status information memory update unit that updates execution status information of the task in accordance with execution status update requests from the execution nodes. Based on a first period of time required for processing the processing targets of a unit amount by the execution node and a second period of time required for processing the execution status update request by the management node, the distributed task management unit determines the amount of the task allocated to each of the execution nodes such that a difference in the completion time of the task allocated to any two execution nodes, among the execution nodes, becomes greater than the second period of time.