最新美国发明专利第2015-09-22期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

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US09142838B2	Anode on a pretreated substrate for improving redox-stability of solid oxide fuel cell and the fabrication method therof The disclosure provides a double-layer anode structure on a pretreated porous metal substrate and a method for fabricating the same, for improving the redox stability and decreasing the anode polarization resistance of a SOFC. The anode structure comprises: a porous metal substrate of high gas permeability; a first porous anode functional layer, formed on the porous metal substrate by a high-voltage high-enthalpy Ar—He—H2—N2 atmospheric-pressure plasma spraying process; and a second porous anode functional layer, formed on the first porous anode functional layer by a high-voltage high-enthalpy Ar—He—H2—N2 atmospheric-pressure plasma spraying and hydrogen reduction. The first porous anode functional layer is composed a redox stable perovskite, the second porous anode functional layer is composed of a nanostructured cermet. The first porous anode functional layer is also used to prevent the second porous anode functional layer from being diffused by the composition elements of the porous metal substrate.
US09142837B2	Lithium ion secondary battery and preparation process of same A separator-type lithium ion secondary battery having large capacity and charge-discharge performance not destroying the separator, even with an active material layer having concavo-convex structure of high aspect ratio. The battery comprises a first electrode comprising a first current collector, and a first active material layer formed by plural convex first active material parts provided on the first current collector, a second electrode comprising a second current collector, and a second active material layer formed by plural convex second active material parts provided on the second current collector, and a separator provided between the first electrode and the second electrode, wherein the first electrode and the second electrode are integrated so that the convex first active material part is faced between the adjacent convex second active material parts, and the convex first active material part does not enter between the convex second active material parts.
US09142836B2	Anode for secondary battery Disclosed is an anode for secondary batteries comprising a combination of an anode active material having a relatively low charge/discharge voltage and a relatively low hardness (A) and an anode active material having a relatively high charge/discharge voltage and a relatively high hardness (B), wherein the anode active material (A) is surface-coated with carbon having a high hardness or a composite thereof, and a particle size of the anode active material (B) is smaller than a size of a space formed by the anode active materials (A) arranged in a four-coordination. The anode provides an electrode that prevents lithium precipitation caused by overvoltage, improves ionic conductivity as well as electric conductivity and exhibits superior capacity.
US09142835B2	Separator film for batteries including oxidation resistant vinyl alcohol copolymer A separator film for an electric battery is provided to substantially eliminate electric contact between an anode component and a cathode component. The film includes a vinyl alcohol copolymer with functional comonomer units such as sulfonic acid functionalized units or salts thereof. The films are desirable for use in battery separators because they exhibit superior resistance to degeneration by oxidation, enabling the manufacture of batteries with improved conductivity, longer discharge times, and longer cycle lives.
US09142833B2	Lithium ion batteries based on nanoporous silicon A lithium ion battery that incorporates an anode formed from a Group IV semiconductor material such as porous silicon is disclosed. The battery includes a cathode, and an anode comprising porous silicon. In some embodiments, the anode is present in the form of a nanowire, a film, or a powder, the porous silicon having a pore diameters within the range between 2 nm and 100 nm and an average wall thickness of within the range between 1 nm and 100 nm. The lithium ion battery further includes, in some embodiments, a non-aqueous lithium containing electrolyte. Lithium ion batteries incorporating a porous silicon anode demonstrate have high, stable lithium alloying capacity over many cycles.
US09142828B2	Fuse unit for vehicles A fuse unit (1) includes a unit body (10) fixed to a battery post (3) of a battery (2) via a battery terminal (4) and disposed along a top surface (2a) and a side surface (2b) of the battery (2), and a battery cover (20) mounted to the unit body (10) and configured to cover an outer periphery of the unit body (10). The unit body (10) has a battery abutment rib (17) at a portion of the unit body (10) facing the side surface (2b) of the battery (2). The battery abutment rib (17) is configured to secure a mounting space for the battery cover (20).
US09142824B2	Plate-like battery pack and battery pack group composed of plural plate-like battery packs A plate-like battery pack has: a plurality of single cell elements; a flat battery pack case composed of an insulating material and adapted to have a plurality of holes respectively housing the single cell elements; and a plurality of sealing plates adapted to hermetically seal the holes housing the single cell elements and connect adjacent ones of the single cell elements, and the sealing plates connect the single cell elements in series, parallel or series-parallel.
US09142821B2	Electrode assembly and secondary battery using the same Disclosed are an improved electrode assembly which may allow an electrode plate to be more easily impregnated with an electrolyte and also ensure gas to be easily discharged, and a secondary battery having the electrode assembly. The electrode assembly includes at least one cathode plate formed by coating an electrode current collector with a cathode active material, at least one anode plate formed by coating an electrode current collector with an anode active material, and a separator interposed between the cathode plate and the anode plate and having at least one vent formed therein.
US09142819B2	Separator having porous coating layer, and electrochemical device containing the same A separator includes a monolayer-type polyolefin-based micro-porous film having a porosity of 40 to 60%, an average pore diameter of 60 nm or less, and an air permeability of 350 s/100 mL or less; and a porous coating layer formed on at least one surface of the micro-porous film and made of a mixture of a plurality of inorganic particles and a binder polymer. An electrochemical device having the above separator has excellent thermal stability and allows a high power while minimizing the occurrence of leak current.
US09142818B2	Battery separator and battery using the same The present invention relates to a battery separator including: a porous substrate; and a layer of a crosslinked polymer supported on at least one surface of the porous substrate, in which the crosslinked polymer is obtained by reacting (a) a reactive polymer having, in the molecule thereof, a reactive group containing active hydrogen with (b) a polycarbonate urethane prepolymer terminated by an isocyanate group.
US09142817B2	Battery separator and battery using the same The present invention relates to a battery separator including: a porous substrate; and a layer of a crosslinked polymer supported on at least one surface of the porous substrate, in which the crosslinked polymer is obtained by reacting (a) a reactive polymer having, in the molecule thereof, a first reactive group containing active hydrogen and a second reactive group having cationic polymerizability with (b) a polycarbonate urethane prepolymer terminated by an isocyanate group.
US09142816B2	Alkaline battery separator and alkaline battery using separator Provided are an alkaline battery separator and an alkaline battery including the separator. The separator includes at least a coarse layer and a dense layer denser than the coarse layer. The coarse layer contains an alkaline-resistant cellulose fiber having a freeness value of 350 to 650 ml as a whole in the proportion of 25 to 65% by weight. The alkaline-resistant cellulose fiber includes at least two kinds of alkaline-resistant cellulose fibers having different freeness with each other. The difference in freeness value between the alkaline-resistant cellulose fibers having the highest and lowest freeness values is 300 to 700 ml. The dense layer contains an alkaline-resistant cellulose fiber which as a whole has a freeness value of 0 to 400 ml. The separator has a maximum pore size of 65 μm or smaller, and a liquid absorption capacity of 5 g/g or higher.
US09142812B2	Battery pack A battery pack providing power to a portable electronic device is disclosed which inhibits electromagnetic waves generated by the battery pack from interfering with the portable electronic device. The portable electronic device may include a radiofrequency (RF) circuit including a transceiver. The battery pack may include a battery cell and a protection circuit module (PCM) which operates to prevent the battery cell from overcharge/overdischarge and overheating. The PCM may include a substrate and a protection device mounted to the substrate. Electromagnetic waves generated when the protection device operates are shielded from the portable electronic device by a shielding layer formed on the substrate of the PCM. The substrate may include a plurality of circuit layers, each including a circuit layer, with the circuit layers in electrical communication with one another. A shielding pattern is formed on at least one of the circuit layers.
US09142809B2	Battery module A battery module including a plurality of battery cells spaced apart in a first direction, and a barrier between adjacent battery cells of the plurality of battery cells, the barrier including a plate, and a protrusion extending from the plate in the first direction and contacting the adjacent battery cells, the protrusion including an elastomer.
US09142808B2	Organic light-emitting display device and method of manufacturing the same The organic light-emitting display device includes: a substrate including a transistor region; and a thin-film transistor formed over the transistor region of the substrate and having a planarization film which is disposed over a source/drain electrode and a pixel defining layer which includes an aperture exposing a portion of a first electrode electrically connected to the source/drain electrode and defining a pixel region, wherein an outgassing hole is formed in a region of the pixel defining layer other than the aperture to expose the planarization film.
US09142804B2	Organic light-emitting device including barrier layer and method of manufacturing the same An organic light-emitting device including a barrier layer that includes a silicon oxide layer and a silicon-rich silicon nitride layer. The organic light-emitting device includes a flexible substrate that includes a barrier layer and plastic films disposed under and over the barrier layer. The barrier layer includes a silicon-rich silicon nitride layer and a silicon oxide layer. The order in which the silicon-rich silicon nitride layer and the silicon oxide layer are stacked is not limited and the silicon oxide layer may be first formed and then the silicon-rich silicon nitride layer may be stacked on the silicon oxide layer. The silicon-rich silicon nitride layer has a refractive index of 1.81 to 1.85.
US09142803B2	Organic EL display device An organic EL display device ensures brightness and improves a contrast ratio by a reduction in external light reflection. The organic EL display device includes a wavelength selective absorption filter that absorbs a light in a given absorption spectrum uniform in a display region. An absorption spectrum has a negative correlation with an outgoing spectrum in which respective spectrums of R pixels, G pixels, and B pixels are synthesized together.
US09142801B2	Method for manufacturing flexible electrode substrate Provided is a method for manufacturing a flexible electrode substrate. The method includes forming a microlens array under a film, forming a transparent electrode layer on the film so as to oppose the microlens array, and forming a grid electrode between the film and the transparent electrode layer or on the transparent electrode layer. Herein, the grid electrode and the microlens array are formed on the both sides of the film by performing at least one of an inkjet printing process, a roll-to-roll printing process, a screen printing process, and a stamping printing process.
US09142795B2	Organic light-emitting diode An organic light-emitting diode includes a first electrode and a second electrode facing the first electrode; an emission layer between the first electrode and the second electrode; a hole transport layer between the first electrode and the emission layer and includes a first hole transport layer, a second hole transport layer, and a buffer layer between the first hole transport layer and the second hole transport layer; and an electron transport layer between the emission layer and the second electrode, wherein the buffer layer and the electron transport layer each include a mixture of an electron-transporting organometallic compound and an electron-transporting organic compound.
US09142793B2	Organic light emitting diode display An OLED display includes: a substrate; a thin film transistor on the substrate; a first insulation layer on the thin film transistor; a second insulation layer on the first insulation layer, the second insulation layer having a first opening exposing a portion of the first insulation layer; a first electrode electrically connected with the thin film transistor and contacting the second insulation and contacting the first insulation layer through the first opening; a pixel defining layer disposed on the first electrode and having a second opening exposing a portion of the first electrode in a region corresponding to the first opening, the second opening being smaller than the first opening; an organic emission layer on the first electrode in a region corresponding to the second opening; and a second electrode on the organic emission layer in a region corresponding to the second opening.
US09142791B2	OLED having multi-component emissive layer Organic light-emitting devices having a multi-component organic electroluminescent layer. The organic electroluminescent layer comprises a phosphorescent dopant and a host material that is a mixture of at least three different compounds: a wide band gap host compound, an electron-transporting host compound, and a hole-transporting host compound. Use of such a multi-component organic electroluminescent layer may improve device efficiency and lifetime.
US09142787B2	Silk transistor devices The invention relates to ecosustainable and biocompatible, low cost, ambient friendly electronic and optoelectronic devices, such as transistors and light-emitting transistors, made with silk fibroin or blended with other biopolymers, methods for fabrication and methods of using the silk-based electronics and optoelectronics. The silk-based electronics and optoelectronics can be implanted in vivo and in vitro for biomedical applications, such as for drug discovery or drug screening assays and devices. The silk-based devices may be used in the food industry and embedded in packaging for tracking and sensing, for security purposes or exploited as disposable not harmful for the environment efficient general electronic and optoelectronic devices.
US09142778B2	High vacuum OLED deposition source and system Sources, devices, and techniques for deposition of organic layers, such as for use in an OLED, are provided. A vaporizer may vaporize a material between cooled side walls and toward a mask having an adjustable mask opening. The mask opening may be adjusted to control the pattern of deposition of the material on a substrate, such as to correct for material buildup that occurs during deposition. Material may be collected from the cooled side walls for reuse.
US09142777B2	Apparatus and method for making OLED lighting device An apparatus for depositing one or more organic material layers of an OLED lighting device upon a first region of a substrate and one or more conducting layers upon a second region, wherein the conducting layers partially or completely cover and extend beyond one side of the organic layers, comprising: a reusable mask in contact with the substrate, at least one mask open area having an overhang feature; one or more sources of vaporized organic material, selected to form layers of the OLED lighting device, and the vaporized organic material plume is shaped, on the side corresponding to the mask overhang feature, so as to limit substantial transfer of organic material on said side to angles less than or equal to a selected cutoff angle to the first region; and one or more sources of vaporized conducting material that transfer conducting material to the second region, wherein the second region partially or completely overlaps the first region and extends beyond the first region on the side corresponding to the overhang feature of the mask.
US09142776B2	Resistive random access memory and method for fabricating the same A resistive random access memory and a method for fabricating the same are provided. The method includes forming a bottom electrode on a substrate; forming a metal oxide layer on the bottom electrode; forming an oxygen atom gettering layer on the metal oxide layer; forming a first top electrode sub-layer on the oxygen atom gettering layer; forming a second top electrode sub-layer on the first top electrode sub-layer, wherein the first top electrode sub-layer and the second top electrode sub-layer comprise a top electrode; and subjecting the metal oxide layer and the oxygen atom gettering layer to a thermal treatment, driving the oxygen atoms of the metal oxide layer to migrate into and react with the oxygen atom gettering layer, resulting in a plurality of oxygen vacancies within the metal oxide layer.
US09142774B2	Nonvolatile memory device and method for manufacturing the same According to one embodiment, a nonvolatile memory device includes a first electrode, a second electrode, and a memory cell provided between the first electrode and the second electrode. The memory cell includes a retention unit, a resistance change unit, and an ion supply unit. The retention unit is provided on the first electrode and has an electron trap. The resistance change unit is provided on the retention unit. The ion supply unit is provided between the resistance change unit and the second electrode and includes a metal element.
US09142773B2	Variable resistance nonvolatile memory element and method of manufacturing the same A variable resistance nonvolatile memory element includes: first and second electrode layers; a first variable resistance layer between the first and second electrode layers; and a second variable resistance layer between the second electrode layer and the first variable resistance layer and having a higher resistance value than the first variable resistance layer. When viewed in a direction perpendicular to the major surface of the second variable resistance layer, an outline of the second variable resistance layer is located inwardly of the outline of any one of the second electrode layer and the first variable resistance layer, and an outline of a face of the second variable resistance layer, the face being in contact with the first variable resistance layer is located inwardly of an outline of a face of the first variable resistance layer, the face being in contact with the second variable resistance layer.
US09142763B2	Electronic component, and a method of manufacturing an electronic component An electronic component (100), a first electrode (101), a second electrode (102), and a convertible structure (103) electrically coupled between the first electrode (101) and the second electrode (102), being convertible between at least two states by heating and having different electrical properties in different ones of the at least two states, wherein the convertible structure (103) comprises terminal portions (104, 105) connected to the first electrode (101) and to the second electrode (102), respectively, and comprises a line portion (106) between the terminal portions (104, 105), the line portion (106) having a smaller width or thickness than the terminal portions (104, 105), and wherein the convertible structure (103) is arranged with respect to the first electrode (101) and the second electrode (102) so that, in one of the at least two states, the line portion (106) has an amorphous ‘Spot (107) extending along only a part of the line portion (106).
US09142757B2	Magnetic memory devices A magnetic memory device may include a lower electrode on a substrate, a memory element on the lower electrode, an upper electrode on the memory element, and a protection spacer enclosing a portion of a side surface of the lower electrode and protruding laterally from the side surface of the lower electrode. The protection spacer may have a bottom surface that is positioned at a level higher than that of a bottom surface of the lower electrode.
US09142751B2	Efficient cooling of piezoelectric transducers A sealed piezoelectric transducer having a single, uniform, electrically insulating, heat-conducting layer of a soft, rubbery material filled with a fine, homogeneously-dispersed powder having high thermal conductivity. The material is placed in contact with the surfaces of the transducer and conducts the heat from the surfaces to an external heat sink. Since the thermally conductive powder is fully encapsulated in the rubbery material, its abrasive properties are neutralized. The softness of the material ensures that the vibration of the transducer does not transmit significant acoustic energy into the material, thereby avoiding the generation of parasitic heat. In addition, the layer fills the entire gap between the transducer and the heat sink, thereby removing any possibility of moisture-related arcing.
US09142750B2	Piezoelectric element with electrodes allowing substrate strain and method for manufacturing the same A piezoelectric element is provided with a ceramic substrate including a first surface on which a groove is formed, and a first electrode formed on the first surface of the ceramic substrate and including a crossing part that extends over the groove. At least one void is formed between a bottom of the groove and the crossing part of the first electrode.
US09142741B2	Emitting device with improved extraction A profiled surface for improving the propagation of radiation through an interface is provided. The profiled surface includes a set of large roughness components providing a first variation of the profiled surface having a characteristic scale approximately an order of magnitude larger than a target wavelength of the radiation. The profiled surface also includes a set of small roughness components superimposed on the set of large roughness components and providing a second variation of the profiled surface having a characteristic scale on the order of the target wavelength of the radiation.
US09142739B2	Method and system for providing a reliable light emitting diode semiconductor device A method and a system for a reliable LED semiconductor device are provided. In one embodiment, the device comprises a carrier, a light emitting diode disposed on the carrier, an encapsulating material disposed over the light emitting diode and the carrier, at least one through connection formed in the encapsulating material, and a metallization layer disposed and structured over the at least one through connection.
US09142738B2	Engineered-phosphor LED packages and related methods In accordance with certain embodiments, regions of spatially varying wavelength-conversion particle concentration are formed over light-emitting dies.
US09142737B2	Light emitting device surrounded by reflection wall and covered with fluorescent film A light emitting device package includes: first and second electrodes, at least a portion of a lower surface thereof being exposed; a light emitting device disposed on an upper surface of at least one of the first and second electrodes; a reflection wall disposed on the upper surface of the first and second electrodes and surrounding the light emitting device to form a mounting part therein; and a fluorescent film disposed on the reflection wall to cover an upper portion of the mounting part. The mounting part is filled with air.
US09142734B2	Composite white light source and method for fabricating An emitter includes a light source and a separately formed conversion material region with conversion particles. The light source is capable of emitting light along a plurality of light paths extending through the conversion material region where at least some of the light can be absorbed by the conversion particles. The light from the light source and the light re-emitted from the conversion particles combine to provide a desired color of light. Each light path extends through a substantially similar amount of conversion particles so that the desired color of light has a substantially uniform color and intensity along each light path.
US09142732B2	LED lamp with quantum dots layer A lighting device 100 includes a light source 101, a first phosphor layer 102 disposed directly or indirectly on top of the light source 101, a first quantum dots layer 103 disposed directly on top of the first phosphor layer 101, and a second phosphor layer 104 disposed directly on top of the first quantum dots layer 103. The first quantum dots layer 103 includes a population of quantum dots 106 dispersed in a first matrix material 107. Each of the first and second phosphor layers 102, 104 includes a population of conventional phosphor particles 105. Another embodiment is a lighting device 400 that includes a light source 401 and a wavelength-shifting phosphor layer 402 disposed on top of the light source 401. The wavelength-shifting phosphor layer 402 includes a population of quantum dots 404 and a population of phosphor particles 403 both dispersed in a matrix material 405.
US09142727B2	Semiconductor light emitting device According to one embodiment, a semiconductor light emitting device includes a stacked body, first and second electrodes. The stacked body includes a light emitting layer. The first and second electrodes are provided on the stacked body. The device further includes an insulating layer covering the stacked body, a first conversion electrode electrically connected to the first electrode, a second conversion electrode electrically connected to the second electrode (50), and a light blocking body covering a side surface of the stacked body. The first conversion electrode, the second conversion electrode, and the light blocking body include, in a portion contacting with the insulating layer, a member with a reflectance of 80 percent or more for light emitted from the light emitting layer.
US09142725B1	Semiconductor light emitting element A light emitting element includes a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type, a light emitting layer. The light emitting layer is between the first semiconductor layer and the second semiconductor layer. A first electrode layer is on a first side of the second semiconductor layer. A second electrode layer is on the first side of the first semiconductor layer. Am insulation layer is between the first electrode layer and the second electrode layer. A first metal layer is between a substrate and the insulation layer and between the substrate and the second electrode layer. The second electrode layer includes a first portion contacting the first semiconductor layer and a second portion which spaced from the first semiconductor layer.
US09142724B2	Nitride-based semiconductor light-emitting device A nitride-based semiconductor light-emitting device includes an n-type nitride-based semiconductor layer, an active layer, a p-type nitride-based semiconductor layer, an ohmic contact layer covering a portion of the p-type nitride-based semiconductor layer upper surface, and a p electrode including a first portion contacting the p-type nitride-based semiconductor layer and a second portion contacting the ohmic contact layer.
US09142723B2	Semiconductor wafer comprising gallium nitride layer having one or more silicon nitride interlayer therein A semiconductor wafer comprising a substrate layer and a first GaN layer having one or more SiNx interlayers therein, wherein in the first GaN layer at least one SiNx interlayer has GaN penetrated through one or more portions of said SiNx interlayer and preferably has a thickness of from 0.5 to 10 nm.
US09142714B2	High power ultraviolet light emitting diode with superlattice An improved process for forming a UV emitting diode is described. The process includes providing a substrate. A super-lattice is formed directly on the substrate at a temperature of at least 800 to no more than 1,300° C. wherein the super-lattice comprises AlxInyGa1-x-yN wherein 0
US09142709B2	Process for enhancing image quality of backside illuminated image sensor A method includes providing a substrate having a first surface and a second surface, the first surface being opposite the second surface, forming a light sensing region at the first surface of the substrate, forming a doped layer at the second surface of the substrate using a laser annealing process, and performing a chemical mechanical polishing process on the annealed, doped layer.
US09142704B2	Photosensor, display device including the same, and driving method thereof A photosensor includes a sensing switching element, a sensing element, and a reset switching element. The sensing switching element includes an output terminal connected to a sensing signal line, a control terminal connected to a first gate line, and an input terminal connected to the first node. The sensing element includes an output terminal connected to a first node, a control terminal connected a second gate line disposed next to the first gate line, and an input terminal connected to a source voltage line transmitting a source voltage. The sensing element senses light. The reset switching element includes an output terminal connected to the first node, a control terminal connected to the second gate line, and an input terminal connected to a driving voltage line transmitting a driving voltage.
US09142703B2	Method of manufacturing photoelectric conversion device, and method of manufacturing image display A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
US09142702B2	Semiconductor drift detector and corresponding operating method The invention relates to a semiconductor drift detector for detecting radiation, comprising a semiconductor substrate (HS), in which signal charge carriers are generated during operation, to be precise by incident photons (h·f) having a specific photon energy, more particularly in the form of X-ray fluorescent radiation, and/or by incident electrons (⊖), having a specific signal charge carrier current, more particularly in the form of back-scattered electrons (⊖), and comprising a read-out anode (A) for generating an electrical output signal in a manner dependent on the signal charge carriers, and comprising an erase contact (RC) for erasing the signal charge carriers that have accumulated in the semiconductor substrate (HS). The invention provides for the semiconductor drift detector to be optionally operable in a first operating mode or in a second operating mode, wherein the semiconductor drift detector in the first operating mode measures the photon energy of the incident photons (h·f), whereas the semiconductor drift detector in the second operating mode measures the signal charge carrier current. Furthermore, the invention encompasses a corresponding operating method.
US09142697B2	Solar cell A solar cell includes a substrate of a first conductive type, an emitter region, which is positioned at the substrate and is doped with impurities of a second conductive type opposite the first conductive type, a plurality of first electrodes, which are connected to the emitter region and extend parallel to one another to be spaced apart from one another, a plurality of semiconductor electrodes, which extend in a direction different from an extension direction of the plurality of first electrodes to be spaced apart from one another and have an impurity doping concentration higher than the emitter region, and a second electrode connected to the substrate. A distance between two adjacent semiconductor electrodes is about 0.02 cm to 0.2 cm, and a distance between two adjacent first electrodes is about 0.3 cm to 0.8 cm.
US09142695B2	Sensor package with exposed sensor array and method of making same A packaged sensor assembly and method of forming that includes a first substrate having opposing first and second surfaces and a plurality of conductive elements each extending between the first and second surfaces. A second substrate comprises opposing front and back surfaces, one or more detectors formed on or in the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the one or more detectors. A third substrate is mounted to the front surface to define a cavity between the third substrate and the front surface, wherein the third substrate includes a first opening extending from the cavity through the third substrate. The back surface is mounted to the first surface. A plurality of wires each extend between and electrically connecting one of the contact pads and one of the conductive elements.
US09142691B2	Replaceable solar bulb assembly for use with a solar receiver array A replaceable solar bulb assembly generates electrical energy that includes a photo voltaic cell for converting solar energy into electrical energy. A housing includes at least one reflector for focusing the solar energy on the photo voltaic cell. A connector removably and mechanically connects the housing to a solar receiver array and electrically connects the photo voltaic cell to the solar receiver array.
US09142689B2	Solid-state imaging apparatus and imaging apparatus A solid-state imaging apparatus in which a first substrate, a second substrate electrically connected to the first substrate through a connector and circuit elements disposed in the first substrate and in the second substrate, and forming pixels, each of the pixels includes a photoelectric conversion element disposed in the first substrate and configured to generate a signal corresponding to an amount of incident light, and a signal holder disposed in the second substrate in correspondence with the photoelectric conversion element and configured to hold an output signal corresponding to the signal generated by the corresponding photoelectric conversion element, and the signal holder is formed by laminating a capacitance element including a plurality of electrodes on a plurality of layers within the second substrate.
US09142687B2	Semiconductor diode device According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.
US09142679B2	Method for manufacturing semiconductor device using oxide semiconductor A semiconductor device including a minute transistor with a short channel length is provided. A gate insulating layer is formed over a gate electrode layer; an oxide semiconductor layer is formed over the gate insulating layer; a first conductive layer and a second conductive layer are formed over the oxide semiconductor layer; a conductive film is formed over the first conductive layer and the second conductive layer; a resist mask is formed over the conductive film by performing electron beam exposure; and then a third conductive layer and a fourth conductive layer are formed over and in contact with the first conductive layer and the second conductive layer, respectively, by selectively etching the conductive film.
US09142672B2	Strained source and drain (SSD) structure and method for forming the same Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a gate stack structure formed on the substrate. The semiconductor device structure also includes gate spacers formed on sidewalls of the gate stacks. The semiconductor device structure includes doped regions formed in the substrate. The semiconductor device structure also includes a strained source and drain (SSD) structure adjacent to the gate spacers, and the doped regions are adjacent to the SSD structure. The semiconductor device structure includes SSD structure has a tip which is closest to the doped region, and the tip is substantially aligned with an inner side of gate spacers.
US09142671B2	Lateral double-diffused metal oxide semiconductor The invention provides a lateral double-diffused metal oxide semiconductor (LDMOS). The pre-metal dielectric layer (PMD) of the LDMOS is a silicon rich content material. Additionally, the inter-layer dielectric layer (ILD), inter-metal dielectric layer (IMD), or protective layer of the LDMOS may be formed of a silicon rich content material.
US09142670B2	Methods of forming dual gate structures Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric structure formed from an oxide of the first material. For another example, methods including forming a high-K dielectric material layer over a semiconductor substrate, forming a first conductive material layer over the high-K dielectric material layer, oxidizing a portion of the first conductive material layer to convert the portion of the first conductive material layer to a dielectric material layer, and forming a second conductive material layer over both the conductive material layer and the dielectric material layer are also disclosed.
US09142669B2	Thin film transistor substrate having a thin film transistor having multiple top gates and organic light emitting device using the same A thin film transistor substrate provided with two gate electrodes comprises a thin film transistor including a first gate electrode formed on the substrate; an active layer formed on the first gate electrode; first and second electrodes formed on the active layer; and a second gate electrode formed on the first electrode, the second electrode, and the active layer, wherein the second gate electrode is provided with an opening formed in an area corresponding to at least a part of the second electrode.
US09142668B2	Field effect transistor devices with buried well protection regions A method of forming a transistor device includes providing a drift layer having a first conductivity type, forming a first region in the drift layer, the first region having a second conductivity type that is opposite the first conductivity type, forming a body layer on the drift layer including the first region, forming a source layer on the body layer, forming a trench in the source layer and the body layer above the first region and extending into the first region, forming a gate insulator on the inner sidewall of the trench, and forming a gate contact on the gate insulator.
US09142666B2	Integrated electronic device and method for manufacturing thereof An embodiment of an integrated electronic device formed in a body of semiconductor material, which includes: a substrate of a first semiconductor material, the first semiconductor material having a first bandgap; a first epitaxial region of a second semiconductor material and having a first type of conductivity, which overlies the substrate and defines a first surface, the second semiconductor material having a second bandgap wider than the first bandgap; and a second epitaxial region of the first semiconductor material, which overlies, and is in direct contact with, the first epitaxial region. The first epitaxial region includes a first buffer layer, which overlies the substrate, and a drift layer, which overlies the first buffer layer and defines the first surface, the first buffer layer and the drift layer having different doping levels.
US09142665B2	Semiconductor component with a semiconductor via A method for producing a semiconductor component includes providing a semiconductor body with a first surface and a second surface opposite the first surface, forming an insulation trench which extends into the semiconductor body from the first surface and which in a horizontal plane of the semiconductor body has a geometry such that the insulation trench defines a via region of the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, removing semiconductor material of the semiconductor body from the second surface to expose at least parts of the first insulation layer, to remove at least parts of the first insulation layer, or to leave at least partially a semiconductor layer with a thickness of less than 1 μm between the first insulation layer and the second surface, and forming first and second contact electrodes on the via region.
US09142661B2	Semiconductor device and method for manufacturing the same According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a first conductivity type, a first electrode, and a contact region. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The first electrode has a first and a second portion. The first portion is provided in a first direction and has a lower end being positioned below a lower end of the third semiconductor region. The second portion is in contact with the first portion and is provided on the third semiconductor region. The contact region is provided between the first portion and the second semiconductor region and is electrically connected to the first electrode and the second semiconductor region.
US09142659B2	Electrode configurations for semiconductor devices A III-N semiconductor device can include an electrode-defining layer having a thickness on a surface of a III-N material structure. The electrode-defining layer has a recess with a sidewall, the sidewall comprising a plurality of steps. A portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width. An electrode is in the recess, the electrode including an extending portion over the sidewall of the recess. A portion of the electrode-defining layer is between the extending portion and the III-N material structure. The sidewall forms an effective angle of about 40 degrees or less relative to the surface of the III-N material structure.
US09142656B2	Phase control thyristor with improved pattern of local emitter shorts dots A phase control thyristor includes a main gate structure and a plurality of local emitter shorts dots arranged in a shorts pattern on a cathode side of the thyristor. The main gate structure includes longitudinal main gate beams extending from a center region of the cathode side towards a circumferential region. Neighboring main gate beams are arranged with a distance with respect to an associated intermediate middle line. The shorts pattern is more homogeneous in a region closer to a main gate beam than in a region closer to an associated middle line. Adaptions to match shorts patterns in neighboring segments of the cathode side surface are made in regions away from the main gate beams such that an electron hole plasma spreading from the main gate beam is not interfered by any inhomogeneity of the shorts dots pattern. The design rules enable an improvement of the thyristor operational characteristics.
US09142654B2	Manufacturing method of oxide semiconductor thin film transistor A manufacturing method of an oxide semiconductor thin film transistor according to the disclosure includes the following. A source and a drain are formed. A channel layer is formed between the source and the drain, wherein the channel layer is separated from the source and the drain. An insulation layer is formed, wherein the insulation layer covers the source, the drain, and the channel layer. A first conductor is at least formed in a first opening of the insulation layer, wherein the first conductor contacts the source and the channel layer. A second conductor is at least formed in a second opening of the insulation layer, wherein the second conductor contacts the drain and the channel layer.
US09142649B2	Semiconductor structure with metal gate and method of fabricating the same A metal gate process comprises the steps of providing a substrate, forming a dummy gate on said substrate, forming dummy spacers on at least one of the surrounding sidewalls of said dummy gate, forming a source and a drain respectively in said substrate at both sides of said dummy gate, performing a replacement metal gate process to replace said dummy gate with a metal gate, removing said dummy spacers, and forming low-K spacers to replace said dummy spacers.
US09142646B2	Integrated electronic device with edge-termination structure and manufacturing method thereof An embodiment of an integrated electronic device formed in a semiconductor body delimited by a lateral surface, which includes: a substrate made of a first semiconductor material; a first epitaxial region made of a second semiconductor material, which overlies the substrate and defines a first surface; a second epitaxial region made of a third semiconductor material, which overlies the first surface and is in contact with the first epitaxial region, the third semiconductor material having a bandgap narrower than the bandgap of the second semiconductor material; an active area, extending within the second epitaxial region and housing at least one elementary electronic component; and an edge structure, arranged between the active area and the lateral surface, and including a dielectric region arranged laterally with respect to the second epitaxial region, which overlies the first surface and is in contact with the first epitaxial region.
US09142644B2	Semiconductor device and method for fabricating the same The present inventive concept has been made in an effort to increase the width of a channel in a silicon carbide MOSFET using a trench gate.According to the exemplary embodiment of the present inventive concept, the width of a channel can be increased, compared with the conventional art, by forming a plurality of protrusions extending to the p type epitaxial layer on both sides of the trench.
US09142643B2	Method for forming epitaxial feature The present disclosure provides an integrated circuit device and method for manufacturing the integrated circuit device. The disclosed method provides substantially defect free epitaxial features. An exemplary method includes forming a gate structure over the substrate; forming recesses in the substrate such that the gate structure interposes the recesses; and forming source/drain epitaxial features in the recesses. Forming the source/drain epitaxial features includes performing a selective epitaxial growth process to form an epitaxial layer in the recesses, and performing a selective etch back process to remove a dislocation area from the epitaxial layer.
US09142642B2	Methods and apparatus for doped SiGe source/drain stressor deposition A semiconductor device system, structure and method of manufacture of a source/drain with SiGe stressor material to address effects due to dopant out-diffusion are disclosed. In an embodiment, a semiconductor substrate is provided with a gate structure, and recesses for source and drain are formed on opposing sides of the gate structure. Doped stressors are embedded into the recessed source and drain regions, and a plurality of layers of undoped stressor, lightly doped stressor, highly doped stressor, and a cap layer are formed in an in-situ epitaxial process. In another embodiment the doped stressor material is boron doped epitaxial SiGe. In an alternative embodiment an additional layer of undoped stressor material is formed.
US09142638B2	Semiconductor device and manufacturing method of semiconductor device A semiconductor device includes an electron transit layer formed on a substrate; an electron supply layer formed on the electron transit layer; a doping layer formed on the electron supply layer, the doping layer being formed with a nitride semiconductor in which an impurity element to become p-type and C are doped; a p-type layer formed on the doping layer, the p-type layer being formed with a nitride semiconductor in which the impurity element to become p-type is doped; a gate electrode formed on the p-type layer; and a source electrode and a drain electrode formed on the doping layer or the electron supply layer. The p-type layer is formed in an area immediately below the gate electrode, and a density of the C doped in the doping layer is greater than or equal to 1×1017 cm−3 and less than or equal to 1×1019 cm−3.
US09142636B2	Methods of fabricating nitride-based transistors with an ETCH stop layer A III-Nitride field-effect transistor, specifically a HEMT, comprises a channel layer, a barrier layer on the channel layer, an etch stop layer on the cap layer, a dielectric layer on the etch stop layer, a gate recess that extends to the barrier layer, and a gate contact in the gate recess. The etch stop layer may reduce damage associated with forming the recessed gate by not exposing the barrier layer to dry etching. The etch stop layer in the recess is removed and the remaining etch stop layer serves as a passivation layer.
US09142631B2	Multilayer diffusion barriers for wide bandgap Schottky barrier devices Semiconductor Schottky barrier devices include a wide bandgap semiconductor layer, a Schottky barrier metal layer on the wide bandgap semiconductor layer and forming a Schottky junction, a current spreading layer on the Schottky barrier metal layer remote from the wide bandgap semiconductor layer and two or more diffusion barrier layers between the current spreading layer and the Schottky barrier metal layer. The first diffusion barrier layer reduces mixing of the current spreading layer and the second diffusion barrier layer at temperatures of the Schottky junction above about 300° C. and the second diffusion barrier layer reduces mixing of the first diffusion barrier layer and the Schottky barrier metal layer at the temperatures of the Schottky junction above about 300° C.
US09142624B2	Semiconductor device A semiconductor device includes a semiconductor base body having an n+-type semiconductor layer and an n−-type semiconductor layer p+-type diffusion regions selectively formed on a surface of the n−-type semiconductor layer, and a barrier metal layer formed on a surface of the n−-type semiconductor layer and surfaces of p+-type diffusion regions. A Schottky junction is between the barrier metal layer and the n−-type semiconductor layer. An ohmic junction is between the barrier metal layer and the p+-type diffusion regions. Platinum is diffused into the semiconductor base body such that a concentration of platinum becomes maximum in a surface of the n−-type semiconductor layer.
US09142623B2	Substrate for epitaxial growth, and crystal laminate structure Provided is a substrate for epitaxial growth, which enables the improvement in quality of a Ga-containing oxide layer that is formed on a β-Ga2O3 single-crystal substrate. A substrate (1) for epitaxial growth comprises β-Ga2O3 single crystals, wherein face (010) of the single crystals or a face that is inclined at an angle equal to or smaller than 37.5° with respect to the face (010) is the major face. A crystal laminate structure (2) comprises: the substrate (1) for epitaxial growth; and epitaxial crystals (20) which are formed on the major face (10) of the substrate (1) for epitaxial growth and each of which comprises a Ga-containing oxide.
US09142621B2	Compound semiconductor device and method of fabricating the same A compound semiconductor device and method of fabricating the same according to the present invention is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region, and a semiconductor layer disposed on the substrate, wherein doping conditions of said first doped region and said second doped region may be different from each other.
US09142618B2	Semiconductor device A semiconductor device according to an embodiment includes: a first diamond semiconductor layer of a first conductivity type including a main surface having a first plane orientation; a trench structure formed in the first diamond semiconductor layer; a second diamond semiconductor layer formed on the first diamond semiconductor layer in the trench structure and having a lower dopant concentration than the first diamond semiconductor layer; a third diamond semiconductor layer of a second conductivity type formed on the second diamond semiconductor layer and having a higher dopant concentration than the second diamond semiconductor layer; a first electrode electrically connected to the first diamond semiconductor layer; and a second electrode electrically connected to the third diamond semiconductor layer.
US09142616B2	Silicon wafers with suppressed minority carrier lifetime degradation Processes for suppressing minority carrier lifetime degradation in silicon wafers are disclosed. The processes involve quench cooling the wafers to increase the density of nano-precipitates in the silicon wafers and the rate at which interstitial atoms are consumed by the nano-precipitates.
US09142614B2	Isolation trench through backside of substrate Among other things, one or more semiconductor arrangements comprising isolation trenches, and techniques for forming such isolation trenches are provided. A substrate comprises a front side surface and a backside surface. One or more devices are formed over the front side surface. A wet etch is performed to form a tapered portion of an isolation trench. A dry etch is performed to form a non-tapered portion of the isolation trench. Because both the wet etch and the dry etch are performed, etching time is reduced compared to merely using the dry etch due to the wet etch having a relatively faster etch rate than the dry etch. In an embodiment, the isolation trench provides isolation for a current leakage path associated with a device or other material formed over the front side surface. In an embodiment, metal is formed within the isolation trench for backside metallization.
US09142612B2	Semiconductor device and method of fabricating the same An aspect of the present embodiment, there is provided a semiconductor device, including a first electrode, a first semiconductor layer having a first conductive type connected to the first electrode, a second semiconductor layer having a second conductive type contacted to the first semiconductor layer, a third semiconductor layer having the first conductive type, an impurity concentration of the third semiconductor layer being smaller than an impurity concentration of the second semiconductor layer, the third semiconductor layer contacting to the second semiconductor layer to be separated from the first semiconductor layer by the second semiconductor layer, a gate insulator provided on the second semiconductor layer, and the first semiconductor layer and the third semiconductor layer arranged at both sides of the second semiconductor layer, respectively, a gate electrode on the gate insulator; and a second electrode connected to the third semiconductor layer.
US09142611B2	Semiconductor integrated circuit device The present disclosure provides a layout of a semiconductor integrated circuit device that can assure a lot of substrate contact regions, and can surely suppress latch-up without increasing an area of a whole semiconductor integrated circuit and without significantly decreasing a decoupling capacitance element. In a margin region, a transistor serving as a decoupling capacitance and a substrate contact are disposed as a pair on a P-type well. In the margin region, a transistor serving as a decoupling capacitance and a substrate contact are disposed as a pair on an N-type well.
US09142606B2	Semiconductor device having an inductor mounted on a back face of a lead frame A semiconductor device includes: a lead frame; an IC element mounted on a main face of the lead frame; an inductor mounted on a back face of the lead frame; and a resin body configured to seal the lead frame, the IC element and the inductor, wherein the inductor and the lead frame are closely contacted with each other, wherein the IC element is disposed at a position corresponding to an center axis of the inductor, wherein the inductor and the IC element are electrically connected to each other, and wherein wiring of main current flowing through the IC element is disposed between terminals of the inductor.
US09142604B2	Display device with transistor sampling for improved performance A display device including a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential.
US09142599B2	Light emitting device, method of manufacturing light emitting device, and electronic equipment A light emitting device includes a transistor, a light reflection layer, a first insulation layer that includes a first layer thickness part, a second layer thickness part, and a third layer thickness part, a pixel electrode that is provided on the first insulation layer, a second insulation layer that covers a peripheral section of the pixel electrode, a light emission functional layer, a facing electrode, and a conductive layer that is provided on the first layer thickness part. The pixel electrode includes a first pixel electrode which is provided in the first layer thickness part, a second pixel electrode which is provided in the second layer thickness part, and a third pixel electrode which is provided in the third layer thickness part. The first pixel electrode, the second pixel electrode, and the third pixel electrode are connected to the transistor through the conductive layer.
US09142597B2	Organic light emitting diode display An organic light emitting diode (OLED) display includes a substrate including a central area and a peripheral area adjacent the central area and bent at the center thereof, a first central OLED disposed on the central area of the bent substrate and including a first central organic emission layer having a first central thickness, and a first surrounding OLED disposed on the peripheral area of the bent substrate and including a first surrounding organic emission layer having a first surrounding thickness.
US09142596B2	Display device and method of fabricating the display device In an EL element having an anode, an insulating film (bump) formed on the anode, and an EL film and a cathode formed on the insulating film, each of a bottom end portion and a top end portion of the insulating film is formed so as to have a curved surface. The taper angle of a central portion of the insulating film is set within the range from 35° to 70°, thereby preventing the gradient of the film forming surface on which the EL film and the cathode are to be formed from being abruptly changed. On the thus-formed film forming surface, the EL film and the cathode can be formed so as to be uniform in thickness, so that occurrence of discontinuity in each of EL film and the cathode is prevented.
US09142595B2	Color-tunable OLED lighting device A color-tunable OLED device comprising: a charge-carrying cathode layer and a charge-carrying anode layer disposed parallel to each other; at least a first organic light-emitting unit and a second organic light-emitting unit disposed between the cathode and anode; and at least one charge-generating layer disposed between the cathode and anode, wherein the charge-generating layer is a charge-carrying layer of lesser lateral conductivity than the anode and cathode, and said charge-generating layer is electrically connected without additional circuit elements to another charge-carrying layer and disposed such that at least one organic light-emitting unit is wedged between two directly-connected charge-carrying layers, and at least one organic light-emitting unit is not thusly wedged.
US09142585B2	Image sensor comprising isolated germanium photodetectors integrated with a silicon substrate and silicon circuitry In accordance with the invention, an improved image sensor includes an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits. The germanium elements are thus integrated to the silicon by epitaxial growth and integrated to the silicon circuitry by common metal layers.
US09142581B2	Die seal ring for integrated circuit system with stacked device wafers An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.
US09142575B2	Solid-state imaging apparatus and imaging system A solid-state imaging apparatus having a pixel array is provided. The apparatus includes one or more ground lines and one or more power supply lines for supplying power to the pixels. Each of the pixels includes an photoelectric conversion element and an A/D converter for converting an analog signal corresponding to a charge generated by the photoelectric conversion element into a digital signal. At least one of the plurality of pixels includes at least a portion of a capacitance element having a first electrode connected to one of the one or more power supply lines, and a second electrode connected to one of the one or more ground lines.
US09142574B2	Semiconductor device and fabrication method thereof For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
US09142573B1	Thin film transistor substrate and method for producing same Each of the auxiliary capacitors (6a) includes a capacitor line (11b) comprised of the same material as the gate electrode (11a) and provided in the same layer as the gate electrode (11a), the gate insulating film (12) provided so as to cover the capacitor line (11a), a capacitor intermediate layer (13c) provided using the oxide semiconductor and provided on the gate insulating film (12) so as to overlap the capacitor line (11b), and a capacitor electrode (15b) provided on the capacitor intermediate layer (13c), and the capacitor intermediate layer (13c) is conductive.
US09142570B2	Semiconductor device An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
US09142569B2	Photosensor, semiconductor device including photosensor, and light measurement method using photosensor An object is to provide a photosensor utilizing an oxide semiconductor in which a refreshing operation is unnecessary, a semiconductor device provided with the photosensor, and a light measurement method utilizing the photosensor. It is found that a constant gate current can be obtained by applying a gate voltage in a pulsed manner to a transistor including a channel formed using an oxide semiconductor, and this is applied to a photosensor. Since a refreshing operation of the photosensor is unnecessary, it is possible to measure the illuminance of light with small power consumption through a high-speed and easy measurement procedure. A transistor utilizing an oxide semiconductor having a relatively high mobility, a small S value, and a small off-state current can form a photosensor; therefore, a multifunction semiconductor device can be obtained through a small number of steps.
US09142568B2	Method for manufacturing light-emitting display device It is an object of one embodiment of the present invention to manufacture a light-emitting display device by simplifying a manufacturing process of a transistor, without an increase in the number of steps as well as the number of photomasks as compared to those in the conventional case. A step for processing a semiconductor layer into an island shape is omitted by using a high-resistance oxide semiconductor which is intrinsic or substantially intrinsic for the semiconductor layer, used to form transistors. Formation of an opening in the semiconductor layer or an insulating layer formed over the semiconductor layer and etching of an unnecessary portion of the semiconductor layer are performed at the same time; thus, the number of photolithography steps is reduced.
US09142567B2	SOI SRAM having well regions with opposite conductivity A semiconductor device with an SRAM memory cell having improved characteristics.Below an active region in which a driver transistor including a SRAM is placed, an n type back gate region surrounded by an element isolation region is provided via an insulating layer. It is coupled to the gate electrode of the driver transistor. A p well region is provided below the n type back gate region and at least partially extends to a position deeper than the element isolation region. It is fixed at a grounding potential. Such a configuration makes it possible to control the threshold potential of the transistor to be high when the transistor is ON and to be low when the transistor is OFF; and control so as not to apply a forward bias to the PN junction between the p well region and the n type back gate region.
US09142565B2	SOI substrate with acceptor-doped layer A semiconductor device includes a SOI substrate including a silicon substrate, an oxide layer on the silicon substrate, and a silicon layer on the oxide layer; a source region and a drain region formed in the silicon layer; and an acceptor-doped layer formed between the oxide layer and the silicon substrate, the acceptor-doped layer being doped with acceptors.
US09142563B2	Three dimensional semiconductor memory devices and methods of fabricating the same A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure, charge storing patterns interposed between the semiconductor patterns and the electrode structure, and blocking insulating patterns interposed between the charge storing patterns and the electrode structure. Each of the blocking insulating patterns surrounds the semiconductor patterns, and the charge storing patterns are horizontally spaced from each other and configured in such a way as to each be disposed around a respective one of the semiconductor patterns. Also, each of the charge storing patterns includes a plurality of horizontal segments, each interposed between vertically adjacent ones of the electrodes.
US09142562B2	Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device according to an embodiment includes: a semiconductor layer; a block insulating film; an organic molecular layer, which is formed between the semiconductor layer and the block insulating film, and provided with a first organic molecular film on the semiconductor layer side containing first organic molecules and a second organic molecular film on the block insulating film side containing second organic molecules, and in which the first organic molecule has a charge storing unit and the second organic molecule is an amphiphilic organic molecule; and a control gate electrode formed on the block insulating film.
US09142550B2	High-voltage cascaded diode with HEMT and monolithically integrated semiconductor diode An embodiment of a cascaded diode having a breakdown voltage exceeding 300V includes an HEMT and a Si Schottky diode. The HEMT includes a gate, a drain, a source, and a two-dimensional electron gas channel region connecting the source and the drain and controlled by the gate. The HEMT has a breakdown voltage exceeding 300V. The Si Schottky diode is monolithically integrated with the HEMT. The Si Schottky diode includes a cathode connected to the source of the HEMT and an anode connected to the gate of the HEMT. The Si Schottky diode has a breakdown voltage less than 300V and a forward voltage less than or equal to 0.4V. The anode of the Si Schottky diode forms the anode of the cascaded diode and the drain of the HEMT forms the cathode of the cascaded diode.
US09142549B2	Semiconductor memory device In a matrix including a plurality of memory cells, each in which a drain of a writing transistor is connected to a gate of a reading transistor and the drain is connected to one electrode of a capacitor, a gate of the writing transistor is connected to a writing word line, a source of the writing transistor and a source of the reading transistor is connected to a bit line, and a drain of the reading transistor is connected to a reading word line. A conductivity type of the writing transistor is different from a conductivity type of the reading transistor. In order to increase the integration degree, a bias line may be substituted with a reading word line in another row, or memory cells are connected in series so as to have a NAND structure, and a reading word line and a writing word line may be shared.
US09142541B2	Semiconductor device having inductor A semiconductor device including a first insulating layer and a second insulating layer sequentially disposed on a substrate is disclosed. A first conductive line and a second conductive line are disposed in the first insulating layer, and each of the first and second conductive lines has a first end and a second end, wherein the second ends of the first and second conductive lines are coupled to each other. A first winding portion and a second winding portion are disposed in the second insulating layer, and each of the first and second winding portions includes a third conductive line and a fourth conductive line arranged from the inside to the outside. Each of the third and fourth conductive lines has a first end and a second end, wherein the first and second conductive lines overlap at least a portion of the third conductive lines.
US09142540B2	Electrostatic discharge protection semiconductor device A semiconductor device includes a substrate, a gate positioned on the substrate, a drain and a source formed in the substrate at respective two sides of the gate, and a doped region formed in the source. The drain and the source comprise a first conductivity type and the doped region comprises a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.
US09142532B2	Chip-on-wafer bonding method and bonding device, and structure comprising chip and wafer [Problem] Provided is a technique for bonding chips efficiently onto a wafer to establish an electrical connection and raise mechanical strength between the chips and the wafer or between the chips that are chips laminated onto each other in the state that resin and other undesired residues do not remain on a bond interface therebetween.[Solution] A method for bonding plural chips each having a chip-side-bond-surface having metal regions to a substrate having plural bond portions has the step (S1) of subjecting the metal regions of the chip-side-bond-surface to surface activating treatment and hydrophilizing treatment; the step (S2) of subjecting the bond portions of the substrate to surface activating treatment and hydrophilizing treatment; the step (S3) of fitting the chips subjected to the surface activating treatment and the hydrophilizing treatment onto the corresponding bond portions of the substrate subjected to the surface activating treatment and the hydrophilizing treatment to bring the metal regions of the chips into contact with the bond portions of the substrate; and the step (S4) of heating the resultant structure, which includes the substrate, and the chips fitted onto the substrate.
US09142527B2	Method of wire bonding over active area of a semiconductor circuit A method and structure are provided to enable wire bond connections over active and/or passive devices and/or low-k dielectrics, formed on an Integrated Circuit die. A semiconductor substrate having active and/or passive devices is provided, with interconnect metallization formed over the active and/or passive devices. A passivation layer formed over the interconnect metallization is provided, wherein openings are formed in the passivation layer to an upper metal layer of the interconnect metallization. Compliant metal bond pads are formed over the passivation layer, wherein the compliant metal bond pads are connected through the openings to the upper metal layer, and wherein the compliant metal bond pads are formed substantially over the active and/or passive devices. The compliant metal bond pads may be formed of a composite metal structure.
US09142526B2	Semiconductor package with solder resist capped trace to prevent underfill delamination The invention provides a semiconductor package. The semiconductor package includes a substrate. A first conductive trace is disposed on the substrate. A first conductive trace disposed on the substrate. A semiconductor die is disposed over the first conductive trace. A solder resist layer that extends across an edge of the semiconductor die is also included. Finally, an underfill material is provided that fills a gap between the substrate and the semiconductor die.
US09142525B2	Semiconductor device bonded by anisotropic conductive film A semiconductor device including a first connecting member including a first electrode; a second connecting member including a second electrode; and an anisotropic conductive film between the first connecting member and the second connecting member, the anisotropic conductive film bonding the first electrode to the second electrode, wherein the anisotropic conductive film exhibits linear indentations in an inter-terminal space of the second connecting member after pre-compression and primary compression of the anisotropic conductive film onto the first and second connecting members.
US09142524B2	Semiconductor package and method for manufacturing semiconductor package A semiconductor package includes a semiconductor chip including a circuit forming surface and a side surface, and a sealing insulation layer that seals the circuit forming surface and the side surface of the semiconductor chip, the sealing insulation layer having a first surface on a side of the circuit forming surface. At least one wiring layer and at least one insulation layer are formed one on top of the other on the first surface. The wiring layer formed on the first surface is electrically connected to the semiconductor chip. The insulation layer has a reinforcement member installed therein.
US09142522B2	Semiconductor device and method of forming RDL under bump for electrical connection to enclosed bump A semiconductor device has a semiconductor wafer with a plurality of semiconductor die. A first conductive layer is formed over a surface of the wafer. A first insulating layer is formed over the surface of the wafer and first conductive layer. A second conductive layer has first and second segments formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. A UBM layer is formed over the second insulating layer and the first segment of the second conductive layer. A first bump is formed over the UBM layer. The first bump is electrically connected to the second segment and electrically isolated from the first segment of the second conductive layer. A second bump is formed over the surface of the wafer and electrically connected to the first segment of the second conductive layer.
US09142521B2	Integrated circuit device including a copper pillar capped by barrier layer and method of forming the same A method of forming an integrated circuit device includes forming a mask layer overlying an under bump metallurgy (UBM) layer, wherein the mask layer comprises a first portion adjacent to the UBM layer, and a second portion overlying the first portion. The method further includes forming an opening in the mask layer to expose a portion of the UBM layer. The method further includes forming a conductive layer in the opening of the mask layer, electrically connected to the exposed portion of the UBM layer. The method further includes removing the second portion of the mask layer to expose an upper portion of the conductive layer. The method further includes forming a barrier layer on the exposed upper portion of the conductive layer.
US09142519B2	Semiconductor device with covering member that partially covers wiring substrate An error is prevented from being generated at a mounting position of an electronic component on a wiring substrate. A first semiconductor chip has a main surface and a rear surface. The rear surface is an opposite surface of the main surface. The rear surface of the first semiconductor chip is an opposite surface of the main surface thereof. A wiring substrate is rectangular, and has a main surface and a rear surface. The first semiconductor chip is mounted on the main surface of the wiring substrate. A lid covers the main surface of the wiring substrate, and the first semiconductor chip. An electronic component is mounted on the rear surface of the wiring substrate. The main surface of the wiring substrate has uncovered regions that are not covered with the lid at at least two corners facing each other.
US09142516B2	Semiconductor device and manufacturing method therefor A semiconductor device includes a plurality of protrusions formed on a first face of the semiconductor device; first bonding portions formed on upper portions of the plurality of protrusions; second bonding portions formed on side faces of the plurality of protrusions; and third bonding portions formed on the first face between the plurality of protrusions, wherein the semiconductor device is configured to bond to an other semiconductor device through the third from the first bonding portions.
US09142514B2	Semiconductor device and method of forming wafer level die integration In a wafer level chip scale package (WLCSP), a semiconductor die has active circuits and contact pads formed on its active surface. A second semiconductor die is disposed over the first semiconductor die. A first redistribution layer (RDL) electrically connects the first and second semiconductor die. A third semiconductor die is disposed over the second semiconductor die. The second and third semiconductor die are attached with an adhesive. A second RDL electrically connects the first, second, and third semiconductor die. The second RDL can be a bond wire. Passivation layers isolate the RDLs and second and third semiconductor die. A plurality of solder bumps is formed on a surface of the WLCSP. The solder bumps are formed on under bump metallization which electrically connects to the RDLs. The solder bumps electrically connect to the first, second, or third semiconductor die through the first and second RDLs.
US09142506B2	E-fuse structures and methods of manufacture E-fuse structures in back end of the line (BEOL) interconnects and methods of manufacture are provided. The method includes forming an interconnect via in a substrate in alignment with a first underlying metal wire and forming an e-fuse via in the substrate, exposing a second underlying metal wire. The method further includes forming a defect with the second underlying metal wire and filling the interconnect via with metal and in contact with the first underlying metal wire thereby forming an interconnect structure. The method further includes filling the e-fuse via with the metal and in contact with the defect and the second underlying metal wire thereby forming an e-fuse structure.
US09142504B2	Semiconductor device structures Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.
US09142503B2	III-nitride rectifier package Some exemplary embodiments of high voltage cascoded III-nitride semiconductor package utilizing clips on a package support surface have been disclosed. One exemplary embodiment comprises a III-nitride transistor attached to a package support surface and having an anode of a diode stacked over a source of the III-nitride transistor, a first conductive clip coupled to a gate of the III-nitride transistor and the anode of the diode, and a second conductive clip coupled to a drain of the III-nitride transistor. The conductive clips are connected to the package support surface and expose respective flat portions that are surface mountable. In this manner, reduced package footprint, improved surge current capability, and higher performance may be achieved compared to conventional wire bonded packages. Furthermore, since a low cost printed circuit board (PCB) may be utilized for the package support surface, expensive leadless fabrication processes may be avoided for cost effective manufacturing.
US09142502B2	Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits A semiconductor device package having pre-formed and placed through vias and a process for making such a package is provided. One or more signal conduits are placed in a holder that is subsequently embedded in an encapsulated semiconductor device package. The ends of the signal conduits are exposed and the signal conduits are then used as through package vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package. Holders can be provided in a variety of geometries and materials, depending upon the nature of the application. Further, multiple holders with signal conduits can be provided in a single package to provide for more complex interconnect configuration demands in, for example, system-in-a-package applications.
US09142501B2	Under ball metallurgy (UBM) for improved electromigration An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer.
US09142498B2	Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections An electrical interconnection can be provided using a bump stack including at least two solder bumps which are stacked on one another and at least one intermediate layer interposed between the at least stacked two solder bumps.
US09142497B2	Method for making electrical structure with air dielectric and related electrical structures A method has been described for making an electrical structure having an air dielectric and includes forming a first subunit including a sacrificial substrate, an electrically conductive layer including a first metal on the sacrificial substrate, and a sacrificial dielectric layer on the sacrificial substrate and the electrically conductive layer. The method further includes forming a second subunit including a dielectric layer and an electrically conductive layer thereon including the first metal, and coating a second metal onto the first metal of one or more of the first and second subunits. The method also includes aligning the first and second subunits together, heating and pressing the aligned first and second subunits to form an intermetallic compound of the first and second metals bonding adjacent metal portions together, and removing the sacrificial substrate and sacrificial dielectric layer to thereby form the electrical structure having the air dielectric.
US09142496B1	Semiconductor package having etched foil capacitor integrated into leadframe A method for fabricating a packaged semiconductor device begins by placing a first mask on a foil of porous conductive material bonded on a strip of a first metal. The surface of the conductive material and the inside of the pores are oxidized. The first mask leaves areas unprotected. The pores of the unprotected areas are filled with a conductive polymeric compound. A layer of a second metal is deposited on the conductive polymeric compound in the unprotected areas. The first mask is removed to expose un-oxidized conductive material. The foil thickness of the un-oxidized conductive material is removed to expose the underlying first metal. This creates sidewalls of the foil and leaves un-removed the capacitor areas covered by the second metal. A second mask is placed on the strip, the second mask defines a plurality of leadframes having chip pads and leads, and protecting the capacitor areas. The portions of the first metal exposed by the second mask are removed. Sidewalls of the first metal are coplanar with the foil sidewalls. The second mask is removed.
US09142486B2	Chip package and fabrication method thereof An embodiment of the present invention relates to a chip package and fabrication method thereof, which includes a semiconductor substrate containing a chip area and a peripheral pad area surrounding the chip area, wherein a conductive pad and a through hole exposing the conductive pad are formed in the peripheral pad area; a protection layer covering a bottom surface of the semiconductor substrate and the through hole; a packaging layer formed on an upper surface of the semiconductor substrate; and a spacing layer formed between the packaging layer and the semiconductor substrate, wherein the chip packaging has a main side surface constituted of side surfaces of the semiconductor substrate, the protecting layer, the packaging layer and the spacing layer, and wherein the main side surface has at least one recess portion.
US09142484B2	Power module package An integrated power module includes a substantially planar insulated metal substrate having at least one cut-out region; at least one substantially planar ceramic substrate disposed within the cut-out region, wherein the ceramic substrate is framed on at least two sides by the insulated metal substrate, the ceramic substrate including a first metal layer on a first side and a second metal layer on a second side; at least one power semiconductor device coupled to the first side of the ceramic substrate; at least one control device coupled to a first surface of the insulated metal substrate; a power overlay electrically connecting the at least one semiconductor power device and the at least one control device; and a cooling fluid reservoir operatively connected to the second metal layer of the at least one ceramic substrate, wherein a plurality of cooling fluid passages are provided in the cooling fluid reservoir.
US09142483B2	Mounting structure of transmission module To efficiently cool an IC chip and a transmission module disposed on the same substrate, amounting structure of transmission module of the present invention includes a motherboard, a package substrate mounted on the motherboard, an IC chip and a plurality of connectors disposed on amounting surface of the package substrate, a plurality of transmission modules connected to the plurality of connectors, and module cooling members having a plurality of slits provided along an connector array direction. The connectors are disposed inside the slits of module cooling members, and the transmission modules can be connected to and disconnected from the connectors disposed through the slits. The transmission modules connected to the connectors are in contact with inside surfaces of the slits and thermally connected to the cooling members.
US09142482B2	Transient thermal management systems for semiconductor devices Thermal management systems for semiconductor devices are provided. Embodiments of the invention provide two or more liquid cooling subsystems that are each capable of providing active cooling to one or more semiconductor devices, such as packaged processors. In operation, a first liquid cooling subsystem can provide active cooling to the semiconductor device(s) while the second cooling subsystem is circulating a heat transfer fluid within its own subsystem. The second liquid cooling subsystem can be then switched into operation and provides active cooling to the semiconductor device(s) while the first cooling subsystem is circulating heat transfer fluid within its own subsystem. In alternate embodiments, the heat transfer fluid remains in the subsystem, but does not circulate within the subsystem when the subsystem is not providing cooling to the semiconductor device(s). The subsystems comprise heat dissipation units. The switching between cooling systems allows the semiconductor device(s) to be maintained at a lower operating temperature than if switching between cooling subsystems were not employed.
US09142481B2	Integrated circuit packaging system with heatsink cap and method of manufacture thereof A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching an integrated circuit to the substrate; molding an encapsulation directly on the integrated circuit and the substrate; forming a trench in the encapsulation having a trench bottom surface and surrounding the integrated circuit; and mounting a heatsink having a heatsink rim over the integrated circuit with the heatsink rim within the trench and the heatsink electrically isolated from the substrate.
US09142479B2	Electronic device and semiconductor device Provided is an electronic device having a semiconductor device and a mounting board. The semiconductor device has a die pad, a semiconductor chip on the die pad, a coupling member coupling the die pad to the semiconductor chip, and a semiconductor package member covering the upper portion of the semiconductor chip and the side surface of the die pad. In this semiconductor device, the plane area of the coupling member coupling the mounting board to the die pad is smaller than the plane area of the lower surface of the die pad exposed from the semiconductor package material. This makes it possible to reduce separation between the die pad and the semiconductor chip resulting from cracks, due to temperature cycling, of the coupling member present between the die pad and the semiconductor chip.
US09142475B2	Magnetic contacts Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with magnetic contacts, as well as corresponding fabrication methods and systems incorporating such magnetic contacts. A first IC substrate may have a first magnet coupled with a first electrical routing feature. A second IC substrate may have a second magnet coupled with a second electrical routing feature. The magnets may be embedded in the IC substrates and/or electrical routing features. The magnets may generate a magnetic field that extends across a gap between the first and second electrical routing features. Electrically conductive magnetic particles may be applied to one or both of the IC substrates to form a magnetic interconnect structure that extends across the gap. In some embodiments, magnetic contacts may be demagnetized by heating the magnets to a corresponding partial demagnetization temperature (PDT) or Curie temperature. Other embodiments may be described and/or claimed.
US09142472B2	Integrated circuit and method of making Integrated circuits and methods of fabricating integrated circuits are disclosed herein. One embodiment of an integrated circuit includes a die having a side, wherein a conductive stud extends substantially normal relative to the side. A dielectric layer having a first side and a second side is located proximate the side of the die so that the first side of the dielectric layer is adjacent the side of the die. The conductive stud extends into the first side of the dielectric layer. A first via extends between the conductive stud and the second side of the dielectric layer. A conductive layer having a first side and a second side is located adjacent the second side of the dielectric layer, wherein the first side of the conductive layer is located adjacent the second side of the dielectric layer. At least a portion of the conductive layer is electrically connected to the first via.
US09142471B2	Doped, passivated graphene nanomesh, method of making the doped, passivated graphene nanomesh, and semiconductor device including the doped, passivated graphene nanomesh A doped, passivated graphene nanomesh includes a graphene nanomesh, a plurality of nanoholes formed in a graphene sheet, and a plurality of carbon atoms which are formed adjacent to the plurality of nanoholes; a passivating element bonded to the plurality of carbon atoms; and a dopant bonded to the passivating element, the dopant comprising one of an electron-donating element for making the graphene nanomesh an n-doped graphene nanomesh, and an electron-accepting element for making the graphene nanomesh a p-doped graphene nanomesh.
US09142470B2	Packages and methods for packaging Packaged integrated devices and methods of forming the same are provided. In one embodiment, a packaged integrated device includes a package substrate, a package lid, and an integrated circuit or microelectromechanical systems (MEMS) device. The package lid is mounted to a first surface of the package substrate using an epoxy, and the package lid and the package substrate define a package interior. The package lid includes an interior coating suited to good adhesion with the epoxy, and an exterior coating suited to RF shielding, where the materials of the interior and exterior coatings are different. In one example, the interior lid coating is nickel whereas the exterior lid coating is tin.
US09142462B2	Integrated circuit having a contact etch stop layer and method of forming the same A method of forming an integrated circuit structure includes providing a gate stack and a gate spacer on a sidewall of the gate stack. A contact etch stop layer (CESL) is formed overlying the gate spacer and the gate stack. The CESL includes a top portion over the gate stack, a bottom portion lower than the top portion, and a sidewall portion over a sidewall of the gate spacer. The top and bottom portions are spaced apart from each other by the sidewall portion. The sidewall portion has a thickness less than a thickness of the top portion or a thickness of the bottom portion.
US09142460B2	Methods of forming gated devices Some embodiments include methods of forming gated devices. An upper region of a semiconductor material is patterned into a plurality of walls that extend primarily along a first direction. The walls are spaced from one another by trenches that extend primarily along the first direction. Steps are formed along bottoms of the trenches. Gatelines are formed on the steps and along lower regions of the walls. After the gatelines are formed, the walls are patterned into spaced-apart pillars that have bottom regions below the gatelines. In some embodiments the gated devices may be transistors or thyristors.
US09142459B1	Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves applying an adhesive layer to a front side of the semiconductor wafer. A mask layer is laminated onto the front side of the semiconductor wafer, the mask layer covering and protecting the integrated circuits. The adhesive layer adheres the mask layer to the front side of the semiconductor wafer. The mask layer is patterned with a laser scribing process to provide gaps in the mask layer, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is plasma etched through the gaps in the mask layer to singulate the integrated circuits.
US09142452B2	Hard mask removal scheme A method includes forming a barrier layer in a via hole and over a hard mask layer. The hard mask layer is disposed over a dielectric layer. The via hole is located through the dielectric layer and the hard mask layer. A filler layer is formed in the via hole and over the barrier layer. The filler layer and the hard mask layer are removed. A metal layer is formed in the via hole.
US09142450B2	Interconnect structure and method of forming the same An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a first metal line and a second metal line over a substrate; a portion of a first low-k (LK) dielectric layer between the first metal line and the second metal line; and a second LK dielectric layer over the portion of the first LK dielectric layer. A top surface of the second LK dielectric layer is substantially coplanar with a top surface of the first metal line or the second metal line, and a thickness of the second LK dielectric layer is less than a thickness of the first metal line or a thickness of the second metal line.
US09142449B2	Method for manufacturing bonded wafer The present invention is a method for manufacturing a bonded wafer, including performing a plasma activation treatment on at least one of the bonded surfaces of the bond wafer and the base wafer before bonding, wherein the plasma activation treatment is performed while a back surface of at least one of the bond wafer and the base wafer is placed on a stage with the back surface being in point contact or line contact with the stage. The method can inhibit increase in attached substances such as particles on the back surface of a wafer during the plasma activation treatment, and prevent re-attachment of the attached substances to the bonded surface of the wafer, particularly when the wafer after the plasma activation treatment is cleaned with a batch cleaning apparatus.
US09142446B2	Semiconductor devices and fabrication methods thereof A semiconductor device is provided. The semiconductor device includes a semiconductor substrate; and a body region and a drift region formed in the semiconductor substrate. The semiconductor device also includes a bulk region and a source region formed in the body region. Further, the semiconductor device includes a drain region and a first shallow trench isolation structure having a ladder-like bottom formed in the drift region. Further, the semiconductor device also includes a gate structure spanning over an edge of the body region and an edge of the drift region formed on the semiconductor substrate and covering a portion of the first shallow trench isolation structure.
US09142444B2	Semiconductor component and method for producing a semiconductor component A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein the electrically conductive layer only partly fills the protective trench.
US09142437B2	System for separately handling different size FOUPs A system for separately handling different size FOUPs includes an end effector having a surface thereon for supporting a FOUP. The end effector and surface is configured to support different size FOUPs. A fixture or means for engaging and maintaining a FOUP, of different size FOUPs, included to position and maintain each of a different size FOUP on the end effector during transport thereof. A shelf is configured to receive each of said different size FOUPs. The end effector is thus capable of transporting either a first size FOUP or a second, smaller size FOUP.
US09142436B2	Statistical analysis method and substrate process system A data analyzing method includes receiving monitor data from the substrate processing apparatus; producing representative value data based on the monitor data; associating apparatus condition information indicating a condition of the substrate processing apparatus at the time of production of the monitor data, with the representative value data; storing the representative value data and the apparatus condition information associated with the representative value data and in a database; retrieving the representative value data and the apparatus condition information associated with the representative value data from the database; comparing an exclusion parameter with the retrieved apparatus condition information, the exclusion parameter including information indicating whether the retrieved representative value data should be included in analysis processing targets; and determining whether the retrieved representative value data should be included in the analysis processing targets, based on the comparison result.
US09142434B2	Method for singulating electronic components from a substrate Methods for forming electronic assemblies are provided. A device substrate having a plurality of electronic components embedded therein is provided. The device substrate is attached to a carrier substrate using an adhesive material. A plurality of cuts are formed through the device substrate to divide the device substrate into a plurality of portions. Each of the plurality of portions includes at least one of the electronic components. A force is applied to each of the plurality of portions in a direction away from the carrier substrate to remove the plurality of portions from the carrier substrate.
US09142432B2	Integrated fan-out package structures with recesses in molding compound A package includes a first die and a second die. The first die includes a first substrate and a first metal pad overlying the first substrate. The second die includes a second substrate and a second metal pad overlying the second substrate. A molding compound molds the first die and the second die therein. The molding compound has a first portion between the first die and the second die, and a second portion, which may form a ring encircles the first portion. The first portion and the second portion are on opposite sides of the first die. The first portion has a first top surface. The second portion has a second top surface higher than the first top surface.
US09142429B2	Hermetic packaging of integrated circuit components having a capacitor for transfer of electrical signals A method for forming an integrated circuit includes transforming at least a portion of a first substrate layer to form a conductive region within the first substrate layer. An integrated circuit device is provided proximate an outer surface of the first substrate layer. The integrated circuit device transmits or receives electrical signals through the conductive region. A second substrate layer is disposed proximate to the outer surface of the first substrate layer to enclose the integrated circuit device in a hermetic environment.
US09142428B2	Semiconductor device and method of forming FO-WLCSP with multiple encapsulants A semiconductor device has a first semiconductor die including TSVs mounted to a carrier with a thermally releasable layer. A first encapsulant having a first coefficient of thermal expansion CTE is deposited over the first semiconductor die. The first encapsulant includes an elevated portion in a periphery of the first encapsulant that reduces warpage. A surface of the TSVs is exposed. A second semiconductor die is mounted to the surface of the TSVs and forms a gap between the first and second semiconductor die. A second encapsulant having a second CTE is deposited over the first and second semiconductor die and within the gap. The first CTE is greater than the second CTE. In one embodiment, the first and second encapsulants are formed in a chase mold. An interconnect structure is formed over the first and second semiconductor die.
US09142425B2	Method for fabricating thin-film transistor A method for fabricating a thin-film transistor is described. A structure is provided, including a substrate transmitting an excimer laser light, a diffusion prevention film on the substrate, a gate electrode and a gate insulating film on the diffusion prevention film, and an oxide semiconductor layer on the gate insulating film. The structure is irradiated with an excimer laser light from the side of the substrate, so that two outer regions of the oxide semiconductor layer beside the region corresponding to the gate electrode are irradiated by the excimer laser light, with the gate electrode as a mask, to be reduced in resistance and thereby one of the two outer regions forms a source region and the other one forms a drain region. The diffusion prevention film includes a SiN:F film containing fluorine in a SiN film.
US09142422B2	Methods of fabricating defect-free semiconductor structures Methods of facilitating fabrication of defect-free semiconductor structures are provided which include, for instance: providing a dielectric layer, the dielectric layer comprising at least one consumable material; selectively removing a portion of the dielectric layer, wherein the selectively removing consumes, in part, a remaining portion of the at least one consumable material, leaving, within the remaining portion of the dielectric layer, a depleted region; and subjecting the depleted region of the dielectric layer to a treatment process, to restore the depleted region with at least one replacement consumable material, thereby facilitating fabrication of a defect-free semiconductor structure.
US09142418B1	Double/multiple fin structure for FinFET devices A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.
US09142417B2	Etch process with pre-etch transient conditioning A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition is controlled to control etch aspect ratio dependence.
US09142414B2	CMOS devices with metal gates and methods for forming the same A method includes forming a PMOS device. The method includes forming a gate dielectric layer over a semiconductor substrate and in a PMOS region, forming a first metal-containing layer over the gate dielectric layer and in the PMOS region, performing a treatment on the first metal-containing layer in the PMOS region using an oxygen-containing process gas, and forming a second metal-containing layer over the first metal-containing layer and in the PMOS region. The second metal-containing layer has a work function lower than a mid-gap work function of silicon. The first metal-containing layer and the second metal-containing layer form a gate of the PMOS device.
US09142412B2	Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods Embodiments relate to semiconductor structures and methods of forming semiconductor structures. The semiconductor structures include a substrate layer having a CTE that closely matches a CTE of one or more layers of semiconductor material formed over the substrate layer. In some embodiments, the substrate layers may comprise a composite substrate material including two or more elements. The substrate layers may comprise a metal material and/or a ceramic material in some embodiments.
US09142403B2	Method of forming boron-containing silicon oxycarbonitride film and method of forming silicon oxycarbonitride film According to an embodiment of the present disclosure a method of forming a boron-containing silicon oxycarbonitride film on a base is provided. The method includes forming a boron-containing film on the base, and forming the boron-containing silicon oxycarbonitride film by laminating a silicon carbonitride film and a silicon oxynitride film on the boron-containing film.
US09142402B2	Uniform shallow trench isolation regions and the method of forming the same A method includes performing a plasma treatment on a first surface of a first material and a second surface of a second material simultaneously, wherein the first material is different from the second material. A third material is formed on treated first surface of the first material and on treated second surface of the second material. The first, the second, and the third materials may include a hard mask, a semiconductor material, and an oxide, respectively.
US09142399B2	Substrate cleaning method A substrate cleaning method can prevent corrosion of copper interconnects even when the cleaning method, which uses two-fluid jet cleaning, is used for cleaning of a surface of a substrate after polishing. The substrate cleaning method includes: carrying out primary cleaning of a surface of a substrate by scrub cleaning using a neutral or alkaline liquid chemical as a cleaning liquid; carrying out finish cleaning of the surface of the substrate by two-fluid jet cleaning which cleans the surface of the substrate in a non-contact manner by jetting carbonated water, comprising pure water or ultrapure water containing dissolved CO2 gas, from a two-fluid nozzle toward the surface of the substrate; and subsequently carrying out final finish cleaning of the surface of the substrate by scrub cleaning using a neutral or alkaline liquid chemical as a cleaning liquid, and then drying the surface of the substrate.
US09142394B2	Tandem quadrupole mass spectrometer Prior to multiple reaction monitoring (MRM) measurement condition optimization, an analysis operator prepares, for each precursor ion of an objective compound, two lists on a product-ion selection condition setting screen 200, i.e. a list 203 which shows ions to be preferentially selected as product ions for which the optimization needs to be performed and a list 202 which shows ions to be excluded from the optimization. When a measurement is performed, a product-ion scan measurement for the precursor ion of the objective compound is performed and a spectrum is obtained. Among the ions extracted from this spectrum, any ion registered in the excludable-ion list 202 is excluded, while any ion registered in the preferred-ion list 203 is preferentially selected as a product ion. For each combination of the m/z values of the precursor ion and the product ions thus determined, optimum conditions of the MRM measurement are searched for.
US09142387B2	Isotopically-enriched boron-containing compounds, and methods of making and using same An isotopically-enriched, boron-containing compound comprising two or more boron atoms and at least one fluorine atom, wherein at least one of the boron atoms contains a desired isotope of boron in a concentration or ratio greater than a natural abundance concentration or ratio thereof. The compound may have a chemical formula of B2F4. Synthesis methods for such compounds, and ion implantation methods using such compounds, are described, as well as storage and dispensing vessels in which the isotopically-enriched, boron-containing compound is advantageously contained for subsequent dispensing use.
US09142384B2	Method of welding a frozen aqueous sample to a microprobe The invention relates to a method of welding a vitreous biological sample at a temperature below the glass transition temperature of approximately −137° C. to a micromanipulator, also kept at a temperature below the glass transition temperature. Where prior art methods used IBID with, for example, propane, or a heated needle (heated resistively or by e/g/laser), the invention uses a vibrating needle to locally melt the sample. By stopping the vibration, the sample freezes to the micromanipulator. The heat capacity of the heated parts is small, and the amount of material that stays in a vitreous condition thus large.
US09142383B2	Device and method for monitoring X-ray generation Illustrative embodiments of the present disclosure are directed to devices and methods for X-ray monitoring. Various embodiments of the present disclosure use a target that incorporates a monitor layer. The monitor layer is disposed adjacent to a target layer so that electrons that pass through the target layer enter the monitor layer. As electrons enter the monitor layer, electrical charge is generated within the monitor layer. This electrical charge is measured and used to determine a characteristic of the X-ray generation within the target layer.
US09142381B2	X-ray tube for generating two focal spots and medical device comprising same An X-ray tube for generating two focal spots displaced with respect to each other and a medical device using such X-ray tube are proposed. The X-ray tube (1) comprises a cathode (7) and an anode (9) wherein the cathode (7) comprises a first electron emitter (15) adapted for emitting a first electron beam (17) for generating a first focal spot (25) on the anode (9) and a second electron emitter (19) for emitting a second electron beam (21) for generating a second focal spot (27) on the anode (9). Therein, each electron emitter (15, 19) comprises an associated switchable grid (37, 39) for blocking the respective emitted electron beam (17, 21). In order to realize a desired displacement of the first and second focal spots (25, 27) in a y-direction, the first and second electron emitters (15, 19) may be displaced in the z-direction. Due to the focal spots (25, 27) being displaced in y-direction, an overall resolution of for example a high quality CT scanner may be significantly enhanced.
US09142379B2	Ion source and a method for in-situ cleaning thereof An ion source and method of cleaning are disclosed. One or more heating units are placed in close proximity to the inner volume of the ion source, so as to affect the temperature within the ion source. In one embodiment, one or more walls of the ion source have recesses into which heating units are inserted. In another embodiment, one or more walls of the ion source are constructed of a conducting circuit and an insulating layer. By utilizing heating units near the ion source, it is possible to develop new methods of cleaning the ion source. Cleaning gas is flowed into the ion source, where it is ionized, either by the cathode, as in normal operating mode, or by the heat generated by the heating units. The cleaning gas is able to remove residue from the walls of the ion source more effectively due to the elevated temperature.
US09142372B2	Contactor isolation method and apparatus A contactor unit includes an input lead connectable to a first lead of an energy output device, an output lead connectable to a first lead of a voltage bus, a contactor that connects and disconnects the input lead from the output lead, a driver configured to operate the contactor, a serial data link connectable to a system controller that is external to the contactor unit, and an integrated circuit (IC) positioned within the contactor unit and configured to output a control command to the driver to open the contactor based on at least one of a current in either the input lead or the output lead and a voltage differential across the contactor, and output a contactor control status via the serial data link.
US09142370B2	Illuminated keyboard An illuminated keyboard includes a keycap, a keycap guiding frame, a light guide plate and a sensing circuit layer, which are sequentially arranged from top to bottom. The keycap guiding frame is used for fixing the keycap and guiding movement of the keycap. The light guide plate is used for fixing the keycap guiding frame and transferring the light beam from a light-emitting element. As the keycap is depressed by the user, the approaching keycap is sensed by the sensing circuit layer, and thus the sensing circuit layer generates a corresponding non-contact key signal.
US09142369B2	Stack assembly for implementing keypads on mobile computing devices A stack assembly for use with a mobile computing device. In one embodiment, the stack assembly includes an electrical contact layer, and actuation member layer, and an illumination layer. The electrical contact layer includes a plurality of contact elements. The actuation member layer includes a plurality of actuation members are, wherein each actuation member is aligned so that an axial movement of that member causes a corresponding one of the plurality of contact elements to actuate. The illumination layer is configured to emit light to the keypad.
US09142367B2	Electronic device and power button module thereof A power button module includes a pressing member, a printed circuited board, a supporting member and a bottom cover. The supporting member defines a receiving hole therein and includes a mounting portion. The mounting portion includes a base body, a mounting section and a plurality of resilient arms interconnecting the base body and the mounting section, the pressing member is partially received in the receiving hole and fixed to the mounting section, the printed circuit board partially extends through the mounting section and connects with the pressing member. The printed circuit board comprises a contacting portion away from the pressing member. The bottom cover is fixed to the supporting member and receives the mounting portion. The bottom cover comprises an electrical connecting portion spaced from the contacting portion. The present invention further discloses an electronic device using the power button module.
US09142359B2	Electrode material for aluminum electrolytic capacitor and process for producing the electrode material The present invention provides an electrode material for use in an aluminum electrolytic capacitor that does not necessitate an etching treatment. Specifically, the present invention provides an electrode material for use in an aluminum electrolytic capacitor, the electrode material comprising a sintered body of at least one of aluminum and an aluminum alloy.
US09142357B2	Separator for electric storage device and electric storage device The object of an exemplary embodiment of the invention is to provide a separator for an electric storage device which has small heat shrinkage in a high-temperature environment, and in which the increase of the battery temperature can be suppressed. An exemplary embodiment of the invention is a separator for an electric storage device, which comprises a cellulose derivative represented by a prescribed formula. The separator for an electric storage device can be obtained, for example, by treating a cellulose separator containing cellulose with a halogen-containing carboxylic acid or a halogen-containing alcohol.
US09142356B2	Method of manufacturing solid electrolytic capacitor Provided is a method of manufacturing a solid electrolytic capacitor including a capacitor element, the capacitor element having an anode body with a dielectric coating film formed on a surface thereof and a solid electrolyte made of a conductive polymer. The method includes the steps of: forming the capacitor element having the anode body with the dielectric coating film formed on the surface thereof; preparing a polymerization liquid A containing one of a monomer as a precursor of the conductive polymer and an oxidant, and a silane compound; preparing a polymerization liquid B by adding the other of the monomer and the oxidant that is not contained in polymerization liquid A, to polymerization liquid A; and performing polymerization after impregnating the capacitor element with polymerization liquid B.
US09142355B2	Capacitors adapted for acoustic resonance cancellation An embodiment of the present invention provides a method, comprising reducing the losses due to electro-mechanical coupling and improving Q in a multilayered capacitor by placing a first capacitor layer adjacent at least one additional capacitor layer and sharing a common electrode in between the two such that the acoustic vibration of the first layer is coupled to an anti-phase acoustic vibration of the at least one additional layer.
US09142351B2	Electronic component and mounting structure for the electronic component A first terminal electrode extends from a second principal surface onto first and second side surfaces and a first end surface such as not to reach a first principal surface. A second terminal electrode extends from the second principal surface onto the first and second side surfaces and a second end surface such as not to reach the first principal surface. A third terminal electrode extends from the second principal surface onto the first and second side surfaces such as not to reach the first principal surface.
US09142341B2	Method of manufacturing hexagonal ferrite magnetic powder and its usage An aspect of the present invention relates to a method of manufacturing hexagonal ferrite magnetic powder, which comprises preparing a melt by melting a starting material mixture comprising a hexagonal ferrite-forming component and a glass-forming component and rapidly cooling the melt to obtain a solidified product, heating the solidified product to precipitate hexagonal ferrite magnetic particles and glass components in the solidified product, subjecting the solidified product to an acid treatment following the heating to remove the glass components by dissolution, incorporating the hexagonal ferrite magnetic particles obtained following the acid treatment into an acidic aqueous solution, followed by separating the particles dispersed in the aqueous solution and the precipitated particles, and subjecting the precipitated particles to a cleaning treatment and then collecting the particles.
US09142334B2	Foamed electrical wire and a method of producing the same A foamed electrical wire, containing: a conductor; and a foamed insulating layer; in which the foamed insulating layer comprises a thermoplastic resin that is a crystalline thermoplastic resin having a melting point of 150° C. or more or a non-crystalline thermoplastic resin having a glass transition temperature of 150° C. or more, and the average bubble diameter of the foamed insulating layer is 5 μm or less.
US09142330B2	Conductive polymer materials and preparing method and uses thereof A conductive polymer material and preparing method and uses thereof are provided. The conductive polymer material comprises conductive polymer and fluorinated graphene doping thereof. The weight ratio of the conductive polymer to the fluorinated graphene is 1:0.05-1. The conductive polymer is one of polythiophene or its derivatives, polypyrrole or its derivatives, and polyaniline or its derivatives. The cycle stability of the conductive polymer material is greatly enhanced for doping of the fluorinated graphene, and the conductive polymer contributes to the good capacitance properties. The preparing method can be operated simply with cheaper cost and lower request for equipments, and is suitable for industrial production.
US09142328B2	Molecule for functionalizing a support, attachment of a radionuclide to the support and radionuclide generator for preparing the radionuclide, and preparation process Molecule for attaching a radioactive parent nuclide to a support, comprising at least one functional group for attaching the radioactive parent nuclide; and a molecular moiety suitable for establishing a nonpolar bond to the support.
US09142325B2	Semiconductor memory device for performing repair operation A semiconductor memory device includes: a memory cell array region having a plurality of normal cell lines and a plurality of repair cell lines; a plurality of normal cell line selection units suitable for selecting the plurality of normal cell lines, respectively, in response to a local address; a plurality of repair cell line selection units suitable for selecting the plurality of repair cell lines, respectively, in place of normal cell line selection units corresponding to fail information of the local address; a fuse driving unit comprising a fuse array in which the fail information is programmed, suitable for disabling the normal cell line selection units corresponding to the fail information, and enabling normal cell line selection units unrelated to the fail information; and an address determination unit suitable for controlling the plurality of repair cell line selection units based on the fail information.
US09142320B2	Memory element and signal processing circuit An object is to provide a memory device for which a complex manufacturing process is not necessary and whose power consumption can be suppressed, and a signal processing circuit including the memory device. In a memory element including a phase-inversion element such as an inverter or a clocked inverter, a capacitor which holds data and a switching element which controls storing and releasing of electric charge in the capacitor are provided. For the above switching element, a transistor including amorphous silicon, polysilicon, microcrystalline silicon, or a compound semiconductor such as an oxide semiconductor in a channel formation region is used. The channel length of the transistor is ten times or more as large as the minimum feature size or greater than or equal to 1 μm. The above memory element is used for a memory device such as a register or a cache memory in the signal processing circuit.
US09142317B2	Embedded memory device and memory controller including the same An embedded memory device includes a mask ROM including a plurality of mask ROM cells and an address decoder configured to decode an address of the plurality of mask ROM cells; and an e-fuse memory configured to replace a part of data stored in the mask ROM with replacement data, the e-fuse memory including, a plurality of e-fuse memory cells configured to store the replacement data, and an e-fuse address selector configured to decode an address of the plurality of e-fuse memory cells and to selectively cause data of one or more of the plurality of e-fuse memory cells to be output based on the decoding result.
US09142316B2	Embedded selector-less one-time programmable non-volatile memory An OTP anti-fuse memory array without additional selectors and a manufacturing method are provided. Embodiments include forming wells of a first polarity in a substrate, forming a bitline of the first polarity in each well, and forming plural metal gates across each bitline, wherein no source/drain regions are formed between the metal gates.
US09142312B1	Adapting read reference voltage in flash memory device In one embodiment, a method comprises determining an adaptation for a reference voltage used in a flash memory device as a function of a first count of items read from the flash memory device and a second count of items read from the flash memory device; and shifting the reference voltage at least in part by the adaptation.
US09142311B2	Screening for reference cells in a memory Selecting an array from among a plurality of arrays in a memory as a reference array. An exemplary method includes evaluating memory cells within the reference array to select a first reference cell associated with a first operation of the memory, and repeating the evaluating and the selecting to select a second reference cell from within the reference array, the second reference cell being associated with a second operation of the memory.
US09142309B2	Generation of a composite read based on neighboring data A victim group of one or more cells is read using a first read threshold to obtain a first raw read which includes one or more values. The victim group of cells is read using a second read threshold to obtain a second raw read which includes one or more values. A neighboring read, corresponding to a neighboring group of one or more cells associated with the victim group of cells, is obtained. A composite read is generated, including by selecting from at least the first raw read and the second raw read based at least in part on the neighboring read.
US09142307B2	Non-volatile semiconductor memory device A non-volatile semiconductor memory device includes a memory cell configured to allow electrical writing and erasing, a bit line configured to transmit a potential corresponding to data stored in the memory cell in a column direction, a sense amplifier circuit configured to detect a potential of the bit line, and a bit line coupling circuit coupled between the bit line and the sense amplifier circuit. The bit line coupling circuit includes a first bit line coupling transistor in an outer layout area of the bit line coupling circuit and a second bit line coupling transistor in an inner layout area of the bit line coupling circuit. The first bit line coupling transistor has a longer distance in a channel length direction or in a channel width direction between an impurity diffused layer coupled to the bit line and an element isolation area than the second bit line coupling transistor.
US09142303B2	Flash multiple-pass write with accurate first-pass write An instruction to write to a location in the Flash memory is received. It is determining if the Flash memory exposes a level placement setting associated with defining what voltage range corresponds to what level. In the event it is determined that the Flash memory exposes a level placement setting, an accurate coarse write is performed on the location, including by configuring the level placement setting to be a first value, and after the accurate coarse write is performed on the location, a fine write is performed on the location, including by configuring the level placement setting to be a second value, in response to receiving the instruction.
US09142302B2	Efficient smart verify method for programming 3D non-volatile memory In a programming operation of a 3D stacked non-volatile memory device, an initial set of memory cells on a selected word line layer, involving fewer than all memory cells on a selected word line layer, are programmed first as a test case to determine optimal conditions for programming the remaining memory cells on the selected word line layer. For example, a number of program-verify iterations or loops which are needed to program the initial set of memory cells an initial amount is determined. This loop count is then stored, e.g., within the initial set of memory cells, within the remaining memory cells, within memory cells on a remaining word line layer, or in a data register, and programming of the initial set of memory cells continues to completion. Subsequently, the loop count is retrieved and used to determine an optimal starting program voltage for programming the remaining memory cells.
US09142297B2	Nonvolatile memory device and method of driving the same A nonvolatile memory device includes a plurality of memory blocks, and a pass transistor array transmitting a plurality of drive signals to a selected memory block among the plurality of memory blocks in response to a block select signal. The pass transistor array includes high voltage transistors including one common drain and two sources formed in one active region and one of the plurality of drive signals transmitted to the common drain is transmitted to different memory blocks through the two sources.
US09142284B2	Concurrent use of SRAM cells with both NMOS and PMOS pass gates in a memory system A memory system includes first memory cells and second memory cells. Each of the first memory cells includes first and second pass gates including NMOS transistors. Each of the second memory cells include first and second pass gates including PMOS transistors. The first memory cells are pre-charged by one polarity of a voltage supply. The second memory cells are pre-charged by an opposite polarity of the voltage supply.
US09142283B2	Circuit for small swing data line and method of operating the same A circuit includes a first buffer configured to provide data on a signal line. The first buffer may be powered by a first power supply voltage. The circuit further includes a tri-state buffer coupled to receive the data provided on the signal line. The tri-state buffer may be powered by a second power supply voltage that has a magnitude greater than that of the first power supply voltage. During operation, the tri-state buffer may be activated for a predetermined period of time during which data is made available on the signal line.
US09142281B1	Method and apparatus for calibrating write timing in a memory system A system that calibrates timing relationships between signals involved in performing write operations is described. This system includes a memory controller which is coupled to a set of memory chips, wherein each memory chip includes a phase detector configured to calibrate a phase relationship between a data-strobe signal and a clock signal received at the memory chip from the memory controller during a write operation. Furthermore, the memory controller is configured to perform one or more write-read-validate operations to calibrate a clock-cycle relationship between the data-strobe signal and the clock signal, wherein the write-read-validate operations involve varying a delay on the data-strobe signal relative to the clock signal by a multiple of a clock period.
US09142280B1	Circuit for configuring external memory A circuit for configuring an external memory includes a memory controller, a register, an OR gate, first and second input/output (IO) pads, and pull-up and pull-down resistors. When the circuit is in a high power mode, the memory controller refreshes the external memory by providing reset and clock enable signals to the external memory by way of the first and second IO pads. When the circuit is in a low power mode, the pull-up and pull-down resistors configure the external memory in a self-refresh mode. When the circuit exits the low power mode, the first and second IO pads are powered on. The OR gate receives and provides a control signal output by the register to the external memory by way of the first IO pad, which keeps the external memory in the self-refresh mode.
US09142277B2	Semiconductor memory device having discriminary read and write operations according to temperature A semiconductor memory device is provided which includes a memory cell array including magnetic memory cells arranged in a matrix form of rows and columns and connected with bit lines and a source line; and a temperature sensing unit configured to generate a temperature sensing signal by sensing a temperature of the memory cell array. A memory controller, constituting a memory system together with the semiconductor memory device, may control read and write operations of the semiconductor memory device differently according to the temperature sensing signal of the temperature sensing unit.
US09142274B2	Tracking for write operations of memory devices Some aspects of the present disclosure relate to write tracking techniques for memory devices. In some embodiments, a memory device includes an array of SRAM cells, wherein each SRAM cell includes a pair of cross-coupled inverters having complimentary storage nodes, and a pair of access transistors that allow selective access to the complimentary storage nodes, respectively. To help ensure that wordline and bitline pulses are of sufficient length and intensity, one or more write tracking cells track a wordline tracking signal, which is representative of a wordline pulse applied to a wordline. In response to the wordline tracking signal, the write tracking cell internally generates a signal that models bitline loading, and provides an output tracking signal based on the wordline tracking and bitline loading signals. Bitline and/or wordline pulses can then be set based on the output tracking signal.
US09142273B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes a memory cell array including memory cells, word lines connected to the memory cell array to select rows of the memory cell array, first bit lines connected to the memory cell array to select columns of the memory cell array, a replica cell array including replica cells respectively connected to the word lines, and storing information on characteristics of the rows of the memory cell array, and a second bit line connected to the replica cells. An operation is changed for each row of the memory cell array based on the information in the replica cells.
US09142271B1	Reference architecture in a cross-point memory The present disclosure relates to reference and sense architecture in a cross-point memory. An apparatus may include a memory controller configured to select a target memory cell for a memory access operation. The memory controller includes word line (WL) switch circuitry configured to select a global WL (GWL) and a local WL (LWL) associated with the target memory cell; bit line (BL) switch circuitry configured to select a global BL (GBL) and a local BL (LBL) associated with the target memory cell; and sense circuitry including a first sense circuitry capacitance and a second sense circuitry capacitance, the sense circuitry configured to precharge the selected GWL, the LWL and the first sense circuitry capacitance to a WL bias voltage WLVDM, produce a reference voltage (VREF) utilizing charge on the selected GWL and charge on the first sense circuitry capacitance and determine a state of the target memory cell based, at least in part, on VREF and a detected memory cell voltage VLWL.
US09142270B2	Pipelining in a memory A system including a memory cell array including a plurality of memory cells, and a writing device to generate multiple back-to-back write pulses to write to target memory cells from among the plurality of memory cells, the multiple back-to-back write pulses overlapping during an overlap duration, the overlap duration being adjustable based on a performance parameter of the memory cell array.
US09142269B2	Data mask encoding in data bit inversion scheme Devices, circuits, and methods for data mask and data bit inversion encoding and decoding for a memory circuit. According to these methods and circuits, the number of data lines/pins required to encode data mask information and data bit inversion information can be reduced. In an embodiment the data mask and data inversion functions for a portion of data, such as a data word, can be merged onto a common pin/data line. In other embodiments, a data mask instruction can be conveyed through a transmitted data word itself without using any extra pins. According to these embodiments, the pin overhead can be reduced from two pins per byte to one pin per byte.
US09142265B2	Semiconductor memory device A semiconductor memory device includes a sense amplifier circuit region including first wells disposed in a first direction, a driving circuit region including second wells disposed in a second direction, and a conjunction region disposed at an intersection region of the sense amplifier circuit region and the driving circuit region, a part of each of the first wells extending from the sense amplifier circuit region into the conjunction region, and the second wells being outside of the conjunction region.
US09142258B2	Information storage medium storing a plurality of titles, reproducing apparatus and method thereof An information storage medium on which a plurality of titles are recorded, and a reproducing apparatus and method thereof. The information storage medium includes a plurality of titles which are reproduced as motion pictures and a plurality of units of attribute information that correspond to the titles and indicate whether a user can control a title to be reproduced. Therefore, efficient navigation can be ensured and the titles can be reproduced as a manufacturer of the information storage medium has planned.
US09142257B2	Broadcast management system A broadcast management system creates, manages, and streams a broadcast of an event from videos captured from multiple cameras. A video capture system comprising multiple cameras captures videos of the event and transmits the videos to a broadcast management server. The broadcast management server generates a website or other graphical interface that simultaneously displays the captured videos in a time-synchronized manner. A broadcast manager user creates a broadcast by selecting which video to output to the broadcast at any given time. A broadcast map is stored for each broadcast that includes all of the broadcast decisions made by the broadcast manager user such that the broadcast can be recreated at a later time by applying the broadcast map to the raw videos. Using a viewer client, viewers can browse or search for broadcasts and select a broadcast for viewing.
US09142253B2	Associating keywords to media A computer-implemented method includes displaying, within a user interface in a digital media system, a media pane and a tools pane, displaying, within the media pane, a thumbnail group representing a media item, the thumbnail group including one or more thumbnails, displaying, within the tools pane, a tool configured to assign a keyword, enabling a user to select a segment of the media item, and enabling a user to assign a keyword to the selected segment by activating the tool.
US09142246B1	Apparatus and methods to reduce hard disk drive manufacturing test time An apparatus includes a plurality of magnetic read/write heads, a system controller and a switching network. Each of the magnetic read/write heads includes a read sensor element configured to perform a read operation and a write element configured to perform a write operation. The switching network is coupled between the plurality of magnetic read/write heads and the controller. Further, the switching network is configured to substantially simultaneously select elements from at least two of the plurality of magnetic read/write heads in response to a command from the controller such that the operations of the selected elements are performed substantially simultaneously to establish a manufacturing parameter of a disk drive.
US09142243B2	Optical pickup and optical information storage system including the same Provided are an optical pickup and an optical information storage system including the same. The optical pickup includes a photodetector that receives a main light beam and a plurality of sub-light beams reflected from an information storage medium and diffracted by a diffracting element. The photo detector detects a tracking error signal using zeroth-order light as the main light beam and using one of first-order light and third-order light as the sub-light beam based on a type of an optical information storage medium.
US09142242B1	Remotely controlling appliances based on lighting patterns Disclosed is a method and apparatus for attaining control a device in a home automation network. The disclosed method may include establishing, by a processor, communication with an appliance controller. A list of appliances controlled by the appliance controller may be requested. The processor may receive the list of appliances from the appliance controller. A control request may be sent to the appliance controller. A series of images may be collected of the lighting patterns generated by a first appliance in the list of appliances in the field of view of the camera. A specific light pattern collected from the series of images may be correlated with the first appliance.
US09142241B2	Perpendicular magnetic recording medium and method of manufacturing the same A perpendicular magnetic recording medium comprises a magnetic recording layer that records a signal, an underlayer formed of Ru or Ru compound below the magnetic recording layer, a non-magnetic layer formed of a non-magnetic material below the underlayer to control crystal orientation of the underlayer, a soft magnetic layer provided below the non-magnetic layer, and a substrate on which the magnetic recording layer, the underlayer, the non-magnetic layer, and the soft magnetic layer are formed. The non-magnetic layer comprises a first non-magnetic layer formed above the soft magnetic layer and a second non-magnetic layer formed above the first non-magnetic layer. The first non-magnetic layer is formed of amorphous Ni compound while the second non-magnetic layer is formed of crystalline Ni or crystalline Ni compound.
US09142239B2	Patterned magnetic storage medium According to one embodiment, a patterned magnetic storage medium is disclosed herein. The magnetic storage medium includes a magnetic domain, a substantially non-magnetic region laterally adjacent to the magnetic domain, and an exchange spring structure disposed between the magnetic domain and the laterally adjacent non-magnetic region wherein the exchange spring structure comprises implanted ions.
US09142238B2	Vertical magnetic recording disk manufacturing method and vertical magnetic recording disk In a method of manufacturing a magnetic disk including at least a magnetic recording layer on a substrate 1 and used for vertical magnetic recording, in a step of forming, on the substrate 1, the magnetic recording layer composed of a ferromagnetic layer 5 having a granular structure and an exchange energy control layer 7 constituted by a laminated layer formed on the ferromagnetic layer 5, at least the exchange energy control layer 7 is formed through sputtering in an atmosphere of a rare gas having a greater mass than an argon gas. The rare gas having a greater mass than the argon gas is a krypton (Kr) gas, for example. The exchange energy control layer 7 is a laminated layer composed of a first layer containing Co or a Co-alloy and a second layer containing palladium (Pd) or platinum (Pt), for example.
US09142237B1	Slider of a disk drive having data favorable load/unload attitude A disk drive includes a drive housing, a storage disk, a head suspension assembly, an actuator assembly and a controller. The storage disk has a disk surface including a data region that stores data. In one embodiment, the head suspension assembly includes a slider and an attitude adjuster. The slider has an inner side edge, an outer side edge and a data transducer. The attitude adjuster can adjust a roll attitude and/or a pitch attitude of the slider relative to the disk surface. The slider moves between a first position wherein the data transducer is not positioned directly over the data region and a second position wherein the data transducer is positioned directly over the data region during one of a load operation and an unload operation. The controller controls an electrical signal to the attitude adjuster during one of the load operation and the unload operation to dynamically adjust the attitude of the slider. The attitude adjuster can include one or more piezoelectric elements that expand and/or contract to adjust the orientation of the slider relative to the storage disk.
US09142235B1	Disk drive characterizing microactuator by injecting sinusoidal disturbance and evaluating feed-forward compensation values A disk drive is disclosed comprising a disk having a plurality of tracks, a head, and a voice coil motor (VCM) and a microactuator for actuating the head over the disk in response to a feed-forward compensation value. A sinusoidal disturbance is applied to the microactuator, and the resulting feed-forward compensation value is processed to characterize the microactuator.
US09142234B1	Disk drive employing model-based feed-forward compensation during seek settling A method of operating a disk drive is disclosed, the disk drive comprising a disk comprising a plurality of tracks, and a closed loop servo system comprising a seek servo loop and a settle servo loop for actuating the head over the disk, the settle servo loop comprising a feed-forward compensator. The seek servo loop seeks the head toward a target track, and when the head approaches the target track a state trajectory of the feed-forward compensator is initialized with an initial value in response to a measured state of the servo system. The settle servo loop then settles the head on the target track in response to a feed-forward compensation generated by the feed-forward compensator.
US09142216B1	Systems and methods for organizing and analyzing audio content derived from media files Systems for receiving, analyzing, and organizing audio content contained within a plurality of media files are disclosed. The systems generally include a server that is configured to receive, index, and store a plurality of media files, which are received by the server from a plurality of sources, within at least one database in communication with the server. The server is further configured to organize audio content included within each of the plurality of media files into a bipartite graph, wherein the bipartite graph will include vertices that are correlated with a specific media file or an individual who is associated with a specific media file. These vertices will comprise edges that are labeled with a word that is detected from within the audio content of the media file.
US09142215B2	Power-efficient voice activation A voice activation system is provided. The voice activation system includes a first stage configured to output a first activation signal if at least one energy characteristic of a received audio signal satisfies at least one threshold and a second stage configured to transition from a first state to a second state in response to the first activation signal and, when in the second state, to output a second activation signal if at least a portion of a profile of the audio signal substantially matches at least one predetermined profile.
US09142213B2	Generating vocal user interface code from a data meta-model A method, computer program and system for generating code of the vocal interface of a software application by reading the persistent data of an application designed by a data meta model using a design language such as UML (Unified Modeling Language) defining a hierarchical organization of classes, their attributes and the relations between classes.Similarly to the wizard for graphical user interface the vocal interface code comprises dialog unit code, which is Forms when VoiceXML language is used, to allow at execution time, entry of data for the application in a guided way.
US09142205B2	Leakage-modeling adaptive noise canceling for earspeakers A personal audio device, such as a headphone, includes an adaptive noise canceling (ANC) circuit that adaptively generates an anti-noise signal from a reference microphone signal that measures the ambient audio, and the anti-noise signal is combined with source audio to provide an output for a speaker. The anti-noise signal causes cancellation of ambient audio sounds that appear at the reference microphone. A processing circuit uses the reference microphone to generate the anti-noise signal, which can be generated by an adaptive filter. The processing circuit also models an acoustic leakage path from the transducer to the reference microphone and removes elements of the source audio appearing at the reference microphone signal due to the acoustic output of the speaker. Another adaptive filter can be used to model the acoustic leakage path.
US09142203B2	Music data generation based on text-format chord chart Individual chords and bar lines are extracted from an acquired chord chart described in text. Further, musical time information indicative of a musical time of music data to be generated is acquired, chord progression information is generated by allocating in-bar relative time positions to the extracted individual chords in accordance with the musical time indicated by the acquired musical time information and the extracted bar lines. A chord chart display can be provided based on the generated chord progression information. Further, accompaniment pattern data is acquired, and automatic accompaniment data can be generated by controlling the acquired accompaniment pattern data in accordance with the generated chord progression information.
US09142200B2	Wind synthesizer controller There is provided a wind synthesizer controller playable by the same manipulation as that of a customary musical instrument as well as able to obtain accurate scale information and volume information. The wind synthesizer controller includes a microphone, an expiration intensity measuring unit, and a controller. The microphone detects a sound generated by flowed in expiration. The expiration intensity measuring unit measures intensity of the expiration on the basis of a detected sound signal. The controller generates volume information on the basis of the measured expiration intensity. The volume information at least includes note on, note off, and velocity.
US09142198B2	Silencer A silencer includes: a hollow main body to be inserted in a bell of a wind instrument and including (a) a rear end portion serving as an opening portion and (b) a front end portion serving as a closing portion; and a flow-path adjuster supported by the main body in the bell and configured to narrow a path through which a breath of a player of the wind instrument is delivered into the main body. The front end portion of the main body is located near a frontmost portion of the bell or at a rear of the frontmost portion in a state in which the main body in mounted in the bell.
US09142197B2	Vibrato block The Vibrato Block securely attaches a vibrato device to a guitar without permanent physical modifications to the guitar and provides clearance for the guitar's tailpiece mounting holes for utilization by other guitar accessories. The Vibrato Block consists of a body having a curved guitar contact surface with an attached non-marring, high-friction pad and a mounting plate contact surface corresponding to the vibrato devices mounting plate surface. The Vibrato Block is formed with an internal slot and a plurality of mounting holes. The thickness of the Vibrato Block and adjustability provided by the internal slot enables optimal placement of the vibrato device and unobstructed tailpiece mounting holes. The vibrato device is mounted to the Vibrato Block whereas the Vibrato Block is mounted to the guitar using only the guitar's rear strap button screw mounting point and a fastener, thereby avoiding any physical modifications to the guitar.
US09142193B2	Linear progression based window management Some embodiments implement a linear switching application that provides functionality for switching between different windows based on an x-axis ordering of the windows instead of the z-axis or other ordering of prior art. The linear switching application identifies an array of currently open windows and sorts the array based on the leftmost x-coordinate position of the windows in the array. Optionally, the linear switching application modifies the GUI to display window identifiers based on the leftmost x-coordinate position of each window to orient the user to the x-coordinate position of each of the windows on-screen. The application determines an index in the current x-sorted array for the window that is currently frontmost and changes the frontmost window based on the current frontmost window and a directional input provided by the user.
US09142191B2	Power supplying apparatus and display apparatus including the same A power supplying apparatus is disclosed, in which an under voltage lock out function is not performed for instantaneous voltage dip even in case that a reference under voltage detection voltage is set at high level. The power supplying apparatus comprises an under voltage detector generating an under voltage lock out signal by detecting voltage dip of an input power and performing an under voltage protection function, wherein the under voltage detector delays the input power for a delay time, which is set, to generate the under voltage lock out signal.
US09142189B2	Backlight unit and display device including the same A backlight unit includes a power supply converter including a primary winding connected to an input power supply voltage, and a secondary winding which is connected to an output node and outputs a light emitting diode drive voltage to the output node in response to a mode signal and a switching control signal; and a light emitting diode string connected to the output node of the power supply converter, where the power supply converter serially connects a boosting winding to the secondary winding and the output node and when the mode signal represents a three dimensional image display mode, and outputs a boosted light emitting diode drive voltage to the output node through the boosting winding.
US09142188B2	Methods and apparatus for reducing flickering and motion blur in a display device A method including selecting a luminance setting for at least a portion of a display from a plurality of luminance settings; controlling the insertion of blank fields with respect to frames of data displayed on the display for the selected luminance setting at a duty ratio, at least some of the luminance settings having an associated range of duty ratios for reducing flicker and/or blur perceived by a user.
US09142187B2	Semiconductor device, image processing system, and program A semiconductor device includes an adjustment data generation unit receiving at least a part of adjustment values of color attributes of each of n-axis vertices (n is an integer not less than 3), the n axes serving as an adjustment axis in a RGB color space. The adjustment data generation unit calculates the degree of influence which indicates the following index of each of the n-axis vertices based on the distance between each of the n-axis vertices and a target point which is an arbitrary lattice point in the RGB color space. The adjustment data generation unit calculates adjusted coordinates of the target point in the RGB color space based on shifting of each of the n-axis vertices in the RGB color space according to the adjustment value and the degree of influence. The image adjustment unit performs color adjustment of inputted image data.
US09142174B2	Method of driving a display panel and a display apparatus for performing the method A method of driving a display panel includes providing at least one gate line among a plurality of gate lines disposed in the display panel with a gate signal of a gate-on level during a vertical blanking period of a frame period and providing a data line disposed in the display panel with data voltages of a first polarity and a second polarity opposite to the first polarity during the vertical blanking period.
US09142171B2	Display device and method of driving thereof A display is disclosed. The display includes electrodes in an edge region of the panels to which AC voltages are applied to reduce the effects of ionic particles.
US09142170B2	Liquid crystal display device including an opening in a color filter The present application discloses a liquid crystal display device for displaying a video on a display surface with pixels arranged in a matrix. Each of the pixels has three sub-pixels formed with different color filter portions in hue. The display surface includes pixel sets. Each of the pixel sets is defined to include two or three of the pixels next to each other in at least one of the vertical and horizontal directions. An opening is formed on one of the color filter portions every hue in each of the pixel sets.
US09142168B2	Method and apparatus for driving a display device The present invention discloses a driving device of a display device. The driving device comprises a gamma voltage generator, for generating a gamma voltage according to a control signal to a source driver of the display device, and a logic unit, for generating the control signal to the gamma voltage generator according to a difference among image properties of a plurality of frames to be displayed, to adjust the gamma voltage.
US09142167B2	Thin-film transitor backplane for displays An electro-optical element may be controlled by a circuit. The circuit may include two transistors having a control capacitor coupled to the common node of the two transistors. The control capacitor may be charged to a value through the selection transistor during the row selection period. The amount of the charge stored in the control capacitor may be used by the charge transistor to properly charge the display capacitance to the intended value after the row selection period and an electric field created from the charge of the display capacitance used to control the electro-optical element.
US09142160B2	Display apparatus An exemplary embodiment of the present invention is a display apparatus. In the display apparatus, each row has as many row selection lines as the number of colors of light emitting elements, and row selection signals are supplied via the row selection lines such that a first row selection signal and a second row selection signals are supplied to driving circuits of light emitting elements of each color in first and second periods alternately and a plurality of times at different intervals in each frame. In the first period, light-emission or no-light-emission data signals are supplied over data lines. In the second period, only no-light-emission data signals are supplied. One of the first and second row selection signals is supplied with the same timing for all colors, while the other one of the row selection signals is supplied with timing different among the colors.
US09142157B2	Methods for enhancing longevity in electronic device displays An electronic device may contain components such as a processor, video circuitry, camera flash, communications circuitry, and other components that may generate heat during operation. The device may have a display with a backlight unit that contains light-emitting diodes. Control circuitry within the electronic device can apply drive powers to the light-emitting diodes in a way that is sensitive to the operating temperature of the light-emitting diodes. The control circuitry can determine whether the temperature of the light-emitting diodes is elevated by determining which components are active in the device. Activity levels can be ascertained by gathering status information on each component. Temperature sensors may be used to make real time temperature measurements. Based on factors such as component activity levels and measured temperature values, the control circuitry can adjust the maximum allowed light-emitting diode drive power level to avoid overdriving the diodes during operation at elevated temperatures.
US09142154B2	Electrophoretic display system An electrophoretic display system includes an electrophoretic display panel, a timing controller, a data driver, and a gate driver. The data driver includes a first serial-to-parallel converter and a data converter. The first serial-to-parallel converter receives a plurality of first series data and converts the first series data into a plurality of second series data. The quantity of the second series data is more than the quantity of the first series data. The data converter receives the second series data and is electrically connected to the electrophoretic display panel. Besides, the data converter converts the second series data into display voltages, and the quantity of the display voltages is more than the quantity of the second series data. The gate driver is electrically connected to the electrophoretic display panel and the timing controller and controlled by the timing controller to provide gate driving voltages to the electrophoretic display panel.
US09142145B2	Medical training systems and methods Simulation systems and methods may enable virtual imaging. A data processing unit may receive data from a calibration unit indicating a position and/or orientation of a position and orientation sensor relative to a physical model. The data processing unit may also receive data from the position and orientation sensor indicating a position and/or orientation of the physical model. The data processing unit may generate a virtual image using the data from the position and orientation sensor and the data from the calibration unit. The data processing unit may render the virtual image to a display.
US09142144B2	Hemorrhage control simulator A simulator trains for hemorrhage control using hemostatic agents, tourniquets, and/or other hemorrhage control techniques in a simulator that works with a wide variety of existing human surrogates. The simulator merges a live video feed of the surrogate and trainee's hands (or objects interacting with the surrogate) with a computer-generated visual representation of the wound and hemorrhaging blood to provide an immersive display experience to the trainee without requiring different surrogates for different simulated wounds. The trainee may wear pulse-generating glove(s) that simulate the patient's pulse where the trainee's finger tip contacts the surrogate. A sensorized substrate (e.g., load sensors, haptic output generators) may automatically be moved between the trainee and the surrogate to sense interaction with the surrogate and provide haptic feedback. The substrate may replace the surrogate altogether. The simulator may alternatively simulate events and objects other than wounds and humans.
US09142142B2	In-car driver tracking device Disclosed are a device and method for providing driver tracking and behavior analysis, initiated without concurrent user input, by the presence detection of one or more drivers of the vehicle. Vehicle motion inferred from a location aware device sensor, as well as other driver smartphone sensors and application use are logged and analyzed to determine risk factors associated with identified drivers. Internet data sources are further utilized for associating road conditions and traffic regulations with the logged locations of the vehicle. Logged and analyzed data from the identified drivers is aggregated for reporting on vehicle risk.
US09142141B2	Determining exercise routes based on device determined information A device includes at least one computer readable storage medium bearing instructions executable by a processor and at least one processor configured for accessing the computer readable storage medium to execute the instructions. The instructions configure the processor for accessing terrain information representing preferred terrain of a user of the device, accessing map information, accessing location information indicating current location of the user, and receiving user input indicating a desire for route information. Based at least in part on time constraints indicated from calendar information, the instructions configure the processor for accessing the location information, terrain information, and map information to determine a route and audibly and/or visually displaying the route on the device.
US09142139B2	Stimulating learning through exercise An exercise system stimulates the learning and memory of a user by detecting a stress level of the user with one or more biometric sensor devices, determining that the user's stress level is within a stress zone that is suitable for memory retention by the user, and presenting educational content to the user at one or more output devices.
US09142135B2	Method and device for automatically determining an optimized approach and/or descent profile A method and device for automatically determining an optimized approach and/or descent profile for an aircraft are provided. The device comprises means for optimizing an approach and/or descent profile of an aircraft avoiding long and steep geometric segments, the device to this end inserting an idle segment, if it satisfies the restrictions, in the profile relating to the descent phase and/or to the approach phase, wherein said idle segment can be followed by a geometric segment.
US09142134B2	System and method for providing predictive departure and arrival rates for an airport A system and method for determining estimated departure and arrival rates. The system and method including receiving predicted airport constraint information for a predetermined time period, querying historical airport data to determine historical time periods having similar constraint information and determining an estimated arrival rate and an estimated departure rate for the predetermined time period based on corresponding arrival rates and departure rates for the historical time periods having similar constraint information.
US09142131B2	Vehicle driving support apparatus A braking/driving force control unit determines whether or not the driver has a intention of lane change on the basis of the detected road shape and the steering amount. The braking/driving force control unit detects an obstacle which is an obstacle present rearward and sideward of the vehicle. The braking/driving force control unit determines whether approach prevention control for preventing an the vehicle from approaching to the obstacle should start, when it is determined that the driver has the intention of lane change and the obstacle is detected, and performs the approach prevention control for supporting prevention of the vehicle from approaching to the obstacle when it is determined that the control should start. At this time, the braking/driving force control unit determines detection accuracy of the road shape ahead of the vehicle and suppresses the determination of the start of the control when the detection accuracy is low.
US09142130B1	Light emitting road safety device with sound activation An embodiment of the present invention includes a light emitting road boundary marking for activation upon road departure. The marker includes a photovoltaic cell unit mounted in a housing and having a photovoltaic cell plate and a battery. Further, a light emitting unit is mounted with the housing, and the light emitting unit has a light to be turned on and off based on electricity supplied from the photovoltaic cell unit and conditions of a control unit. The control unit includes a microphone to detect a soundwave generated by a wheel traveling over a rumble strip, a comparing circuit to substantially match the detected soundwave with a pre-programmed soundwave pattern, and a driver unit to activate the light emitting unit when the detected soundwave substantially matches the pre-programmed soundwave. Other embodiments may include a microprocessor, a transmitter and a receiver unit for relaying an activation signal to adjacent markers, a lamp flashing circuit, and switching circuits for roadway illumination lamps.
US09142128B2	Accident alert system for preventing secondary collision The present disclosure provides an accident alert system for preventing secondary collisions. The system for preventing a secondary accident comprises a terminal configured to have a global positioning system (GPS) navigation capability, monitor and display a driving state and an accident state of a vehicle, transmit information on a driving state and the accident state via a communication network, and display information received on a screen; and a server platform configured to exchange information with the terminal, include an algorithm for determining the occurrence of an accident based on the information on the driving state and the accident state received from the terminal and traffic information, and inform other terminals of the occurrence of the accident.
US09142127B1	Systems and methods for traffic guidance nodes and traffic navigating entities A system includes one or more traffic guidance nodes (TGNs) and one or more mobile traffic navigating entities (TNEs). The traffic guidance nodes transmit updated information about the local traffic to the one or more mobile traffic navigating entities when the one or more mobile traffic navigating entities are within a range of the one or more traffic guidance nodes.
US09142125B1	Traffic prediction using precipitation Described herein is a framework to facilitate traffic prediction. In accordance with one aspect, training data including historical traffic information and precipitation data is received. An impulse response function may be determined based on the training data. One or more traffic parameters may be predicted by calculating a weighted linear system model based on the impulse response function.
US09142120B2	Remote control device signal distribution Signals from a remote control device may be received in a first viewing area and retransmitted to a second viewing area to control customer premises equipment (CPE) devices in the second viewing area. In some embodiments, signals are translated for compatibility with the CPE devices in the second viewing area. A repeater in the first viewing area may receive infrared signals encoded with a remote control command and retransmit the remote control command with an RF signal to a receiver in the second viewing area. The repeater may be incorporated into a multimedia processing resource such as a set-top box.
US09142117B2	Systems and methods for storing, analyzing, retrieving and displaying streaming medical data A method of storing streaming physiological information obtained from a medical patient in a multi-patient monitoring environment includes receiving identification information, retrieving parameter descriptors, creating a round-robin database file, receiving a data stream, and using a predetermined data rate to map the data stream to locations in the round-robin database file.
US09142112B2	Smoke detector with external sampling volume using two different wavelengths and ambient light detection for measurement correction In accordance with certain embodiments, a smoke detector determines the presence of smoke particles outside its housing based on measurements of light detected at different wavelengths and corrected based on an ambient light level.
US09142103B2	Mass notification alarm and system with programmable color output A mass notification system including one or more alarms for notification of two or more emergency classes. Each alarm can include a lens, a strobe for illuminating the lens with a first light color during activation of the strobe, and a light source such as a light emitting diode for illuminating the lens with a second light color different from the first light color during activation of the light source. During activation of the lens with the light source, the lens appears to be the color emitted by the light source. The alarm can be configured to notify occupants of a first emergency class by activating only the strobe and to notify occupants of a second emergency class by activating both the strobe and the light source. An alarm configured to provide notification of two or more emergency classes can thus use a single lens and a single strobe.
US09142097B2	Gaming system and method for providing play of local first game and remote second game A gaming system including a central server linked to a plurality of gaming devices. Upon the central server determining that a game transfer event has occurred, the central server selects a game played by a first player at a first gaming device to be displayed to a second player at a second, gaming device in the gaming system. The first player at the first gaming device and the second player at the second gaming device are provided any awards for the outcomes generated in association with the game currently played by the first player at the first gaming device.
US09142095B2	Gaming system, gaming device and method providing accumulation game A gaming system and method enables a player to assign at least one amplifier to at least one accumulator. In one embodiment, the amplifier causes an increase in the rate of advancement for the accumulator. In one embodiment, the gaming system provides the player any awards associated with the level of one or more of the accumulators.
US09142091B2	Gaming system having passive player participation in secondary wagering games A gaming system comprises a wager input device for receiving a primary wager from a player, the player associated with a player account, and at least one display for displaying a primary wagering game and a secondary wagering game. Secondary wagering game outcomes are independent of the primary wagering game. The system further comprises a controller operative to cause the at least one display to display a randomly selected outcome of the primary wagering game; upon the occurrence of a first triggering event, enter a player into the secondary wagering game, wherein the player is represented in the secondary wagering game by a player avatar; upon the occurrence of a second triggering event, end the player?s participation in the secondary wagering game; award the player any awards collected by the player avatar in the secondary wagering game; and credit the player account by the amount of the collected awards.
US09142090B1	Wagering game having a secondary game for modifying a primary game A wagering game having a primary game and a secondary game. In one embodiment, an intermediate game outcome for the primary game is first determined. The intermediate game outcome provides the player with an indication of the probability of receiving a winning primary game outcome. The player may then use this indication for determining whether to play the secondary game. The optional secondary game, if won, modifies the play of the primary game to the advantage of the player. Consequently, the intermediate game outcome is resolved to determine the primary game outcome in accordance with the modified primary game. If the secondary game outcome is lost, the immediate game outcome is resolved to determine the primary game outcome without modifying the primary game.
US09142087B2	Gaming method and apparatus for employing negative outcomes Systems and methods are provided for providing a negative outcome at a gaming device. The system determines that a player of a gaming device has equity which may be debited. An outcome of the gaming device is determined, and it is also determined that the outcome is a negative outcome. The balance (e.g., of the gaming device or another gaming device) is reduced by more than the wager amount.
US09142083B2	Convertible gaming chairs and wagering game systems and machines with a convertible gaming chair Gaming chairs and wagering game systems and machines with a gaming chair are presented herein. A gaming chair is disclosed for a wagering game system with a controller and a display device for displaying aspects of the wagering game. The gaming chair includes a backrest portion, a seat portion, a base for supporting the seat and backrest portions, and a mounting plate attached to the seat portion. The mounting plate is configured to attach, one at a time, to each of first and second mounting assemblies for removably attaching the mounting plate to the base. The first mounting assembly includes at least one actuator for selectively repositioning the seat portion in response to signals from the controller. The second mounting assembly is selectively repositionable with respect to the base to thereby lock the seat portion at any one of a number of vertically stationary heights.
US09142080B2	Dispensing consumer products A system for dispensing consumer products includes a product bin unit; a product ejector; a product trigger; and a controller. The product bin unit includes a product bin; an ejector aperture; and a trigger aperture. The product ejector is coupled to the product bin unit through the ejector aperture and adapted to drive the product package from the product bin upon receipt of a dispensing signal. The product trigger is coupled to the product bin unit through the trigger aperture. The controller is in communication with the product ejector and the product trigger and includes at least one memory and a processor. The memory stores a dispensing module. The processor is adapted to execute the dispensing module, and the dispensing module is operable when executed to receive a dispensing instruction and transmit the dispensing signal to the product ejector based, at least in part, on the dispensing instruction.
US09142079B2	Coin and bill dispensing safe A readily reconfigurable cash dispensing system for providing change, such as coins of different values and bills or currency of different denominations needed by a retail store, grocery store, busy convenience store, or the like. A tray or trays for storing and delivering multiple rolls of coins or bills of a first value, as well as, a tray or trays for storing and delivering stacks of bills are described herein. A bill acceptor may be employed to accept bills used to purchase rolls of coins and stacks of bills, and a system controller can sense restocking and dispensing events to maintain an accurate inventory of cash in the bill acceptor, as well as, the total cash stored in the form of coin rolls or rolls bills, as well as, bill stacks.
US09142076B2	Media case and banking machine The present invention relates to a medium storage box. The medium storage box according to one aspect comprises: a medium depositing and withdrawing unit through which medium is deposited or withdrawn; a temporary medium stacker for temporarily stacking the medium deposited through the medium depositing and withdrawing unit; a medium storage unit for storing medium for withdrawal; a printing apparatus for printing one of the deposited medium and the medium for withdrawal; and a reversal unit for reversing the deposited medium when it is necessary to reverse the deposited medium.
US09142073B2	Techniques for telephony-based voting A telephone network voting system receives telephone ballots cast by voters by dialing a telephone number. The telephone number is dialed by voters spread over a large geographic area. The voting calls are routed to points of presence local to or otherwise identified with the caller by using the caller's ANI or other originating number identification. The points of presence then accumulate votes and periodically forward tallies to a centralized location over a data network. Instructions may be transmitted from the centralized location to the points of presence.
US09142071B2	Vehicle zone-based intelligent console display settings Methods and systems are presented for accepting inputs into a vehicle or other conveyance to control functions of the conveyance. A vehicle control system can receive gestures and other inputs. The vehicle control system can also obtain information about the user of the vehicle control system and information about the environment in which the conveyance is operating. Based on the input and the other information, the vehicle control system can modify or improve the performance or execution of user interface and functions of the conveyance. The changes make the user interfaces and/or functions user-friendly and intuitive.
US09142065B2	OBD based in-vehicle device providing content storage and access One embodiment is directed to an electronic device comprising a connector configured to connect to an on-board diagnostic (OBD) connector of a vehicle, a wireless transceiver, one or more processing devices coupled to the connector and to the wireless transceiver, and storage media coupled to the one or more processing devices. The storage media including instructions which, when executed by the one or more processing devices, cause the one or more processing devices to establish communication with a content control device using the wireless transceiver, download content from the content control device, store the content on the storage media, and terminate communication with the content control device. The instructions also cause the one or more processing devices to establish communication with a mobile device, and provide the content to a mobile device via a wireless link.
US09142064B2	System for detecting vehicle driving mode and method of conducting the same The present application is related to an vehicle driving mode detection system. The system may comprise a sensor interface and a processor. The sensor interface may be configured to receive measurement data associated with a plurality of operating parameters of a vehicle; and send the measurement data to a processor. The processor may be configured to execute a set of instructions stored in a computer-readable storage medium to receive the measurement data from the sensor interface; determine a driving mode of the vehicle based on the measurement data; compare the driving mode of the vehicle with a first reference driving mode of the vehicle; produce an alert signal when the driving mode is substantially different from a first reference driving mode; and send the alert signal to an information center remote to the sensor unit when a predetermined condition occurs.
US09142058B2	Storage medium, information processing apparatus, information processing method and information processing system A computer-readable storage medium having stored therein an information processing program to be executed by a computer is provided. The information processing program causes the computer to function as: preferential display object placing means for placing a preferential display object in an imaging range of a virtual stereo camera in a virtual three-dimensional space; stereoscopically visible image rendering means for taking the virtual three-dimensional space using the virtual stereo camera, and rendering a stereoscopically visible image of the virtual three-dimensional space; and display control means for causing the display apparatus to display the stereoscopically visible image rendered by the stereoscopically visible image rendering means. The stereoscopically visible image rendering means renders the preferential display object by using a parallax based on a first depth from the virtual stereo camera, according to a preference order based on a second depth, shallower than the first depth, from the virtual stereo camera.
US09142054B2	System and method for changing hair color in digital images A system and method for digital hair coloring is described. A starting image of a subject including a hair region is obtained. At least one foreground selection of the starting image is obtained, the foreground selection including a portion of the hair region. At least one background selection of the starting image excluding the hair region is obtained. A matte defining a calculated foreground area of the starting image is calculated based on the foreground selection and the background selection. A target color distribution based on a target hair color is obtained. A color image is generated by applying a color transformation based on the target color distribution to at least the calculated foreground area of the starting image. An output image is generated from the colored image and the starting image.
US09142052B1	Generating multiple digital images with changed aspect ratio In an embodiment, a data processing method comprises receiving and storing one or more original graphic image files; for each particular original graphic image file among the graphic image files: determining a first aspect ratio of the particular original graphic image file; determining whether the first aspect ratio is wider, taller, or identical to a specified second aspect ratio associated with one or more target image files; creating and storing the one or more target image files each having the second aspect ratio, by re-sampling the particular original graphic image file to match a first dimension of the one or more target image files, and selectively cropping one or more portions of the particular original graphic image file to form the one or more target image files having the second aspect ratio; wherein the method is performed using one or more computing devices.
US09142045B1	Method for displaying two-dimensional geological image data in log format and displayed product The present invention relates to a method for displaying two-dimensional geological image data in log format and the displayed image products thereof. The present invention can provide a concatenated display format for two-dimensional image data captured for different planar slices of a geological sample. The present method provides an enhanced format modality for presentation of such image data of a geological sample as a continuous presentation for the slices in the sequence.
US09142044B2	Apparatus, systems and methods for layout of scene graphs using node bounding areas A value is assigned to a layout bound of a first node in a scene graph. The layout bound constitutes a bounding volume for the object corresponding to the node and may be the display properties of the object and a first set of display modifiers for the node but not a second set. A display layout is calculated for a second node in the scene graph based on the value of the layout bound. Then, nodes of the scene graph are rendered to generate a display on a display device according to the calculated display layout. The value of the layout bound may be assignable, creating greater flexibility in controlling layout. Additionally, the value assigned to the layout bound may be changed. In this way, layout of nodes with respect to each other is flexible and visual effects and animations can either be factored into that layout or not.
US09142043B1	System and method for improved sample test efficiency in image rendering A method for reducing the number of samples tested for rendering a screen space region of an image includes constructing a trajectory of a primitive extending within an image which is to be rendered. A bounding volume is constructed for a screen space region of the image, the bounding volume characterized as having a bound in a non-screen space dimension which is defined as a function of the primitive's trajectory. The bounding volume is further characterized as overlapping a portion of the screen space region which is to be rendered. One or more sample points which are located within the screen space region, and which are not overlapped by the bounding volume are excluded from testing.
US09142041B2	Display apparatus configured for selective illumination of low-illumination intensity image subframes This disclosure provides systems, methods and apparatus for improving power efficiency of display devices. Control logic of a display device can use content adaptive backlight control (CABC) for displaying certain image frames with reduced illumination intensity. CABC can be used to determine a scaling factor for scaling up pixel values in an image frame and for scaling down the illumination intensity of a backlight used for illuminating the image frames. The control logic can determine a number of image subframes that have been rendered imperceptible to the human visual system (HVS) due to the reduced illumination intensity of the backlight, and refrain from displaying the determined number of image subframes. The control logic can utilize the additional time made available as a result of not displaying the determined number of subframes to further improve the power efficiency of the display device and/or improve image quality.
US09142036B2	Methods for segmenting and encoding an image, and corresponding devices A frame of pixels is segmented into a plurality of blocks each having a block type by a method including the steps of: a) performing an initial segmentation of the frame into a set of initial blocks, thus determining, for each initial block, a block type associated with the concerned initial block; b) determining, for each block type, an associated set of quantizers based on data corresponding to pixels of blocks having said block type; c) selecting, among a plurality of possible segmentations defining an association between each block of this segmentation and an associated block type, the segmentation which minimizes an encoding cost estimated based on a measure of the rate necessary for encoding each block using the set of quantizers associated with the block type of the encoded block according to the concerned segmentation.
US09142032B2	Method and apparatus for implementing motion detection A method for motion detection includes: obtaining a pixel value of an image to be detected in a video image sequence, a pixel average value of same positions in a preset number of frame images before the image to be detected, and scene luminance values of the preset number of frame images before the image to be detected; obtaining a pixel scene luminance value and an average scene luminance value by calculation according to the pixel value and the scene luminance values; obtaining P1 according to the pixel value and the pixel average value, and obtaining P2 according to the pixel scene luminance value and the average scene luminance value; and obtaining P3 by integrating the P1 and P2, and detecting, according to the P3, whether the image to be detected includes a motion image region.
US09142031B2	Image processing apparatus with detection of motion vector between images, control method therefor, and storage medium storing control program therefor An image processing apparatus that is capable of improving the alignment accuracy by detecting a motion vector accurately even if there is a low contrast region or a repeating pattern region. A division unit divides each of inputted images into blocks of a predetermined size. A first determination unit determines whether contrast in a block is less than a predetermined contrast for each of the blocks. A size changing unit changes the size of the block concerned when the first determination unit determines that the block concerned is low contrast. A motion vector detection unit detects a motion vector by comparing images in each pair of corresponding blocks between the images.
US09142029B2	Region extraction apparatus, method and program A three-dimensional medical image obtainment unit that obtains a three-dimensional medical image of a chest, a bronchial structure extraction unit that extracts a bronchial structure from the three-dimensional medical image, a divided lung region obtainment unit that divides, based on the divergence of the bronchial structure, the bronchial structure into plural bronchial structures, and obtains plural divided lung regions based on the plural divided bronchial structures, a distance image generation unit that generates, based on the plural divided lung regions, a distance image based on a distance between each voxel in an entire region excluding at least one of the plural divided lung regions and each of the plural divided lung regions, and a border non-existing region extraction unit that extracts, based on the distance image generated by the distance image generation unit, a border non-existing region, which does not include any borders of the divided lung regions, are provided.
US09142021B1	Aligning ground based images and aerial imagery Systems and methods for aligning ground based images of a geographic area taken from a perspective at or near ground level and a set of aerial images taken from, for instance, an oblique perspective, are provided. More specifically, candidate aerial imagery can be identified for alignment with the ground based image. Geometric data associated with the ground based image can be obtained and used to warp the ground based image to a perspective associated with the candidate aerial imagery. One or more feature matches between the warped image and the candidate aerial imagery can then be identified using a feature matching technique. The matched features can be used to align the ground based image with the candidate aerial imagery.
US09142020B2	Osteo-articular structure Method for reconstruction of a three-dimensional model of an osteo-articular structure of a patient, wherein a) bi-dimensional patient-specific image data (41) of said structure is provided; (d) a preliminary solution, corresponding to a previously established solution model of the structure, is provided (42) from a base (21), said preliminary solution comprising a priori knowledge of the corresponding structure, previously established from structures of the same type, said preliminary solution comprising surface data describing the coordinates of the surface of the solution model, and bulk data describing at least one characteristic of the inside of the solution model; the preliminary solution is modified (42′, 43, 44, 46, 47, 48) to be brought in concordance with said patient-specific image data.
US09142015B2	Medical imaging system and method for providing an image representation supporting accurate guidance of an intervention device in a vessel intervention procedure The present invention relates to visualizing information of an object. In order to provide spatial information and in addition situation specific data to the user while ensuring an effective perceptibility, a method (110) is provided comprising the steps of: a) providing (112) pre-navigation data (114) of a region of interest of an object (22); wherein the pre-navigation data comprises spatial geometrical data (116) and a functional parameter surface (118) in correspondence to the spatial geometrical data; b) acquiring (120) live image data (122) of the region of interest; c) detecting (124) an element (126) in the live image data; d) determining (128) spatial relation (130) of the pre-navigation data and the live image data; e) determining (132) the position (134) of the detected element in the spatial geometrical data, which determining is based on the spatial relation, and computing (136) a predetermined related point of location (138) on the functional parameter surface; f) generating (140) a combination (142) of a simplified surface representation (144) of the region of interest, which simplified surface representation is based on a visualization of the functional parameter surface, and a marker (146) indicating the computed predetermined related point of location; and g) displaying (148) the combination as navigation guidance (150).
US09142013B2	Substrate storage condition inspecting apparatus and substrate storage facility having same A substrate storage condition inspecting apparatus includes an illumination device, an imaging device, and a substrate storage condition determining unit. The illumination device includes, on the front side of an opening of a transport container located at an inspecting position, a first illumination portion and a second illumination portion that are spaced apart in the width direction of the opening. The substrate storage condition determining unit detects a pair of high-luminance portions on an inspection image captured by the imaging device, the pair of high-luminance portions being generated in locations circumferentially spaced apart in the peripheral edge portion of the semiconductor substrate by light applied by the first illumination portion and the second illumination portion, and determines whether or not the storage orientation of the semiconductor substrate is abnormal on the basis of the positional correspondence in the vertical direction for the pair of high-luminance portions.
US09142011B2	Shadow detection method and device Disclosed are a shadow detection method and device. The method includes a step of obtaining a depth/disparity map and color/grayscale image from a two-lens camera or stereo camera; a step of detecting and acquiring plural foreground points; a step of projecting the acquired plural foreground points into a 3-dimensional coordinate system; a step of carrying out, in the 3-dimensional coordinate system, a clustering process with respect to the projected plural foreground points so as to divide the projected plural foreground points into one or more point clouds; a step of calculating density distribution of each of the one or more point clouds by adopting a principal component analysis algorithm so as to obtain one or more principal component values of the corresponding point cloud; and a step of determining, based on the one or more principal component values, whether the corresponding point cloud is a shadow.
US09142009B2	Patch-based, locally content-adaptive image and video sharpening Techniques for sharpening an image using local spatial adaptation and/or patch-based image processing. An image can be sharpened by creating a high-frequency image and then combining that high frequency image with the image. This process can be applied iteratively by using the output of one iteration, i.e., the sharpened image, as the input to the next iteration. Using local spatial adaptation and/or patch-based techniques can provide various advantages. How to change the intensity at a given position in the image can be calculated from more than just information about that same position in the input image and the blurred image. By using information about neighboring positions an improved high frequency image can be determined that, when combined with the input image, reduces ringing and halo artifacts, suppresses noise boosting, and/or generates results with sharper and cleaner edges and details.
US09142008B2	Hierarchical motion blur rasterization Motion blur rasterization may involve executing a first test for each plane of a tile frustum. The first test is a frustum plane versus moving bounding box overlap test where planes bounding a moving primitive are overlap tested against a screen tile frustum. According to a second test executed after the first test, for primitive edges against tile corners, the second test is a tile corner versus moving edge overlap test. The corners of the screen space tile are tested against a moving triangle edge in two-dimensional homogeneous space.
US09142007B2	Electronic apparatus and image processing method According to one embodiment, an electronic apparatus includes a calculator and a processor. The calculator calculates a weighted average image between a first image, a second image and a third image, by using a weight based on a difference between the first image and the second image and a difference between the first image and the third image. The processor applies, based on the weight, an image quality process of a first intensity to a first position in the weighted average image, applies an image quality process of a second intensity weaker than the first intensity to a second position in the weighted average image and to applies an image quality process of a third intensity weaker than the second intensity to a third position in the weighted average image.
US09142006B2	Data processing apparatus, data processing method, and storage medium for storing image data A data processing apparatus obtains an input pixel region contained in image data, inputs a pixel value contained in the input pixel region into an image processor, obtains the image-processed pixel value from the image processor, and outputs an output pixel region. Data of the input pixel region and data of the output pixel region are temporarily stored, and the size of an input area that stores the data of the input pixel region and the size of an output area that stores the data of the output pixel region are set based on the number of pixels in the input pixel region and the number of pixels in the output pixel region.
US09142005B2	Efficient placement of texture barrier instructions One embodiment of the present invention sets forth a technique for placing texture barrier instructions within a thread program to advantageously enable efficient and correct operation of the thread program. A thread program compiler statically determines a pending request count needed to progress beyond a particular texture barrier instruction, which blocks execution of subsequent instructions that depend on previously requested data. Each instance of the thread program blocks execution at the barrier instruction until a pending request count condition is satisfied. This technique may advantageously reduce power consumption in a graphics processing unit by eliminating power consumption associated with conventional, generalized scoreboard resources.
US09142003B2	Adaptive frame rate control Displaying frames on an electronic display. Each frame is characterized by a time. Determining a characteristic of data related to each element of a first set of frames, each frame characterized as within a first time period. Determining a rate of change over time of the characteristic. Determining a frame rate based on the determined rate of change. Displaying a second set of frames at the frame rate.
US09141997B2	System and method for providing a social customer care system The present invention relates to social customer service and support systems integrated with social media and social networks. More particularly, the invention provides a social customer care platform system to allow customer care functions, and in particular to allow customer service agents to identify, prioritize, match and triage customer support requests that may arise through a social network and may be serviced using a social network. It manages and tracks a high-volume of customer interactions and provides for monitoring of Internet social network posts relevant to a business's products or services along with the ability to capture, monitor, filter, make sense of and respond to, in near real-time, tens of thousands of social interactions. It comprises role specific user-interface and functionality for social customer service and support environments, automated prioritization and matching for increased agent productivity, and an automated enterprise workflow to align social media support with existing business processes.
US09141994B2	Systems and methods for activity evaluation Systems and methods are discussed for providing sensor enhanced safety, recovery, and activity evaluation systems. Sensors that monitor user activity and behavior are worn by a user and/or placed in the user environment. Data from the sensors are processed to obtain a safety, recovery, and/or activity evaluation. Based on the evaluation, recommendations or adjustments to the terms of an insurance policy covering the user, the user's employer, or a facility providing health care to the user to accurately reflect the risks associated with the user, employer, and/or facility.
US09141993B2	User interface for semi-fungible trading A user interface and method are disclosed for providing trading between a plurality of semi-fungible and non-fungible goods. A plurality of book axes are displayed in a single interface, each book axis representing a market for a particular good. Orders for goods are displayed as marks on the axes to display the relative value of the orders. A value axis is provided that relates the value of the goods from each market to each other. Thus, a single interface provides the means to relate the values of different semi-fungible goods. The value axis may be displayed in units of price, or a custom value designated by a user or pre-defined by the interface. Quantity information is represented in the interface through the display of a dimension of an order icon. Precise information about each order is displayed either in a panel view or a pop-up window.
US09141991B2	Enhanced electronic data and metadata interchange system and process for electronic billing and payment system A Software As A System (SAAS)-based system is disclosed herein for sending bills and payments in conjunction with a third-party accounting system. The system deploys a downloadable program interface to configure the third-party accounting system and then send and receive data between the two systems. The transmitted bills may contain an electronic signature, a line item billing, and/or other transaction-specific meta data, and, based on cash flow needs and outstanding bills, some or all customers may be offered a very substantial time-limited discount for immediate payment. Also, customers may use the line-item billing feature to withhold partial payments for specific issues attributed to specific items. Alternatively, a communication module between SAAS units (CSU) may be deployed to configure the third-party accounting system and then send and receive data between the two systems.
US09141990B2	Expense registration system for registering expenses related to document received by fax An expense registration system capable of communicating with a management server that manages expenses individually for each matter includes a transmission unit configured to transmit a uniform resource locator (URL) for displaying a confirmation screen of fax reception when a document is received by fax, a response unit configured to send, if a request for the confirmation screen is received via the URL transmitted by the transmission unit, the confirmation screen as a response to the request, a reception unit configured to receive information used for managing expenses for fax reception, the information being input by a user via the confirmation screen, and a registration unit configured to register, by using the information received by the reception unit, expenses incurred in the fax reception in the management server.
US09141989B2	Systems and methods for using a social network to provide product related information Social product related content, such as user reviews, comments, and catalogs, are presented to a user via an e-commerce website by assembling, in response to the user requesting accesses to a webpage of the e-commerce website having information for a product, such as a product detail page, a set of documents that have been cross-referenced to the product and by extracting from the set of documents a subset of documents that have been cross-referenced to individuals within a related persons map of the user. The requested webpage is then presented to the user in a manner that additionally provides the user with access to the subset of documents.
US09141988B2	Systems and methods to provide search results based on time to obtain Systems and methods for providing search results based on time obtain an item are discussed. In an example, a method can include receiving a search query, generating search results, calculating a time to obtain for each listing in the search results, and arranging the search results for display. The search query can include a current location of a mobile device. The search results can include a plurality of listings, with each listing including a location. The locations representing either a physical location proximate the current location or a delivery time to the current location. The search results can be arranged for display in various manners according to the calculated time to obtain for each result.
US09141986B1	Mobile messaging data management A mobile messaging data management service is disclosed. Using a computing device, a merchant or other user of the service may transmit an operation to be run on data in a data store to an interactive computing system. In some embodiments, the operation is transmitted as part of a short messaging service (SMS) message. The interactive computing system may process the operation, and return the results to the computing device from which the message was received. The data management service may also enable a merchant or other user to specify one or more custom operations for future use.
US09141984B2	Automobile transaction facilitation using a manufacturer response A system, methods, and apparatus for performing automobile transactions are disclosed. In an example embodiment, automobile market data representative of current automobile market characteristics is stored. The automobile market data may include pricing, inventory, and consumer interest information received from manufacturers, dealers, and consumers. A consumer may provide a request for a manufacturer response indicating whether a specific automobile can be provided. Automobile market data may be provided to a manufacturer based on the request and a manufacturer response provides a verification, confirmation, or offer indicating that the specific automobile can be provided for the consumer. Bids to sell the specific automobile may be requested from dealers based on the manufacturer response. Dealer bids may be provided to the consumer with prices and a delivery options. The consumer may select a bid which specifies a pickup location at a first dealer.
US09141983B2	Shared data sets combined with user-specific purchased data sets Methods and systems are described for shared data sets combined with purchased data sets in an on-line services environment. In one embodiment, a method includes, identifying a user, associating the user with data in a shared database, and receiving a purchased dataset from the identified user. The method further includes adding the purchased dataset to a delta table associated with the shared database based on determined record relationships and field relationship, and providing access to the purchased dataset to the user through requests for data in the shared database.
US09141978B2	Billing management system, image forming apparatus, billing management apparatus, billing information recording method, and storage medium A management system is implemented by one or more information processing apparatuses connected via a network to one or more execution apparatuses that execute processes constituting a process flow. The management system includes a first registration unit that registers, in a storage unit, an information structure that is generated when the process flow is executed and that is used to store at least one of billing information and an execution result of each of the processes in the process flow. The system also includes a receiving unit that receives at least one of the billing information and the execution result from each of the execution apparatuses. Further, the system includes a second registration unit that registers at least one of the billing information and the execution result received by the receiving unit in the information structure.
US09141977B2	Computational systems and methods for disambiguating search terms corresponding to network members Methods, apparatuses, computer program products, devices and systems are described that carry out accepting at least one search term corresponding to at least one member of a network; disambiguating the at least one search term including associating the at least one search term with at least one of network-participation identifier data or device-identifier data; and presenting a disambiguated search term at least partly based on at least one of the network-participation identifier data or the device-identifier data.
US09141974B2	Systems and methods for determining mobile thing (MT) identification and/or MT motion activity using sensor data of wireless communication device Systems, apparatus, and methods are disclosed for accurately identifying a mobile thing (MT), a mobile thing motion activity (MTMA) associated with the MT, or both, using sensor data from one or more sensors, such as an accelerometer, gyroscope, etc., associated with a wireless communication device (WCD) transported by the MT, so as to enable or initiate a further one or more intelligent MT-identity-based and/or MTMA-based actions.
US09141970B2	Call tracking system and method Methods and systems for capturing and tracking call information relating to a call from a user to a merchant are provided. According to one embodiment of the disclosed subject matter, a request for a call to a merchant from a user on a device is received and a data connection is initiated with a call analytics platform over which user information is sent from the device to the platform. A unique number allowing the device to call the platform is then passed back to the device. The device calls the platform, call context data is captured, and the call is processed to the merchant. Information relating to the user and merchant call is tracked and logged.
US09141968B2	System and method for redeeming an electronic promotion code at a point of sale An authentication device and a mobile device work together for redeeming an electronic promotion code at a point of sale. Upon receipt of an electronic promotion code, the authentication device encrypts the electronic promotion code and transmits the encrypted promotion code to the mobile device. In response, the mobile device decrypts the encrypted promotion code and determines whether the decrypted promotion code satisfies one or more predefined conditions. If so, the mobile device displays a message, indicating a successful redemption of the promotion code at the point of sale. In some implementations, the message includes a confirmation code, which is provided to the authentication device for generating a transaction log record. In some implementations, the mobile device also generates a separate transaction log record for the promotion code and transmits the transaction log record to a remote server for further processing.
US09141959B2	Method and system for replaying a voice message and displaying a signed digital photograph contemporaneously Systems and methods for generating authentic digital memorabilia are described. A signor may be provided a digital photograph. The signor's signature, written message, or voice message may be received. Biometric authentication or verification may be performed on the signor's handwriting or voice sample through comparison with stored samples. If the verification signifies a high likelihood signor's handwriting or voice sample is authentic, creation of digital memorabilia is performed by embedding signor's signature or written message in a digital photograph and linking the signor's voice message with the photograph. The digital memorabilia is accompanied by a certificate of authenticity and distributed to a customer or displayed on a website.
US09141945B2	Secure distributed single action payment system Methods and systems for enabling and performing secured, single action payments from a mobile device are disclosed. One method includes receiving user credentials at an application installed on a mobile device, and transmitting the user credentials from the mobile device to a server alongside a device identifier. The method includes receiving data at least partially defining encrypted personal payment information and saving the encrypted personal payment information in a memory of the mobile device in association with the application. At least prior to receiving a user request to make a payment via the application, the mobile device lacks a decryption key capable of decrypting the encrypted personal payment information.
US09141944B2	Synchronization of alarms between devices A method for synchronizing a first device with a second device may include receiving an alarm activation time from the first device. An alarm may be set on the second device to be the same as the alarm activation time. An indication that the alarm is set on the second device may be sent to the first device. Immediately prior to the alarm activation time, it may be determined that the first device is proximate to the second device, and upon determining that the first device is proximate to the second device, the alarm may be activated on the second device at the alarm activation time. The devices may be considered proximate based on a connection protocol, such as when the first device is able to communicate with the second device over a wired or wireless communication protocol.
US09141938B2	Navigating a synchronized transcript of spoken source material from a viewer window A method and system for producing and working with transcripts according to the invention eliminates time inefficiencies. By dispersing a source recording to a transcription team in small segments, so that team members transcribe segments in parallel, a rapid transcription process delivers a fully edited transcript within minutes. Clients can view accurate, grammatically correct, proofread and fact-checked documents that shadow live proceedings by mere minutes. The rapid transcript includes time coding, speaker identification and summary. A viewer application allows a client to view a video recording side-by-side with a transcript. Clicking on a word in the transcript locates the corresponding recorded content; advancing a recording to a particular point locates and displays the corresponding spot in the transcript. The recording is viewed using common video features, and may be downloaded. The client can edit the transcript and insert comments. Any number of colleagues can view and edit simultaneously.
US09141937B2	System for storage and navigation of application states and interactions Complex collaboration or decision support applications perform complex design or planning tasks, often with the input of large groups of people over long periods of time. The combination of time and complexity can often obscure past actions, making it difficult to remember the factors that influenced earlier stages in the planning task. This is especially true if the task involves many people and different people work at different times. The application state navigation system provides an application-independent mechanism that allows operators to walk back through the history of the application in order to better understand (or remember) the application actions that were taken in the past and the triggers for those actions.
US09141934B2	Techniques for deploying virtual software applications on desktop computers A method for bridging between virtual applications and an operating system of a host computer. The method comprises retrieving virtual applications and settings of the virtual applications assigned to a user logged onto the host computer; downloading shadow files of the virtual applications assigned to the user; integrating each of the virtual applications with an operating system shell of the host computer; and causing a virtual application to be executed over the host computer when the virtual application is launched by the user.
US09141933B2	Method and system for generating a personalized report with reusable parameters Methods and systems for generating personalized reports are disclosed. In some embodiments, a report generating application or service facilitates generating reports that can be personalized on a per-user and per-report basis. Accordingly, after personalizing a report to include only those columns desired, and formatting the report to have the columns appear in a desired order, the report generating application or service enables a user to save the personalization preferences to a file. Upon receiving a subsequent report request from the same user, the report generating application or service automatically generates the report in accordance with the user's saved personalization preferences. In addition to personalizing the report by specifying the particular columns and format, a user may establish, and save for later use, other report parameters (e.g., such as a date range) that are required in order to generate the report.
US09141931B2	Inventory distribution method and system An inventory distribution system and method of providing a plurality of items to a plurality of kiosks is provided. The inventory distribution system may maintain and update a plurality of inventory records associated with the plurality of items provided by the plurality of kiosks, which can be used to determine and update quantities of the plurality of items at specific kiosks. To provide the plurality of items to the plurality of kiosks, the inventory distribution system can provide deliveries to a plurality of distribution agents, where the distribution agents are assigned to a subset of kiosks to maintain and distribute one or more select items to the subset of kiosks.
US09141929B2	Password-protected physical transfer of password-protected devices A method for password-protected physical transfer of password-protected devices including at a receiving location, generating at least one security file including an encrypted element generated using a one-way encryption function utilizing at least one secure code, transmitting the at least one security file to a shipping location at which the password-protected devices are located, at the shipping location, using at least one shipping location password, loading the at least one security file into at least one password-protected device, shipping the at least one password-protected device to the receiving location and at the receiving location, employing the at least one secure code to supply an input to the at least one password-protected device and employing the at least one security file to enable establishment of at least one receiving location password for the at least one password-protected device which replaces the at least one shipping location password.
US09141928B2	System and method for vendor and customer management in a supply chain A method of managing a supply chain comprises providing at a customer interface module a plurality of order fulfillment options to a customer, and receiving from the customer a selection of a particular order fulfillment option. The method also includes receiving a first order from the customer, and receiving a first inventory status from a first distribution center. A first distribution center sends a first product to the customer in response to determining that the particular order fulfillment option comprises a fill-partial order fulfillment option, and a duration between the time that the first product is directed to be sent and the time when the first product is actually sent is determined. An alert is generated if the duration is greater than a predetermined duration.
US09141927B2	Determining costs for workflows Techniques are disclosed for modeling costs when editing a workflow process model. A request may be received to assign a cost factor to a workflow process step of the workflow process model. Responsive to the request, the cost factor may be assigned to the workflow process step, such that a traversal of the workflow process step by a transaction invoking the workflow process model results in the cost factor being included in a total cost to be charged for executing the transaction.
US09141922B2	System and method for providing a price quotation for a transportation service providing equipment selection capability A method and system for computing the price for shipping goods. The method includes causing a computer to deliver first information to a user prompting the user to enter at the computer information about a rail transportation service for shipment of goods by one or more railcars. Information about a basic pool of railcars is received and filtered based on one or more filtering criteria to produce a filtered pool of railcars. The computer is then caused to deliver second information to the user prompting the user to select at the computer one or more railcars among the filtered pool of railcars for the shipment of goods. A price for the shipment of the goods is then computed at least in part on the basis of the rail transportation service and the one or more characteristics of the railcars in the filtered pool of railcars selected by the user.
US09141921B2	Project modeling using iterative variable defect forecasts Project modeling is conducted using variable defect arrival rate or variable defect rate density parameters. These defect rates may be updated on an iteration by iteration basis and may be used to provide remediation and further project modeling, remediation, and prediction.
US09141919B2	System and method for object migration using waves A system and method for information technology (IT) migration includes determining a relationship among objects to be migrated such that the relationship includes a set of objects having at least one of a common feature or dependency between the objects in the set. The objects are grouped into a plurality of migration waves such that cross-wave relationships are minimized among the plurality of migration waves. The objects are migrated wave by wave.
US09141916B1	Using embedding functions with a deep network Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using embedded function with a deep network. One of the methods includes receiving an input comprising a plurality of features, wherein each of the features is of a different feature type; processing each of the features using a respective embedding function to generate one or more numeric values, wherein each of the embedding functions operates independently of each other embedding function, and wherein each of the embedding functions is used for features of a respective feature type; processing the numeric values using a deep network to generate a first alternative representation of the input, wherein the deep network is a machine learning model composed of a plurality of levels of non-linear operations; and processing the first alternative representation of the input using a logistic regression classifier to predict a label for the input.
US09141913B2	Categorization and filtering of scientific data The present invention relates to methods, systems and apparatus for capturing, integrating, organizing, navigating and querying large-scale data from high-throughput biological and chemical assay platforms. It provides a highly efficient meta-analysis infrastructure for performing research queries across a large number of studies and experiments from different biological and chemical assays, data types and organisms, as well as systems to build and add to such an infrastructure. According to various embodiments, methods, systems and interfaces for associating experimental data, features and groups of data related by structure and/or function with chemical, medical and/or biological terms in an ontology or taxonomy are provided. According to various embodiments, methods, systems and interfaces for filtering data by data source information are provided, allowing dynamic navigation through large amounts of data to find the most relevant results for a particular query.
US09141907B2	Network driven actuator mapping agent and bus and method of use A network driven actuator mapping agent is provided. A system includes a sensor configured to sense an event in a first environment. The system also includes an actuator configured to perform an action in a second environment. Moreover, the system further includes a mapping manager configured to map the sensed event to the actuator to provide a custom interaction in the second environment.
US09141905B2	Card-type information recording medium having embedded antenna for near field communication and manufacturing method thereof A card-type information recording medium having an embedded antenna for NFC communication is provided. The card-type information recording medium includes: a PCB that has a loop antenna pattern and a routing pattern formed on the top surface and the bottom surface thereof through the use of an etching process; an NFC communication unit and a USIM card unit that are horizontally mounted on the top of the PCB; and a molding material that is formed on the top of the PCB to cover the NFC communication unit and the USIM card unit. Accordingly, it is possible to perform functions of NFC and RFID read/tag by only mounting a USIM device thereon without adding any module or any constituent having an antenna function to a mobile terminal.
US09141901B2	Dual range radiofrequency communication object and method for implementing same The present invention relates to a communication object comprising means for radiofrequency communication with a remote device, wherein said communication means are capable of establishing a first short-range communication and a second communication having a longer range than the first communication, said long range being enabled by Bluetooth or Wifi technology. The communication means use the same type of communication technology for the first and second communications. The invention also relates to a method for implementing the dual-range radiofrequency communication of the object.
US09141893B2	Image forming apparatus and method for controlling the same In the invention, an inclination amount of sensors is reflected in positional deviation correction patterns, and for correcting formation positions of images of various colors, the positional deviation correction patterns are formed on a conveying belt. The positional deviation correction patterns are detected by the sensors. A control unit calculates positional deviation correction amounts based on detection results of the positional deviation correction patterns. Based on the calculated positional deviation correction amounts, the control unit performs calculation for correcting the positional deviation correction patterns, and cancels the inclination amount reflected in the calculation results to obtain final positional deviation correction amounts. Skew correction is performed based on the final positional deviation correction amounts, and thus, the positional deviations are corrected.
US09141891B2	Job management device A job management device includes a display unit, an authenticating unit and a job display processing unit. The display unit displays information. The authenticating unit determines whether a user is previously authorized to use an image forming apparatus. The job display processing unit executes a job display processing by which the contents of print jobs to under execution and prior to execution among print jobs accepted by the image forming apparatus are arranged in an execution order and displayed on the display unit, the job display processing unit configured to, in the job display processing, identifiably display the contents of a print job inputted by an authenticated user who is determined by the authenticating unit to have prior authorization to use the image forming apparatus and unidentifiably display the contents of the print jobs inputted by users other than the authenticated user.
US09141885B2	Visual pattern recognition in an image A system may be configured as an image recognition machine that utilizes an image feature representation called local feature embedding (LFE). LFE enables generation of a feature vector that captures salient visual properties of an image to address both the fine-grained aspects and the coarse-grained aspects of recognizing a visual pattern depicted in the image. Configured to utilize image feature vectors with LFE, the system may implement a nearest class mean (NCM) classifier, as well as a scalable recognition algorithm with metric learning and max margin template selection. Accordingly, the system may be updated to accommodate new classes with very little added computational cost. This may have the effect of enabling the system to readily handle open-ended image classification problems.
US09141880B2	Systems and methods for relating images to each other by determining transforms without using image acquisition metadata Systems and methods for relating images to each other by determining transform functions between the images and the three-dimensional world coordinate system of the object depicted in the image, without using image acquisition metadata are disclosed. Points of interest are independently selected on each image. An initial transform function is applied to transform the points in the plane of one image to the plane of the other image. A Gaussian Mixture Model is then iteratively applied to the points to determine a best match, which then provides adjustments to the argument values of the transform function which is again applied to the points of interest on each image. This process repeats until the argument values converge to provide the resulting transform function. The resulting function can then be used to identify objects in the images in three dimensional space.
US09141879B2	Pattern matching method, image processing device, and computer program In order to provide a computer program, an image processing device, and a pattern matching method that perform pattern matching at a high level of accuracy without relying on edge deformation, contrast fluctuations, etc., in one embodiment, the disclosed pattern matching method and device perform pattern matching over an image using a template produced on the basis of the below mentioned design data. The pattern matching method and device determine the characteristic quantities of the image for an inner region and/or an outer region that are divided by a line that defines the contour of a pattern, and determine positions at which said characteristic quantities satisfy predetermined conditions to be matching positions, matching position candidates, or erroneous matching positions.
US09141877B2	Method for context aware text recognition A method for context-aware text recognition employing two neuromorphic computing models, auto-associative neural network and cogent confabulation. The neural network model performs the character recognition from input image and produces one or more candidates for each character in the text image input. The confabulation models perform the context-aware text extraction and completion, based on the character recognition outputs and the word and sentence knowledge bases.
US09141876B1	Apparatus and system for processing currency bills and financial documents and method for using the same A document processing device convertible between a first configuration and a second configuration includes an input receptacle, a transport mechanism, a scanner, and a convertible output area. The input receptacle is configured to receive documents including currency bills therein. The transport mechanism is configured to transport the documents along a transport path from the input receptacle. The scanner is positioned along the transport path and is configured to scan at least a portion of each of the documents transported to generate data associated therewith. The convertible output area is configured to be selectively coupled with a first output assembly and a second output assembly.
US09141868B2	Contemporaneously reconstructing images captured of a scene illuminated with unstructured and structured illumination sources What is disclosed is system and method for contemporaneously reconstructing images of a scene illuminated with unstructured and structured illumination sources. In one embodiment, the system comprises capturing a first 2D image containing energy reflected from a scene being illuminated by a structured illumination source and a second 2D image containing energy reflected from the scene being illuminated by an unstructured illumination source. A controller effectuates a manipulation of the structured and unstructured illumination sources during capture of the video. A processor is configured to execute machine readable program instructions enabling the controller to manipulate the illumination sources, and for effectuating the contemporaneous reconstruction of a 2D intensity map of the scene using the second 2D image and of a 3D surface map of the scene using the first 2D image. The reconstruction is effectuated by manipulating the illumination sources.
US09141867B1	Determining word segment boundaries Some examples include segmenting text of a content item to include a plurality of segments or words. For instance, a module for segmenting a content item using a context-based segmenter into a plurality of segments, identifying segment boundary hints stored in the content item, and adjusting segments of the plurality of segments based on the identified segment boundary hints. Some additional examples include inserting segment boundary hints into a content item. For instance a module that segments the content item using a first segmenter and a second segmenter and inserting segment boundary hints into the content item where the results of the first and second segmenter differ.
US09141865B2	Fast single-pass interest operator for text and object detection The invention provides a method of using machine vision to recognize text and symbols, and more particularly traffic signs.
US09141858B2	Determining GPS coordinates for images Systems, methods and articles of manufacture for GPS coordinate determination for images are described herein. Embodiments of the present disclosure relate to equipping an image with GPS coordinates where the image is uploaded onto a mapping site without GPS coordinates. The mapping site is able to equip the image with GPS coordinates by identifying a recognizable structure in the image and then comparing the recognizable structure with stored structures in the mapping site. The stored structures in the mapping site have GPS coordinates for each. The mapping site compares the recognizable structure of the image without GPS coordinates to a structure stored in the mapping site with GPS coordinates. The mapping site then tags the image without GPS coordinates with the GPS coordinates associated with the stored structure that matches the structure of the image.
US09141855B2	Accelerated object detection filter using a video motion estimation module Systems, apparatus and methods are described related to accelerated object detection filter using a video estimation module.
US09141852B1	Person detection and pose estimation system A system for detecting a person and estimating pose information comprises a processor and a memory storing instructions causing the system to: retrieve depth data from a sensor, the depth data describing distance information associated with one or more objects detected by the sensor; cluster the depth data to determine two or more candidate leg clusters, each candidate leg cluster including a portion of the depth data that may represent a human leg detected by the sensor; identify a candidate leg cluster pair including two candidate leg clusters within a certain distance between each other; determine whether there is a connectivity between the two candidate leg clusters included in the candidate leg cluster pair; and responsive to determining that there is a connectivity between the two candidate leg clusters, determine that the candidate leg cluster pair is qualified to be a leg cluster pair representing a person.
US09141845B2	Method and apparatus for authenticating area biometric scanners Methods and apparatuses for authenticating a biometric scanner, such as area type finger print scanners, involves estimating unique intrinsic characteristics of the scanner (scanner pattern), that are permanent over time, and can identify a scanner even among scanners of the same manufacturer and model. Image processing and analysis are used to extract a scanner pattern from images acquired with the scanner. The scanner pattern is used to verify whether the scanner that acquired a particular image is the same as the scanner that acquired one or several images during enrollment of the biometric information. Authenticating the scanner can prevent subsequent security attacks using counterfeit biometric information on the scanner, or on the user authentication system.
US09141844B2	System and method for three-dimensional biometric data feature detection and recognition The system includes a 3D feature detection module and 3D recognition module 202. The 3D feature detection module processes 3D surface map of a biometric object, wherein the 3D surface map includes a plurality of 3D coordinates. The 3D feature detection module determines whether one or more types of 3D features are present in the 3D surface map and generates 3D feature data including 3D coordinates and feature type for the detected features. The 3D recognition module compares the 3D feature data with biometric data sets for identified persons. The 3D recognition module determines a match between the 3D feature data and one of the biometric data sets when a confidence value exceeds a threshold.
US09141836B2	RFID reader An RFID reader is provided. The RFID reader includes a transmitter section and a receiver section. The transmitter section is configured to transmit a first RF signal which includes several carrier frequencies that are effective to simultaneously illuminate a tag at the plurality of carrier frequencies. The receiver section is configured to receive a second RF signal which includes several frequencies which each have the same information.
US09141834B2	Ultrasonic identification of replaceable component for host system A system, method and device are provided for detecting the presence of, and/or obtain information about, a replaceable component for a host system. A host system has an ultrasonic transducer pair that detects the presence of, and/or obtains information about, a replaceable component for a host system through receipt or non-receipt of an ultrasonic signal. The replaceable component includes a key or other feature that either allows the transmission of a transmitted ultrasonic signal, or which does not allow the reception of the transmitted ultrasonic signal, depending on the host configuration.
US09141826B2	Methods, systems and computer program products for discreetly monitoring a communications network for sensitive information A method for monitoring a network for information includes repeatedly searching the network for sensitive information about a subscriber. The network is intermittently searched for obscuring information during the repeated searching to thereby disguise the sensitive information that is the target of the repeated searching. Related systems and computer program products are also discussed.
US09141825B2	System and method for controlling access to assets in a network-based media sharing system using tagging A system and method for controlling access to digital assets in an online media sharing system based on keywords are provided. In general, each digital asset is tagged with a number of keywords. The owner of the digital assets defines a guest list including a number of guests. For each guest, the owner defines permissions controlling the guest's access to the digital assets based on keywords. Thereafter, when a request to view the digital assets is received from a guest node associated with one of the guests, the digital assets that the guest is permitted to view are identified based on the permissions assigned to the guest and provided to the guest at the guest node.
US09141823B2	Abstraction layer for default encryption with orthogonal encryption logic session object; and automated authentication, with a method for online litigation Embodiments herein provide methods, apparatus, computer program products, software and means for (1) an abstraction layer for default encryption, (2) with orthogonal encryption logic session object, and (3) automated authentication, (4) with a method for online litigation. In some cases subject matter disclosed herein relates to default data encryption; use a user's registration data to generate an encryption logic and related executable code, including servers and client applications; encryption as an automatic background task occurring through variable encryption logic, with authentication; embodiments are also described for conducting online litigation through pleadings formed as meta-files that trigger litigation related algorithms in order to automate and coordinate litigation.
US09141822B2	Computer system for storing and retrieval of encrypted data items, client computer, computer program product and computer-implemented method A system is disclosed comprising multiple sets of client computers each client computer having installed thereon an application program The application program comprising client computer specific log-in information, a database system coupled to the set of client computers via a network. The database system having a log-in component for logging-in the client computers, and being partitioned into multiple relational databases each one of which is assigned to one set of the sets of client computers. Each database further storing encrypted data items, each data item being encrypted with one of the user or user-group specific cryptographic keys, the key identifier of the cryptographic key with which one of the data items is encrypted being stored in the database as an attribute of the one of the encrypted data items. The log-in component comprising assignment information indicative of the assignment of the databases to the set of client computers.
US09141821B2	Selective encryption of data stored on removable media in an automated data storage library In an automated data storage library, selective encryption for data stored or to be stored on removable media is provided. One or more encryption policies are established, each policy including a level of encryption, one or more encryption keys and the identity of one or more data cartridges. The encryption policies are stored in a policy table and the encryption keys are stored in a secure key server. A host requests access to a specified data cartridge and the cartridge is transported from a storage shelf in the library to a storage drive. Based on the identity of the specified cartridge, the corresponding encryption policy is selected from the table and the appropriate encryption key is obtained from the key server. The storage drive encrypts data in accordance with the key and stores the data on the media within the specified data cartridge.
US09141819B2	Encrypted tape access control via challenge-response protocol Access to encrypted data on a removable computer media such as a computer tape is controlled via a uniquely-structured header on the medium having a symmetrical key wrapped by asymmetrical encryption plus a public key associated with the asymmetrical encryption. The data on the medium is encrypted using the symmetrical key. Prior to automated reading of the data by a reader, a challenge is issued to a host system including the public key and preferably a nonce value. The host responds by signing the nonce using a private key associated with the public key in order to prove it has rights to decrypt the data. The symmetrical key is unwrapped using the private key, and finally the unwrapped symmetrical key is used to decrypt the data on the medium, thereby allowing automated reading of the tape data without the need or risk of two administrators sharing a symmetrical key value.
US09141818B2	Information providing apparatus and non-transitory computer readable medium having stored information for each marker image identification information An information providing apparatus includes following components. A storing unit stores marker image identification information, an image feature of a marker placed area, related information, and disclosure limitation information indicating whether the related information is to be disclosed to specific users in an image information memory. A user information memory stores user identification information identifying a user and privilege information indicating a privilege of the user. An obtaining unit obtains, from an information terminal, user identification information and a target image. A search unit searches the image information memory for marker image identification information of a marker image having an image feature similar to that included in the target image. A providing unit provides, if the corresponding disclosure limitation information indicates limited disclosure and the corresponding privilege information indicates that access to the retrieved related information is permitted, the corresponding related information to the information terminal.
US09141815B2	System and method for intelligence based security Included in the present disclosure are a system, method and program of instructions operable to protect vital information by combining information about a user and what they are allowed to see with information about essential files that need to be protected on an information handling system. Using intelligent security rules, essential information may be encrypted without encrypting the entire operating system or application files. According to aspects of the present disclosure, shared data, user data, temporary files, paging files, the password hash that is stored in the registry, and data stored on removable media may be protected.
US09141814B1	Methods and computer systems with provisions for high availability of cryptographic keys Computer systems and methods ensuring high availability of cryptographic keys using a shared file system. The keys are encrypted with at least one shareable master key to generate corresponding encrypted cryptographic keys, which are stored in a key database in the shared file system. A master key manager with access to the key database is elected from among master key manager candidates and is assigned a common virtual address. All master key manager candidates have the shareable master key such that during a failover event the availability of the encrypted cryptographic keys is not interrupted as a new master key manager takes over the common virtual address from the previous master key manager. Additionally, a message authentication code (MAC) is deployed for testing the integrity of keys during their retrieval.
US09141812B2	Stateful reference monitor A Stateful Reference Monitor can be loaded into an existing commercial operating system, and then can regulate access to many different types of resources. The reference monitor maintains an updateable storage area whose contents can be used to affect access decisions, and access decisions can be based on arbitrary properties of the request.
US09141808B1	Data loss prevention Data loss prevention systems and methods begin protecting data upon the creation of the data. One such method involves detecting a file system operation targeting data on a storage device. The file system operation creates or modifies the data or a set of permissions associated with the data. In response to detecting the file system operation, the method prevents unauthorized access to the data. The method begins preventing unauthorized access after the detection of the file system operation and before any subsequent read access to the data via the file system.
US09141807B2	Security remediation A method is provided to remediate defects in first computer program code that can be used to configure a computer to produce code for use by the same or a different computer configured using second computer program code to use the produced code to produce output information, the method comprising: configuring a computer to perform static analysis of the first program to produce an information structure in a non-transitory computer readable storage device that associates a respective code statement of the first program code with a respective context, wherein the context associates a parser state with a potential defect in the produced code; identify a defect in the first computer program code that is associated with the respective code statement; and determining a remediation for the identified defect.
US09141806B2	Mining source code for violations of programming rules A method for software code analysis includes automatically processing a body of software source code (23) by a computer (22) in order to identify a group of sequences of instructions that are characterized by a common pattern. A sequence within the group containing a deviation from a norm of the common pattern is found and reported as a potential vulnerability in the software source code.
US09141805B2	Methods and systems for improved risk scoring of vulnerabilities A security tool can identify vulnerabilities in a computing system and determine a risk level of the vulnerabilities based on base and optional CVSS vectors and additional factors that represent the evolving nature of vulnerabilities. Likewise, the security tool can determine an overall risk for vulnerabilities, an asset, and/or a collection of assets that encompasses a global view of an asset's risk and/or collection of assets' risk, business considerations of an entity that own and controls the asset and/or the collection of assets, and the entity's associations.
US09141804B2	Processor boot security device and methods thereof A method of securing network authentication information at a data processing device includes determining a boot source from which to boot the device and comparing the boot source to an expected source. If the boot source is not the expected source, access to the network authentication information is inhibited, such as by disabling access to the portion of memory that stores the authentication information. Further, if the boot source is the expected source, boot code authentication information is retrieved from memory and verified during the boot sequence. If the device authentication information is not authenticated, access to the network authentication information is inhibited. Accordingly, access to the network authentication information is allowed only if the data processing device is booted from an expected source, and only if the boot code is authenticated, thereby reducing the likelihood of unauthorized access to the network authentication information.
US09141799B2	Operation of a dual instruction pipe virus co-processor Circuits and methods are provided for detecting, identifying and/or removing undesired content. According to one embodiment, a system includes a system memory, a general purpose processor, an instruction memory and a virus co-processor. The processor is coupled to the system memory and operable to store a data segment therein. The instruction memory includes a virus signature, having a first instruction of a first instruction type and a second instruction of a second instruction type, for detection of a computer virus. The co-processor is coupled to the instruction memory and the system memory and is operable to access the data segment. The co-processor includes first and second instruction pipes operable to execute the first and second instruction types, respectively. The first and second instruction pipes include first and second write back circuits, respectively, that are linked to ensure a ordered write back of instructions.
US09141798B2	Operation of a dual instruction pipe virus co-processor Circuits and methods are provided for detecting, identifying and/or removing undesired content. According to one embodiment, a content object that is to be virus processed is stored by a general purpose processor to a system memory. Virus scan parameters for the content object are set up by the general purpose processor. Instructions from a virus signature memory of a virus co-processor are read by the virus co-processor based on the virus scan parameters. The instructions contain op-codes of a first instruction type and op-codes of a second instruction type. Those of the instructions containing op-codes of the first instruction type are assigned to a first instruction pipe of multiple instruction pipes of the virus co-processor for execution. An instruction of the assigned instructions containing op-codes of the first instruction type is executed by the first instruction pipe including accessing a portion of the content object from the system memory.
US09141795B2	Techniques for detecting malicious activity Techniques for detecting malicious activity are disclosed. In one particular embodiment, the techniques may be realized as a method for detecting malicious activity including receiving information indicating a first process being executed, the first process including a plurality of first process components, receiving information specific to at least one of the plurality of first process components, determining whether the first process exhibits malicious behavior; and identifying which of the plurality of first process components is responsible for the malicious behavior based on the received information.
US09141794B1	Preemptive and/or reduced-intrusion malware scanning One embodiment relates to a computer-implemented method of preemptively scanning targets for malicious codes. Input qualities regarding said targets are received. A first computer-implemented procedure is applied to generate a measure of priority for scanning of said targets. Targets are selected for preemptive scanning using said measure of priority. In addition, resource utilization inputs may be received, and a second computer-implemented procedure may be applied to determine a system resource usage level using the resource utilization inputs. In that case, the malware scanning may be performed opportunistically based on the system resource usage level. Other embodiments, aspects and features may also be disclosed.
US09141792B2	Application-level anomaly detection An example includes intercepting one or more activities performed by an application on a computing device. The intercepting uses an instrumentation layer separating the application from an operating system on the computing device. The one or more activities are compared with one or more anomaly detection policies in a policy configuration file to detect or not detect presence of one or more anomalies. In response to the comparison detecting presence of one or more anomalies, indication(s) of the one or more anomalies are stored. Another example includes receiving indication(s) of anomaly(ies) experienced by an application on computing device(s) and analyzing the indication(s) of the anomaly(ies) to determine whether corrective action(s) should be issued. Responsive to a determination corrective action(s) should be issued based on the analyzing, the corrective action(s) are issued to the computing device(s). Methods, program products, and apparatus are disclosed.
US09141791B2	Monitoring for anomalies in a computing environment A method of monitoring for anomalies in a computing environment comprises, with a processor building an anomaly detection system based on topology guided statistical analysis, and creating a number of correlation rules based on a number of detected anomalies and information provided by a security alerts database.
US09141787B2	Interlocked binary protection using whitebox cryptography A system and method for transforming a software application comprising binary code and optionally associated data, from an original form to a more secure form. The method includes performing a combination of binary transmutations to the application, and interlocking the transmutations by generating and placing interdependencies between the transmutations, wherein a transmutation is an irreversible change to the application. Different types of the transmutations are applied at varied granularities of the application. The transmutations are applied to the application code and the implanted code as well. The result is a transformed software application which is semantically equivalent to the original software application but is resistant to static and/or dynamic attacks.
US09141784B2	Printing control program, information processing apparatus, printing system, and printing apparatus An information processing apparatus which implements a printing control function for generating printing control information for causing an image forming apparatus to execute printing outputting is disclosed. The information processing apparatus includes a core unit and an extension unit which can be added after the core unit is installed. The information processing apparatus further includes a launch processing unit which launches the extension unit; an extension function operation information requesting unit; an extension function operation information encrypting unit; an extension function operation information decrypting unit; and a printing control information generating unit.
US09141779B2	Usable security of online password management with sensor-based authentication A multi-party security protocol that incorporates biometric-based authentication and withstands attacks against any single party (e.g., mobile phone, cloud, or the user). The protocol involves the function split between mobile and cloud and the mechanisms to chain-hold the secrets. A key generation mechanisms binds secrets to a specific device or URL (uniform resource locator) by adding salt to a master credential. An inline CAPTCHA (Completely Automated Public Turing test to tell Computers and Humans Apart) handling mechanism uses the same sensor modality as the authentication process, which not only improves the usability, but also facilitates the authentication process. This architecture further enhances existing overall system security (e.g., handling untrusted or compromised cloud service, phone being lost, impersonation, etc.) and also improves the usability by automatically handling the CAPTCHA.
US09141777B2	Authentication method and code setting method and authentication system for electronic apparatus The present invention relates to an authentication method for electronic apparatus and authentication system, which comprises the steps of: enabling an electronic apparatus to be moved by a user from a first position to a second position; enabling an inertial sensor embedded in the electronic apparatus to detect and thus constructing a three-dimensional continuous trajectory of the electronic apparatus's movement from the first position to the second position in a Cartesian coordination system composed of a first-direction axis, a second-direction axis and a third-direction axis; and enabling a processor embedded in the electronic apparatus to perform either a process for registering the three-dimensional continuous trajectory as a standard movement trajectory; or a comparison between the three-dimensional continuous trajectory and a previously registered standard movement trajectory so as to authenticate the correctness of the three-dimensional continuous trajectory and thus authenticating the electronic apparatus.
US09141772B2	Trust conferencing apparatus and methods in digital communication A conferencing application executing on a computerized appliance from a machine-readable medium, the computerized appliance coupled to one or more networks is provided, the application including functionality for responding to requests to join a conference, and for enabling requesters as participants, functionality for receiving and rendering text, voice or video data from each registered participant as text, voice or video data to be transmitted to individual ones of other participants, functionality for controlling which received text, voice or video data is transmitted to which participants, and functionality for receiving and executing instructions from a trust authority.
US09141771B1	Methods and systems for embedded licensing from multiple license sources In embedded licensing from multiple license sources, a hardware device sends a capability request when a new licensed capability or modification to an existing licensed capability is desired. The hardware device transmits a first capability request to a first server and receives a first capability response from the first server. The hardware device then transmits a second capability request to a second server and receives a second capability response from the second server. When the first server and the second server are the same, regenerative licensing is activated by the hardware device, and an authorized capabilities list of the second capability response replaces an authorized capabilities list of the first capability response. When the first server and the second server are distinct, cumulative licensing is activated by the hardware device, and an authorized capabilities list of the second capability response is added to an authorized capabilities list of the first capability response.
US09141766B2	Perfusion scanning detects angiogenesis from similarity in evolution of local concentrations of contrast agent The invention relates to using a perfusion scanning medical imaging technique to generate an image of a perfusable structure of an organism. A fluid is flowing through the structure, and a dose of a traceable agent is present in the fluid. The evolution of the spatial concentration of the agent, e.g., a set of values of the magnitude of the concentration assumed at various moments over a period of time, is determined for a plurality of locations within the structure. The spatial pattern of the evolutions is analyzed and an image is generated on the basis of this analysis in order to enable the medical practitioner to draw conclusions about the dispersion characteristics of the perfusable structure.
US09141762B2	System and method for analyzing and controlling epidemics A method for analyzing and controlling epidemics in which an initiating signal is received indicative of a list of newly classified carriers of an infectious disease from an authorized health authority. Location data is received for a mobile device and a mobility pattern derived from the received location data is compared with a mobility pattern of first users to determine occurrence of a proximity event, during which one of the first users was spaced from a given carrier less than a predetermined distance. The proximity event is ranked in terms of the likelihood that the given carrier was involved in the transmission of the disease during the proximity event. If the ranking of the proximity event is higher than a predetermined level, the process is repeated for the first user participating in the proximity event and for second users. Corrective action information is then transmitted.
US09141761B2	Apparatus and method for assisting user to maintain correct posture An apparatus for assisting a user to maintain a correct posture is provided. The apparatus includes a determining unit configured to determine whether the user is using a portable terminal in a correct posture based on a user's face image captured by the portable terminal, an angle of inclination of the portable terminal, or any combination thereof, and an alarming unit configured to provide a predetermined alarm according to a result of determination by the determining unit.
US09141752B2	EDA tool and method for conflict detection during multi-patterning lithography A method includes accessing data representing a layout of a layer of an integrated circuit (IC) having a plurality of polygons defining circuit patterns to be divided among a number (N) of photomasks over a single layer of a semiconductor substrate, where N is greater than two. The method further includes inputting a conflict graph having a plurality of vertices, identifying a first and second vertex, each of which is connected to a third and fourth vertex where the third and fourth vertices are connected to a same edge of a conflict graph, and merging the first and second vertices to form a reduced graph. The method further includes detecting at least one or more vertex in the reduced having a conflict. In one aspect, the method resolves the detected conflict by performing one of pattern shifting, stitch inserting, or re-routing.
US09141751B2	Method of forming a pattern A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.
US09141749B2	Interconnect structures and methods for back end of the line integration A method of forming a semiconductor structure includes forming a sacrificial conductive material layer. The method also includes forming a trench in the sacrificial conductive material layer. The method further includes forming a conductive feature in the trench. The method additionally includes removing the sacrificial conductive material layer selective to the conductive feature. The method also includes forming an insulating layer around the conductive feature to embed the conductive feature in the insulating layer.
US09141745B2	Method and system for designing Fin-FET semiconductor device A method includes providing a first layout of a semiconductor device comprising a plurality of cells representing circuit elements, and providing a cell library comprising a plurality of cells in a processor. The circuit elements comprise a plurality of fin field effect transistors (Fin-FETs). Each of the plurality of cells in the cell library is displayed with a respectively different marker indicating a respective fin height. The method further includes generating a second layout for the semiconductor device to be fabricated, by placing or replacing at least one cell from the cell library in a respective location in the first layout. The at least one cell from the cell library comprises a Fin-FET with a respective fin height different from an adjacent Fin-FET in the second layout.
US09141741B1	Methods, systems, and articles of manufacture for implementing mixed-signal electronic circuit designs with power data in standardized power formats Some aspects are directed at methods and systems that directly specifies or uses standardized power data in standardized format(s) in various design tasks for implementing mixed-signal electronic designs by using native process(es) or module(s) of standardized power format framework(s) to evaluate legal signals or expressions to generate the first output and evaluation process(es) or module(s) to evaluate illegal signals or expressions to generate the second output for the design tasks, without using wrappers to encapsulate circuit blocks generating illegal signals and hence disrupt the original design hierarchical structures or using translators to translate illegal signals or expressions into corresponding legal signals or expressions for the standardized power format frameworks. The methods or systems evaluate combinations of legal and illegal signals and expressions by forwarding both the first and second outputs to standardized power format frameworks to use their native process(es) or module(s) to evaluate the combinations.
US09141740B2	Methods, systems, and articles of manufacture for implementing full-chip optimization with reduced physical design data Disclosed are methods, systems, and articles of manufacture for implementing full-chip optimization across block boundaries with reduced physical design data. Some embodiments create a partial netlist and reduced physical data by identifying and including side instance(s) or side path(s) in the reduced physical data and then include or exclude side instance(s) or side path(s) in the reduced physical data. The method or the system may then perform full-chip optimization across individual block boundaries with the reduced physical data. Some embodiments further merge the post-optimization data back into the original data while reducing logic and physical disturbance to existing designs. Some embodiments anchor driver instance(s) that correspond to excluded side instance(s) or side path(s) to ensure LEC cleanliness and may further trim timing graph(s) based at least on the partial netlist. Some embodiments account for parasitics without static parasitic files. Various embodiments apply to both hierarchical and non-hierarchical designs.
US09141739B2	LSI design method Buffers on a clock tree are reduced, as long as there is enough set-up margin, in order to reduce power consumption in the clock tree. An FF group coupled to a partial tree, which is a part of the clock tree and expanded from the branch point being focused on, is defined as the target FF and the other FFs are defined as non-target FFs. The target buffer of an elimination candidate and the target and non-target FFs are defined so as not to change the slack in principle in a signal propagation path between the non-target FFs even if the buffer is eliminated. The buffer which can be eliminated is specified within a range in each signal propagation path which has a start point at the non-target FF and an end point at the target FF and in each signal propagation path between the target FFs.
US09141737B1	Analysis of stress impact on transistor performance Roughly described, a method for approximating stress-induced mobility enhancement in a channel region in an integrated circuit layout, including approximating the stress at each of a plurality of sample points in the channel, converting the stress approximation at each of the sample points to a respective mobility enhancement value, and averaging the mobility enhancement values at all the sample points. The method enables integrated circuit stress analysis that takes into account stresses contributed by multiple stress generation mechanisms, stresses having vector components other than along the length of the channel, and stress contributions (including mitigations) due to the presence of other structures in the neighborhood of the channel region under study, other than the nearest STI interfaces. The method also enables stress analysis of large layout regions and even full-chip layouts, without incurring the computation costs of a full TCAD simulation.
US09141736B2	Method for power estimation for virtual prototyping models for semiconductors The present invention may comprise an apparatus and method for calculating power consumption, including a unit for generating a clock-level analysis without synthesis of an algorithm description and calculating operating ratios of storage elements and arithmetic units. The invention may also comprise a method for estimating the power to be consumed by a SystemC model. By estimating this value, a user may gauge the amount of power a specific semiconductor design might consume, once manufactured into a chip.
US09141733B2	Method, system, and computer program product for modeling resistance of a multi-layered conductive component Disclosed is a technique for modeling resistance of a conductive component of a device, where the component comprises multiple conductive materials. If necessary (e.g., for a complex conductive component), the component is divided into multiple conductive regions. For a given conductive region, current flow-through and current flow-in-and-terminate axes are determined and the conductive region is divided into layers. Relative electric currents flowing along the current flow-through axis in each layer and along the current flow-in-and-terminate axis in each layer are evaluated to determine a total resistance value for the conductive region. For a complex conductive component, these processes are repeated for all conductive regions and an overall resistance value is determined based on the corresponding total resistance values and, as calculated for each conductive region, a ratio of maximum electric current flowing in/out of the conductive region to the total electric current flowing out of the complex conductive component.
US09141732B2	Simulation execution method, program, and system A technique for increasing the speed of parallel running of logical processes without sacrificing the accuracy of data update timing in a parallel discrete event simulation system.A logical process involving a longer receiving time lag than that of sending is executed by an amount of initial shift for a predetermined period before the simulation. The initial shift is set to be one-half of a value of difference between the receiving time lag and the sending time lag. The logical process executed with timing displaced by the amount of initial shift runs by exchanging null messages with each other. Each null message is delivered to a correspondent logical process after the predetermined time lag, and each logical process further sends the correspondent logical process a null message upon receipt of the null message. Thus, there is a progression of simulation by synchronizing them through the null messages.
US09141727B2	Information search device, information search method, computer program, and data structure An information search device includes: a path field generating part that, for each node, generates a path field in which paths with the node as an origin are connected; an index generating part that, for each element configuring graph structure information, generates a posting list as a list of information composed of a node having a path field including the element and location information representing a location where the element appears in the path field, and generates an index repository in which the element and the posting list are associated; a search path generating part that generates a search path representing a search condition; and a searching part that extracts a node having a path field satisfying an appearance sequence of elements included in the search path based on the location information of the posting list.
US09141725B2	Integration of static and dynamic data for database entities and the unified presentation thereof A method is disclosed for presenting static and dynamic data corresponding to an entity within an application on a mobile device. An entity object is created as part of a data model within the application such that the entity object has a plurality of fields with the plurality of fields having static data corresponding to the entity. Based on the static data corresponding to the entity, dynamic data corresponding to the entity is received into the entity object from at least one of a plurality of applications executable within the mobile device. The static and dynamic data from the entity object corresponding to the entity is displayed simultaneously within a user interface of the application in a single presentation view.
US09141721B2	User specific desktop hyperlinks to relevant documents A method and system for displaying a list of documents on a desktop background on a computing device including assigning each user from a group of users to a group membership being selected from among a plurality of group memberships. An electronic file may be determined for users assigned to the selected group membership. The electronic file may be assigned as a desktop background on a computing device of each user assigned to the group membership, the assignment of the electronic file operable to cause the electronic file to be displayed as the desktop background, the electronic file including a predetermined listing of links of documents associated with the group membership.
US09141719B2	Systems and methods for advanced targeting A system for testing the effectiveness of webpage configurations is disclosed. Tags indicating dependency between sections of a webpage may be associated with the sections. In response to a version of a first section of a webpage being tested, an associated tag may indicate that the content or behavior of a second section is dependent on the first section. A webpage configuration including content of the first section, and corresponding behavior and content of the second section, may be transmitted to a web client. Data may be collected indicating the effectiveness of the webpage configuration.
US09141716B2	Searching and browsing URLs and URL history System(s) and/or method(s) (“tools”) are described that present indicia for implicitly and explicitly user-associated web pages of a network browser application. The tools can present these indicia in a single graphic user interface, in response to a user's selection of a single unified access point, or in response to a search of the browser's user-associated web pages.
US09141715B2	Automated hyperlinking in electronic communication In a method for automated hyperlinking, a computer receives user input specifying a set of character sequence columns in a table to use for character sequence comparison. The computer detects whether a character sequence entered into an electronic communication in a user interface on a display matches one or more character sequences in fields of the set of character sequence columns. Responsive to the character sequence matching a single character sequence of the one or more character sequences in the fields of the set of character sequence columns, the computer retrieves, from an associated link field in the table, a hyperlink associated with the single character sequence. The computer inserts the hyperlink into the electronic communication.
US09141714B2	Image capture and identification system and process A digital image of the object is captured and the object is recognized from plurality of objects in a database. An information address corresponding to the object is then used to access information and initiate communication pertinent to the object.
US09141710B2	Persisting annotations within a cobrowsing session A request to navigate to a Uniform Resource Identifier (URI) can be received within a cobrowsing session. The cobrowsing session can be associated with a unique session identifier of a cobrowsing application. The cobrowsing application can be part of a collaboration software. An annotation previously associated with the URI from a historic cobrowsing session can be retrieved. Content associated with the URI can be obtained and presented within an interface associated with the cobrowsing session. The annotation can be presented within the content associated with the URI of the interface.
US09141709B1	Relevant file identification using automated queries to disparate data storage locations Relevant files are determined for a user upon detecting a user action such as save, load, open, view, share, or comparable ones associated with a file. The relevancy may be determined through one or more queries based on, a number of criteria, where the queries are executed on local or remote data stores related to the user. For example, files on the local computing device of the user, files in an enterprise network associated with the user, files on a social network subscribed by the user may be evaluated for various relevancy criteria. Files determined to be relevant may be prioritized, ordered, and/or grouped for suggestion to the user and presented through a user interface of an application performing the detected action.
US09141707B2	Context-based object retrieval in a social networking system Embodiments improve the ability of users of a social networking system to search for information that is likely to be relevant to them by learning and/or applying a search context associated with selector components used to search for objects of the social networking system. The search context is specific to the use of an individual selector and thus need not be as general as the context of an entire page or set of pages in which selectors can be embedded. The social networking system may learn the context of a selector by monitoring user selections from prior search results performed using the selector.
US09141703B1	Systems and methods for browsing historical content A system graphically plots articles. The system executes one or more search queries to search stored articles and receives results of the executed one or more search queries, where the results identify selected articles of the stored articles. The system further designates a graphical marker for each of the selected articles and plots each of the graphical markers on a graphical display.
US09141701B2	Device and method for distributed database keyword searching A method performed by a mobile communications device, including: populating a central database on the device with a title for each of a plurality of software modules installed on the device and associating each title with its software module; populating the central database with at least one keyword associated with each of the plurality of software modules and associating each keyword with its software module; receiving at the device a search query; displaying at the device a search result identifying at least one of the software modules installed on the device having either a title or one or more associated keywords matching the search query; and in response to receiving at the device a selection of a software module identified in the search result, activating the selected software module.
US09141697B2	Method, system and computer-readable storage medium for detecting trap of web-based perpetual calendar and building retrieval database using the same The present disclosure relates to a method, system and software executable by a processor associated with non-transitory computer-readable storage medium for detecting a trap of web-based calendar pages and building a retrieval database. According to an aspect of the disclosure, detecting a trap of web-based calendar pages includes clustering, by a clustering module, URLs corresponding to web pages stored in a database according to a predetermined standard, generating a regular expression by analyzing a date pattern included in a clustering result, and detecting, a cluster suspected of being a trap of web-based perpetual calendar pages using the generated regular expression.
US09141689B2	Persona management system for communications A system to apply persona styles to written communications. The system includes a communication analyzer and a modification engine coupled to the communication analyzer. The communication analyzer identifies an element of original content of a written communication and determines that the element of the original content of the written communication is incompatible with a selected persona style. The selected persona style defines a communication style. The modification engine modifies the original content of the written communication to replace the element of the original content with a substitute element that is compatible with the selected persona style.
US09141684B2	Methods and systems for synchronizing data in a multi-tenant database environment In accordance with embodiments, there are provided mechanisms and methods for synchronizing data in a database network system. These mechanisms and methods for synchronizing data in database network system can enable embodiments to provide users a synchronization button on a UI or synchronization field through an API for specifying data for synchronization. The ability of embodiments to provide users a synchronization button on a UI or synchronization field through an API for specifying data for synchronization can enable users to easily and efficiently change and update data in a database system.
US09141675B2	Methods and apparatus for targeting communications using social network metrics A method for a computer system includes receiving a first user communication, determining a first group of users, determining a target number of users, determining whether the first group of users includes the target number of users, and if not, providing the communication to the first group of users, determining a hierarchal mapping of groups of users in response to user memberships, determining a second group of users from the hierarchal mapping, determining a plurality of social network relationship factors for the second group of users with respect to the first user, and providing the communication to at least a subset of users in the second group of users in response to the first plurality of social network relationship factors.
US09141667B2	Efficient join with one or more large dimension tables Embodiments of the invention relate to processing queries that utilize fact and/or dimension tables. In one aspect, a pre-join filtering phase precedes a star join. The necessary conditions for the pre-join filtering are considered for a given SQL query, including an estimated size of the hash table exceeding a threshold and presence of a local predicate either on the fact table or one or more dimension tables that is not a large dimension table. Once the necessary conditions are satisfied, the execution of the query exploits the pre-join filtering to build a pre-join output filter from columns of a reduced fact table that joins with each large dimension table. Thereafter, all the dimension tables and the fact table are joined in a star join while exploiting each pre-join filter.
US09141665B1	Optimizing search system resource usage and performance using multiple query processing systems The present disclosure provides a system and methods for intelligently optimizing search system resource usage and performance using multiple data store technologies. A search query optimization system may utilize multiple query processors, such as a general search engine and one or more specialized data stores, to efficiently and intelligently manage and route queries. The search query optimization system may be configured to evaluate the performance of the various query processors for various types of queries, and may use this information to intelligently route search queries to the query processors best suited to service them.
US09141660B2	Intelligent evidence classification and notification in a deep question answering system System, method, and computer program product to identify changes in evidence used to answer questions by a deep question answering system, by identifying a first evidence related to a feature, the deep question answering system having identified the feature as being relevant to answering a first type of question of a plurality of types of questions, and responsive to: (i) detecting a change in the first evidence, and (ii) determining that a confidence score of a first response generated for a first question, of the first type of question, exceeds a confidence threshold, generating an updated response for the first question based on the changed first evidence.
US09141659B1	Systems and methods for scrubbing confidential insurance account data Methods and systems for scrubbing confidential insurance account information are provided. According to embodiments, a scrubbing server can receive a request to scrub confidential insurance data that includes the contents of an insurance account information database and an indication of the category of confidential data stored in the database. The scrubbing server can scrub the valid data contained in the received database, replacing confidential information with “scrambled” data that is not confidential. The scrubbing server can transmit the contents of the scrubbed database back to the requesting party.
US09141655B2	Multi-screen reporting of deviation patterns within a data set Methods for analyzing and rendering business intelligence data allow for efficient scalability as datasets grow in size. Human intervention is minimized by augmented decision making ability in selecting what aspects of large datasets should be focused on to drive key business outcomes. Variable value combinations that are predominant drivers of key observations are automatically determined from several competing variable value combinations. The identified variable value combinations can then be then used to predict future trends underlying the business intelligence data. In another embodiment, an observed outcome is decomposed into multiple contributing drivers and the impact of each of the contributing drivers can be analyzed and numerically quantified—as a static snapshot or as a time-varying evolution. Similarly, differences in observations between two groups can be decomposed into multiple contributing sub-groups for each of the groups and pairwise differences among sub-groups can be quantified and analyzed.
US09141654B2	Executing user-defined function on a plurality of database tuples According to an example, in a method for executing a user-defined function on a plurality of database tuples, the user-defined function and an analysis function may be obtained. In addition, the plurality of database tuples may be divided into parts by a processor, the processor may be caused to execute the analysis function on each of the parts, and the processor may be caused to execute the user-defined function on at least one of the parts for which the analysis function returned a true predicate.
US09141653B2	Real-time data management for a power grid A real-time data management system, a system, method, apparatus and tangible computer readable medium for accessing data in a power grid are described for controlling a transmission delay of real-time data delivered via a real-time bus, and for delivering real-time data in a power grid. A unified data model covering various organizations and various data resource is described. Further, a management scheme for clustered data is described to provide a transparent and high speed data access. The solutions described may efficiently manage the high volume of real-time data and events, provide data transmission with a low latency, provide flexible extension of both the number of data clusters and the number of databases to ensure high volume data storage, and achieve a high speed and transparent data access. Additionally, rapid design and development of analytical applications, and the near real-time enterprise decision-making business may be enabled.
US09141652B2	Method and system for categorizing items in both actual and virtual categories Systems and a method for categorizing items in both actual and virtual categories are described. The method receives a selection that identifies a parent category and a first category based on the parent category. The method further identifies the plurality of data items based on a link from the first category to a second category. The data items are not user-classifiable under the first category and are user-classified under the second category. The method finally communicates a user interface, over a network, that includes the plurality of data items.
US09141644B2	Affinity based ranked for search and display Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for affinity based ranking and display of digital photographs. In one aspect, a method includes receiving an identifier that identifies a first user; accessing data defining relationships of the first user to second users; accessing digital photographs; determining digital photographs that are each associated with one or more of the first user and the second users; for each digital photograph, generating a photograph score based on the association with one or more of the first user and the second users and corresponding affinity scores representing the relationships of the first user to the second users; ordering the digital photographs according photograph scores; and providing one or more of the digital photographs to a user device of the first user according to the order.
US09141641B2	Aggregating based on hierarchy and scaling input According to an example embodiment, a method may include accessing, by at least one processor from at least one non-transitory computer-readable memory device, a map and a hierarchy of places included in the map. The method may also include accessing, by the at least one processor from the at least one non-transitory computer-readable memory device, quantitative information associated with places in the hierarchy. The method may also include receiving a scaling input from a user. The method may also include determining, by the at least one processor, a level in the hierarchy at which to aggregate the quantitative information, based on the scaling input. The method may also include aggregating, by the at least one processor, the quantitative information for a plurality of the places at the determined level, the aggregating including independently aggregating the quantitative information associated with places below at least two of the plurality of places at the determined level. The method may also include generating, by the at least one processor, graphical data configured to display the map.
US09141638B1	File sharing A first device is configured to operate as a media transmitter or a media receiver. The first device includes a memory configured to store a playlist of media files accessible to the first device. An output circuit is configured to receive the playlist from one or more second devices. Responsive to a first media file in the playlist being stored in the first device, the first device is configured to operate as a media transmitter and control transmitting of the first media file from the first device to the one or more second devices. Responsive to the first media file not being stored in the first device, the first device is configured to transfer control of transmitting from the first device to a selected one of the second devices, and operate as a media receiver to receive the first media file from the selected one of the second devices.
US09141635B2	Transparently upgrading derived database objects A method for transparently upgrading derived database objects commences upon analysis of the data dictionary definition for an initial derived database object as compared to the data dictionary definition for a patched derived database object, then determining if a regenerated instance of the derived database object would be logically different from the initial derived database object. The determination is based on comparisons of the definitions of the initial derived database objects and patched definitions of respective database objects. The method produces a regenerated instance of the derived database object when a regenerated instance of the patched derived database object would be logically different from the initial derived database object. The method will suppress the production of a regenerated instance when a regenerated instance of the derived database object would not be logically different from the initial derived database object. Once regenerated or suppressed, a post-upgrade software application accesses the regenerated derived database object instance (if regenerated) or the initial derived database object if the regenerated instance was suppressed.
US09141634B2	Method for automatic data replication and terminal Embodiments of the present invention provide a method for automatic data replication and a terminal. The method includes: after a data link to a peer end is established, send to the peer end a search request used for searching for a second folder whose folder name is the same as that of a first folder, where the search request includes a folder name of the first folder; when the peer end determines that the peer end includes the second folder, receiving attribute information of each piece of second data in the second folder, where the attribute information of each piece of second data is sent by the peer end; when the attribute information of the second data is inconsistent with attribute information of first data in the first folder, sending a replication request to the peer end.
US09141633B1	Special markers to optimize access control list (ACL) data for deduplication Techniques for deduplicating a backup stream with ACL data embedded therein are described. According to one embodiment, a storage system receives a backup stream from a client, where the backup stream includes multiple data streams to be stored in the storage system. Each data stream represents a file or a directory of one or more files of a file system associated with the client. The storage system is to scan the backup stream to recognize an access control list (ACL) marker associated with at least one of the data streams, where the ACL marker identifies ACL data representing an ACL of the at least one data stream. The storage system is to chunk using a predetermined chunking algorithm the ACL data into a plurality of ACL data chunks to be stored in the storage system in a deduplicated manner.
US09141627B2	Providing a user access to data files distributed in a plurality of different types of user devices A method of providing a user access to data files distributed in a plurality of different types of user devices is described. According to the method, a copy of data files stored locally at each user device is received at a server via a respective network communication link. Index information is generated based on the received data files. The index information facilitates performing a search operation using user-provided search information to select any of the data files. If a selected data file from the search operation is not stored locally at a desired user device, a copy of the selected data file is sent from the server via the respective network communication link to provide the user access to the selected data file at the desired user device.
US09141626B2	Volume having tiers of different storage traits A volume system that presents a volume having an extent of logical addresses to a file system. A volume exposure system exposes the volume to the file system in a manner that the volume has multiple tiers, each offering storage of different traits. This is performed using multiple heterogenic underlying storage systems, each having different storage system-specific traits. Each underlying storage system may be hardware, software, or a combination thereof that permits each storage system to expose storage having the particular storage system-specific traits to the file system. The volume system supports each tier by mapping logical addresses of the tier to portions of underling storage systems that are consistent with the tier traits.
US09141618B2	Method and apparatus for processing metadata in one or more media streams An approach is provided for processing metadata in one or more media streams. A media metadata processing platform determines to parse from a media data stream for metadata components. The media metadata processing platform also causes, at least in part, a storing of the parsed metadata components. The media metadata processing platform further determines to mark the media data stream with one or more hooks for embedding the parsed metadata components, one or more computational closures, or a combination thereof, the one or more computational closures being serialized.
US09141617B1	Social lens for search The subject matter of this specification can be implemented in, among other things, a method for refining search results. The method includes a step for receiving a request to refine search results, wherein the request identifies a first social circle to apply for refining the search results, wherein the first social circle comprises a preset group of contacts of a user within a social network service. The method also includes a step for retrieving search results based on the received request and a step for refining the retrieved search results based on the identified first social circle. The method also includes a step for providing at least a portion of the refined search results to an electronic device for display.
US09141612B2	Method of obtaining an electronically-stored financial document An electronically stored financial document is either maintained in a first storage system when a parameter associated with the document is greater than a pre-selected parameter or in a second storage system when the parameter associated with the document is less than or equal to the pre-selected parameter. A request for a stored financial document is received and the requested financial document parameter is compared to the pre-selected financial document parameter to determine if the electronically stored financial document's parameter is more than, less than, or equal to the pre-selected parameter. In processing the request, a processing unit electronically accesses one of the storage systems in response to the comparison of the pre-selected parameter to the electronically stored financial document's parameters. After accessing the appropriate storage system, the requested electronically stored financial document can be reproduced, and/or distributed.
US09141611B2	Aggregated web analytics request systems and methods Provided is a method that includes receiving a file from a network site, wherein the file defines display information for one or more content items, parsing the file to display the one or more content items. Parsing includes encountering, in the file, a request to transmit analytics data to a remote analytics site, delaying transmission of the analytics data to wait for encountering of subsequent requests in the file, encountering, in the file, one or more subsequent requests to transmit other analytics data to the remote analytics site, aggregating the analytics data and the other analytics data into an analytics request for the remote analytics site, and sending the analytics request to the remote analytics site, such that the remote analytics site receives the analytics data and the other analytics via the same analytics request.
US09141608B2	Data validation in docketing systems A data validation system and method for a fully or partially automated docket management solution. The system may require single-user double entry and/or double user data re-entry for validation and confirmation of data content. Un-validated/un-confirmed data may be quarantined or otherwise hidden from part or all of the rest of the docket management system.
US09141605B2	Attribution using semantic analysis A method and system for semantic attribution of a request. Source data statements for the request are received. A selection of a domain for the received source data statements is received. The received source data statements are semantically analyzed, which includes matching elements in the received source data statements to respective one or more entries in an ontology associated with the selected domain. The ontology includes items and relationships that define the selected domain. Each element in the received source data statements is a word or a phrase. The one or more entries are assigned to the matched elements, respectively, to annotate each matched element with a respective annotation consisting of the respective one or more entries. The annotated elements are saved with the respective annotations. The annotations are used to generate a search query for the request.
US09141602B2	Handheld electronic device and associated method enabling spell checking in a text disambiguation environment An improved handheld electronic device and associated method enable spell checking in a reduced keyboard and disambiguation environment. The improved spell checking routine converts a misspelled word into a canonical version thereof and receives from a dictionary 42 proposed letter for possible acceptance by the spell checking routine. The spell checking routine advantageously maintains states of various spell check algorithms in order to ensure that no letter is accepted that would require an edit distance of more than one from the misspelled word. The improved spell checking routine advantageously reduces unnecessary processor operation by reducing the extent to which certain portions of the dictionary 42 are searched multiple times during a spell checking operation.
US09141601B2	Learning device, determination device, learning method, determination method, and computer program product According to one embodiment, a learning device includes an input receiving unit, an inferring unit, and a learning unit. The input receiving unit receives an input of first data representing a sentence, rear boundaries of elements having an anaphoric relation within the sentence, and a correspondence relation between a first element that is an antecedent and a second element that is an anaphor. The inferring unit infers a range of the first element and a range of the second element that are determined by front boundaries and the rear boundaries by inferring the front boundaries of the first element and the second element based on the first data and a predetermined rule. The learning unit learns criteria used for determining whether or not there is the anaphoric relation in an arbitrary sentence based on the range of the first element and the range of the second element.
US09141600B2	Computer arrangement for and computer implemented method of detecting polarity in a message The present invention relates to automatic sentiment analysis by a computer arrangement and a computer implemented method. A message is presented to the computer arrangement which stores a set of patterns. Each pattern has a word and an associated part-of-speech tag. The message is compared against the patterns as stored in memory rendering a set of matching patterns. The set of matching patterns is then processed in accordance with a set of rules taking into account presence of patterns in the message that may add to a positive polarity and negative polarity, and patterns that may amplify, attenuate or flip such positive polarity or negative polarity.
US09141599B2	Handheld electronic device with reduced keyboard and associated method of providing quick text entry in a message An improved handheld electronic device having a reduced keyboard provides facilitated language entry by making available to a user certain words that a user may reasonably be expected to enter. In some situations, certain words can be stored, for example, in a temporary dictionary for use in particular situations. For instance, the names of the recipients of an electronic message might be stored in a temporary dictionary for rapid retrieval when entering a salutation in the message. As another example, a number of the words in an existing electronic message may be stored in a temporary dictionary and made available to a user when replying to or forwarding the message since the existing message might include words that the user might reasonably be expected to type in the reply message or the forwarded message.
US09141596B2	System and method for processing markup language templates from partial input data Template processing techniques to generate documents, such as HTML documents, in situations where the template depends on input data that are available in different locations are provided. A template can include a plurality of template-processing instructions which can specify how to bind input data from a data structure to the template. The input data can be declared as template parameters in the template. According to aspects of the present disclosure, the template can include an annotation associated with one or more of the template parameters. The annotation can be indicative of the availability of input data at the server or at a client device.
US09141588B2	Communication using handwritten input Technologies are generally described for transmitting a handwritten input. In some examples, a method performed under control of a handwriting device may include receiving a handwritten input including a first part including a text message, recognizing the text message, identifying a user of the handwritten input, determining an emotion attribute of the identified user based on the handwritten input, determining a font information regarding a font of the first part based on the emotion attribute, generating a data file including the text message and the font information and transmitting the data file to a receiving device.
US09141587B2	Print control method and print control apparatus for controlling printing of structured document A print control method causes a printing apparatus to print an image on the basis of a structured document containing a plurality of hierarchical elements. In the print control method, a print preview image and a tree view showing a hierarchy of the elements contained in the structured document are displayed. In the tree view, the elements are displayed in a selectable manner When an instruction to specify an element is input, an updated print preview image including the specified element is displayed. Thus, the user can easily remove unnecessary part of a Web page on a print preview screen and print the resulting Web page.
US09141586B2	Method, apparatus, system for single-path floating-point rounding flow that supports generation of normals/denormals and associated status flags A mechanism for performing single-path floating-point rounding in a floating point unit is disclosed. A system of the disclosure includes a memory and a processing device communicably coupled to the memory. In one embodiment, the processing device comprises a floating point unit (FPU) to generate a plurality of status flags for a rounded value of a finite nonzero number. The plurality of status flags are generated based on the finite nonzero number without calculating the rounded value of the finite nonzero number. The plurality of status flags comprises an overflow flag and an underflow flag. The FPU determines whether a rounded value should be calculated for the finite nonzero number based on the plurality of status flags and whether the overflow flag is asserted. Upon determining that the rounded value should be calculated for the finite nonzero number based on the plurality of status flags and that the overflow flag is asserted, the FPU calculates the rounded value of the finite nonzero number based on an overflow rounding. Upon determining that the rounded value should be calculated for the finite nonzero number based on the plurality of status flags and that the overflow flag is not asserted, the FPU calculates the rounded value of the finite nonzero number based on a blended reduced precision rounding.
US09141579B2	Apparatus and method for routing data among multiple cores An apparatus and method for routing data among multicores that is capable of reconfiguring the connection among the multicores are provided. The apparatus includes a configuration information generating unit and at least one switching unit. The configuration information generating unit is configured to generate configuration information that indicates a local network connection among the multicores based on a program counter received from each of the multicores. The at least one switching unit is configured to change a data transfer path among the multicores based on the configuration information.
US09141578B2	Robust live migration using shared filesystem A method for transferring guest physical memory from a source host to a destination host during live migration of a virtual machine (VM) involves (a) transmitting pages of the guest physical memory from the source host to the destination host over a network connection, (b) transferring state information from the source host to the destination host, (c) while performance benefits regarding continued access to the guest physical memory on the source host persist, using the transferred state information to run the VM on the destination host in place of running the VM on the source host, and (d) while the VM is running on the destination host, writing pages of the guest physical memory from the source host to a shared datastore such that the destination host can retrieve the written guest physical pages from the shared datastore.
US09141575B2	Power supply circuit for universal serial bus interface A power supply circuit includes a first electronic switch mounted near a front universal serial bus (USB) interface, a second electronic switch mounted near a rear USB interface, and a third electronic switch. The first electronic switch supplies power for the front USB interface. The second electronic switch supplies power for the rear USB interface. The third electronic switch supplies power for the front USB interface and the rear USB interface when the first and second electronic switches are off.
US09141574B2	Image forming apparatus and low power driving method thereof An image forming apparatus having a USB communication function includes a control interface unit to perform USB control communication, a data interface unit to perform USB data communication, and a control unit to perform an event in a low power mode according to a signal input through the control interface unit, and to perform an event in a normal mode according to a signal input through the control interface unit and the data interface unit. Therefore, the low power mode may be effectively implemented.
US09141573B2	Power-optimized interrupt delivery An apparatus, method, system, and computer-readable medium are disclosed. In one embodiment the apparatus is a processor. The processor includes thread remapping logic that is capable of tracking hardware thread interrupt equivalence information for a first hardware thread and a second hardware thread. The processor also includes logic to receive an interrupt issued from a device, wherein the interrupt has an affinity tied to the first hardware thread. The processor also includes logic to redirect the interrupt to the second hardware thread when the hardware thread interrupt equivalence information validates the second hardware thread is capable of handling the interrupt.
US09141566B2	Method of accessing on-chip read only memory and computer system thereof A method of accessing an on-chip read only memory (ROM) includes dividing a frequency of a system clock by a specific divisor, in order to generate a ROM clock; combining a specific number of adjacent addresses into a combined address, wherein the specific number is determined according to the specific divisor; inserting a first stall signal into a real output data, wherein a length of the first stall signal is determined in order to meet a timing requirement for accessing the on-chip ROM; generating an output data of the on-chip ROM according to the combined address, wherein a width of the output data is extended by a specific multiple which is determined according to the specific number; and generating a first delay corresponding to the length of the first stall signal in the address.
US09141564B1	Interconnection of peripheral devices on different electronic devices A peripheral device connected to a local electronic device which is connected to at least one communication network can communicate with a peripheral device attached to a remote electronic device as if the remote peripheral device was locally attached. Data designated for the remote peripheral device is received by a local virtual device object and transmitted to the remote electronic device via at least one of the electronic devices communication interfaces or peripheral devices. Data received by the remote electronic device's communication interface or peripheral device is written to the peripheral device at the remote electronic device by a virtual device object. For compensation of different transfer speeds or outages between the peripheral device and the communication interface or another peripheral device the virtual device provides the ability to utilize the virtual devices emulation driver that is attached to the virtual device object as an I/O buffer. As the invention provides a generic method for virtualization of a remote peripheral device it works independent from specific types of devices and Operating Systems. As the invention works with synchronous and asynchronous communication standards and does not require a specific network transport protocol it can be used with any available communication interface or peripheral device of the electronic device.
US09141556B2	System translation look-aside buffer with request-based allocation and prefetching A system TLB accepts translation prefetch requests from initiators. Misses generate external translation requests to a walker port. Attributes of the request such as ID, address, and class, as well as the state of the TLB affect the allocation policy of translations within multiple levels of translation tables. Translation tables are implemented with SRAM, and organized in groups.
US09141555B2	Synchronizing a translation lookaside buffer with an extended paging table A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
US09141550B2	Specific prefetch algorithm for a chip having a parent core and a scout core Embodiments relate to a method, system, and computer program product for prefetching data on a chip having at least one scout core and a parent core. The method includes saving a prefetch code start address by the parent core. The prefetch code start address indicates where a prefetch code is stored. The prefetch code is specifically configured for monitoring the parent core based on a specific application being executed by the parent core. The method includes sending a broadcast interrupt signal by the parent core to the at least one scout core. The broadcast interrupt signal being sent based on the prefetch code start address being saved. The method includes monitoring the parent core by the prefetch code executed by at least one scout core. The scout core executes the prefetch code based on receiving the broadcast interrupt signal.
US09141549B2	Memory system with read and write caches and method of controlling memory system with read and write caches A controller sets, out of a data range that is specified in a read request from a host device, a predetermined size of a first data range that follows a top portion of the data range and a predetermined size of a second data range that follows the first data range, and after transfer, to the host device, of data corresponding to the first data range from a second storage unit or a third storage unit having smaller data output latency than the first storage unit in which read/write of data is performed is started, the controller searches for data corresponding to the second data range in the second storage unit or the third storage unit.
US09141544B2	Cache memory with write through, no allocate mode In a particular embodiment, a method of managing a cache memory includes, responsive to a cache size change command, changing a mode of operation of the cache memory to a write through/no allocate mode. The method also includes processing instructions associated with the cache memory while executing a cache clean operation when the mode of operation of the cache memory is the write through/no allocate mode. The method further includes after completion of the cache clean operation, changing a size of the cache memory and changing the mode of operation of the cache to a mode other than the write through/no allocate mode.
US09141542B1	System, method and computer program product for host system LTFS auto-adaptation System, apparatus and computer program product for automatically determining a type of tape drive that is present in a media library and accessing the tape drive using commands that are adapted to the identified type of the drive. In one embodiment, a system includes a set of hosts, a media library and an archive node appliance. The archive node appliance is coupled between the hosts and the media library to provide the hosts with access to a set of drives and media in the media library. The archive node appliance has a processor and a data store that contains instructions that are executable on the processor to perform, for one or more of the drives, the method of identifying the type of the drive, identifying a set of software applications adapted to control the drive, and executing the software application, where the drive is accessed through the software application.
US09141541B2	Nested channel address interleaving A system and method for mapping an address space to a non-power-of-two number of memory channels. Addresses are translated and interleaved to the memory channels such that each memory channel has an equal amount of mapped address space. The address space is partitioned into two regions, and a first translation function is used for memory requests targeting the first region and a second translation function is used for memory requests targeting the second region. The first translation function is based on a first set of address bits and the second translation function is based on a second set of address bits.
US09141540B2	Garbage collection of interned strings Provided are techniques for a garbage-collected interned string table. Reference objects that each reference strings in the interned string table are created. The reference objects and the strings referenced by the reference objects in the interned string table are marked with a current generation. Garbage collection is performed by: advancing the current generation to a next generation; in response to the reference objects in a previous generation from the current generation advancing to an acquired references state, promoting the reference objects and the strings referenced by the reference objects in the previous generation to the current generation; and deleting the strings that are marked with the previous generation in the interned string table.
US09141537B2	Magnetic random access memory journal A flash memory system comprises a logic block interface operable to receive a write command to store data from a host computer, a flash memory device operable to store the data in response to the write command, and a non-volatile memory communicatively coupled to the flash memory device and the logic block interface operable to temporarily store the data, and to provide the stored data to be written to the flash memory device in the event of a disruption during execution of the write command.
US09141533B2	Data storage device and flash memory control method for performing garbage collection A data storage device and a Flash memory control method. A data storage device comprises a Flash memory and a controller. The controller controls the Flash memory in accordance with firmware. When the firmware is available for at least a predetermined time period without being requested by a host, the controller, driven according to the firmware, performs a garbage-collection operation on the Flash memory without a request from the host.
US09141532B2	Dynamic overprovisioning for data storage systems Disclosed embodiments are directed to systems and methods for dynamic overprovisioning for data storage systems. In one embodiment, a data storage system can reserve a portion of memory, such as non-volatile solid-state memory, for overprovisioning. Depending on various overprovisioning factors, recovered storage space due to compressing user data can be allocated for storing user data and/or overprovisioning. Utilizing the disclosed dynamic overprovisioning systems and methods can result is more efficient utilization of cache memory, reduction of write amplification, increase in a cache hit rate, and the like. Improved data storage system performance and increased endurance and longevity can thereby be attained.
US09141531B1	Data flush from cache to disk based on track limit A disk drive having a disk, a head actuated over the disk, a volatile semiconductor memory (VSM), a command queue, and control circuitry operable to receive a plurality of write commands from a host, store the plurality of write commands in the command queue, store write data for the plurality of write commands in the VSM, and flush, from the VSM to the disk, a portion of the write data corresponding to a predetermined number of tracks.
US09141528B2	Tracking and handling of super-hot data in non-volatile memory systems A non-volatile memory organized into flash erasable blocks sorts units of data according to a temperature assigned to each unit of data, where a higher temperature indicates a higher probability that the unit of data will suffer subsequent rewrites due to garbage collection operations. The units of data either come from a host write or from a relocation operation. Among the units more likely to suffer subsequent rewrites, a smaller subset of data super-hot is determined. These super-hot data are then maintained in a dedicated portion of the memory, such as a resident binary zone in a memory system with both binary and MLC portions.
US09141525B2	Adaptive prestaging in a storage controller In one aspect of the present description, at least one of the value of a prestage trigger and the value of the prestage amount, may be modified as a function of the drive speed of the storage drive from which the units of read data are prestaged into a cache memory. Thus, cache prestaging operations in accordance with another aspect of the present description may take into account storage devices of varying speeds and bandwidths for purposes of modifying a prestage trigger and the prestage amount. Still further, a cache prestaging operation in accordance with further aspects may decrease one or both of the prestage trigger and the prestage amount as a function of the drive speed in circumstances such as a cache miss which may have resulted from prestaged tracks being demoted before they are used. Conversely, a cache prestaging operation in accordance with another aspect may increase one or both of the prestage trigger and the prestage amount as a function of the drive speed in circumstances such as a cache miss which may have resulted from waiting for a stage to complete. In yet another aspect, the prestage trigger may not be limited by the prestage amount. Instead, the pre-stage trigger may be permitted to expand as conditions warrant it by prestaging additional tracks and thereby effectively increasing the potential range for the prestage trigger. Other features and aspects may be realized, depending upon the particular application.
US09141522B1	Virtual cluster immune system for dynamic testing During a testing technique, a pre-defined set of tests associated with a software product may be performed on different instances or versions of the software product (such as versions that have different user interfaces) in associated virtual environments. Moreover, during a given test, subsets of a group of individuals may interact with a given version of the software product. Initially, the subsets may be selected based on attributes of the individuals, such as: age, gender, occupation, and/or education level. However, subsequently the results of the executed pre-defined set of tests may be used to update the subsets. Furthermore, the testing technique may be repeated until a termination criterion is reached, such as a target use case of one or more of the subsets. In this way, the testing technique may be used to perform permutation testing.
US09141515B1	Limiting display content in editor for large data volumes An engine is interposed between a user and an editor. The engine is configured to receive messages from the editor denying user access to large data files. In response, the engine is configured to communicate a first message to the user asking whether the user desires to open a subset of the file contents using the editor. Upon receipt of an affirmative from the user, the engine is configured to communicate a second message to the user seeking input on a size of the file subset that is to be accessed. The engine then communicates to the editor, a third message specifying a size of the subset of data that is to be provided. In response to receiving the third message, the editor produces the requested subset of the stored data corresponding to the size indicated by the user.
US09141511B2	Method and system for verifying sleep wakeup protocol by computing state transition paths Disclosed are a method and a system for facilitating verification of program code implementing Sleep Wakeup protocol for a microcontroller. An input handling module is configured to receive metadata from user required for verification of the program code. Identification module is configured to identify abstract syntax tree (AST) nodes corresponding to each program point in the program code. A computation module is configured to compute an actual interrupt protection status (IPS), task lock status (TLS), path entities and shared variables for each program point in the program code. A path analysis module is configured to determine transition paths between program points specified in the metadata, and are computed in terms of the path entities. Also, review information is computed for each of the path entities comprised in the transition paths. Further, a report generation module is configured to generate a report comprising the review information facilitating the user to verify the program code.
US09141503B1	Vehicle-specific diagnostic reset device and method There is provided a device, system, and method for generating vehicle-specific diagnostic reset procedures using a data signal representative of vehicle identifying information. Diagnostic reset procedures corresponding to a vehicle are generated in response to converting vehicle identifying information into a data signal representative of the vehicle's VIN or license plate number, and matching the data signal with corresponding diagnostic reset procedures stored in a diagnostic reset procedure database. The vehicle-specific diagnostic reset procedures may be displayed on a mobile communication device, such as a smart phone, for instructing the user to manually perform the corresponding diagnostic reset procedures. Alternatively, the corresponding diagnostic reset procedures may be communicated directly to the vehicle's electronic control unit for electronically implementing the corresponding diagnostic reset procedures.
US09141499B2	Semiconductor inspection apparatus and semiconductor inspection method A semiconductor inspection apparatus has a test-program execution part, a signal-condition detection part, a test-time calculation part to calculate an optimum test time having a duration from a period of the unstable region to a certain period at a leading portion of the stable region subsequent to the unstable region based on the unstable and stable regions detected by the signal-condition detection part, a test-program modification part to reflect the optimum test time in the test program, and a signal waveform importing part to import a signal at the signal output pin of the device to be tested based on a test time written in the test program in which the optimum test time is reflected. The test-program execution part executes the test program again after the optimum test time is reflected in the test program by the test-program modification part.
US09141495B2	Automatic failure recovery using snapshots and replicas In one embodiment, a method of coordinating data recovery in a storage stack with a hierarchy of layers includes, upon an input/output (I/O) request from a layer of the stack, issuing a help response to recover the data from a higher layer in hierarchy order. The method further includes processing the help response, at the higher layer, by issuing a return code of success or further help response to an even higher layer.
US09141493B2	Isolating a PCI host bridge in response to an error event Instead of disabling PCI communication between system resources in a host computing device and I/O devices when a PCI Host Bridge (PHB) is unable to function, the host computing device may include a redundant PCI communication path for maintaining communication between the system resources and the I/O devices after a first PHB experiences an unrecoverable error. In one embodiment, the redundant PCI communication path includes a second PHB that is maintained in a standby state so long as the first PHB is functioning normally. However, once the first PHB experiences an unrecoverable error, the second PHB is changed to the master state and assumes the responsibility for maintaining communication between the system resources and the I/O devices.
US09141489B2	Failover procedure for server system A failover procedure for a computer system includes steps for routing traffic from a routing device to a first server, storing in the routing device data representing a fingerprint of the first server, receiving periodically at the routing device a status message from the first server, detecting at the routing device an invalid status message from the first server by absence of the fingerprint in a status message from the first server within a predetermined time period after last receiving a valid status message, and routing the traffic from the routing device to a second server in response to detecting the invalid status message from the first server. A redundant server system implementing the failover procedure may include servers each capable of generating its fingerprint by reading current system configuration data.
US09141488B1	Run-time recovery of malformed interconnect response Various embodiments of the present disclosure provide techniques for monitoring one or more transactions output from a configurable logic system (CLS) to a hard logic system. The CLS and the hard logic system are communicatively coupled by a bridge. The hard logic system receives an exception indicating that a malformed interconnect response has been output by the CLS, clears all pending CLS transactions, isolating the CLS, and executes a run-time recovery process. The run-time recovery process may include reading an interconnect register to obtain an offending address, within the CLS, associated with the malformed interconnect response, and logging the offending address into a system log.
US09141479B2	Memory system with error detection and retry modes of operation A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection code to at least a portion of the first data. At least one receiver is coupled to the link to receive second data. A first error detection logic determines if the second data received by the controller contains at least one error and, if an error is detected, asserts a first error condition. The system includes a memory device having at least one memory device transmitter coupled to the link to transmit the second data. A second error protection generator coupled to the memory device transmitter dynamically adds an error detection code to at least a portion of the second data.
US09141475B2	Methods for tag-grouping of blocks in storage devices Embodiments described herein disclose methods, devices, and media for storing data. Methods including the steps of: receiving data to be stored in a memory that includes at least three blocks, wherein each block, for storing the data, has at least one metadata value, associated with each block, that is dependent upon a writing time of each block; grouping at least three blocks into at least two block groups, wherein at least one block group contains at least two blocks; associating a respective metadata value with each block group; and associating the respective metadata value of a respective block group with each block storing the data contained in the respective block group, without storing a dedicated copy of at least one metadata value for each block. In some embodiments, at least one metadata value is stored in a block-group table.
US09141469B2	Efficient and scalable cyclic redundancy check circuit using Galois-field arithmetic Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.
US09141468B2	Managing memory utilization in a distributed storage and task network A method begins by a distributed storage (DS) processing module retrieving a data slice from a local memory and performing a partial task on the data slice. When the performing of the partial task is complete, the method continues with the DS processing module determining whether at least a retrieval number of slices of a set of slices of a data segment that includes the data slice is available from a set of DST execution units. When the at least a retrieval number of slices is available, the method continues with the DS processing module deleting the data slice from the local memory. When the at least a retrieval number of slices of the set of slices is not available, the method continues with the DS processing module determining whether execution of a task on the data segment is complete and deleting the data slice when the execution is complete.
US09141463B2	Error location specification method, error location specification apparatus and computer-readable recording medium in which error location specification program is recorded A method for specifying an error location by an information processing apparatus that includes a plurality of devices connected to each other through a transmission path includes deciding, when an interrupt is generated, whether the interrupt is a periodic interrupt or an error interrupt, and storing, where the generated interrupt is a periodic interrupt, history information of errors of each of the devices, but analyzing, where the generated interrupt is an error interrupt, the stored history information of errors of the devices to specify a suspect location of the error.
US09141460B2	Identify failed components during data collection A mechanism is provided for identifying failed components during data collection. For each data source combination in a plurality of data sources, a determination is made as to whether a standard deviation (σ) for an estimated collection interval of the data source is above a predetermined standard deviation threshold (σth). Responsive to the standard deviation (σ) for the estimated collection interval of the data source being above the predetermined standard deviation threshold (σth), an error signal is generated indicating an error in data collection with the data source.
US09141458B2	Adjusting a data storage address mapping in a maintenance free storage container A maintenance free storage container includes a plurality of storage servers, wherein the maintenance free storage container allows for multiple storage servers of the plurality of storage servers to be in a failure mode without replacement. The maintenance free storage container further includes a container controller operable to establish a first mapping of a plurality of virtual storage servers to at least some of the plurality of storage servers and facilitate storage of encoded data slices in the at least some of the plurality of storage servers. The container controller is further operable to when evaluation of storage server utilization information triggers an adjustment, adjust the first mapping to produce a second mapping, facilitate storage of new encoded data based on the second mapping, and facilitate modification of storage of the encoded data slices stored in accordance with the first mapping based on the data storage adjustment criteria.
US09141457B1	System and method for predicting multiple-disk failures Techniques for predicting multiple disk failures are described herein. According to one embodiment, first values of a predetermined diagnostic parameter collected from a set of known failed disks of a storage system are received. A quantile distribution graph of the first values against percentiles of a number of known failed disk is generated. In response to second values of the predetermined diagnostic parameter collected from a set of target disks, each of the second values is applied to the quantile distribution graph to determine a corresponding percentile for each of the target disks, which represents a failure probability of a corresponding one of the target disks. A failure probability of two or more of the target disks is calculated based on the determined percentiles of the target disks.
US09141456B2	System and method for performance management of large scale SDP platforms Arrangements and methods for employing empirical evidence to estimate the performance of applications with very few data samples, in complex environments such as dynamic SDP environments, using one or more effective, data-plotting models.
US09141455B2	Bit pattern data converting method and apparatus therefor A data converting method includes counting for each bit pattern among bit patterns that a data segment of a specific number of bits can assume, the number of data segments that have the bit pattern, where the data segments are segments of write_data written to a storage medium storing two types of bit values among which a first value has a higher error occurrence rate than a second value; correlating a bit pattern selected as a conversion source pattern, from among the bit patterns in descending order of count results, with a bit pattern selected as a conversion target pattern, from among the bit patterns in descending order of quantities of the second value respectively included in the bit patterns; and converting for each conversion source bit pattern, data segments having the conversion source bit pattern, into converted data segments having the correlated conversion target bit pattern.
US09141454B2	Signaling software recoverable errors Embodiments of an invention for signaling software recoverable errors are disclosed. In one embodiment, a processor includes a first unit, a programmable indicator, and a second unit. The first unit is to detect a poison error. The programmable indicator is to indicate whether the poison error is signaled as a machine check error or as one of a fault and a system management interrupt. The second unit is to signal the poison error as one of a fault and a system management error responsive to the programmable indicator.
US09141453B2	Reduced footprint core files in storage constrained environments A method for creating diagnostic files that includes receiving an error notification indicating that an error has occurred in a particular system section of a system that has a plurality of system sections. The error notification includes information about the error. A diagnostic file that includes a summarized error report of the particular system section is created based on the information included in the error notification. The diagnostic file is saved.
US09141452B2	Failure detection method and failure detection system A failure detection method executed by a system having a plurality of nodes and detecting failures at an information processing device base on a plurality of types of messages output by the information processing device, the method includes collecting messages belonging to a first set, which is a part of the plurality of types, at a first node; collecting messages belonging to a second set different from the first set, which is a part of the plurality of types, at a second node; generating first failure candidate information based on messages of the type belonging to the first set, collected at the first node; generating second failure candidate information based on messages of the type belonging to the second set, collected at the second node; and detecting failure at the information processing device, based on the first failure candidate information and the second failure candidate information.
US09141450B2	Embedded application communication Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for embedded application communication. In one aspect, a method includes providing a first Application Programming Interface (API) in the host application, where the first API is configured to interact with a virtual machine object model of the virtual machine to allow the host application to set and get properties of one or more first class instances residing in a virtual machine memory space, and to invoke methods on the first class instances, and providing a second API in the virtual machine configured to interact with a host application object model in the host application.
US09141447B2	Conditional deferred queuing Conditional deferred queuing may be provided. Upon receiving a message, one or more throttle conditions associated with the message may be identified. A lock associated with the throttle condition may be created on the message until the throttle condition is satisfied. Then, the lock on the message may be removed and the message may be delivered.
US09141445B2	Asynchronous system calls Embodiments relate generally to a method of managing asynchronous system calls. The method includes instantiating an asynchronous data structure in a user space and passing the asynchronous data structure to the kernel for execution as an asynchronous system call. The method also includes executing the asynchronous system call in the kernel and returning the kernel to the space in response to the asynchronous system call being blocked on a thread. The method further includes returning a result of the asynchronous system call on the thread in the user space in response to the asynchronous system call being completed.
US09141444B2	Inter-application communication on mobile platforms Applications executing in a mobile device utilize a protocol for inter-application communication to overcome restrictions of a sandboxed environment. Applications advertise their exposed capabilities using structured definition files, which are consumed by other applications. Applications can invoke the advertised capabilities by exchanging inter-application communication (IAC) messages in the form of URLs or other platform-specific mechanisms. URL messages are formatted according to parameters and URL schemes specified by the provided definition files.
US09141443B2	Method and system for integrating visual controls with legacy applications A method is provided for controlling a legacy application. The method includes visually capturing a series of movements. The method also includes recording the series of movements at a first time as a recorded series of movements. Moreover, the recorded series of movements includes at least a command that is configured to control a legacy application. Furthermore, the method includes invoking the recorded series of movements at a second time.
US09141442B1	Automated connector creation for provisioning systems Systems and methods for automating or at least partially automating the creation of connectors for a provisioning system are described. A provisioning system can include a connector creation module that analyzes an application programming interface (API) of a target system. Based on this analysis, the provisioning system can automatically create a connector module that can communicate with the target system. The connector creator may also provide a user interface that enables users to customize the functionality of the connector module. For example, a user can specify which routines of the target system API will be called by the connector module, which user identity parameters of the target system will be updated, and so forth. The connector creation module can automatically generate code for the connector module that implements the user-specified functionality. The finished connector module can be executed to provision the target system.
US09141439B2	System and method for reporting a synchronization event in a runtime system of a computer system A system and computer-implemented method for reporting a synchronization event in a runtime system of a computer system. A synchronization primitive in a runtime system of the computer system is monitored. A synchronization operation performed on the synchronization primitive by a thread in the runtime system is detected. An enumerator for the synchronization primitive is incremented when the synchronization operation satisfies predetermined criteria. A synchronization event that includes data relating to the synchronization operation performed on the synchronization primitive is reported.
US09141437B2	Methods and systems for migrating network resources to improve network utilization A method and system are disclosed for migrating network resources to improve network utilization, for use in a multi-node network wherein nodes of the network share network resources. The method comprises the steps of identifying a group of nodes that share one of the network resources, and identifying one of the nodes satisfying a specified condition based on at least one defined access latency metric. The shared resource is moved to the identified one of the nodes to reduce overall access latency to access the shared resource by said group of nodes. One embodiment of the invention provides a method and system to synchronize tasks in a distributed computation using network attached devices (NADs). A second embodiment of the invention provides a method and system to reduce lock latency and network traffic by migrating lock managers to coupling facility locations closest to nodes seeking resource access.
US09141433B2	Automated cloud workload management in a map-reduce environment A computing device associated with a cloud computing environment identifies a first worker cloud computing device from a group of worker cloud computing devices with available resources sufficient to meet required resources for a highest-priority task associated with a computing job including a group of prioritized tasks. A determination is made as to whether an ownership conflict would result from an assignment of the highest-priority task to the first worker cloud computing device based upon ownership information associated with the computing job and ownership information associated with at least one other task assigned to the first worker cloud computing device. The highest-priority task is assigned to the first worker cloud computing device in response to determining that the ownership conflict would not result from the assignment of the highest-priority task to the first worker cloud computing device.
US09141431B1	System and method for prioritizing on access scan and on demand scan tasks Disclosed are systems and methods for prioritizing scan requests. An example method includes reserving, by a computer processor, one or more connections between a thin client and a virtual machine of a computer; when one or more of the reserved connections are not used for communicating on-access scan (OAS) requests or on-demand scan (ODS) requests, allocating said one or more reserved connections for communicating OAS or ODS requests between the thin client and the virtual machine; and when all the reserved connections are used for communicating OAS or ODS requests, and at least one reserved connection is used for communicating ODS requests, reallocating for communicating the OAS requests the at least one reserved connection used for communicating ODS request.
US09141422B2	Plug-in task scheduler A parallel execution runtime allows tasks to be executed concurrently in a runtime environment. The parallel execution runtime delegates the implementation of task queuing, dispatch, and thread management to one or more plug-in schedulers in a runtime environment of a computer system. The plug-in schedulers may be provided by user code or other suitable sources and include interfaces that operate in conjunction with the runtime. The runtime tracks the schedulers and maintains control of all aspects of the execution of tasks from user code including task initialization, task status, task waiting, task cancellation, task continuations, and task exception handling.
US09141419B1	Capturing and restoring an appliance image A method of capturing and restoring an appliance image is described. An appliance image comprising one or more partitions of an appliance is accessed, wherein the appliance is installed at a first location on a first blade. Re-imaging instructions associated with the one or more partitions are received. The re-imaging instructions and a data store comprising a plurality of partition capture tools are compared. Based on the comparing, a captured appliance image is generated by utilizing one or more of the plurality of partition capture tools. Restore instructions to restore a captured appliance image onto a second blade are then received. Captured metadata is then accessed, wherein the captured metadata comprises the captured appliance image and the re-imaging instructions associated with the one or more partitions. Then, the re-imaging instructions are utilized to restore the captured appliance image onto the second blade.
US09141418B2	Systems and methods for implementing a guest operating system on a host operating system One example embodiment of a system for implementing a guest operating system on a host operating system is disclosed. The computer system comprises a memory for storing computer executable instructions, wherein the memory comprises a first partition and a second partition and a processing unit configured to access the memory and execute the computer executable instructions. The computer executable instructions comprising a host operating system stored on the first partition of the memory configured to limit the access to an I/O port, the host operating system executing a virtual machine. The computer executable instructions also comprise a guest operating system stored on the second partition of the memory, the guest operating system executing on the virtual machine of the host operating system, the guest operating system being configured to provide access to the I/O port, wherein the guest operating system is configured to transfer data between a data drive connected to the I/O port and the first partition.
US09141416B2	Virtualization congestion control framework for modifying execution of applications on virtual machine based on mass congestion indicator in host computing system Novel tools and techniques are provided for implementing a virtualization congestion control framework. In one aspect, a method might include a hypervisor assigning application resources of a virtual machine (“VM”), which operates on a host computing system, with maximum allowable settings to each software application to be executed on the VM. The hypervisor or an orchestrator might determine a running mode of the host computing system, and might execute the software application(s) using running mode attributes of the determined running mode. The hypervisor or the orchestrator might monitor application resource utilization, and, based on a determination that application resource utilization has changed, might modify allocation of application resources to each of the software application(s). In some cases, the hypervisor or the orchestrator might monitor for mass congestion indicators, and, based on a determination that a mass congestion indicator is present, might modify the running mode of the host computing system.
US09141413B1	Optimized microsystems-enabled photovoltaics Technologies pertaining to designing microsystems-enabled photovoltaic (MEPV) cells are described herein. A first restriction for a first parameter of an MEPV cell is received. Subsequently, a selection of a second parameter of the MEPV cell is received. Values for a plurality of parameters of the MEPV cell are computed such that the MEPV cell is optimized with respect to the second parameter, wherein the values for the plurality of parameters are computed based at least in part upon the restriction for the first parameter.
US09141412B2	Terminal services application virtualization for compatibility Systems, methods and computer-readable storage media are disclosed for providing a virtual single-user session to a client in a terminal server session. In an embodiment, requests to a resource in the system-space of a system made by an application are intercepted. A determination is made as to whether to virtualize the resource for the application. Where the resource is to be virtualized, a user-specific virtualized resource is created or maintained in user-space and provided to the application.
US09141406B2	Method and system to provide a user interface with respect to a plurality of applications A method and apparatus provides a user interface with respect to a plurality of applications and includes storing operation information regarding common operations performed in the plurality of applications of a device, generating a function window for performing at least one operation performed in the plurality of applications based on the stored operation information, and displaying the generated function window.
US09141398B2	System, device, and method for initializing a plurality of electronic devices using a single packet According to one embodiment of the present disclosure, a semiconductor system may be disclosed. The semiconductor system according to the one embodiment may include, for example, a plurality of electronic devices and a host apparatus. The host apparatus may simultaneously initialize the plurality of electronic devices in units of group.
US09141397B2	Live initialization of a boot device Methods, apparatus and computer program products implement embodiments of the present invention that include executing, by a processor, a software stack. A writeable boot device such as a storage device with a removable medium is detected, and upon reaching a boot level threshold for the software stack, the software stack is saved to the writeable boot device as a boot image.
US09141393B2	Business content authoring and distribution Technology is described for authoring and distributing business content. In various embodiments, the technology can receive a wordprocessing document, the wordprocessing document including a script tag and an instruction within the script tag, the instruction identifying at least the one named cell or region; and produce source code corresponding to the received wordprocessing document.
US09141390B2	Method of processing data with an array of data processors according to application ID A method wherein a plurality of data processors are associated with application IDs whereby the array processes a plurality of applications in parallel.
US09141388B2	High-performance cache system and method A digital system includes a processor core and a cache control unit. The processor core can be coupled to a first memory containing data and a second memory with a faster speed than the first memory, and is configured to execute a segment of instructions having at least one instruction accessing the data from the second memory using a base register. The cache control unit is configured to be coupled to the first memory, the second memory, and the processor core to fill the data from the first memory to the second memory before the processor core executes the instruction accessing the data, and is further configured to examine the segment of instructions to extract instruction information containing at least data access instruction information and last register updating instruction information and to create a track corresponding to the segment of instructions based on the extracted instruction information.
US09141387B2	Processor executing unpack and pack instructions specifying two source packed data operands and saturation An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to unpack the packed data responsive to an unpack instruction received by the decoder. A first packed data element and a third packed data element are received from the first source register. A second packed data element and a fourth packed data element are received from the second source register. The circuit copies the packed data elements into a destination register resulting with the second packed data element adjacent to the first packed data element, the third packed data element adjacent to the second packed data element, and the fourth packed data element adjacent to the third packed data element.
US09141384B2	System and method for enforcing application adoption A method includes determining that a legacy application is executing on a client device. When the legacy application is open in the client device, an adoption rule is applied, wherein the adoption rule defines an instance in which a user is required to use a replacement application instead of the legacy application. When it is determined that the adoption rule is satisfied, the replacement application is executed and use of the legacy application is prevented.
US09141378B2	Method and system for evaluating a software artifact based on issue tracking and source control information A computer system includes a transceiver and a processor that is cooperatively operable with the transceiver. The processor gathers, over the transceiver, (i) issue tracking information stored in an issue tracking storage system, the issue tracking information having a history of issues filed against a plurality of artifacts, and (ii) source code management information stored in a source code management storage system, the source code management information having a history of code changes committed against another plurality of artifacts. The processor checks a combined history of the issue tracking information and the source code management information for a history of issues filed against an artifact and a history of commits and corresponding source code changes committed against the artifact. The processor provides an interpretation of the current state of the artifact based on the combined history of the issue tracking information and source code management information about the artifact.
US09141376B2	Non-transitory computer-readable recording medium having a software update program recorded thereon that selects a software update method that requires a shorter time, and software update apparatus A software update program recorded on a non-transitory computer-readable recording medium causes a computer to act as an update instruction unit that instructs an electronic apparatus to update software, and a method selection unit that selects a method that requires a shorter time, from normal updating in which the electronic apparatus receives renewed software and updates current software to the renewed software, and incremental updating in which the electronic apparatus receives difference data between the renewed software and the current software and applies the difference data to the current software for updating to the renewed software. The update instruction unit instructs the electronic apparatus to update the software by the normal update method when the method selection unit selects the normal update method, and instructs the electronic apparatus to update the software by the incremental update method when the method selection unit selects the incremental update method.
US09141367B2	Application management for a wireless communication device A wireless communication device receives a user request to download a software application and wirelessly receives the software application. The wireless communication device presents multiple application management tiers for the software application. The wireless communication device receives a user selection of a first application management tier for the software application. The wireless communication wirelessly transfers the user selection of the first application management tier for the software application and wirelessly receives a network selection of a second application management tier for the software application from the communication network. The wireless communication presents the second application management tier for the software application.
US09141366B2	Method, system, terminal and device management server for installing software components A method for installing software components includes: a terminal receives a software component package delivered by a Device Management (DM) server directly or a download address of the component package and a command instructing to download delivered by the DM server, where the software component package contains more than one software component; when the terminal receives the download address and the command instructing to download, the terminal downloads the software component package from the download address; the terminal installs the obtained software component package locally and generates management nodes and subnodes of the management nodes corresponding to the software components under a Deployed subtree of the Software Component Management Object (SCOMO) of the terminal. With the present invention, the process of installing software component is more reasonable. A system and apparatus for installing software components are also provided.
US09141363B2	Application construction for execution on diverse computing infrastructures Example systems and methods of application construction for execution on diverse computing infrastructures are presented. In one example, an application descriptor comprising information regarding an application is received. Available computing machine resources for execution of the application are selected based on the information in the application descriptor. Software resources comprising the application are installed on the selected computing machine resources based on the information in the application descriptor. At least one of the selected computing machine resources and the installed software resources are configured for execution of the application based on the information in the application descriptor.
US09141358B2	Reducing application startup time by optimizing spatial locality of instructions in executables Provided are techniques for parsing source code file into a plurality of functions; generating a ranking corresponding to each of the plurality of functions based upon an order of occurrence in the source code file; generating a weight score corresponding to each of the plurality of functions based upon a weighing factor and the occurrence of a condition corresponding to each of the plurality of functions; and generating an object code file such that the plurality of functions are ordered in the object code file based upon the corresponding rankings and weight scores such during a startup of execution of the object code file a startup time is minimized with respect to an object code file not generated in accordance with the claimed method.
US09141357B2	Computer-readable recording medium, compiling method, and information processing apparatus A compiler determines executability of loop fusion, for each of a plurality of loops existing in a code to be processed, based on performance information of a system where the code to be processed is executed and based on operands and number of data transfers executed inside each of the loops. Then, the compiler executes fusion of loop processing in accordance with a determination result of executability of the loop fusion.
US09141356B2	Process for generating dynamic type A process for generating dynamic type is disclosed. A compiler generated template method including a mark for custom instruction is selected for cloning. Dynamic code is injected at the mark for the custom instructions. The template method including the injected dynamic code is compiled.
US09141348B1	Using program code to generate help information, and using help information to generate program code A device may determine to provide help information associated with a portion of program code included in a program and provided via a user interface of a programming environment. The device may obtain generic help information, associated with the portion of program code, based on determining to provide the help information. The device may determine a set of rules for modifying the generic help information using the portion of program code. The device may analyze the program, using the set of rules, to identify information, included in the program, to be included in modified help information. The device may modify the generic help information, to generate the modified help information, using the information identified based on analyzing the program. The device may provide the modified help information for display via the user interface.
US09141345B2	Simplified user controls for authoring workflows A workflow design system provides user interface controls that allow a workflow author to focus on the steps of the workflow before deciding on how to control the flow of the workflow. With the system, an author can change the control flow of a workflow without re-ordering the sequence of steps within the workflow. The workflow design system allows the author to define a sequence of steps and then drag a control block over these steps to capture them within the control block. The author can also later remove the control block without affecting the sequence of steps if his needs change. In addition, the system presents error-handling workflows side-by-side with the main workflow, so that the author can modify the main workflow and notice the effects and any corresponding changes for error handling workflows at the same time.
US09141344B2	Hover help support for application source code A method and apparatus for proving hover help support is described. In one embodiment, the method includes loading a documentation file generated from application source code. The method may also include parsing the documentation file to determine a context of elements within the documentation file. Furthermore, the method may include generating a model of the documentation file based on the context of the elements and storing the model in a memory.
US09141343B2	Indicators for resources with close methods that do not complete erroneously in software programs The disclosed embodiments provide a system that facilitates the development and compilation of a software program. During operation, the system provides, in a programming language platform associated with source code for the software program, an indicator for a resource with a close method that does not complete erroneously. Next, the system enables use of the indicator with a resource-management statement in the source code, wherein the indicator facilitates omission of an exception-handling construct for the resource-management statement.
US09141339B2	Delta-modulation signal processors: linear, nonlinear and mixed Disclosed are ten functional circuits for the direct processing (linear, nonlinear and mixed analog/digital) of a delta-modulated pulse stream. This invention comprising of; a digital circuit for squaring and rectification; a mix mode analog/digital squaring circuit; a digital circuit for AC-to-DC conversion; a mixed mode analog/digital multiplication circuit of two delta-sigma modulated pulse streams; a digital circuit for multiplication of two delta-sigma modulated streams; a digital circuit for RMS-t-DC conversion; a circuit for multiplication of delta-sigma modulated signal by a constant; a circuit for addition of three or more delta-sigma modulated pulse streams; and a correlator circuit of two delta-sigma modulated pulse signals.
US09141338B2	Storage circuit with random number generation mode A storage circuit 2 in the form of a master slave latch includes a slave stage 6 serving as a bit storage circuit. The slave stage 6 includes an inverter chain which when operating in a normal mode includes an even number of inverters 10, 12 and when operating in an random number generation mode includes an odd number of inverters 10, 12, 14 and so functions as a free running ring oscillator. When a switch is made back from the random number generation mode to the normal mode, then the oscillation ceases and a stable pseudo random bit value is output from the bit value storage circuit 6.
US09141337B2	Floating point multiply accumulator multi-precision mantissa aligner A processing device is provided that includes a first, second and third precision operation circuit. The processing device further includes a shared, bit-shifting circuit that is communicatively coupled to the first, second and third precision operation circuits. A method is also provided for multiplying a first and second binary number including adding a first exponent value associated with the first binary number to a second exponent value associated with the second binary number and multiplying a first mantissa value associated with the first binary number to a second mantissa value associated with the second binary number. The method includes performing the exponent adding and mantissa multiplying substantially in parallel. The method further includes performing at least one of adding or subtracting a third binary number to the product. Also provided is a computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus.
US09141335B2	Natural language image tags Natural language image tags are described. In one or more implementations, at least a portion of an image displayed by a display device is defined based on a gesture. The gesture is identified from one or more touch inputs detected using touchscreen functionality of the display device. Text received in a natural language input is located and used to tag the portion of the image using one or more items of the text received in the natural language input.
US09141333B2	Image visualizing device Electronic paper display comprises analyzer for a plurality of picture image data and controller for automatically changing the term, during which picture is visualized. Analyzer counts number of pictures in one month or one season to have controller automatically change the term per one picture to be visualized. Number of pictures for visualization is reduced when the term per one picture is less than one day. Analyzer checks the attribute data of picture to change the term for visualization. Controller substitutes a temporal anniversary picture for the regular calendar picture for a term and gets back regular picture upon expiration of the term. Electronic paper calendar prepares calendar layouts for horizontally long picture and vertically long picture, respectively, with picture sizes different from each other. Electronic paper calendar prepares calendar layout with even month arranged on the left side and odd month on the right side beneath common picture.
US09141332B2	Masking sensitive information in a screen sharing session A system can mask specific components of an application, such as a web page, displayed during a screen sharing session. As the web page is being displayed on a first computer screen (i.e., screen), the system can automatically mask specific components of the web page. Thus, when the first screen is captured, and the capture is transmitted to a second screen, the specific components of the web page that have been masked will not be displayed at the second screen.

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