Document Document Title
US08437187B2 Semiconductor integrated circuit including memory cells having non-volatile memories and switching elements
In one embodiment, a semiconductor integrated circuit has memory cells. Each of the memory cells has non-volatile memories and switching elements. The non-volatile memories and switching elements are connected in series between a first power source and a second power source. Output wirings of at least two of the memory cells are connected to each other. Input wirings are connected with control gates of the switching elements included in each of the at least two memory cells. A plurality of the switching elements included in one of the at least two of the memory cells is turned off, when an input signal or an inverted signal is inputted. Further, another plurality of the switching elements included in another one of the at least two of memory cells other than the one of the memory cells is turned on, when the input signal or the inverted signal is inputted.
US08437185B2 Programming orders for reducing distortion based on neighboring rows
A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
US08437182B2 Reversible low-energy data storage in phase change memory
A phase change memory (PCM) device utilizes low energy pulses to write data to PCM storage elements (cells). Methods, devices and systems are described that use low energy reset pulses to reset cells that have been previously set using a method that keeps a portion of the PCM cells in an amorphous phase. The reset is reversible by utilizing a low energy set pulse.
US08437181B2 Shared bit line SMT MRAM array with shunting transistors between the bit lines
An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells.
US08437178B2 Static random access memory cell and method of operating the same
A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.
US08437176B2 Optical refreshing of loadless for transistor SRAM cells
Loadless 4 transistor SRAM cell operation can be substantially improved, yielding area saving and more stable operation by use of optical-light load. Parasitic photocurrents in PMOS anodes-substrate junctions act as load currents. Light can be introduced by either ambient light through transparent window on top of the chip or by cheap LED diode attached to chip surface.
US08437174B2 Memcapacitor devices, field effect transistor devices, non-volatile memory arrays, and methods of programming
A memcapacitor device includes a pair of opposing conductive electrodes. A semiconductive material including mobile dopants within a dielectric and a mobile dopant barrier dielectric material are received between the pair of opposing conductive electrodes. The semiconductive material and the barrier dielectric material are of different composition relative one another which is at least characterized by at least one different atomic element. One of the semiconductive material and the barrier dielectric material is closer to one of the pair of electrodes than is the other of the semiconductive material and the barrier dielectric material. The other of the semiconductive material and the barrier dielectric material is closer to the other of the pair of electrodes than is the one of the semiconductive material and the barrier dielectric material. Other implementations are disclosed, including field effect transistors, memory arrays, and methods.
US08437169B2 Fast response circuits and methods for FRAM power loss protection
A circuit to protect data on an FRAM during a read operation includes an FRAM voltage regulator having an output to supply an FRAM operating voltage to the FRAM. A voltage monitor monitors a supply voltage for the FRAM to generate a voltage fault signal if the supply voltage falls below a predetermined value. And a circuit responsive to the voltage fault signal maintains the FRAM operating voltage above a voltage required to assure data integrity of the FRAM for a sufficient time required to perform an FRAM read operation.
US08437159B2 Cam-controlled electromechanical rotary power inverter
The cam-controlled electromechanical rotary power inverter converts a plurality of DC source voltages to an AC power output by an electromechanical mechanism that includes a rotating assembly of cams intermittently contacting a series of brushes connected to the DC source voltages to sequentially add the DC voltages and then sequentially subtract the DC voltages over 360° of rotation of the cam assembly. In this manner, the inverter provides multilevel, e.g., seven discrete voltage levels, which are distributed as output sequentially in an additive manner and then a subtractive mariner to generate nearly sinusoidal voltages. Repeating sequences of brushes and cams over three 120° intervals allows for 3-phase AC voltage output from the inverter.
US08437149B2 Fully resonant power supply
A power supply produces one or more conditioned and scaled output voltages with low noise. The power supply has various components to produce a plurality of higher output voltages from a plurality of taps of a multiplier or multiple isolated outputs. Components include an internal reference voltage circuit or an external voltage that generates a reference voltage and a sine wave power oscillator circuit and resonant circuit that generates an alternating current and voltage. The power supply has a controlled current source circuit connected to the sine wave power oscillator circuit for regulating the power level to the sine wave power oscillator. A control amplifier circuit controls the current level to the controlled current source circuit based on the error between the sampled output and the reference voltage. The resonant transform connected to the sine wave power oscillator circuit generates one or more scaled output voltages on one or more secondary windings. A buffer voltage feedback circuit is connected to an output voltage and the control amplifier circuit for providing a feedback loop to regulate the output voltage.
US08437147B2 Kit for organizing cables in a cabinet
An equipment cabinet (2) includes an equipment rack (3) for mounting equipment (20), and includes organizational elements for organizing cables within the cabinet. The cables may be organized to reduce impeding airflow to or from the equipment, and/or to reduce unwanted bending of the cables themselves. The organizational elements may include one or more of: a trunk cable (40) including a furcation plug (45) and universal clip (47); a furcation bracket—either vertical (60) or horizontal (80); a termination panel (100); a trunk cable manager (140, 200); and/or an accessory bracket (180). The organizational elements may be used in various combinations with one another, and may be provided in a kit.
US08437144B2 Laminate mount assembly
A laminate mount assembly includes a first member that includes an inter-member connection electrode that is provided on an end surface that forms a predetermined inter-member connection side surface; a second member that includes an inter-member connection electrode that is provided on an end surface that forms the inter-member connection side surface, the second member being arranged to be parallel with the first member; and a conductive film that electrically connects the inter-member connection electrodes to each other over a portion in which the first member and the second member are opposite to each other.
US08437141B2 Device comprising a substrate including an electronic contact, and transponder
The invention relates to a device comprising a first electric contact (8, 98) and a substrate (1, 91). The first electric contact (8, 98) comprises a first area (10, 110) with a first wettability, and the substrate (1, 91) comprises a second area (3) with a second wettability and a third area (2) with a third wettability and being adjacent to the second area (2). The first electric contact (8, 98) is attached on the substrate (1, 91) so that the first area (10, 110) of the first electric contact (8, 98) is adjacent to the second area (3), and the second area (3) is located between the first area (10, 110) and the third area (2). The first and the second wettability are higher than the third wettability. The invention also relates to a transponder (T1, T2, T3) which comprises the substrate (1, 91), an electric device (50, 80) and an antenna (7, 93).
US08437137B2 Fixing mechanism for fixing a thermal module on a base and related electronic device
A fixing mechanism for fixing a thermal module on a base includes a U-shaped buckling component disposed on a side of the base for buckling a thermal fin and a heat conducting block of the thermal module, and a fixing component disposed on the other side of the base and connected to the U-shaped buckling component for clipping the base with the U-shaped buckling component.
US08437132B2 Computer enclosure with cover plate
A computer enclosure includes a computer bezel with an opening defined therein, a cover plate for covering the opening, and an actuating module. The cover plate is pivotably attached to a front side of the computer bezel. The actuating module includes a mounting bracket attached to a rear side of the computer bezel and an actuating member pivotably attached to the mounting bracket. The actuating member is capable of rotating between an extended position, where the cover plate is pushed open by the actuating member to expose the opening, and a retracted position, where the cover plate is closed to cover the opening.
US08437129B2 Server cabinet
A server cabinet is provided, which not only utilizes a first cooling fluid to flow through a heat exchanger of the cabinet to lower the temperature of entrances of fan modules without wasting additional energy, but also utilizes a cooling fluid pipe set to send a second cooling fluid to heat exchange apparatuses in a server to lower the temperature of heating elements inside the cabinet. The server cabinet could lower the heat dissipating loading of the heat exchanger of the cabinet and achieve the efficiency of saving energy.
US08437128B1 Multipurpose computer accessory
A multipurpose computer accessory having a flat base, an under-cushion, and means for connecting any one or more of a keyboard, mouse, touchpad, scroll ball, camera, loudspeaker, USB port, portable device docking station component, video display, or hard drive to an external device such as a laptop or desktop computer.
US08437126B2 Separable hinge assembly with two component device
A group of assemblies—two housings and a hinge assembly—which particularly enhances the flexibility in use of electronic devices such as computer systems and cell phones. The enhancement derives from the capability of separating the three elements by pairs or one from another for use either individually or as a conjoined entity.
US08437124B2 Video display and car using the same
A video display includes a housing, a screen and a protective cover. The housing includes a first side and a second side opposite to the first side. The screen is disposed on the first side of the housing. The protective cover is rotatably connected to the housing and coverable on the screen. The protective cover is capable of being held in any position in the process of rotating from the first side to the second side, as the driving force is removed. A car using the video display is also provided.
US08437123B2 Server cabinet and server system with same
A server cabinet includes a cabinet, a first slide rail, and a second slide rail. The cabinet includes a top surface, a bottom surface, a rear wall, two sidewalls, and two doors. The first slide rail is mounted on an inner surface of one of the sidewalls. The first slide rail has a first end and an opposite second end. The first slide rail defines a first slide groove. The first end is adjacent to the doors, and the second end is close to the rear wall. The second slide rail has a first and a second connection ends. The second slide rail defines a second slide groove. The first connection end is rotatably coupled to the first end so that the second slide rail is capable of rotating relative to the first slide rail to a position where the second slide rail aligns with the first slide rail.
US08437120B2 Image display device
An image display device includes front and rear covers which surround a display panel and a plurality of connection members connected to the display panel and connected to each of the covers. Thereby, the display panel has a bezel part having a narrow width, and the front and rear covers are easily fixed to each other.
US08437118B2 Power switchgear
The subject of the invention is an electric power switchgear, an insulating radiator, and a method for installing the radiator in an electric power switchgear, and in particular in a medium or high voltage switchgear. The electric power switchgear comprising working elements placed in the housing and connected with busbars and branches, and cooled with air, is characterized in that it contains at least one insulating radiator made of thermoplastic material of increased thermal conductivity λ≧2 W/mK, which is placed in the electric field of the switchgear and which is connected by a non-permanent fastening to at least one busbar or/and at least one branch. The insulating radiator designed for the switchgear is an injection molding including a base plate to whose top face a system of heat evacuating elements of identical or diverse shape is attached, and to its side surfaces elastic assembly catches are fixed.
US08437114B2 ESD Protection Device
An ESD protection device is constructed such that its ESD characteristics are easily adjusted and stabilized and degradation of discharge characteristics caused by repetitive discharges is reliably prevented. The ESD protection device includes an insulating substrate, a cavity provided in the insulating substrate, at least a pair of discharge electrodes including exposed portions arranged to face each other and to be exposed in the cavity, external electrodes provided on a surface of the insulating substrate and connected to the discharge electrodes, and a conductive material dispersed along at least a portion of an inner circumferential surface which defines the cavity between the exposed portions of the discharge electrodes, the conductive material including an anchor portion embedded in the insulating substrate.
US08437113B2 Cooling and shielding of a high voltage converter
A converter for converting alternating voltage into direct voltage and vice versa in a converter station of a high voltage transmission system. A series connection of converter valves includes power semiconductor devices connected in series and arranged in superimposed layers. The valves are arranged on top of each other in a column. Coolant liquid conducting tubes are in an extension over at least one part of the circumference of the column having no connections to cooling blocks for cooling the devices made of metal. Such metal tubes are arranged in the part for over this part of the column circumference forming an electric field shielding screen. The coolant liquid conducting tubes are when extending over parts of a circumference of the column where connections are made to cooling blocks made of an electrically insulating material. An electric field shield is arranged outside the column over these parts.
US08437111B1 Systems and methods for current limiting with overload protection
A current limiter in one exemplary embodiment of the present disclosure has a protection element that protects a current limiting element from excessive power dissipation. The protection element senses a parameter that is indicative of an amount of power being dissipated by the current limiting element. The protection element controls the current limiting element based on the sensed parameter such that power dissipation for the current limiting element is reduced to a safe level during a fault condition thereby protecting the current limiting element from damage during the fault condition.
US08437110B2 Protection apparatus of load circuit
A protection apparatus of a load circuit, comprises: a temperature estimation unit configured to estimate a temperature of an electric wire based on a pseudo-temperature arithmetic expression; and a breaking control unit configured to break a switch portion when the temperature estimated by the temperature estimation unit has reached an allowed temperature of the electric wire. The pseudo-temperature arithmetic expression is set in such a manner that, in a temperature arithmetic expression of the electric wire, the temperature arithmetic expression using the elapsed time counted by the timer, the current detected by the current detection unit, and a heat capacity and conductor resistance of the electric wire, a pseudo-heat capacity smaller than the heat capacity of the electric wire is assigned to the heat capacity, and a pseudo-conductor resistance larger than the conductor resistance of the electric wire is assigned to the conductor resistance.
US08437106B2 Thin film magnetic head including spin-valve film with free layer magnetically connected with shield
A thin film magnetic head includes; an MR film that includes a pinned layer of which a magnetization direction is pinned, a free layer of which a magnetization direction varies, and a spacer that is disposed therebetween; a pair of shields that are disposed on both sides sandwiching the MR film in a direction orthogonal to a film surface of the MR film; and an anisotropy providing layer that provides anisotropy to a first shield so that the first shield is magnetized in a desired direction, and that is disposed on an opposite side from the MR film with respect to the first shield. The MR film includes a magnetic coupling layer that is disposed between the first shield and the free layer and that magnetically couples the first shield with the free layer.
US08437105B2 Magnetic sensor with composite magnetic shield
A magneto-resistive reader includes a first magnetic shield element, a second magnetic shield element and a magneto-resistive sensor stack separating the first magnetic shield element from the second magnetic shield element. The first shield element includes two ferromagnetic anisotropic layers separated by a grain growth suppression layer.
US08437103B2 Multichannel time based servo tape media
A thin film magnetic recording head is fabricated by forming a substrate from opposing ferrite blocks which have a ceramic member bonded between them. This structure is then diced to form a plurality of columns, wherein each column has a ferrite/ceramic combination. Each column represents a single channel in the completed head. A block of ceramic is then cut to match the columned structure and the two are bonded together. The bonded structure is then cut or ground until a head is formed, having ceramic disposed between each channel. A ferrite back-gap is then added to each channel, minimizing the reluctance of the flux path. The thin film is patterned on the head to optimize various channel configurations.
US08437102B2 Perpendicular magnetic head with side shield depth less than write gap film
Embodiments in accordance with the present invention provide a magnetic head having a narrow track width and excellent in productivity for the purpose of realizing a disk storage unit having a large capacity. In a magnetic head having a plurality of flairs on a main magnetic pole, a side shield is formed via a non-magnetic film on both sides of the flair disposed close to an air bearing surface in such a fashion as to be aligned with the flair.
US08437100B2 Flexure based shock and vibration sensor for head suspensions in hard disk drives
Systems and methods for flexure based shock and vibration sensor for head suspensions in hard disk drives. Specifically, this invention deals with operational shock and vibration management within a hard disk drive. In one implementation, the assembly includes a circuit embedded optical waveguide sensor that includes a flexible electrical circuit board with a configuration of either a single or multi layers of conductor traces, a thin flexure gimbal for carrying and flying a HDD slider, a consecutive sensing layer constructed by an optical core and by clad construction with a configuration of either a single core array or a plural core array, an optical loop formed by light input and an output core, optical grating disposed on the consecutive sensing layer forming an optical grating waveguide sensor, a light emitter for injecting light into the optical core, and a receiver receiving the output light from the optical core.
US08437098B2 Magnetic disk drive using a non-volatile storage device as cache for modified tracks
Provided are a computer program product, system, and method for a magnetic disk drive. The disk drive has at least one disk platter having at least one recordable disk surface having an areal density of at least 200 gigabits per square inch. Either a diameter of the at least one disk platter is greater than 3.5 inches or the at least one disk platter rotates at less than 5400 RPMs. A read/write head reads and writes tracks of data with respect to the at least one disk surface. Modified tracks from write requests to write to the at least one disk surface on the at least one disk platter are cached in a non-volatile storage device for caching modified tracks. Modified tracks are cached in the non-volatile storage device to later destage to the at least one disk surface.
US08437095B2 Compact lens module
A compact lens module includes a lens seat, a lens group, a first and a second circuit boards. The lens seat includes a top surface, a bottom surface opposite to the top surface, and a first side surface connecting the top surface to the bottom surface. The lens seat defines a receiving space extending through the top surface and the bottom surface, and a receiving groove on the first side wall. The lens group is received in the receiving space. The first circuit board is mounted on the bottom surface of the lens seat, and holds an image sensor aligned with the lens group. The second circuit board is received in the receiving groove. The second circuit board holds a lens drive circuit and electrically connected with the lens group and the first circuit board.
US08437091B2 Wide viewing angle optical lens assembly
A wide viewing angle optical lens assembly comprises, in order from an object side to an image side, a first lens element with negative refractive power having a convex object-side surface and a concave image-side surface, a second lens element with positive refractive power having a convex object-side surface, a third lens element with positive refractive power having a convex image-side surface. By adjusting the relationship among the above-mentioned lens elements, the wide viewing angle optical lens assembly can effectively reduce its size, obtain greater angle of view as well as superior imaging quality.
US08437087B2 Observation optical system and image display apparatus
The observation optical system introduces light from a first display element and light from a second display element to an exit pupil to present an enlarged combined image of first and second original images. The optical system includes a first optical element allowing the light from the first display element to enter thereinto, a second optical element allowing the light from the second display element to enter thereinto, and a third optical element. The optical system introduces a first light component from a first display area in the second display element to the exit pupil through the second optical element and at least the first optical element, and introduces a second light component from a second display area in the second display element to the exit pupil through the second and third optical elements, not through the first optical element.
US08437085B1 Optical element assembly with integrally formed microlens
An optical element assembly with integrally formed microlens is presented. A wafer is provided with a plurality of adjacent IC optical elements, each optical element having an optical transmission port in a wafer top surface. A microlens array is attached to the wafer top surface, so that each microlens in the array overlies a corresponding optical element optical transmission port. Then, a wafer of optical elements with attached microlenses is formed, where each microlens has a first lens surface adhering directly to a corresponding optical transmission port. Subsequent to forming the wafer of optical elements with attached microlenses, the wafer is diced forming a plurality of optical element assemblies. Each optical element assembly includes an optical element integrally formed with an attached microlens.
US08437080B2 Foldable projection screen
The present invention provides a foldable projection screen, which comprises: a first housing capable of being folded for engagement and capable of standing while being unfolded; and a projection screen having its two sides respectively fastened on two sides of the first housing so as to be folded and accommodated in the first housing. With the mentioned structure, the foldable projection screen has advantages of small in volume, light in weight, and easy to be carried around, and applicable in a mini-sized or small projector.
US08437078B2 Binoculars
A pair of binoculars includes: a pair of lens barrels in each of which a telescopic optical system including an objective lens and an eyepiece is held; a reticle that is provided between the objective lens and the eyepiece of one of the telescopic optical systems movably in an optical axis direction of the one of the telescopic optical systems; and an adjusting ring that moves the reticle in the optical axis direction by rotation operation to adjust a position of the reticle in the optical axis direction.
US08437075B2 Multi-layered hybrid metamaterial structure
A metamaterial structure is provided, including a substrate and a plurality of resonators that are provided on different surfaces of the substrate or different layers of the substrate. The resonators have resonance characteristics different from each other, and the metamaterial structure has a permittivity, a permeability, and a refractive index respectively different from those of the substrate in a predetermined frequency bandwidth.
US08437073B2 Electrophoretic display device
A display device includes a display panel, a barrier layer, a protective layer, a first optical adhesive layer and a second optical adhesive layer. The barrier layer is disposed above the display panel. The protective layer is disposed above the barrier layer. The first optical adhesive layer with a first thickness is disposed between the display panel and the barrier layer. The second optical adhesive layer with a second thickness is disposed between the protective layer and the barrier layer. The first thickness is larger than the second thickness.
US08437070B2 Interferometric modulator with dielectric layer
By selectively placing color filters with different transmittance spectrums on an array of modulator elements each having the same reflectance spectrum, a resultant reflectance spectrum for each modulator element and it's respective color filter is created. In one embodiment, the modulator elements in an array are manufactured by the same process so that each modulator element has a reflectance spectrum that includes multiple reflectivity lines. Color filters corresponding to multiple colors, such as red, green, and blue, for example, may be selectively associated with these modulator elements in order to filter out a desired wavelength range for each modulator element and provide a multiple color array. Because the modulator elements are manufactured by the same process, each of the modulator elements is substantially the same and common voltage levels may be used to activate and deactivate selected modulation.
US08437068B2 Optical modulator
The optical modulator includes an optical waveguide element in which a first waveguide is formed obliquely to an outgoing end surface, and a second waveguide is formed obliquely to both the first waveguide and the outgoing end surface, a lens which makes parallel optical paths of first and second modulated light beams outgoing from the first and second waveguides, a phase delay element which applies a phase delay to at least one of the first and second modulated light beams, a polarization beam rotating unit which rotates at least one polarized wave of the first and second modulated light beams to make the polarized waves orthogonal to each other between the two modulated light beams, and a polarization beam combining element which combines the first and second modulated light beams whose polarized waves are made orthogonal to each other.
US08437063B2 Method and device for scanning light
A method of scanning a light beam is disclosed. The method comprises scanning the light beam along a first axis and scanning the light beam along a second axis, such that a functional dependence of the scanning along the first axis is substantially a step-wave, and a functional dependence of the scanning along the second axis is other than a step-wave.
US08437062B1 Electrostatically-addressed MEMS array system and method of use
The present invention provides an improved electrostatic micro actuator array system comprising a plurality of electrostatic micro actuators, each of the micro actuators further comprising at least one hold-down electrode and at least two pull-down electrodes positioned to actuate the micro actuator. A hold-down signal line is then coupled to each of the hold-down electrodes of each of the plurality of micro actuators and a plurality of first pull-down signal lines coupled to one of the at least two pull-down electrodes of each micro actuator and a plurality of second pull-down signal lines coupled to another of the at least two pull-down electrodes of each micro actuator, the first pull-down signal lines and the second pull-down signal lines configured in a cross-point matrix such that a unique pair of first pull-down signal lines and second pull-down signal lines is associated with each of the plurality of micro actuators.
US08437057B2 Method for rendering and generating color video holograms in real time
A method is disclosed for rendering and generating color video holograms for a holographic reproduction device having at least one light modulation means, wherein a scene divided into object points is encoded as a whole hologram and which can be seen from as a reconstruction a visibility region, which is located within a periodicity interval of the reconstruction of the video hologram. The visibility region defines a subhologram together with each object point of the scene to be reconstructed and the whole hologram is formed from a superposition of subholograms, wherein a 3D rendering graphic pipeline structures a scene represented by image data with depth information into object points and determines and provides at least color and depth information for the object points.
US08437056B2 Analytical method for computing video holograms in real time
An analytical method for computing a video hologram for a holographic reproduction device having at least one light modulation means is disclosed, wherein a scene split into object points is encoded as a whole hologram and can be seen as a reconstruction from a visibility region, located within a periodicity interval of the reconstruction. The visibility region, together with each object point of the scene to be reconstructed, defines a subhologram and the whole hologram is generated from a superposition of subholograms, wherein the complex hologram values of a subhologram are determined from the wave front of the respective object point to be reconstructed in a modulator region of the light modulation means, by calculating and evaluating the transmission or modulation functions of an imaging element formed in the modulator region. The object point to be reconstructed is located in the focal point of the imaging element.
US08437054B2 Methods and systems for identifying regions of substantially uniform color in a digital image
Embodiments of the present invention comprise methods and systems for identifying uniformly colored regions in a digital image.
US08437051B2 Sheet finisher, image forming apparatus and image forming system
A sheet finisher includes: a conveyance section to convey a sheet; an image reading section which reads an image of a sheet; and a sheet finisher control section, wherein the sheet finisher control section transmits wait information which requests an interruption of sheet conveyance, to outside, and transmits image data acquired by reading of the image reading section to the outside after transmitting the wait information.
US08437048B2 Image trimming method, apparatus and program
When trimming is performed on a photograph image obtained by a photography apparatus, a plurality of trimming range candidates is set by analyzing the photograph image. A judgment is made as to whether the zoom magnification ratio of the photography apparatus during photography corresponds to a predetermined limit, the limit being a maximum zoom magnification ratio or a minimum zoom magnification ratio that can be set by the photography apparatus. A trimming range is set by selecting one of the plurality of trimming range candidates. If the zoom magnification ratio is judged to be a magnification ratio corresponding to the predetermined limit, a trimming range candidate that has a smaller or larger range than that of a trimming range candidate selected if the zoom magnification ratio is judged to be a magnification ratio that does not correspond to the predetermined limit is selected as the trimming range.
US08437045B2 Bitmapped based trapping methods, apparatus and system by modifying non-black halftone pixel bitmap plane using estimated continuous tone value
Provided are bitmap based trapping methods, apparatus and systems. According to one exemplary method, black trapping color image data is performed by estimating the continuous tone values associated with non-black pixels near a qualified black pixel and subsequently, the estimated continuous tone values are halftoned at the qualified black pixel locations and ORed with the original bitmap data.
US08437043B2 Compression of grayscale image data using multi-bit halftoning
A method and system are provided for reducing the bit depth of grayscale imagery using multi-bit halftoning. The halftoned image data may be lossy or losslessly compressed and stored in memory or transmitted over a communication channel. At the time of printing, the images are decompressed and reconstructed to a grayscale image data using Sigma filtering to preserve edges. Preferably, different Sigma filters may be applied based on contrast information within a local neighborhood region. Fuzzy edge detection may also be used to preserve edge features and prevent smearing.
US08437041B2 Print imaging system
Systems and methods for performing imaging on print devices are provided. One system comprises a processing circuit in communication with an image capturing device. The image capturing device is configured to capture an image of at least a portion of a printed product of a web or offset print device and output at least one signal representative of the captured image. The processing circuit is configured to receive the at least one signal representative of the captured image and an input signal representative of a print parameter change and to determine a change to the captured image representative of how the captured image would be printed on the web or offset print device with the print parameter change represented by the input signal.
US08437039B2 Image processing device, image processing method, and program
An image processing device, an image processing method, and a program enable easily acquiring for each profile information related to the amount of ink that is required to record image data after the image data is converted using a particular profile. A host computer 1 transforms reference image data 27 based on an ICC profile 23 for transforming image data to image data in a different color space, and outputs transformed reference image data 28. Based on a lookup table 25 for transforming the coordinate values of a color space to ink volume information in an ink color space rendered by plural different types of ink, the transformed reference image data 28 is converted to ink volume information, and based on this ink volume information and the reference image data 27 before the transformation, ink information correlating the ink volume information to the colors contained in the reference image data 27 before transformation is produced.
US08437037B2 Multilevel clustered dot screening method with improved detail and reduced image noise
A method and a printing system are described capable of rendering more than 2 density levels at the device pixel level using precalculated rectangular screening tiles of finite size that define a spatially repetitive screening operation according to geometric clustered dot screen definitions for first, second and third separation screens that has the following characteristics: (A) the set of at least three separation screens is free of second order moiré; (B) the set of at least three separation screens consists of screens that have no internal moiré and/or screens that have a reduced sensitivity to amplification by process instability of any remaining level of intrinsic internal moiré; and (C) the screens have an optimized and balanced rosette structure leading to a reduction of visible patterning in overlays of the separation screens.
US08437036B2 Image path utilizing sub-sampled cross-channel image values
A technique for cross-channel correction in real time for digital color printing in which the full resolution value of a selected colorant is combined with low resolution versions of the remaining colorants to provide a basis for correcting the selected colorant based upon the data for the other colorants employed. The pixel values of sub-samples of the remaining colorants are derived from the cell in which the full resolution selected colorant is taken; and, the desired output value is selected from a look-up table established for the known printing process.
US08437032B2 Image processing apparatus and image processing method within inclination angle correction
An image processing apparatus has an area sensor unit that reads image data corresponding to a plurality of frames shifted from each other by a shift of less than one pixel, an inclination angle acquiring unit that acquires an inclination angle with respect to a reference installation position of the area sensor, an angle correcting unit that corrects the inclination of the image data corresponding to a plurality of frames read by the area sensor unit by using the acquired inclination angle, and a high-resolution conversion unit that provides image data the resolution of which is higher than the resolution of the read image data by using the image data corresponding to a plurality of frames the inclination of which has been corrected by the angle correcting unit to perform interpolation processing.
US08437031B2 Image processing device and method for reducing an original image
An image processor includes a reduced image forming unit, a first reflectance value calculating unit, a normalizing parameter determining unit, a second reflectance value calculating unit, a normalizing unit, a correcting unit, and a reducing information determining unit. The reduced image forming unit reduces an original image to form a reduced image. The first reflectance value calculating unit calculates a first reflectance value for each reduced pixel. The normalizing parameter determining unit determines a normalizing parameter based on a distribution of the first reflectance values. The second reflectance value calculating unit calculates a second reflectance value for each original pixel. The normalizing unit normalizes the second reflectance values based on the normalizing parameter to obtain normalized Retinex values. The correcting unit corrects the original pixel values based on the normalized Retinex values. The reducing information determining unit determines first information based on second information with respect to at least one of quality of the corrected original image to be formed, a type of a recording medium on which the corrected original image is formed, a size of a recording medium on which the corrected original image is formed, the reduced image size, and the original image size. The reduced image forming unit reduces the original image based on the first information.
US08437018B2 Image formation device supporting direct printing of print files stored in external storage devices
There is provided an image formation device, comprising: at least two connection units including a first connection unit and a second connection unit configured such that first and second external storage devices are detachably connectable to the first and second connection units, respectively; a judgment unit configured to make a judgment as to whether user information concerning a user of a file stored in the first external storage device connected to the first connection unit matches user information concerning a user of a file stored in the second external storage device connected to the second connection unit; and a permission unit configured to permit a direct print operation for a file for which the judgment unit judges that the user information of the file stored in the first external storage device matches the user information of the file stored in the second external storage device.
US08437017B2 Printing apparatus and computer program product for displaying bitmap of operation screen from rasterized PDL and controlling layout
Print data for display in which an operation screen of a multifunction periphery is described in a page-description language is created and outputted to an external memory medium. Specifically, the print data for display includes a screen description section 51 where an image is described by vector information and a function description section 52 where a function of the operation screen (operation when the operation button is pressed) is described by PJL. In another multifunction periphery, a bitmap image of an operation screen 60 is created and displayed by rasterizing the screen description section 51 of the print data for display read from the external memory medium, and the function of the operation screen is reproduced from information of the function description section 52.
US08437016B2 Flow implementation system, flow implementation method, recording medium having flow implementation program stored therein, and image processing apparatus
A flow implementation system is disclosed. The flow implementation system implements a flow created by a user into an image processing apparatus having at least one of a plotter and a scanner. The system includes a tool providing unit that provides the user with a tool for creating the flow by combining plural operations executable by the image processing apparatus and a condition for switching a path among the operations, and a flow implementing unit that implements the flow created by the user into the image processing apparatus.
US08437009B2 System and method for three dimensional reconstruction of an anatomical impression
A system and method reconstruct an anatomical impression. The system contains a light signal generating device for generating a light signal directed toward a synthetic test body having the anatomical impression. The light signal is directed toward the synthetic test body such that the light signal is attenuated upon passing through the synthetic test body. A sensor captures the attenuated light signal through the synthetic test body and converts the captured attenuated light signal into digitized image information. The system further includes a digital reconstruction device for reconstructing the digitized image information based on measurement of light attenuation to generate a three-dimensional volume of the anatomical impression.
US08437008B2 Interferometric sample measurement
A device for the interferometric measurement of a sample, in particular the eye, including an interferometer arrangement with a first measurement beam path, through which a measurement beam falls onto the sample, and a first reference beam path, through which a reference beam runs, which is applied to the measuring beam for interference. The interferometer arrangement includes a second measuring beam path and/or second reference beam path. The optical path lengths of the second measuring beam path and/or second reference beam path are different from one of the first beam paths. The wave length difference is selected according to a distance of two measuring areas which are arranged at a distance in the depth direction of the sample.
US08437007B2 Integrated optical coherence tomography system
An optical detector system comprises a hermetic optoelectronic package, an optical bench installed within the optoelectronic package, a balanced detector system installed on the optical bench. The balanced detector system includes at least two optical detectors that receive interference signals. An electronic amplifier system installed within the optoelectronic package amplifies an output of at least two optical detectors. Also disclosed is an integrated optical coherence tomography system. Embodiments are provided in which the amplifiers, typically transimpedance amplifiers, are closely integrated with the optical detectors that detect the interference signals from the interferometer. Further embodiments are provided in which the interferometer but also preferably its detectors are integrated together on a common optical bench. Systems that have little or no optical fiber can thus be implemented.
US08437005B2 Optical sensor having a non-negligible source coherence length
An optical sensor, a method of configuring an optical sensor, and a method of using an optical sensor are provided. The optical sensor includes an optical waveguide having a length and a laser source optically coupled to the waveguide. The laser source has a coherence length. Light from the source is transmitted to the waveguide as a first signal propagating along the waveguide in a first direction and a second signal propagating along the waveguide in a second direction opposite to the first direction. The optical paths of the first signal and the second signal are substantially reciprocal with one another and the first signal and the second signal are combined together after propagating through the waveguide to generate a third signal. The coherence length is greater than 1 meter or is in a range between 200 microns and 10 centimeters.
US08437004B2 Detection apparatus
A detection apparatus which illuminates a sample and detects light reflected by the sample, comprises a light source, a columnar reflecting member having a columnar reflecting surface which reflects light having entered a first end of the columnar reflecting member by a plurality of number of times, and emits the light from a second end of the columnar reflecting member, a mirror which reflects light radiated by the light source so as to guide to the first end and a detector, wherein the sample is illuminated with the light emitted from the second end, and the detector is configured to detect the light which has been reflected by the sample and has passed through the columnar reflecting member, and a reflecting surface of the mirror is a concave surface, and a shape of a reflecting surface of the mirror on a section perpendicular to an axis of the columnar reflecting member is concave.
US08437003B2 Information processing apparatus and method
An information processing apparatus includes an obtaining unit configured to obtain first information regarding a distribution of reflected light from a target to be measured and second information regarding geometrical-optics components of the reflected light, a calculating unit configured to calculate third information on the basis of the first information and the second information, the third information indicating an approximation of the distribution of reflected light, and an output unit configured to output information regarding wave-optics components of the reflected light on the basis of the third information.
US08437002B2 Imaging optical inspection device with a pinhole camera
The invention relates to an imaging optical inspection setup for inspecting a sample (5). Said inspection setup comprises a source of light (3) illuminating a specified portion of the sample surface by non-collimated light (4) in a plane of illumination, at least one pinhole (7) arranged in a path of reflected light (4′) reflected from said portion and/or in a path of transmitted light (4″) travelling through the entire thickness of the sample (5) in said sample portion, said pinhole (7) extending at least in the plane of illumination, and at least one screen and/or at least one position-sensitive detector system (8) arranged in the path of light (4′, 4″) passing through said pinhole (7) and adapted to intercept said light (4′, 4″), said detector system (8) being susceptible of sensing light intensity distribution along at least a line.
US08436997B2 Optical inspection system with polarization isolation of detection system reflections
An optical inspection system includes a polarizing isolator that reduces error in measurements by preventing ghost light reflected or scattered from element of a detection subsystem from re-entering the illumination and detection optical paths. The polarizing isolator may include a polarizing splitter that isolates light directionally according the a linear polarization state and two quarter-wave plates for transforming linearly polarized light to circularly polarized light.
US08436995B2 Method of optimising the sensitivity of a surface plasmon ellipsometry apparatus
A method of optimising the sensitivity of surface plasmon ellipsometry (SPE) apparatus used to analyse a surface comprising a conducting film is disclosed. The method includes calculating a sensitivity map of plasmon ellipsometry for the film. The sensitivity map comprises data defining variations in sensitivity of the plasmon ellipsometry apparatus with angle of incidence and polarization angle of polarized light incident on the conducting film for analysis by the apparatus. The method further comprises using the sensitivity map to configure the plasmon ellipsometry apparatus with a combination of the angle of incidence and polarization angle located in a region of substantially maximum sensitivity in the sensitivity map.
US08436993B2 Methods and systems for controlling the flow of particles for detection
A method of focusing particles is provided. The method includes transiting a fluid containing particles therein through a channel at a flow rate and adjusting the flow rate for a desired transit time through an interrogation zone through which a light from an excitation source passes. The method further includes optically exciting the particles with the excitation source, detecting an optical signal from the particles, and analyzing the optical signal. The particles may be droplets. Further, the particles may transit the interrogation zone in single file. A system of focusing particles is also provided. The system includes a channel having an inlet for accepting a fluid containing particles. The system further includes a flow adjuster configured to adjust the flow rate for a desired transit time through an interrogation zone, a light source configured to optically excite the particles, and a detector configured to detect optical signals from the particles.
US08436991B2 Device for analysing materials by plasma spectroscopy
A device for analyzing materials by plasma spectroscopy is of the portable and independent type, comprising a housing (10) containing a laser generator (18) that emits laser pulses that are focused on the surface of a material to be analyzed by means of a parabolic mirror (32) that is movable in translation inside the housing in order to perform a series of spot measurements along a scan line on the surface of the material to be analyzed and in order to take a measurement from a calibration sample (50) mounted in the measurement endpiece (22) of the housing (10).
US08436983B2 Optical system, exposure system, and exposure method
An optical system is able to achieve a substantially azimuthal polarization state in a lens aperture while suppressing loss of light quantity, based on a simple configuration. The optical system of the present invention is provided with a birefringent element for achieving a substantially circumferential distribution or a substantially radial distribution as a fast axis distribution in a lens aperture, and an optical rotator located behind the birefringent element and adapted to rotate a polarization state in the lens aperture. The birefringent element has an optically transparent member which is made of a uniaxial crystal material and a crystallographic axis of which is arranged substantially in parallel with an optical axis of the optical system. A light beam of substantially spherical waves in a substantially circular polarization state is incident to the optically transparent member.
US08436980B2 Illumination optical apparatus, relay optical system, exposure apparatus, and device manufacturing method
An illumination optical apparatus guides to an illumination object a light beam emitted from a light source. The illumination optical apparatus includes an enlarging optical system, disposed between the light source and the illumination object, and a reduction optical system, disposed between the enlarging optical system and the illumination object. The enlarging optical system is formed so that an image plane is disposed between the light source and the illumination object.
US08436976B2 Display device, finder device and camera
To provide a small-size display device of a simple structure which can perform both of superimpose display and finder field-of-view control.[Means for Solving Problems]A display device 20 includes a first optical material layer 26 which is arranged between a pair of transparent base plates 24a, 24b and transmits light coming from a one surface of the base plate to another surface, a area 32 arranged in the first optical material layer 26, available to output light L0 coming from a side surface between the pair of base plates through the another surface, and a second optical material layer 27 arranged between the pair of base plates 24a, 24b adjacent to the first optical material layer 26 and available to switch status of transmitting the light L1 coming from the one surface to the another surface, and a status of scattering the light L1 to output through the another surface, or a status of outputting the light L1 in a direction different from the light transmitted through the first optical material layer 26.
US08436974B2 Illuminating device and liquid crystal display device provided with the same
Provided is an illuminating device wherein generation of luminance nonuniformity is suppressed, while suppressing deterioration of light use efficiency. An illuminating device (10) is provided with an FPC (8), which has at least a part (8a) perpendicularly arranged to a light incoming surface (3a) of a light guide plate (3) and has an LED (7) mounted on the part (8a). The FPC (8) is also provided with a part (8b) positioned below a region between the LED (7) and the light incoming surface (3a), and the part (8b) is tilted in a diagonally downward direction toward the light incoming surface (3a).
US08436969B2 Photo alignment process and liquid crystal display using the same
A photo alignment process and a liquid crystal display using the same are provided. The photo alignment process includes the following steps. A photo alignment material layer is formed on a substrate. The photo alignment material layer is irradiated by a linearly polarized light. A surface of the photo alignment material layer is a first plane. A wave vector of the linearly polarized light is a K vector. A second plane is constructed from a normal vector of the first plane and the K vector. A polarization direction of the linearly polarized light is neither perpendicular nor parallel to the second plane.
US08436968B2 Flat display device integrated with photovoltaic cell
A flat display device integrated with a photovoltaic cell is disclosed. The flat display device includes a first substrate, a second substrate, a display medium layer, a first photovoltaic cell, a connecting layer and a conductive structure. The display medium layer is sealed between the first and second substrates. The first photovoltaic cell is disposed on the first substrate. The connecting layer is disposed on the second substrate and is capable of electrically connecting the first photovoltaic cell to an external circuit. The conductive structure is disposed between the first and second substrates, and is electrically connected with the first photovoltaic cell and the connecting layer.
US08436966B2 Liquid crystal display device and manufacturing method thereof
An LCD (liquid crystal display device) and a manufacturing method thereof are provided. The LCD includes a top substrate, a bottom substrate, and an alignment mark for aligning a polarizing plate on the top substrate or the bottom substrate. Also, the method includes: forming a metal layer on a substrate and forming a gate electrode, a gate line, and an alignment mark; forming a thin film transistor and a data line on the substrate with the gate electrode, the gate line, and the alignment mark; and forming a passivation layer and a pixel electrode on the substrate with a source/drain electrode.
US08436965B2 Semiconductor device
External light is reflected due to a difference in refractive indices of a black matrix and a glass substrate. When the black matrix is a black resin, there is a difference in refractive indices of the black resin and a first substrate. Also, there is a difference in refractive indices of the colored layer and the first substrate. Therefore, external light is slightly reflected. There is a problem in that the reflected light reduces contrast. A structure in which one polarizing element having dichroism is interposed between a pair of substrates is employed, and a light interference layer is provided between a color filter and a glass substrate, whereby a difference in refractive indices is moderated to reduce light reflection.
US08436964B2 Backlight unit and liquid crystal display device having the same
A backlight unit for a liquid crystal display (“LCD”) device includes a light emitting diode (“LED”) light source and a light conversion layer disposed separate from and above from the LED light source. The light conversion layer includes a semiconductor nano crystal, converts light emitted from the LED light source to white light and provides the white light to a liquid crystal panel of the LCD.
US08436962B2 Illumination device and liquid crystal display device
A backlight (illumination device; 2) of the present invention includes: multiple light sources (5); multiple light guide plates (7, 17, . . . ) for causing surface emission of light from the light sources (5); and a diffusing plate (8) for diffusing light from the light guide plates (7, 17, . . . ), the diffusing plate (8) being provided so as to be separate from and face the light guide plates (7, 17, . . . ). Each of the light guide plates (7, 17, . . . ) includes: a light-emitting section (7b) having a light-emitting surface (7a); and a light guide section (7c) for guiding, to the light-emitting section (7b), light from the light sources (5), a light-emitting section (17b) of the first light guide plate (17) being provided above a light guide section (7c) of the second light guide plate (7) adjacent to the first light guide plate (17). A light amount adjusting section (11) for reducing the amount of light incident on it is provided so as to be separate from the diffusing plate (8) and so that the orthogonal projection of the light amount adjusting section (11) onto the light-emitting region covers the boundary between any adjacent light guide plates (7, 17, . . . ). This allows for production of a tandem-type illumination device having further improved luminance uniformity.
US08436960B2 Prism sheet and liquid crystal display
A prism sheet having a function for preventing damage while assuring light collecting performance, and a liquid crystal display employing it. The prism sheet (6) has a first major surface on which light from a light source impinges, and a second major surface from which the incident light exits. A plurality of first prism rows (6a) having triangular cross-section are formed in parallel on the second major surface. A plurality of second prism rows (6b) having a round top and higher than the first prism rows (6a) are also provided on the second major surface.
US08436959B2 Liquid crystal display and fabrication method thereof
A liquid crystal display and a fabrication method thereof are provided. The liquid crystal display includes a liquid crystal display panel having a plurality of pixels. A backlight module is disposed under the liquid crystal display panel. A lens is disposed between the liquid crystal display panel and the backlight module, having a plurality of optical structures formed on an upper surface and a lower surface thereof. The lens can disperse lights from the backlight module to form a plurality of chromatic light sources, wherein each chromatic light source is composed of colored lights with a continuous spectrum formed from a red light to a violet light and corresponds to each pixel.
US08436958B2 Electronic device having organic light emitting diode display device
An electronic device having an impact resistance property is provided. The electronic device includes an organic light emitting diode (OLED) display device and a housing receiving the OLED display device. The OLED display device includes a panel assembly on which a plurality of OLEDs are formed and a printed circuit board electrically connected to the panel assembly. The housing includes a reinforcing housing having an impact absorption ability and defining first and second spaces, an upper housing disposed within the first space and physically coupled to the reinforcing housing, and a lower housing disposed within the second space and physically coupled to the reinforcing housing. The panel assembly is located in the first space.
US08436957B2 Liquid crystal display device having good heat radiating function
Disclosed is a liquid crystal display (LCD) device having a good heat radiating function. Surface areas of a lower cover, an upper cover, and a guide panel are increased by forming grooves at the lower cover, the upper cover, and the guide panel. Heat generated from an optical source is rapidly radiated through the lower cover, the upper cover, and the guide panel having increased surface areas. This may prevent temperature increment of a backlight unit.
US08436956B2 Display apparatus
In a display apparatus, each pixel includes a gate line, a storage line spaced apart from the gate line, and a data line crossing the gate line. The pixel includes a switching device connected to the gate line and the data line, a protective layer provided with an opening formed therethrough in an area where the gate line and the storage line are arranged adjacent to each other, and a pixel electrode arranged on the protective layer to be connected to the switching device and overlapped with the storage line. The opening is overlapped either the gate line or the storage line. Thus, a direct-current electric field is formed between the gate line and the storage line corresponding to an area where the opening in the protective layer is formed, and impurity ions are trapped by the direct-current electric field.
US08436955B2 Liquid crystal display having pairs of power source supply lines and a method for forming the same
A liquid crystal display wherein a first power source supply line and a second power source supply line are respectively applied with a first voltage and a second voltage having a predetermined magnitude, and a first power source supply line and a second power source supply line are disposed as a pair between a first pixel electrode and a second pixel electrode. The first voltage and the second voltage may have different polarities.
US08436954B2 Method of driving liquid crystal display device, and liquid crystal display device
A method of the present invention, for driving a liquid crystal display device includes the step of applying, when spray-bend transition of liquid crystal molecules is completed, a constant voltage to a storage capacitor electrode so that an electric potential difference between a pixel electrode and a common electrode becomes greater than an electric potential difference between the pixel electrode and another pixel electrode adjacent to said pixel electrode when application of a voltage for the spray-bend transition of the liquid crystal molecules is stopped.
US08436953B2 Stereoscopic display
A stereoscopic display includes: a display panel configured to display an image in either one of two or more arrangement states including a first arrangement state and a second arrangement state which are switchable with each other; and a lens array device arranged to face a display surface of the display panel. The lens array device produces a lens effect in a direction, the direction of effect being changed between in the first arrangement state and in the second arrangement state. The display panel includes an array of a plurality of sub-pixels, and a combination of sub-pixels used as a unit pixel is changed between in the first arrangement state and in the second arrangement state.
US08436948B2 Remote control system, television set and remote controller using manipulation signals
A remote control system of the present invention is provided with a TV apparatus and a remote controller, and performs two-way communication. The remote controller is provided with a microphone and a speaker, and generates and outputs sound source data. Furthermore, by the use of wireless communication modules, the sound source data produced by the remote controller is transmitted to the TV apparatus, and the sound source data is transmitted from the TV apparatus to the remote controller, that is, the sound source data is exchanged, with the result that the sound source data is outputted from the TV apparatus and the remote controller.
US08436947B2 Combined telephone/TV remote control
When a person arrives home with his mobile phone, the phone sends a presence signal via Bluetooth to the TV system in the home, which enables a telephone feature in which phone calls to the phone are relayed to the TV system. The remote control associated with the TV has a microphone and speaker so that a person can use the RC not only to control the TV but also to respond to phone calls, with the TV system relaying voice signals from the RC back to the phone.
US08436944B2 Wireless communications system, adaptor apparatus for video apparatus, video apparatus and control method for wireless communications system
In a wireless communication adapter device, in order to reduce connection time to a destination when another sink device is selected as the destination, a control unit included in the wireless communications adaptor device determines whether a device ID of an adapter device for a sink device and EDID information corresponding to the device ID are registered in an EDID managing table. The device ID and the EDID information are obtained through authentication processing with the adapter device for the sink device. When the device ID is registered, the control unit copies the EDID information corresponding to the device ID to the EDID table. When the device ID is not registered, the control unit obtains the EDID information from the authenticated adapter device for the sink device, associates the EDID information with the device ID, and stores the EDID information and the device ID in the EDID managing table.
US08436943B2 System and method for automated audio visual system control
A system and method are provided for automating control of a plurality of video displays coupled to a plurality of video sources through a switchable network. The method includes the operation of mapping a signal path for each signal between the plurality of video sources and the plurality of video displays to form a binding map. The binding map can be stored in a controllable device. In addition, a graphical user interface on a navigator can be generated. The graphical user interface is configured to represent the plurality of video displays. A further operation is connecting the plurality of video displays to the plurality of video sources through the switchable network based on the binding map and a user selection made with the graphical user interface in the controllable device.
US08436941B2 Information presenting device and information presenting method
An information presenting device includes: a first image generating unit configured to extract, from video data input by way of an input unit, a portion of the video data, and generate multiple main images; a second image generating unit configured to generate multiple sub-images from information correlated to the video data; and an image output unit configured to generate a display image, wherein the plurality of main images are placed in time sequence, and each of the plurality of sub-images are displayed in time sequence corresponding to the main images.
US08436939B2 AV delay measurement and correction via signature curves
Embodiments of the present invention provide systems and methods for non-invasive, “in-service” AV delay detection and correction. These systems and methods do not modify the audio signal or the video signal, nor do they rely on any metadata to be carried with the audio signal or the video signal via the distribution path. Instead, agents located at various points along the distribution path generate very small signature curves for the audio signal and the video signal and distribute them to a manager via a separate data path other than the distribution path. The manager calculates a measured AV delay caused by the distribution path based on these signature curves, and then optionally corrects the measured AV delay by adjusting an in-line delay in the distribution path.
US08436936B2 Circuits and methods for calibrating actuator displacement
Embodiments of the present invention include circuits and methods for calibrating position displacement in a voltage controlled actuator. In one embodiment, a calibration circuit comprises an actuator having a control terminal for receiving a programmable control voltage to set a displacement, a switch that selectively decouples said programmable voltage from said control terminal and couples a reference current to said control terminal when the control terminal is decoupled from said control voltage, a comparator that senses a voltage difference between said control voltage and said control terminal, and a timer coupled to an output of the comparator. The timer measures a time period required to increase the control terminal voltage. The capacitance of the actuator may be determined and used to calibrate the position of the actuator.
US08436929B2 Display control apparatus, display control method, and program
There is provided a display control apparatus including an external memory accommodating unit for accommodating a removable external memory; a database recognizing unit for recognizing a database stored in the external memory, the database being recorded with an image stored in the external memory and information related to the image in correspondence to each other; a display method setting unit for setting either display method of a stored first display method or a second display method of displaying the image stored in the external memory without using the database based on a recognition result of the database recognizing unit; and a display controlling unit for displaying the image stored in the external memory by the display method based on the set display method.
US08436927B2 Solid-state imaging device
According to one embodiment, in a pixel array unit, pixels that accumulate photoelectrically converted charges are arranged in a matrix shape. A vertical signal line transmits a signal read out from the pixels in the vertical direction. An acceleration circuit shifts the potential of the vertical signal line in advance before a signal is read out from the pixels. The acceleration control circuit controls timing for shifting the potential of the vertical signal line in advance. The timing control circuit generates a control signal for controlling the acceleration control circuit.
US08436920B2 Camera apparatus with magnified playback features
An embodiment of a camera apparatus includes transferring a compressed playback streaming signal output from a recording medium to a map defined in a memory circuit, decoding the transferred playback streaming signal by a decoder, converting the decoded signal to a YUV signal in an image processing unit, transferring the converted signal to the map as a YUV signal, generating a magnified or reduced image from the YUV signal in the image processing unit, and storing the image on the map, overlaying a magnified or reduced image prepared on the map according to a magnified playback request, and outputting the overlaid image for seeking an output position.
US08436915B2 Image processing apparatus
An image processing apparatus comprises image processing units adapted to process image data obtained from an image input unit, a first memory that stores image data that has been processed by the image processing units, a first bus that transfers the image data between the image processing units and the first memory, a second memory that stores image data transferred from the first memory, a second bus connected to the first memory and the second memory; and a control unit adapted to control the transfer of the image data stored in the first memory to the second memory via the second bus based on a signal from the image processing units indicating that image processing is not currently performed.
US08436914B2 Method for automatic exposure control within a video capture device
On embodiment of the present invention sets forth a technique for automatically computing exposure parameters for a digital video camera (DVC) system. The exposure parameters include exposure gain, analog gain, and digital gain. Each frame is analyzed with respect to an image luma value. Exposure gain and analog gain are adjusted to reduce differences between a target image luma value and measured image luma values over sequential frames. Digital gain is adjusted with respect to each frame to reduce visually abrupt changes in sequentially captured video frames.
US08436913B2 Method for efficient target detection from images robust to occlusion
The method for efficient target detection from images robust to occlusion disclosed by the present invention detects the presence and spatial location of a number of objects in images. It consists in (i) an off-line method to compile an intermediate representation of detection probability maps that are then used by (ii) an on-line method to construct a detection probability map suitable for detecting and localizing objects in a set of input images efficiently. The method explicitly handles occlusions among the objects to be detected and localized, and objects whose shape and configuration is provided externally, for example from an object tracker. The method according to the present invention can be applied to a variety of objects and applications by customizing the method's input functions, namely the object representation, the geometric object model, its image projection method, and the feature matching function.
US08436911B2 Tagging camera
A tagging camera device may include an image capturing logic configured to receive an image signal containing data representing at least one of a photographic image and a digital video. The tagging camera device may further include database communication logic configured to receive from at least one database data representing information from an online social network. The tagging camera device may further include identification logic configured to receive an identifying signal containing data identifying one or more objects appearing in the at least one of the photographic image and the digital video. The tagging camera device may further include tagging logic configured to tag a portion of the at least one of the photographic image and the digital video by associating the portion of the at least one of the photographic image and the digital video with the data representing information from the online social network based on the data identifying the one or more objects appearing in the at least one of the photographic image and the digital video, where the tagging logic is configured to automatically tag the portion of the at least one of the photographic image and the digital video.
US08436904B2 Method and apparatus for calibrating video camera
A method for calibrating the video camera includes: obtaining the internal and external parameters of the video camera according to a reference template; recording data of a reference object in the scene; obtaining images of the reference object from at least two perspectives; and obtaining the internal and external parameters of the video camera according to the recorded data of the reference object. An apparatus for calibrating the video camera includes: a preliminary calibration unit, configured to obtain the internal and external parameters of the video camera according to a reference template, and record the data of a reference object in the scene; a recalibration unit, configured to obtain images of the reference object from at least two perspectives, and obtain the internal and external parameters of the video camera according to the recorded data of the reference object. The invention is applicable to various scenes and features simple operations.
US08436900B2 Pattern matching camera
A camera includes: an imaging unit that captures an image of a subject and obtains image data; a similarity level calculation unit that calculates a similarity level indicating a level of similarity of an image within a search frame to a template image in correspondence to each search frame position assumed as the search frame is shifted within a search target area set in each of frames input in time series from the imaging unit; a subject position determining unit that determines as a subject position a position assumed by the search frame, at which the similarity level is highest, in correspondence to each frame; a subject tracking unit that tracks the subject position from frame to frame; and a rangefinding unit that measures a distance (subject distance) from the camera to the subject, wherein: the similarity level calculation unit calculates the similarity level by factoring in rangefinding results.
US08436894B2 Liquid crystal display system which adjusts backlight to generate a three-dimensional image effect and method thereof
When an image frame is generated, a plurality of backlight blocks are driven according to percentage of the image frame being generated, and a left shutter and a right shutter of a pair of shutter glasses are switched according to the time the image frame is generated. In this way, ghost shadows resulting from right eye images or left eye images can be avoided.
US08436890B2 Three-dimensional measuring device and board inspection device
A three-dimensional measuring device includes an irradiation means capable of irradiating a striped light pattern used for a spatial encoding method and a striped light pattern used for a phase shift method on a measurement object part on a board main body, an imaging means capable of imaging a measurement object part irradiated by the light pattern, an image control means for controlling imaging by the imaging means, a first calculation means for calculating a height of the measurement object part according to the phase shift method based on a multiplicity of image data imaged by the imaging means, and a second calculation means capable of using the spatial encoding method to identify a line corresponding to the measurement object part from among the image data at a time of calculation by the first calculation means by the phase shift method based on the image data.
US08436886B2 Optical scanning device and image forming apparatus
In an optical scanning device, a light-source driving unit drives a light source to modulate a light beam in units of single dot, a deflecting unit deflects the light beam, and a scanning optical system guides the deflected light beam to a scanning surface having an active writing area for forming an image. A static beam spot size, which is a beam spot size of the light beam on the scanning surface when the light beam passes a predetermined image height, is set such that a scanning beam spot size, which is a beam spot size of the light beam on the scanning surface when the light beam is moved to scan during the light beam exposes a single dot, is kept substantially constant.
US08436880B2 Thermal printer
A thermal printer in which papers in a plurality of different widths are usable is configured of a platen roller unit including a platen roller; a thermal printhead unit including a thermal printhead and an exothermic element array; and a plurality of bias elements arranged on the thermal printhead in a width direction to press the thermal printhead onto the platen roller, in which the number of the bias elements is a value obtained by dividing a maximum width of the different widths by a highest common factor of the different widths; the bias elements are arranged with an equal interval which is the highest common factor of the different widths; and among the bias elements, a bias element arranged outside of the width of a paper in use is configured not to apply a load to the thermal printhead to press the platen roller.
US08436876B2 Backlight unit with controllers of air and fluid and display device having the same using two different lights
Provided are a backlight unit and a display device having the same. The backlight unit includes a case having an opening, at least one lamp assembly disposed on a side surface of the case and including a light source, an optical transreflective unit on the case, the optical transreflective unit transmitting a portion of first light passing through the opening and reflecting a portion of second light generated from the light source, and an optical sheet including a first diffusion unit on the optical transreflective unit.
US08436869B2 Method for a representation of image data from several image data volumes in a common image representation and associated medical apparatus
Method for the representation of image data from several image data volumes in at least one common image representation on an image display unit connected to a computer, in particular for the representation of medical image data, whereby in the or at least one image representation image data from at least one data volume which are to be assigned or have been assigned to different areas of the image representation are represented by the computer, at least in part, with reciprocally different opacity.
US08436867B1 System and method for generating computer graphic images by identifying variant and invariant shader arguments
A degree of detail calculation required for calculations to process computer graphics data is determined based on input parameters that are varying in certain dimensions. During a detail analysis of a shader, a directed graph is built in such a way that each connection between nodes indicates a dependency among inputs and outputs of calculations and/or input parameters. For each input parameter, variability information about the input parameter is obtained. A lattice or a table representing dimensional variability is used to determine a variability value for each calculation for given input parameters and dependency relationships among other calculations. After a variability value has been determined for each calculation, calculations are grouped into several groups and executed once per the variability value.
US08436866B2 Inter-frame texel cache
Methods, apparatuses, and systems are presented for caching. A cache memory area may be used for storing data from memory locations in an original memory area. The cache memory area may be used in conjunction with a repeatedly updated record of storage associated with the cache memory area. The repeatedly updated record of storage can thus provide a history of data storage associated with the cache memory area. The cache memory area may be loaded with entries previously stored in the cache memory area, by utilizing the repeatedly updated record of storage. In this manner, the record may be used to “warm up” the cache memory area, loading it with data entries that were previously cached and may be likely to be accessed again if repetition of memory accesses exists in the span of history captured by the repeatedly updated record of storage.
US08436864B2 Method and user interface for enhanced graphical operation organization
A computer-implemented method and user interface for organizing graphical operations and displaying performance data of a graphics processing pipeline. More specifically, embodiments provide a convenient and effective mechanism for enhancing graphics processing by automatically determining and grouping graphical operations with similar state attributes relating to one or more units of the graphics pipeline. As such, pipeline adjustments for reducing execution time of one graphical operation may benefit other graphical operations with similar state attributes, thereby reducing the number of pipeline adjustments and allowing more careful selection of graphical operations to increase performance and reduce image degradation. Also, the display of the grouped graphical operations also provides information for determining the troublesome operations. In one embodiment, the groups are ranked by their respective execution time. Additionally, other forms of performance data may be displayed for graphical operations with similar state attributes, thereby providing additional information to guide enhancement operations.
US08436863B2 Switch for graphics processing units
Methods and apparatuses are disclosed for improving switching between graphics processing units (GPUs). Some embodiments may include a display system, including a plurality of GPUs, a multiplexer coupled to the plurality of GPUs, a timing controller coupled to the multiplexer, where the timing controller may provide an indication signal to the multiplexer indicative of a period when a first GPU is experiencing a first blanking interval.
US08436862B2 Method and system for enabling managed code-based application program to access graphics processing unit
One embodiment of the present invention sets forth a method for enabling an intermediate code-based application program to access a target graphics processing unit (GPU) in a parallel processing environment. The method includes the steps of compiling a source code of the intermediate code-based application program to an intermediate code, translating the intermediate code to a PTX instruction code, and translating the PTX instruction code to a machine code executable by the target graphics processing unit before delivering the machine code to the target GPU.
US08436860B1 Techniques for using depth maps
Techniques for determining a position of a component of an animated object relative to a surface represented by a depth map and updating the state of the animated object based upon the determination. Updating the state of an animated object may change one or more of the animated object's geometric and/or non-geometric properties, such as changing the position and/or orientation of a component(s) of the animated object, changing a color associated with the animated object, and the like.
US08436854B2 Graphics processing unit with deferred vertex shading
Techniques are described for processing graphics images with a graphics processing unit (GPU) using deferred vertex shading. An example method includes the following: generating, within a processing pipeline of a graphics processing unit (GPU), vertex coordinates for vertices of each primitive within an image geometry, wherein the vertex coordinates comprise a location and a perspective parameter for each one of the vertices, and wherein the image geometry represents a graphics image; identifying, within the processing pipeline of the GPU, visible primitives within the image geometry based upon the vertex coordinates; and, responsive to identifying the visible primitives, generating, within the processing pipeline of the GPU, vertex attributes only for the vertices of the visible primitives in order to determine surface properties of the graphics image.
US08436852B2 Image editing consistent with scene geometry
Image editing which is consistent with geometry of a scene depicted in the image is described. In an embodiment a graphical user interface (GUI) is provided to enable a user to simply and quickly specify four corners of a rectangular frame drawn onto a source image using the GUI. In embodiments, the four corners are used to compute parameters of a virtual camera assumed to capture the image of the drawn frame. Embodiments of an image processing system are described which use the virtual camera parameters to control editing of the source image in ways consistent with the 3D geometry of the scene depicted in that image. In some embodiments out of bounds images are formed and/or realistic-looking shadows are synthesized. In examples, users are able to edit images and the virtual camera parameters are dynamically recomputed and used to update the edited image.
US08436851B2 Systems and methods for rendering three-dimensional graphics in a multi-node rendering system
A system is provided for rendering three-dimensional graphics. An embodiment of the system comprises a host capable of executing an application program that calls for the rendering of at least three-dimensional graphics in an application window, and logic associated with the host for apportioning content defining a three-dimensional graphics window to be rendered. The embodiment of the system further comprising a plurality of render nodes configured to collectively render the three-dimensional graphics window in response to the content supplied by the host, and logic associated with a first render node configuring the render node to be capable of rendering only a portion of the three-dimensional graphics window based on apportioned content that the first render node receives from the host and without content comprising a portion of the three-dimensional graphics window apportioned to at least one other of the plurality of render nodes.
US08436849B2 Circuit driving for liquid crystal display device
The present invention relates to a circuit for driving a liquid crystal display device in which no multi-flicker preventive signal FLK, but only single flicker preventive signal FLK, is used for reducing numbers of pins of a timing controller and a level shifter. The circuit for driving a liquid crystal display device includes a liquid crystal panel having a plurality of pixel regions for displaying an image, a timing controller for generating one flicker preventive signal and a plurality of clock signals and gate control signals to control driving timing of a gate driver, a gate pulse modulation unit for logically operating the one flicker preventive signal and the plurality of clock signals from the timing controller to generate a plurality of flicker preventive signals, and modulating a gate high voltage from the timing controller according to each of the plurality of flicker preventive signals generated thus to generate a plurality of modulated gate on voltages; a level shifter unit for changing the plurality of clock signals from the timing controller according to the plurality of modulated gate on voltages from the gate pulse modulation unit and a gate low voltage from the timing controller to generate a plurality of level shifted and modulated clock signals; and a gate driver for driving gate lines on the liquid crystal panel according to the a plurality of level shifted and modulated clock signals.
US08436848B2 Gate output control method
An exemplary gate output control method includes the following steps: providing a gate control signal; using an angling control signal to angling modulate the gate control signal so as to generate a modulated gate control signal; and supplying the modulated gate control signal to a first integrated gate driver circuit and a second integrated gate driver circuit, to sequentially control the gate outputs of the first integrated gate driver circuit and the second integrated gate driver circuit. A duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the first integrated gate driver circuit is different from another duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the second integrated gate driver circuit.
US08436846B2 Display device and electronic device
A display device capable of displaying a picture of vivid colors maintaining a good balance of colors and a good balance of light-emitting brightnesses of the EL elements. The widths of the detour wirings supplying current to the power source feed lines are increased for those EL elements into which a current of a large density flows. This constitution decreases the wiring resistances of the detour wirings, decreases the potential drop through the detour wirings, and suppresses the amount of electric power consumed by the detour wirings.
US08436842B2 Display apparatus
Provided is a display apparatus capable of reducing the scale of a drive circuit and decreasing the frame. A display area in which pixels are provided in matrix, a scanning line drive circuit for driving scanning lines, and a signal line drive circuit for driving signal lines are provided on a support substrate. The pixel within the display area is constituted with a plurality of dots. Each dot corresponds to a color filter of a certain color. The dot is in a laterally long shape, i.e. in a shape extending in a direction along the scanning lines. In other words, each dot is in a shape extending in parallel with the longitudinal direction of the signal line drive circuit. The color filters are of lateral stripe type, for example.
US08436839B2 Input device having tactile function, information input method, and electronic device
A haptic function-provided input device performs a touch operation to slide on an input detection plane. The device includes an input detection unit, which has the input detection plane, that detects a touching position of an operation body and a sliding speed of the operation body. The device also includes a computation unit that computes a vibration pattern based on the sliding speed detected by the input detection unit. Further, the device includes a vibration unit that vibrates the input detection plane based on the vibration pattern computed by the computation unit. The computation unit computes the vibration pattern further based on a shift in an excitation timing between two actuators of the vibration unit.
US08436838B2 Touch pen
A touch pen includes a bush, a sliding rod, and a pen body. The sleeve has a pen head secured at an end and defines a receiving hole. The sliding rod is fixed in the receiving hole and defines a guiding slit. The pen body has an extending end defining an accommodating hole. The extending end is receivable in the receiving hole and the sliding rod is receivable in the accommodating hole. A holding pin is secured in the accommodating hole and passes through the guiding slit, the pen body slides relative to the pen head, the holding pin slides along the guiding slit and can be hold at the two ends of the guiding slit.
US08436837B2 Stylus input system
Embodiments of the present invention enable stylus input on a display device coupled to a processor. According to one embodiment, a stylus control unit detects the presence of a stylus within a display area of a display device and then displays a pair of frames including luminescent images on the display device. Furthermore, luminescent measurement data is transmitted from the stylus to the stylus control unit, and stylus position information is sent to a computer processor based on the received luminescent measurement data.
US08436835B2 Touch device, display substrate, liquid crystal display and operation method for photo sensor
A touch device is disposed on a substrate having a plurality of gate lines. The touch device comprises a power line, a photo sensor and a readout line. The photo sensor is electrically coupled to the power line and two specific gate lines of the gate lines, and generated a different output signal according to irradiation with a different level. The readout line is electrically coupled to the photo sensor for outputting the output signal. The photo sensor comprises a readout switch and a photosensitive switch. The readout switch is electrically coupled to one of the two specific gate lines. The photosensitive switch is electrically coupled to another of the two specific gate lines and the power line. Signals in another of the two specific gate lines and the power line cooperate to determine whether the photosensitive switch is in an off state.
US08436834B2 Optical touch device and locating method thereof
An optical touch device includes a light guide module including a first light guide component, a second light guide component, a third light guide component and a fourth light guide component, a light source module including a first light emitting component and a second light emitting component for emitting light alternately and an image detecting module disposed between two neighboring ends of the first light guide component and the second light guide component. The third light guide component and the fourth light guide component are mirror light guide components. A field of view of the image detecting module covers the third light guide component and the fourth light guide component. The optical touch device can avoid a blind zone and can be used as a dual-touch device or a multi-touch device. A locating method and a linear source module are also provided.
US08436832B2 Multi-touch system and driving method thereof
Provided are a multi-touch system and a driving method thereof. The method includes, extracting using a digital processor a touch frequency and at least one angle associated with at least one touch from image information captured by each of at least two cameras, selecting a touch mode on the basis of sum value of the touch frequencies extracted from the image information captured by the cameras, and performing a touch function corresponding to the selected touch mode using a user interface.
US08436831B2 Capacitive touch detection system and detection signal receiving and waveform shaping module
An exemplary capacitive touch detection system includes a capacitive touch panel and a detection control circuit. The capacitive touch panel includes a plurality of input terminals and output terminals. The detection control circuit includes a scanning signal transmitting module electrically coupled to the input terminals and a detection signal receiving and waveform shaping module including a receiver and an impedance-matching network. The detection signal receiving and waveform shaping module is electrically coupled to the output terminals for receiving and processing a plurality of detection signals outputted from the respective output terminals and thereby producing a plurality of processed detection signals. The receiver is used for receiving the detection signals. The impedance-matching network is used for performing a waveform shaping operation applied to the detection signals to compensate an effect caused by uneven RC loading distribution in the capacitive touch panel and thereby producing the processed detection signals.
US08436826B2 Two-way touch-screen based communication system
Embodiments of the disclosure generally set forth a two-way touch screen based communication system. One example method may include receiving an order for a food item submitted by the first touch screen device via a first network, wherein the order is associated with a first identification for a merchant, a second identification for the customer, and a negotiable parameter reflective of a preference of the customer. The method may also include making available the order for a second touch screen device of the merchant to retrieve via a second network and to display and prior to completing processing of the order, transmitting a first response to the preference of the customer to the first touch screen device via the first network, wherein the first response is submitted by the second touch screen device.
US08436824B2 Toothed slider
An example method includes measuring a capacitance variation of a first conductive element and a capacitance variation of a second conductive element. The example method includes calculating a centroid position through the measured capacitance variation of the first conductive element and the measured capacitance variation of the second conductive element. A conductive sub-element of the first conductive element may be interleaved with a conductive sub-element of the second conductive element. The conductive sub-element of the first conductive element and the conductive sub-element of the second conductive element may each have a varying width.
US08436818B2 Mobile terminal having touch screen and method for displaying cursor thereof
A portable terminal including a touch screen and method for displaying a cursor thereof are provided. The method includes determining whether a capacitance is equal to or greater than a first critical value and is less than a second critical value, if the change of the capacitance is sensed in the touch screen, displaying a cursor in an area where the change of the capacitance is sensed, if the capacitance is equal to or greater than the first critical value and is less than the second critical value, and performing a function corresponding to the area where the cursor is displayed, if the capacitance sensed in the area where the cursor is displayed is equal to or greater than the second critical value.
US08436817B2 Data input device by detecting finger's moving and the input process thereof
Disclosed herein are a data input device and an input conversion method using the data input device. The data input device includes a detection unit provided in a predetermined input region, the detection unit processing first directional input that generates a first directional input signal through detection of lateral pressing in a predetermined radial direction by a finger placed at a reference location in the input region, second directional input that generates a second directional input signal through detection of vertical pressing in a predetermined direction in a state in which the finger is placed at the reference location, third directional input that generates a third directional input signal through detection of tilt pressing in a state in which the finger is placed at the reference location, and fourth directional input that generates a fourth directional input signal through detection of a tilt input in a state in which the finger is placed at the reference location; and a control unit configured to determine input locations of a lateral pressing direction, vertical pressing direction, tilt pressing direction and tilting direction of the finger, extract relevant data from memory, and input the extracted data; wherein the data is input through combination of two or more of the first to fourth directional inputs.
US08436815B2 Selective enabling of multi-input controls
A control system is disclosed that is configurable (e.g., by a programmer) so as to enable input from multiple sources to capture to multiple controls. Also or alternatively, the system is configurable so as to enable input from multiple sources to capture to a single control. The system also provides a consistent and extendable scheme for filtering out conflicting events for individual controls. In one embodiment, this means that the system is configurable (e.g., based on the programmer's asserted preferences) so as to enable a selective determination as to whether additional inputs can be captured for a given control.
US08436814B2 In-vehicle manipulation apparatus and in-vehicle input apparatus
A two-dimensional operation section includes a stick-shaped rocking shaft having an end having an operation knob. The operation knob is operated within a predetermined two-dimensional operation surface determined as an operation range such that a rocking axis of the rocking shaft tilts from a predetermined neutral angular position to a direction corresponding to an instructed position. A one-dimensional operation section has an operation surface exposed in a main surface of the operation knob, the main surface being an end surface of the rocking shaft. The one-dimensional operation section can be operated in a predetermined one-dimensional operation direction determined within the two-dimensional operation surface relative to the operation surface.
US08436810B2 Indication of the condition of a user
A wearable electronic device such as a wrist watch (60) is supplied with conventional clock with two pointers (32,33). The device displays a parameter indicative of how “cool” the wearer has been over the past period as a function of time, using the time axis of one of the pointers (32,33). “Coolness” can be based on the measurement of related physiological parameters like heart-rate, body temperature, movement, skin resistance or muscle activity. “Coolness” of a person is understood as being the ability to cope with stress. Therefore, the stability of physiological parameters can be used to derive a signal for the subjective trait called “coolness”. All physiological parameters can be measured by sensors (10) in the watch (60) or in the strap (50). The invention is used as a gadget for self expression and emotional feedback.
US08436808B2 Processing signals to determine spatial positions
An apparatus is disclosed for supplying input signals to a computer. A sensor having the form of a sphere has a touch sensitive surface for generating position data for touch events. The sensor includes orientation sensors that determine rotation with respect to the earth's magnetic and gravitational fields. Orientation data may be combined with position data to interpret the orientation of touch events on the surface with respect to the computer's display. Cursor movement or text may be generated from touch events. Preferably the sphere has a roughened surface that generates sound when touched. Position data is generated by processing signals from microphones under the sphere's surface.
US08436800B2 Shift register circuit, display panel, and electronic apparatus
Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor.
US08436798B2 Method for driving electro-optic device, electro-optic device, and electronic apparatus
A method for driving an electro-optic device includes a first and second electrode and a pair of substrates sandwiching an electro-optic layer driven by the first electrode. The method involves shifting one of two potentials input to at least one of the electrodes such that a potential difference between the first and second electrode where the potential input to the first electrode is higher than the potential input to the second electrode is larger than a potential difference between the first and second electrode where the potential input to the first electrode is lower than the potential input to the second electrode, when a gray-scale level where potential input to the first electrode is higher than potential input to the second electrode is equivalent to the gray-scale level where potential input to the first electrode is lower than potential input to the second electrode.
US08436793B2 Light emitting apparatus, electronic equipment and method of driving pixel circuit
A light emitting apparatus includes a pixel circuit and a driving circuit which drives the pixel circuit. The pixel circuit includes: a driving transistor which generates a driving current; a light emitting device that determines gradation depending on the driving current; a light emission control transistor; a discharge transistor; a capacitor device; and a first switching device interposed between a gate and a drain of the driving transistor.
US08436788B2 Method and apparatus for displaying
Aspects of the disclosure provide a display system. The display system can include a display module having a configurable optical characteristic that varies from substantially transmissive to substantially reflective, at least one data capturing device configured to capture data to form a display image, and at least a first projector configured to project the display image to the display module. Therefore, the display image can be overlaid with a real image according to an optical configuration of the display module.
US08436786B2 Multi-screen synchronized playback system, display control terminal, multi-screen synchronized playback method, and program
A multi-screen synchronized playback system capable of synchronizing, with high accuracy, playback start times of content to be displayed on multiple screens. The multi-screen synchronized playback system has a plurality of display control terminals and a synchronization server connected to the plurality of display control terminals. The synchronization server includes a synchronization time transmitting section for simultaneously transmitting time information of a clock of the synchronization server to the plurality of display control devices. The display control terminal includes a time setting section for setting time on a clock of the display control terminal based on the time information simultaneously transmitted from the synchronization server, and a display control section for starting playback of content at a playback start time set for each content, based on the time on the clock of the display control terminal.
US08436785B1 Electrically tunable surface impedance structure with suppressed backward wave
A method of delaying the onset of a backward wave mode in a frequency selective surface having a two dimensional array of conductive patches or elements and an RF ground plane, the two dimensional array of patches or elements being interconnected by variable capacitors, the method comprising separating grounds associated with the variable capacitors from the RF ground plane and providing a separate conductive mesh structure or arrangement as a bias voltage ground for the variable capacitors. A tunable impedance surface comprises a RF ground plane; a plurality of patches or elements disposed in an array a distance from the ground plane; a capacitor arrangement for controllably varying capacitance between at least selected ones of adjacent patches or elements in the array; and a grounding mesh associated with the capacitor arrangement for providing a control voltage ground to capacitors in the capacitor arrangement, the grounding mesh being spaced from the RF ground plane by dielectric material.
US08436784B2 Reconfigurable axial-mode helical antenna
Novel reconfigurable antennas are provided which may be used to accommodate the requirements for wideband multi-standard handheld communication devices. It is shown that using a shape memory alloy spring actuator, the height of a helical antenna and therefore the pitch spacing and angle can be varied. This can in turn tune the far-field radiation pattern and gain of the antenna dynamically to adjust to new operating conditions. The radiation pattern can further be directed using a two-helix array. Finally, a helical antenna embodiment is implemented and measured using a shape memory alloy actuator. Measurement results confirm that while keeping the centre frequency constant, gain tunability can be attained using this structure.
US08436783B2 Dielectrically-loaded antenna
A dual-band dielectrically loaded helical antenna for circularly polarised signals has two groups of helical antenna elements. In each group there are at least four such elements and they are connected at their distal ends to a respective feed coupling node and at their proximal ends to a common linking conductor. Each group includes pairs of neighbouring such antenna elements, each pair having one electrically short element and one electrically long element, and the arrangement of the elements is such that in each group the number of pairs in which, in a given direction around the core, the short element precedes the long element is equal to the number of pairs in which, in the same direction, the long element precedes the short element.
US08436780B2 Planar loop antenna system
An inexpensive planar antenna fabricated as a plurality of parallel layers of multi turn spiral loops co-located with conductive material at the center of the loops, there being an exclusion zone free of conductive material between the innermost loop and the conductive material at the center. The conductive material may comprise circuit elements, for example batteries, amplifiers, antenna drivers or other functional elements as well as passive elements. In one embodiment, the loop traces may be staggered. In another embodiment, the loop traces are varied in width as a function of position within the loop cross section. In further embodiments, the planar form is integrated with additional orthogonal planar antennas substantially coplanar with the first planar antenna and having axes orthogonal to the first planar antenna and to one another. In further embodiments the exclusion zone is extended by design rules and confining routes in a circuit section. The antenna system may be configured as a three dimensional omnidirectional antenna and is well adapted for small form factor hand held and portable wireless applications.
US08436777B2 Measurement apparatus and method thereof
A measurement apparatus includes an anechoic chamber, a DUT board, rotation units, and a feeding arm. The anechoic chamber has inner-walls. Each inner-wall is covered with a radio wave absorber. One of the inner-wall is a first wall with an aperture and the other inner-walls are second walls. The DUT board holds a first antenna to be measured with radiation property and a probe to detect a signal from the first antenna. A part of the DUT board is inserted into the anechoic chamber through the aperture opened in the first wall. One end of the feeding arm holds a second antenna radiating a radio wave to the first antenna in the anechoic chamber. Each rotation unit provides on each second wall and is selectively attached to the other end of the feeding arm for rotating the second antenna and for feeding to the second antenna.
US08436775B2 Fakra-compliant antenna
A circuit-board mountable antenna (50, 80, 90) has a substrate (12,14) compliant with the IPC/JEDEC J-STD_0202C and IEC-norm standard 60068, which specifies the spacing and pin arrangements for a printed circuit board (PCB) mountable connector commonly known in the automotive electronic art as a “FAKRA” or “Fakra.” A radio frequency (RF) energy transducer or antenna (54) is applied to or formed over the substrate (12, 14) which is provided with at least one mounting pin (16) and a signal lead (18), the spacing and locations of which are compliant with the Fakra ISO-compliant hole pattern. The antennae (50, 80, 90) thus provide a circuit board (70) mountable antenna, compliant with the Fakra standard. The Fakra-compliant antenna or a Fakra-compliant connector can be attached to the circuit board (70) for a communications device (100) at the time of assembly to enable the communications device to use either a concealed or concealable antenna or an external antenna.
US08436774B2 Mobile communication device
A mobile communication device includes a ground plane and an antenna. The antenna is disposed on a dielectric substrate and includes a radiating metal portion, a coupling metal portion, and an inductive shorting metal portion. The radiating metal portion provides a resonant path for the antenna to generate first and second operating bands. The coupling metal portion is coupled to the radiating metal portion to form a first coupling portion and is connected to a source through a connecting metal strip. One end of the inductive shorting metal portion is electrically connected to the radiating metal portion, and the other end is electrically connected to the ground plane. The inductive shorting metal portion includes a first fractional section coupled to the radiating metal portion to form a second coupling portion, and a second fractional section coupled to the coupling metal portion to form a third coupling portion.
US08436772B2 Device and method for estimating an orientation of a mobile terminal device
A device for estimating a current orientation of a mobile terminal device at a current geographical position, wherein, at the current geographical position, a current measurement package may be determined which has a transmitter identification and an electromagnetic signal characteristic of a radio transmitter which may be received at the current geographical position with the current orientation of the mobile terminal device at a current measurement time, with a determiner for determining an accordance measure between the current measurement package and a reference measurement package, which has a transmitter identification, a reference orientation and an electromagnetic signal characteristic of a reference radio transmitter which was receivable at a geographical reference position allocated to the reference measurement package with the reference orientation at a reference time lying before the current measurement time, a selector for selecting at least one reference measurement package which has an accordance measure, and a determiner for determining an estimate for the current orientation of the mobile terminal device based on the reference orientation of the at least one selected reference measurement package.
US08436768B2 Diversity time and frequency location receiver
A Wide Area Sensor Network is disclosed that utilizes wideband software defined radios (SDRs) to provide a capability to monitor the airwaves over a wide frequency range, detect when critical frequencies are being jammed or otherwise interfered with, and locate the source of the interference so that the interference can be eliminated. In addition, a diversity receiver is disclosed. The diversity receiver generates position, time and frequency references for use in locating and synchronizing sensor platforms of a WLS. In an illustrative embodiment, the diversity receiver comprises a first receiver subsystem comprising a terrestrial broadcast receiver, and a common processor platform (CPP) coupled via first link means to the first receiver subsystem. The first receiver subsystem provides a stable time reference and position information to the CPP via the first link means. In addition, the diversity receiver includes second link means for coupling the diversity receiver to a sensor platform and providing time and frequency references and location data to the sensor platform.
US08436767B1 Apparatus and method for executing equipment inspection requirements
A method executes inspections on equipment of a system. The method includes providing an equipment inspection location rule group for a piece of equipment in the system, the equipment rule group including one or more equipment inspection location rules about equipment inspection locations and expected values at said inspection locations, and actions to be commanded when sampled values match the expected values; selecting one or more of the equipment inspection location rules in a corresponding rule group, the selection being made according to a predetermined operating sequence of the equipment inspection location rules; determining if the selected one or more equipment inspection location rules has been satisfied; and executing one or more actions corresponding to the selected one or more equipment inspection location rules if the selected one or more equipment inspection location rules have been satisfied.
US08436765B2 Communication processing device and distance measurement method in communication processing device
A radio frequency signal oscillator and an intermediate frequency signal oscillator are incorporated in a communication processing device, and a carrier wave with which an intermediate frequency signal is overlapped is generated using the oscillators and transmitted from an antenna. Mixers separate and extract an I signal and a Q signal from the intermediate frequency signal in the signal received by the antenna. A phase difference detector detects a phase difference of the intermediate frequency signal in a reflected wave to the intermediate frequency signal in the carrier wave using the I signal and the Q signal after the reception of the reflected wave from a tag is started. A distance calculator calculates a distance from the antenna to the tag using the phase difference and a wavelength of the intermediate frequency signal.
US08436764B2 Radar sensor and method for operating a radar sensor
In operating a radar sensor, a modulation sequence having a number n of successive linear frequency ramps having different slopes an is cyclically repeated. A received radar signal reflected from an object is mixed with the emitted radar signal to form an intermediate frequency signal, which is analyzed for each frequency ramp with respect to its frequency spectrum. Peaks occurring in the frequency spectra of the intermediate frequency signal correspond to ambiguity lines in a distance/velocity space. Possible objects are assumed at intersection points of the ambiguity lines. The expected position which the possible objects would have at the point in time of the repetition of the modulation sequence is precalculated. The slope an of at least one of the frequency ramps is established for a subsequent modulation sequence in such a way that none of the expected positions of a possible object in the distance/velocity space is at an intersection point of precalculated ambiguity lines of the other possible objects.
US08436763B2 Radar system comprising overlapping transmitter and receiver antennas
A radar system for recording the environment of a motor vehicle includes transmission antennas for emitting transmission signals, receiver antennas for receiving transmission signals reflected by objects in the environment, and a signal processor for processing the received signals. The antennas are planar and are situated on a level surface. Received signals are acquired from different combinations of the transmitter and receiver antennas. In the signal processor, the angular position of objects in a spatial direction R is estimated from the received signals, based on recognition that the received signals from an individual object have different phase positions depending on the angular position of the object in the spatial direction R. Two of the transmitter and receiver antennas overlap in the spatial direction R without coinciding, by special arrangements or configurations of the transmitter and receiver antennas.
US08436760B1 Low power current-voltage mixed ADC architecture
The present disclosure includes systems and techniques relating to low power current-voltage mixed ADC architecture. In some implementations, an apparatus includes sample and hold circuitry, at least one ADC module configured to generate a first digital output based on a first analog input provided to the sample and hold circuitry, and current generation circuitry configured to modulate an analog output of the sample and hold circuitry to generate a residue output corresponding to the first analog input absent at least a portion corresponding to the first digital output, and to provide the residue output as a second analog input to further circuitry to generate a second digital output.
US08436759B2 ADC
This invention relates to Analog to Digital Converters (ADC) and, inter alia, to Time Interleaved ADCs and Successive Approximation Register (SAR) ADC's. In a conventional Time Interleaved ADC employing SAR ADC units, the input signal is processed through a track-and-hold circuit (T/H), and then through a buffer circuit, before the SAR ADC unit. There, by means of a comparator, the signal is compared with a Digital-to-Analog Converter (DAC) signal from the SAR logic. The buffer reduces the influence of capacitive loading and physical layout design on the SAR ADC input, but typically has a non-linear response and thus introduces distortion to the input signal. This can limit the ADC linearity, particularly for high-speed ADCs operating with low-supply voltages. An objective of the invention is to reduce or eliminate the effect of the buffer non-linearity. This is done in some embodiments by routing both the signals to the comparator through the same buffer circuit. In another embodiment the DAC signal is routed through a separate second buffer circuit. By use of a single buffer circuit, or where there is ideal matching of the buffer circuits in the latter embodiment, the distortion effects are completely eliminated; however, for practical imperfectly matched buffer circuits according to the latter embodiment, the gain and off-set mismatches can be accommodated through calibration of the buffers or, in suitable applications, through the DAC calibration.
US08436757B2 Complex bandpass ΔΣAD modulator and digital radio receiver
To provide a complex bandpass ΔΣAD modulator capable of suppressing the influence of an image component caused by a mismatch between I- and Q-channels on a signal component with low power consumption.A complex bandpass ΔΣAD modulator 10 is configured by a subtraction unit 20, a complex bandpass filter 30, an addition unit 40, a noise extraction circuit unit 50, an ADC unit 60, and a DAC unit 70. The noise extraction circuit unit 50 extracts a quantized noise signal of the ADC unit 60 based on an input signal of the ADC unit 60 and an output signal of the DAC unit 70, delays the extracted quantized noise signal by one sample time, phase-rotates the delayed signal by a predetermined angle, and feeds back the rotated signal to the input side of the ADC unit 60. Thus, a complex bandpass ΔΣAD modulator capable of suppressing the influence of the image component caused by a mismatch between I- and Q-channels on the signal component with low power consumption is provided.
US08436754B2 Encoding and decoding method and device
The present invention relates to information processing technologies and discloses an encoding and decoding method and device to solve the poor decoding quality problem. The technical solution of the present invention includes: encoding each sample of an input signal to generate an encoded signal of a core layer; comparing residuals of all or a part of the samples of the input signal with encoding thresholds, where the residuals are generated by core layer encoding, and performing encoding according to comparison results to generate an encoded signal of an enhancement layer; and writing the encoded signal of the core layer and the encoded signal of the enhancement layer into a bitstream to generate an encoded signal of the input signal.
US08436752B2 Input key subassembly for minimizing emission of light from unintended paths
An input key subassembly for a handheld communication device is dislosed herein. The input key subassembly includes a dome overlay panel and a lightguide panel. The dome overlay panel includes a dome overlay layer and a dome switch having a peak facing frontally. The dome overlay layer has a front face located adjacent to the backside of the lightguide panel. The lightguide panel has at least one keystem and is located above a respective dome switch. A recessed perimeter region about the keystem has a height relative to the backside of the lightguide panel that is less than a height between the front side of the lightguide panel and the backside of the lightguide panel.
US08436750B2 Method of monitoring the landing phase of an aircraft
The invention is a method making it possible to calculate and monitor the provisional landing distance and the configuration of the aircraft and flight parameters during the changes in the landing phase manoeuvre. The method consists in determining the landing runway then in analyzing the configuration and the dynamic parameters of the aeroplane, the meteorological and airport data in order to assess, from a performance database, whether the planned braking is suitable and will stop the aeroplane before the end of the runway.
US08436747B2 Vehicle illumination system
A vehicle illumination system includes a light source emitting light for illuminating the vehicle surroundings or the vehicle interior or both, and a modulation unit modulating the emitting of light of the light source, where the emitted light is modulated with a frequency that is high enough so that the modulation of the light is substantially not perceivable by a person.
US08436745B2 Flow consumption modular meter
The invention relates to a flow consumption modular meter. It comprises a base module providing the connection between flow distribution lines and a subscriber supply, equipped with a metering connection interface and a metering module equipped with an interface for connecting to the base module via the metering connection interface. Electrical components of a permanent nature are installed in the base module and electronic components of a changeable nature are installed in the metering module. Application to flow meters, particularly electricity meters.
US08436737B1 Postural state attitude monitoring, caution, and warning systems and methods
A postural state attitude monitoring, caution, and warning system includes a multiple axis accelerometer carried by a node for generating output signals that are a function of positional orientation of the node along a path of attitude displacement of the node extending from a reference position of the node to a caution position of the node, and from the caution position of the node to a warning position of the node, and a signal device operatively coupled to the multiple axis accelerometer for issuing a caution signal in response to a caution positional state of the node at the caution position of the node and distally therebeyond to inside of the warning position of the node, and for issuing a warning signal different from the caution signal in response to a warning positional state of the node at the warning position of the node and distally therebeyond.
US08436735B2 System for detecting information regarding an animal and communicating the information to a remote location
Described is an animal data communication system for detecting particular conditions and actions of an animal, compiling information indicative of the detected conditions and actions, communicating the information to a remote location, and presenting the information at the remote location. The animal data communication system includes a carried device and an interfacing device. The carried device detects particular conditions and actions of the animal and compiles the corresponding information. The carried device is in communication with the interfacing device and transmits the information to the interfacing device. The interfacing device communicates the information to a network. The user of the animal data communication system accesses the network by way of a display device, which is in communication with the network, and perceives the information. The display device is disposed at a location remote to the animal such that the user can perceive the information at the remote location.
US08436729B2 Pulse width coding with adjustable number of identifier pulses based on change in heart rate
A monitor provides a wireless signal with respective pulses, based on a heartbeat, repetitive physical movement, or other repetitive bodily action of a user. The pulses include longer duration pulses whose duration identifies the monitor, and distinguishes it from other monitors which may provide crosstalk interference. The longer duration pulses are interspersed among short duration pulses to reduce power consumption. The pulses are transmitted in successive cycles, where the number of the longer duration pulses is set adaptively in each cycle based on a detected rate, or rate of change, of respective instances of the bodily action. A receiver unit processes the signal to determine a rate of the bodily action and provide a corresponding output. The receiver unit can synchronize with two or more consecutive longer duration pulses. The pulse duration can be fixed or determined dynamically, e.g., non-deterministically.
US08436726B2 Stage evaluation of a state machine
The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.
US08436720B2 Monitoring operating parameters in a distributed computing system with active messages
In a distributed computing system including a nodes organized for collective operations: initiating, by a root node through an active message to all other nodes, a collective operation, the active message including an instruction to each node to store operating parameter data in each node's send buffer; and, responsive to the active message: storing, by each node, the node's operating parameter data in the node's send buffer and returning, by the node, the operating parameter data as a result of the collective operation.
US08436719B2 Network device
A network device includes a status displaying module, a network module, a processor, a power providing module, and a power saving circuit. The network module implements network functions of the network device. The status displaying module receives displaying signals from the network module. The processor directs the network module to implement the network functions. The power providing module provides power for the processor, the network module, and the status displaying module. The power saving circuit couples the displaying signals to obtain coupled signals and controls modes of the processor and the power providing module according to presence of the coupled signals.
US08436718B2 Noncontact communication apparatus and noncontact communication method
A noncontact communication apparatus is disclosed which includes: an antenna resonance circuit configured to have a coil for communicating with an opposite party through electromagnetic coupling; a changing block configured to change a Q-factor of the antenna resonance circuit; and a control block configured to control the antenna resonance circuit to transmit and receive data to and from the opposite party at one of a plurality of communication speeds prepared beforehand, the control block further controlling the changing block to reduce the Q-factor the higher the communication speed in use.
US08436717B2 Rotation-activated electronic component
A rotation-activated electronic component, preferably a RFID tag mounted on or incorporated in a support that is rotated when read, e.g. a CD or DVD. The RFID tag comprises an antenna, a rotational switch and a component, advantageously a processor. The antenna is adapted to transform received RFID signals to electric energy that powers the component. In a preferred embodiment, the rotational switch is adapted to cut the circuit unless the support does not rotate at or above a certain rotational speed. Supports equipped with the RFID tag of the invention will thus respond only if they rotate sufficiently. This can avoid collisions in case more than one such RFID tag is within communication range of an antenna of a reader. In a preferred embodiment, the information returned by the component is needed for full use of the content on the support.
US08436716B2 Method of upgrading an operation program of a radio frequency identification system
A method of upgrading an operation program in an interrogator of a radio frequency identification (RFID) system including the interrogator and a transponder is provided. The method includes transmitting, from the interrogator to the transponder, a first message requesting an operation program upgrade based on information exchanged between the interrogator and the transponder; receiving, at the interrogator from the transponder, a second message that includes a new-version operation program in response to the first message; and installing, at the interrogator, the new-version operation program to upgrade the operation program in the interrogator.
US08436713B2 Door drive
The present invention relates to a door drive, in particular a garage door drive, with a door control and with a programming unit for programming the door control during operation and/or maintenance of the door drive. In accordance with the invention, the programming unit is configured as an external device, wherein for operation and/or maintenance of the door drive a data transmission connection can be established between the programming unit and the door control.
US08436710B2 Integrated circuit for information transfer
An integrated circuit for information transfer, having a substrate, at least one Hall element which is integrated into the substrate or situated on the substrate, a first coil which is situated essentially concentrically with respect to the Hall element and at a distance from the Hall element in the vertical direction and galvanically separated therefrom, and at least one second coil which is situated essentially concentrically with respect to the Hall element and galvanically separated therefrom and situated at a distance from the Hall element and the first coil in the vertical direction. The first coil and the second coil are electrically connected in series so that a current flow in the same direction results in the coils.
US08436706B2 Pumped loop refrigerant system for windings of transformer
A pumped loop cooling system is provided to cool a hollow winding of a transformer utilizing a two phase vaporizable dielectric refrigerant. A liquid refrigerant pump circulates the refrigerant into a transformer and through a copper tube winding of the transformer where the refrigerant at least partially vaporizes in removing heat from the transformer. The refrigerant is then circulated to a condenser and then back to the pump.
US08436704B1 Protected powder metal stator core and solenoid actuator using same
A solenoid actuator includes a stator assembly with a stator core of formed powder metal received in a stator housing. A ferromagnetic protective sleeve is in contact with and covers a majority of an inner end face and a cylindrical wall of the stator core, while a flux ring is in contact with and covers an outer end face of the stator core. An armature assembly includes an armature attached to a stem that is movable in an air gap relative to the ferromagnetic protective sleeve. A spring is operably positioned in the ferromagnetic protective sleeve but electrically isolated from the stator housing. The stator core is encapsulated to protect against erosion and fragmentation. A magnetic flux line around a solenoid coil passes through the stator core, the ferromagnetic protective sleeve, the armature, the flux ring and back to the stator core.
US08436703B2 Method for winding coil on object and water pump of clutch type provided with the same
A method for winding a coil on an object, wherein the coil includes a plurality of first coils and a plurality of second coils, may have winding the first coils on an exterior circumferences of the second coils, wherein an outer circumferences of the respective second coil is enclosed and in contact with outer circumference of at least three first coils, and wherein cross-sectional area of the second coil is smaller than that of the first coil, and wherein the outer circumference of the at least three first coils are in contact each other.
US08436701B2 Integrated electromechanical relays
Electromechanical relays and semiconductor structures and microelectromechanical systems including at least part of an electromechanical relay are presented. For example, an electromechanical relay includes an electrically conductive terminal within a printed circuit board, one or more electrically conductive contacts, and one or more magnetic actuators. The one or more magnetic actuators are respectively associated with the one or more electrically conductive contacts and each magnetic actuator includes (i) a magnetic core within at least one via extending through one or more layers of the printed circuit board, and (ii) an electrical coil around at least a portion of the magnetic core and within one or more layers of the printed circuit board. Activation of the one or more actuators causes electrical contact between the terminal and an associated one of the one or more electrically conductive contacts.
US08436695B2 Imbalance detection and reduction for wideband balun
A circuit converts a single-ended signal to differential signals that are balanced to have the same amplitudes and opposite phases. The circuit includes a balance tunable balun, a detector, and a controller. The balance tunable balun has a primary winding, a secondary winding, a control input, and a switched resistor-capacitor (RC) network. The primary winding receives the single-ended signal and the secondary winding outputs the differential signals. The control input receives a control signal and the switched RC network tunes an output imbalance of the balun responsive to this control signal. The detector detects the output imbalance and the controller generates the control signal to control the switched RC network to reduce that output imbalance. The circuit produces well balanced differential signals over a wide range of signal frequencies, even when asymmetries, process variations, or parasitic capacitance in the balun would otherwise result in imbalance.
US08436694B2 Load-line adaptation
According to the general concept disclosed herein, a circuit for adaptive matching of a load impedance to a predetermined load-line impedance of a load-line connected to a power amplifier output includes a fixed matching network between the power transistor and an adaptive matching network, whereby the fixed matching network acts as an impedance inverter which results in a relatively low insertion loss at high power. Results indicate that the impedance-inverting network can be used over more than a factor of 10 in impedance variation. Further, the usage of the fixed matching network, close to the power transistor, allows for the implementation of transmission zeros and/or for a well defined load impedance at a predetermined harmonic frequency, independent of the (variable) load impedance at the fundamental frequency.
US08436693B2 Filter-tracking and control method
A method to track and control the resonance frequency of a band-pass filter provides a solution for the sensitivity limitations against temperature and process variations. A phase sensing module obtains the phase difference between the input and output and a negative feed-back control architecture can be used to tune the filter's resonance over the input RF frequency.
US08436692B2 EMI trap using microwave circuit
In one example embodiment, a transmitter comprises a first component coupled to receive a signal for transmission and a second component communicatively coupled to the first component to transmit the signal over a transmission medium. The transmitter further comprises a planar transmission line formed on a substrate and disposed between the first and second components to couple the signal from the first component to the second component. The planar transmission line includes a first transmission line element formed on the substrate and configured to suppress radiation of EMI at a predetermined frequency.
US08436690B2 Hybrid system having a non-MEMS device and a MEMS device
A hybrid system having a non-MEMS device and a MEMS device is described. The apparatus includes a non-MEMS device and an integrated circuit including a MEMS device, the integrated circuit formed on a substrate. The integrated circuit includes a control circuit for the non-MEMS device and a MEMS control circuit for the MEMS device.
US08436685B2 Oscillating circuit, DC-DC converter, and semiconductor device
The oscillating circuit (100) includes a variable frequency oscillating circuit (10) for generating a clock signal (CK) whose frequency increases in response to an up-signal (UP) and decreases in response to a down-signal (DOWN), the frequency going up and down continuously between an upper-limit frequency and a lower-limit frequency. An up/down control circuit (20) outputs the down-signal when a duration of a low level of the clock signal drops below a first delay time and outputs the up-signal when the duration exceeds a second delay time longer than the first delay time.
US08436684B2 Apparatus and method for low noise amplification
Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated second bias voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of the impedance matching stage is also used, together with the output of the gain stage, to produce an output of the amplifier. A signal reuse stage may be provided between the output of the impedance matching stage and the output of the amplifier.
US08436682B1 Fourth-order electrical current source apparatus, systems and methods
Apparatus and methods disclosed herein operate to receive a differential input signal at a first-stage pair of transconductance devices. The differential signal is amplified by a second-order factor at a positive-side or a negative-side first-stage transconductance device, depending upon the polarity of the differential input signal, to create a second-order signal at the output of the appropriate first-stage device. The second-order output signal is then amplified by another second-order factor at a corresponding second-stage transconductance device. A resulting fourth-order signal is made available at an output node as a quartic-response current source. The quartic-response current source may be utilized as a dynamic bias source in conjunction with a linear amplifier to provide a high slew rate amplifier.
US08436681B2 Voltage regulation circuit
A voltage regulating circuit includes a pulse width modulation controller, a current sense circuit, a voltage feedback circuit, and a gain-and-bias circuit. The current sense circuit includes an inductor and a capacitor. The voltage feedback circuit includes first and second resistors. The gain-and-bias circuit includes an operational amplifier. A first terminal of the capacitor is connected to an inverting input terminal of the operational amplifier through a third resistor. A second terminal of the capacitor is connected to a non-inverting input terminal of the operational amplifier through a fourth resistor. The inverting input terminal of the amplifier is connected to an output terminal of the operational amplifier through a fifth resistor. The non-inverting input terminal of the operational amplifier is grounded through a sixth resistor. The output terminal of the operational amplifier is connected to the node between the first and second resistors through a seventh resistor.
US08436680B2 Multi-layered semiconductor apparatus
Provided is a multi-layered semiconductor apparatus with improved heat diffusion and improved heat release. The multi-layered semiconductor apparatus (100) includes a plurality of layered semiconductor chips (20-1, 20-2) that each include at least one circuit region, and the circuit regions are arranged such that heat generated by the circuit regions as a result of the circuit regions being driven is spread out. The multi-layered semiconductor apparatus (100) further comprises a heat releasing section (50) that releases the heat generated by the circuit regions, and the circuit regions are arranged such that there is less thermal resistance between the heat releasing section and circuit regions that generate a greater amount of heat per unit area.
US08436677B2 Structure for a reference voltage generator for analog to digital converters
A design structure is provided for a reference voltage generator. The design structure includes a first capacitor and an analog to digital converter having its voltage reference coupled to the first capacitor. The first capacitor supplies the voltage reference to the analog to digital converter. A control loop is configured to resupply charges to the first capacitor that are lost when the first capacitor supplies the voltage reference to the analog to digital converter.
US08436675B2 Feedback-controlled body-bias voltage source
A body-bias voltage source having an output monitor, charge pump, and shunt. a shunt circuit having on/off control is coupled to the output monitor and to the output of the charge pump. Upon sensing that the output voltage of the charge pump is above a desired value, the output monitor may disable the charge pump circuit and may enable the shunt circuit to reduce the voltage at the output of the charge pump. When the voltage output of the charge pump is below the desired value, the output monitor may disable the shunt circuit and may enable the charge pump circuit. A shunt circuit having proportional control may be substituted for the shunt circuit with on/off control.
US08436674B1 Self-scaled voltage booster
Various technologies described herein pertain to automatically adjusting the strength of a voltage booster of an image sensor. A self-scaled voltage booster includes a regulator, a controller, and two or more charge pumps that can be selectively enabled and disabled by the controller. The controller generates controller signals for the charge pumps based on a duty cycle of a regulator signal generated by the regulator. Moreover, the controller can maintain the controller signals without modification for at least a predetermined minimum period of time after a prior modification of at least one of the controller signals. Further, the controller can include a duty cycle and delay module (or a plurality of duty cycle and delay modules) that detects the duty cycle of the regulator signal and maintains the controller signals without modification for at least the predetermined minimum period of time.
US08436670B2 Power supply induced signal jitter compensation
Examples of circuits and methods for compensating for power supply induced signal jitter in path elements sensitive to power supply variation. An example includes a signal path coupling an input to an output, the signal path including a delay element having a first delay and a bias-controlled delay element having a second delay. The first delay of the delay element exhibits a first response to changes in power applied thereto and the second delay of the bias-controlled delay element exhibits a second response to changes in the power applied such that the second response compensates at least in part for the first response.
US08436668B2 Min-time hardended pulse flop
A flop circuit is disclosed. The flop circuit includes an input circuit configured to hold a logic value of an input signal received on its input node. The flop circuit further includes a storage circuit configured to, responsive to a pulse clock transitioning to a first logic level, receive and store the logic value and a complement of the logic value. A transfer circuit is coupled between the input circuit and the storage circuit, wherein the transfer circuit is configured to transfer the logic value from the input circuit to the storage circuit responsive to the pulse clock transitioning to the first logic level. The transfer circuit includes a first float node and a second float node and is configured such that at least one of the float nodes is floating during a portion of the operational cycle of the flop circuit.
US08436666B2 Interface apparatus for semiconductor integrated circuit and interfacing method thereof
An interface apparatus for a semiconductor integrated circuit and an interfacing method thereof controls the VOX of differential signals to a target level in response to the differential signals being outputted by an output block. The interface apparatus for a semiconductor integrated circuit includes an output block configured to output differential signals output by an internal circuit a detector configured to detect a timing error of the differential signals; and a controller configured to control a timing of the differential signals output by the internal circuit according to a detection result of the detector.
US08436664B2 Circuit and method for implementing power good and chip enable control by a multi-functional pin of an integrated circuit
A first switch is switched to short a multi-functional pin of an integrated circuit to a ground terminal or let a current supplied to the multi-functional pin to flow to a second switch connected to the multi-functional pin. Before the integrated circuit is ready, the second switch is closed circuit and is detected its current to determine a first signal to enable or disable the integrated circuit. After the integrated circuit is ready, the second switch is open circuit, the voltage at the multi-functional pin is detected to determine a second signal to enable or disable the integrated circuit, and when the voltage at the multi-functional pin is higher than a threshold, a power good signal is triggered.
US08436663B2 Low-current input buffer
A current-limited differential entry stage compares an input signal to a reference voltage generated by a current-limited transistor or diode configuration. Current limiters comprise a D-mode feedback transistor having a gate-source junction. The D-mode transistor is not conducting between the source and the drain if a gate-source voltage is more negative than a negative threshold voltage, and conducting between the source and the drain, otherwise a feedback connection connects the source of the D-mode feedback transistor to its gate via a component that generates a voltage drop.
US08436662B2 Junction gate driver with tapped inductor current source
A junction device driver is provided that includes a current regulator, an inductor coupled with the current regulator, and a switching module coupled with the inductor. The current regulator is configured to generate a current, and the inductor is configured to store energy generated by the current produced by the current regulator. The switching module is configured to control a conduction current for a gate of a junction device. The conduction current is generated, initially, from the stored energy of the inductor to thereby provide a relatively high initial current. As the energy stored in the inductor is discharged, the current level drops to a lower level that is sufficient to maintain the junction device in an “on” state.
US08436661B2 Input buffer capable of expanding an input level range
An input buffer includes a first amplification block, a second amplification block, and a buffer block. The first amplification block is configured to be driven by an external voltage, to differentially amplify an input signal and a reference voltage in response to a bias voltage, and to subsequently generate first and second differential signals. The second amplification block is configured to be driven by an internal voltage, to differentially amplify the first and second differential signals, and to generate an output signal. The buffer block is configured to be driven by the internal voltage, to buffer the output signal, and to output an inverted output signal.
US08436660B2 Voltage-mode driver with equalization
A voltage-mode differential driver may include a first nominal path that selectively couples a first supply or a second supply to a first output terminal in response to an input data. The voltage-mode differential driver may further include a first capacitive boost path that selectively couples the first supply or the second supply to the first output terminal responsive to the input data. The first capacitive boost path may be selectively enabled to provide a boost current to be added to a current from the first nominal path resulting in an output current to be provided to the first output terminal.
US08436659B1 Circuits and methods for reducing electrical stress on a transistor
Embodiments of the present invention include an electronic circuit that reduces stress on a transistor. In one embodiment, the electronic circuit comprises a transistor and a reference generator circuit. The transistor may be a metal oxide semiconductor (MOS) transistor, for example. The MOS transistor has a gate terminal to receive an input voltage. The reference generator circuit selectively couples first and second reference voltages to a source terminal of the MOS transistor. The reference generator circuit senses the input voltage and provides the first reference voltage to the source terminal of the MOS transistor if the input voltage is greater than a threshold and the second reference voltage is coupled to the source terminal of the first MOS transistor if the input voltage is less than a threshold.
US08436657B2 Semiconductor device having output driver
To provide an output driver that outputs read data to outside and a mode register that sets a swing capability of the output driver. A transition start timing of the read data driven by the output driver is made relatively earlier when a swing capability of the output driver set by the mode register is set to be relatively large, and the transition start timing is relatively delayed when the swing capability of the output driver set by the mode register is set to be relatively small. With this configuration, a timing when the read data exceeds a threshold level can be caused to coincide with a desired timing regardless of the swing capability of the output driver.
US08436655B2 Voltage level shift circuit and semiconductor device
A voltage level shift circuit in which a difference in response characteristic depending on the signal level of an input signal is suppressed. The voltage level shift circuit generates an output signal VOUT having a voltage amplitude different from that of the input signal. An inverter INV2 generates a voltage V1 in the range of VSS to VDDI according to the input signal. An inverter INV3 generates a voltage V2 in the range of VSS to VPERI according to the input signal. An inverter INV4 generates the output signal VOUT according to V1 and V2.
US08436654B2 Level converter circuit for use in CMOS circuit device provided for converting signal level of digital signal to higher level
A level converter circuit is provided for converting an input signal of a digital signal having a first signal level into an output signal having a second signal level higher than the first signal level. An amplifier circuit amplifies the input signal and outputs an amplified output signal, and a current generator circuit generates a control current corresponding to an operating current flowing through the amplifier circuit upon change of the signal level of the input signal. A current detector circuit detects the generated control current, and controls the operating current of the amplifier circuit to correspond to the detected control current. The current generator circuit includes series-connected first and second nMOS transistors as inserted between the current detector circuit and the ground. The first nMOS transistor operates responsive to the input signal, and the second nMOS transistor operates responsive to an inverted signal of the input signal.
US08436649B2 Semiconductor device, information processing apparatus, and method for configuring circuits of semiconductor device
Disclosed is a semiconductor device including a circuit information supply unit that supplies circuit information acquired from an outside of the semiconductor device; circuit configuration units that configure respective circuits based on the circuit information supplied from the circuit information supply unit; a specification unit that specifies whether to execute circuit configuration with respect to the circuit configuration unit; and a signal fixation unit that fixes values of signals outputted from the circuit configuration units to a designated value during a period at which the specified circuit configuration unit configures corresponding circuits based on the circuit information.
US08436648B1 Voltage sequence output circuit
A sequential voltage output circuit is connected between a power supply and a number of loads. The voltage sequence output circuit includes a complex programmable logic device (CPLD) and a number of switching circuits. When the CPLD receives a power on signal, the CPLD outputs a number of control signals sequentially through a number of outputs. When a switching circuit receives a control signal from the CPLD, the switching circuit allows the power supply to supply power to a corresponding load.
US08436647B2 Pipeline power gating for gates with multiple destinations
A first and second plurality of gates are coupled respectively between first and second source storage elements and first and second destination storage elements. The first and second plurality of gates are slept to reduce leakage current in the plurality of gates under certain conditions by turning off respective one or more transistors between the first and second plurality of gates and power supplies. A third plurality of gates are maintained in a reduced leakage current state (sleep state) or regular state (wake state) based on conditions associated with the source and destination elements for the first and second plurality of gates.
US08436645B2 Information generating apparatus and operation method thereof
An information generating apparatus and an operation method thereof are provided. The information generating apparatus includes a first logic contact, a second logic contact, an information output contact and a plurality of switches SW(i,j), wherein SW(i,j) represents a jth switch in an ith layer, 1≦i≦L, and 1≦j≦2(i−1). The switch SW(i,j) has a first input terminal, a second input terminal and an output terminal, wherein the output terminal is selectively connected to the first or the second input terminal. The first and the second input terminals of the switches SW(Lj) in the Lth layer are respectively connected to the first logic contact and the second logic contact. The first and the second input terminals of the switch SW(i,j) in other layers are respectively connected to the output terminals of the switches SW(i+1,2j−1) and SW(i+1,2j). The output terminal of the switch SW(1,1) is connected to the information output contact.
US08436644B2 Configuration method and FPGA circuit re-executing configuration based on adjusted configuration data
A configuration method performs a configuration of a FPGA circuit by setting configuration data from a configuration circuit to the FPGA circuit. The method counts, within the FPGA circuit, a number of times a configuration of the FPGA circuit fails. The method adjusts, within the FPGA circuit, the configuration data at a time when the configuration failed if the counted number exceeds an upper limit value, and re-executes the configuration based on the adjusted configuration data. The method sets the configuration data in which the configuration is succeeded from the FPGA circuit to the configuration circuit when the configuration is successful.
US08436641B2 Circuit and method for generating on-die termination signal and semiconductor apparatus using the same
Various embodiments of an on-die termination (ODT) signal generating circuit are disclosed. In one exemplary embodiment, the ODT signal generating circuit includes a latency unit and an ODT control signal generating unit. The latency unit is configured to receive a clock signal and an ODT signal. The latency unit is configured to delay the ODT signal by a predetermined time to generate a first ODT signal. The latency unit is also configured to delay the ODT signal by less than the predetermined time to generate a second ODT signal. The ODT control signal generating unit is configured to provide either one of the first and second ODT signals as an ODT control signal in response to a control signal.
US08436639B2 Circuits and methods for testing through-silicon vias
A multiple level integrated circuit uses an array of oppositely oriented individually enabled buffers between through-silicon vias (TSVs) and a clocked flip-flop, for each of multiple signal lines that include TSVs. Applying and/or reading logic levels to and from the TSVs and associated flip-flops produces values that a logic element compares to expected values characterizing nominal operation or detects open and short circuit defects. A process associated with testing the TSVs during assembly comprises testing for short circuits and then exposing and connecting the TSVs via a conductive layer to check for open circuits.
US08436631B2 Wafer stage
A wafer stage and a method of supporting a wafer for inspection. the wafer stage comprises a platform for supporting a wafer such that a backside of the wafer is suspended above a cavity of the platform; and a support structure disposed substantially within the cavity for supporting a portion of the wafer; wherein the wafer stage is adapted for relative movement of the platform with respect to the support structure for alignment of the wafer with respect to a probe.
US08436630B2 Corrected optical spectral responses for photoelectric devices
A system for measuring an optical spectral response of a photoelectric DUT includes a spectrally programmable light source including a broadband light source, a dispersive element for dispersing the light, and a spatial light modulator for controlling an intensity and a spectra of the light to provide a spectrally programmable light beam. A light distributing device is coupled to receive the spectrally programmable light beam and includes a light distributing structure for distributing the spectrally programmable light beam in a known ratio to a first area and a second area. A reference detector is positioned at the first area, and the DUT is positioned at the second area. Data acquisition electronics and a processor receive simultaneously generated output signals from the DUT and the reference detector to correct for intensity variation in the spectrally programmable light beam in determining the optical spectral response of the DUT.
US08436629B2 Device for the capacitive measurement of the quality and/or deterioration of a fluid, including a capacitive sensor that is mechanically uncoupled from the element in which it is encapsulated
The invention concerns a device for the capacitive measurement of the quality and/or deterioration of a fluid, wherein the device includes a sensor encapsulated in a perforated case, wherein the sensor is connected to the encapsulation so as to be mechanically uncoupled therefrom.
US08436628B2 Door position sensor
The present invention relates to a capacitive sensor system comprising a sensor circuit connected to a first (15) and a second (11) antenna, the first antenna (15) is arranged on a first object (10) and the second antenna (11) is arranged on a second object (11) movable relative to said first object (10). The first antenna (15) is arranged right next to the second object (11) for the sensor circuit to detect the movement and/or position of the second object (11).
US08436626B2 Cascaded-based de-embedding methodology
An embodiment is a method for de-embedding. The method comprises forming a primary structure in a semiconductor chip and forming an auxiliary structure in the semiconductor chip. The auxiliary structure replicates a first portion of the primary structure. The method further comprises determining a transmission matrix for each of the primary structure and the auxiliary structure based on measurements and extracting a transmission matrix of a first component of the primary structure by determining a product of the transmission matrix of the primary structure and an inverse of the transmission matrix of the auxiliary structure.
US08436625B2 Identification of power system primary arcs based on pulse density
A diagnostic instrument distinguishes primary arcs from other electrical discharges in an electric power system based on pulse time density of radio frequency noise caused by the discharges. The instrument counts a maximum number of noise pulses in any small time window over a period, and identifies the discharges as primary arcs if the pulse time density is in a range characteristics of primary arcs.
US08436622B2 Method for measurement of content of water or organic acid in polar organic solvent, and apparatus for the method
Disclosed are a measurement method and a measurement apparatus both of which can measure the content of water or an organic acid in a polar organic solvent with high accuracy even when water or the organic acid is contained in the polar organic solvent at a low content. The content of water or an organic acid in a polar organic solvent can be measured by using, as a work electrode, an ISFET electrode in which a thin film comprising an oxide or nitride of a metal or metalloid element belonging to Groups 3 to 15 is formed on a gate.
US08436621B2 pH measurement system using glass pH sensor
A pH measurement system using a glass pH sensor includes a power supply applying a voltage to the glass pH sensor through a resistor; a detector detecting the output voltage of the glass pH sensor; and a calculator calculating the pH of a solution based on the detected output voltage. The resistor provides a resistance of at least ten times less than the equivalent internal resistance of the glass pH sensor. The pH measurement system can improve the response rate by reducing the time constant depending on the dynamic characteristics of the glass pH sensor, and it is possible to diagnose whether the pH measurement system is defective or not by calculating the equivalent internal resistance and the supply voltage of the glass pH sensor.
US08436619B2 Integrated tag reader and environment sensor
A combined sensing and reading apparatus. The apparatus includes a tag reader and an environment sensor integrated with the tag reader. A battery maintenance tool that includes a tag reader and an environment sensor integrated with the tag reader is also provided. Examples of a battery maintenance tool include a battery tester and a battery charger.
US08436616B2 Sample tube and measurement method for solid-state NMR
A solid-state NMR sample tube and method of using same which can be spun stably and at high speed while suppressing its bending resonance. A solid sample to be investigated by solid-state NMR spectroscopy can be sealed in the sample tube. The sample tube includes a hollow cylinder having opposite ends. At least one of the ends is open. The sample tube has a length L, an outside diameter D, and an inside diameter d which satisfy a given relationship disclosed herein.
US08436612B2 Magnetic resonance apparatus and method for implementing a neurological sequence protocol
In a method and apparatus to generate MR images of an examination region containing tissue with a first T2 time and tissue with a second, significantly longer T2 time are contained, as series of pulse sequences is employed the following pulse sequences: an overview pulse sequence to generate MR overview images, a T1-weighted pulse sequence to generate T1-weighted MR images and a multiple contrast pulse sequence in which at least two groups of magnetic resonance signals are acquired. A first group of magnetic resonance signals is acquired after excitation of a magnetization in a first time period and at least one second group of magnetic resonance signals is acquired in a second time period after the first time period in which the tissue with the significantly longer T2 time delivers the significant signal contribution. An MR image is calculated based on a pixel-by-pixel difference of the absolute values from the magnetic resonance signals of the first group and the second group.
US08436611B2 Magnetic resonance imaging (MRI) using SPIR and/or CHESS suppression pulses
A magnetic resonance imaging apparatus includes an imaging condition setting unit and an image data acquisition unit. The imaging condition setting unit sets an imaging condition applying first and second suppression pulses of which at least ones of types, center frequencies and frequency bands are different from each other. The first and the second suppression pulses frequency-selectively suppress at least one of fat and silicone. The image data acquisition unit acquires image data according to the imaging condition.
US08436608B2 Eddy current inspection system and method
A multi-frequency eddy current (MFEC) inspection system is provided for inspection of case hardening depth on a part. The MFEC inspection system comprises a generator configured to generate one or more multi-frequency excitation signals and an eddy current probe configured to be disposed at one side of the part. The eddy current probe comprises one or more drivers and one or more pickup sensors. The one or more drivers are configured to receive the one or more multi-frequency excitation signals to induce eddy currents in the part. The one or more pickup sensors are configured to detect the induced eddy currents within a local area of the part to generate one or more multi-frequency response signals. The MFEC system further comprises a processor configured to receive the one or more multi-frequency response signals for processing to determine a case hardening depth of the local area of the part. A pulse eddy current inspection system and an eddy current inspection method are also presented.
US08436604B2 Measuring apparatus, parallel measuring apparatus, testing apparatus and electronic device
Provided is a measurement apparatus that measures a signal under measurement, comprising a first oscillation circuit that receives one pulse of the signal under measurement and begins oscillating according to the pulse of the signal under measurement to output a first oscillated signal; a second oscillation circuit that receives one pulse of a reference signal and begins oscillating according to the pulse of the reference signal to output a second oscillated signal having a period that is different from a period of the first oscillated signal; and a first sampling section that samples the first oscillated signal according to a pulse of the second oscillated signal. The first oscillation circuit and the second oscillation circuit each include a control section that selects one pulse; a delay section that delays the pulse; and a loop line that feeds the pulse back to an input terminal of the delay section.
US08436603B2 Voltage regulator operable to switch between a two-stage structure operation and a three-stage structure operation
Provided is a voltage regulator having a structure in which an output terminal of a first differential amplifier circuit is connected to a second differential amplifier circuit to control an output transistor by the second differential amplifier circuit. When low current consumption is required, the first differential amplifier circuit is suspended. When high-speed response is required, the first differential amplifier circuit is activated. The low-current consumption operation and the high-speed operation are switched with a minimum circuit area.
US08436602B2 Voltage compensation circuit
A voltage compensation circuit is disclosed for proving an elevated output AC voltage upon an under voltage input AC voltage condition. The voltage compensation circuit comprises an autotransformer having a first and a second autotransformer winding. A first position of a switch connects the first autotransformer winding to the input AC voltage for providing an elevated output AC voltage at the second autotransformer winding. The second position of the switch shorting the first autotransformer winding for providing a non-elevated output AC voltage.
US08436594B2 Control circuit and method for a digital synchronous switching converter
In addition to an output voltage control loop, a dead-time optimization loop is provided for a digital synchronous switching converter to dynamically adjust the dead-time for the power switches of the converter. It is extracted a minimal feedback signal at a steady state while the output voltage remains under a specification, and a maximal efficiency of the digital synchronous switching converter is thus obtained.
US08436587B2 Bipolar overvoltage battery pulser and method
A bipolar overvoltage battery pulser and method are provided that apply a positive pulse voltage and a negative pulse voltage alternately across the terminals of a battery. The object of the bipolar overvoltage battery pulser and method is to increase the cycle lifetime and capacity of storage batteries, such as lead acid batteries. The rise times for the leading edges of the positive pulses and for the trailing edges of the negative pulses are short compared to the ionic relaxation time in the electrochemical solution. Alternating between the positive and negative pulses gives each new pulse an equal starting condition without realizing any memory effect that otherwise may result if the last applied pulse was of the same polarity, which reduces the extent of overvoltage that may be applied to the battery and decrease the highest useable pulse cycling frequencies that could be achieved without experiencing pulse overlapping. The shape, type and timing of the pulses may be adjusted to create overvoltage pulses having high duration and amplitude.
US08436583B2 Multiple cell battery charger configured with a parallel topology
A multiple cell battery charger configured with a parallel topography is disclosed. In accordance with an important aspect of the invention, the multiple cell battery charger requires fewer active components than known battery chargers while at the same time protecting multiple battery cells from overcharge and discharge. The multiple cell battery charger in accordance with the present invention is a constant voltage battery charger that includes a regulator for providing a regulated source of direct current (DC) voltage to the battery cells to be charged. In accordance with the present invention, each battery cell is connected in series with a switching device, such as a field effect transistor (FET) and optionally a current sensing device. In a charging mode, the serially connected FET conducts, thus enabling the battery cell to be charged. The battery voltage is sensed by a microprocessor. When the microprocessor senses that the battery cell is fully charged, the FET is turned off, thus disconnecting the battery cell from the circuit. Since the battery cell is disconnected from the circuit, no additional active devices are required to protect the battery cell from discharge. As such, a single active device per cell, such as the FET, provides multiple functions without requiring additional devices. Accordingly, the battery charger in accordance with the present invention utilizes fewer active components than known battery chargers and is thus much less be expensive to manufacture.
US08436581B2 System for testing electromagnetic characteristics of an electromagnetic steel sheet in response to a non-sinusoidal wave control signal
A system for testing electromagnetic characteristics of an electromagnetic steel sheet includes: a driving unit operable based on a non-sinusoidal wave control signal from a control unit and a floating voltage to output a control output; a power output unit operable based on the control output from the driving unit to output a voltage output at an output side coupled across a first winding wound around the electromagnetic steel sheet such that an exciting current flowing through the first winding is generated in response to the voltage output, thereby resulting in an induced voltage across a second winding wound around the electromagnetic steel sheet; and a measuring unit outputting to the control unit an output corresponding to the exciting current and the induced voltage measured thereby such that the control unit obtains the electromagnetic characteristics of the electromagnetic steel sheet based on the output.
US08436579B2 Battery charger having analog charge profile for charging multiple batteries
A battery charger for charging a plurality of batteries includes a plurality of charge managers and a cross-over controller coupled to the charge managers. The charge managers are coupled to a common power source that has a finite maximum available current. The cross-over controller is configured to continuously determine the charge current that is applied to one of the batteries by one of the charge managers, and to direct another one of the charge managers to apply to another one of the batteries a charge current that is based on the determined charge current. The total of the determined charge current that is applied to the one battery and the charge current that is applied to the other battery (prior to when the voltage across the other battery reaches a rated value) is continuously substantially equal to the maximum available current.
US08436572B2 Switched reluctance machine
A reluctance machine includes a stator and a rotor having a same number of poles. The rotor is configured to rotate about an axis of rotation. Each stator pole is formed of a primary stator pole and an auxiliary stator pole. The auxiliary stator pole is axially aligned with the primary stator pole in the direction of the axis of rotation. Each rotor pole has a length extending in the direction of the axis of rotation sufficient to at least partially cover the primary stator pole and axially aligned auxiliary stator pole. The primary stator poles are actuated with an alternating magnetic field orientation, and the auxiliary stator poles are also actuated with an alternating magnetic field orientation. The field orientations for the primary and auxiliary stator poles are, however, opposite each other such that a primary stator pole its axially aligned auxiliary stator pole have opposite magnetic field orientations.
US08436564B2 Natural commutation for three phase brushless direct current (BLDC) motors
A control method for a sensor-less, brushless, three-phase DC motor. A pulse-width modulation (PWM) duty cycle may be calculated. A voltage induced by rotation of a rotor may be sampled at a first expected zero crossing value to produce a first sampled voltage value. An average of a plurality of sampled voltage values, including voltage values sampled at a plurality of prior expected zero crossing values and the first sampled voltage value, may be calculated. The first sampled voltage value may be subtracted from the calculated average to produce a delta zero crossing error (ZCE). The current value of an integral term corresponding to a rotational period may be updated according to the sign of the ZCE. The integral term may be updated periodically and multiple times during each rotational period. The ZCE may be subtracted from the integral term, and the resulting value may be used to generate one or more time values. Operation of the motor may be controlled based on the one or more time values and the PWM duty cycle.
US08436562B2 Bi-power motor controlling system and motor controlling apparatus thereof
A bi-power motor controlling system includes a motor, a system apparatus and a motor controlling apparatus. The system apparatus has a rotational-speed target value for determining the targeted rotational speed of the motor. In addition, the system apparatus outputs a first power and a second power to the motor and the motor controlling apparatus, respectively. The motor controlling apparatus detects the motor to obtain a first rotational-speed value of the motor, and then adjusts the rotational speed of the motor to a second rotational-speed value according to the first rotational-speed value. Then, the motor controlling apparatus further generates a rotational-speed feedback signal to the system apparatus. The system apparatus adjusts the outputted first power in accordance with the rotational-speed feedback signal to make the rotational speed of the motor reach the rotational-speed target value.
US08436557B2 Ballast control circuit and ballast control method for gas discharge lamp
The invention proposes a ballast control circuit and ballast control method for gas discharge lamp. The ballast control circuit and control method of the invention is advantageous by allowing the OFF time of the main switch of the ballast circuit to be fixed in order to prevent the transformer of the ballast circuit from being saturated when the gas discharge lamp is ignited and has a very low impedance, and allowing the OFF time of the main switch to be flexibly adapted when the gas discharge lamp is warmed up and its impedance has risen up to a certain value. The inventive ballast control circuit is configured to proceed with the switching of the main switch according to a lamp status signal indicative of the status of the lamp.
US08436556B2 LED lighting system
A system and method involving lighting fixtures, a control network, a controller and other devices such as light sensors, input devices and network adapters for coordinating precise brightness and color schedules among the lighting fixtures while maintaining a high color reliability including provisions for managing a plurality of lighting fixtures. The lighting fixtures contain lighting elements selected such that when controlled properly, operating along a daytime locus, the resultant light output closely resembles sunlight on a cloudless day in spectral characteristics, and wherein the total flux of blue light can be adjusted from a relative level of 1-100% the maximum blue flux of the lighting fixture by controlling individual lighting elements.
US08436546B2 Electrodeless lamps and methods
An electrodeless plasma lamp and method of generating light are described. The lamp may comprise a lamp body, a source of radio frequency (RF) power and a bulb. The lamp body may comprise a solid dielectric material and at least one conductive element within the solid dielectric material. The source of RF power is configured to provide RF power and an RF feed configured to radiate the RF power from the RF source into the lamp body. The bulb is positioned proximate the lamp body and contains a fill that forms a plasma when the RF power is coupled to the fill from the lamp body. The at least one conductive element is configured to concentrate an electric field proximate the bulb.
US08436541B2 Occupancy sensor with multi-level signaling
A lighting control system includes a power pack and an enhanced occupancy sensor configured to implement multi-valued signaling to encode additional information into the occupancy signal it provides on the signal line. The power pack is configured to monitor the signal line to detect and interpret the additional information. In one example, the lighting control system also includes a manual override switch coupled to the signal line and/or to the occupancy sensor.
US08436538B2 Compact fluorescent lamp with mechanical support means and starting aid
The compact fluorescent lamp comprises a bulb shaped outer envelope enclosing a discharge tube having a coiled configuration and a ballast unit for controlling the current in the tube. The lamp further comprises at least one joint mechanical support and starting aid means for positioning the discharge tube and the ballast unit and reducing a breakdown voltage path of the discharge tube. The at least one mechanical support and starting aid means is made of an electrically conducting material and connected electrically to at least one of the electrodes. The neck portion has a retaining member, and the mechanical support and starting aid means is supported by the retaining member and clamped on the discharge tube at least at a location in a vicinity of a middle section of the arc path. The mechanical support means further comprises at least one support section to provide support against an apex of the outer envelope, and at least one fixing section for fixing of the discharge tube.
US08436524B2 Electron source
Provided is an electron source which provides a stable electron beam even when vibration is applied from external to a device which uses the electron source. The electron source is provided with a needlelike chip (1) having an electron emitting section at one end; a cup-like component (6) bonded to the other end of the needlelike chip (1); and a filament (3) for heating the cup-like component (6). The filament (3) is arranged in a gap inside the cup-like component (6), in a noncontact state to the cup-like component (6).
US08436523B2 Infrared emitter arrangement for high-temperature vacuum processes
An infrared emitter has at least one emitter tube (11) having pinched sections at each of its ends. At least one opaque tube portion (12) is arranged in a manner welded in alignment with the at least one emitter tube. The infrared emitter may be installed in a processing chamber (21).
US08436521B2 Lamp device with magnetic socket
A lamp device includes a lamp, a socket, two magnetic electrodes, and two electrode boxes. The lamp comprises a bulb portion, a stem portion, and two magnetic contacts. The socket has a receptacle portion configured to accept the lamp. The two magnetic electrodes are disposed in the receptacle portion. Each of the two electrode boxes encloses each of the two magnetic electrodes. The magnetic electrode is free to move in the electrode box, and the magnetic electrode makes an electrical contact all the time. The lamp device may further comprise a guiding groove and an insulating wall. The guiding groove may be provided on a bottom surface of the lamp between the two magnetic contacts.
US08436519B2 Incandescent lamp incorporating infrared-reflective coating system, and lighting fixture incorporating such a lamp
The present invention provides an improved lamp, and lighting fixture incorporating such a lamp, wherein the lamp's envelope includes a special optical coating system configured to more effectively reflect infrared light back toward the lamp filament, thereby enhancing the lamp's luminous efficacy. Multiple embodiments are disclosed, including coating systems deposited on one or both surfaces of the lamp envelope and including coating systems incorporating either a dielectric coating alone or specific combinations of a dielectric coating and a transparent conductive coating.
US08436518B2 Method for manufacturing light emitting device
An object of the present invention is to provide a new light emitting element with little initial deterioration, and a display device in which initial deterioration is reduced and variation in deterioration over time is reduced by a new method for driving a display device having the light emitting element. One feature of the invention is that a display device comprising a light emitting element including a first electrode, a second electrode opposed to the first electrode, and a mixed layer of metal oxide and an organic compound provided between the first electrode and the second electrode is subjected to aging drive.
US08436516B2 Resonator device including electrode with buried temperature compensating layer
An acoustic resonator device includes a composite first electrode on a substrate, a piezoelectric layer on the composite electrode, and a second electrode on the piezoelectric layer. The first electrode includes a buried temperature compensating layer having a positive temperature coefficient. The piezoelectric layer has a negative temperature coefficient, and thus the positive temperature coefficient of the temperature compensating layer offsets at least a portion of the negative temperature coefficient of the piezoelectric layer.
US08436513B2 Drive unit
A drive unit includes: a shaft; a movable body supported by the shaft so as to be displaceable along the shaft; a vibratory actuator configured to drive the movable body; and a support body configured to support the vibrator actuator. The vibratory actuator includes an actuator main body that contacts the movable body and is configured to vibrate to output a driving force to the movable body, an opposing member that contacts the movable body and is positioned so as to face the actuator main body with the movable body interposed therebetween, and a coupling member that is configured to couple the actuator main body with the opposing member and to bias the actuator main body and the opposing member so as to sandwich the movable body therebetween with the movable body kept displaceable along the shaft. The support body supports the vibratory actuator so that the vibratory actuator is displaceable along a biasing direction of the coupling member.
US08436512B2 Method of rapidly interrogating elastic wave sensors
A method of remotely interrogating a passive sensor, comprising at least one resonator, so as to determine the resonant frequency of said resonator, having a resonant frequency response defined by the design of said resonator, includes: a preliminary frequency-scan step for interrogating said resonator over a frequency range allowing for the rapid determination of a first resonant frequency (fr0) of said resonator by detecting the amplitude of the response signal of said resonator; a first step of a first couple of interrogations of said resonator at a first frequency (f11) and a second frequency (f21) such that: f11=fr0−fm/2 and f21=fr0+fm/2, fm being smaller than the width at half-maximum of the resonant frequency response defined by the design, allowing a first couple of amplitudes (Pf11, Pf21) of first and second reception signals to be defined; a second step of determining the amplitude difference (Δ(Pf11−Pf21)), said difference being signed; a third step allowing a first resonant frequency (fr1), controlled by said signed amplitude difference, to be defined and having the formula fr1=fr0+K*[Δ(Pf11−Pf21)−Ca], where Ca is a control set-point and K is a constant; and the reiteration of the first, second and third steps comprising the definition of an (i+1)th resonant frequency (fri+1) from an ith resonant frequency (fri) having the formula: fri+1=fri+K*[Δ(Pf1i−Pf2i)−Ca], so as to obtain a determined resonant frequency (fri+1) such that the signed amplitude difference (Δ(Pf1i−Pf2i)) is equal to the control set-point (Ca).
US08436509B1 High-frequency shear-horizontal surface acoustic wave sensor
A Love wave sensor uses a single-phase unidirectional interdigital transducer (IDT) on a piezoelectric substrate for leaky surface acoustic wave generation. The IDT design minimizes propagation losses, bulk wave interferences, provides a highly linear phase response, and eliminates the need for impedance matching. As an example, a high frequency (˜300-400 MHz) surface acoustic wave (SAW) transducer enables efficient excitation of shear-horizontal waves on 36° Y-cut lithium tantalate (LTO) giving a highly linear phase response (2.8° P-P). The sensor has the ability to detect at the pg/mm2 level and can perform multi-analyte detection in real-time. The sensor can be used for rapid autonomous detection of pathogenic microorganisms and bioagents by field deployable platforms.
US08436505B2 Electric motor and reduction motor
Disclosed is a motor in which a commutator (10) is provided with connecting wires which short-circuit equipotential segments; brushes (21) are constituted by a low-speed brush (21a), a high-speed brush (21b), and a common brush (21c) used in common by the low-speed and high-speed brushes, and are juxtaposed along the circumferential direction. The circumferential brush width (W2) of the high-speed brush is set to be smaller than the circumferential brush width (W1) of the low-speed brush. The high-speed brush and the low-speed brush are formed so that simultaneous sliding contact with equipotential segments (15) can be avoided. Additionally, armature cores (8) are provided such that a plurality of teeth (12) is point-symmetrical about a rotary shaft (3) at equal intervals in the circumferential direction, and the teeth and slots (13) are formed so as to exist alternately at intervals of 90 degrees in the circumferential direction. By virtue of the above configuration, vibration and noise can be reduced while achieving miniaturization and high performance of a motor.
US08436503B2 Motor
A motor may include a rotation member, a bearing which is fixed to the rotation member, and a support shaft by which the rotation member is rotatably supported through the bearing. The bearing may include a first bearing part, which rotatably supports the rotation member, and a second bearing part which rotatably supports the rotation member by an urging part that is urged on a rotation center side. A first end part of the rotation member may have a third bearing part which rotatably supports the rotation member. The first bearing part may be provided at a second end part of the rotation member, a lubricant filling space filled with a lubricant may be formed between the first bearing part and the third bearing part, and the second bearing part may be disposed within the lubricant filling space.
US08436498B2 Stepping motor
Disclosed is a stepping motor in which the rim of a substrate and the lower surface of the substrate directed toward the outside of a bracket are arranged inside of the bracket to prevent the rim and lower surface of the substrate from projecting outwardly. Accordingly, the substrate is prevented from colliding against an object during a falling impact test, thus preventing damage to the substrate and improving the durability and reliability of the stepping motor. Further, the substrate gets caught by a hook of the bracket when the substrate is pressed toward the bracket when the substrate is located at a predetermined point of the bracket. This leads to a simplified assembly process and improved productivity.
US08436493B2 Microwave generator
A microwave generator, which includes a housing having two mutually opposite electrodes which are separated via an electrode intermediate space which is filled with a dielectric, and with the electrodes having a spark gap between them, which breaks down in order to emit microwaves when a high voltage is applied. The electrode intermediate space (13, 13a, 13b) can be at least partially filled with a second dielectric (15, 15a, 15b), which has a different dielectric constant compared with that of the first dielectric (14, 14a, 14b) which is located between the electrodes (6, 7) in order to vary the microwave frequency, whereby the second dielectric (15, 15a, 15b) is held in a reservoir (17, 17a, 17b) which communicates with the electrode intermediate space (13, 13a, 13b).
US08436491B2 Low pin count wireless power IC
A low pin count IC includes a wireless power receive coil, a rectifying circuit, an output circuit, circuit modules, a power management unit (PMU), a die, and a package substrate. The wireless power receive coil generates an AC voltage from a wireless power electromagnetic signal and the rectifying circuit generates a rectified voltage from the AC voltage. The output circuit generates a DC voltage from the rectified voltage. The PMU manages distribution of the DC voltage to the circuit modules. The die supports the circuit modules and the PMU, wherein the die includes return pads for coupling to circuit return nodes and a PMU return node. The package substrate supports the die and includes return pins for coupling to the return pads, wherein at least one of the die and the package substrate support the wireless power receive coil, the rectifying circuit, and the output circuit.
US08436487B2 Method and system for control and power supply of at least electrical consumer
A method for controlling and supplying power to at least one electrical consumer that is connectable in a wired, electrically conductive fashion to an energy source is provided. In the method, electrical energy is transferred by an alternating voltage and control information for activating the at least one electrical consumer is transmitted to the electrical consumer by an angle modulation of the alternating voltage used for the power supply. The control information is transmitted in binary form by a frequency modulation, wherein individual binary values are depicted and transmitted by an associated predetermined frequency of the alternating voltage used for the power supply. Each binary value is transmitted by a plurality of oscillations of the alternating voltage. A system for controlling and supplying power to at least one electrical consumer that is connectable in a wired, electrically conductive fashion to an energy source by a cable includes a device for generating an alternating voltage that is disposed between the energy source and the at least one electrical consumer and a device for the angle modulation of the alternating voltage, the electrical consumer comprising a decoder.
US08436484B2 Direct-drive wind turbine generator
A direct-drive wind turbine generator is provided with: a main shaft having one end connected to a rotor head of a wind turbine rotor; a generator having a stator, a stator casing for supporting the stator, and the rotor connected to the other end of the main shaft; first and second bearings positioned between the rotor head and the generator to rotatably support the main shaft; and a torque support for supporting the stator casing. The second bearing is positioned closer to the generator than the first bearing. The first bearing is a bearing with an aligning capability, and the second bearing is a bearing with no aligning capability.
US08436482B2 Semiconductor device, and method of fabricating semiconductor device
There is provided a semiconductor device including: an insulating layer provided on a substrate and formed with plural cavities; wiring lines provided on the insulating layer; plural branched wiring lines that branch from the wiring lines so as to respectively overlap with the plural cavities when seen in plan view; a conductive portion formed on the wiring lines; an external terminal formed on the conductive portion; and a sealing resin layer that seals the wiring lines and the conductive portion.
US08436481B2 Heat-resistant adhesive sheet for substrateless semiconductor package fabrication and method for fabricating substrateless semiconductor package using the adhesive sheet
The present invention is intended to solve the following problems with a method for fabricating a substrateless semiconductor package using an adhesive sheet as a temporary fixing supporter. A chip can be displaced from a specified position by pressure during resin encapsulation because the chip is not properly held by the adhesive sheet. If such displacement occurs, the relative positional relationship between the chip and an interconnect to be connected to a specified position in a subsequent wiring step also changes by the displacement of the chip from the specified position. Another problem is that if adhesive deposits occur during peeling of the adhesive sheet and the surface of a package is contaminated with the adhesive deposits, adhesive components left on the surface of the chip can inhibit connection between the interconnect and the chip in a subsequent wiring step. To solve these problems, the present invention provides an adhesive sheet for semiconductor device fabrication that is attached to a substrateless semiconductor chip when the chip is encapsulated with resin. The adhesive sheet includes a base material layer and an adhesive layer. The adhesive layer has a specific adhesion strength and peel strength.
US08436479B2 Semiconductor device having a chip bonding using a resin adhesive film and method of manufacturing the same
Provided is a method of manufacturing a semiconductor device capable of adhering semiconductor elements and a support member for mounting semiconductor elements, such as lead frames, organic substrates or the like, even in a relatively low temperature range without damaging adhesion property and workability and of suppressing the occurrence of voids. The method of manufacturing a semiconductor device according to the invention is a method of manufacturing a semiconductor device comprising a semiconductor element and a support member adhered to the semiconductor element through a cured material of an adhesive film, wherein the method comprises the steps (a) to (d) in this order; (a) preparing adhesive film-attached semiconductor elements; (b) thermocompression-bonding said adhesive film-attached semiconductor elements to said support member so as to obtain a semiconductor part made of said adhesive film-attached semiconductor elements and said support member; (c) heating and pressurizing said semiconductor part made of said adhesive film-attached semiconductor elements and said support member using a pressurized fluid so as to proceed with curing of adhesive film; and (d) electrically connecting said adhesive film-attached semiconductor elements and said support member.
US08436475B2 IC device having low resistance TSV comprising ground connection
A semiconductor device includes an integrated circuit (IC) die including a substrate, and a plurality of through substrate via (TSV) that extends through the substrate to a protruding integral tip and which is partially covered with a dielectric liner and partially exposed from the dielectric liner. A metal layer is on the bottom surface of the IC die physically connecting the plurality of TSVs and physically and electrically connected to connecting the first metal protruding tips of TSVs.
US08436472B2 Corner stress release structure design for increasing circuit routing areas
An integrated circuit structure includes a semiconductor chip, which further includes a corner and a seal ring dispatched adjacent edges of the semiconductor chip; and a corner stress release (CSR) structure adjacent the corner and physically adjoining the seal ring. The CSR structure includes a portion in a top metallization layer. A circuit component selected from the group consisting essentially of an interconnect structure and an active circuit is directly underlying the CSR structure.
US08436471B2 Semiconductor package with its surface edge covered by resin
A semiconductor package includes a semiconductor chip; a resin part configured to cover a side surface of the semiconductor chip; and a wiring structure formed on a circuit forming surface of the semiconductor chip and a surface of the resin part being situated at the same side as the circuit forming surface, the wiring structure being electrically connected to the semiconductor chip, wherein the resin part is formed so as to cover a part of a surface of the semiconductor chip situated at an opposite side to the circuit forming surface of the semiconductor chip.
US08436467B2 Semiconductor device
Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion formed on the upper surface of a semiconductor substrate, a passivation layer so formed on the upper surface of the semiconductor substrate as to overlap a part of the electrode pad portion and having a first opening portion where the upper surface of the electrode pad portion is exposed, a barrier metal layer formed on the electrode pad portion, and a solder bump formed on the barrier metal layer. The barrier metal layer is formed such that an outer peripheral end lies within the first opening portion of the passivation layer when viewed in plan.
US08436464B2 Hollow sealing structure and manufacturing method for hollow sealing structure
A manufacturing method for a hollow sealing structure, includes, a process for filling a recessed portion in a principal surface of a substrate with a first sacrificial layer, a process for forming a functional element portion on the principal surface of the substrate, a process for forming a second sacrificial layer on the functional element portion so as to be connected to a part of the first sacrificial layer, a process for forming a covering portion over respective surfaces of the first and second sacrificial layers, a process for circulating a fluid for sacrificial layer removal through an opening in the covering portion in contact with the first sacrificial layer, thereby removing the first and second sacrificial layers, and a process for closing the opening.
US08436462B2 Semiconductor housing package, semiconductor package structure including the semiconductor housing package, and processor-based system including the semiconductor package structure
A semiconductor housing package may be provided. The semiconductor housing package may include a mold layer, a housing chip, a redistribution structure, and a housing node. The mold layer may surround and partially expose the housing chip. The redistribution structure may be electrically connected to the housing chip and may be disposed on the mold layer. The housing node may be in contact with the redistribution structures. The semiconductor housing package may be disposed on a semiconductor base package and may constitute a semiconductor package structure along with the semiconductor base package. The semiconductor package structure may be disposed on a processor-based system.
US08436460B1 Multiple die paddle leadframe and semiconductor device package
A leadframe and semiconductor device package with multiple semiconductor device die paddles for accepting multiple semiconductor devices is disclosed, wherein the leadframe increases semiconductor device density and reduces cost by integrating the multiple dies into a semiconductor device package with a relatively small footprint. The leadframe may include at least one full-metal die paddle and at least one reduced-metal die paddle, which may form a unified or hybrid die paddle. The leadframe may enable electrical coupling of multiple semiconductor devices to a common leadfinger and/or die paddle, where internal leadfingers coupled to the common leadfingers and/or die paddles may receive the electrical coupling means from the semiconductor device. Surfaces of one or more die paddles of the leadframe may be exposed to the outside of the semiconductor device package to enable electrical testing of and/or provide heat dissipation from one or more of the semiconductor devices attached to the leadframe.
US08436457B2 Stub minimization for multi-die wirebond assemblies with parallel windows
A microelectronic package can include a substrate having first and second opposed surfaces and first and second apertures extending between the first and second surfaces, first and second microelectronic elements each having a surface facing the first surface of the substrate, a plurality of terminals exposed at the second surface in a central region thereof, and leads electrically connected between contacts of each microelectronic element and the terminals. The apertures can have first and second parallel axes extending in directions of the lengths of the respective apertures. The second surface can have a central region disposed between the first and second axes. Each microelectronic element can embody a greater number of active devices to provide memory storage array function than any other function. The terminals can be configured to carry all of the address signals transferred to the microelectronic package.
US08436452B2 Carrier for chip packages
A carrier for holding a plurality of chip packages and a carrier assembly are provided, wherein the chip package has a central area without solder balls and a peripheral area with solder balls formed thereon. The carrier includes a tray component and a plurality of supports disposed on the tray component, wherein each support holds the central area of a respective chip package. The carrier assembly is formed by stacking a plurality of the carriers through a plurality of peripheral projections disposed at a periphery of each tray component, wherein each peripheral projection has a pin formed thereon and a hole formed thereunder.
US08436450B2 Differential internally matched wire-bond interface
In wireless communication devices, internally matching impedance in millimeter wave packaging enables better signal retention at high frequencies in the range of 15 GHz and above. Through the use of differential wire bond signal transmission, the inherent inductance of a millimeter wave package can be matched by the capacitance of the package wire bonds if the capacitance is tailored. The capacitance can be tailored by calculating a suitable distance between wire bonds and tuning the dielectric constant of the over-mold material. A differential set of wire bonds act like a differential transmission line whose characteristic impedance can be tuned by configuring the dielectric constant of the over-mold of the millimeter wave package.
US08436446B2 Method, structure, and design structure for a through-silicon-via Wilkinson power divider
A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.
US08436441B2 Photoelectric conversion device and solid-state imaging device
A photoelectric conversion device comprising a photoelectric conversion part including a first electrode layer, a second electrode layer and a photoelectric conversion layer provided between the first electrode layer and the second electrode layer, wherein light is made incident from an upper part of the second electrode layer into the photoelectric conversion layer; the photoelectric conversion layer generates a charge containing an electron and a hole corresponding to the incident light from the upper part of the second electrode layer; and the first electrode layer works as an electrode for extracting the hole.
US08436438B2 Memory element and memory device
There is provided a memory element including a memory layer that has magnetization perpendicular to a film face; a magnetization-fixed layer that has magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, the insulating layer is formed of an oxide film, and the memory layer is formed of Co—Fe—B, a concentration of B is low in the vicinity of an interface with the insulating layer, and the concentration of B increases as it recedes from the insulating layer.
US08436437B2 High performance MTJ elements for STT-RAM and method for making the same
A STT-MTJ MRAM cell that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer includes an IrMn pinning layer, a SyAP pinned layer, a naturally oxidized, crystalline MgO tunneling barrier layer that is formed on an Ar-ion plasma smoothed surface of the pinned layer and a free layer that comprises an amorphous layer of Co60Fe20B20 of approximately 20 angstroms thickness or an amorphous ferromagnetic layer of Co40Fe40B20 of approximately 15 angstroms thickness formed between two crystalline layers of Fe of 3 and 6 angstroms thickness respectively. The free layer is characterized by a low Gilbert damping factor and by very strong polarizing action on conduction electrons. The resulting cell has a low critical current, a high dR/R and a plurality of such cells will exhibit a low variation of both resistance and pinned layer magnetization angular dispersion.
US08436428B2 Integrated common source power MOSFET device, and manufacturing process thereof
An integrated power MOSFET device formed by a substrate); an epitaxial layer of N type; a sinker region of P type, extending through the epitaxial layer from the top surface and in electrical contact with the substrate; a body region, of P type, extending within the sinker region from the top surface; a source region, of N type, extending within the body region from the top surface, the source region delimiting a channel region; a gate region; a source contact, electrically connected to the body region and to the source region; a drain contact, electrically connected to the epitaxial layer; and a source metallization region, extending over the rear surface and electrically connected to the substrate and to the sinker region.
US08436427B2 Dual metal and dual dielectric integration for metal high-K FETs
The present invention, in one embodiment, provides a method of forming a semiconductor device that includes providing a substrate including a first conductivity type region and a second conductivity type region; forming a gate stack including a gate dielectric atop the first conductivity type region and the second conductivity type region of the substrate and a first metal gate conductor overlying the high-k gate dielectric; removing a portion of the first metal gate conductor that is present in the first conductivity type region to expose the gate dielectric present in the first conductivity type region; applying a nitrogen based plasma to the substrate, wherein the nitrogen based plasma nitrides the gate dielectric that is present in the first conductivity type region and nitrides the first metal gate conductor that is present in the second conductivity type region; and forming a second metal gate conductor overlying at least the gate dielectric that is present in the first conductivity type region.
US08436426B2 Multi-layer via-less thin film resistor
The present disclosure is directed to a thin film resistor having a first resistor layer having a first temperature coefficient of resistance and a second resistor layer on the first resistor layer, the second resistor layer having a second temperature coefficient of resistance different from the first temperature coefficient of resistance. The first temperature coefficient of resistance may be positive while the second temperature coefficient of resistance is negative. The first resistor layer may have a thickness in the range of 50 and 150 angstroms and the second resistor layer may have a thickness in the range of 20 and 50 angstroms.
US08436425B2 SOI semiconductor device comprising substrate diodes having a topography tolerant contact structure
In an SOI semiconductor device, substrate diodes may be formed on the basis of a superior design of the contact level and the metallization layer, thereby avoiding the presence of metal lines connecting to both diode electrodes in the critical substrate diode area. To this end, contact trenches may be provided so as to locally connect one type of diode electrodes within the contact level. Consequently, additional process steps for planarizing the surface topography upon forming the contact level may be avoided.
US08436424B2 Semiconductor device and method of manufacturing the same
A semiconductor device with first and second groups of transistors, the second group transistors each having a lower operating voltage than that of each of said transistors in said first group, the first group transistors have first gate electrodes formed from a silicon based material layer on a semiconductor substrate through a first gate insulating film, the second group transistors have second gate electrodes formed such that metal based gate materials are respectively filled in gate formation trenches formed in an interlayer insulating film on the semiconductor substrate through a second gate insulating film, and a resistor on the substrate has a resistor main body utilizing the silicon based material layer and is formed on the substrate through an insulating film.
US08436423B2 Solid state back-illuminated photon sensor
A backside-illuminated image sensor is disclosed having improved quantum efficiency (QE) in the near infrared wavelengths (NIR: 750-1100 nm) with minimal optical interference fringes produced by multiple reflected rays within the photosensitive Si region of the sensor, which may be a charge-coupled device, a complementary metal oxide sensor or an electron-multiplication sensor. The invention comprises a fringe suppression layer applied to the backside surface of the photosensitive Si region of a detector (Si substrate) whereby the fringe suppression layer functions in concert with the Si substrate to reduce the occurrence of interference fringes in the NIR while maintaining a high QE over a broad range of wavelengths (300-1100 nm). The combination of a fringe suppression layer applied to a Si substrate provides a new class of back illuminated solid state detectors for imaging.
US08436420B2 Semiconductor device and manufacturing method thereof
Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device can include a recess formed in an active area of a semiconductor substrate, an insulating layer formed in the recess, a source electrode and a drain electrode spaced apart from the source electrode on the insulating layer, a carbon nanotube layer formed between the source and drain electrodes, an oxide layer pattern covering at least the carbon nanotube layer, and a gate electrode formed on the oxide layer pattern.
US08436417B2 Oxide cluster semiconductor memory device
According to one embodiment, in a semiconductor memory device, a source region and a drain region are disposed away from each other in the semiconductor layer. A tunnel insulating film is formed between the source region and the drain region on the semiconductor layer. A charge accumulating film includes an oxide cluster and is formed on the tunnel insulating film. A block insulating film is formed on the charge accumulating film. A gate electrode is formed on the block insulating film. The oxide cluster includes either Zr or Hf, and further contains at least one element selected from Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Cd, Ta, W, Re, Os, Ir, Pt, Au and Hg.
US08436416B2 Nonvolatile semiconductor memory device and method for manufacturing same
According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a plurality of semiconductor pillars and a charge storage film. The stacked body is provided on the substrate, with a plurality of insulating films alternately stacked with a plurality of electrode films, and includes a hydrophobic layer provided between one of the insulating films and one of the electrode films. The hydrophobic layer has higher hydrophobicity than the electrode films. The plurality of semiconductor pillars extend in a stacking direction of the stacked body and pierce the stacked body, and the charge storage film is provided between the electrode films and one of the semiconductor pillars.
US08436415B2 Nonvolatile semiconductor memory device and method of manufacturing the same
A memory string comprises: a first semiconductor layer including a columnar portion extending in a stacking direction on a substrate; a first charge storage layer surrounding the columnar portion; and a plurality of first conductive layers stacked on the substrate so as to surround the first charge storage layer. A select transistor comprises: a second semiconductor layer in contact with an upper surface of the columnar portion and extending in the stacking direction; a second charge storage layer surrounding the second semiconductor layer; and a second conductive layer deposited above the first conductive layer to surround the second charge storage layer. The second charge storage layer is formed from a layer downward of the second conductive layer to an upper end vicinity of the second conductive layer, and is not formed in a layer upward of the upper end vicinity.
US08436413B2 Nonvolatile floating gate analog memory cell
A nonvolatile floating gate analog memory cell (1) comprising a transistor having a source (2) and drain (3) formed inside a substrate or on an insulator body (not shown) and separated by a channel (4). The memory cell comprises at least one floating gate (5) formed on one side of the source and drain. (6) is a control gate formed on one side of the floating gate and connected to a first voltage (7). (8) is a back gate formed on the other side of the source and drain and connected to a second voltage (9). The channel is separated from the floating gate and the back gate by an insulation layer (10). The control gate is separated from the floating gate by an insulation layer (11) and the source and drain are isolated from the back gate, control gate and floating gate(s) by a spacer (12). The second voltage changes the intrinsic threshold voltage linearly during programming so that the programmed threshold voltage corresponds to the second voltage.
US08436407B2 Photoelectric conversion device and imaging system using photoelectric conversion device
A photoelectric conversion device includes photoelectric conversion elements and element isolation regions, both of which are arranged on a semiconductor substrate. The photoelectric conversion device further includes a plurality of interlayer insulation layers including a first interlayer insulation layer arranged nearest to the semiconductor substrate, and a second interlayer insulation layer arranged to cover the first interlayer insulation layer. Gaps extending from at least the second interlayer insulation layer to the first interlayer insulation layer are arranged in first and second interlayer insulation layer regions corresponding to the element isolation regions.
US08436398B2 Back diffusion suppression structures
An enhancement-mode GaN transistor, the transistor having a substrate, transition layers, a buffer layer comprised of a III Nitride material, a barrier layer comprised of a III Nitride material, drain and source contacts, a gate containing acceptor type dopant elements, and a diffusion barrier comprised of a III Nitride material between the gate and the buffer layer.
US08436397B2 Semiconductor device including normally-off type junction transistor and method of manufacturing the same
In a junction FET of a normally-off type, a technique capable of achieving both of improvement of a blocking voltage and reduction of an ON resistance is provided. In a junction FET using silicon carbide as a substrate material, impurities are doped to a vicinity of a p-n junction between a gate region and a channel-formed region, the impurities having a conductive type which is reverse to that of impurities doped in the gate region and same as that of impurities doped in the channel-formed region. In this manner, an impurity profile of the p-n junction becomes abrupt, and further, an impurity concentration of a junction region forming the p-n junction with the gate region in the channel-formed region is higher than those of a center region in the channel-formed region and of an epitaxial layer.
US08436396B2 Semiconductor light emitting element, method for manufacturing semiconductor light emitting element, and lamp
A semiconductor light-emitting device (1) of the present invention includes a substrate (101); a laminate semiconductor layer (20) formed by sequentially laminating an n-type semiconductor layer (104), a light-emitting layer (105), and a p-type semiconductor layer (106) on the substrate (101); and a translucent electrode layer (109) formed on a top surface (106a) of the p-type semiconductor layer (106), wherein the translucent electrode layer (109) contains a dopant element, a content of the dopant element within the translucent electrode layer (109) decreases gradually toward the interface (109a) between the p-type semiconductor layer (106) and the translucent electrode layer (109), and in the translucent electrode layer (109) is formed a diffusion region in which an element constituting the p-type semiconductor layer (106) is diffused from the interface (109a) toward the inside of the translucent electrode layer (109).
US08436384B2 Semiconductor light emitting device and method for manufacturing the same
Disclosed are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a substrate, in which concave-convex patterns are in at least a portion of a backside of the substrate, and a light emitting structure on the substrate and comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer.
US08436377B2 GaN-based light-emitting diode and method for manufacturing the same
A GaN-based LED and a method for manufacturing the same are provided, and the method includes: providing a substrate, depositing a first transition layer on the substrate; forming a first patterned transition layer by etching with a mask; growing a first epitaxial layer on the first patterned transition layer; depositing a second transition layer on the first epitaxial layer; forming a second patterned transition layer by etching with a mask, such that the second patterned transition layer and the first patterned transition layer are cross-staggered with each other; growing a second epitaxial layer on the second patterned transition layer, wherein the second epitaxial layer includes a P-type layer, a light-emitting layer and an N-type layer; depositing a protection layer on the second epitaxial layer, dicing to obtain chips with a defined size; removing the first patterned transition layer and the second patterned transition layer on the substrate and the protection layer on the second epitaxial layer by wet etching, so as to form a structure with two layers of cross-staggered through holes; forming a conductive layer on the second epitaxial layer; and forming a P-electrode and an N-electrode by etching with a mask. The two layers of cross-staggered through holes of the LED chips can effectively reduce the dislocation density in the epitaxial growth of the GaN-based layer, and improve the lattice quality and luminous efficiency.
US08436376B2 Organic light emitting diode display
An organic light emitting diode (OLED) display is disclosed. The organic light emitting diode (OLED) display includes an organic light emitter that has a first electrode, an organic emission layer, and a second electrode. The OLED also has an encapsulation substrate covering the organic light emitter and an assistance electrode disposed between the encapsulation substrate and the second electrode. The assistance electrode can be disposed in a non-light-emitting region between the organic light emitter and the second electrode, and can have a lower resistance than a resistance of the second electrode.
US08436373B2 Light emitting diode with a light source suitable structure
A light emitting diode, comprising: a transparent substrate; a wiring layer; and a semiconductor light emitting element structure part between the transparent substrate and the wiring layer, the semiconductor light emitting element structure part further comprising: a semiconductor light emitting layer; a transparent conductive layer provided on the wiring layer side of the semiconductor light emitting layer; a transparent insulating film; a metal reflection layer; and a first electrode part and a second electrode part provided on the wiring layer side of the transparent insulating film, to be electrically connected to the wiring layer, wherein the first electrode part is electrically connected to the first semiconductor layer via a first contact part which is provided to pass through the transparent insulating film, and the second electrode part is electrically connected to the second semiconductor layer by a second contact part provided to pass through the transparent insulating film, the transparent conductive layer, the first semiconductor layer, and the active layer.
US08436372B2 Display device
A plurality of input terminals (4, 4a, 17) provided on a surface of a common electrode substrate (3) which surface is opposed to a TFT substrate (2) are provided so as to be opposed to a plurality of output terminals (6) provided on an external circuit substrate (5). The plurality of input terminals (4, 4a, 17) are overlapped with the plurality of output terminals (6) when the plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6) are viewed in one plane, but the plurality of input terminals (4, 4a, 17) are formed so as not to overlap the TFT substrate (2). The plurality of input terminals (4, 4a, 17) and a drive circuit are electrically connected via a conductor provided between the TFT substrate (2) and the common electrode substrate (3). The plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6) are electrically connected via a connector (9) having a conductive region (7) and an insulating region (8) each formed into a striped pattern on surfaces for connection with the plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6). This makes it possible to attain a display device that makes it possible to suppress an increase in production cost per unit and to have a high productivity.
US08436369B2 Light emitting diode having electrode pads
Exemplary embodiments of the present invention relate to a including a substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.
US08436367B1 SiC power vertical DMOS with increased safe operating area
A SiC Power Semiconductor device of the Field Effect Type (MOSFET, IGBT or the like) with “muted” channel conduction, negative temperature coefficient of channel mobility, in situ “ballasted” source resistors and optimized thermal management of the cells for increased Safe Operating Area is described. Controlling the location of the Zero Temperature Crossover Point (ZTCP) in relationship to the drain current is achieved by the partition between the “active” and “inactive” channels and by adjusting the mobility of the carriers in the channel for the temperature range of interest. The “Thermal management” is realized by surrounding the “active” cells/fingers with “inactive” ones and the “negative” feedback of the drain/collector current due to local increase of the gate bias is achieved by implementing in-situ “ballast” resistors inside of each source contact.
US08436363B2 Metallic carrier for layer transfer and methods for forming the same
Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate a semiconductor substrate by forming a weakened zone in a donor structure at a predetermined depth to define a transfer layer between an attachment surface and the weakened zone and a residual donor structure between the weakened zone and a surface opposite the attachment surface. A metallic layer is formed on the attachment surface and provides an ohmic contact between the metallic layer and the transfer layer, a matched Coefficient of Thermal Expansion (CTE) for the metallic layer that closely matches a CTE of the transfer layer, and sufficient stiffness to provide structural support to the transfer layer. The transfer layer is separated from the donor structure at the weakened zone to form a composite substrate comprising the transfer layer the metallic layer.
US08436359B2 Semiconductor device and manufacturing method thereof
The semiconductor device includes a thin film transistor; a first interlayer insulating film over the thin film transistor; a first electrode electrically connected to one of a source region and a drain region, over the first interlayer insulating film; a second electrode electrically connected to the other of the source region and the drain region; a second interlayer insulating film formed over the first interlayer insulating film, the first electrode, and the second electrode; a first wiring electrically connected to one of the first electrode and the second electrode, on the second interlayer insulating film; and a second wiring not electrically connected to the other of the first electrode and the second electrode, on the second interlayer insulating film; in which the second wiring is not electrically connected to the other of the first electrode and the second electrode by a separation region formed in the second interlayer insulating film.
US08436356B2 Thin film transistor substrate, method of fabricating the same and flat display having the same
A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.
US08436355B2 Thin-film transistor, manufacturing method therefor, and electronic device using a thin-film transistor
Disclosed is a method that includes: forming a gate electrode on a substrate, then forming an insulation layer so as to completely cover the gate electrode, thereafter forming a semiconductor layer on the insulation layer, and then forming a crystallization-inducing metal layer on the semiconductor layer; removing the part of at least the crystallization-inducing metal layer that is over a channel region of the semiconductor layer; forming source and drain electrodes at a location which is over source and drain regions respectively located at opposite sides with respect to the channel region of the semiconductor layer and is above the crystallization-inducing metal layer; and heating the crystallization-inducing metal layer so as to form a silicide layer of a crystallization-inducing metal.
US08436353B2 Thin film transistor with recess
A semiconductor device 10 according to the present invention includes an active layer 14 supported on a substrate 11 and having two channel regions 14c1, 14c2, a source region 14s, a drain region 14d, and an intermediate region 14m formed between the two channel regions 14c1, 14c2; a contact layer 16 having a source contact region 16s, a drain contact region 16d, and an intermediate contact region 16m; a source electrode 18s; a drain electrode 18d; an intermediate electrode 18m; and a gate electrode 12 facing the two channel regions and the intermediate region through a gate insulating film 13 interposed therebetween. An entire portion of the intermediate electrode 18m that is located between the first channel region 14c1 and the second channel region 14c2 overlaps the gate electrode 12 through the intermediate region 14m and the gate insulating film 13.
US08436351B2 ZnO-containing semiconductor layer and ZnO-containing semiconductor light emitting device
A ZnO-containing semiconductor layer contains Se added to ZnO and has an emission peak wavelength of ultraviolet light and an emission peak wavelength of visual light. By combining the ZnO-containing semiconductor layer with phosphor or a semiconductor which is excited by the emitted ultraviolet light and emits visual light, visual light at various wavelengths can be emitted.
US08436349B2 Thin-film transistor fabrication process and display device
In a process for fabricating a thin-film transistor in which a gate electrode 4 is to be formed on a substrate 1, the process has the steps of forming the gate electrode 4 on the substrate 1, forming a metal oxide layer 7 in such a way as to cover the gate electrode 4, forming a source electrode 6 and a drain electrode 5, and carrying out annealing in an inert gas to change part of the metal oxide layer 7 into a channel region.
US08436345B2 Organic electroluminescence device
An organic electroluminescence device includes a plurality of organic semiconductor layers including an organic light-emitting layer and layered or disposed between a pair of anode and cathode opposed to each other. The device includes n-type-dopant-containing electron transport layer disposed between the cathode and the organic light-emitting layer. The n-type-dopant-containing electron transport layer includes an organic compound capable of transporting electrons as a first component which mixed with an n-type dopant of an electron donor of metallic atom or ion thereof as a second component. The organic electroluminescence device further includes an n-type-dopant blocking layer having an interface contacting with the n-type-dopant-containing electron transport layer to block the n-type dopant. The n-type-dopant blocking layer includes a heavy atom compound including at least one kind of heavy atoms with an atomic weight of 79 or more.
US08436337B2 Amorphous multi-component metallic thin films for electronic devices
An electronic structure comprising: (a) a first metal layer; (b) a second metal layer; (c) and at least one insulator layer located between the first metal layer and the second metal layer, wherein at least one of the metal layers comprises an amorphous multi-component metallic film. In certain embodiments, the construct is a metal-insulator-metal (MIM) diode.
US08436336B2 Structure and method for a high-speed semiconductor device having a Ge channel layer
The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.
US08436332B2 Electron emission element and imaging device having the same
An electron emission element has an electron emission layer that emits an electron from a surface emission portion, a focusing electrode layer that is film-formed on a surface of the electron emission layer via a first insulation layer and focuses the emitted electron, a gate electrode layer that is film-formed on a surface of the focusing electrode layer via a second insulation layer, an emission concave portion that penetrates the gate electrode layer, the second insulation layer, the focusing electrode layer and the first insulation layer and opens in a concave shape on a surface of the surface emission portion, a carbon layer that is film-formed from a surface of the gate electrode layer over an inner peripheral surface of the emission concave portion, and a partial insulation portion that insulates the focusing electrode layer from the carbon layer.
US08436330B2 Electrically actuated devices
An electrically actuated device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. At least two dopants are present in a spatially varying region of the active region prior to device actuation. The at least two dopants have opposite conductivity types and different mobilities.
US08436325B2 Synchrotron and particle therapy system using the same
Disclosed herein are provided an arrangement of devices suitable to downsize a synchrotron, a synchrotron using such an arrangement, and a particle therapy system using the synchrotron. In the synchrotron, a plurality of deflection magnets and a single defocusing quadrupole magnet are arranged between a first extraction deflector and a second extraction deflector. The defocusing quadrupole magnet is arranged between deflection magnets among the plurality of deflection magnets, a focusing quadrupole magnet is arranged on the side of an inlet of the first extraction deflector, and a focusing quadrupole magnet is arranged on the side of an outlet of the second extraction deflector.
US08436323B2 Particle beam irradiation apparatus and particle beam irradiation method
A particle beam irradiation apparatus includes: a beam generation unit that generates a particle beam; a beam emission control unit that controls emission of the particle beam; a beam scanning instruction unit that sequentially two-dimensionally instructs a position of the particle beam so that the particle beam is scanned across the entire slice; a beam scanning unit that two-dimensionally scans the particle beam; a respiration gate generation unit that generates a respiration gate synchronized with a respiration cycle of the patient; and a pulse generation unit that generates a predetermined number of scanning start pulses at substantially equally spaced time intervals in the respiration gate. The beam scanning instruction unit instructs to scan the entire slice by pattern irradiation based on a set dose from each of the scanning start pulses so that a scan of the same slice is repeated the predetermined number of times.
US08436316B2 Compositions and methods for determining directionality of radiation
A method of determining directionality of radiation is disclosed which comprises dividing the tensioned metastable fluid liquid volume adjacent to a radioactive source into a plurality of sectors, determining the opposing sector ratio of the respective sector and determining the direction of the radiation based on the opposing sector ratios of the plurality of sectors. The method further comprising determining directionality of incoming radiation from the tension pressure assisted elongation of bubble shapes pointing towards direction of radiation particles that interacted with nuclei of tensioned metastable fluid detector system. A device capable of carrying out these methods is also disclosed.
US08436314B2 Imaging apparatus, imaging system, method of controlling the apparatus and the system, and program
An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.
US08436312B2 DOI type radiation detector
This aims to provide a DOI type radiation detector in which scintillation crystals arranged two-dimensionally on a light receiving surface to form rectangular section groups in extending directions of the light receiving surface of a light receiving element are stacked up to make a three-dimensional arrangement and responses of the crystals that have detected radiation are made possible to identify at response positions on the light receiving surface, so that a three-dimensional radiation detection position can be obtained. In the DOI type radiation detector, scintillation crystals are right triangle poles extending upwards from the light receiving surface and the response positions on the light receiving surface are characterized. With this structure, DOI identification of a plurality of layers can be carried out by simply performing an Anger calculation of a light receiving element signal.
US08436310B2 System and method reducing fiber stretch induced timing errors in fiber optic coupled time domain terahertz systems
A system for reducing effects relating to stretching of an optical fiber includes an optical control source, the optical source outputting an optical signal, a terahertz transmitter and receiver both being optically coupled to the optical source, and a means for providing the optical signal to both the terahertz transmitter and terahertz receiver such that the terahertz receiver is synchronized to the terahertz transmitter by the optical signal. The means prevents the stretching of an fiber carrying the optical signal provided to the terahertz transmitter or terahertz receiver or allows for the stretching an optical fiber such that the terahertz receiver will still be synchronized to the terahertz transmitter by the optical signal.
US08436309B2 Multi-channel infrared optical phase fraction meter
Methods and apparatus for measuring a phase fraction of a flow stream are disclosed. An infrared phase fraction meter includes a light source for emitting into a flow stream infrared radiation that includes first and second wavelength bands. The first wavelength band substantially transmits through first and second phases of the flow stream and is substantially absorbed by a third phase. In contrast, the second wavelength band is substantially absorbed by the second phase relative to the first and third phases. One or more detectors simultaneously detect attenuation of the first and second wavelength bands upon the infrared radiation passing through at least a portion of the flow stream, and a phase fraction of the second phase is determined based on the attenuation. As an example, the first, second and third phases are gas, water and oil, respectively, produced from a well.
US08436307B2 Multi-cavity optical sensing and thermopile infrared sensing system
The present invention discloses a multi-cavity optical sensing and thermopile infrared sensing system, which comprises an optical sensing part, a dielectric layer, a plurality of optical cavities, and a plurality of thermocouples. The dielectric layer covers on the top of the optical sensing part. The optical cavities are formed by a plurality of metal reflectors inside the dielectric layer. The thermocouples are laterally disposed near the bottom of the dielectric layer. In addition, a low temperature region is formed in an area which is the overlapping of vertical projections of such thermocouples and the optical sensing part; a high temperature region is formed by the overlapping of vertical projections of such thermocouples, but without the overlaying which belongs to the vertical projection of the optical sensing part. Therefore, the system can sense the ambient light brightness, color conditions and human blackbody infrared signals within the range of 8-12 micrometers wavelength.
US08436306B2 Pyroelectric element
A pyroelectric element includes a pyroelectric substrate being a substrate of lithium tantalate single crystal having an X-axis, a Y-axis, and a Z-axis as crystal axes; front-side electrodes disposed on a front side of the pyroelectric substrate; and back-side electrodes paired with the front-side electrodes, respectively. The pyroelectric substrate is a Y-offcut plate obtained by cutting the lithium tantalate single crystal at an angle turned by a cut angle θ from the Y-axis toward the Z-axis about the X-axis that coincides with a direction along the electrode plane, and the cut angle θ is 30° to 60° or 120° to 150°. The pyroelectric substrate is preferably 10 μm or less in thickness, and is more preferably 5 μm to 10 μm in thickness.
US08436297B2 System and method for diversion of a liquid chromatography eluant
In accordance with an embodiment of the invention, there is provided a method for reducing or eliminating matrix interfering components in a biopharmaceutical product in a liquid chromatography-mass spectrometry system. The method comprises diverting to waste the entire flow of an eluant emerging from liquid chromatography of a sample, for a time period to remove contaminants that cause matrix interference to a degree sufficient to allow a desired accuracy in detection of an extractable; and, after the time period, directing the entire flow of the eluant to a mass spectrometer to detect the presence of the extractable.
US08436295B2 Device for measuring mean free path, vacuum gauge, and method for measuring mean free path
The present invention provides a device for measuring a mean free path capable of measuring directly the mean free path of a charged particle, a vacuum gauge, and a method for measuring a mean free path. The device for measuring a mean free path according to one embodiment of the invention includes an ion source for generating an ion, a collector (24a) for detecting the number of first charged particles being charged particles having a first flight distance L1 that is a flight distance of zero or more from the ion source, and a collector (24b) for detecting the number of second charged particles having a second flight distance longer than the first flight distance. The control part of the device calculates the mean free path from a ratio between the numbers of the first and second charged particles.
US08436293B2 Optical encoder and method for measuring displacement information using multiple optical tracks of diffractive optical regions having different periodicities
An optical encoder and method for measuring displacement information uses an encoder member that includes multiple optical tracks of diffractive optical regions having different periodicities with respect to consecutive identical diffractive optical regions to produce diffracted beams of light from at least one beam of light emitted from a light source. The diffracted beams of light are received at photodetectors, which produce electrical signals in response to the received beams of light. The electrical signals are related to the displacement information being measured.
US08436291B2 Automated pill dispensing systems for detecting characteristics of bottles in output chutes using modulated light sources and related methods of operation
A method of operating a detection system includes receiving a detection signal representing aggregate light emission received from a plurality of optical emitter elements at an optical detector, and determining, from the detection signal, respective light emission received from one of the optical emitter elements based on a respective signature thereof in the detection signal. The respective signature is independent of an emission wavelength of the respective light emission. Related detection systems and automated pill dispensing systems are also discussed.
US08436282B2 Microwavable container with sleeve
A food package kit including a plurality of trays having a bottom, a sidewall extending upwardly from the bottom and terminating at a top end, and a flange extending from the sidewall opposite the bottom, the flange includes a rim section configured to receive a sealing film, and a recessed section extending from the rim section, wherein each of the opposed longitudinal edges intersect with a lateral edge at a corner, wherein the kit also includes a sleeve adapted to contain the trays completely therein, the sleeve including a sleeve top, a first depending sleeve side, and a second depending sleeve side and a sleeve bottom, wherein the tray is completely disposed within the sleeve by frictional force between the tray and the sleeve.
US08436278B2 Method for joining two rotationally symmetrical metal parts by tungsten inert gas (TIG) welding, and a device for carrying out the method
In a method for joining two, in particular rotationally symmetrical, metal parts (1, 2) by a tungsten inert gas (TIG) welding process, in a first step, the two metal parts (1, 2) to be joined are initially positioned relative to one another by a centering offset (7) in such a way that a narrow gap (4) is formed between them and a relief region (8) is created in the seam-bottom area. In a second step, the flanks (5, 6) of the metal parts (1, 2), which delimit the narrow gap (4), are joined together by welding beads (10) which fill the narrow gap (4), with a predetermined melt-through point (9) being formed. High-quality automatic welding is achieved in that the narrow gap (4) has a continuously constant width (a), in that the width (a) of the narrow gap (4) is selected such that the welding beads (10) lying one above the other each extend over the entire width (a) of the narrow gap (4), and in that the entire narrow gap (4) is filled with the welding beads (10) in fully automatic fashion.
US08436277B2 Automatic shutoff system and method for workspace enclosure environment
An emergency shut off system for a workspace enclosure, wherein a sensor array is provided for detecting hazardous conditions within the workspace enclosure. A control module is coupled to the sensor array. A pneumatic shutoff line is provided, extending between the control module and a hot work apparatus used in connection with the workspace enclosure. The hot work apparatus is responsive to pressurization of the pneumatic shutoff line to remain in an operational state. The control module is responsive to a signal from the sensor array indicating the existence of a hazardous condition inside the workspace enclosure to depressurize the pneumatic shutoff line. The hot work apparatus is responsive to depressurization of the shutoff line to be rendered non-operational.
US08436275B2 Laser irradiation apparatus and method for sealing organic light emitting diode using the laser irradiation apparatus
A laser irradiation apparatus is disclosed. In one embodiment, the apparatus includes i) an X-axis location control board configured to move a plurality of drivers in an X-axis direction and ii) a plurality of output heads cooperatively arranged with the drivers and configured to move with movement of the drivers, wherein the output heads are configured to receive laser beams. The apparatus may further include a Z-axis location control board cooperatively arranged with the X-axis location control board and configured to move the X-axis location control board in an Z-axis direction, wherein the output heads alternatively protrude with different lengths along an Y-axis direction.
US08436272B2 Systems and methods to position web processing equipment
Various method embodiments move web equipment from a first web processing station to a second web processing station. According to a method embodiment, the web equipment is raised away from the first web processing station, where raising includes rotating the web equipment about a rotary axis. The rotary axis is linearly moved along a linear axis. The web equipment is lowered toward the second web processing station, wherein lowering includes rotating the web equipment about the rotary axis. Various embodiments move a laser head from one web processing station into operational position at another web processing station.
US08436271B2 Thermal nucleus fusion torch method
There is an improved fusion plasma torch apparatus-engines and method. Deuterium-Tritium or other fusion reaction reagents are injected in a fusion reaction channel where is a current of an arc upon which is imposed modulated current extinguishing whatever transversal plasma arc vibrations thereby eliminating a plasma arc bypassing to a wall and consequently decreasing the heat losses at the expense of dropping down convective and conductive heat exchange and locating the plasma arc column strictly in the center of arc's channel.
US08436267B2 Switch assembly for a power tool
A switch assembly for a power tool including a switch member and a fixing part. The switch member including a finger grip part, a retaining part for retaining the switch member on a power tool, and an opening extending at least partially through the switch member, the retaining part arranged to project laterally with respect to an axis of the opening. The fixing part is arranged to be located in the opening. The switch assembly is arranged such that when the fixing part is at a first location in the opening, the retaining part adopts a retention configuration in which it projects laterally to a predetermined extent. When the fixing part is removed or at a second location in the opening, the retaining part adopts an insertion configuration in which it does not project laterally or projects less than the predetermined extent.
US08436264B2 Power transmission mechanism for four poles circuit breaker
Provided herein is a power transmission mechanism of a four poles circuit breaker in which the contact points of a neutral pole thereof are brought into contact earlier at the time of closing and separated later at the time of opening than those of the other poles thereof, and according to the present invention, there is disclosed a power transmission mechanism of a four poles circuit breaker comprising: a switching shaft configured to provide a driving force for switching to the movable contactors of the poles; an arm provided to correspond to the four poles to transfer the rotational torque of the switching shaft; and a link configured to transfer the rotational torque of the arm to the movable contactor as a switching force, and provided to correspond to the four poles, wherein the sum of the length of the arm and the link in a neutral pole is longer than the sum of the length of the arm and the link in the poles excluding the neutral pole.
US08436263B2 Noise resistant capacitive sensor
A switch capacitor unit for implementing a capacitive sensor includes a charging switch, a charge transfer switch, and a first switch. The charging switch is coupled between a first supply voltage and a circuit node to selectively couple a sensing capacitor to the first supply voltage through the circuit node. The charge transfer switch is coupled between the circuit node and a first terminal of a second capacitor to selectively couple the sensing capacitor through the circuit node to the second capacitor. The first switch is coupled between the circuit node and a second terminal of the second capacitor to selectively couple the second terminal to the sensing capacitor through the circuit node.
US08436261B2 Cantilever beam scale
An improved device for the measuring of weight or force is disclosed. This is an apparatus that allows for measurement of weight or force using a cantilever beam that is substantially insensitive to location of the weight or force within certain limits on the beam and is capable of correction for off-level conditions.
US08436258B2 Electromagnetic shielding article and method for manufacturing same
An electromagnetic shielding article includes a plastic substrate; a nickel vanadium layer deposited on the plastic substrate; an electromagnetic shielding layer deposited on the plastic substrate; and a protection layer deposited on the electromagnetic shielding layer. A method for manufacturing the electromagnetic shielding article comprising steps of: providing a plastic substrate; depositing a nickel vanadium layer on the plastic substrate by radio-frequency induction plasma spraying process; depositing an electromagnetic shielding layer on the nickel vanadium layer; and depositing a protection layer on the electromagnetic shielding layer.
US08436254B2 Method of fabricating circuit board structure
A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.
US08436249B2 Wiring substrate, electronic device, and method of manufacturing wiring substrate
A wiring substrate includes a heat sink to dissipate heat generated in an electronic part mounted in an electronic part loading area on a principal surface of the wiring substrate, an encapsulation resin to cover the heat sink, an inner connection terminal having an end face electrically connected to an electrode of the electronic part, and an outer connection terminal electrically connected to the inner connection terminal via a wiring and having an end face for inputting and outputting of a signal with an external device. The encapsulation resin is arranged to cover a part of the wiring, the inner connection terminal except the end face, and the outer connection terminal except the end face. A surface of the heat sink, the end face of the inner connection terminal, and the end face of the outer connection terminal are flush with and exposed to the principal surface.
US08436247B2 Terminal cover
A terminal cover (A) includes an escaping portion (20) formed by cutting off a part of a peripheral wall portion forming a first accommodating portion (11) to allow an internal space of the first accommodating portion (11) to communicate with a second accommodating portion (12), thereby avoiding interference with a linking portion (53) of a terminal fitting (B). The terminal cover (A) also includes a multi-functional portion (26) which can be assembled with the first accommodating portion (11) and is arranged to close at least a part of the escaping portion (20) and capable of pressing the terminal fitting (B) to prevent a displacement of the terminal fitting (B) in an assembled state.
US08436243B2 Anti-lightning system and aircraft comprising such a system
An anti-lightning system for a composite structure having an external surface liable to be subjected to an air flow, the aforementioned system including at least one electrically conducting strip and fasteners fastening the aforementioned strip to the structure, the aforementioned strip being electrically connected to an electrical earth for removing current. According the disclosed embodiments, the aforementioned strip has a shape intended to collaborate with a housing created at the aforementioned external surface so that the external surface of the strip lies flush with the aforementioned external surface of the structure, and the aforementioned fasteners include an upper part flush with the external surface of the strip.
US08436239B1 Maize variety inbred PH1DN1
A novel maize variety designated PH1DN1 and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PH1DN1 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PH1DN1 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PH1DN1 or a locus conversion of PH1DN1 with another maize variety.
US08436229B1 Soybean variety XB39A11
A novel soybean variety, designated XB39A11 is provided. Also provided are the seeds of soybean variety XB39A11, cells from soybean variety XB39A11, plants of soybean XB39A11, and plant parts of soybean variety XB39A11. Methods provided include producing a soybean plant by crossing soybean variety XB39A11 with another soybean plant, methods for introgressing a transgenic trait, a mutant trait, and/or a native trait into soybean variety XB39A11, methods for producing other soybean varieties or plant parts derived from soybean variety XB39A11, and methods of characterizing soybean variety XB39A11. Soybean seed, cells, plants, germplasm, breeding lines, varieties, and plant parts produced by these methods and/or derived from soybean variety XB39A11 are further provided.
US08436228B2 Soybean variety A1023868
The invention relates to the soybean variety designated A1023868. Provided by the invention are the seeds, plants and derivatives of the soybean variety A1023868. Also provided by the invention are tissue cultures of the soybean variety A1023868 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety A1023868 with itself or another soybean variety and plants produced by such methods.
US08436226B2 Soybean cultivar 1000679
A soybean cultivar designated 1000679 is disclosed. The invention relates to the seeds of soybean cultivar 1000679, to the plants of soybean 1000679, to plant parts of soybean cultivar 1000679, and to methods for producing a soybean plant produced by crossing soybean cultivar 1000679 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars, or breeding cultivars, and plant parts derived from soybean variety 1000679, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar 1000679, and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants, and plant parts produced by crossing the cultivar 1000679 with another soybean cultivar.
US08436222B2 Pretreatment of a phosphorus-modified zeolite catalyst for an aromatic alkylation process
This invention relates to a process for pretreating a zeolite catalyst, specifically a zeolite which has been modified with phosphorus. The catalyst may be used in a process for alkylation of aromatics, specifically toluene methylation. The pretreatment is first to contact the catalyst with the process reactants used in a process for alkylation of aromatics for at least two hours at conditions to produce an alkylated aromatic product and then with a gaseous stream containing oxygen at a temperature and for a time until there is no oxygen consumption. The zeolite may be a MFI zeolite. This pretreatment procedure for a phosphorus-modified zeolite catalyst produces a catalyst which has increased run time, i.e., decreased deactivation rate, compared to a fresh catalyst, even after successive regenerations.
US08436218B2 Azeotrope-like composition of hexafluoropropane, hexafluoropropene and hydrogen fluoride
The present invention relates to an azeotropic or azeotrope-like mixture consisting essentially of 1,1,1,2,3,3-hexafluoropropane, hexafluoropropene and hydrogen fluoride.
US08436212B2 Purification of impure hexamethylenediamines
Impure hexamethylenediamines and more particularly those hexamethylenediamines containing contaminating amounts of tetrahydroazepine (THA), or more generally contaminating amounts of imines, are purified by distillation carried out with a short retention time of the impure hexamethylenediamine in the distillation column; the hexamethylenediamine obtained has a very low concentration of THA.
US08436211B2 Tetraarylborate process for the preparation of substituted biphenyls
The present invention relates to a process for the preparation of substituted biphenyls by reacting aryl halides with tetraarylborates in the presence of palladium catalysts.
US08436207B2 Naphthalene-based inhibitors of anti-apoptotic proteins
Methods of using apogossypol and its derivatives for treating inflammation is disclosed. Also, there is described a group of compounds having structure A, or a pharmaceutically acceptable salt, hydrate, N-oxide, or solvate thereof are provided: wherein each R is independently H, C(O)X, C(O)NHX, NH(CO)X, SO2NHX, or NHSO2X, wherein X is hydrogen, alkyl, substituted alkyl, aryl, substituted aryl, alkylaryl, substituted alkylaryl, heterocycle, or substituted heterocycle. Compounds of group A may be used for treating various diseases or disorders, such as cancer.
US08436205B2 Tetrahydronaphthalene compounds
The invention relates to compounds of Formula (I) wherein R1, R2, R3, R4, R5, m and n are as defined in the description, and to pharmaceutically acceptable salts of such compounds. These compounds are useful as calcium channel blockers.
US08436202B2 Use of pressure swing absorption for water removal from a wet methanol stream
The present invention includes a process to dry a feed steam containing alcohol and a small quantity of water. The process includes the step of using pressure swing adsorption to produce a first alcohol stream of substantially dehydrated alcohol and a second mixed stream of water and alcohol. The second mixed stream is distilled in a distillation column to produce a relatively purified water stream and a wet alcohol stream. The wet alcohol stream is added to the feed stream. Optionally the present invention is used to recover excess methanol from a biodiesel reactor that uses one or both of the transesterification reaction and the esterification reaction. The biodiesel reactor produces a product stream comprising fatty acid esters, water and alcohol. Water and alcohol is separated from the product stream. The alcohol is dried as noted above. Dried alcohol is recycled to one or both of the transesterification reaction and the esterification reaction.
US08436197B2 Palladium complexes and polymerization and coupling processes thereof
The present invention is related to palladium complexes having substituted diarylideneacetone ligands and coupling and polymerization processes thereof.
US08436193B2 Method for manufacturing sulfolene compound and method for manufacturing sulfolane compound
An object of the present invention is to provide a method for manufacturing a sulfolene compound, the method being capable of inhibiting generation of polymers. Another object of the present invention is to provide a method for manufacturing a sulfolane compound, the method being capable of controlling inhibition of hydrogenation catalyst activity and smoothly hydrogenating a sulfolene compound.The present invention is a method for manufacturing a sulfolene compound represented by a formula (2), which comprises the step of reacting a conjugated diene compound represented by a formula (1) with sulfur dioxide in the presence of a metallocene compound: in the formula (1), R1 to R6 each independently represents a hydrogen atom or a C1 to C6 alkyl group, in the formula (2), R1 to R6 represent the same groups represented by R1 to R6 in the formula (1).
US08436190B2 Bendamustine pharmaceutical compositions
The present invention provides pharmaceutical formulations of lyophilized bendamustine suitable for pharmaceutical use. The present invention further provides methods of producing lyophilized bendamustine. The pharmaceutical formulations can be used for any disease that is sensitive to treatment with bendamustine, such as neoplastic diseases.
US08436189B2 Heterocyclic alkanol derivatives
The present invention relates to novel heterocyclic alkanol derivatives, to processes for preparing these compounds, to compositions comprising these compounds and to their use as biologically active compounds, in particular for controlling harmful microorganisms in crop protection and in the protection of materials and as plant growth regulators.
US08436188B2 Method for the separation of S-(−)-amlodipine from racemic amlodipine
Disclosed is a method for the separation of S-(−)-amlodipine from a racemic amlodipine. Featuring the use of inexpensive L-tartaric acid as an optical resolution agent and DMAC as a solvent, the separation method allows the resolution of S-(−)-amlodipine from racemic amlodipine at high yield and to a satisfactory enantiomeric excess and thus is economically favorable and applicable to the mass production of the optical isomer.
US08436187B2 1-heterocyclylsulfonyl, 3-aminomethyl, 5- (hetero-) aryl substituted 1-H-pyrrole derivatives as acid secretion inhibitors
The present invention provides a compound having a superior acid secretion inhibitory effect and showing an antiulcer activity and the like. The present invention provides a compound represented by the formula (I) wherein R1 is a nitrogen-containing monocyclic heterocyclic group optionally condensed with a benzene ring or a heterocycle, the nitrogen-containing monocyclic heterocyclic group optionally condensed with a benzene ring or a heterocycle optionally has substituent(s), R2 is an optionally substituted C6-14 aryl group, an optionally substituted thienyl group or an optionally substituted pyridyl group, R3 and R4 are each a hydrogen atom, or one of R3 and R4 is a hydrogen atom and the other is an optionally substituted lower alkyl group, an acyl group, a halogen atom, a cyano group or a nitro group, and R5 is an alkyl group or a salt thereof.
US08436183B2 Synthetic multimerizing agents
New compounds are disclosed for multimerizing immunophilins and proteins containing immunophilin or immunophilin-related domains. The compounds are of the formula M-L-Q where M is a synthetic ligand for an FKBP protein.
US08436181B2 Production process of optically active 3-quinuclidinol derivative
A process is provided for efficiently producing an optically active 3-quinuclidinol derivative of high optical purity using a readily available ruthenium compound as an asymmetric reduction catalyst. This process is a process for producing an optically active 3-quinuclidinol derivative represented by the following formula (III) comprising asymmetrically hydrogenating a 3-quinuclidinone derivative represented by the following formula (I) in the presence of a ruthenium compound (II) represented by formula (II): Ru(X)(Y)(Px)n[R1R2C*(NR3R4)-A-R5R6C*(NR7R8)] (in the formulas, R represents a hydrogen atom or C7 to C18 aralkyl group and the like, X and Y represent hydrogen atoms or halogen atoms and the like, Px represents a phosphine ligand, n represents 1 or 2, R1 to R8 represent hydrogen atoms or C1 to C20 alkyl groups and the like, * represents an optically active carbon atom and A represents an ethylene group and the like).
US08436180B2 Substituted-4-aryl-1,4-dihydro-1,6-naphthyridinamides and use thereof
The present application relates to novel substituted 4-aryl-1,4-dihydro-1,6-naphthyridine-3-carboxamides, a process for their preparation, their use for the treatment and/or prophylaxis of diseases, and their use for the manufacture of medicaments for the treatment and/or prophylaxis of diseases, especially cardiovascular disorders.
US08436178B2 Imidazoquinolines with immuno-modulating properties
The present invention provides compounds of formula (I) wherein Ra, R1, R2, R3, X1, Y1, Z1, A, n and m are as defined in the specification, and pharmaceutically acceptable salts thereof, as well as processes for their preparation, pharmaceutical compositions containing them and their use in therapy.
US08436176B2 Process for preparing 2-methyl-1-(2-methylpropyl)-1H-imidazo[4,5-c][1,5]naphthyridin-4-amine
The invention provides various processes for preparing 2-methyl-1-(2-methylpropyl)-1H-imidazo[4,5-c][1,5]naphthyridin-4-amine.
US08436159B2 Glyphosate resistant class I 5-endolpyruvylshikimate-3-phosphate synthase (EPSPS)
The compositions and methods disclosed herein provide novel DNA molecules that encode glyphosate resistant EPSPS proteins and plants containing these new proteins. The plants that express the new EPSPS proteins are themselves tolerant to the herbicidal effects of glyphosate.
US08436157B2 Method for the production of sucralose
The present invention provides a method for producing sucralose from a feed stream including a sucrose-6-acylate in a reaction vehicle. The method includes: (i) reacting the sucrose-6-acylate with a chlorinating agent in order to chlorinate the 4, 1′ and 6′ positions of the sucrose-6-acylate; (ii) quenching the product stream of (i) with an aqueous solution of a base to provide a sucralose-6-acylate and the chloride salt of said base, wherein the concentration of the aqueous solution of the base is sufficiently high such that at least a portion of the chloride salt of the base is formed as a precipitate; (iii) either: deacylating the sucralose-6-acylate by treating the product stream of (ii) with a base and thereafter removing precipitated salt to provide a product stream including sucralose; or: removing precipitated salt from the product stream of (ii) and thereafter deacylating the sucralose-6-acylate by treating with a base to provide a product stream including sucralose; and (iv) isolating sucralose from the product stream of (iii).
US08436156B2 Method for the production of sucralose
The present invention provides a method for producing sucralose from a feed stream resulting from the chlorination of a sucrose-6-acylate in a reaction vehicle. The feed stream includes a sucralose-6-acylate, the reaction vehicle, water, and salts. The salts include one or more selected from the group consisting of alkali metal chlorides, alkaline earth metal chlorides and ammonium chloride. The method includes: (i) deacylation of the sucralose-6-acylate by treatment with a base to afford a product stream comprising sucralose; (ii) partial removal of water and, optionally, reaction vehicle from the product stream of (i) in order to cause precipitation of the salts from the product stream; (iii) removal of the precipitated salts from the product stream of (ii); and (iv) isolation of sucralose from the product stream of (iii).
US08436155B2 7,2″-dehydrate puerarin and its salts, preparation method and use thereof
A 7,2″-dehydrate puerarin represented by formula (I) and salt derivatives thereof. The compounds are prepared from puerarin by intramolecular mitsunobu reaction. They are capable of shortening arrhythmia duration and prolonging coagulation time. They can be prepared into oral formulations or injections for treatment of cardiovascular and cerebrovascular diseases including arrhythmia, coronary heart disease, angina pectoris, myocardial infarction, and cerebral infarction.
US08436141B2 Purified hemocyanin obtained from Fissurella latimarginata; subunit of purified hemocyanin; use of hemocyanin, its subunit or immunogenic fragments and compositions containing the same
The invention relates to purified hemocyanins, subunits or immunogenic fragments thereof, wherein the hemocyanins are purified from a hemolymph of Fissurella latimarginata (black limpet), Fissurella cumingi (strawberry limpet), or Fissurella maxima (queen limpet). The invention also relates to compositions including the purified hemocyanins and methods of treating neoplastic diseases by administering such compositions.
US08436135B2 Diagnosis and risk stratification by determining the marker CT-proADM
The invention relates to a novel diagnostic marker CT-proADM (C-terminal fragment of preproADM, SEQ ID No, 1) for diagnosing and/or stratifying the risk of diseases. Also disclosed is a method for diagnosing and/or stratifying the risk of diseases, particularly cardiovascular diseases, cardiac insufficiency, and infections and/or inflammations of the lungs and respiratory tract. In said method, the CT-proADM (SEQ ID No. 1) marker, or a partial peptide of fragment thereof, or said marker contained in a marker combination (panel, cluster) is determined in a patient who is to be examined. The invention further relates to a diagnostic apparatus as well as a kit for carrying out said method.
US08436133B2 Group 3 post-metallocene complexes based on bis(naphthoxy)pyridine and bis(naphthoxy)thiophene ligands for the ring-opening polymerisation of polar cyclic monomers
The present invention relates to the use of group 3 post-metallocene complexes based on sterically encumbered bis(naphthoxy)pyridine and bis(naphthoxy)thiophene ligands in the ring-opening polymerisation of polar monomers such as, for examples, lactones, lactides, cyclic carbonates.
US08436128B2 Substrate material for high speed optical discs
This invention relates to the use of polycarbonate for the production of an optical recording medium in which secure high speed operation, a transcriptability of the pit/groove structure of >85% and sufficient disc flatness can be achieved and the polycarbonate is based on bisphenol A and the polycarbonate contains a release agent in an amount less than 2000 ppm.
US08436127B2 Semiconductor materials based on diketopiperidinopiperidine copolymers
The present invention provides a polymer comprising a unit of formula and an electronic device comprising the polymer as semiconducting material.
US08436126B2 Resin composition for adhesive sheet and adhesive sheet using the composition for flexible printed circuit board
The present invention provides a resin composition for an adhesive sheet, comprising an acrylic copolymer containing (A) an acrylate ester, methacrylate ester, or a mixture thereof, (B) acrylonitrile, methacrylonitrile, or a mixture thereof, and (C) an unsaturated carboxylic acid; an epoxy resin; and a curing agent, wherein the curing agent comprises at least one selection from Lewis acid-amine complexes.
US08436121B2 Two-component sealant comprising cross-linked polyalkylene oxide
The present invention relates to a two-component sealant comprising a first part and a second part wherein a) the first part (X) comprises: (i) a polyalkyleneoxide polymer having one or more unsaturated end groups (ii) an addition reaction catalyst b) the second part (Y) comprises: (i) an organosiloxane comprising one or more Si—H groups. The present invention also relates to medical devices used in connection with the sealant, mixing devices for delivering and mixing the first part and the second part of the sealant, and methods for applying the sealant.
US08436115B2 Catalyst systems based on carbonylamino fulvenes
The present invention discloses metallic complexes based on carbonylamino fulvene ligands; their method of preparation and their use in the oligomerisation or polymerisation of ethylene and alpha-olefins.
US08436114B2 Polyethylene and process for production thereof
This invention relates to a process for polymerizing olefins in which the amount of trimethylaluminum in a methylalumoxane solution is adjusted to be from 1 to 25 mol %, prior to use as an activator, where the mol % trimethylaluminum is determined by 1H NMR of the solution prior to combination with any support. This invention also relates to a process for polymerizing olefins in which the amount of an unknown species present in a methylalumoxane solution is adjusted to be from 0.10 to 0.65 integration units prior to use as an activator, where the amount of the unknown species is determined by the 1H NMR spectra of the solution performed prior to combination with any support. Preferably, the methylalumoxane solution is present in a catalyst system also comprising a metallocene transition metal compound.
US08436113B2 Ethylene alpha olefin polymer formed by use of metallocene catalyst
There is provided a method for producing copolymer that is composed of ethylene and alpha-olefin by a solution polymerization, and more specifically, a method for producing copolymer that is composed of ethylene and aromatic monomer as main components by using a transition metal catalyst including a cyclopentadiene derivative, and one or more anionic ligand having aryloxy group in which an aryl derivative is substituted at an ortho-position
US08436112B2 Polyolefin production with a high performance support for a metallocene catalyst system
The invention is directed to a metallocene catalyst system comprising an inert silica support having pores with a peak pore volume of greater than about 0.115 mL/g at a pore diameter between about 250 Angstroms and about 350 Angstroms, and an alumoxane activator, with the metallocene being bound substantially throughout the support. The activator is grafted to the support in a solvent at a reflux temperature of toluene to obtain an aluminoxane on silica, and a metallocene component is added to make a MCS having a metallocene loading of about 2 wt %. This facilitates the production of metallocene catalyst systems having increased catalytic activity than previously recognized that is at least about 20 percent higher than the catalytic activity for a metallocene loading of about 1 wt % where the activator is grafted to the support at room temperature.
US08436110B2 Olefin metathesis process employing bimetallic ruthenium complex with bridging hydrido ligands
An olefin metathesis process for converting a reactant olefin or a mixture of reactant olefins into one or more product olefins that are different from the reactant olefin(s). The process employs a catalyst system containing a carbene-generating agent and a bimetallic ruthenium complex comprising one or more μ-hydrido bridging ligands, and optionally containing di(t-butyl)phosphine. The catalyst system is advantageously active at process temperatures greater than 90° C. Cyclization metathesis and ring-opening polymerization metathesis are preferred olefin metathesis processes.
US08436106B2 Crosslinkers and materials produced using them
Cross-linkers and polymers produced using them are provided. The cross-linked polymers are suitable for use in applications where a broad temperature range may be encountered. In some examples, at least a first and a second polyetheretherketone chain may be cross-linked to each other through two or more Schiff base linkages. Articles using the cross-linked polymers are also described.
US08436101B2 Ethylene-α-olefin copolymer and molded object thereof
The purpose of the invention is to provide an ethylene-α-olefin copolymer, which has a high melt tension but a small neck-in, and a molded object produced by extrusion molding of the copolymer. An ethylene-α-olefin copolymer having a monomer unit based on ethylene and a monomer unit based on an α-olefin having 3 to 20 carbon atoms, which has a melt flow rate (MFR) of 0.1 to 100 g/10 min, a density (d) of 850 to 940 kg/m3, a ratio (Mw/Mn) of weight average molecular weight (Mw) to number average molecular weight (Mn) of 2 to 12, and a value g* defined by the following formula (I) of 0.50 to 0.75: g*=[η]/([η]GPC×gSCB*)  (I).
US08436099B2 Method of recycling paints as a component of an immiscible polymer blend
An immiscible polymer blend including a first polymer component including a paint polymer phase and a second polymer component immiscible with the first polymer component and selected from polyolefins and polymethylmethacrylate (PMMA). A method of recycling paint by blending a first polymer component including a paint polymer phase with a second polymer component immiscible with the first polymer component and selected from polyolefins and polymethylmethacrylate (PMMA) is also presented.
US08436098B2 Use of polyorganosiloxanes in the processing and vulcanization of rubber
The invention relates to the use of polyorganosiloxanes having 3 or more siloxane units, which has (i) at least one organic component R1, where R1 has at least one carbon-carbon multiple bond, and (ii) at least one hydrocarbon component R2, where R2 has a chain length of 5 to 50 carbon atoms. The polyorganosiloxanes are used in the processing and vulcanization of rubber and are incorporated reactively into it. They give rise to a lowering in the viscosity of the rubber in the course of processing and in some cases to an improvement in the mechanical properties of the vulcanized rubber.
US08436096B2 IR-reflecting compositions
A composition comprising multistage polymeric particles having an average particle diameter from 0.5 to 15 μm and a Vicker's scale hardness from 100 to 700 Kgf/mm2; and a film-forming polymer having Tg no greater than 80° C. The refractive index difference measured from 400 nm to 800 nm between the polymeric particles and the film-forming polymer is no greater than 0.02 and the average refractive index difference measured from 800 nm to 2500 nm between the polymeric particles and the film-forming polymer is at least 0.04.
US08436093B2 Metal surface treatment composition, metal surface treatment method, and metal material
A metal surface treatment composition including at least one compound selected from the group consisting of a zirconium compound and a titanium compound, and an organosiloxane, which is a polycondensate of organosilane and has in a molecule thereof of at least two amino groups, in which the Degree of polycondensation of the organosiloxane is at least 40%, the content of at least one compound selected from the group consisting of the zirconium compound and the titanium compound is predetermined content, the content of the organosiloxane in the metal surface treatment composition is predetermined content, and the mass ratio of at least one element selected from the group consisting of the zirconium element and the titanium element contained in the zirconium compound and the titanium compound, respectively, to the silicon element contained in the organosiloxane is a predetermined ratio.
US08436088B2 Plasters and renders and paints, copolymer dispersions and their use
Plasters and renders and paints, copolymer dispersions and their use Compositions containing selected polymer dispersions, colloidal silica, fillers and pigments are described.These can be formulated to give plasters and renders or paints which are distinguished by excellent abrasion resistance, little tendency to soiling, high water vapor permeability, good adhesion and good weathering stability. The compositions according to the invention can be processed to give plasters and renders or paints which have a nanostructured surface and which differ from conventionally produced surfaces.
US08436085B2 Barrier properties of substantially linear HDPE film with nucleating agents
Disclosed is a method for improving the barrier properties of polyethylene films. The method comprises mixing a substantially linear, high density polyethylene with a nucleating agent and converting the mixture into a film. The film made by the method of the invention has at least a 15% improvement on the water vapor barrier property and/or in the oxygen barrier property compared with the control film made from the same substantially linear, high density polyethylene but does not contain the nucleating agent.
US08436079B2 Weather-resistant epoxy resin system
A curable epoxy resin composition of an epoxy resin (a) and a combination (b) of an antioxidant (b1) and a UV absorber (b2). The UV absorber (b2) is a benzotriazole. The antioxidant (b1) is a compound of general formula I: wherein: R1=—H, —OH, —O—C1-18 alkyl, —C1-18 alkyl, —C5-12 cycloalkyl being unsubstituted or being substituted with C1-6 alkyl or C1-6 alkoxy, or —CH2—C5-12 cycloalkyl being unsubstituted or being substituted with C1-6 alkyl or C1-6 alkoxy; R2,3,4,5=independent from each other —C1-6 alkyl; and R6=a bivalent aliphatic, cycloaliphatic or aromatic residue. The weight ratio of (a) to (b) is from 90.0:10.0 to 98.5:1.5, with the proviso that the weight portion of (b1) is at least 0.5. The cured product has very good weather resistance after curing by polyaddition with a polycarboxylic acid anhydride or by homopolymerization. The cured product is suitable as an electrical insulation material.
US08436077B2 Lipid-treated particles and polymers containing the particles
A coated particulate solid composition includes a particulate inorganic solid having deposited on its surface a treatment oil comprising lipids. The particulate inorganic solid can include a base particle of titanium dioxide, zinc sulfide, zinc oxide, iron oxide, lead oxide, aluminum oxide, silicon dioxide, zirconium oxide and/or chromium oxide. The treatment oil is optionally a vegetable oil. The treatment oil containing lipids optionally contains glycerides such as triglycerides, and diglycerides, and can contain phospholipids. In one embodiment, the coated particulate solid composition includes particulate titanium dioxide, wherein the treatment oil provides increased bulk density, and enhanced dispersibility in plastic as well as improved lacing resistance.
US08436073B2 Lignite-based foundry resins
Described herein, in the preferred embodiment, is a leonardite-based polyurethane resin binder that may be used, among other applications, as a binder in combination with foundry aggregate, e.g., sand, for molding or casting metal parts. The binders described herein comprise a humic substance, preferably leonardite, combined with a polymerizable polyol, an isocyanate, and a polymerization catalyst to make a polyurethane resin binder in situ in a foundry aggregate, such as sand. The lignite is mixed with the polymerizable polyol and dispersing agents as additives to improve the suspension quality and binder performance of the lignite-containing part of the binder components.
US08436071B2 Dental repair material
The invention is directed to an improved dental composition useful in the repair of cavities, apex repairs, root perforations and root canals. Disclosed is a dental composition and dental composition additive which have improved handling characteristics, for example improved viscosity and setting time. The addition of effective amounts of a modified cellulose and calcium chloride to available dental repair compounds, such as mineral trioxide compound, results in the improved dental composition without affecting the other characteristics of the dental repair compound.
US08436063B2 Polymer polyols and polymer dispersions made from vegetable oil-based hydroxyl-containing materials
Polymer polyols and dispersions are prepared by polymerizing certain starting materials in a continuous phase. The continuous phase includes a polyol containing hydroxylmethyl groups, which is derived from a fatty acid. The dispersed phase may be, for example, a vinyl polymer, a polyurea or a polyurethane-urea.
US08436061B2 Organic, open cell foam materials, their carbonized derivatives, and methods for producing same
Organic, small pore area materials (“SPMs”) are provided comprising open cell foams in unlimited sizes and shapes. These SPMs exhibit minimal shrinkage and cracking. Processes for preparing SPMs are also provided that do not require supercritical extraction. These processes comprise sol-gel polymerization of a hydroxylated aromatic in the presence of at least one suitable electrophilic linking agent and at least one suitable solvent capable of strengthening the sol-gel. Also disclosed are the carbonized derivatives of the organic SPMs.
US08436058B2 Methods for separation and conditioning of products containing super absorbent polymers
Embodiments of the present disclosure include a method for separating a product comprising a super absorbent polymer, a fiber and a plastic to separate the product into components thereof, the method comprising adding water to the product, and pressing the product in order to separate the product into components comprising a plastics component and a super absorbent polymer and fiber component. Other methods of the present disclosure include a method for producing a reusable plastic, reusable paper fiber stream and a reusable super absorbent polymer from the treatment of a product comprising a super absorbent polymer, a fiber and a plastic. Still other embodiments of the present disclosure include a method for the treatment of wet super absorbent polymer, comprising salt assisted dehydration.
US08436053B2 Fluorinated ionomer produced by aqueous polymerization using dispersed particulate of fluorinated ionomer
A process for making an aqueous dispersion of fluorinated ionomer particles by providing dispersed particulate of fluorinated ionomer in an aqueous polymerization medium and polymerizing at least one fluorinated monomer having an ionic group in the aqueous polymerization medium in the presence of the dispersed particulate of fluorinated ionomer and initiator to form the aqueous dispersion of particles of fluorinated ionomer.
US08436038B2 Indole and indazole compounds as an inhibitor of cellular necrosis
The present invention relates to indole or indazole compounds, pharmaceutically acceptable salts or isomers thereof which are useful for the prevention or treatment of cellular necrosis and necrosis-associated diseases. The present invention also relates to a method and a composition for the prevention or treatment of cellular necrosis and necrosis-associated diseases, comprising said indole or indazole compounds as an active ingredient.
US08436032B2 Bendamustine cyclopolysaccharide compositions
The present invention is directed to pharmaceutical compositions comprising: (a) bendamustine, (b) a charged cyclopolysaccharide, and (c) a stabilizing agent having a charge opposite to that of the cyclopolysaccharide. Such composition provides unexpectedly desirable stability in reactive environments such as plasma, coupled with unexpectedly desirable anticancer activity. Such compositions are suitable for injection or infusion into patients in need for treatment with bendamustine.
US08436028B2 CETP inhibitors derived from benzoxazole arylamides
Compounds having the structure of Formula I, including pharmaceutically acceptable salts of the compounds, are potent CETP inhibitors, and are useful for raising HDL-cholesterol, reducing LDL-cholesterol, and for treating or preventing atherosclerosis. In formula I, A-B is an arylamide moiety.
US08436026B2 Endogeneous repair factor production promoters
It relates to an endogenous repair factor production accelerator which comprises one or at least two selected from prostaglandin (PG) 12 agonist, EP2 agonist and EP4 agonist. Since prostaglandin (PG) 12 agonist, EP2 agonist or EP4 agonist has various endogenous repair factor production accelerating action, angiogenesis acceleration action and stem cell differentiation induction action, it is useful as preventive and/or therapeutic agents for ischemic organ diseases (e.g., arteriosclerosis obliterans, Buerger disease, Raynaud disease, myocardial infarction, angina pectoris, diabetic neuropathy, spinal canal stenosis, cerebrovascular accidents, cerebral infarction, pulmonary hypertension, bone fracture, Alzheimer disease, etc.) and various cell and organ diseases.
US08436024B2 2-pyridone compounds
The invention provides compounds of formula wherein R1, R3, R4, R5, R6, R7, L, X and Y are as defined in the specification; together with processes and intermediates for their preparation, pharmaceutical compositions containing them and their use in therapy. The compounds are inhibitors of human neutrophil elastase.
US08436023B2 Cyclohexyl-azetidinyl antagonists of CCR2
The present invention comprises compounds of Formula (I). wherein: R1, R2, X, and Z are as defined in the specification. The invention also comprises a method of preventing, treating or ameliorating a syndrome, disorder or disease, wherein said syndrome, disorder or disease is type II diabetes, obesity and asthma. The invention also comprises a method of inhibiting CCR2 activity in a mammal by administration of a therapeutically effective amount of at least one compound of Formula (I).
US08436022B2 Biaryl benzolmidazole derivatives and pharmaceutical composition comprising the same
Disclosed are biaryl benzoimidazo derivatives. They have an inhibitory effect on calcium influx in HEK cells, thereby showing a powerful antagonistic effect on a vanilloid receptor, and further have an analgesic effect, thereby being useful for preventing or treating pain, acute pain, chronic pain, neuropathic pain, postoperative pain, migraine, arthralgia, neuropathies, nerve injury, diabetic neuropathy, neurological illness, neurodermatitis, stroke, bladder hypersensitivity, irritable bowel syndrome, a respiratory disorder such as cough, asthma, and chronic obstructive pulmonary disease, burning, psoriasis, itching, vomiting, irritation of the skin, eyes, and mucous membranes, gastric-duodenal ulcers, inflammatory intestinal diseases, and inflammatory diseases.
US08436021B2 Pharmaceutical composition for treating and/or preventing a pathology associated with an obsessional behavior or with obesity
This invention relates to the use of a ligand of the 5-HT4 receptor or of a pharmaceutically acceptable salt of this ligand and to a nucleic acid coding for a 5-HT4 receptor or of a functionally equivalent receptor for a drug for treating and/or preventing a pathology associated with an obsessional behavior such as anorexia, bulimia and the addiction to drugs of abuse or obesity. The invention also relates to a method for identifying a compound that is biologically active in the treatment and/or the prevention of a pathology associated with an obsessional conduct or obesity including: a) placing the 5-HT4 receptor or a functionally equivalent receptor in contact with this biologically active compound, and b) the determination of whether this biologically active compound is capable of modulating the basal activity of the 5-HT4 receptor or of a functionally equivalent receptor.
US08436018B2 Method for increasing the activity of lysosomal enzymes
Method for enhancing in a mammalian cell the activity of an enzyme associated with Gaucher Disease by administering a competitive inhibitor of glucocerebrosidase in an amount effective to enhance the activity of the enzyme. Preferred compounds for use in the method are imino sugars and related compounds. In particular, C8-12-alkyl derivatives of N-alkyl-deoxynojirimycin, isofagomine compounds, and calystegine compounds are effective to enhance glucocerebrosidase activity.
US08436017B2 Beta-2-adrenoreceptor agonists
Compounds of formula in free or salt or solvate form, where Ar is a group of formula Y is carbon or nitrogen and R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, X, n, p, q and r are as defined in the specification, their preparation and their use as pharmaceuticals, particularly for the treatment of obstructive or inflammatory airways diseases.
US08436016B2 Fused heterocyclic M1 receptor positive allosteric modulators
The present invention is directed to fused heterocyclic compounds of formula (I): which are M1 receptor positive allosteric modulators and that are useful in the treatment of diseases in which the M1 receptor is involved, such as Alzheimer's disease, schizophrenia, pain or sleep disorders. The invention is also directed to pharmaceutical compositions comprising the compounds, and to the use of the compounds and compositions in the treatment of diseases mediated by the M1 receptor.
US08436015B2 Glucagon receptor antagonist compounds, compositions containing such compounds and methods of use
Glucagon receptor antagonist compounds of formula I are disclosed: The compounds are useful for treating type 2 diabetes and related conditions. Pharmaceutical compositions and methods of treatment are also included.
US08436010B2 Treatment of solid tumors with rapamycin derivatives
Rapamycin derivatives have interesting effects in the treatment of solid tumors, optionally in combination with a chemotherapeutic agent.
US08436008B2 Substituted heterocyclic compounds
The present invention relates to substituted heterocyclic compounds of Formula I: or pharmaceutically acceptable salts or N-oxides or quaternary ammonium salts thereof wherein constituent members are provided hereinwith, as well as their compositions and methods of use, which are histamine H4 receptor inhibitors/antagonists useful in the treatment of histamine H4 receptor-associated conditions or diseases or disorders including, for example, inflammatory diseases or disorders, pruritus, and pain.
US08436007B2 Inhibitors of protein kinases
The present invention relates to inhibitors of cyclin-dependent kinases and therapeutic applications thereof. Furthermore, the invention relates to methods of preventing and/or treating any type of pain, inflammatory disorders, immunological diseases, proliferative diseases, infectious diseases, cardiovascular diseases and neurodegenerative diseases comprising the administration of an effective amount of at least one inhibitor of cyclin-dependent kinases.
US08436002B2 AKT inhibitors
The present invention provides AKT inhibitors of the formula: Formula I The present invention also provides pharmaceutical compositions comprising compounds of Formula I, uses of compounds of Formula I and method of using compounds of Formula I.
US08436001B2 Pyrazol-4-yl-heterocyclyl-carboxamide compounds and methods of use
Pyrazol-4-yl-heterocyclyl-carboxamide compounds of Formula I, including stereoisomers, geometric isomers, tautomers, and pharmaceutically acceptable salts thereof, wherein X is a thiazolyl, picolinyl, pyridinyl, or pyrimidinyl, are useful for inhibiting Pim kinase, and for treating disorders such as cancer mediated by Pim kinase. Methods of using compounds of Formula I for in vitro, in situ, and in vivo diagnosis, prevention or treatment of such disorders in mammalian cells, or associated pathological conditions, are disclosed.
US08436000B2 Substituted carbamate derivatives as modulators of corticotropin-releasing factor receptor activity
The disclosure provides compounds of formula (I), including their salts, as well as compositions and methods of using the compounds. The compounds are CRF receptor antagonists and may be useful for treating disorders associated with abnormal CRF levels or aberrant functioning of CRF receptors.
US08435999B2 Compositions and methods for controlling nematodes
Compositions and processes for controlling nematodes are described herein, e.g., nematodes that infest plants or animals. The compounds include oxazoles, oxadiazoles and thiadiazoles.
US08435998B2 Crystalline form of posaconazole
The present invention relates to crystalline form IV of posaconazole and pharmaceutical compositions comprising the same. The pharmaceutical composition can be used to treat or prevent fungal infections.
US08435997B2 Cysteine prodrugs to treat schizophrenia and drug addiction
The present invention provides cysteine prodrugs for the treatment of schizophrenia and drug addiction. The invention further encompasses pharmaceutical compositions containing prodrugs and methods of using the prodrugs and compositions for treatment of schizophrenia and drug addiction.
US08435993B2 Methods of inhibiting metastasis from cancer
The present invention includes compositions that are useful in preventing or treating metastasis in a subject diagnosed with cancer. The present invention also includes methods of preventing or treating metastasis in a subject diagnosed with cancer, wherein the method comprises administering to the subject in need thereof an effective amount of a pharmaceutical formulation comprising at least one pharmaceutically acceptable carrier and at least one CX3CR1 or fractalkine antagonist.
US08435992B2 Multiple myeloma treatments
Methods for treating cancer by using compound PM00104, in particular, for treating multiple myeloma are provided.
US08435989B2 Processes for the preparation of rivaroxaban and intermediates thereof
Provided are process for the preparation of (R)- and/or (S)-Rivaroxaban, and compounds which are intermediate compounds used in the processes for the preparation of (R)- and/or (S)-Rivaroxaban.
US08435980B2 Pyrrolopyridine inhibitors of kinases
The present invention relates to compounds of formula (I) or pharmaceutical acceptable salts, wherein R1a, R1b, R1c, X, and Y are defined in the description. The present invention relates also to compositions containing said compounds which are useful for inhibiting kinases such as Cdc7 and methods of treating diseases such as cancer.
US08435973B2 17-beta HSD1 and STS inhibitors
Substituted steroid compounds which represent selective inhibitors of 17β-hydroxysteroid dehydrogenase type I (17β-HSD1) and, in addition, which may represent inhibitors of the steroid sulfatase, salts thereof, pharmaceutical preparations containing these compounds, and a process for the preparation of these compounds. Also disclosed is a therapeutic method of using such substituted steroid compounds, particularly in the treatment, inhibition, prophylaxis or prevention of steroid hormone dependent diseases or disorders, such as steroid hormone dependent diseases or disorders requiring the inhibition of 17β-hydroxysteroid dehydrogenase type I and/or steroid sulfatase enzymes and/or requiring lowering of the endogenous 17β-estradiol concentration.
US08435969B2 Method and compositions for treating hematological malignancies
A compound of formula 1 and/or its salts, tautomers or solvates is used to treat hematological malignancies. In an embodiment, an organic acid salt of compound 1 is provided for general use in treatment of neoplasms, and in a further embodiment the salt is stabilized with carbohydrate.
US08435968B2 Aryl-phenyl-sulfonamido-cycloalkyl compounds and their use
The present invention pertains generally to the field of therapeutic compounds, and more specifically to certain aryl-phenyl-sulfonamido-cycloalkyl compounds of the following formula (collectively referred to herein as “APSAC compounds”). The present invention also pertains to pharmaceutical compositions comprising such compounds, and the use of such compounds and compositions, both in vitro and in vivo, in treatment, for example, of inflammation and/or joint destruction and/or bone loss; of disorders mediated by excessive and/or inappropriate and/or prolonged activation of the immune system; of inflammatory and autoimmune disorders, for example, rheumatoid arthritis, psoriasis, psoriatic arthritis, chronic obstructive pulmonary disease (COPD), atherosclerosis, inflammatory bowel disease, ankylosing spondylitis, and the like; of disorders associated with bone loss, such as bone loss associated with excessive osteoclast activity in rheumatoid arthritis, osteoporosis, cancer-associated bone disease, Paget's disease and the like, etc.; and of cancer, such as a haematological malignancy, a solid tumour, etc. Formula (I).
US08435967B2 Water dispersible policosanol cyclodextrin complex and method of its production
Disclosed is a formulation of policosanol with natural cyclodextrins resulting in a water dispersible form of policosanol. The disclosed process provides an economical commercial method for making the policosanol complex. The complex is suitable for incorporation into oral dosage forms and also in functional foods. One aspect of the present disclosure is a process for making a water dispersible policosanol cyclodextrin complex for animal ingestion. This method includes preparing a policosanol cyclodextrin complex and administering said complex to an animal. The preferred animal is a human with the route of administration being oral ingestion. The form of the complex for ingestion can be a hard gelatin capsule, tablet or wafers, which may contain other ingredients, both active and inactive. The complex also can be further formulated with excipients suitable for soft gelatin capsules, such as, for example, vegetable oils, waxes, lecithin, and surfactants such as Tween-80.
US08435966B2 Associations of xanthogenates and cyclodextrins, and their use
The invention is related to association products of xanthates and cyclodextrins, pharmaceutical formulations made therefrom, and medicaments containing these formulations for treating Alzheimer's, viral, tumor, cardiovascular, and autoimmune diseases such as rheumatism, multiple sclerosis, alopecia areata, lupus erythematosus, stroke, lung edema, or for use as radio-protectors. The association products contain a xanthate of general formula I whereby R1 represents a possibly substituted aryl or alkyl residue and R2 represents a metal atom, a possibly substituted alkyl, alkoxy, amino or ammonium group or halogen, and a cyclodextrin, whereby the cyclodextrin can be either a substituted or non-substituted alpha-, beta- or gamma-cyclodextrin. Furthermore, the invention is related to the use of the association products for chemical syntheses.
US08435964B2 Ectonucleotidase pyrophosphate/phosphodiestrase-1 (ENPP-1) as a target for the treatment of aortic valve stenosis and cardiovascular calcification
Aortic valve stenosis (AS) is a chronic process related to a progressive mineralization of the aortic root and valve cusps. We found in human AS valves a high level of expression and enzymatic activity of ectonucleotide pyrophosphatase/phosphodiesterase-1 (ENPP-1), which correlated to the degree of mineralization. In vitro, inhibition of ENPP activity with ARL 67156 significantly reduced calcification of isolated valve interstitial cells. In a rat model of cardiovascular calcification, ARL 67156 significantly reduced calcification of the aortic root and valve cusps. This is the first study to demonstrate that increased expression and activity of ENPP-1 promotes the mineralization process in AS valves. Hence, inhibition of ectonucleotidase may represent a novel target of therapy for this frequent and serious cardiovascular disease.
US08435962B2 Triacetyl-3-hydroxyphenyladenosine and its use for regulating blood fat
The invention discloses triacetyl-3-hydroxyphenyladenosine represented by formula (I), the preparation, the pharmaceutical composition and the use thereof. Specially, the invention discloses a new compound of 2′,3′,5′-tri-O-acetyl-N6-(3-hydroxyphenyl)adenosine. Using hypoxanthine nucleoside as starting material, the compound is prepared by acetylating with acetic anhydride, chlorinating with thionyl chloride, and being substituted with 3-hydroxy aniline. The invention also discloses the pharmaceutical composition comprising triacetyl-3-hydroxyphenyladenosine. The dosage forms of the said pharmaceutical composition include tablet, capsule, pill, injection, sustained release preparation, controlled release preparation or particulate delivery system. The medicament for treatment or precaution of hyperlipemia prepared by the compound of the invention has the advantages of significant hypolipidemic activity, less toxicity and adverse effect as well as slow metabolism in vivo.
US08435958B2 Method for producing pectin hydrolysis products
Methods for the production of pectin hydrolysis products, the pectin hydrolysis products produced in this manner, as well as their use are described.
US08435952B2 Method for retarding progression to definite rheumatoid arthritis in subjects with undifferentiated arthritis
The invention relates to methods and compositions for treating undifferentiated arthritis (UA) and/or preventing the development of rheumatoid arthritis (RA) in subjects with UA by administering to a subject in need thereof an effective amount of soluble CTLA4 molecule.
US08435946B2 Orally dosed pharmaceutical compositions comprising a delivery agent in micronized form
Solid pharmaceutical compositions and methods of their use suitable for the oral delivery of pharmacologically active agents, e.g. peptides, comprising a therapeutically-effective amount of a pharmacologically active agent; a crospovidone or povidone; and a delivery agent for said pharmacologically active agent are disclosed. The compositions utilize micronized forms of the delivery agent which provides enhanced bioavailability of pharmacologically active agents, particularly calcitonin.
US08435945B2 GH secretagogues and uses thereof
The invention relates to use of a GH secretagogue (e.g. GRF or an analog thereof) for (1) altering a lipid parameter in a subject; (2) altering a body composition parameter in a subject, (3) treating a condition characterized by deficient or decreased bone formation in a subject (4) improving daytime vigilance and/or cognitive function in a subject, (5) improving a metabolic condition in a subject, (6) improving anabolism in a catabolic condition in a subject, and/or (7) improving and/or reconstituting immune function in a subject.
US08435936B2 Spray-drying process
A process for preparing a spray-dried detergent powder having: (i) detersive surfactant; and (ii) other detergent ingredients; wherein the process includes the steps of: (a) forming an aqueous detergent slurry in a mixer; (b) transferring the aqueous detergent slurry from the mixer to a pipe leading through a first pump and then through a second pump to a spray nozzle; (c) contacting a detergent ingredient to the aqueous detergent slurry in the pipe after the first pump and before the second pump to form a mixture; (d) spraying the mixture through the spray nozzle into a spray-drying tower; and (e) spray-drying the mixture to form a spray-dried powder, wherein the pressure drop between (i) the pressure in the pipe at the outlet of the first pump to (ii) the pressure in the pipe at the inlet to the second pump is less than 8×105 Pa.
US08435933B2 Monitoring cleaning of surfaces
A method for monitoring cleaning of a surface includes applying an amount of transparent indicator material to an area of a surface and measuring the amount of transparent indicator material remaining on the surface. The transparent indicator material may be fixed on the surface by drying and, when a fluorescent material, may be measured through exposure to ultraviolet radiation.
US08435932B2 Method of lubricating and lubricating compositions thereof
The present invention relates to a method of lubricating a mechanical device by using a lubricating composition containing a thiadiazole-functionalised dispersant. The invention further provides a lubricating composition suitable for the mechanical device containing a thiadiazole-functionalised dispersant and a polysulphide.
US08435928B2 Herbicidal composition
To provide a herbicidal composition and a method for its application, whereby the effect of a herbicidally active ingredient is improved to reduce the environmental load on a site where the herbicide is applied or the periphery thereof, more than ever, and its dose can be reduced.A herbicidal composition comprising (1) a compound represented by the formula (I) or its salt: where T and Z are as defined in the specification, and (2) a polyoxyalkylene alkyl ether phosphate or its salt. A method for controlling undesired plants or inhibiting their growth, by applying the herbicidal composition.
US08435926B2 Thermal transfer sheet
The present invention provides a thermal transfer sheet that has good heat resistance and slip property, and prevents the occurrence of tailing upon printing to achieve good printing even in high-speed printing.A thermal transfer sheet including: a base material; a color material layer on one surface of the base material; and a heat resistant slipping layer on the other surface of the base material, wherein the heat resistant slipping layer includes a polyamide resin, a silicone-modified polyamide resin, and an ethoxylated alcohol-modified wax.
US08435923B2 Compositions, materials incorporating the compositions, and methods of using the compositions and materials
Compositions, materials incorporating the compositions, and methods of use thereof, for the protection and/or decontamination of contaminants are disclosed.
US08435920B2 Cyclic catalytic upgrading of chemical species using metal oxide materials
Processes are disclosure which comprise alternately contacting an oxygen-carrying catalyst with a reducing substance, or a lower partial pressure of an oxidizing gas, and then with the oxidizing gas or a higher partial pressure of the oxidizing gas, whereby the catalyst is alternately reduced and then regenerated to an oxygenated state. In certain embodiments, the oxygen-carrying catalyst comprises at least one metal oxide-containing material containing a composition having the following formulas: (a) CexByB′zB″Oδ, wherein B=Ba, Sr, Ca, or Zr; B′=Mn, Co, and/or Fe; B″=Cu; 0.01
US08435918B2 Composite ceria-coated aerogels and methods of making the same
Ceria-coated aerogels can include an aerogel support material having a stabilized ceria coating thereon. The ceria coating can be formed by solution or vapor deposition of alcogels or aerogels. Additional catalytic metal species can also be incorporated into the coating to form multi-metallic compounds having improved catalytic activity. Further, the ceria coated aerogels retain high surface areas at elevated temperatures. Thus, improvements in catalytic activity and thermal stability can be achieved using these ceria-coated composite aerogels.
US08435915B2 Titanium dioxide catalyst structure for processes up to 1000° C and manufacturing thereof
The TiO2 catalyst structure consisting of TiO2 nano-particles in the anatase crystal form, doped with 0.05-5 wt % phosphorus on the TiO2 basis, organized in the circular planar aggregates with the specific surface area ranging from 40 to 120 m2/g, suitable for catalytic processes at the temperature up to 800° C., and the TiO2 catalyst structure of with the morphology of the aggregated compact particles, with the specific surface area from 20 to 40 m2/g, suitable for the catalytic processes at the temperature up to 1000° C. Active substances selected from the group consisting of silver, copper, gold, platinum metals, nickel, molybdenum and metal oxides except for alkaline metals oxides can be applied onto the surface of both types of the structure.
US08435910B2 Preparation method for anion-exchangeable, layered double hydroxides
The invention has for its object to provide a preparation method for preparing an anion-exchangeable LDH by decarbonation of a carbonate ion type LDH, which makes sure de carbonation is implemented with safety in a continuous manner while crystal shape, crystal structure and crystallinity are kept intact.The invention provides a preparation method for preparing an anion-exchangeable, layered double hydroxide wherein a carbonate ion type layered double hydroxide (LDH) having a composition represented by a general formula: QxR(OH)z(CO32−)0.5-y/2(X−)y.nH2O where x is indicative of a numeral range of 1.8≦x≦4.2; z is indicative of 2(x+1); y is indicative of a minimum value of at least 0 that increases to less than 1 when anions (X−) remain or a part of anions is introduced; Q is a divalent metal ion; R is a trivalent metal ion; and n is 2±2 is used as a starting material, and y in said general formula increases to a maximum of 1 by substitution of a minus monovalent anion (X−1) at a carbonate ion site thereby implementing substitution, characterized in that the starting material is dispersed in an aqueous solution mixed with a salt containing minus monovalent anions (X−) in an amount enough for substitution at the carbonate ion site while said aqueous solution is kept at a pH (hydrogen ion exponent) of greater than 4 to less than 7.
US08435908B2 Water-dispersible and multicomponent fibers from sulfopolyesters
Disclosed are water-dispersible fibers derived from sulfopolyesters having a Tg of at least 25° C. The fibers may contain a single sulfopolyester or a blend of a sulfopolyester with a water-dispersible or water-nondispersible polymer. Also disclosed are multicomponent fibers comprising a water dispersible sulfopolyester having a Tg of at least 57° C. and a water non-dispersible polymer. The multicomponent fibers may be used to produce microdenier fibers. Fibrous articles may be produced from the water-dispersible fibers, multicomponent fibers, and microdenier fibers. The fibrous articles include water-dispersible and microdenier nonwoven webs, fabrics, and multilayered articles such as wipes, gauze, tissue, diapers, panty liners, sanitary napkins, bandages, and surgical dressings. Also disclosed is a process for water-dispersible fibers, nonwoven fabrics, and microdenier webs. The fibers and fibrous articles have further applications in flushable personal care and cleaning products, disposable protective outerwear, and laminating binders.
US08435907B2 Flame resistant filler cloth and mattresses incorporating same
A filler cloth includes cellulosic fibers treated with a flame retardant chemistry such that the filler cloth has a char length of less than about nine inches when tested in accordance with NFPA 701, such that thermal shrinkage of the filler cloth at 400° F. is less than about 35% in any direction, and such that the filler cloth maintains flame and heat resistant integrity when impinged with a gas flame in accordance with testing protocols set forth in Technical Bulletin 603 of the State of California Department of Consumer Affairs. The filler cloth cellulosic fibers are treated with a flame retardant chemistry such that the filler cloth has a Frazier air permeability of less than about 400 cfm and a thermal resistance rating of at least about 3 when tested according to NFPA 2112.
US08435904B2 Methods of uniformly removing silicon oxide and an intermediate semiconductor device
A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having the at least one cavity or more than one density or strain is exposed to a gaseous mixture of NH3 and HF and heated, to substantially uniformly remove the silicon oxide. A method of removing an exposed sacrificial layer without substantially removing exposed isolation regions using the gaseous mixture of NH3 and HF and heat is also disclosed, as is an intermediate semiconductor device structure that includes a semiconductor substrate, a sacrificial layer overlying the semiconductor substrate, a diffusion barrier overlying the sacrificial layer, and exposed isolation regions.
US08435898B2 First inter-layer dielectric stack for non-volatile memory
A method and apparatus are described for forming a first inter-layer dielectric (ILD0) stack having a protective gettering layer (72) with a substantially uniform thickness. After forming device components (32, 33) on a substrate (31), a gap fill dielectric layer of SATEOS (52) is deposited over an etch stop layer of PEN ESL (42) and then planarized before sequentially depositing a gettering layer of BPTEOS (72) and capping dielectric layer (82) on the planarized gap fill dielectric layer (52). Once the ILD0 stack is formed, one or more contact openings (92, 94, 96) are etched through the ILD0 stack, thereby exposing the etch stop layer (42) over the intended contact regions.
US08435895B2 Methods for stripping photoresist and/or cleaning metal regions
Methods are provided for cleaning metal regions overlying semiconductor substrates. A method for removing material from a metal region comprises heating the metal region, forming a plasma from a gas comprising hydrogen and carbon dioxide, and exposing the metal region to the plasma.
US08435894B2 Depositing tungsten into high aspect ratio features
Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner.
US08435891B2 Converting metal mask to metal-oxide etch stop layer and related semiconductor structure
A method includes providing a semiconductor structure including a plurality of devices; depositing a nitride cap over the semiconductor structure; forming an aluminum mask over the nitride cap, the aluminum mask including a plurality of first openings; converting the aluminum mask to an aluminum oxide etch stop layer; and performing middle-of-line fabrication processing, leaving the aluminum oxide etch stop layer in place. A semiconductor structure includes a plurality of devices on a substrate; a nitride cap over the plurality of devices; an aluminum oxide etch stop layer over the nitride cap; an inter-level dielectric (ILD) over the aluminum oxide etch stop layer; and a plurality of contacts extending through the ILD, the aluminum oxide etch stop layer and the nitride cap to the plurality of devices.
US08435888B2 Semiconductor device and the method of manufacturing the same
A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.
US08435887B2 Copper interconnect formation
Disclosed is a method which includes forming a copper interconnect within a trench or via in a substrate. Forming the copper interconnect includes forming a ruthenium-containing seed layer on a wall of the trench or via; forming a cobalt sacrificial layer on the ruthenium-containing layer before the ruthenium-containing seed layer being exposed to an environment that is oxidizing with respect to the seed layer; and contacting the cobalt sacrificial layer with a copper plating solution, the copper plating solution dissolving the cobalt sacrificial layer and plating out copper on the unoxidized ruthenium-containing seed layer. Alternatively, the ruthenium-containing seed layer may be replaced with platinum, tungsten nitride, titanium nitride or titanium or iridium. Further alternatively, the cobalt sacrificial layer may be replaced by tin, cadmium, copper or manganese.
US08435878B2 Field effect transistor device and fabrication
A method for forming a field effect transistor (FET) device includes forming a dielectric layer on a substrate, forming a first metal layer on the dielectric layer, removing a portion of the first metal layer to expose a portion of the dielectric layer, forming a second metal layer on the dielectric layer and the first metal layer, and removing a portion of the first metal layer and the second metal layer to define a boundary region between a first FET device and a second FET device.
US08435870B2 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes: forming a first and second layers not firmly adhering to each other over a substrate; forming a first semiconductor element layer and a first insulating layer over the second layer; forming a hole reaching the first layer in the first insulating layer; oxidizing the first layer exposed at a bottom of the hole; forming a wiring electrically connected to the first semiconductor element layer over the first insulating layer and in the hole; and separating the first layer and the substrate from the second layer and the first semiconductor element layer and expose the wiring. Further, another method includes providing an anisotropic conductive adhesive between a second semiconductor element layer separated through a manufacturing process similar to the above and the wiring, whereby the first and second semiconductor element layers are electrically connected through the anisotropic conductive adhesive and the wiring.
US08435866B2 Method for manufacturing silicon carbide substrate
At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.
US08435864B2 Process for single and multiple level metal-insulator-metal integration with a single mask
A method of fabricating a MIM capacitor is provided. The method includes providing a substrate including a dielectric layer formed on a first conductive layer and a second conductive layer formed over the dielectric layer, and patterning a mask on the second conductive layer. Exposed portions of the second conductive layer are removed to form an upper plate of a MIM capacitor having edges substantially aligned with respective edges of the mask. The upper plate is undercut so that edges of the upper plate are located under the mask. Exposed portions of the dielectric layer and the first conductive layer are removed using the mask to form a capacitor dielectric layer and a lower plate of the MIM capacitor having edges substantially aligned with respective edges of the mask.
US08435860B2 Trench type semiconductor device and fabrication method for the same
A fabrication method for a trench type semiconductor device includes: forming a first base layer; forming a gate insulating film on a bottom and sidewall surfaces of a trench; forming a gate electrode for filling up into the trench; covering the gate electrode and forming an interlayer insulating film; forming a second base layer on the first base layer; forming a first main electrode layer on the second base layer; forming a first main electrode which passes through the first main electrode layer by applying the interlayer insulating film as a mask, is connected to the second base layer in the bottom surface of a self-aligned contact trench, and is connected to the first main electrode layer of the self-aligned contact trench; forming a second main electrode layer at a back side of the first base layer; and forming a second main electrode at the second main electrode layer.
US08435848B2 PMOS SiGe-last integration process
A process of forming a CMOS integrated circuit including integrating SiGe source/drains in the PMOS transistor after source/drain and LDD implants and anneals. A dual layer hard mask is formed on a polysilicon gate layer. The bottom layer prevents SiGe growth on the polysilicon gate. The top layer protects the bottom layer during source/drain spacer removal. A stress memorization layer may be formed on the integrated circuit prior to a source/drain anneal and removed prior to forming a SiGe blocking layer over the NMOS. SiGe spacers may be formed on the PMOS gate to laterally offset the SiGe recesses.
US08435846B2 Semiconductor devices with raised extensions
Transistor devices and methods of their fabrication are disclosed. In one method, a dummy gate structure is formed on a substrate. Bottom portions of the dummy gate structure are undercut. In addition, stair-shaped, raised source and drain regions are formed on the substrate and within at least one undercut formed by the undercutting. The dummy gate structure is removed and a replacement gate is formed on the substrate.
US08435837B2 Panel based lead frame packaging method and device
A packaged semiconductor die has a preformed lead frame with a central recessed portion, and a plurality of conductive leads. An integrated circuit die has a top surface and a bottom surface opposite thereto, with the top surface having a plurality of bonding pads for electrical connection to the die. The die is positioned in the central recessed portion with the top surface having the bonding pads facing upward, and the bottom surface in contact with the recessed portion. Each of the leads has a top portion and a bottom portion. The leads are spaced apart and insulated from the central recessed portion. A conductive layer is deposited on the top surface of the die and the top portion of the leads and is patterned to electrically connect certain of the bonding pads of the die to certain of the conductive leads. An insulator covers the conductive layer. The present invention also relates to a method of packaging such an integrated circuit die.
US08435835B2 Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
A semiconductor device has a base substrate with first and second opposing surfaces. A first etch-resistant conductive layer is formed over the first surface of the base substrate. A second etch-resistant conductive layer is formed over the second surface of the base substrate. A first semiconductor die has bumps formed over contact pads on an active surface of the first die. The first die is mounted over a first surface of the first conductive layer. An encapsulant is deposited over the first die and base substrate. A portion of the base substrate is removed to form electrically isolated base leads between opposing portions of the first and second conductive layers. A second semiconductor die is mounted over the encapsulant and a second surface of the first conductive layer between the base leads. A height of the base leads is greater than a thickness of the second die.
US08435834B2 Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP
A semiconductor die has a conductive layer including a plurality of trace lines formed over a carrier. The conductive layer includes a plurality of contact pads electrically continuous with the trace lines. A semiconductor die has a plurality of contact pads and bumps formed over the contact pads. A plurality of conductive pillars can be formed over the contact pads of the semiconductor die. The bumps are formed over the conductive pillars. The semiconductor die is mounted to the conductive layer with the bumps directly bonded to an end portion of the trace lines to provide a fine pitch interconnect. An encapsulant is deposited over the semiconductor die and conductive layer. The conductive layer contains wettable material to reduce die shifting during encapsulation. The carrier is removed. An interconnect structure is formed over the encapsulant and semiconductor die. An insulating layer can be formed over the conductive layer.
US08435833B2 Gallium nitride light emitting devices on diamond
Wide bandgap devices are formed on a diamond substrate, such as for light emitting diodes as a replacement for incandescent light bulbs and fluorescent light bulbs. In one embodiment, diodes (or other devices) are formed on diamond in at least two methods. A first method comprises growing a wide bandgap material on diamond and building devices on that grown layer. The second method involves bonding a wide bandgap layer (device or film) onto diamond and building the device onto the bonded layer. These devices may provide significantly higher efficiency than incandescent or fluorescent lights, and provide significantly higher light or energy density than other technologies. Similar methods and structures result in other wide bandgap semiconductor devices.
US08435831B2 Non-volatile storage with metal oxide switching element and methods for fabricating the same
Non-volatile storage elements having a reversible resistivity-switching element and techniques for fabricating the same are disclosed herein. The reversible resistivity-switching element may be formed by depositing an oxygen diffusion resistant material (e.g., heavily doped Si, W, WN) over the top electrode. A trap passivation material (e.g., fluorine, nitrogen, hydrogen, deuterium) may be incorporated into one or more of the bottom electrode, a metal oxide region, or the top electrode of the reversible resistivity-switching element. One embodiment includes a reversible resistivity-switching element having a bi-layer capping layer between the metal oxide and the top electrode. Fabricating the device may include depositing (un-reacted) titanium and depositing titanium oxide in situ without air break. One embodiment includes incorporating titanium into the metal oxide of the reversible resistivity-switching element. The titanium might be implanted into the metal oxide while depositing the metal oxide, or after deposition of the metal oxide.
US08435830B2 Methods of fabricating semiconductor devices
Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
US08435827B2 Programmable resistive memory cell with sacrificial metal
Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. A sacrificial metal is disposed between the electrochemically active electrode and the inert electrode. The sacrificial metal has a more negative standard electrode potential than the filament forming metal.
US08435825B2 Methods for fabrication of nanowall solar cells and optoelectronic devices
A photovoltaic device that includes a substrate and a nanowall structure disposed on the substrate surface. The device also includes at least one layer conformally deposited over the nanowall structure. The conformal layer(s) is at least a portion of a photoactive junction. A method for making a photovoltaic device includes generating a nanowall structure on a substrate surface and conformally depositing at least one layer over the nanowall structure thereby forming at least one photoactive junction. A solar panel includes at least one photovoltaic device based on a nanowall structure. The solar panel isolates such devices from its surrounding atmospheric environment and permits the generation of electrical power. Optoelectronic device may also incorporate a photovoltaic device based on a nanowall structure.
US08435824B2 Backside illumination sensor having a bonding pad structure and method of making the same
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure comprises a device substrate having a front side and a back side; an interconnect structure disposed on the front side of the device substrate; and a bonding pad connected to the interconnect structure. The bonding pad comprises a recessed region in a dielectric material layer; a dielectric mesa of the dielectric material layer interposed between the recessed region; and a metal layer disposed in the recessed region and on the dielectric mesa.
US08435823B2 Solid-state imaging device and method of manufacturing the same
According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.
US08435821B2 Sensor and method for fabricating the same
A sensor and method for fabricating a sensor is disclosed that in one embodiment bonds an etched semiconductor substrate wafer to an etched device wafer comprising a silicon on insulator wafer to create a suspended structure, the flexure of which is determined by an embedded sensing element to measure absolute pressure. Interconnect channels embedded in the sensor facilitate streamlined packaging of the device while accommodating interconnectivity with other devices.
US08435818B2 Method for making light emitting diode
A method of fabricating a light emitting diode includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is located on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer grow in that order on the substrate. An upper electrode is deposited on the second semiconductor layer. The substrate is removed. A lower electrode is deposited on the first semiconductor layer.
US08435816B2 Method for fabricating InGaAlN light emitting device on a combined substrate
One embodiment of the present invention provides a method for fabricating an InGaAlN light-emitting semiconductor structure. During the fabrication process, at least one single-crystal sacrificial layer is deposited on the surface of a base substrate to form a combined substrate, wherein the single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the single crystal layer forms a sacrificial layer. Next, the InGaAlN light-emitting semiconductor structure is fabricated on the combined substrate. The InGaAlN structure fabricated on the combined substrate is then transferred to a support substrate, thereby facilitating a vertical electrode configuration. Transferring the InGaAlN structure involves etching the single-crystal sacrificial layer with a chemical etchant. Furthermore, the InGaAlN and the base substrate are resistant to the chemical etchant. The base substrate can be reused after the InGaAlN structure is transferred.
US08435815B2 Surface-emitting semiconductor laser and manufacturing method thereof
A manufacturing method of a surface-emitting semiconductor laser includes the steps of: forming a stacked structure having a lower-multilayer film reflector including a lower oxidizable layer having at least one layer, an active layer having a light emitting region, an upper-multilayer film reflector including an upper oxidizable layer and an upper layer on a substrate in this order; providing a first groove in the upper layer; and providing a second groove including a portion overlapping the first groove in a planar shape and a portion not overlapping the first groove in the stacked structure.
US08435812B1 Method for making solar cell
A method for making a solar cell includes following steps. A silicon substrate is provided, and the silicon substrate has a first surface and a second surface opposite to the first surface. A patterned mask layer is located on the second surface, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side. A slot is defined between each two adjacent protruding structures to expose a portion of the second surface of the silicon substrate. The exposed portion of the second surface is etched to form a protruding pair. The mask layer is removed. A doped silicon layer is located on the three-dimensional nano-structures. An upper electrode is applied on at least part of a surface of the doped silicon layer. A back electrode is placed on the first surface of the silicon substrate.
US08435808B2 Light emitting diode package and manufacturing method thereof
A method for manufacturing a light emitting diode (LED) package is provided. The method includes preparing a package body including a first lead frame formed with a cavity and inserted on one side of a bottom surface of the cavity and a second lead frame inserted on the other side, mounting an LED chip on the bottom surface and electrically connecting the LED chip with the first lead frame and the second lead frame, forming a molding portion by a molding resin in the cavity, connecting, to the package body, a first mold corresponding to the molding portion and including a through hole having an inner surface linearly or non-linearly inclined, connecting a second mold to an upper surface of the first mold, forming a lens portion on the molding portion by a transparent resin, and separating the first mold and the second mold from the package body.
US08435807B2 Method for manufacturing a solid state laser having a passive Q-switch
A method for manufacturing a laser-active solid having a bonded passive Q-switch is provided. A plane-parallel first wafer plate may be manufactured from a laser-active material. A second plane-parallel wafer plate may be manufactured from a material that is suitable as a passive Q-switch. The first wafer plate and the second wafer plate may be bonded to form a wafer block, which may then be coated on both end faces with a resonator mirror. Subsequently, the wafer block may be separated into multiple passively Q-switched solid state lasers.
US08435806B2 Method for the manufacture of an optoelectronic component and an optoelectronic component
A method is disclosed for the manufacture of an optoelectronic component. A substrate has a first primary face and a second primary face that lies opposite the first primary face. A semiconductor body that is capable of emitting electromagnetic radiation from a front side is attached to the first primary face of the substrate. A covering that is transparent to the radiation from the optoelectronic semiconductor body is applied to at least the front side of the semiconductor body. The covering is given the form of an optical element by using a closed cavity that is shaped with the contour of the optical element.
US08435804B2 Method and apparatus for forming a thin lamina
A method for producing a lamina from a donor body includes implanting the donor body with an ion dosage and separably contacting the donor body with a susceptor assembly, where the donor body and the susceptor assembly are in direct contact. A lamina is exfoliated from the donor body, and a deforming force is applied to the lamina or to the donor body to separate the lamina from the donor body.
US08435802B2 Conductor layout technique to reduce stress-induced void formations
A semiconductor device is prepared by an annealing process to interconnect at least two components of the device by a conductor line surrounded by an insulator material. The annealing process results in formation of residual stresses within the conductor line and the insulator material. A notch is designed in the layout on a selective portion of the mask for patterning conductor line. The existence of a shape of notch on the selective portion generates extra stress components within the conductor line than if without the existence of the notch. The position of the notch is selected so that the extra stress components substantially counteract the residual stresses, thereby causing a net reduction in the residual stresses. The reduction in the residual stresses results in a corresponding mechanical stress migration and therefore improvement in the reliability of the device.
US08435801B2 Methods and compositions for the production of monoclonal antibodies
The present invention comprises compositions and methods for making monoclonal antibodies. The present invention further comprises vectors that replicate the immune system components, particularly an antigen-presenting cell (APC) element of the immune synapse. Additionally, the present invention may further comprise synthetic T-cells.
US08435800B2 Activated labeling reagents and methods for preparing and using the same
The present invention relates in general to labeling reagents useful for labeling biomolecules. In particular, the invention provides activated labeling reagents having the formula L-Ph, wherein L is an activated labeling molecule and Ph is a phenol. The invention further provides methods of preparing the labeling reagents, methods of using the labeling reagents for synthesizing a labeled biomolecule, kits that include reagents for labeling a biomolecule and kits containing labeled biomolecules.
US08435795B2 Evaluating heparin preparations
Methods of evaluating heparin preparations, e.g., for suitability for use as a drug or for use in making a drug, by determining the absence, presence or amount of a structural signature that is indicative of the methods used to make the heparin preparation.
US08435792B2 Methods and compositions for treating bleeding disorders
Aspects of the invention include methods for enhancing blood coagulation in a subject. In practicing methods according to certain embodiments, an amount of a non-anticoagulant sulfated polysaccharide (NASP) is administered to a subject to enhance blood coagulation in the subject. Also provided are methods for preparing a NASP composition having blood coagulation enhancing activity. Compositions and kits for practicing methods of the invention are also described.
US08435791B2 Controlled laser treatment for non-invasive tissue alteration, treatment and diagnostics with minimal collateral damage
A highly controlled and precise system, device and method for tissue and cellular alteration and treatment below or at surfaces with a laser. The present invention is characterized by ultra low levels of collateral damage as defined by physiologically relevant tests that measure tissue viability. The operation of the present invention is based on spectrally confining the interaction between laser energy and a targeted tissue including an essential element for physiologically relevant tests for monitoring tissue viability.
US08435790B2 Methods of modulating lipid concentrations in eukaryotic cells
The present invention is based on the discovery of a set of genes that are involved in lipid-droplet formation and regulation. Accordingly, the present invention provides methods of increasing or decreasing lipid concentrations in eukaryotic cells by decreasing or increasing expression of one of these genes. Increased lipid concentrations may be useful, for example, in the generation of biofuels. Decreased lipid concentration may be useful in the treatment of diseases characterized by excessive lipid storage. In addition, the invention provides methods of identifying markers of diseases characterized by excessive lipid storage.
US08435788B2 Tissue matrices comprising placental stem cells
A method of manufacturing a tissue matrix for implantation into a patient is disclosed. The method sets forth collecting embryonic stem cells from a placenta which has been treated to remove residual cord blood and seeding the collected stem cells onto or into a tissue matrix. The seeded tissue matrix is then implanted on or into a patient. The seeded tissue matrix made by the method of the present invention is also disclosed.
US08435787B2 Alginate polyelectrolyte encapsulation of embryonic stem cells
Alginate polyelectrolyte encapsulation is used for the controlled differentiation of embryonic stem cells. An isolated cell population is provided. The cell population includes a single cell suspension of ES cells encapsulated within an alginate polyelectrolyte microenvironment. The encapsulated ES cells are capable of differentiating within said microenvironment into hepatocyte lineage cells in the absence of embryoid body intermediates or growth factor supplementation.
US08435786B2 Methods of selecting stem cells and uses thereof
A method of selecting stem cells from heterogeneous population of cells is disclosed. The method comprises contacting the population of cells with an apoptosis inducing agent under conditions which are apoptotic to non-stem cells and non-apoptotic to stem cells, thereby selecting the stem cells from the heterogeneous population of cells. The selected stem cells may then be used for a variety of applications including transportation and differentiation.
US08435782B2 Cell culture container and method of producing the same
An object of the present invention is to provide a cell culture chamber with which the survival rate of cells to be cultured can be increased, and a method of producing the same. A cell culture chamber according to the present invention includes a mass of projections formed of a plurality of microprojections 1 formed on a surface on which cells are cultured. The width or diameter of each of the microprojections 1 is in a range of 20 nm to 3 μm, and the aspect ratio of each of the microprojections is in a range of 0.2 to 3.0. Thus, there can be provided a cell culture chamber most suitable for the adhesion and differentiation/proliferation of cells to be cultured.
US08435778B2 Gene encoding lignan methyltransferase and use thereof
The present invention provides an enzyme having an activity of transferring a methyl group to lignans (a lignan methylation activity) (e.g., a protein comprising the amino acid sequence of SEQ ID NO: 2 or variants thereof); a gene encoding the enzyme (e.g., a polynucleotide comprising the nucleotide sequence of SEQ ID NO: 1 or variants thereof); a method for producing methylated lignans using the gene; and so on.
US08435774B2 Enhancing reactivation of thermostable reversibly inactivated enzymes
Disclosed are methods for the enhancement of the reactivation of thermostable reversibly inactivated enzymes comprising reactivating at least one thermostable reversibly inactivated enzyme in the presence of one or more nitrogen containing compounds.
US08435765B2 Polypeptides and biosynthetic pathways for the production of monatin and its precursors
Methods and compositions that can be used to make monatin from glucose, tryptophan, indole-3-lactic acid, indole-3-pyruvate, and 2-hydroxy 2-(indol-3-ylmethyl)-4-keto glutaric acid, are provided. Methods are also disclosed for producing the indole-3-pyruvate and 2-hydroxy 2-(indol-3-ylmethyl)-4-keto glutaric acid intermediates. Compositions provided include nucleic acid molecules, polypeptides, chemical structures, and cells. Methods include in vitro and in vivo processes, and the in vitro methods include chemical reactions.
US08435761B2 DNA encoding antibody molecules which bind human IL-17
The invention relates to antibody molecules having specificity for antigenic determinants of IL-17, therapeutic uses of the antibody molecules and methods of producing the antibody molecules.
US08435760B2 Systems for expression of heterologous proteins in M. capsulatus
The present invention relates to an expression system for the expression of proteins and peptides in a methanotrophic bacterium, preferably M. capsulatus. Further, the invention relates to the exportation and display of said peptides and proteins on the surface of said bacteria. The invention also describes a method for the production of a desired protein in M. capsulatus.
US08435754B2 Method of diagnosing the presence of a tumor in a mammal by assessing CDO expression levels
The present invention provides for a method of using BOC/CDO hedgehog antagonists to inhibit hedgehog signaling, as well as treating and diagnosing disorders relating to hedgehog signaling or overexpression of hedgehog, including cancer, cell proliferative disorders, and angiogenesis, neurological disorders, as well as other conditions affected by hedgehog signaling such as hair growth, neural stem cell differentiation, chondrogenesis and osteogenesis, lung surfactant production, formation of lamellated bodies in lung cells.
US08435746B2 Aldehyde dehydrogenase 1 (ALDH1) as a cancer stem cell marker
The present invention relates to compositions and methods for treating, characterizing, and diagnosing cancer. In particular, the present invention provides a novel stem cell cancer marker, ALDH1, useful for the diagnosis, characterization, and treatment of solid tumor stem cells.
US08435743B2 Cotton event MON 88913 and compositions and methods for detection thereof
The present invention provides a cotton plant event MON 88913 compositions and seed. Also provided are assays for detecting the presence of the cotton plant event MON 88913 based on a DNA sequence and the use of this DNA sequence as a molecular marker in a DNA detection method.
US08435740B2 Method for HLA typing
A method for the identification of DNA sequence elements in complex and highly variable sequences is described. The method consists of identifying a short sequence element of several DNA bases (2-6 bases) at a given position in the genome simultaneously on all parental alleles. The method allows differentiating mini-haplotypes on different alleles in one analysis. The method consists of carrying out an enzymatic primer extension reaction with a combination of extension primers (pool of primers) and analyzing the products by mass spectrometry. The pool of primers is assembled in such a way that the primer extension product allows unambiguous identification of both the primer of the pool that was extended and the base that was added. The method of great utility for DNA sequences harboring many SNP's close to each other with many possible haplotypes. Such sequences are known in the Major Histocompatibility Complex (MHC). This method is particularly well suited for DNA-based HLA typing and in combination with a suitable selection of sites tested, it is superior in ease of operation to conventional HLA typing methods. We have identified sets of these assays for HLA-A, HLA-B, and HLA-DRB 1 that allow unambiguous four-digit HLA of each of these genes with between 11 and 28 queried markers.
US08435738B2 Systems and methods for multi-analysis
Systems and methods are provided for sample processing. A device may be provided, capable of receiving the sample, and performing one or more of a sample preparation, sample assay, and detection step. The device may be capable of performing multiple assays. The device may comprise one or more modules that may be capable of performing one or more of a sample preparation, sample assay, and detection step. The device may be capable of performing the steps using a small volume of sample.
US08435733B2 Screening methods for transfusion related acute lung injury
The invention relates to the discovery that HNA-3a and HNA-3b are antigens within a polypeptide sequence that is highly similar to the CTL2 amino acid sequence. This invention provides methods and kits for screening for HNA-3a and HNA-3b specific antibodies, HNA-3a and HNA-3b polypeptides and HNA-3a and HNA-3b nucleic acids in a sample of a biological tissue intended for transplantation.
US08435728B2 Method of slimming radiation-sensitive material lines in lithographic applications
A method and system for patterning a substrate using a radiation-sensitive material is described. The method and system include forming a layer of radiation-sensitive material on a substrate, exposing the layer of radiation-sensitive material to a pattern of radiation, and then performing a post-exposure bake following the exposing. The imaged layer of radiation-sensitive material is then developed to remove either a region having high radiation exposure or a region having low radiation exposure to form radiation-sensitive material lines. An exposure gradient within the radiation-sensitive material lines is then removed, followed by slimming the radiation-sensitive material lines.
US08435726B2 Method of processing an optical element and an optical element, in particular for a microlithographic projection exposure apparatus
A method of processing an optical element which has a substrate (110) and a layer system (120) applied to the substrate (110), wherein the layer system (120) in a starting condition has a plurality of volume defects (130), wherein the method includes at least partially filling at least one of the volume defects (130) with a filling material (140). Also disclosed is an associated method of manufacturing an optical element.
US08435721B2 Resist underlayer film forming composition and forming method of resist pattern using the same
It is an object to provide a resist underlayer film forming composition having a large selection ratio of a dry etching rate, and having a k value and an n value at a short wavelength such as an ArF excimer laser, both of which exhibit desired values. There is provided a resist underlayer film forming composition containing a polymer obtained by reacting at least a tetracarboxylic dianhydride having an alicyclic structure or an aliphatic structure and a diepoxy compound having two epoxy groups with an organic solvent containing an alcohol-based compound having an OH group, and a solvent.
US08435714B2 Solvent-free emulsion process using acoustic mixing
A process for making toner particles is provided. In embodiments, a suitable process includes melt mixing a resin in the absence of an organic solvent, optionally adding a surfactant to the resin, adding to the resin at least one colorant and other optional toner additives, adding to the resin a basic agent and water to form a mixture, and subjecting the mixture to acoustic mixing at a suitable frequency to form to form an emulsion. A phase inversion may then be performed to create a phase inversed emulsion including a disperse phase comprising molten resin and the optional ingredients of the toner composition, at which time toner-sized droplets may be solidified from the disperse phase into toner particles, which can be recovered for use.
US08435711B2 Toners made from latexes
A toner comprising toner particles which comprise binder resin and colorant, wherein the binder resin is made from latexes which comprise a low molecular weight (LMW) latex of resin particles having a weight average molecular weight (Mw) less than 50,000 and a medium molecular weight (MMW) latex of resin particles having a Mw from 50,000 to 500,000, wherein the glass transition temperature (Tg) of the resin particles of the LMW latex is not greater than 52° C.
US08435707B2 Toner additive comprising carbon-silica dual phase particles
The invention provides a toner composition comprising resin particles, a colorant, and a toner additive, wherein the toner additive comprises carbon-silica dual phase particles, wherein the carbon-silica dual phase particles comprise aggregates of carbon black comprising at least one silicon-containing region, and wherein the carbon-silica dual phase particles are distributed on the surface of the resin particles. The invention also provides a method of preparing the aforesaid toner composition.
US08435705B2 Methods of correcting optical parameters in photomasks
A method of correcting an optical parameter in a photomask is provided. The method includes providing a photomask, exposing the photomask, detecting an aerial image to estimate the photomask, and irradiating gas cluster ion beams to the photomask based on an estimation result to correct the optical parameter in the photomask in relation to the aerial image. The gas cluster ion beams may be irradiated to a front surface of the photomask on which a mask pattern is formed or a rear surface of the photomask on which the mask pattern is not formed.