Document Document Title
US08331528B2 Intraoral x-ray system
An improved intraoral x-ray system that includes a dental tray with the shape of a dental arch and can be positioned within the oral cavity, for accommodating image detectors at the lingual (or, palatal) side of the tray; an image processing system, situated external to said oral cavity, for converting the image data detected by the image detector to a viewable image; a mechanism for transferring the image data to the image processing system; and a display unit for displaying the image.
US08331527B2 X-ray CT apparatus and method for correcting X-ray beam position
An X-ray tube 1 is heated under an X-ray scan condition (tube voltage V, tube current I, exposure time width t) and thus a focal point is shifted. Artifact occurs in a reconstructed image due to the focal point shift. The present invention has an object to enable correction of the focal point shift caused by heating the tube. The applicant and inventor of this application has confirmed that the focal point shift amount of the tube 1 varies in accordance with whether it is in a heating direction or cooling direction when viewed from a past sequence. Therefore, the sequence record and the focal point shift amount based on the heating and cooling directions are stored as data in a storage device 13. A just near past sequence record when viewed from now is stored in a storage unit 16, and the tube temperature is detected by a tube temperature detector 15. On the basis of this temperature and the data in the storage unit 16, heating or cooling and the present accumulated heat capacity are determined in a determining unit 17, and the storage device 13 is accessed to determine a focal point shift amount. The position of the tube is corrected on the basis of this shift amount.
US08331526B2 On-line cone beam CT reconstruction
An in-line 4D cone beam CT reconstruction algorithm queues a limited number of projection images such that the phase determination algorithm can look-ahead. At regular intervals, the queue is scanned and those images which have enough look-ahead to obtain phase information are filtered and back-projected. The algorithm thus keeps up with the image acquisition speed and produces a 4D reconstruction within a few seconds of the end of scanning.
US08331519B2 Frequency detector and phase locked loop having the same
A frequency detector includes an error measurement unit measuring a time interval between zero-crossing points of an input signal that is modulated. An error conversion unit quantizes the measured time interval using one of modulation time intervals. An error calculation unit calculates a frequency error based upon a difference between the measured time interval and the quantized time interval. An error generation control unit controls whether to output the frequency error based upon the quantized time interval, the calculated frequency error, and a predetermined critical value.
US08331517B2 Serial link receiver and method thereof
A method and apparatus of clock recovery is disclosed. The apparatus comprising: a first delay circuit for receiving an input data signal and outputting a delayed data signal; an edge extraction circuit for outputting an edge signal by detecting a transition in the input data signal; an clock generator for generating a first clock signal based on an injection of the edge signal, wherein the first clock signal comprises a plurality of phase signals; a second delay buffer for outputting a second clock signal according to the first clock signal; a sampler for outputting a plurality of samples based on sampling the delayed data signal in accordance with the phase signals; and a decision circuit for generating a decision in accordance with the second clock signal based on the three samples and a previous decision.
US08331512B2 Phase control block for managing multiple clock domains in systems with frequency offsets
A circuit for performing clock recovery according to a received digital signal (30). The circuit includes at least an edge sampler (105) and a data sampler (145) for sampling the digital signal, and a clock signal supply circuit. The clock signal supply circuit provides edge clock (25) and data clock (20) signals offset in phase from one another to the respective clock inputs of the edge sampler (105) and the data sampler (145). The clock signal supply circuit is operable to selectively vary a phase offset between the edge and data clock signals.
US08331507B2 Multi-channel receiver device
A device processes signals from a plurality of signal channels that are received in parallel. A channel processing circuit (12a,b, 14a,b), applies a series of filtering operations selectively to the signal from a first one of the signal channels. A filter management circuit (18) detects a reception condition from reception of a signal in a second one of the signal channels. The filter management circuit (18) controls application of at least a part of said filtering operations to the signal from the first one the signal channels by the channel processing circuit (12a,b, 14a,b), dependent on the detected reception condition. Selected filter operations may be enabled or disabled. Thus, power consumption may be reduced. In an embodiment, the detected reception condition is determined as a by-product of functional reception of another channel. Thus power consumption for the detection of the reception condition is also reduced. From reception of specific types of channels, for example, it may be detected whether the device is indoors or outdoors and filtering of other channels may be adapted accordingly.
US08331506B2 Frequency-dependent IQ imbalance estimation
RF impairment parameters, including frequency-dependent IQ imbalance, are estimated in a wideband received signal on a per-sub-band (or per sub-band pair) basis. In one embodiment, block-type pilot signals are received, such as on SCH, and IQ imbalance and carrier frequency offset are estimated from the block-type pilot signals. The block-type pilot signals may be received in only one sub-band. Data and comb-type pilot signals are then received on all sub-bands. Phase noise and channel coefficients are estimated for the first sub-band, based on the IQ imbalance and carrier frequency offset estimates. IQ imbalance is then successively estimated, on a per-sub-band (or per sub-band pair) basis, based on the comb-type pilot signals, the previously estimated carrier frequency offset estimate, and the phase noise and IQ imbalance estimates from prior sub-bands (or pairs). This may comprise iterative estimation based on decision feedback.
US08331504B2 Method and system for multi-user interference cancellation
Systems and methods for multi-user interference cancellation are provided. In one aspect of the disclosure, an apparatus is provided. The apparatus comprises a processing unit configured to process received chips into received symbols for a plurality of users and a detection unit configured to detect user symbols from the received symbols. The apparatus also comprises an interference cancellation unit configured to compute multi-user interference using the detected user symbols and to remove the computed multi-user interference from the received symbols. The apparatus further comprises a redetection unit configured to redetect user symbols from the received symbols with the computed multi-user interference removed.
US08331503B2 Receiving level control apparatus and receiver
A receiving level control apparatus includes an amplifier to receive a signal and to amplify the signal based on a gain control signal, a memory to store an accumulated level of the amplified signal at every sampling period, and a gain control section to judge whether or not the accumulated level, which has been accumulated from a first time instant, exceeds a first reference value at a predetermined timing, and to control the gain control signal for the amplifier in response to a length of a time period defined from the first time instant up to a second time instant in a case that the accumulated level exceeds the first reference value, the second time instant defined as a time instant when the gain control section judges that the accumulated level exceeds the first reference value.
US08331502B1 Phase-adjusted channel estimation for frequency division multiplexed channels
A method and apparatus for estimating a frequency response of a channel. The method includes adjusting phase components of estimates of the frequency response to provide phase-adjusted estimates; performing a smoothing operation on the phase-adjusted estimates to provide smoothed phase-adjusted estimates; and generating an output of a reverse phase adjustment, wherein the reverse phase adjustment is performed on the smoothed phase-adjusted estimates.
US08331500B2 Transmitting/receiving system and method of processing broadcast signal in transmitting/receiving system
A receiving system and a method of processing broadcast signals in the receiving system are disclosed. The receiving system includes a tuner, a known sequence detector, a carrier recovery unit, and a channel equalizer. The tuner receives a broadcast signal including a data group. Herein, the data group comprises mobile service data, a plurality of known data sequences, and signaling data. One of the plurality of known data sequences comprises a first M symbol sequence and a second M symbol sequence each having a first data pattern. The known sequence detector estimates an initial frequency offset and detects position information of each known data sequence based on the known data sequence having the first data pattern. The carrier recovery unit acquires initial frequency synchronization and performs carrier recovery from the broadcast signal based on the initial frequency offset estimated by the known sequence detector. The channel equalizer performs channel equalization on the broadcast signal based upon the position information of each known data sequence.
US08331498B2 Blind modulation detection
In receiving a radio block comprising a plurality of bursts, burst data is saved prior to demodulating each burst using an independent preliminary modulation technique decision. When a global modulation technique decision over the radio burst is formulated, if the preliminary modulation technique decision for one or more bursts disagrees, data associated with that burst may be retrieved and demodulated using the global modulation technique decision. In one embodiment, the mismatching burst is erased and decoding over the block is attempted, with the second demodulation being performed only if a decoding metric indicates decode errors. In another embodiment, each mismatching block is re-demodulated as soon as a global modulation technique decision is formulated and a mismatch to the preliminary modulation technique decision is detected. In both embodiments, an increase in the number of soft bits improves decoder performance.
US08331492B2 Device and method for determining the deviation of the carrier frequency of a mobile radio device from the carrier frequency of a base station
A device for determination of the frequency discrepancy (105) between a mobile radio and a base station which is transmitting a sequence of symbols, having a unit (6-11) for calculation of terms, with one term being formed from two symbols in the sequence received by the mobile radio, and in which case the phase difference of the two symbols can be determined from the term, a unit (14, 15) for formation of groups from the terms, with one term being assigned to one group on the basis of features of the symbols on which it is based, and a unit (39) for calculation of the discrepancy (105) on the basis of a group.
US08331487B2 Analog signal processor for nonlinear predistortion of radio-frequency signals
RF predistortion apparatus for making linear the output signal of non-linear components such as RF power amplifiers. The apparatus comprises an RF input line for carrying an RF signal connected to an envelope detector for finding the envelope of the RF signal, a power detector for finding the power of the RF signal and a quadrature modulator. The apparatus also comprises a coefficient vector input line for carrying an input signal that carries one or more coefficients to a digitally controlled analog subsystem (DCAS). The DCAS having circuitry for processing both the output of the envelope detector and the output of the power detector by selecting one or more coefficients from the coefficient vector input line for generating a weighted summation of the power of the RF signal and a weighted summation of the envelope voltage of the RF signal that are output to the quadrature modulator. The quadrature modulator has circuitry for mixing the RF input signal with the output of the DCAS to generate a signal for predistorting the RF input signal feeding the power amplifier.
US08331486B1 Transmitter circuit with integrated power control
An integrated circuit device, set forth by way of example and not limitation, includes an IC package provided with a plurality of leads and enclosing: a) a buffer amplifier, b) a switching-mode power amplifier having an input coupled to the output of the buffer amplifier and having an output coupled to at least one of the plurality of leads, and c) a digital controller. A method, set forth by way of example and not limitation, for controlling the power output of a RF transmitter circuit without the need for an attenuator includes developing a signal source, applying the signal source to a buffer amplifier to provide an amplified signal, applying the amplified signal to a switching-mode power amplifier to provide a power output signal, and controlling a gain of the switching-mode power amplifier in response to a digital command.
US08331484B2 Digital Predistortion training system
Techniques are provided herein for training a digital predistortion module in a wireless communication device. At a controller apparatus that is capable of communicating with a plurality of wireless devices, a particular wireless device that requires adjustment of predistortion parameters is identified. The controller also identifies one or more participating wireless devices to participate in a training session during which the particular wireless device makes test transmissions and the one or more participating wireless devices make measurements based on reception of the test transmissions sent by the particular wireless device. The controller apparatus sends commands to the particular wireless device and to the one or more participating wireless devices to initiate the training session. The controller receives measurement data from the one or more participating wireless devices based on reception of the test transmissions from the particular wireless device during the training session. The controller apparatus determines predistortion parameters for use by the particular wireless device based on the measurement data received from the one or more participating wireless devices.
US08331479B2 Method, apparatus, and system for microwave signal correction
A method, an apparatus, and a system are provided in various embodiments of the present invention. According to embodiments of the present invention, the receiver samples the frequency signal from the transmitter to obtain sampling data and obtain the feedback IQ signal from the sampling data, and performs signal correction by using the feedback IQ signal. Sampling the received radio frequency signal does not need an additional component. The receiving channel installed in the receiver can be used to receive the radio frequency signal, which reduces the cost and power consumption.
US08331467B2 Time and frequency channel estimation
A radio channel estimation technique is described for use in a OFDM-based radio communications system. A block of OFDM symbols is transmitted from multiple antennas over multiple sub-carrier frequencies. The block of OFDM symbols includes known pilot symbols as well as data symbols to be determined by a receiver. The pilot symbols are transmitted in a predetermined pattern at periodic times on periodic sub-carriers. A pilot channel estimate is determined for each pilot symbol in the received block of OFDM symbols. An N×M matrix of points corresponding to the received OFDM symbol block is formed. N is the number of sub-carriers and M is the number of OFDM symbols in the OFDM symbol block. The matrix is formed by inserting pilot channel estimates at predetermined positions in the N×M matrix according to the predetermined pilot pattern and inserting zeros in remaining positions in the N×M matrix. A two dimensional inverse Fourier transform of the N×M matrix is calculated resulting in multiple copies of a channel estimate in the time domain. One is selected, and a two dimensional Fourier transform of the selected channel estimate is calculated to obtain a channel estimate at each point in the OFDM block.
US08331465B2 Adaptive two-dimensional channel interpolation
A method and apparatus for improving channel estimation within an OFDM communication system. Channel estimation in OFDM is usually performed with the aid of pilot symbols. The pilot symbols are typically spaced in time and frequency. The set of frequencies and times at which pilot symbols are inserted is referred to as a pilot pattern. In some cases, the pilot pattern is a diagonal-shaped lattice, either regular or irregular. The method first interpolates in the direction of larger coherence (time or frequency). Using these measurements, the density of pilot symbols in the direction of faster change will be increased thereby improving channel estimation without increasing overhead. As such, the results of the first interpolating step can then be used to assist the interpolation in the dimension of smaller coherence (time or frequency).
US08331464B2 Phase shift based precoding method and transceiver for supporting the same
A method of transmitting data using a generalized phase shift based proceding or an extended phase shift precoding scheme in a multiple-antenna system using a plurality of subcarrier and a transceiver for supporting the same are disclosed. A phase shift based precoding matrix may be generalized and determined by a product of a diagonal matrix for phase shift and a unitary matrix for maintaining orthogonality in spatial domain. The diagonal matrix may be extended by a product of a proceding matrix for increasing channel power and the diagonal matrix for phase shift. The design of the transceiver can be simplified or communication efficiency can be improved by generalizing and extending the phase shift based proceding.
US08331460B2 Video sink device
The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.
US08331457B2 Information processing apparatus and method, and recording medium and program used therewith
An information processing apparatus controls an encoder which performs encoding processing on each of data items in access units forming video data while switching encoding types. The apparatus includes a detector which controls the encoder to perform first path encoding on the video data in accordance with first encoding conditions, the first path encoding being included in the encoding processing, and which detects, as information for use in second path encoding being to be performed on the video data and being included in the encoding processing, encoding types and data amounts of data items in the access units forming the resultant first encoded video data obtained by controlling the encoder to perform the first path encoding.
US08331456B2 System and method for audio and visual synchronization
Presented herein is a system, method, and apparatus for audio and video synchronization. In one embodiment, there is presented a method for displaying audio data and video data. The method comprises examining a plurality of portions of the audio data, where each of said plurality of portions of audio data is associated with a time stamp; examining a plurality of portions of the video data, where each of said plurality of portions of the video data is associated with a time stamp; decoding one of the portions of the video data; and decoding one of the portions of the audio data while decoding the one of the portions of the video data. The difference between the time stamp associated with the one of the portions of the video data and the time stamp associated with the one of the portions of the audio data is within a certain margin of error from a predetermined offset.
US08331455B2 Device and method for encoding/decoding video data
A video data encoding/decoding device and method are disclosed. The decoding device includes a syntax parsing unit, storing a plurality of element information, generated by syntax parsing of a bit stream using description information, in an element information storing unit; a connection controlling unit, successively selecting a plurality of functional units by using the description information, and selectively inputting element information predetermined for the selected functional unit of the plurality of element information stored in the element information storing unit; and a processing unit, comprising at least a functional unit performing a process predetermined by using the element information inputted by the connection controlling unit, and outputting corresponding result data. Accordingly, the present invention can decode a bit stream, decoded by various format in accordance with various standards, by using an identical information recognizing method.
US08331453B2 Method for modeling coding information of a video signal to compress/decompress the information
A method and an apparatus of decoding a video signal are provided. The present invention includes the steps of parsing first coding information indicating whether a residual data of an image block in the enhanced layer is predicted from a corresponding block in the base layer, from the bitstream of the enhanced layer, and decoding the video signal based on the first coding information. And, the step of parsing includes the step of performing modeling the first coding information based on second coding information indicating whether prediction information of the corresponding block in the base layer is used to decode the image block in the enhanced layer. Accordingly, the present invention raises efficiency of video signal processing by enabling a decoder to derive information on a prediction mode of a current block in a decoder instead of transferring the information to the decoder.
US08331452B2 Image encoding apparatus, method of controlling therefor, and program
An image encoding apparatus for performing inter-frame encoding of moving image data is provided. The apparatus refers to a block within a frame other than a current frame to generate a first prediction image of a block to be encoded within the current frame, and performs prediction encoding using the first prediction image. The apparatus sets areas at set positions that differ from each other at least between mutually adjacent frames; and determines whether the block to be encoded within the current frame belongs to the area set with respect to the current frame. When the block to be encoded has been determined to belong to the area, the first prediction image is generated, with regard to the block to be encoded, upon referring to a frame that is decodable on its own and, in terms of time, is situated ahead of and closest to the frame to be encoded.
US08331450B2 Methods and systems for image intra-prediction mode management
Embodiments of the present invention relate to methods and systems for ordering, communicating and applying pixel intra-prediction modes.
US08331449B2 Fast encoding method and system using adaptive intra prediction
Fast encoding method and system are provided which can transmit video data in real time using adaptive intra prediction in accordance with the H.264/AVC (Advanced Video Codec) standard so as to efficiently provide security-related images or multimedia images in various network environments with high quality. An intra prediction method of compressing and encoding an image includes the steps of: comparing an SAD value C calculated from macro block data of a present frame and a previous frame with a reference value K to determine a prediction method; and selectively performing on input macro block data a first method of determining a best mode and a block size by prediction in a plurality of prediction modes based on spatial directivity and generating prediction data and a second method of generating prediction data using the best mode and the block size used in the previous frame, depending on the determined prediction method.
US08331448B2 Systems and methods for efficient spatial intra predictabilty determination (or assessment)
Techniques for efficient determination of a macroblock's spatial predictability quality with respect to the H.264 specification are provided. A device comprises a processor operable to estimate a first subset of spatial prediction modes based on a first pixel subset of a current subblock of an intra-frame. The processor is also operable to estimate a second subset of spatial prediction modes based on a second pixel subset of the current subblock. The first subset of prediction modes is different from the second subset of prediction modes.
US08331446B2 Method and device for reordering video information
A method and device that allow picture slices of a video stream to be processed in an order different than the order they were received is disclosed. Information mapping the location of picture slices that are stored in the order they were received is stored to allow subsequent processing to access the picture slice in any order, including render order.
US08331442B2 Optimal rate allocation for a group of channels
The present invention relates generally to systems, methods, and computer program products for optimally allocating a fixed number of bits among a plurality of multi-media data channels. The optimal number of bits is determined by preprocessing each channel to calculate complexity data, and then the complexity data is used to determine the optimal number of bits to assign to each channel. The optimal number of bits may be determined by a closed loop controller in communication with one or more channel encoders, and the multi-media channels may contain video data conforming to the MPEG2 video format.
US08331440B2 Method and apparatus for encoding and/or decoding moving pictures
A method of encoding moving pictures using a plurality of quantization matrices. The method involves selecting one of the plurality of quantization matrices in consideration of an at least one characteristics of an input image; transforming the input image; and quantizing the transformed input image using the selected quantization matrix.
US08331437B2 Coding apparatus, coding method, coding program and recording medium
Searching an optimal quantization step size at high speed when controlling the coding rate of an image sequence. A skip binary search section determines quantization step size Δskip by binary search, using a frame out of every m [0] frames of an image sequence. A quantization step size correcting section determines quantization step size Δa that can achieve the target bit rate R by linear approximation from Δskip, generated bit rate at that time, quantization step size Δlast of the immediately preceding loop and the generated bit rate at that time. A first coding section encodes the every m [1]-th frame of the image sequence with quantization step size Δa and a quantization step size forecasting section determines quantization step size Δe that can achieve the target bit rate R by linear approximation. A second coding section encodes all the frames with the quantization step size Δe.
US08331436B2 Expert system and method for elastic encoding of video according to regions of interest
An elastic expert system for allocating bits according to application domain requirements and network resources. The elastic expert system observes the network resources and determines a state for allocating bits, the state relating to the application domain requirements. The elastic expert system can then allocate bits to a region-of-interest based on the determined state. The elastic expert system also can allocate bits to a background region and an extended region of interest.
US08331435B2 Compression system, program and method
An object is to calculate an accurate motion vector with a small computational effort. To this end, provided is a system for compressing a motion picture generated by projecting objects onto a screen, the objects moving relatively to the screen in a 3D space, the system including: a motion calculating component which calculates a motion vector of the object within the screen by projecting onto the screen a motion of the object in the 3D space between a time corresponding to a compression target frame and a time corresponding to another frame; and a compressing component which compresses the compression target frame by motion compensation based on the motion vector.
US08331430B2 Channel diagnostic systems and methods
A system includes at least one adaptive filter coupled to a first communication channel and at least one other communications channel. The at least one adaptive filter includes at least one set of adaptive filter coefficients. A memory stores at least one predetermined set of filter coefficient thresholds. The filter coefficient thresholds may be indicative of channel faults, channel to channel faults or a length of the channel. A controller is configured to compare the set of filter coefficients to the predetermined set of filter coefficient thresholds. The controller is configured to determine the information about the channels based on compare results.
US08331428B2 Signal transmission apparatus and signal transmission control method
A signal transmission apparatus comprises a first signal transmission section configured to transmit a first signal for performing measurement of characteristics of a transmission line to the transmission line. A reflection characteristic measurement section is configured to measure a reflection characteristic of the transmission line. A pass characteristic measurement section is configured to measure a pass characteristic of the transmission line. A determination section is configured to determine a transmission clock frequency based upon the reflection characteristic. A second signal transmission section is configured to modulate information and to transmit a second signal obtained by the modulation to the transmission line. A second signal receiving section is configured to receive and to demodulate the second signal which has been transmitted by the second signal transmission section and has passed the transmission line.
US08331426B2 Method, system and apparatus for improving throughput performance of space division multiple access system
A method, a system, and an apparatus for improving throughput performance of an SDMA system are disclosed herein. The method includes BTS receiving feedback information sent by a UE, where the feedback information comprises an ID of a preferred beam of the UE in a pre-coding codebook, information related to a channel vector modulus value, and information about phase difference between a channel vector and the preferred beam of the UE, and the BTS using a set estimation algorithm to estimate sum throughputs supported by a current SDMA system in each sending mode according to the received feedback information and information about space correlation between multiple antennas of the BTS, selecting a maximum sum throughput among the estimated sum throughputs, and using the sending mode corresponding to this sum throughput to send data. The method, system, and apparatus provided herein improve transmitting performance of the SDMA system.
US08331425B2 Apparatus, system and method for providing a multiple input/multiple output (MIMO) channel interface
A system, method and apparatus, provide for the utilization of the MIMO technique with single-antenna communication devices that maximize high-speed broadband communication. The apparatus includes a wireless communication interface (WCI) device configured to exchange wireless signals with a base station through a multiple input multiple output (MIMO) air interface and to exchange a corresponding set of wireless signals with an access terminal through a wideband air interface having a greater bandwidth than the bandwidth of the MIMO air interface. The system includes a plurality of WCI devices communicating with the base station and exchanging corresponding signals with the access terminal.
US08331423B2 Relaying apparatus and method in wireless communication system
Provided are an apparatus and a method for providing a relay service in a wireless communication system. The apparatus includes a modulator, an encoder, and a transmission unit. The modulator modulates a transmission signal according to a modulation degree. The encoder encodes a modulation symbol provided from the modulator using a convolution code of a ring domain. The transmission unit transmits the signal provided from the encoder to a relay station. The relay station detects a signal where signals received from different transmission ends are added in a real domain, and relays the detected signal, thereby providing a relay service without an additional time resource.
US08331421B2 Method and system for a delay-locked loop for closely spaced multipath
Aspects of a method and system for a delay-locked loop for closely spaced multipath may include determining a difference signal computed from one or more early energies and one or more late energies associated with one or more channel taps selected from a plurality of channel taps. A fat finger timing may be adjusted based on the difference signal, the fat finger comprising the plurality of channel taps that are spaced contiguously at chip period intervals. The one or more early energies and the one or more late energies may be determined based on an offset of Tc/2 or 3Tc/8, where Tc denotes the chip period interval. The offset may be measured from an energy peak associated with a multipath component that may be associated with the fat finger.
US08331418B2 Communication device and method of communication that provide a silent period for detection and avoidance
A system and method (600) of communication by a wireless device (200) operating according to a first communication protocol in at least a first set of frequency bands (320), provides a silent period for detecting the presence of a second wireless device operating according to a second communication protocol in a second set of frequency bands (310) that at least partially overlaps the first set of frequency bands (320).
US08331416B2 Stripline laser
In a stripline laser, a gas mixture containing carbon dioxide is situated as a laser-active medium between two plate-type electrodes lying with their flat sides opposite one another. The electrodes define a discharge space, at whose end sides lying opposite one another a resonator mirror is respectively arranged. The resonator mirrors form an unstable resonator. To operate the stripline laser in the 9.3 μm band and/or in the 9.6 μm band, the electrodes are provided with a passivation layer on their flat sides. The passivation layer, of at least one electrode, contains silicon dioxide in a region covering a partial area of a flat side. A distance between the electrodes is set such that the attenuation of laser beams in the 10.3 μm band and in the 10.6 μm band is greater than the attenuation of laser beams in the 9.3 μm band and/or in the 9.6 μm band.
US08331414B2 Surface-emitting laser and surface-emitting laser array
A surface-emitting laser includes a surface relief structure provided on an upper multilayer reflector, the surface relief structure including a region of a first laminate, a region of a second laminate that has a larger optical thickness than the first laminate, and a region of a third laminate that has a larger optical thickness than the first laminate and the second laminate.
US08331411B2 Edge-emitting semiconductor laser
The invention relates to an edge-emitting semiconductor laser comprising a semiconductor body (10), which comprises a waveguide region (4), wherein the waveguide region (4) comprises a first waveguide layer (2A), a second waveguide layer (2B) and an active layer (3) arranged between the first waveguide layer (2A) and the second waveguide layer (2B) and serving for generating laser radiation (5), and the waveguide region (4) is arranged between a first cladding layer (1A) and a second cladding layer (1B) disposed downstream of the waveguide region (4) in the growth direction of the semiconductor body (10). The waveguide region (4) has a thickness d of 400 nm or less, and an emission angle of the laser radiation (5) emerging from the semiconductor body (10) in a direction parallel to the layer plane of the active layer (3) and the emission angle of the laser radiation (5) emerging from the semiconductor body (10) in a direction perpendicular to the layer plane of the active layer (3) differ from one another by less than a factor of 3.
US08331410B2 Spontaneous/stimulated light emitting μ-cavity device
A light emitting device with a μ-cavity including a first spacer of single crystal dielectric material and an active area including single crystal erbium dielectric material positioned on the first spacer. The erbium dielectric material and the single crystal dielectric material of the first spacer are substantially crystal lattice matched at their juncture. A second spacer of single crystal dielectric material is positioned on the active area. The erbium dielectric material and the single crystal dielectric material of the second spacer are substantially crystal lattice matched at the second surface. The high-κ erbium dielectric provides a high gain μ-cavity that emits increased amounts of light in either spontaneous or stimulated modes of operation.
US08331408B2 Fiber laser device
The invention relates to a fiber laser device 100. In the preliminary pumping state, the laser light is not output from the seed laser light source 10, the pumping light is output from the pumping light source 10, and the pumping light has such an intensity that the wavelength of the laser light emitted and output from the amplification optical fiber 30 is not converted by the wavelength converter 71. In the output state, the laser light is output from the seed laser light source 10, the pumping light is output from the pumping light source 20, and the laser light and the pumping light have such intensities that the wavelength of the laser light amplified and output by the amplification optical fiber 30 is converted by the wavelength converter 71.
US08331407B2 Apparatus and method for providing white board service in mobile communication system
An apparatus and a method for providing a white board service in a mobile communication system are provided, wherein a bit stream received from a counterpart node is demuxed into data of a logic channel and data of a control channel using a demuxing protocol. The demuxed data is decoded for output.
US08331402B2 Optical transmission device, scrambling method, and descrambling method
A first header-attaching unit attaches to data of a low speed bit rate A, a header of the bit rate A. A second header-attaching unit attaches the header of the bit rate A to data of a high speed bit rate B. A combining unit combines outputs of the first and the second header-attaching units. A low speed scrambling unit performs a scrambling process on combined data by using a clock corresponding to the bit rate A. A high speed scrambling unit performs a scrambling process on the data of the bit rate B by using a clock corresponding to the bit rate B. During a timing corresponding to the bit rate A in the frame, a selector selects an output of the low speed scrambling unit. During a timing corresponding to the bit rate B in the frame, the selector selects an output of the high speed scrambling unit.
US08331397B2 Fast selection of cooperative nodes
The present invention relates to a method, apparatuses, a system, and a computer program product for selecting at least one cooperative node from multiple cooperative nodes (21 to 23) for receiving a signal from a source node (10), wherein at least two stages of a backoff process are provided, in which the candidate cooperative nodes (21 to 23) determine respective backoff numbers according to their channel conditions to the source node (10), wherein the second stage is performed if the first stage was not successful or if a second cooperative node shall be selected.
US08331396B2 Method of congestion management in a wireless mesh network
A method of congestion management in a wireless mesh network in which the CSMA/CA algorithm is used to access wireless medium, said network comprising a first station and at least one neighboring station able to communicate directly with the first station, comprises: —broadcasting (22) an announcement message by the first station to the at least one neighboring station when the first station experiences a congestion in its environment, said announcement message comprising a congestion level parameter, —activating (26) by the neighboring station, at reception of the announcement message, a congestion state in which the minimum size of the time window, called contention window, to access the medium before transmission of a message is strictly greater than the minimum size (CWmin) defined in absence of congestion, said minimum size in congestion state being defined as a function of the congestion level parameter.
US08331394B2 Increasing scheduling request efficiency in a wireless communication system
An apparatus and method for increasing Scheduling Request efficiency in a wireless communication system includes a step 400 of configuring periodic timing opportunities for sending the scheduling request. A next step 402 includes detecting new data arriving in an empty queue to trigger a scheduling request. A next step 406 includes sending a scheduling request at selected SR opportunities until a response to the scheduling request is generated.
US08331393B1 Method and apparatus of de-multiplexing data
Embodiments of the present invention provide a method comprising determining, by a processor, at least an indication of a size of a de-interleaved symbol from a frame within a frame buffer, estimating, by the processor, a target transport channel buffer in a channel buffer for the de-interleaved symbol, and writing, by the processor, the de-interleaved symbol in the channel buffer based on the estimated target transport channel buffer.
US08331390B2 Method and system for compensating asymmetrical delays
A method and a data-transmission system for transmitting data encoded in a signal between a transmitting user and a receiving user of the data-transmission system via a network structure of the data-transmission system. The data encoded in the signal are serially transmitted bit-by-bit in data frames having a defined structure. Each bit of the data encoded in the signal is sampled in the receiving user. Due to the transmission via the network structure, the signal is delayed asymmetrically. To compensate for the asymmetrical delay on the physical layer in the transmission channel, it is provided that the asymmetrical delay of the signal is determined at at least one point in the network structure, and is at least partially compensated prior to the receiving user sampling the bits of the data encoded in the signal. A measuring and compensating device is provided to measure and compensate for the asymmetrical delay.
US08331389B2 Relay device and band controlling method
A relay device has a plurality of input/output modules each having input/output ports, each input/output module including throughput measuring means for measuring throughput of communication packets received from other input/output modules, and throughput limiting means for limiting throughput of communication packets to be transferred to the other input/output modules on the basis of the throughput measured by the throughput measuring means, wherein the relay device transfers communication packets between the input/output modules to relay the communication packets.
US08331386B2 CRC checking and MAC-HS processing in an HSDPA-compatible receiver in a 3G wireless network
In one embodiment, a method for processing a transport block having a MAC-hs protocol data unit (PDU) and a corresponding checksum in an HSDPA-compatible (high-speed downlink packet access) receiver in a 3GPP wireless communication network, the method including: (a) recovering the transport block, (b) performing, substantially in parallel: (i) a cyclic redundancy check (CRC) on the transport block to determine whether the transport block passes or fails, and (ii) MAC (media access control) disassembly to generate a modified MAC-hs PDU, and (c) determining whether to perform reordering-queue distribution and reordering on the modified MAC-hs PDU based on whether the transport block passes or fails. By performing the CRC check and disassembly substantially in parallel, processing efficiencies may be gained.
US08331383B2 Distributed network communication system which selectively provides data to different network destinations
A system and method includes a plurality of wireless and/or wired access points coupled to a network. The network may couple to a wide area network, such as the Internet. In one embodiment, a portable computing device (PCD) may store identification information which uniquely indicates a network provider of a plurality of possible network providers or may also or instead indicate an access or privilege level. When the access point receives the identification information from a PCD, the access point may determine the appropriate network provider for the PCD using the identification information and network access may then be provided. Thus the network system is useable by subscribers of each of the plurality of possible network providers, thereby enabling subscribers to “roam” on various wireless networks. The access information may also include an access level which indicates the user's access or privilege level.
US08331381B2 Providing visibility of Ethernet components to a subnet manager in a converged InfiniBand over Ethernet network
A method of providing visibility of Ethernet components to a subnet manager in a converged InfiniBand over Ethernet (IBOE) network. If a port of an IBOE gateway corresponds to one or more InfiniBand devices, the subnet manager sends fabric management packets (FMPs) to discover the InfiniBand network and assigns physical local identifiers (LIDs) to the InfiniBand devices. If a port of the IBOE gateway corresponds to one or more Ethernet devices, the subnet manager sends FMPs to discover the Ethernet network. The subnet manager adds the Ethernet Media Access Control (MAC) addresses of any responding devices to an LID routing table and assigns LIDs to the Ethernet devices. The subnet manager configures one or more virtual Host Channel Adapters (HCAs) corresponding to the one or more Ethernet MAC addresses in the LID routing table.
US08331375B2 Technology agnostic QoS support in a multi-mode environment
A generic quality of service (QoS) model that is not dependent on network technology is used to support QoS for communication networks utilizing different network technologies. The generic QoS model may include a superset of all QoS parameters for all network technologies being supported, e.g., 3GPP and 3GPP2. An application at a device may specify QoS for a traffic flow based on the generic QoS parameters in the superset. The generic QoS parameters may be converted to QoS parameters that are specific to a serving network. The converted QoS parameters are exchanged with the serving network and are used while exchanging traffic with the serving network.
US08331372B2 Methods, systems, and computer program products for enabling an operative coupling to a network
Methods and systems are described for enabling an operative coupling to a network. In an aspect, first data is detected for forwarding between a first node in a first network and another node by a network relay including a first network interface hardware component operatively coupled to a first network. A determination is made that a second operative coupling to a second network of a second network interface hardware component in the network relay is disabled. The second network interface hardware component is configured to enabled the second operative coupling, in response to the determination. Data received for forwarding between the first network and the second network is forwarded via the enabled second operative coupling.
US08331371B2 Distributed routing architecture
A hierarchical distributed routing architecture including at least three levels, or layers, for receiving, processing and forwarding data packets between network components is provided. The core level router components receive an incoming packet from a network component and identify a distribution level router component based on processing a subset of the destination address associated with the received packet. The distribution level router components receive a forwarded packet and identify a transit level router component based on at least a subset of the destination address associated with the received packet. The transit level router components receive the forwarded packet and forward the packet to a respective network. The mapping of destination addresses to router components of may be managed by a router management component. In some embodiments, mapping of destination address to router components may be based, at least in part, on traffic volumes associated with the mapped destination addresses.
US08331368B2 Method of processing information packets and telecommunication apparatus using the same
A method of processing information packets is disclosed which is adapted for a telecommunication apparatus comprising first processing means, second processing means and memory means. This method comprises the steps of: A) receiving an information packet from a telecommunication network by means of the first processing means; B) checking whether the value of a predetermined characteristic of this packet has already been processed by the second processing means; C) if the check at step B) is negative, checking whether this value has already been stored into the memory means; and D) if the check at step C) is negative, transmitting this value from the first processing means to the memory means and storing this value into the memory means. This method can advantageously be used in a telecommunication apparatus, particularly a layer-2 switch machine.
US08331365B2 Adaptive and scalable QoS architecture for single-bearer multicast/broadcast services
The present invention relates to a method for filtering a multiplexed packet stream in a network entity of the core network or the radio access network of a mobile communication system. The multiplexed packet stream provides a multicast or broadcast service and is delivered from a service center via the network entity to a mobile terminal. Further, the network entity comprises a service manager providing a quality-of-service management function. The invention further relates to a network entity provided with filtering capabilities, as well as to a communication system comprising the network entity. To provide an adaptive multimedia broadcast/multicast service QoS architecture that is scalable to a great number of users the invention suggests providing the service in form of a multiplexed packet stream via a single bearer service an equipping nodes within the distribution tree of the service filter capability allowing to filter the multiplexed stream based on the downlink quality-of-service constraints obtained from a service manager.
US08331364B2 Highly flexible and efficient MAC to PHY interface
A plurality of media access controllers (MACs) are time division multiplexed with one or more serializer/deserializer (SerDes) devices, wherein there are more MACs than SerDes devices and/or a single multi-rate Ethernet MAC is able to communicate with a multi-rate PHY spanning speeds from 10 megabits per second to 10 gigabits per second using the same framing mechanism and structure.
US08331363B2 Method for communication, communication terminal, data forwarding unit, and controller
A first communication terminal attaches information to be used to recognize whether or not header decompression processing is required and to recognize a forwarding route to a second communication terminal, to compressed data obtained through compressing a header of original data destined for the second communication terminal, and sends the compressed data to the network. Upon receipt of the compressed data, a data forwarding unit in a network recognizes, based on the information, whether or not the compressed data requires the header decompression processing and the forwarding route, and sends, if the compressed data does not require the header decompression process, the compressed data to the recognized forwarding route without decompressing the header.
US08331362B2 Methods and apparatus for distributed dynamic network provisioning
In one embodiment, a method includes receiving a device identifier associated with a virtual resource, determining a configuration template identifier based on the device identifier, and selecting a configuration template from a library of configuration templates based on the configuration template identifier. The receiving, determining, and selecting are at a network device. The virtual resource is hosted by a host device. The device identifier is received from the host device.
US08331361B2 Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) are serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID for another device and the fed ID is latched in a register of the device. In a case of no-match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. With reference to device type provided to the interconnected devices, IDs are sequentially generated. The SI containing the DT, the ID and an ID generation command is transmitted in a packet basis to a next device.
US08331358B2 Systems and methods for connecting a packet-based call to a conventional telephone network
Methods and systems are provided for allowing an packet-based call made to a first identifier to dial a phone number within a telephone network. The method comprises sending a data packet from the packet-based call to a gateway device that can communicate with the telephone network. The data packet comprises the first identifier. The gateway device finds the phone number corresponding to the first identifier using a lookup table accessible to the gateway device. The gateway device then dials the phone number and transfers the data packet to the phone number.
US08331354B2 Method and apparatus for allocating application servers in an IMS
A method, application server, and Serving Call/Session Control Function (S-CSCF) for allocating a SIP Application Server to a subscriber in an IP Multimedia Subsystem. A Home Subscriber Server (HSS) identifies for the subscriber, a set of provisioned initial filter criteria, which contains at least one generic SIP Application Server identity. The HSS sends the filter criteria to an S-CSCF allocated to the subscriber. The S-CSCF resolves the generic SIP Application Server identity into a plurality of application server addresses, with one of the addresses being allocated to the subscriber for use in provisioning a service to the subscriber. The S-CSCF caches the address allocated to the subscriber for subsequent use.
US08331351B2 Communicating with session initiation protocol (SIP) application sessions using a message-oriented middleware system
A messaging service communicates with a Session Initiation Protocol (SIP) application session by registering the SIP application session with a messaging server, and then publishing an addressable messaging endpoint corresponding to the SIP application session in response to registering the SIP 15 application session with the messaging server. Consequently, communication with the SIP application session can occur via messages directed to the published addressable messaging endpoint.
US08331346B2 Distributed context-aware scheduled access in a network
A communication system includes devices configured to communicate with each other through a temporal sequence of frames. Each of these frames includes multiple sub-channels and network-context information associated with communication between the devices. For example, network-context information associated with a data packet transmitted by a first device using a first sub-channel during a first frame is included in the first sub-channel. Furthermore, a second device, which communicates with the first device and a third device, arbitrates potential conflicts between the first device and the third device over use of the first sub-channel by providing feedback information to the first device. This feedback information is determined based on the network-context information in multiple frames, which is accumulated by the second device.
US08331343B2 Method for transmitting control signal
There is provided a method of enabling a user equipment to transmit a control signal to a base station. The method includes allocating a control signal to a control region on a subframe comprising the control region for the control signal and a data region for user data, wherein different frequency bands within the control region are allocated to different user equipments, and transmitting the subframe in uplink direction. A control signal can be robustly transmitted under variance of channel condition.
US08331340B2 Call forwarding methods and apparatus for mobile communication devices which operate in WWANS and WLANS
A mobile device operates in a WLAN for VoIP communications, which includes registering with registrar server functionality of a SIP proxy server with a SIP identity which is further communicated to a location server. In response to an incoming voice call from a caller via a telephone network, the mobile device receives an INVITE request which is issued from a gateway and forwarded from the SIP proxy server. The mobile device sends a response to the SIP proxy server which is communicated to the caller via the gateway. When switching from the WLAN to the cellular network, the mobile device sends via the WLAN to the location server a message for forwarding voice calls directed to the SIP identity to the telephone number. The mobile device also sends via the cellular network a message for canceling the forwarding of voice calls directed to telephone number to the SIP identity.
US08331338B2 Emergency calling device for a vehicle
A network-based emergency call device for a vehicle. A first connection between the vehicle and a server is firmly prescribed as a permanent IP connection. This connection is used to send an emergency call, together with the necessary emergency call data to the server. The latter forwards the emergency to all the registered assistance units via further connections directly and without human action. The assistance unit providing assistance is selected automatically by taking the emergency call by an assistance unit. The subsequent setup of a communication link between the assistance unit taking the call and the vehicle involves the use of the already existing IP connection between the vehicle and the server for the communication link which is to be set up. The data to be transmitted and the data rate can also be customized to the current situation of the vehicle and to the surroundings of the vehicle.
US08331332B2 Wireless USB host and channel time allocation method
A wireless universal serial bus (WUSB) host is configured to execute WUSB communication with at least one WUSB device. The WUSB host includes a transmitter, a receiver, an analyzer, an adaptive channel time allocation (CTA) setting unit, and a controller. The transmitter is configured to broadcast an initial control packet to the at least one WUSB device, where the control packet includes CTA information generated for the at least one WUSB device. The receiver is configured to receive a data packet from the at least one WUSB device in a packet receiving period indicated by the CTA information included in the control packet. The analyzer is configured to analyze at least one data packet received by the receiver and to determine whether the data packet has been normally received. The adaptive CTA setting unit is configured to adaptively determine, for each of the at least one WUSB device, an optimal packet receiving period in which the analyzer has determined that the data packet has been normally received, and to set the CTA information generated for the at least one WUSB device based on the optimal packet receiving period. The controller configured to generate a subsequent control packet including the CTA information set by the adaptive CTA setting unit.
US08331328B2 Control and data signaling in SC-FDMA communication systems
Apparatus and method for multiplexing control information bits and data information bits into sub-frame symbols depending on the location of symbols carrying a reference signal (RS), to provide an estimate for the channel medium and enable coherent demodulation for signals carrying information bits. The control information bits include ACK or NAK and/or channel CQI bits. The ACK/NAK bits are placed with priority in symbols around the symbols carrying the RS, to allow for improved accuracy of the channel estimate, followed by the CQI bits when both ACK/NAK and CQI bits exist. Moreover, the sub-frame resources required to achieve the desired reception reliability for the control information depend on the operating conditions and can varied to minimize the associated control overhead.
US08331326B2 Method and apparatus for performing a handover in an evolved universal terrestrial radio access network
A method and an apparatus for performing a handover in an evolved universal terrestrial radio access network (E-UTRAN) are disclosed. A wireless transmit/receive unit (WTRU) sends a measurement report to a source evolved Node B (eNB), and receives a handover command from the source eNB. The WTRU initiates reception and processing of a primary broadcast channel (P-BCH) at the target cell after receiving the handover command. The WTRU then sends a random access preamble to the target eNB, receives a random access response from the target eNB, and sends a handover complete message to the target eNB. The reception and processing of the P-BCH may be initiated immediately after receiving the handover command or after sending the handover complete message. The WTRU may apply default configuration or source cell configuration in the target cell until a target cell SFN and/or P-BCH information are acquired.
US08331325B2 Data processing method and device
A data processing method is provided for forwarding data in the case of handover between heterogeneous networks. The data processing method includes: when a user equipment (UE) is handed over from an originating network to a target network, receiving, by the originating network, a data forwarding address obtained by the target network; creating a data forwarding tunnel between an originating network gateway and a target network gateway according to the data forwarding address; and forwarding data to the target network through the data forwarding tunnel. A data processing device is also provided. The lossless data processing solution can overcome the problem of data loss in the case of handover between heterogeneous networks in the existing technology, reduces the time of user service interruption and enhances the user experience.
US08331322B2 Method of handling radio bearer resumption, wireless communication device and wireless communication system thereof
A method of handling radio bearer resumption is illustrated in an exemplary embodiment of the present invention to prevent the transmission stall and the reception on the suspended signaling radio bearer and the suspended data radio bearers. First the wireless communication device receives the connection reconfiguration message including the handover message. Second the wireless communication device determines whether the received connection reconfiguration message including the handover message is the first received connection reconfiguration message including the handover message after a successful completion of a connection re-establishment procedure. Third, the wireless communication device resumes at least one of the suspended signaling radio bearer and the suspended data radio bearers when the received connection reconfiguration message including the handover message is the first received connection reconfiguration message including the handover message after the successful completion of the connection re-establishment procedure.
US08331319B2 Optimizing handovers in a communication network
Systems, methods, and software are provided to manage a handover of a mobile communication device from a source base station to a target base station. In an embodiment, a method comprises exchanging wireless communications between a plurality of mobile communication devices and a first base station system, processing the communications to determine a plurality of mobility profiles associated with the plurality of mobile communication devices served by the first base station system. A handover request to handover a mobile communication device from a second base station system to the first base station system is received. The plurality of mobility profiles are processed to select a candidate mobile communication device from the plurality of mobile communication devices. A handover of the candidate mobile communication device is initiated from the first base station system to a target base station system.
US08331315B2 Media independent handover for smart phone architecture
A wireless transmit/receive unit (WTRU) may include two or more modems, each configured to link to a different network, and a media independent handover (MIH) client. An application programming interfaces (API) may provide the MIH client with mechanisms to receive information about links, control the modems for handover, discover a MIH server and IP multimedia system nodes, trigger mobile IP handover, etc. If a link has been successfully established, the MIH client may start a MIH session. When the modem indicates that a connection is going to be terminated, the MIH client may activate the second modem for handover. If the first modem indicates that a link parameter has crossed a threshold, the MIH client may send signal measurements to a MIH server. After receiving a media independent handover switch request, the MIH client may initiate handover to the second network.
US08331314B2 Dormant session management associated with handover
Systems and methods according to these exemplary embodiments provide for selectively transmitting a pre-registration, re-registration or de-registration initiation message associated with handing off user equipment between different access systems, e.g., a long term evolution (LTE) system and a high rate packet data (HRPD) system, to reduce dormant sessions. The decision to selectively transmit initiation messages is typically performed by a dormant session management function (DSMF).
US08331313B2 Efficient media independent handover protocol operation enhancements
The present invention modifies existing media independent handover (MIH) function (MIHF) frame format as defined by the IEEE 802.21 standard. In one embodiment, the variable load of the MIHF frame is modified to eliminate the MIHF variable header by defining the MIHF identification (ID) field and the session ID field as fixed fields in the MIHF fixed header. Thus, the MIHF variable load is only made up of the MIHF payload. In another embodiment, a field such as an information element (IE), a header, or MIH service data such as a command or an event, is represented by a type field, a length field and a value field (TLV). The length of the value field is exactly 128 octets, and the length field only occupies one octet.
US08331311B2 Distributed channel hopping method in wireless ad-hoc network
A distributed channel hopping communication method in a low power wireless ad-hoc network. A beacon transmission and reception scheduling method using a distributed channel hopping method in a wireless ad-hoc network, the method includes: transmitting beacons using channel hopping, before establishing the wireless ad-hoc network including a plurality of nodes having a BP including at least one time slot, and receiving beacons of a plurality of neighboring nodes of each of the plurality of nodes; collecting information about the wireless ad-hoc network and information about the plurality of neighboring nodes from the received beacons; scheduling the receiving of the beacons that are transmitted from the plurality of neighboring nodes in the BP, using TDMA in each of the at least one time slot based on the information about the plurality of neighboring nodes; and scheduling transmitting of a beacon in each of the at least one time slot.
US08331308B1 Systems and methods for network MIMO
Multiple-Input Multiple-Output (MIMO) systems and methods are provided for enabling network MIMO among base stations (BSs) and a mobile station (MS). A BS configure a network MIMO zone based on an indication of at least one other BS eligible for network MIMO. The network MIMO zone is defined by resources having at least time and frequency dimensions allocated for master transmission under control of the BS, or slave transmission under control of the other BS eligible for network MIMO. The BS can transmit data on the network MIMO zone to the MS. Where there is no data to transmit to the MS, the BS may transmit data on the network MIMO zone to another MS. To configure the network MIMO zone, the BS may look up in a table combinations of the eligible BSs associated with the indication.
US08331307B2 Method of physical resource management in a wideband communication system
In a wideband communication system including a transmitter and a plurality of mobile terminals (MT) that have maximum reception bandwidths, respectively, a Shared Control Channel (SCCH) for each MT is mapped so that physical channel symbols from the corresponding Physical Shared Control Channels (PSCCH) are confined to a block of consecutive sub-carriers defined by a smallest one of the maximum reception bandwidths.
US08331306B2 Method and system for setting up a bearer
Method and system for setting up a bearer are disclosed. The bearer setup method includes these steps: a packet data network gateway (PGW) obtains first quality of service (QoS) information and a first bearer identifier (ID), and sets up a bearer between the PGW and a radio access network (RAN) according to the first QoS information, where the bearer is associated with the first bearer ID; the RAN sets up a radio bearer (RB) with a user equipment (UE) according to second QoS information associated with the first QoS information, where the RB is associated with a second bearer ID associated with the first bearer ID.
US08331303B2 Adaptive wireless network
Systems, methods, and devices are provided for an adaptive wireless network. A wireless network device for an adaptive wireless network can include an application specific integrated circuit (ASIC) including logic and memory resources coupled to the ASIC. The logic can store information received from a number of clients associated with the wireless network device regarding capabilities of the number of clients in the memory resources. The logic can adapt a guard interval and/or a channel width for transmission of a data stream according to capabilities of a number of clients associated with the wireless network device.
US08331301B2 Communication control method, mobile station and base station
The disclosed mobile station includes: a CAZAC code generation unit configured to generate CAZAC code according to a CAZAC sequence number reported from the base station; a cyclic shift unit configured to cyclically shift each symbol of the CAZAC code based on a cyclic shift number reported from the base station, and a block spreading unit that operates with the cyclic shift unit or operates instead of the cyclic shift unit, and that performs block spreading processing for the CAZAC code according to a block spreading number reported from the base station.
US08331298B2 Structure and construction method of uplink control channel in mobile wideband wireless access system
The present invention relates to an uplink control channel configuration in a mobile wideband wireless access system, and an allocation method thereof. An uplink control channel includes a long cyclic prefix used to improve interference and distortion caused by multipath transmission characteristics of an initial ranging or handover ranging signal and a periodic ranging or band request ranging signal. In addition, a short orthogonal frequency division multiple (OFDM) symbol is used to transmit uplink control information when one terminal exists or the number of terminals is small.
US08331292B2 Method for mapping control channels
A method for mapping control channels is discussed. This mapping method according to an embodiment includes calculating a control channel mapping start time of each cell according to the number of control channel groups allocated to each cell, and performing mapping of repetition of the control channel at intervals of a predetermined distance in order to acquire a diversity gain, wherein the mapping begins from the control channel mapping start time. In this case, control channels of several groups are transmitted in each cell. Thus, a resource allocation method during transmission of control channels (e.g., PHICH and PCFICH) is improved such that interference between neighboring cells can be reduced, resulting in the improvement of a control channel throughput.
US08331290B2 Method and apparatus for delivery notification of non-access stratum retransmission
A method and apparatus for data delivery confirmation in a wireless transmit receive unit (WTRU) including transmitting an uplink (UL) message, performing a mobility operation, determining that the UL message is not acknowledged, and generating a delivery failure message. The mobility operation is a handover or a radio resource control (RRC) connection reestablishment. A message including the delivery failure message is passed between protocol layers.
US08331287B2 Method and system for managing mobility in a mobile communication system using mobile internet protocol
A method is provided for managing mobility of an Access Terminal (AT) in a mobile communication system using a Mobile Internet Protocol (MIP). The method includes generating, by an AT that has entered a new network, a Security Parameter Index (SPI) and a security key for mutual authentication with a Home Agent (HA) of the new network, sending, by the AT, a registration request message including authentication information including the SPI, the authentication information being generated using the security key, upon receipt of the registration request message, searching, by the HA, a database for the SPI included in the authentication information, verifying the authentication information according to the search result, upon successful verification of the authentication information, generating, by the HA, mobility binding information of the AT, and sending, by the HA, a registration response message including the HA's IP address.
US08331286B2 Method and apparatus for efficient selection and acquisition of systems utilizing OFDM or SC-FDM
Techniques for performing system selection and acquisition are described. In one design, a terminal may obtain at least one system record for at least one system utilizing orthogonal frequency division multiplexing (OFDM) or single-carrier frequency division multiplexing (SC-FDM). Each system record may include system identification information for an associated system and an index for an associated acquisition record. The terminal may also obtain at least one acquisition record for the at least one system. Each acquisition record may include at least one value for at least one configurable system parameter, e.g., FFT size, cyclic prefix length, number of guard subcarriers, etc. The terminal may perform acquisition for the at least one system in accordance with the at least one system record and the at least one acquisition record. The system and acquisition records may be stored in a Preferred Roaming List (PRL) or a Most Recently Used (MRU) list.
US08331282B2 Apparatus and method for adaptive channel hopping in mesh networks
Various embodiments provide an apparatus and method for adaptive channel hopping in a mesh network. An example embodiment is configured to divide a time period into a plurality of frames; subdivide each of the plurality of frames into a plurality of slots, each of the plurality of slots providing a time segment for local data communication between nodes in a mesh network; enable a first node to dynamically assign itself a first channel for local data communication, the first node using the first channel to receive data communications destined for the first node; and communicate to other nodes of the mesh network information indicative of the first node's dynamic assignment of the first channel.
US08331281B2 Link supportability in a WCDMA communications system
A method, computer program product, and system are provided for computing link supportability in a WCDMA communications system. For example, the method can be used to calculate link supportability of a transponder in satellite communications system (e.g. MUOS) in a user-to-base direction. This method can include expressing a carrier signal to noise ratio spectral density for a communication link of interest in terms of a transponder input power of the communication link of interest, a spectral overlap factor representative of one or more interfering communication links, and a transponder input power of the one or more interfering communication links. Assumptions and approximations can be made to simplify the spectral density expression in order to reduce a dimensionality of terms used in the computation of the expression. As such, in reducing dimensionality, the expression becomes a manageable computation for WCDMA communication systems to evaluate.
US08331280B2 Method, apparatus and computer program for relay selection
First are determined which relays are available between at least one source and at least one destination, and from them are selected a subset of those relays for an activation interval under a constraint of equal transmit energy per selected relay across the activation interval. A matrix is formed, using CSI received from the relays, to evaluate each effective channel between source and destination that goes through each of the relays, including multi-relay hops, and the relays are selected from that matrix. Utility of source-relay pairing is evaluated in view of the relay-destination channel and the pairing enables relays to multiplex multiple sources where feasible.
US08331279B2 Wireless telecommunications method and apparatus
A multiprocessor system used in a car, home, or office environment includes multiple processors that run different real-time applications. A dynamic configuration system runs on the multiple processors and includes a device manager, configuration manager, and data manager. The device manager automatically detects and adds new devices to the multiprocessor system, and the configuration manager automatically reconfigures which processors run the real-time applications. The data manager identifies the type of data generated by the new devices and identifies which devices in the multiprocessor system are able to process the data.
US08331277B2 Method of delivering multicast packets in a mesh network
In a mesh network, when a wireless mesh link exists between a first mesh access point and a second mesh access point, the first mesh access point can deliver a multicast packet to the second mesh access point through the wireless mesh link. When the second mesh access point determines that the multicast packet from the first mesh access point is a redundant packet, the second mesh access point will send a multi-path notice to the first mesh access point. After receiving the multi-path notice, the first mesh access point stops delivering the multicast packet through the path.
US08331275B2 Apparatus and method for proxying powered off interfaces using the active interface
An apparatus comprising a mobile node (MN) comprising a first radio interface and at least one second radio interface, wherein a point of service (PoS) is configured to communicate with the MN via the first radio interface to proxy the second interface, and wherein the first interface is an active interface and the second interface is a powered off interface. Also included is an apparatus comprising at least one processor configured to implement a method comprising setting an interface between a MN and a network in a powered off mode, tracking the mobility of the MN on behalf of the network when the interface is powered off, and waking up the interface when a call arrives in the network for the interface.
US08331274B2 Waking up a VoIP terminal device from a power-saving state
A VoIP terminal device is configured to enter a power-saving state upon the occurrence of a specified condition. The VoIP terminal device is further configured to wake up from the power-saving state when a communication associated with a specified communication operation is received by the VoIP terminal device. In particular, the operating power of the VoIP terminal device is increased to an extent sufficient to perform the specified communication operation.
US08331273B2 Communication methods employed in communication system associated with programmable communication protocols, and related transmitting methods, receiving methods and communication device
A communication method employed in a wireless communication system including a first communication device and a second communication device is provided. The communication method includes: setting up a connection between the first and second communication devices; after the connection is set up, checking if both the first and second communication devices provide a symbol mapping function for converting a first modulation/demodulation to a second modulation/demodulation different from the first modulation/demodulation; and when both the first and second communication devices provide the symbol mapping function, using the second modulation/demodulation to replace the first modulation/demodulation so that each of the first and second communication devices communicates with each other by using the second modulation/demodulation.
US08331271B2 Relay station and wireless communication system using the same
A relay station, method and system operated in a frequency division duplex (FDD) are disclosed. The relay station is operated in a band switching FDD mode and/or a dual band transmit (Tx)/receive (Rx) mode. In the band switching FDD mode, Tx frequency and Rx frequency are switched. In the dual band Tx/Rx mode, concurrent transmission or concurrent reception is achieved in the Tx frequency and Rx frequency.
US08331269B2 Method and device for transmitting voice in wireless system
Embodiments of the present invention provide a method and device for transmitting voice in a wireless system. The method includes: identifying, by a transmitter, each original voice encoding packet needed to be sent out with a number indicating playback order, and performing channel encoding on each identified original voice encoding packet to construct a voice session packet; establishing a voice session or voice data mixed session between the transmitter and a receiver; allocating a channel dynamically for the voice session or the voice data mixed session; sending, by the transmitter, newly-arrived voice session packets, delayed voice session packets, voice session packets needed to be re-transmitted, data session packets and control command packets according to pre-configured priority; receiving and detecting, by the receiver, the voice session packets, sending an NACK packet comprising number of a lost voice session packet to the transmitter to inform the transmitter to re-transmit the voice session packet, if it is confirmed that the voice session packet is lost; and putting voice session packets properly received into a jitter buffer controller at the receiver if the receiver is a terminal. In embodiments of the present invention, spectral efficiency and reliability of real-time voice services in a wireless multi-service transmission system may be improved while satisfying the Quality of Service (QoS) requirements of real-time services, such as voice service.
US08331267B2 System and method for determining an optimal backbone for robotic relay networks
A system and method for determining an optimal backbone for a robotic relay network are provided. A robotic relay network comprising a plurality of nodes including a base station node, one or more mobile relay nodes, and one or more user nodes is provided. A signal strength value for each pair-wise communication link between each of the nodes is identified. A weight function is applied to each communication link value to determine a communication link weight. An optimal backbone tree is determined from the communication link weights.
US08331262B2 Apparatus and method for setup of optimum route using tree-topology
A method for relaying a route request RREQ message by an intermediate node which is connected with at least one node using a tree topology in a mobile communication system including a destination node and a source node which sends the RREQ message to the destination node via at least one intermediate node, to thus establish an optimal route for communications. The RREQ message is received along the route other than the tree route, and the first information is updated using its information. The intermediate node relays to a next intermediate node the RREQ message containing the updated first information.
US08331256B2 Method of measuring cell in wireless communication system
A method includes receiving priority information on priority for different frequency or a Radio Access Technology (RAT), measuring a serving cell periodically, measuring different frequency or RAT with higher priority than the serving cell, and suspending the measurement of different frequency or RAT with the higher priority during a certain time period when a measurement result of the different frequency or RAT with higher priority is lower than a reference value.
US08331248B2 System and method for dynamic resource allocation in wireless communications networks
System and method for dynamic resource allocation in wireless communications networks. A method for dynamically allocating resources of a contention channel comprises computing an expected delay for a transmission made by a user over the contention channel, determining a target probability of collision from the expected delay, computing an allocation of resources of the contention channel using the target probability of collision, and allocating resources of the contention channel using the computed allocation of resources.
US08331247B2 Method for code channel allocation and method for multiuser detection in a wireless communication system
The present invention discloses a method for code channel allocation and related multiuser detection in a wireless communication system. The method for code channel allocation includes: establishing a relation between at least one channel estimation window and a channelization code, wherein the at least one channel estimation window corresponding to the channelization code includes the channel estimation windows corresponding to all the spread spectrum code branches of a node in which the channelization code exists; and performing code channel allocation according to the relation established. In the method for code channel allocation of the invention, there exists a one-to-many relation between the channelization code/channelization code number established and the at least one channel estimation window. Therefore, during the multiuser detection, the channelization code/channelization code number determined via the at least one channel estimation window activated is unique. Thereby, the efficiency of the multiuser detection process may be increased.
US08331244B1 System and method for propagating TDM fault information through a packet network
A communication system for propagating time division multiplexing (TDM) fault notifications has a first interworking function (IWF) of a packet network and a second IWF of the packet network. The second IWF detects a TDM fault of a TDM network and transmits continuity check messages (CCMs) to the first IWF. Further, the second IWF controls the CCMs in response to a detection of the TDM fault such that a TDM fault notification is propagated from the second IWF to the first IWF based on the CCMs, and the first IWF propagates the TDM fault notification to a second TDM node via a TDM signal.
US08331243B2 Multi-protocol support over Ethernet packet-switched networks
Described are methods and communications network for carrying pseudowires over packet-switched network. A communication network includes a packet-switched network (PSN), a first provider edge (PE) device in communication with a second PE device through the PSN, and a pseudowire (PW) established between the PE devices for emulating a service across the PSN. The PW has a Virtual Circuit Connection Verification (VCCV) control channel that carries an Ethernet Operations, Administration, and Maintenance (OAM) message. In some embodiments, various data plane encapsulation formats enable a PW to emulate an Ethernet or a non-Ethernet service over an Ethernet PSN. Each encapsulation format includes an Ethernet tunnel header and a PW header that encapsulates an Ethernet or non-Ethernet payload.
US08331239B2 Network system and data transfer method
Upon communication nodes receiving data that is a transfer target, based on a link value corresponding to a communication quality of each communication node that has transferred the data and radio wave strength among the communication nodes, a network system calculates a total link value that indicates a quality of a communication path that is used to transfer the data. The network system determines whether the calculated total link value is greater than or equal to a threshold value and based on a determination result, transfers the data to a destination communication node.
US08331232B2 Method and apparatus for improving data transmission in router fabric cards through pseudo-synchronous data switching
In a data packet router, a router fabric card for routing data packets is provided. The router fabric card comprises a plurality of ingress/egress ports, the ports connected through a switching facility for switching connection states of the port paths between individual ingress paths and individual egress paths on the fabric card, and a scheduling component for scheduling communication between ports on the fabric card. Data coming into ingress on the card is organized into individual data-packet trains, each individual train comprising data packets and inserted data denoting a starting point and an ending point of a train. The switching facility recognizes the start data and the end data of a train and switches port paths to a next-assigned connection state accordingly.
US08331231B2 System and method for monitoring bursting traffic
A system and method for monitoring bursting traffic of a user. CIR tokens are incremented at a first rate. EIR tokens are incremented at a second rate. At bit is received for communication through a user network interface. A determination is made whether there are EIR tokens in response to a determination that there are no CIR tokens. The EIR tokens are decremented in response to a determination that there are EIR tokens. The bit is communicated through a network in response to the determination that there are EIR tokens.
US08331229B1 Policy-enabled dynamic deep packet inspection for telecommunications networks
A method for packet filtering can include establishing at least one policy in a centralized policy management framework (PMF), wherein the policy includes at least one policy condition, monitoring data traffic, determining if the data traffic at least substantially meets one of the policy conditions, sending a trigger to the PMF, if at least one of the policy conditions is at least substantially met, generating an enforcement decision at the PMF, wherein the enforcement decision includes at least one enforcement action, sending the enforcement decision to an enforcement function, and enforcing the enforcement decision. A policy-enabled deep packet inspection system also is disclosed.
US08331227B2 Determining link failure within a network
Methods and systems for determining link failure in a network are provided. According to one embodiment, multiple paths are provided between each pair of multi-path load balancing (MPLB) components within a Layer 2 network by establishing overlapping loop-free topologies in which each MPLB component is reachable by any other via each loop-free topology. A first MPLB component sends latency requests to a second MPLB component via a particular path. Responsive thereto, the first MPLB component receives latency responses. Based on timestamp information in the latency responses, an estimated latency between the first and second MPLB components is determined. A link failure timeout period is derived based upon the estimated latency. An additional latency request is sent. If an additional latency response is not received by the first MPLB component prior to expiration of the link failure timeout period, then it is concluded that a link failure has occurred.
US08331218B2 Communicating non-coherent detectable signal in broadband wireless access system
The present invention relates to allocating a radio resource in a wireless communication system utilizing orthogonal frequency division multiplexing (OFDM). Preferably, the present invention comprises receiving in a mobile station data associated with a radio resource allocation map from a base station, wherein the radio allocation map comprises control parameters for transmitting an uplink channel, wherein the uplink channel comprises at least one OFDM tile comprising a first set of subcarriers associated with representing at least part of an n-bit data payload, and a second set of subcarriers associated with representing at least part of a non-pilot m-bit data payload wherein each subcarrier carries a modulated data, and the first and the second set of subcarriers are exclusive to each other, and transmitting the uplink channel from the mobile station to the base station.
US08331213B2 Information recording medium, information reproducing device and method, and apparatus and method for manufacturing information recording medium
An information recording medium (100) is provided with (i) a first information recording area wherein a first track for reproducing first information based on a first track pitch is formed by a laser beam, and (ii) a second information recording area wherein a second track for reproducing second information based on a second track pitch different from the first track pitch is formed by a laser beam. The groove shape of the first track is different from the groove shape of the second track.
US08331207B2 Optical pickup and optical disc unit
For use with a multi-layer optical disc, an optical pickup can eliminate a problem of causing a focus error signal and a tracking error signal to fluctuate due to interference of a signal light beam with a return light beam from another recording surface of a multi-layer optical disc during reproduction with an optical pickup that produces a tracking error signal and a focus error signal from a difference signal based on polarized reflected light.
US08331206B1 Calibration based DC coupled analog front end for optical storage system
In an apparatus for conditioning a signal from an optical pickup unit (OPU), a single-ended channel includes a first signal processing block to calibrate a dark level of a single-ended signal corresponding to a single-ended output of the OPU, if any, and to center the single-ended signal. A dual-ended channel includes a second signal processing block to calibrate a dark level of a dual-ended signal corresponding to a dual-ended output of the OPU, if any, and to center the dual-ended signal. A multiplexer selects one of the single-ended channel and the dual-ended channel, and outputs a selected signal. A digital signal processing stage converts the selected signal to a digital signal.
US08331202B2 Modular horological movement
The present invention relates to a timepiece movement allowing the arrangement of the various displays to be varied. The movement according to the invention comprises a first module provided both with a first frame and with at least one first wheel assembly mounted rotatably on the first frame, a second module provided both with a second frame and with at least one second wheel assembly mounted rotatably on the second frame, which first and second wheel assemblies are connected kinematically together, positioning means, and, connected to the first and second frames, means for fixing the modules to each other. The positioning means are positioned concentrically with the axis of rotation of either the first or second wheel assembly and are arranged so as to allow relative positioning of the two modules in a plurality of angular positions with reference to the axis of rotation of the wheel assembly with which the positioning means are concentric. According to the invention, either the first or second module is a going-train module (80) comprising a going train and an escape wheel (86), and one of the different wheel assemblies of the going train or the escape wheel (86) may form either the first or said second wheel assembly, while the other of said first and second modules is an escapement-supporting module (87) comprising a lever (89) which may form the other of said two wheel assemblies.
US08331201B1 Leap second and daylight saving time correction for use in a radio controlled clock receiver
A novel and useful system and method for leap second and daylight saving time (DST) correction for use in a radio controlled clock (RCC) receiver. The RCC receiver extracts schedule information from the frame, including the time for the DST transition and whether a leap second needs to be added at the end of this half-year. Linear error correcting coding is used for the leap second and the DST on/off indications, while non-linear error correcting coding (e.g., a look up table) is used for the DST schedule to enhance reception reliability in the presence of noise and interference. The one second/one hour corrections are scheduled to occur when they should take place and the correction is applied exactly when DST or leap second is to go into effect, without having to receive anything around the time of the correction.
US08331197B2 Beam forming system and method
A beam forming system includes one or more beam forming elements that are arranged to provide a non-planar doubly ruled radiation surface. The surface is defined by two families of rulings such that the length of the rulings within each family are configured to provide a radiation surface with substantially straight boundary edges, and the beam forming system is arranged to form acoustic beams.
US08331194B1 Underwater acoustic waveguide
A system and method for generating an underwater acoustic waveguide suitable for guiding acoustic energy between a source and a receiver to enable underwater communications. Electrolysis of water by electrically powered terminals continuously creates a bubble field having a volume fraction of less than 0.01% gas. The bubble field has a lower sound speed than the surrounding water, resulting in the bubble field acting as a waveguide to transmit sound over the length of the bubble field. By maintaining small bubble radii, the bubble field can be stable for long periods of time. By keeping the volume fraction and bubble radii small, the power requirements for the terminals are minimized.
US08331193B2 Light control system
A lighting system comprising a lamp arranged to transform electricity into a light beam having properties such as intensity, color, color temperature, direction and beam cone angle; a light control means arranged to adjust said light beam properties; an ultrasonic transmitter arranged to transmit ultrasonic signals; an ultrasonic receiver arranged to receive reflected ultrasonic signals; wherein said ultrasonic transmitter and/or receiver are mounted on a rotatable carrier, wherein driving means are present to rotate said carrier; and a processing means arranged to send an ultrasonic pulse repeatedly through said transmitter during rotation at a multitude of angular positions of said carrier and to determine after each pulse is sent if said receiver receives a reflected ultrasonic signal with an amplitude exceeding a predetermined threshold within a predetermined period, and to send control signals to said light control means in dependence of said determination.
US08331187B2 Memory with low power mode for write
The present invention describes circuitry and a method of providing a low power WRITE mode of operation for an integrated circuit comprising an SRAM memory to provide a reduced IDDQ relative to the IDDQ of a full active mode. In one aspect, the circuitry includes an SRAM memory array, mode control circuitry coupled to the array and configured to alter a supply voltage level to the SRAM array based on a mode of operation. The circuitry also includes control inputs coupled to the mode control circuitry for selecting one of the low power write mode, the full active mode, and optionally a retention mode of operation. The mode control circuitry is configured to receive the control inputs to select one of the three modes of operation, and to alter one or more supply voltage levels to the array, for example, the Vss supply voltage using a Vss supply circuit and the Vdd supply voltage using a Vdd supply circuit, based on the selected mode of operation. The mode control circuitry may also comprise a bitline precharge circuit configured to alter a bitline precharge voltage.
US08331186B2 Fuse programming schemes for robust yield
A program circuit generates first and second currents to program the fuse. The second current is higher than the first current. A control circuit controls generating the first and second currents in succession.
US08331183B2 Memory apparatus having storage medium dependent on temperature and method for driving the same
A memory apparatus includes a temperature detection block configured to detect temperature of an internal circuit and output a temperature detection signal, a current control block configured to receive the temperature detection signal and generate a pulse control signal, and a write driver configured to provide a program pulse having a compensated level and width to a memory cell in response to the pulse control signal.
US08331182B2 Semiconductor device including plural electrode pads
A semiconductor device includes a pad for sense amplifier ground potential as an electrode pad supplying ground potential voltage to a sense amplifier, a first conductive line connected to the pad for sense amplifier ground potential, and a second conductive line connected to an electrode pad closest to the pad for sense amplifier ground potential among plural electrode pads included in a pad row. The second conductive line extends to the opposite side of the first conductive line with the pad row as a reference.
US08331181B2 Semiconductor memory circuit equipped with multiplexer for reducing coupling capacitance of non-selected main bit lines
A semiconductor memory circuit includes a memory cell array having a plurality of memory cells arranged in a row direction and a column direction; a row selecting unit for selecting the memory cells of the memory cell array aligned in the row direction; a column selecting unit for selecting the memory cells of the memory cell array aligned in the column direction; a plurality of main bit lines for outputting data of the memory cells; a data reading unit for reading data of one of the memory cells selected with the row selecting unit and the column selecting unit; a first multiplexer for connecting one of the main bit lines connected to the memory cell to the data reading unit; and a second multiplexer for connecting an adjacent main bit line situated adjacently outside the main bit line to a charging/discharging voltage source for setting at a specific voltage.
US08331178B2 Memory device capable of operation in a burn in stress mode, method for performing burn in stress on a memory device, and method for detecting leakage current of a memory device
Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.
US08331177B2 Resistance semiconductor memory device having a bit line supplied with a compensating current based on a leak current detected during a forming operation
A semiconductor memory device includes a memory cell array, a first control circuit, and a second control circuit. The first control circuit is configured to apply a first voltage to a selected first line. The second control circuit is configured to apply a second voltage having a voltage value higher than that of the first voltage to a selected second line. The first control circuit includes a detecting circuit. The detecting circuit is configured to detect a leak current to flow from the second line to the first line through a memory cell during a forming operation for bringing the memory cell into a state that allows the memory cell to shift between a high resistance state and a low resistance state. The second control circuit includes a current supply circuit, and a compensating circuit. The current supply circuit is configured to supply a constant current to the second line during the forming operation. The compensating circuit is configured to supply a compensating current having the same current value as that of the leak current to the second line during the forming operation based on the leak current detected by the detecting circuit.
US08331176B2 Method and system for evaluating effects of signal phase difference on a memory system
In an embodiment, the effect of signal phase difference on a memory system is tested for various operating states. The various operating states may be represented as respective sample points on a plane defined by a range of values for a difference in signal phases and a range of values for another operating state parameter. In various embodiments, sample points for a round of crosstalk testing may include two sample points which are offset from the same reference point on the plane along different respective axes, where the axes are oblique to one another.
US08331171B2 Semiconductor memory apparatus
A semiconductor memory apparatus includes a first data input/output line configured to transmit data from a first memory bank; a second data input/output line configured to transmit the data from the first memory bank; a first data output section configured to align and output data transmitted through the first data input/output line based on an input/output mode; and a second data output section configured to align and output either data transmitted through the first input/output line or the second data input/output line based on the input/output mode and an address signal.
US08331169B1 Determining threshold voltage distribution in flash memory
Methods, apparatuses, and systems for comparing threshold voltages of a plurality of flash memory cells to a plurality of reference voltages. A number of flash memory cells having threshold voltages that fall within each bin of a plurality of bins is determined. The plurality of bins each represent a plurality of threshold voltage ranges. A threshold voltage distribution of the plurality of flash memory cells is calculated based at least in part on the number of flash memory cells that fall into each of the bins.
US08331168B2 Increased capacity heterogeneous storage elements
Providing increased capacity in heterogeneous storage elements including a method for storing data including a write process writing to a memory and a read process reading from the memory. Physical characteristics of memory cells in the memory support different sets of data levels. The write process takes into account the different sets of data levels when writing to the memory. The read process first obtains data in the memory and subsequently determines how to interpret the data.
US08331165B2 Semiconductor device
A semiconductor device includes a plurality of first output terminals 1-13 and a plurality of first output circuits 203,204 provided corresponding to each of the plurality of first output terminals and coupled to a corresponding first output terminal. The semiconductor device further includes a second output circuit 201 coupled to a second output terminal DQS. The second output circuit automatically adjusts a slew rate based on the state transitions of the plurality of first output circuits. The second output circuit adjusts the slew rate from a first state to a second state based on a transition from first data outputted from the first output circuit to second data following said first data. The second output circuit outputs data in synchronization with the second data with a slew rate in said second state.
US08331154B2 Apparatus for reducing the impact of program disturb
The unintentional programming of an unselected (or inhibited) non-volatile storage element during a program operation that intends to program another non-volatile storage element is referred to as “program disturb.” A system is proposed for programming and/or reading non-volatile storage that reduces the effect of program disturb. In one embodiment, different verify levels are used for a particular word line (or other grouping of storage elements) during a programming process. In another embodiment, different compare levels are used for a particular word (or other grouping of storage elements) during a read process.
US08331153B2 Semiconductor memory having electrically erasable and programmable semiconductor memory cells
In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.
US08331151B2 Semiconductor memory including control unit responsive to erase command to determine selection of redundant memory block
A semiconductor memory device includes a memory region including memory cells configured to store data, a redundant region including memory cells configured to store data, and a control unit. The control unit is responsive to an erase command to execute, prior to an erase operation corresponding to the erase command, an error detection operation on data read from the memory region to detect whether the memory region is a defective memory region to be replaced by the redundant region.
US08331148B2 Semiconductor memory device capable of lowering a write voltage
A memory cell array is configured so that a plurality of memory cells storing one value of an n value (n is a natural number more than 2) are arranged in a matrix. A control circuit controls the voltage of a word line and a bit line in accordance with input data. The control circuit supplies a first voltage to a word line of a selected cell in a write operation, and supplies a second voltage to at least one word line adjacent to the selected cell. Thereafter, the control circuit changes a voltage of the at least one word line adjacent to the selected cell from the second voltage to a third voltage (second voltage
US08331147B2 Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device comprises: a memory cell array configured by a plurality of first and second lines and a plurality of memory cells, each of the memory cells being selected by the first and second lines and being configured to store multiple-bit data in a nonvolatile manner; a data bus configured to transmit write data to be written to the plurality of memory cells, the write data being configured by a plurality of unit data; a column selection unit configured by a plurality of data latches, each of the data latches being configured to directly receive the unit data inputted from the data bus and to retain the unit data; and a control unit configured to control activation/non-activation of the data latches. During a programming operation, for each unit data inputted to the column selection unit, the control unit activates one of the data latches corresponding to a certain one of the memory cells where the unit data is to be stored.
US08331145B2 Nonvolatile memory device, system, and programming method
A method of programming a nonvolatile memory device comprises selectively programming memory cells from a first state to a second state based on lower bit data, selectively programming the memory cells from the second state to an intermediate state corresponding to the lower bit data, and selectively programming the memory cells from the intermediate state to a third or fourth state based on upper bit data.
US08331136B2 Recording method of nonvolatile memory and nonvolatile memory
A recording method of a nonvolatile memory including a recording circuit that electrically performs recording of information for an information memory device having a resistance change connected to a power supply for information recording, includes the steps of: recording information in a low-resistance state by the recording circuit under a condition that an output impedance of the recording circuit for the information memory device is larger than a resistance value in the low-resistance state of the information memory device; and recording information in a high-resistance state by the recording circuit under a condition that an output impedance of the recording circuit for the information memory device is smaller than a resistance value in the high-resistance state of the information memory device.
US08331135B2 Signal control elements in ferromagnetic logic
A chain of field coupled nanomagnets includes at least one elements having substantially different anisotropy energy from that of the other nanomagnets. A signal can propagate from a first input nanomagnet having a relatively high anisotropy energy through the chain to an output nanomagnet. The output nanomagnet may have a relatively lower anisotropy energy than the other nanomagnets. Signal flow direction thus can be controlled. The higher anisotropy energy nanomagnet may be attained by use of a ferromagnet material having a higher anisotropy constant and/or configured with a larger volume than the other elements. The lower anisotropy energy magnet may be attained by use of a ferromagnet material having a lower anisotropy constant and/or configured with a smaller volume than the other elements. Logic signal flow control can also be attained making use of three dimensional geometries of nanomagnets with two different orientations.
US08331134B2 Non-volatile static random access memory and operation method thereof
A non-volatile static random access memory (NV-SRAM) including a latch unit, a first switch, a second switch, a first non-volatile memory (NVM), and a second NVM and an operation method thereof are provided. First terminals of the first and the second switch are respectively connected to a first and a second terminal of the latch unit. Second terminals of the first and the second switch are respectively connected to a first and a second bit line. Control terminals of the first and the second switch are connected to a word line. First terminals of the first and the second NVM are respectively connected to the first and the second terminal of the latch unit. Second terminals of the first and the second NVM are respectively connected to the first and the second bit line. Enable terminals of the first and the second NVM are connected to an enable line.
US08331133B2 Apparatuses for register file with novel bit cell implementation
Approaches to organizing/constructing a register file base cell in a way that reduces the number of signals which need to be routed to and through the bit base cell are disclosed. Base cells so constructed allow industry standard static timing approaches and tools to verify the timing of a register file comprised of such base cells as a whole and allow industry standard place-and-route (APR) tools to be used to implement the connections between the base cells and the other register file logic not directly included in the base cell.
US08331130B2 Semiconductor integrated circuit
In one embodiment, a semiconductor integrated circuit includes a first resistive-change element, a second resistive-change element and a first switching element. The first resistive-change element includes one end having a first polarity connected to a first power source. The first resistive-change element includes another end having a second polarity connected to an output node. The second resistive-change element includes one end having the second polarity connected to the output node. The first switching element includes a first terminal connected to another end of the second resistive-change element. The first switching element includes a second terminal connected to a second power source.
US08331126B2 Non-volatile memory with split write and read bitlines
Read and write operations of a non-volatile memory (NVM) bitcell have different optimum parameters resulting in a conflict during design of the NVM bitcell. A single bitline in the NVM bitcell prevents optimum read performance. Read performance may be improved by splitting the read path and the write path in a NVM bitcell between two bitlines. A read bitline of the NVM bitcell has a low capacitance for improved read operation speed and decreased power consumption. A write bitline of the NVM bitcell has a low resistance to handle large currents present during write operations. A memory element of the NVM bitcell may be a fuse, anti-fuse, eFUSE, or magnetic tunnel junction. Read performance may be further enhanced with differential sensing read operations.
US08331123B2 High performance solid-state drives and methods therefor
A nonvolatile storage device adapted for use with computers, workstations and other processing apparatuses. The storage device includes a printed circuit board, a nonvolatile memory array comprising at least two sub-arrays that contain nonvolatile solid-state memory devices, and control circuitry for interfacing with the processing apparatus. The control circuitry includes an abstraction layer and at least two memory control units configured to communicate data, address and control signals with the sub-arrays of the memory devices. A bus connects each memory control unit to a corresponding one of the sub-arrays. The control circuitry further includes a crossbar switch that functionally connects each memory control unit to the abstraction layer. The storage device is capable of overcoming limitations of current SSD designs by enabling independent read and write transfers (accesses) to the memory devices of the storage device, including concurrent read and write accesses.
US08331118B2 Generator and method for generating a direct current high voltage, and dust collector using such generator
The invention relates to a direct-current high-voltage generator that comprises: current unidirectional switches (74, 76); a driver unit (130) capable of controlling the switching operation from an on-state to an off-state of a switch (74) only when a switch connected in parallel is in the on-state.
US08331115B2 Power switching system to increase induction heating to a load from available AC mains power
In one aspect, the invention provides a power system for providing power to a load. In some embodiment, the system comprises: a rectifier configured to rectify an AC main signal to produce a rectified AC main signal; a zero cross detector configured to receive the AC main signal and to detect when the AC main signal equals zero; a switching device having (i) a first terminal connected to a first node, wherein a first output terminal of the rectifier is also connected to the first node and (ii) a second terminal connected to a second node; a tank circuit having (i) a first terminal coupled to a third node, wherein a second output terminal of the rectifier is also coupled to the third node and (ii) a second terminal coupled to the second node; a current and/or voltage detector connected to the second node; and a controller in communication with the current detector and zero cross detector and configured to turn on and off the switching device based on, at least in part, information received from the zero cross detector and the current and/or voltage detector.
US08331112B2 Systems and methods of primary-side sensing and regulation for flyback power converter with high stability
System and method for regulating an output voltage of a power conversion system. The system includes an error amplifier coupled to a capacitor. The error amplifier is configured to receive a reference voltage, a first voltage, and an adjustment current and to generate a compensation voltage with the capacitor. The first voltage is associated with a feedback voltage. Additionally, the system includes a current generator configured to receive the compensation voltage and generate the adjustment current and a first current, and a signal generator configured to receive the first current and a second current. The signal generator is further configured to receive a sensing voltage and to generate a modulation signal. Moreover, the system includes the gate driver directly or indirectly coupled to the signal generator and configured to generate a drive signal based on at least information associated with the modulation signal.
US08331111B2 Switching power supply device
A switching power supply device 100 includes: zener diodes ZD31 and ZD32 that become conducting when the voltage values of direct current voltages VO1 and VO2 are equal to or more than their zener voltage values, respectively; an overcurrent protection circuit 131 that makes a switching portion 12 stop generating the direct current voltages if an overcurrent that is equal to or more than a previously set current threshold value flows in the secondary winding 23 of a transformer 2; and a diode D3 one end of which is connected to the output end of a regulator 32 and the other end of which is connected between voltage divider resistances R41 and R42, the forward direction of the diode D3 being from the voltage divider resistances R41 and R42 to the regulator 32.
US08331100B2 Device having several contact areas
A device has a first terminal, second terminal and at least four lateral faces provided with contact areas, of which two respective ones each are mutually opposite. The contact areas of the mutually opposite lateral faces are connected to different ones of the first and second terminals.
US08331092B2 Cooling apparatus for semiconductor element
A semiconductor element cooling apparatus includes: a first member whose first surface on which a semiconductor element is mounted, and whose second surface has fins that define coolant flow paths, and that extend in a first direction, and that stand from the second surface to a predetermined height, and that are spaced from each other by predetermined intervals; and a second member that defines the coolant flow paths that extend in the first direction. The fins have grooves which extend in a second direction that intersects the first direction, and which have a depth that extends from the distal end side of the fins toward the second surface. The depth of the grooves is smaller than the height of the fins. A protrusion-forming member is disposed in the grooves, and extends across adjacent fins, and forms protrusions in the coolant flow paths defined by the adjacent fins.
US08331088B2 Storage device
In a storage device accommodating a plurality of memory devices in a general-purpose chassis provided from both of the surface sides thereof, a cooling device is provided on the front of the memory devices. This cooling device is allowed to freely move to leave available the area in front of the memory devices, thereby enabling maintenance and replacement of the memory devices from the both surface sides of the chassis. With such a storage device of a type using a general-purpose chassis, and inserting therein a plurality of memory devices from the both surface sides thereof, even if a cooling device is located on the front of the chassis, the memory devices can be subjected to maintenance and replacement.
US08331084B2 Apparatus for securing electronic equipment
An apparatus for securing electronic equipment. The apparatus includes an electronic device having a first mating portion. The device is removably secured within a shell, which has an open end allowing access to the first mating portion. The apparatus further includes a dock having a second mating portion and an output connector in electrical communication with the second mating portion. The dock removably receives the shell to facilitate electrical communication between the first and second mating portions. The output connector facilitates electrical communication between the electronic device and a device external to the dock. The apparatus also includes a damping mechanism to reduce vibratory forces on the first and second mating portions and relative movement between the portions.
US08331082B2 Systems, methods, and apparatus for components in AMI energy meters
Certain embodiments of the invention may include systems, methods, and apparatus for providing components in advanced metering infrastructure (AMI) energy meters. According to an example embodiment of the invention, a method is provided for accessing electrical meter components, the method includes providing an energy meter enclosure having one or more service accessible compartments operable for housing AMI components, manipulating one or more compartment covers associated with the one or more service accessible compartments, installing one or more AMI components in the one or more service accessible compartments, and closing the one or more compartment covers. The energy meter enclosure protects the AMI components from at least one external element.
US08331081B2 Electrical system, and electrical switching apparatus and shutter assembly therefor
A shutter assembly is provided for an electrical system including at least one electrical switching apparatus, such as a circuit breaker, and a plurality of electrical bus members, and a plurality of electrical cable members, and a ground member with a plurality of contacts. Each of the conductors of the circuit breaker is removably coupled to a corresponding primary contact to electrically connect the circuit breaker to the electrical bus members and to electrically connect the circuit breaker to the electrical cable members and to electrically connect the circuit breaker to the ground members. The shutter assembly includes a flexible insulating member movably disposed between the conductors and the primary contacts. The flexible insulating member moves between a first position in which it provides access for the conductors to be coupled to the primary contacts, and a second position in which the flexible insulating member isolates and electrically insulates the bus member conductors from the primary contacts and the cable member conductors (“disconnected”) or isolates and electrically insulates the cable member conductors from the primary contacts and the ground member (“withdrawn”). An electrical switching apparatus and an electrical system employing the shutter assembly are also disclosed.
US08331080B2 Electrolyte for lithium ion capacitor and lithium ion capacitor including the same
There are provided an electrolyte for a lithium ion capacitor and a lithium ion capacitor including the same. The electrolyte for a lithium ion capacitor according to the present invention includes: a lithium salt; and a mixing solvent including i) two or more compounds selected from a group consisting of cyclic carbonate compounds, ii) one or more compounds selected from a group consisting of linear carbonate compounds represented by a specified Formula, and iii) one or more compound selected from a group consisting of propionate compound represented by a specified Formula.
US08331074B2 Grading devices for a high voltage apparatus
An electrical assembly having an elongated electrical component, such as a surge arrester, coupled to a grading device for distributing an electric field along the electrical component as a continuous operating voltage is applied to the electrical component. The grading device includes a grading body that is coupled to the electrical component. The grading body includes semi-conductive materials. The semi-conductive materials can be nonmetallic. The grading device has improved flashover resistance over conventional metal grading devices.
US08331072B1 Timer controlled, short and open circuit fault detection with slew-rate boosted output driver
A driver circuit uses a feedback loop having a programmable timer and timer logic to adjust a slew rate delay period used to accommodate slewing current when charging or discharging a load capacitor, and to increase the current limit during the slew rate delay period by selecting a larger input current reference value. Increasing the current limit provides for a faster settling time. The value of each input current reference value can be programmed. The programmable timer and the timer logic can be configured to coordinate the slew rate delay period and the selected input current reference value. The slew rate delay period can be adjusted based on which input current reference value is applied.
US08331071B2 Interconnection switching system and method for connecting a distributed energy resource to an electrical power system
A distributed energy resource (DER) switching system and method for connecting a DER to an electrical power system (EPS) protector, wherein the DER has a reactance-to-resistance ratio higher than the reactance-to-resistance ratio of the EPS protector. The DER switching system includes an input for receiving power from the DER, and an output for providing power from the DER to the EPS protector. The DER switching system is designed to effectively lower the higher reactance-to-resistance ratio of the DER during an over-current fault so that, during the fault, the effective reactance-to-resistance ratio at the output of the DER switching system is lower than the reactance-to-resistance ratio of the EPS protector. The method includes effectively lowering the reactance-to-resistance ratio of the DER by varying the operating state of a switching device in a controlled manner during the fault.
US08331070B2 Power supply with open-loop protection
A power supply with an open-loop protection according to the present invention comprises a transformer, a switch, a signal generation circuit, a feedback detection circuit, a brown-out detection circuit, and a delay circuit. The transformer receives an input voltage. The switch is coupled to the transformer for switching the transformer. The signal generation circuit generates a switching signal to control the switch. The feedback detection circuit generates a pull-high signal in response to a feedback signal of the power supply. The brown-out detection circuit generates a delay signal in response to the pull-high signal and the input voltage. The delay circuit counts a delay time in response to the delay signal for generating a disabling signal coupled to the signal generation circuit to latch the switching signal. The brown-out detection circuit is utilized to detect whether the input voltage is in the brown-out condition for determining whether the open-loop protection is executed.
US08331068B2 ESD protection for FinFETs
An embodiment is a semiconductor device comprising a receiver circuit comprising fin field effect transistors (FinFETs), a transceiver circuit comprising FinFETs, and a transmit bus electrically coupling the receiver circuit and the transceiver circuit, wherein the receiver circuit and the transceiver circuit each further comprises an electrostatic discharge protection circuit comprising planar transistors electrically coupled to the transmit bus. Other embodiments may further comprise a power clamp electrically coupling a first power bus and a first ground bus, a power clamp electrically coupling a second power bus and a second ground bus, or at least two diodes electrically cross-coupling the first ground bus and the second ground bus. Also, the planar transistors of the transceiver circuit and the receiver circuit may each comprise a planar PMOS transistor and a planar NMOS transistor.
US08331067B2 Method and apparatus for moving material
An apparatus and method for providing ground fault protection to a lifting device utilizing an electromagnet and powered by a generator. The apparatus and method rectifies an AC voltage emanating from the generator source and monitors unsafe operating conditions of the generator's circuit wherein operation of the lifting device is ceased when predetermined electrical operating parameters are exceeded.
US08331064B2 System having a TMR sensor with leads configured for providing joule heating
A method in one embodiment includes applying a current to a lead of a tunneling magnetoresistance sensor for inducing joule heating of the lead or a heating layer, the level of joule heating being sufficient to anneal a magnetic layer of the sensor; and maintaining the current at the level for an amount of time sufficient to anneal the tunneling magnetoresistive (TMR) sensor. A system in one embodiment comprises a first lead coupled to one end of a tunneling magnetoresistance sensor stack; a second lead coupled to another end of the sensor stack; and a third lead coupled to the first lead, the third lead being selectively coupleable to a ground, wherein a current applied to the first lead at a predetermined level when the third lead is coupled to the ground induces joule heating of the first lead or a heating layer coupled to the first and third leads, the joule heating applied for a predetermined amount of time being sufficient to anneal a magnetic layer of the sensor. Additional systems and methods are also presented.
US08331060B2 Electrode structure of piezoelectric element for head suspension
An electrode structure of a piezoelectric element is provided. The piezoelectric element 23a (23b) constitutes a piezoelectric actuator 19 attached to an attaching part 30 of an object, to minutely move a movable part 15 of the object relative to a base part 13 of the object according to deformation occurring on the piezoelectric element in response to a power applied state of the piezoelectric element. The electrode structure includes an electrode 41a formed on one of a pair of electrode forming faces 31a and 31b of the piezoelectric element on an inner side of a peripheral zone 31a1, the peripheral zone being defined along the periphery of the electrode forming face 31a on which the electrode is formed. The electrode structure also includes a non-electrode part 51 formed in the peripheral zone. Even if the peripheral zone 31a1 of the electrode forming face 31a having a short-circuit causing possibility touches the attaching part 30, no short circuit occurs.
US08331059B2 Sub-assembly for a hard disc drive
A bracket for a hard disc drive combining three separate functions, a ramp, a latch and a connector bracket into a single assembly. The bracket assembly, mounted with ramp and latch, secures and seals the electrical connector connecting the flexible printed circuit on the head side of the actuator. Traditionally, latches are on the coil side of the actuator. Moreover, the combination bracket improves manufacturability while reducing overall cost for the disc drive. The assembly can be purchased complete from a supplier.
US08331057B2 Electromagnetic field detecting element utilizing ballistic current paths
Examples of an electromagnetic field detecting element according to the present invention includes a substrate, a pair of electrodes, three insulation layers disposed on the substrate and between the electrodes. The three insulation layers are designed to have two or three different dielectric breakdown strength. At least two ballistic current paths are formed between the electrodes. With this structure, it is possible to perform at a room temperature a highly efficient electromagnetic field detection utilizing Aharonov-Bohm effect or Aharonov-Casher effect.
US08331050B1 Patterned magnetic media synchronization systems
A write clock synchronization system includes a channel module that reads a servo section of a bit-patterned magnetic medium to determine a preamble signal based on the servo section. An initial phase estimating system estimates an initial phase of the preamble signal based on servo clock samples of the preamble signal and estimates an initial phase of the preamble signal based on write clock samples of the preamble signal. A phase determination module estimates a phase of the write clock signal based on the initial phase of the preamble signal estimated using the servo clock samples and the initial phase of the preamble signal estimated using the write clock samples. A phase error module estimates a phase error based on the phase of the write clock signal. The channel module writes data to discontinuous bit islands of the bit-patterned magnetic medium based on the phase error.
US08331049B2 Detecting touch down and/or assessing quality in a hard disk drive
This application discloses a hard disk drive and a control circuit that are configured to determine touchdown by determining the SAGC for a track, removing the repeatable component of the SAGC to create the non-repeatable component and determining an indication of clearance irregularity and/or touch down when the standard deviation of the non-repeatable component spikes. These operations may create a defect map and/or a Flying height On Demand (FOD) control table in or for the hard disk drive as products of operating the hard disk drive.
US08331047B2 Optical filter device with optical filter switchable function
An optical filter device switches two different optical filters through a frame with the optical filters received therein and being received in a seat formed on a casing. A driver fixed on the casing is employed to drives the frame through a gear fixed on the casing and engaged to the frame.
US08331045B2 Cemented optical element
A cemented optical element includes a convex lens and a concave lens. The convex lens has a first convex surface and a second convex surface that are rotationally symmetric with respect to an optical axis. The convex lens has an edge with a thickness of substantially zero. The concave lens has a concave surface bonded to the first convex surface of the convex lens. Preferably, the peripheral portion of the concave lens extends radially outwardly beyond the convex lens to the extent that it is located within an area surrounded by an extension zone of the second convex surface of the convex lens.
US08331043B2 Optical lens
An optical lens includes a lens group and a diaphragm which is located in front of the lens group. The lens group includes three lenses, respectively the first, the second and the third lens, which are sequentially arranged as a “negative-positive-positive” separated focal power system. The first lens is a double concave negative lens, the second lens is a positive meniscus lens, and the third lens is a double convex positive lens. A concave surface of the second lens is towards the diaphragm, and the focal length of the entire optical system is f, the focal lengths of the first, the second and the third lens are respectively f1, f2, and f3, and which satisfies the following requirement: −0.7
US08331038B1 Vehicular rearview/sideview mirror assembly utilizing afocal optical assembly
An afocal rearview mirror assembly for a motor vehicle having a side door and a dashboard includes a housing attached to the motor vehicle adjacent the side door and dashboard. The housing has a low-profile, rounded external portion and an internal portion. A selectively movable reflective element is enclosed within the housing, and has opposed curved surfaces for reflecting unfocused light rays from outside the external portion through the internal portion of the housing. A selectively movable lens is enclosed within the internal portion of the housing for controlling light transmitted from the selectively movable reflective element to an occupant of the motor vehicle. The selectively movable lens can converge the unfocused light rays reflected from the selectively movable reflective element to a focused image observable by the occupant of the motor vehicle.
US08331034B2 Zoom lens system and image pickup apparatus including the same
A zoom lens system comprises, from an object side to an image side: a first lens unit; a second lens unit; a third lens unit; a fourth lens unit; and a fifth lens unit having positive refractive power, wherein: in zooming from a wide angle end to a telephoto end, the first, the second, the third, and the fourth lens units move so that an interval between the first and the second lens units is larger at the telephoto end than that at the wide angle end, an interval between the second and the third lens units is smaller at the telephoto end than that at the wide angle end, and a distance between the third and the fourth lens units varies; and a focal length of the first lens unit, and focal lengths of an entire system at the wide angle end and the telephoto end are appropriately set.
US08331033B2 Zoom optical system and image pickup apparatus provided with the same
A zoom optical system comprising, in order from the object side, a first lens unit with negative power, a second lens unit with positive power, a third lens unit with positive power, and a fourth lens unit, wherein spacing between the first lens unit and the fourth lens unit is fixed to an image surface, and the second lens unit and the third lens unit are moved on an optical axis so as to change spacings between the respective lens units when the magnification of the zoom optical system is changed. The third lens unit comprises lens elements more than three, including an aperture stop, at least a lens element with positive power and at least a lens element with negative power, and the most image-side lens element of the third lens unit is a meniscus lens element with a concave surface facing the image side.
US08331032B2 Compact objective lens assembly for simultaneously imaging multiple spectral bands
An objective lens assembly suitable for use in helmet-mounted applications. The objective lens assembly comprises two prisms that collectively are configured, oriented and bonded relative to each other to separate and allow simultaneous imaging of two separate spectral bands (such as VNIR and LWIR bands) received from the same object scene via a common window such that the object scene may be viewed from the same perspective without the effects of parallax.
US08331025B2 Polarizing plate, manufacturing method thereof, optical film and image display
A polarizing plate of the present invention includes a polyvinyl alcohol-based polarizer and transparent protective films provided on both sides of the polarizer with an adhesive layer interposed between the polarizer and each transparent protective film, wherein the transparent protective film on one side comprises a lactone ring structure-containing (meth)acrylic resin and is a retardation plate having an in-plane retardation of 40 nm or more and/or a thickness direction retardation of 80 nm or more, and the transparent protective film on the other side has an in-plane retardation of less than 40 nm and a thickness direction retardation of less than 80 nm. The polarizing plate can satisfy durability and display uniformity (unevenness).
US08331023B2 Adjustable parallax barrier 3D display
A parallax barrier 3D display utilizes adjustable at least one parallax barrier for having an observer always retrieve stereo vision no matter whether horizontal or vertical movements towards the parallax barrier 3D display are made. The parallax barrier is adjustable in its width and a distance from the parallax barrier 3D display, or a parallax barrier having an appropriate width or distance may be chosen from each parallax barrier set. Therefore, the observer does not have to search for sweet spots nor keep on staying at the sweet spots for retrieving stereo vision.
US08331022B2 Reflective screen, projection system, front projection television, and reflective screen manufacturing method
A reflective screen which reflects a projection light, includes: a substrate on one surface of which are formed a plurality of concavely or convexly curved surface portions; and a reflective film formed on the curved surface portions of the substrate, wherein the plurality of curved surface portions are configured of a plurality of kinds of curved surface portion differing in curvature, and curved surface portions, among a plurality of curved surface portions aligned in at least a first direction, which are of the same curvature are disposed in series of up to three.
US08331016B2 Electrophoretic display device
An electrophoretic display includes a substrate, first electrodes arranged on the substrate, an electrophoretic layer arranged on the substrate so as to cover the first electrodes, a partition wall that divides the electrophoretic layer into a plurality of cells, and a second electrode arranged on the electrophoretic layer. The electrophoretic layer has electrophoretic particles and a dispersion medium that disperses the electrophoretic particles. The second electrode protrudes towards the first electrodes at the cell.
US08331012B2 Electrophoretic display device and method for fabricating spacer for electrophoretic display device
An electrophoretic display device includes: a transparent substrate positioned at a display side and having a transparent front electrode; a wiring substrate disposed to face the transparent substrate and having a field applying unit; a spacer disposed between the transparent substrate and the wiring substrate and having a plurality of accommodating holes with upper and lower portions open; and a plurality of microcapsules respectively positioned in the plurality of accommodating holes and including a dispersion solvent encapsulated with a plurality of charged particles contained therein, wherein the accommodating holes comprise upper holes with a width for receiving the microcapsules and lower holes allowing the microcapsules to be mounted thereon.
US08331009B2 Method for mixing colors in a display unit
Disclosed is a method for mixing colors in a display unit with pixels that are arranged like a raster. According to said method, each pixel is provided with at least three color mirrors which are disposed behind or next to each other and are formed by transparent receptacles whose interiors are connected to reservoirs via ducts, while a colored liquid, e.g. a red liquid, as well as a fully transparent medium that is immiscible with colored liquid can be moved into the color mirrors and the reservoirs thereof, the fully transparent medium having the effect of making the color of the background in the color mirror appear white, for example. According to the invention, color is mixed by alternately moving the colored liquid and the fully transparent medium into the color mirrors in a rapid sequence, the time fraction during which the colored liquid or the fully transparent medium is located in the color mirror being controllable. In addition, the three colored liquids of the color mirrors of a pixel can be mixed so as to be successively and alternately moved into the color mirrors thereof in a rapid sequence, the time fraction during which the respective color is located in the color mirror being controllable.
US08331008B1 Photonic microwave and RF receivers based on electro-optic whispering-gallery-mode resonators
Whispering gallery mode resonator based devices as photonic RF or microwave receivers.
US08331007B2 Optically transparent component with two sets of cells
A transparent optical component comprises two sets of cells (1) disposed in respective superposed layers (10, 20). Each cell (1) contains an optically active material, and the cells in each set are isolated from one another by separating portions (2) within the corresponding layer. The cells (1) of one layer are offset relative to the cells of the other layer so as to be located in line with the separating portions (2) pertaining to the other layer. Such optical component exhibits transparency that is improved compared with components having a single layer of cells or cells that are superposed.
US08331006B2 Display device and a method for illuminating a light modulator array of a display device
Illuminating light (B2, B3) for a liquid crystal on silicon (LCOS) micro-display (210) is provided by an illuminating unit (100). The illuminating unit (100) has a waveguiding substrate (7) and a plurality of light out-coupling features (F30). The substrate (7) has two substantially parallel surfaces (41,42). Light coupled into said substrate (7) is reflected several times on the surfaces (41,42) of the substrate (7) by total internal reflection (TIR) before being coupled out of the substrate (7). Thus a portion (102) of said substrate (7) may act as an optical integrator for smoothing out variations in spatial intensity distribution of light propagating within said substrate (7). The out-coupling efficiencies of the out-coupling features (F30) may be selected to minimize vignetting and/or to minimize stray light effects.
US08330999B2 Image reading apparatus and method to correct images
An image reading apparatus to read an image and generate pixel data representing the image is provided. The image reading apparatus includes an image sensor having a plurality of sensor units, each of which includes a plurality of light receiving elements, a data storage store shading correction data, which is used to correct unevenness caused in the pixel data, including first shading correction data, and a data corrector to correct the pixel data output from the light receiving elements based on the shading correction data. The data corrector corrects the pixel data based on the first shading correction data when a number of light receiving elements used to read the image in each sensor unit is greater than a number of pieces of correcting information in the first shading correction data.
US08330995B2 Image forming apparatus, image forming method and program
An object of the present invention is to provide an image forming apparatus that can perform a process of transforming an edge of an image such as trapping with less memory than prior art by using a small reference area and modification information.
US08330987B2 Printing apparatus, data storage medium, interface device, printer control method, and interface control method
An interface device backs up printer settings and operating history data of printer so that the settings and history data can be easily restored. A nonvolatile memory 109 in the printer 101 stores printer settings data. Commands from a host 161 are passed by the interface device 131 and received by a receiver 103 within the printer. If the command data is a print command, the print mechanism 108 prints the specified text or image. If the command data is a command for updating the settings data, the corresponding settings data in the nonvolatile memory 109 is updated and at an appropriate backup time the updated settings data is copied to a nonvolatile memory 135 in the interface device 131. The settings data backed up into the interface device 131 can then be restored back to the printer's nonvolatile memory 109 at an appropriate data restore time.
US08330979B2 Information processing apparatus, printing apparatus, control method therefor, information processing system, and program
An information processing apparatus receives first print setting information of a document file to be printed from a printing apparatus via a network, and analyzes it. Based on the analysis result, the information processing apparatus generates divided document files by dividing the document file into data each to be output on one print sheet. The information processing apparatus generates second print setting information by rewriting the first print setting information so as to obtain the same print results of the divided document files as those of the document file before division. The information processing apparatus encrypts each generated divided document file to generate an encrypted divided document file. The information processing apparatus transmits the encrypted divided document file and second print setting information to the printing apparatus via the network.
US08330978B2 Image processing apparatus and printing request making method
The present invention provides an image processing apparatus including a print screen display unit configured to display in a display device a print screen including document information items regarding documents stored in a device which communicates with the image processing apparatus through a network, a print request unit configured to request a server which communicates with the image processing apparatus through the network to print a document corresponding to a document information item selected from among the document information items included in the print screen, and a print-request limitation control unit configured to prevent a new print request from being issued for a period of time from when the print request unit requests the server to print the document to when registration of print reservation information regarding a print reservation of the document in a print reservation information management unit is detected.
US08330974B2 Data processing apparatus and data processing method
A data processing apparatus includes an image reader for reading an original, a receiver capable of receiving an external job transmitted from an outside, a transmitter capable of transmitting image data of the original read by the image reader as a scanning job to an outside, a print device for printing data of the external job received by the receiver, one or a plurality of compressing/expanding devices for compressing the image data of the scanning job or the data of the external job and expanding the compressed data, and a controller. The controller controls execution of processing of the external job and the scanning job by the compressing/expanding devices in accordance with execution status of the external job in cases where a request for processing the data of the external job by the compressing/expanding devices and a request for processing the data of the scanning job by the compressing/expanding devices overlap.
US08330971B2 Advanced cover-driven workflow for a printshop
A method and apparatus of printing books based on digital data, comprises accepting a plurality of orders, each order including a request for at least one copy of each of a plurality of titles. The plurality of orders form a streamlined cover set. The streamlined cover set is scanned, the detecting of each cover in the cover set causing digital printing of a book block corresponding to the detected title associated with the cover.
US08330967B2 Controlling the print quality levels of images printed from images captured by tracked image recording devices
A host on the World Wide Web acquires a variety of facilities as subscribers and then proceeds to undertake control of the printing of images captured at the various subscribing facilities. A user is enabled to select the quality of image content captured by a digital camera. An implementation for capturing said image content at a facility controlled by a facility host includes a user computer station connected to said Web, apparatus for printing the captured image content associated with the user computer station, the user is enabled to select a level of image print quality for said captured image, the user computer station controlling the printing is connected to the remote facility host and a control implementation enables the facility host to permit said printing means to print the captured image at the user selected image print quality.
US08330965B2 Marking engine selection
A multi-functional multi-engine print platform engines schedules and processes job in order to minimize visibility of image defects. The print platform includes at least two marking engines that process jobs, a marking engine analyzer that determines image quality defects of the at least two marking engines, and a scheduler that creates a plan to process a job with the at least two marking engines based at least on the image quality defects each of the at least two marking engines in order to minimize visibility of the defects in images reproduced by the at least two marking engine.
US08330963B2 Optical method for precise three-dimensional position measurement
We disclose a method for accurate three-dimensional position measurement in the field of nano-positioning using a single light beam and principles of interferometry to measure position.
US08330961B1 Optical multi-species gas monitoring sensor and system
The system includes at least one light source generating light energy having a corresponding wavelength. The system's sensor is based on an optical interferometer that receives light energy from each light source. The interferometer includes a free-space optical path disposed in an environment of interest. The system's sensor includes an optical device disposed in the optical path that causes light energy of a first selected wavelength to continue traversing the optical path whereas light energy of at least one second selected wavelength is directed away from the optical path. The interferometer generates an interference between the light energy of the first selected wavelength so-traversing the optical path with the light energy at the corresponding wavelength incident on the optical interferometer. A first optical detector detects the interference. At least one second detector detects the light energy at the at least one second selected wavelength directed away from the optical path.
US08330959B2 Multi-channel surface plasmon resonance instrument
A robust multichannel SPR instrument with exceptionally high sensitivity (
US08330955B2 Color detector
A color detector includes a light source, a photodiode, and a filter tuned to only allow light of a specific color to pass through to the photodiode. When the light reaches the photodiode, the photodiode outputs a current that indicates that the color is present in the light. The filter may include a pair of partially reflective layers consisting of a reflective metal, such as silver. To prevent the metal from oxidizing or reacting with the environment, the partially reflective layers may be coated with a protective layer, such as aluminum nitride. The color detector may further include a color enhancing layer. Finally, the color detector may include a capping layer. Accordingly, the color detector provided herein allows for the filter to use metals for partially reflective layers that would normally oxidize, as well as detect light of a specific spectrum of wavelengths.
US08330954B2 Light scattering aerosol detect device
One aspect is an aerosol detection arrangement including a light source for projecting a light beam. The arrangement includes a light collector configured to collect light scattered off liquid drops in an aerosol that enter the light beam and processing the scattered light into an output signal. The arrangement includes a controller for receiving the output signal from the light collector and uses the output signal to determine a predicted number of main liquid drops ejected.
US08330952B2 Guided mode resonator based Raman enhancement apparatus
A system for performing Raman spectroscopy comprises a waveguide layer configured with at least one array of features, the at least one array of features being configured to provide guided-mode resonance for at least one wavelength of electromagnetic radiation; and at least one fluid channel disposed in the waveguide layer. An analyte sensor comprises an electromagnetic radiation source configured to emit a range of wavelengths of electromagnetic radiation, the system for performing Raman spectroscopy, and at least one photodetector configured to detect Raman scattered light.
US08330950B2 Method of manufacturing nitride semiconductor device including SiC substrate and apparatus for manufacturing nitride semiconductor device
Excitation light is irradiated onto a GaN layer on a silicon carbide substrate constituting a layered product that is set on a stage. Then light is emitted from a defective part caused by a structural defect of the silicon carbide substrate out of the GaN layer. By using this light luminescence phenomena, a position of a defective part of the silicon carbide substrate can be detected.
US08330949B2 Foreign substance inspection apparatus, exposure apparatus, and method of manufacturing device
A foreign substance inspection apparatus includes a light projecting unit, a detector which detects the intensity of scattered light of light projected onto the surface of an object to be detected by the light projecting unit, in association with the two-dimensional coordinate position on the surface, and a processing unit. The relationship between the intensity of the scattered light detected by the detector and the particle size of the foreign substance differs depending on the two-dimensional coordinate position on the surface. The processing unit determines, a conversion curve to convert the intensity of the scattered light detected by the detector into the particle size of the foreign substance, in accordance with the two-dimensional coordinate position of the foreign substance detected by the detector, and converts the intensity of the scattered light detected by the detector into the particle size of the foreign substance using the determined conversion curve.
US08330942B2 Methods and instruments for estimating target motion
The present invention relates to a measuring instrument and methods for such a measuring instrument for tracking a moving object, measuring a distance to an object. According to the invention, sets of target position data including at least horizontal (Ha) and vertical angle (Va) between the measuring instrument (1) and said at least one target (9) in consecutive measurements during a measurement session are obtained (40; 50; 60; 70); a model describing a path of and/or a distance to the target (9) is calculated; at least a present position of the target is estimated (44; 53; 65; 74) using the model; and, the estimated position of the target (9) is used (45; 56; 67; 79) when searching for the target (9).
US08330941B2 Calibration method for a lithographic apparatus
Method to calibrate a substrate table position in a lithographic apparatus includes providing a substrate on the substrate table with a two dimensional arrangement of patterns; positioning the substrate table with a positioning system; measuring positions of the substrate table in at least two dimensions with a position measurement system; reading out the arrangement of patterns as a function of the measured positions of the substrate table with a pattern read out system to obtain pattern read out results; deriving position errors as a function of the measured positions of the substrate table compared with the pattern read out results; calibrating the positioning system using the position errors, the calibrating including determining drift influences of the positioning system, correcting the position errors as a function of the corresponding two dimensional position of the substrate table with the determined drift influences, and calibrating the positioning system with the corrected position errors.
US08330938B2 Solid-state array for lithography illumination
A method for providing an actinic illumination energizes solid-state light sources in an array, wherein each solid-state light source emits actinic light of a predetermined wavelength, directs the emitted actinic light from the solid state light sources through one or more compound parabolic concentrators, and forms a field conjugate to an objective lens by directing the concentrated actinic light from each compound parabolic concentrator through one or more lens elements in a lens array. Emission of one or more of the solid state light sources is adjusted to obtain a predetermined illumination pupil envelope function.
US08330936B2 Lithographic apparatus and device manufacturing method
A path which a substrate should take under the projection system during immersion lithography imaging of a plurality of dies on the top surface of the substrate is disclosed.
US08330933B2 Liquid crystal lens structure and method of driving same
A liquid crystal (LC) lens structure and a method of driving same are disclosed. The LC lens structure includes an upper substrate, a lower substrate, a liquid crystal and polymer composite film, and an LC layer. The upper substrate is provided with a first conducive layer and a first alignment layer; and the lower substrate is provided with a second conductive layer and a second alignment layer. The liquid crystal and polymer composite film is arranged at one side of the first alignment layer to form a first lens, and the LC layer is arranged between the liquid crystal and polymer composite film and the second alignment layer to form a second lens. By building the liquid crystal and polymer composite film in the LC lens structure, it is able to realize an LC lens with low operating voltage and large focusing range.
US08330930B2 Liquid crystal display device having column spacer receiving members formed of the same material as a material of one of the pair of electrodes for applying an electric field to the liquid crystal material
Provided is a liquid crystal display device including: a plurality of column spacers and a first alignment film which are formed above the first substrate; an insulating layer which is formed on the second substrate and a second alignment film which is formed on the insulating layer; and column spacer receiving members which are provided between the insulating layer and the second alignment film in places opposed to the plurality of column spacers, the column spacer receiving members each being made of a material different from both of a material of the insulating layer and a material of the second alignment film, in which a thickness of the second alignment film in places above the column spacer receiving members is ⅓ or less of a thickness of the second alignment film in places in which the second alignment film is formed directly on the insulating layer.
US08330921B2 Pixel structure and display panel
A pixel structure including a substrate, a scan line, a data line, an active device, a capacitor electrode line, an upper electrode pattern and a pixel electrode is described. The scan line and the data line are disposed on the substrate. The active device is electrically connected to the scan line and the data line. The capacitor electrode is disposed on the substrate. The upper electrode pattern is disposed above the capacitor electrode line, and the upper electrode pattern has a first opening therein to expose the capacitor electrode pattern. The pixel electrode is electrically connected with the active device and covers the capacitor electrode line and the upper electrode pattern, wherein the pixel electrode has a middle portion and a plurality of branches connecting to the middle portion, and the middle portion has a second opening therein to expose the first opening.
US08330919B2 Array substrate for in-plane switching mode liquid crystal display device and method of fabricating the same
An array substrate for an in-plane switching mode liquid crystal display device includes: a substrate; a gate line on the substrate; first and second common lines parallel to and spaced apart from the gate line; a data line crossing the gate line to define a pixel region; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor, the pixel electrode having a plate shape; a plurality of common electrodes connected between the first and second common lines, the plurality of common electrodes overlapping the pixel electrode; and first and second shielding electrodes parallel to the data line, the first and second shielding electrodes spaced apart from each other with respect to the data line.
US08330917B2 Thin film transistor substrate and liquid crystal display having the same
A thin film transistor (TFT) substrate that may not have display quality degradation due to an image sticking phenomenon and a liquid crystal display having the same are disclosed for embodiments. The TFT substrate, according to one embodiment of the present invention, includes an insulating substrate, a plurality of gate lines and a plurality of data lines arranged in a matrix defined by the crossing of the gate lines and the data lines on the insulating substrate, a plurality of thin film transistors each electrically connected to the gate lines and of the data lines at crossing points of the gate lines and the data lines, a plurality of pixel electrodes each connected to the thin film transistors and partially overlapping a previous gate line, and a blocking electrode formed between each pixel electrode and its adjacent pixel electrode in parallel with the gate lines.
US08330910B2 Transflective liquid crystal display device and method for manufacturing the same
A transflective type LCD device and a method for manufacturing the same is disclosed, in which an aperture ratio of a reflective part is improved, and manufacturing process is simplified by decreasing the number of masks for forming contact holes. The transflective type LCD device includes a plurality of gate and data lines crossing each other, defining a plurality of pixel regions; a thin film transistor at a crossing point of the gate and data lines; a lower storage electrode formed by one portion of a preceding gate line, and an upper storage electrode above the lower storage electrode having a gate insulating layer in between; a transmitting electrode in contact the upper storage electrode; and a reflective electrode in contact with the transmitting electrode in the reflective part of the pixel region wherein the transmitting electrode is in between the reflective electrode and the substrate.
US08330898B2 Flexible liquid crystal display device
A flexible liquid crystal display device includes a first flexible substrate having a display region and a non-display region at a periphery of the display region; an organic electroluminescent diode including a first electrode on the first flexible substrate, an organic emitting layer on the first electrode and a second electrode on the organic emitting layer, wherein each of the first electrode, the organic emitting layer and the second electrode covering an entire surface of the display region; a buffer layer on the organic electroluminescent diode; a gate line on the buffer layer; a data line over the buffer layer and crossing the gate line to define a pixel region at the display region; a thin film transistor connected to the gate and data lines; a pixel electrode connected to the thin film transistor; a second flexible substrate facing the first flexible substrate; a common electrode on the second flexible substrate; and a liquid crystal layer between the pixel and common electrodes.
US08330896B2 Liquid crystal display device
A liquid crystal display device of the present invention includes a liquid crystal display panel and a backlight for radiating light to the liquid crystal display panel. The backlight includes a hot-cathode tube (linear light source) (21) and ends (21b) of an outer shape of the hot-cathode tube (21) are positioned inside a display region (R1) of the liquid crystal display panel when the liquid crystal display device is seen from a side where an image is displayed, and the hot-cathode tube (21) is positioned to cross a center line (C) of the display region (R1) in a longitudinal direction.
US08330895B2 Method of making antiglare film, antiglare film, polarizing plate, image display device, and transmissive/semi-transmissive liquid crystal display
In a method for making an antiglare film including the casting, the releasing, the drying, the applying and the curing as defined herein, the transparent particles have an average primary particle size of greater than 2.5 μm and not greater than 12 μm, the transparent base has on at least one side thereof flat portions substantially parallel to a film-forming plane and rounded protrusions arising from the transparent particles, the protrusions having a maximum height Rt from the flat portions of from 1 to 15 μm, and the cured layer has an average thickness of from 1 to 15.0 μm and a surface profile with an arithmetic average roughness Ra, a mean spacing between peaks Sm, and an average slope θa, all as measured in accordance with JIS B0601, satisfying the relationships (1) to (3) as defined herein.
US08330889B2 Thin film transistor substrate, liquid crystal display having the same, and method of manufacturing the same
In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.
US08330886B2 Thin film transistor array substrate and repair method thereof
A thin film transistor array substrate includes a plurality of pixel areas defined by scan lines and data lines; a pixel electrode disposed on each of pixel areas; and a thin film transistor disposed on the each scan lines includes a gate electrode; a source electrode; a first drain electrode and a second drain electrode disposed along the source electrode and on the opposite sides; and an insulating layer over the source electrode, the first drain electrode, the second drain electrode and data lines. The insulating layer has a contact hole to electrically connect with the pixel electrode and the first drain electrode; and the second drain electrode extends to a portion adjacent the pixel electrode and electrically insulated with each other by the insulating layer. The present repair method is to irradiate a laser beam to short the second drain electrode and the pixel electrode at the adjacent pixel area.
US08330876B2 Projector
A projector includes: a light source; an image processing section adapted to perform an expansion process of an aspect ratio in either one of a horizontal direction and a vertical direction of an image to be formed by an image signal input; a light modulation element adapted to modulate light from the light source to form an image on which the expansion process is performed; a projection optical system adapted to project the image, formed by the light modulation element, on a projection surface; and an anamorphic zoom optical system adapted to be capable of changing a magnification ratio of the image with respect to a direction different from a direction, along which the expansion process is performed in the image processing section, out of the horizontal direction and the vertical direction.
US08330871B2 Method and apparatus for detecting motion in an image display device
A method for detecting motion in an image display device includes receiving a plurality of composite signals having luminance signals and chrominance signals corresponding to a plurality of frames, determining luminance motion factors of the plurality of frames according to the luminance signals of the plurality of composite signals, determining chrominance motion factors of the plurality of frames according to edge intensities of the plurality of frames and the chrominance signals of the plurality of composite signals, and determining motion factors of the plurality of frames according to the luminance motion factors and the chrominance motion factors.
US08330867B2 Image processing apparatus and image processing method for producing an interpolation frame of an image signal
An image processing apparatus having the cold-warm color producing processing unit for producing the cold-warm color frame, and an interpolation frame producing unit for producing an interpolation frame of the image signal, wherein the interpolation frame producing unit produces the interpolation frame of the image signal, using the cold-warm color frame produced in said cold-warm color producing processing unit.
US08330864B2 Multi-lingual transmission and delay of closed caption content through a delivery system
Disclosed is a system and method of blending multiple closed caption language streams into a single output for transmission using closed caption encoding devices. Closed caption signals are created by remote closed caption generating systems that are connected to an input device, such as a stenography keyboard or voice recognition system. The closed caption signals are generated at multiple remote closed caption generating systems and in different languages, and are then independently transmitted to a multiplexing system where they are properly identified and blended into a single output data stream. The single output data stream is then delivered to a closed caption encoding device via a connection such as an Ethernet or serial connection.
US08330860B2 Color signal processing circuit, color signal processing method and television system
According to embodiments, a color signal processing circuit includes: an A/D converter configured to convert an analog television signal into a digital signal by using a clock; a color signal demodulation circuit configured to color-demodulate the television signal converted into the digital signal by the A/D converter; a clock generation section configured to generate the clock that is used by the A/D converter; and a frequency control section configured to control the clock frequency of the clock generation section on the basis of a color subcarrier frequency of a color signal included in the analog television signal and on the basis of the vertical synchronization signal frequency of the analog television signal.
US08330854B2 Sealed, waterproof digital electronic camera system and method of fabricating same
A hermetically sealed digital electronic camera that is designed to operate both on land and underwater to great depths, and method of making same. The present invention is a camera which is hermetically sealed by being totally encapsulated, preferably by being cast in plastic, with no seals, holes, joints, penetrating pins, wires or other objects. Wireless means are used for communicating information, electrical power and control signals. The invention is impervious to atmospheric contamination and absolutely incapable of leaking under water to great depths and pressures. In an alternate embodiment camera optics are not encapsulated but are immersed in water when the encapsulated digital camera is placed in water.
US08330852B2 Range measurement using symmetric coded apertures
A method of using an image capture device to identify range information for objects in a scene includes providing an image capture device having an image sensor, a coded aperture having circular symmetry, and a lens; storing in a memory a set of blur parameters derived from range calibration data; capturing images of the scene having a plurality of objects; producing a set of reference edge images using the blur parameters from the stored set; providing a set of deblurred images using the captured image, the reference edges and each of the blur parameters from the stored set; and using the set of deblurred images to determine the range information for the objects in the scene.
US08330842B2 Amplifier control device and recording non-transitory medium
An amplifier control device controls an amplifier which amplifies a first signal supplied from an image-pickup element, and supplies a second signal acquired by amplification of the first signal to a signal processing unit which is a following stage. The amplifier control device comprises a control unit which changes a current supplied to the amplifier depending on whether or not the first signal supplied to the amplifier is used for image data.
US08330840B2 Image sensor with multilayer interference filters
Image sensors are provided for electronic imaging devices. An image sensor can be formed from an array of image pixels. Bragg-type multilayer interference filters can be formed for the image sensor using dielectric layers with alternating high and low indices of refraction. The multilayer interference filters can be configured to form band-pass filters of desired colors and infrared-blocking filters. Dielectric layers with non-flat bulk absorption properties may be used to tune the absorption of the filters. The interference filters may be provided in a uniform pattern so that an image sensor exhibits a monochrome response or may be arranged in a multicolor color filter array pattern such as a Bayer pattern.
US08330828B2 Device and imaging system
A device comprises a photoelectric conversion portion including a light receiving surface, and a condensing structure which condenses light to the photoelectric conversion portion, wherein in the condensing structure, a first insulating film and a second insulating film having a refractive index higher than that of the first insulating film are laid out in a plane perpendicular to a normal passing through a center of the light receiving surface such that a density of the second insulating film is higher in a central portion of the plane than in a peripheral portion of the plane, and a layout pattern of the first insulating film and the second insulating film in the plane includes a portion having a dimension not more than a maximum wavelength of a visible light range.
US08330825B2 Zoom lens system characterization for image sharpening
A method for sharpening an input digital image captured using a digital camera having a zoom lens, determining a parameterized representation of lens acuity of the zoom lens as a function of at least the lens focal length and lens F# by fitting a parameterized function to lens acuity data for the zoom lens at a plurality of lens focal length and lens F/#; using a processor to sharpen the input digital image responsive to the particular lens focal length and lens F/#corresponding to the input digital image using the parameterized representation of the lens acuity.
US08330824B2 Camera, camera system, and camera body
A camera is provided with which a small size can be achieved while ensuring good image blur correction performance. The camera (1) has an optical system (O), a housing (2), a second drive unit (12) serving as part of an image blur corrector, an imaging element (17), a first angular velocity sensor (4), an acceleration sensor (7), a sensor drive unit (240), and a drive controller (22). The first angular velocity sensor (4) is configured to acquire the rotational angle of the housing (2). The acceleration sensor (7) is configured to acquire the amount of displacement of the housing (2). A correction computer (21) calculates the amount of drive of a correcting lens (9) from the displacement amount acquired by the acceleration sensor (7), and calculates the amount of drive of the correcting lens (9) from the rotational angle acquired by the first angular velocity sensor (4) using the position of the acceleration sensor (7) as a reference. The drive controller (22) controls the operation of the second drive unit (12) on the basis of these drive amounts.
US08330818B2 Image-based vehicle maneuvering assistant method and system
An image-based vehicle maneuvering assistant method and system are provided in the present invention, in which images captured by a single image sensing device is processed to determine the changes with respect time by a controller having capability of image processing and identification and distance estimation in image space for providing a complete assisting image-information while the carrier is maneuvering. By means of the presented method of the presented invention, the system is capable of generating track of the carrier, view point transformation, and identifying the characteristic object in the image so as to performing the distance estimation. The present invention may be utilized and applied in different kinds of carrier type to solve the problem of guiding of carrier maneuvering, and assist the carrier lane changing, parking assistance and blind spot detection.
US08330817B1 Camera installation for trailer
A sting trailer has a camera scaffold concealing hidden cameras in a cargo compartment of the trailer. The camera scaffold conceals cameras and wiring so that the cameras are not visible from the interior of the trailer.
US08330815B2 Vehicle-mounted camera system
The present invention has an object to provide a vehicle-mounted camera system capable of preventing the occurrence of only a smear in an area without a mask image on a picked up image, and substantially reducing a ghost and stray light. The vehicle-mounted camera system according to the present invention includes an imaging element (30a), an imaging lens (30c) disposed in front of the imaging element (30a), a superimposing means for superimposing a mask image on part of a picked up image of the imaging element (30a), and a light-shielding part (31b) arranged in a range corresponding to the mask image within the angle of view of the imaging lens (30c) for shielding part of incident light from the exterior.
US08330812B2 Method and apparatus for producing and storing, on a resultant non-transitory storage medium, computer generated (CG) video in correspondence with images acquired by an image acquisition device tracked in motion with respect to a 3D reference frame
Apparatus and method of (1) navigating an image acquisition device with both translatory and attitudinal movements while acquiring successive images in an object space and at the same time sensing the translatory and attitudinal movements of the device with respect to a three-dimensional reference frame of the object space, (2) providing successive computer generated (CG) images produced by a computer workstation from the successive images captured by the device in synchronization with the sensed translatory and attitudinal movements of the device with respect to the three-dimensional reference frame, and (3) storing the successive CG images on a non-transitory storage medium for later retrieval by a playback device for presentation by the playback device of said successive CG images to at least one eye of a viewer in an image space for perception of the successive CG images. A non-transitory storage medium storing the successive CG images is also provided.
US08330805B2 Stereoscopic image display apparatus and method of manufacturing the same
A stereoscopic image display apparatus includes an image display panel displaying an image for a right eye and an image for a left eye in a regularly mixed manner in a plane, a phase difference element including a right-eye image display portion corresponding to the image for the right eye and a left-eye image display portion corresponding to the image for the left eye to provide different polarization states, a light shield layer formed to project only in an area including a boundary between the right-eye image display portion and the left-eye image display portion of the phase difference element, and a binder layer interposed between the phase difference element and the image display panel, except for a portion between a top surface of the light shield layer and the image display panel, thus bonding the image display panel, the phase difference element, and the light shield layer together.
US08330802B2 Stereo movie editing
The stereo movie editing technique described herein combines knowledge of both multi-view stereo algorithms and human depth perception. The technique creates a digital editor, specifically for stereographic cinema. The technique employs an interface that allows intuitive manipulation of the different parameters in a stereo movie setup, such as camera locations and screen position. Using the technique it is possible to reduce or enhance well-known stereo movie effects such as cardboarding and miniaturization. The technique also provides new editing techniques such as directing the user's attention and easier transitions between scenes.
US08330800B2 Information processing apparatus and method
An index detecting section detects an index in a physical space, from a captured image obtained by an imaging apparatus. An erroneous-detection prevention processing section performs erroneous-detection prevention processing, based on information relating to image coordinates of a detected index. An image output section outputs, to a display device, an image having been subjected to the erroneous-detection prevention processing. This prevents an image displayed on the display device from being mistaken for a real index when the display device is in the field of view of the imaging apparatus.
US08330798B2 Apparatus and method for providing stereoscopic three-dimensional image/video contents on terminal based on lightweight application scene representation
A method for providing stereoscopic three-dimensional (3D) image/video content in a terminal based on Lightweight Application Scene Representation (LASeR) is provided. The method includes receiving a LASeR content including therein stereoscopic 3D image/video information, decoding the received LASeR content according to a stereoscopic 3D image/video attribute, checking LASeR commands from the decoded LASeR content, carrying out the LASeR commands, parsing scene information including stereoscopic 3D image/video information included in the decoded LASeR content, determining whether a media object to be included in scene description is a stereoscopic 3D image/video according to the stereoscopic 3D image/video information and, when the media object to be included in scene description is a stereoscopic 3D image/video, displaying the stereoscopic 3D image/video according to whether the terminal supports a stereoscopic 3D image/video.
US08330794B2 Implementing multiple dominant speaker video streams with manual override
In a video conference system capable of providing multiple video streams, displayed streams for participants are configured based on automatic selection by the system (such as active speaker) and manual override by the participants. The displayed views are further enhanced by implementing duplicate detection to avoid display of duplicate streams between the automatic selections and manual selections.
US08330792B2 Measuring latency in a video conference system
A method of measuring video latency between a sender and a receiver in a video conference system is disclosed. In an embodiment, the method includes initiating an electrical signal from a first location in a video conference system, transmitting the electrical signal through the video components of the video conference system, reflecting the electrical signal back through the video components of the video conference system and measuring the latency of the electrical signal at the first location related to the transmission and reflection of the electrical signal.
US08330791B2 Video conference system with symmetric reference
A video conference system includes a first video conference environment, and a second video conference environment linked to the first video conference environment. Each video conference environment has a conference view direction and a reference view direction, the reference view directions being symmetrically oriented with respect to the conference view directions.
US08330790B2 System and method of automating access to a videoconferencing room
A videoconferencing system and method of automating access to a videoconferencing room is provided. The videoconferencing system includes a reservation controller for comparing remote identifying information and local identifying information and for receiving a deposit. A payment collector is in communication with the reservation controller for receiving the deposit from the reservation controller. An access controller is in communication with the payment collector and the reservation controller for allowing access to the videoconferencing room if the remote identifying information matches the local identifying information. The method includes the steps of receiving remote identifying information, receiving local identifying information, comparing the local identifying information to the remote identifying information, and electronically unlocking a door of the videoconferencing room if the local identifying information matches the remote identifying information.
US08330786B2 Optical scanner and image forming apparatus incorporating same
An optical scanner includes at least one light source, an optical element, a deflective scanner, an optical housing, a pressing member, and a mounting member. The light source emits a light beam to an object. The optical element forms the light beam emitted from the light source into a desired shape. The deflective scanner deflects the light beam. The optical housing stores the optical element and the deflective scanner, and includes at least one positioning member. The positioning member positions the light source in an axial direction of the light source. The pressing member presses the light source toward the positioning member to sandwich the light source between the pressing member and the positioning member and mount the light source on the optical housing. The mounting member fastens the pressing member to the optical housing.
US08330784B2 Image forming apparatus having variable developer intervals
An image forming apparatus including a black developer with increased capacity. The image forming apparatus includes optical scanners, where the optical scanners have the same focusing distance from the light source to the photo conductor, and the light reflecting unit of one of the optical scanners is arranged at a position different from the light reflecting unit of another optical scanner, such that intervals between the developers vary. Accordingly, although developers of the same type are used, the capacity of the black developer, which is most frequently used, may be easily increased by arranging the relative positions of the developers.
US08330783B2 Imaging patterns of features with skewed edges
A method is provided for forming an image of a pattern of features on media which includes determining a pitch of the features along first and second directions and determining a first size of a first pixel based at least on the pitch of the features along the first direction. A second size of a second pixel is determined based at least on the pitch of the features along the second direction. An offset is determined along the scan direction between a first and second scan-line of pixels, based at least on the skew angle and the first size. The imaging head is controlled to form the first pixel comprising the determined first size and the second pixel comprising the determined second size. The imaging head is controlled to form the first scan-line and the second scan-line, offset from one another by the determined offset.
US08330780B2 Printing
A method and apparatus for transferring an image of predetermined length onto a substrate by selective energization of a row of printing elements in a printhead of a printing apparatus. The printing apparatus may be arranged with a print ribbon located between the printhead and the substrate such that ink is selectively transferred from the ribbon to the substrate as a result of energizations of the printing elements. The image to be printed is rendered in memory as a series of rows of pixels and the apparatus is set up to download the rendered rows of pixels to the printhead successively. The relative positioning of successively printed rows of pixels on the substrate is determined by relative displacement between the printhead and the substrate. The apparatus is set up to control the positioning of the rows of pixels by controlling the delay between successive energizations of the printing elements. Operational characteristics of the printing apparatus are determined, and the image is rendered such that the number of rows of the pixels in the rendered image is no greater than the maximum number of rows of pixels which can be printed in the length of the image given the operational characteristics of the printing apparatus. Additional rows of pixels may be printed between pairs of rows of printed which correspond to consecutive rows in the rendered image. The pixel content of each additional row is a function of the pixel content of the adjacent pairs of rows.
US08330777B2 Information processing method, touch information processing device, and flat panel display
A method and a device for processing touch information and a flat panel display using the method and the device are disclosed. The touch information processing arrangement includes: generating sensor output data from a touch sensor array; computing the sensor output data corresponding to each of adjacent frames to generate difference data; first binarizing the difference data based on a predetermined first threshold value; filtering the first binarized difference data; and second binarizing the filtered difference data based on a predetermined second threshold value.
US08330776B2 Remote control system and appliance for use in the remote control system
An appliance according to the present invention is operative under instructions from a plurality of control units, which includes a first control unit and a second control unit. The first control unit outputs a first control signal to the appliance to instruct the appliance to perform a predetermined operation. The second control unit outputs a second control signal to the appliance to instruct the appliance to perform the predetermined operation. The appliance includes a receiving section that receives the first and second control signals and an image control section that changes sizes of a particular image to be presented during the predetermined operation depending on whether the receiving section has received the first control signal or the second control signal.
US08330773B2 Mobile data and handwriting screen capture and forwarding
The claimed subject matter provides a system and/or a method that facilitates communicating data utilizing a portable device. An interface component can receive annotation data related to a display associated with a portable device. An annotation component can append a screen shot corresponding to the display with the annotated data to create an annotated screen shot.
US08330770B2 System and method for improving the quality of halftone video using an adaptive threshold
A system and method for processing video data are disclosed. In one aspect, a method includes generating halftone data for a first video frame and generating halftone data for a second video frame. The method further includes, to reduce at least one visual artifact, selectively copying the halftone data for the first video frame into the halftone data for the second video frame, the selectively copying being based upon a comparison between an adaptive threshold and the change resulting due to the copying of the data, in the human visual system model-based perceptual error of the halftone data for the second video frame.
US08330768B2 Apparatus and method for rendering high dynamic range images for standard dynamic range display
The method, system and apparatus embodiments of the present invention provide for rendering original images having high dynamic range into display images having lower dynamic range while retaining a visual quality of rendered images comparable to the original or reference images. Tone-mapping parameters are applied to the display images and are iteratively adjusted in order to reduce the differences between the conditioned original image and the conditioned display image.
US08330765B2 Rolling context data structure for maintaining state data in a multithreaded image processing pipeline
A multithreaded rendering software pipeline architecture utilizes a rolling context data structure to store multiple contexts that are associated with different image elements that are being processed in the software pipeline. Each context stores state data for a particular image element, and the association of each image element with a context is maintained as the image element is passed from stage to stage of the software pipeline, thus ensuring that the state used by the different stages of the software pipeline when processing the image element remains coherent irrespective of state changes made for other image elements being processed by the software pipeline. Multiple image elements may therefore be processed concurrently by the software pipeline, and often without regard for synchronization or serialization of state changes that affect only certain image elements.
US08330759B1 Defining one or more used segments based upon extent of completion of a process
A facility for delivering a user segment displays an ordered set of steps making up a process, and receives user input selecting one of the displayed steps of the process. In response to receiving the user input, the facility creates a new user segment definition. The created user segment definition establishes a segment to include those users that complete the displayed process through the selected step.
US08330755B2 Image display device and driving method for same for collective write in
An image display with high brightness where a long time can be secured for light emission of self-luminous elements can be implemented using only line memories.The period for the writing in of a display voltage (period for writing in of data) continues for a number of lines (three lines), and the reset pulse becomes of a “high” state. Subsequently, operation for three lines is carried out collectively during a triangular wave period (period for writing in of a triangular wave voltage), and only the light emission controlling pulse becomes of a “high” state. During the period for the writing in of a triangular wave voltage, the writing in of a triangular wave voltage from the second time onward is rewriting of a triangular wave voltage, and thus, the period for rewriting the display voltage (dotted line portion) becomes unnecessary, and a longer period for light emission, where the light emission controlling pulse becomes of a “high” state, can be secured.
US08330754B2 Organic light emitting diode display and driving method thereof
An organic light emitting diode display including a display panel having a plurality of data lines, a plurality of gate lines, and a plurality of pixels, a data drive circuit that converts input digital video data into data voltage with reference to gamma reference voltages and supplies the data voltage to the data lines, a gamma reference voltage generation circuit that generates the gamma reference voltages by dividing a high potential gamma power; and a gamma power adjusting circuit that adjusts display luminance by extracting a number of white pixels from the input digital video data and adjusting the output level of the high potential gamma power depending on the number of white pixels.
US08330752B2 Data line driving circuit, driver IC and display apparatus
A data line driving circuit for a display panel includes a plurality of output circuits, a bias circuit, and a plurality of switches. Each of the plurality of output circuits includes an electric current source which supplies electric current in response to a bias signal, and supplies a data voltage by using the electric current to a corresponding one of a plurality of data lines arranged in the display panel. The bias circuit generates the bias signal, and supplies the bias signal to the plurality of output circuits through bias wirings. The plurality of switches is provided between the bias circuit and the plurality of output circuits, and cuts off the bias wirings in response to a control signal.
US08330747B2 Display device including photosensors for detecting ambient light and dark current for adjusting a backlight, and display control method thereof
A display device is provided and includes a first photosensor that detects the light amount of ambient light of a display area, a second photosensor that detects dark current arising when light is blocked, and changeover switches that select the first photosensor and the second photosensor. The display device further includes a comparator that compares the output of the selected first photosensor or second photosensor with a predetermined reference value, and control means that calculates the difference between the comparison result by the comparator with the first photosensor and the comparison result by the comparator with the second photosensor and controls the amount of light supplied to the display area corresponding to the calculation result. This configuration suppresses the influence of a detection error due to variation in the performance between the photosensors applied to the display device to thereby accurately adjust the amount of light supplied to the display area.
US08330746B2 Addressing method and structure for multiple chips and display system thereof
Addressing method for multiple chips is provided. Each chip includes an input enable terminal, an output enable terminal, a data input terminal, and a clock terminal. The output enable terminal of a previous stage is connected to the input enable terminal of a next stage. The method includes setting an initial address to an address of each chip via a system; setting a state of each chip to a disable state; enabling the state of a first-one chip among the chips to an enable state, and setting the first chip as a previous-stage chip; updating the address of the previous-stage chip; enabling a next-stage chip connected after the previous-stage chip, in which the system controls the output enable terminal of the previous-stage chip to output an enable signal to enable the next-stage chip, according to the address of the previous-stage chip; and the updating the address of the next-stage chip.
US08330743B2 Power efficient capacitive detection
Capacitive detection systems, modules, and methods. In one embodiment, a power saving mode is implemented when deemed appropriate, based on an analysis of previous detection or non-detection of the presence and/or position of an object near a capacitive sensing area.
US08330738B2 Capacitive touch panel and electrode structure thereof
A transparent capacitive touch panel comprising a transparent substrate, a transparent cover lens and a transparent adhesive layer is provided, wherein a first transparent electrode layer and a second transparent electrode layer are disposed on the transparent cover lens and the transparent substrate respectively. The transparent adhesive layer is used to bind the first transparent electrode layer and second transparent electrode layer in order to combine the transparent cover lens and the transparent substrate disposed in parallel. Thereby, the manufacturing process of the transparent capacitive touch panel is simplified, and the manufacturing cost of the same is lowered.
US08330733B2 Bi-modal multiscreen interactivity
A touch-sensitive electronic display device including one or more touch-sensitive display screens and interface software. The touch-sensitive display screen(s) and interface software are configured to be responsive to touch inputs and, in the case of a multi-screen workspace, the interface software is operable to allow inputs made in connection with a first screen to generate an inertial movement of a displayed object which results in the object moving to and coming to rest on another of the screens. The touch-sensitive screen and interface software may also be configured to receive hand touch inputs and pen touch inputs, with the interface software being operable to dynamically mask regions of the touch-sensitive display to discriminate between or selectively permit/reject different types of inputs.
US08330730B1 Calibrating of interactive touch system for image compositing
A chroma-key/matte display screen system with a touch input device that allows a user to interact with the display by selecting or pointing to composite images on the display. Touch input devices include camera based, infrared, membrane, and acoustic. Displays screens include CRT, various flat screen displays such as plasma, LCD, OLED, and various projection display systems.
US08330729B2 Electric tactile sense presenting device and electric tactile sense presenting method
An electro-tactile display comprises at least one current source, arrayed electrodes, and a switching circuit for connecting each electrode to the current source or to ground. The electro-tactile display is characterized by selecting one or a plurality of electrodes from the arrayed electrodes and connecting the selected electrodes to the current source to provide current source electrodes, alternately connecting neighboring electrodes in the vicinity of said current source electrodes to the current source and to ground, connecting a plurality of remaining electrodes other than the neighboring electrodes to ground to provide ground electrodes, and providing electrical stimulation from the current source electrodes wherein the current source electrodes are spaced apart from the ground electrodes via the neighboring electrodes. Tactile sensations are presented by switching over the current source electrodes at a predetermined time interval.
US08330727B2 Generating control signals from multiple contacts
Apparatus and methods are disclosed for simultaneously tracking multiple finger and palm contacts as hands approach, touch, and slide across a proximity-sensing, multi-touch surface. Identification and classification of intuitive hand configurations and motions enables unprecedented integration of typing, resting, pointing, scrolling, 3D manipulation, and handwriting into a versatile, ergonomic computer input device.
US08330724B2 Multifunction key pad display and electronic device having the same
A multifunction key pad display for an electronic device, including: a display panel including display regions arranged in a matrix, and bounded by non-display regions as boundaries; a printed circuit board positioned on the display panel, including openings facing the display regions, and keys disposed at sides of the openings, facing the non-display regions; and a pad positioned on the printed circuit board, having transparent windows facing the openings, and pressing units facing the keys. Two rows of the keys can be arranged between two other rows of the openings.
US08330722B2 Handheld mobile communication device with flexible keys
Keypad keys for handheld mobile communication devices feature flexible key bodies and actuators extending from the key bodies. Switches below the actuators are connected in series circuits. All actuators beneath an intended key must be depressed in order for the circuit to be closed and the key to be recognized as actuated. The flexible nature of the key bodies allows one actuator on a given key to be depressed while other actuators remain non-depressed. This prevents the key from being recognized as actuated when a only a portion of the key is depressed as occurs, for example, due to finger overlap.
US08330720B2 Optical navigation system and method for performing self-calibration on the system using a calibration cover
An optical navigation system and method for performing self-calibration on the system uses captured frames of image data of an interior surface of a calibration cover of the system to detect a performance-related change of the system. In response to the detected performance-related change, a predefined procedure is then initiated.
US08330712B2 Electrophoretic display device including buffer pattern in non-display region
An electrophoretic display device includes a first substrate having a display region and a non-display region at a periphery of the display region, the display region including a pixel region; gate and data lines on the first substrate and in the display region, the gate and data lines crossing each other to define the pixel region; a gate link line connected to the gate line and positioned in the non-display region; a thin film transistor connected to the gate and data lines and positioned in the pixel region, the thin film transistor including a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode; a passivation layer of an organic insulating material over the thin film transistor and in the display region, the passivation layer having a first thickness and including a drain contact hole exposing the drain electrode; a buffer pattern formed of the same material and having the same thickness as the passivation layer, the buffer pattern positioned in the non-display region; a pixel electrode positioned in the pixel region and on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole; and an electrophoretic film on the pixel electrode and covering an entire surface of the display region, an end of the electrophoretic film positioned on the buffer pattern.
US08330711B2 Display device
A plurality of data signal lines each of which is connected to at least one pixel circuit in one pixel circuit column and is not connected to the pixel circuits of other pixel circuit columns are provided to one pixel circuit column, and the pixel circuits in the pixel circuit column are connected to any one of the plurality of data signal lines. An image display device having such a constitution can alleviate lowering of display quality attributed to transmission delay or voltage drop of a scanning signal.
US08330707B2 Lighting device for cold-cathode tube and control method thereof
A lighting device for a cold-cathode tube includes an inverter that supplies a current through the cold-cathode tube, an operation portion through which a luminance adjustment is performed, an inverter control circuit that controls the inverter in accordance with a luminance adjustment value adjusted through the operation portion so as to change the current flowing through the cold-cathode tube, and a protective circuit that stops operation of the inverter when the current flowing through the cold-cathode tube becomes smaller than a predetermined set value. The protective circuit of the lighting device is controlled in such a way that the protective circuit does not operate when the luminance adjustment value adjusted through the operation portion is smaller than a luminance threshold value.
US08330706B2 Lighting device for display device and display device
A lighting device for a display device includes a light source and a light source control device arranged to control the light source. The light source control device is arranged to generate a pulse signal as a light source control signal Vcon to control the light source. The light source control signal Vcon includes pulses, which individually have different shapes.
US08330705B2 Method of driving a light source, light source apparatus for performing the method and display apparatus having the light source apparatus
A method of driving a light source includes; driving a plurality of light source strings in response to a plurality of driving signals, when a light source module having the plurality of light source strings connected in parallel with each other receives a driving voltage, detecting a detection voltage from channel input terminals of a multichannel current control part, wherein the multichannel current control part controls a resistance difference of the plurality of light source strings based on the plurality of driving signals, and controlling a level of the driving voltage via adjusting a current applied to a feedback terminal of a driving voltage generating part, wherein the driving voltage generating part generates the driving voltage.
US08330700B2 Driving circuit and driving method of active matrix display device, and active matrix display device
In an active matrix display device, one source line is arranged for every two pixels arranged along a gate line direction, and each two pixels which are adjacent to each other along the gate line direction across one of the source lines share the source line and are each connected to different gate lines. A gate driver block performs a first driving control which sequentially selects, in a first order, the gate lines in a pair of two gate lines corresponding to two pixels which are adjacent to each other along the gate line direction and are connected to different source lines. The gate driver block also performs a second driving control which sequentially selects, in a second order which is opposite to the first order, the gate lines in such a pair of two gate lines.
US08330697B2 Methods and liquid crystal display devices that reduce/avoid tearing effects in displayed images
Methods and related liquid crystal display devices are disclosed that reduce/avoid a tearing effect in displayed images. A scan time of a scan clock signal of a display is detected. A write time of a write clock signal that writes data into a memory for display on the display is detected. The write time is regulated in response to a comparison of the scan time of the scan clock signal to the write time of the write clock signal.
US08330695B2 Liquid crystal display device, method for driving the same, and television receiver
A plurality of groups each of which includes a plurality of scanning signal lines are sequentially selected; a polarity of the data signal electric potentials in one (first group) of sequentially-selected groups is set to be different from that of the other (second group) of the two groups; two pieces of dummy scan periods are put between (i) a horizontal scan period corresponding to a last horizontal scan in the first group and (ii) a horizontal scan period corresponding to a first horizontal scan in the second group; dummy signal electric potentials are supplied to the data signal line in the dummy scan periods; and a time period from when a scanning pulse which corresponds to the last horizontal scan in the first group becomes nonactive to when the dummy scan period is started is set to be longer than a time period from when a scanning pulse corresponding to one of consecutive two horizontal scans becomes nonactive in the first group to when a horizontal scan period corresponding to the other of the consecutive two horizontal scans is started. This makes it possible to enhance display quality in a case where the data signal line is subjected to the block-reversal driving.
US08330694B2 Liquid crystal display apparatus
The liquid crystal display apparatus includes a liquid crystal modulation element including first and second electrode, a liquid crystal layer disposed between the first and second electrodes, a first alignment film disposed between the first electrode and the liquid crystal layer, and a second alignment film disposed between the second electrode and the liquid crystal layer. The apparatus further includes a controller that respectively provides first and second electric potentials to the first and second electrodes such that a sign of an electric field generated in the liquid crystal layer is cyclically inverted in a modulation operation state. The controller respectively provides third and fourth electric potentials to the first and second electrodes such that the sign of the electric field is fixed in a state other than the modulation operation state. The apparatus can avoid an influence by cumulated charged particles without adding a new member.
US08330690B2 Gamma control circuit and method thereof
A gamma control circuit includes a first gray-scale voltage selection unit that selects and outputs a highest gray-scale voltage and a lowest gray-scale voltage from among a plurality of first voltages present between a first supply voltage and a second supply voltage. A second gray-scale voltage selection unit receives the highest and lowest gray-scale voltages and selects and outputs a first intermediate voltage and a second intermediate voltage between the highest and lowest gray-scale voltages. A third gray-scale voltage selection unit receives the highest and lowest gray-scale voltages and the first and second intermediate voltages and generates a plurality of reference voltages from the received voltages. A gray-scale voltage generation unit receives the highest and lowest gray-scale voltages and the plurality of reference voltages and outputs a plurality of gray-scale voltages.
US08330687B2 Liquid crystal display
Disclosed herein is a liquid crystal display in which a system board and a timing control board can be used in common in a 60 Hz driving mode and a 120 Hz driving mode without being modified. The liquid crystal display includes a system board for identifying a driving frequency of video data and supplying the video data and control signals at a first driving frequency or second driving frequency as a result of the identification, a timing control board equipped with a timing controller for processing the video data and control signals from the system board, the timing control board supplying the processed video data and control signals at the first or second driving frequency, and a liquid crystal panel for displaying an image based on the video data and control signals supplied from the timing control board.
US08330684B2 Organic light emitting display and its driving method
In an organic light emitting display and its driving method, a pixel portion includes a plurality of pixels which express images corresponding to a scan signal, an emission control signal, and a data signal. A scan driver transfers the scan signal and the emission control signal to the pixel portion. A data driver generates and transfers a plurality of data signals to the pixel portion using video data. A frame memory stores and transfers the video data in frame periods to the data driver. A luminance controller determines a pulse of the emission control signal using frame data, which is a sum of video data stored in the frame memory. A power supply unit supplies voltages of first and second power sources to the pixel portion. The luminance controller determines the number and widths of pulses in the emission control signal corresponding to a sum of the video data.
US08330683B2 Driving method of organic electroluminescence display
A driving method of a flat panel display includes dividing one frame into a plurality of sub-frames, wherein each sub-frame includes an on-state time, each on-state time corresponds to a weight value, and at least one of the weight values is expressed in the form of a non-binary code; applying an on-state gate signal to a pixel in each sub-frame to turn on the pixel; and applying each bit of a data signal corresponding to each sub-frame to the pixel.
US08330678B2 Method of correcting nonuniformity of pixels in an OLED
Nonuniformity in an organic EL display device is effectively detected. All display pixels of an organic EL panel are turned on and the display is photographed with a digital camera. A computer performs image processing of the photographed image to detect an area in which unevenness exists. Then, a V-I curve of each pixel in the area is measured to calculate necessary correction values. The calculated correction values are stored in a memory for use in correcting a signal input to the organic EL panel.
US08330672B2 Opto-electronic display assembly
An electronic display arrangement for taking light signals forming an image emitted from a miniature screen (2) and referred to as a screen image, and for conveying them to the eye (O) of a user to enable a virtual image (I) to be viewed, the arrangement having a miniature screen control device having an arrangement for subdividing a source image into N screen images (IE) and in that it includes a mosaicing device (3) having an exit viewport (10) and serving to convey the N screen images in a manner in which they are spatially offset from one another and time shifted from one another at a period (τ) shorter than the remanence time of the retina of the eye divided by N, each screen image (IE) being conveyed towards the eye of the wearer for viewing a virtual sub-image (IN), the N resulting and adjacent virtual sub-images together forming said virtual image (I) in full, said mosaicing device (3) being constituted by a light polarization control element (5) and by an element (7) for spatially reconstructing the virtual image (I). A mosaicing device has a light pipe (6) of material that is transparent in the visible domain and said light pipe is disposed between said control element (5) and said element for spatially reconstructing the virtual image.
US08330670B2 Display device and an electronic apparatus using the same
In a conventional display device comprising a sub-display, the display device is increased in thickness and in the number of components as the number of displays is increased. In the present invention, a dual emission display device is used so that either surface of a display is used as a main display or a sub-display. Accordingly, the display device can be reduced in thickness and in the number of components. Further, mechanical reliability can be enhanced when the invention is applied to a tablet PC, a video camera and the like.
US08330666B2 Multiband antenna
A multiband antenna includes a first radio unit closed loop and a second radio unit connected to the first radio unit and symmetrical structure. When the multiband antenna functions, the first radio unit functions as a balanced loop antenna, and the second radio unit functions as a dipole antenna.
US08330664B2 Glass antenna and window glass for vehicle
A glass antenna for a vehicle includes a first to fourth elements, a connection element and a first and second feeding portions. The first element is elongated from the first feeding portion in a first direction. The second element is elongated from the first element in a second direction. The third element includes: a first partial element which is elongated from the first element in a third direction; a second partial element which is elongated from the first partial element in a fourth direction; and a third partial element which is elongated from the second partial element. The fourth element is elongated from the second feeding portion in the second direction, and detours the second element in the second direction, on a side of the second direction to be elongated in the third direction. The connection element connects the fourth element to a defogger.
US08330663B2 Glass antenna for vehicle
There is provided an antenna for a vehicle which is formed on a space above defogging heater strips of a rear window glass of the vehicle. The antenna includes an AM broadcast wave receiving antenna including a plurality of horizontal strips provided at intervals, at least two vertical strips which are orthogonal to the horizontal strips, and which are apart from each other, and a first feed point provided between the two vertical strips, on uppermost one of the horizontal strips or through an extension line extending from a portion of the uppermost one of the horizontal strips; and an FM broadcast wave receiving antenna which extends in a clockwise direction or in a counterclockwise direction from a second feed point provided above the uppermost one of the horizontal strips of the AM broadcast wave receiving antenna, along a part of an outermost portion of the AM broadcast wave receiving antenna to surround the AM broadcast wave receiving antenna, and which is adjacent to at least a part of the horizontal strips of the AM broadcast wave receiving antenna to achieve a capacitive coupling.
US08330658B2 Portable communication device
A portable communication device includes a first housing and a second housing that are slidably placed one on another and can shift between an open state and a closed state, a wireless circuit installed in the first housing, a first antenna installed in the second housing, and a noncontact switching member that connects together the first antenna and the wireless circuit in a noncontact manner in the open state and disconnects the noncontact between the first antenna and the wireless circuit in the closed state.
US08330655B2 Connectors with embedded antennas
Connectors for electronic devices are provided with embedded antennas. The connectors may be 30-pin connectors. A 30-pin connector may have a conductive shell structure that defines a cavity and a planar dielectric member that extends into the cavity and that has contact pins. An antenna may be formed from an antenna resonating element on the planar dielectric member and an antenna ground formed from the conductive shell structure. An antenna may be formed from a slot in the conductive shell. The antenna and the pins may be electrically coupled to an electronic device using a cable.
US08330654B2 Method and apparatus for positioning mobile device
A method for positioning a mobile device includes following steps. Based on a prior location point of the mobile device, many sample points are generated according to a prior probability distribution associated with the prior location point. A current moving track or a current moving status of the mobile device is obtained, and the sample points are updated according to at least one of the current moving track and the current moving status. A current estimated position is obtained based on a radio frequency signal received by the mobile device. A current probability distribution of the sample points corresponding to the radio frequency signal or the current estimated position is generated to obtain corresponding weights of the updated sample points. A current location point of the mobile device is obtained according to the weights and distribution of the sample points.
US08330651B2 Single-antenna FM/CW marine radar
A high resolution, low power marine radar for use in applications such as the newly mandated barge/river radars that are to be used in very confined spaces such as canals. An example radar system includes frequency-modulated/continuous-wave (FM/CW) radar that uses very low transmitter power (a fraction of a watt) and has an exceptionally short sensing range of a few feet or even inches if needed.
US08330646B2 Sensing/emitting apparatus, system and method
A number of apparatuses are provided, for sensing and/or emitting energy along one or more desired apparatus line of sights (LOS) with respect to the respective apparatus. In at least one embodiment, the apparatus includes an assembly that is rotatably mounted on a base with respect to a switching axis. The assembly has two or more sensing/emitting units, each having a respective sensing/emitting unit line of sight (ULOS). Each sensing/emitting unit has an operative state, wherein the respective unit ULOS is pointed along a LOS of the apparatus for sensing and/or emitting energy along the LOS, and a corresponding inoperative state, where the respective unit ULOS is pointed along a direction different from this LOS. A switching mechanism enables switching between the sensing/emitting units to selectively bring a desired sensing/emitting unit exclusively into its respective operative state while concurrently bringing a remainder of the sensing/emitting units each to a respective non-operative state. Corresponding systems and methods are also provided.
US08330645B2 Radar activation multiple access system and method
A radar activation multiple access system and method is provided that includes a plurality of radar participant nodes wirelessly connected and forming a radar network and a multiple access unit in communication with the radar network. The multiple access unit includes a scheduler component, a synch component, a priority component and a radar activation component. The scheduler component is configured to schedule a period of operation having a plurality of time divisions within the period of operation. The synch component is configured to synchronize the radar participant nodes within the period of operation. The priority component is configured to assign a priority to individual radar participant nodes in the radar network. The radar activation component is communicatively connected to the radar network and configured to determine a contentious state at a time division in the period of operation. The radar activation component instructs individual nodes to assume the role of transmitter or receiver based on the assigned priority.
US08330644B2 Expandable and reconfigurable instrument node arrays
An expandable and reconfigurable instrument node includes a feature detection means and a data processing portion in communication with the feature detection means, the data processing portion configured and disposed to process feature information. The instrument node further includes a phase locked loop (PLL) oscillator in communication with the data processing portion, the PLL oscillator configured and disposed to provide PLL information to the processing portion. The instrument node further includes a single tone transceiver and a pulse transceiver in communication with the PLL oscillator, the single tone transceiver configured and disposed to transmit or receive a single tone for phase correction of the PLL oscillator and the pulse transceiver configured and disposed to transmit and receive signals for phase correction of the PLL oscillator. The instrument node further includes a global positioning (GPA) receiver in communication with the processing portion, the GPS receiver configured and disposed to establish a global position of the instrument node.
US08330641B2 Digital multi-channel ECM transmitter
An electronic countermeasure (ECM) transceiver including a receiver for sequentially receiving a plurality of signals in respective frequency sub-bands. A processor sequentially receives the plurality of signals and identifies the received signals as threats. The processor then generates ECM signals based on the threats and sequentially outputs the ECM signals to a transmitter. The transmitter simultaneously transmits the ECM signals in the respective frequency sub-bands to address the threats.
US08330639B2 Remote controller
A remote controller for toys includes a user interface which applies the low-cost capacitive sensing method with the remote controller. Users can touch and/or drag on a remote controller surface by fingers to remotely control the movement of R/C cars, planes, helicopters or a boat. The remote controller is essentially a flat faced unit and there is no need for protruding control sticks or pushbuttons. This controller is applicable to different types of remote control toys with digital proportional control on speed and steering control. The remote controller is a symmetric product design whereby the controller is easily operable with left and right hand conventions.
US08330634B2 Precision sub-radix2 DAC with linearity calibration
A system includes an N bit sub-binary radix digital-to-analog converter (DAC) that converts an m bit digital input signal to an analog output signal, where m and N are integers greater than or equal to 1 and N>m. A radix conversion module determines a code ratio, the code ratio being a ratio of a total number of available monotonic codes to 2m, and performs radix conversion on the m bit digital input signal based on the code ratio.
US08330631B2 Background calibration method for fixed gain amplifiers
A method for calibrating a fixed gain amplifier configured as a front-end amplification stage of an analog-to-digital converter including sampling a calibration voltage with normal and inversed polarity and with the fixed gain amplifier bypassed and with the fixed gain amplifier connected. An actual gain value of the fixed gain amplifier is computed from offset corrected digital output codes generated from converting the calibration voltage. A gain correction value for the fixed gain amplifier can then be computed based on the ratio of the actual gain to the ideal gain. In another embodiment, a method for calibrating an analog-to-digital converter including a fixed gain amplifier, an input buffer and a modulator generates an offset correction value using normal and polarity inversed input samples. The offset correct value provides correction for at least offset errors in the fixed gain amplifier, the input buffer and the modulator.
US08330630B2 Phase frequency to digital converter
A circuit arrangement is described comprising a first receiver configured to receive a first input signal, a second receiver configured to receive a second input signal, a first signal generator configured to generate a first pulse signal, a second signal generator configured to generate a second pulse signal, wherein a delay between a rising edge of the first pulse signal and a rising edge of the second pulse signal is proportional to a difference between the first input signal and the second input signal, a first converter configured to convert the first pulse signal to a first digital number proportional to a width of the first pulse signal, a second converter configured to convert the second pulse signal to a second digital number proportional to a width of the second pulse signal, wherein at least one of the first converter and the second converter comprises a cascade of at least two converter stages, wherein each converter stage of the at least two converter stages is configured to propagate and shrink the respective pulse signal. Also a corresponding method is described.
US08330623B2 Method and apparatus for recognizing parking area
A method and an apparatus for recognizing a parking area are disclosed. The parking area recognizing apparatus includes: a signal transmitter transmitting a signal using a sensor; an echo signal receiver receiving an echo signal for the signal; a multiple signal generator generating a multiple echo signal using the echo signal based on first and second preset thresholds; and a parking area recognizer recognizing a parking area by calculating a round trip time and a duration time for the multiple echo signal and selecting an available echo signal based on at least one of the round trip time and the duration time. Accordingly, a precision in recognition of a parking area is enhanced by reducing a measurement error by processing an echo signal received after it is reflected on an object with a multiple echo signal in recognition of the parking area using a sensor such as an ultrasonic sensor or a radar sensor.
US08330619B2 Pulse verifier and method of operation
A device and method of counting pulse or switch contact signals over time from any commodity in various applications such as manufacturing and process control is provided. The device includes a pulse splitter relay that generates a first output pulse signal and a second pulse output signal. The first output pulse signal is transmitted to a recorder that receives the pulse signal and stores data such as date and time information when the pulse signal was received. The second output pulse signal is transmitted to a downstream system, such as a building management system for example. The data from the recorder and the downstream system may be compared to verify the pulse signals and identify potential sources for error.
US08330617B2 Wireless power and telemetry transmission between connections of well completions
An intelligent well system may include a first main bore transmission assembly disposed in a main bore and a first lateral bore transmission assembly disposed in a lateral bore. The first main bore transmission assembly may include a first main bore transmission unit, and the first lateral bore transmission assembly may include a first lateral bore transmission unit. The first main bore transmission unit and the first lateral bore transmission unit may be configured to establish a wireless connection there between, such that at least one of power or telemetry can be wirelessly transmitted. The first main bore transmission assembly may be configured to be communicatively connected to a surface communication device.
US08330616B2 Well test system to control well processes based on quantity measurements
The well test system has a net oil computer NOC that captures and stores information from disparate well instrumentation devices, measures produced oil, water, and gas quantities based on the information and controls well processes based on the quantity measurements. The NOC includes operational software that collects instrumentation data from a plurality of wells. Configuration software downloads user programmable configuration information to the NOC, which enables the NOC to record data from a wide variety of flow devices, water test meters, or the like. User programmable alarms are included. A plurality of controllers can control processes associated with individual wells. A wireless communication system electronically sends data and test results to cell phones, radio devices, and the like. A daily test data log provides a historical database, which is analyzed to formulate “Data Confidence” information for each well. The net oil computer is operable with two-phase or three-phase separators.
US08330613B2 Remote control electronic display system
A remotely controlled electronic display sign which operates with a plasma display and which provides for humidity and heat control and the like allowing the sign to be used in various environments. The sign is essentially self-contained and includes those components necessary for enabling a display of desired material from a remote control source or one located at the sign. A controller in or associated with the sign is accessible either electrically, or through satellite transmission or other wireless transmission from the remote source which allows the display of the sign to be changed at will. Thus, an operator at a remote source may, with the aid of a pre-prepared graphic design, transmit that design to the controller at or associated with the sign for display of that graphic information and potentially with sound.
US08330612B2 Container suitable for wet wipes and corresponding refill pack that provide sensory perceptible effects
A container suitable for wet wipes that comprises at least one compatibility sensor, at least one output device and at least one triggering device and a compatible a refill pack of wipes comprising a compatibility actuator. The compatibility sensor of the container and compatibility actuator of the refill pouch are designed to interact with each other. The interaction enables the operation of the output device, which functions only when triggered by the triggering device. The output device is capable of producing a sensory perceptible effect. The container and refill pack together can form a kit.
US08330610B2 System, method, and apparatus for detecting wear in a screening arrangement
A system, method, and apparatus for detecting wear in a screening arrangement is disclosed. The system, method, and apparatus can include a sensor that is configured to provide a notification signal when a surface of a screen panel has worn to a threshold level. The threshold level can be based at least in part on the amount of wear that requires replacement of a screen panel to prevent breakthrough or contamination. The notification signal provided by the sensor can be used to identify which screen panel or region of screen panels has been worn to the threshold level so that the screen panels can be replaced in a timely manner. The sensor may be coupled to a conductor embedded in one of the screen panels that is altered when a screen panel has worn to a threshold level, triggering the sensor to provide the notification signal.
US08330608B2 Systems and methods for battery status indication
A method and apparatus are provided to indicate battery capacity status. Different blinking frequencies of an LED correspond to different battery states of charge. Furthermore, the present invention provides a smooth visual brightness change of the LED by providing the appropriate LED current according to human eye characteristics.
US08330604B2 Handheld salinity analyzer
Disclosed is a handheld salinity analyzer including a body, in which a circuit board and a battery are installed, a cell block provided with one end inserted into one end of the body and the other end on which a projecting part provided with a salinity sensor hole and a depressed part provided with a temperature sensor hole are formed, a salinity sensor inserted into the salinity sensor hole and provided with one end connected to the circuit board, a temperature sensor inserted into the temperature sensor hole and provided with one end connected to the circuit board, an ON/OFF switch installed on the end of the body, a light emitting lamp connected to the circuit board, and a body cover connected to the end of the body provided with the ON/OFF switch or to the cell block, and provided with an operating piece to operate the ON/OFF switch.
US08330603B1 Method and apparatus for sensor calibration and adjustable pump time in a dewatering system
A dewatering system includes a selective calibrating sensor circuit configured to receive sensor readings from an electronic sensor, to determine if the electronic sensor is immersed in water, to allow a user to adjust a pump down time in the field, and to generate a control output signal accordingly. The selective calibrating sensor circuit periodically performs a self-calibration when the electronic sensor is not immersed in water to cancel the effect of potential contaminants deposited on the electronic sensor over its operating life. The selective calibrating sensor circuit inhibits calibration when the electronic sensor is immersed in water. In some applications with multiple electronic sensors, the selective calibrating sensor circuit disconnects from one of the electronic sensors before performing the self-calibration.
US08330601B2 Three dimensional RF signatures
Three dimensional RF tag signatures may be obtained from a three dimensional RF tag or multiple two or three dimensional RF tags so that information in addition to presence information may be obtained. In one embodiment, a three dimensional RF tag having two or more power coils disposed in non-coplanar planes enables the coils to experience different levels of excitation from an electromagnetic field. This information may be transmitted along with the RF tag response to enable the orientation of the RF tag relative to an RF tag reader to be determined. In another embodiment, multiple RF tags (either standard RF tags or three dimensional RF tags) may be used on a given article and a response signature from the article as a whole may be recorded. The three dimensional response signature thus collected may be compared with previous versions of the response signature to determine if the article has been altered.
US08330598B2 Aggregated user presence management method within a home network and device for user presence management within a home network
The present invention relates to a presence management method within home network. The presence of one or more users at one or more devices within a home network is determined and the determined presence information for the one or more users is stored. If data from a remote server having a specific recipient are received, then it is determined which of the one or more users corresponds to the recipient and the received data are sent in accordance with the stored presence information to at least one device within the home network for which the presence of the one or more users corresponding to the recipient has been stored. The present invention further relates to a presence management device for managing presence information within a home network.
US08330592B2 Collision warning device for motor vehicles
A collision warning device for motor vehicles includes a locating sensor, a lane recognition module for detecting the number of traffic lanes in the road on which the vehicle is traveling, and a decision unit to output a warning signal if a danger parameter (ttc) determined using the data from the locating sensor exceeds a threshold value, the threshold value being variable depending on the number of traffic lanes in such a way that the warning signal is issued earlier when the number of lanes is greater.
US08330591B2 Method and system for adjusting vehicular components based on sun position
A system for adjusting components in an automobile to compensate for impinging sunlight includes a solar data generator configured to generate solar data concerning a current location, heading, date and time of a vehicle. A solar data calculator is coupled to the solar data generator and configured to receive solar data and determine a vehicle component affected by impinging sunlight. A body control manager is coupled to the solar data calculator and operable to control the vehicle component to compensate for impinging sunlight.
US08330590B2 User interface feedback apparatus, user interface feedback method, and program
A user interface feedback apparatus includes an operable element, a sensor, a processing unit, and a tactile control module. The operable element has a two-layer structure made up of a conductor and an insulator. The sensor detects, in the form of user contact information, at least a user contact position with respect to the insulator of the operable element. The processing unit acquires the detected information from the sensor, and determines parameters for an electrical signal to be output to the conductor. The tactile control module controls the frictional force between the insulator and the user by outputting to the conductor an electrical signal regulated by the parameters determined by the processing unit.
US08330586B2 Systems and methods for programming of a cooling fan via a serial port communication mode
Embodiments of the present disclosure provide a method that comprises, based upon receipt of a mode command, changing an operating mode of a fan motor controller of a fan to a serial port communication protocol, programming a memory of the fan motor controller with an operating parameter of the fan, and based upon receipt of a serial port command, changing the operating mode of the fan motor controller from the serial port communication protocol to another protocol.
US08330585B2 Power supply employing pulse-width modulation and digital-to-analog converter, power supply control device, and manufacturing method of the same
A power supply for supplying electric power comprises a power circuit which supplies L channels of electric power (L: positive integer), a control circuit board which outputs multiple types of control signals including a digital control signal and a PWM signal, a digital-to-analog converter having M channels (M: positive integer less than L) each of which converts the digital control signal into an analog control signal, and N demodulation circuits (N=L−M) each of which generates an analog control signal by demodulating the PWM signal. The control circuit board is electrically connected to the power circuit via the M channels of the digital-to-analog converter and the N demodulation circuits. N is a positive integer not more than M.
US08330582B2 Online remote control configuration system
A remote control is configured to control a multimedia appliance and to be communicatively coupled to a remote server via a network. The remote server is configured to provides information to the remote control via the network. The remote control includes a transmitter configured to send commands to the multimedia appliance. The remote control further includes a memory configured to store information provided by the remote server. The remote control further includes a controller configured to synchronize information with the remote server to obtain current information on an irregular basis from the remote server to thereby obtain information that degrades partially over time.
US08330579B2 Radio-frequency auto-identification system for dialysis systems
A medical fluid delivery system includes a dialysis instrument; a disposable pumping cassette operable with a pumping actuator of the dialysis instrument, the disposable cassette including or connected fluidly to a plurality of first connectors; a plurality of second connectors configured to interface with the first connectors, each second connector associated with a radio frequency (“RFID”) tag; and electronics configured to read the RFID tags via a plurality of antennae and to identify that each of the second connectors is positioned properly with respect to a proper one of the first connectors.
US08330578B2 Transponder device and method for providing a supply voltage
Transponder circuit arrangement having antenna connections for application of a voltage signal, a load-reduction modulation device, which is coupled to the antenna connections and is designed to modulate the applied, unmodulated voltage signal, which is at a first level, and a voltage conversion device, which is coupled to the load-reduction modulation device and is designed to provide a supply voltage, the magnitude of whose level is greater than the first level.
US08330577B2 Simplified biometric character sequence entry
A device having a biometric input device is configured to allow a user to enter a character sequence for use in validation using the biometric input device. A predetermined assignment of characters to enrolled biometric templates allows a user to determine a sequence of biometric inputs to provide to enter an appropriate character sequence.
US08330573B2 Systems, methods, and kits for automatically activating a garage door by sensing motion of an automobile
Systems, methods, and kits for automatically activating a garage door opener. A garage door opener system is supplemented with motion sensor technology or RFID technology to allow for automatic activation of a garage door opener. An automobile that is moving near or is proximate to a garage associated with at least one garage door opener can cause the garage door opener to be automatically activated to open or close a garage door that is operatively connected to the garage door opener.
US08330565B2 Noise decreasing type electromagnetic switch
A noise decreasing type electromagnetic switch includes a buffer disposed between a stationary core and a contact spring to electrically support a shaft and the stationary core. The buffer includes a buffering space therein. Accordingly, impact caused at the stationary core and the shaft can be effectively absorbed even by the buffering space as well as an elastic force of the buffer. The buffer is inserted in the stationary core for coupling so as to be prevented from being separated during operations, resulting in maintaining long-term durability. Also, the buffer may support the stationary core and a metal plate, whereby an assembly process can be simplified.
US08330562B2 Variable resonator, tunable filter, and electric circuit device
A variable resonator that comprises a loop line (902) to which two or more switches (903) are connected and N variable reactance means (102) (N≧3), in which switches (903) are severally connected to different positions on the loop line (902), the other ends of the switches are severally connected to a ground conductor, and the switches are capable of switching electrical connection/non-connection between the ground conductor and the loop line (902), the variable reactance blocks (102) are severally settable to the same reactance value, and the variable reactance blocks (102) are electrically connected to the loop line (902) as branching circuits along the circumference direction of the loop line (902) at equal electrical length intervals.
US08330560B2 Tuning-fork type crystal resonator and method of frequency adjustment thereof
The invention relates to a tuning-fork type crystal resonator in which the frequency adjustment accuracy is increased, and a frequency adjustment method thereof. In a tuning-fork type crystal resonator having a tuning-fork shaped piece of quartz crystal in which a pair of tuning fork arms extend from a tuning fork base, and a frequency adjustment method thereof, there is provided a first frequency adjustment step for adjusting an oscillation frequency by forming inclined surfaces spanning from outer peripheral surfaces surrounding the pair of tuning fork arms toward distal end surfaces, by using a femtosecond laser irradiated in a direction from the outer peripheral surfaces toward the distal end surfaces, or in a direction from the distal end surfaces toward the outer peripheral surfaces.
US08330558B2 Filter and antenna duplexer
There is provided a filter including a first resonator, a second resonator in which an excitation efficiency is reduced more than the first resonator, and an inductor connected in parallel with the second resonator.
US08330555B2 Bandpass filter, and wireless communication module and wireless communication apparatus which employ the bandpass filter
An ultra-wideband bandpass filter having two adequately-wide pass bands, and a wireless communication module and a wireless communication apparatus which employ the bandpass filter are provided. In a bandpass filter, first resonant electrodes are arranged on a first interlayer of a multilayer body in an interdigital form; a plurality of second resonant electrodes are arranged on a second interlayer in an interdigital form; and an input coupling electrode and an output coupling electrode are arranged on a third interlayer located between the first interlayer and the second interlayer. The input coupling electrode faces an input-stage first resonant electrode and an input-stage second resonant electrode in an interdigital form. The output coupling electrode faces an output stage first resonant electrode and an output-stage second resonant electrode in an interdigital form.
US08330553B2 Duplexer
A duplexer includes an acoustic wave element having a first terminal and a second terminal; a substrate; a first columnar conductor electrically connected to the first terminal, and drawn to a back surface of the substrate while partially in the substrate; a second columnar conductor electrically connected to the second terminal, and drawn to the back surface of the substrate while partially in the substrate. Additionally, a first ground pattern region is between the first columnar conductor drawn part and the second columnar conductor drawn part on the back surface of the substrate; a second ground pattern region is electrically connected to the first ground pattern region and arranged in the part not including the part between the first columnar conductor drawn part and the second columnar conductor drawn part; and a third columnar conductor electrically is connected to the first ground pattern region while partially in the substrate.
US08330552B2 Sandwich structure for directional coupler
A sandwich strip coupled coupler implemented in a multi-layer substrate, such as a multi-layer printed circuit board. In one example, the sandwich strip coupled coupler includes a main arm having a first main arm section and a second main arm section disposed above the first main arm section, the first and second main arm sections being electrically connected together, and a coupled arm disposed between the first and second main arm sections, the first main arm section, the coupled arm and the second main arm section forming a sandwich structure.
US08330551B2 Dual band high frequency amplifier using composite right/left handed transmission line
Disclosed herein is a dual band high frequency amplifier using a composite right/left handed (CRLH) transmission line (TL). Accordingly, a CRLH TL structure having a dual band characteristic is inserted into an input matching circuit and/or an output matching circuit in the high frequency amplifier, and a matching circuit is designed so that impedance matching is performed at two frequencies, thereby obtaining both gain and matching characteristics at the two frequencies.
US08330546B2 Systems and methods for saturation correction in a power control loop
A power amplification circuit includes a power amplifier, an RF detector, an error amplifier, a saturation detector, and an offset circuit. The power amplifier provides an amplified signal based on an input signal and a gain control signal. The RF detector provides a detection signal indicative of a logarithm of the power of the amplified signal. The error amplifier provides the gain control signal based on an amplification control signal and the detection signal. The saturation detector provides a saturation signal in response to the gain control signal differing from a reference signal by less than a first predetermined voltage. The offset circuit decreases a voltage level of the amplification control signal by up to a second predetermined voltage in response to the saturation signal and the amplification control signal differing from the detection signal by less than the second predetermined voltage.
US08330544B2 Power amplification circuit having transformer
In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.
US08330540B2 Model based distortion reduction for power amplifiers
A method of processing a signal is disclosed. The method comprises generating a digital signal, converting the digital signal to an analog signal, and generating an amplified analog signal having distortions. The method further comprises converting the amplified analog signal to a feedback digital signal at a sample rate and updating a model of the distortions based on the feedback digital signal.
US08330531B2 Internal negative voltage generation device
An internal negative voltage generation device includes a first internal negative voltage generation block configured to generate a first internal negative voltage which is lower than a ground voltage; a second internal negative voltage generation block configured to generate a second internal negative voltage according to the first internal negative voltage, the second internal negative voltage being higher than the first internal negative voltage and lower than the ground voltage; and an initial driving block configured to additionally drive a second internal negative voltage terminal to the first internal negative voltage during an initial set time interval of an active operation time interval.
US08330530B2 Apparatus and method for disabling well bias
Apparatuses and methods for disabling well bias are disclosed. In one embodiment, an apparatus includes a complimentary metal oxide semiconductor (CMOS) switch having a gate, a drain, a source, and a well. The source and drain are formed in the well. The gate is formed adjacent the well between the source and drain, and the source is configured to receive a bias voltage from a power amplifier. The apparatus further includes a well bias control block for biasing the well voltage of the first switch and a disable circuit for disabling the well bias control block so as to prevent the well bias control block from biasing the well. The well bias control block can bias the well voltage of the first switch to at least two voltage levels.
US08330529B1 Voltage regulator
Embodiments of a method, apparatus and circuit for voltage regulation are disclosed. One embodiment of a circuit includes a first field effect transistor (FET) having a gate, a drain and a source. A current source is connected to the drain of the FET. A second FET has a source connected to the source of the first FET by a node. The second FET also has a gate. A low-pass filter circuit has an input connected to the gate of the first FET and an output connected to the gate of the second FET.
US08330526B2 Low voltage detector
A low voltage detector (100) includes a voltage and current reference circuit (102); a power supply voltage monitor circuit (104), coupled to the voltage and current reference circuit and to a power supply; and a voltage comparator (106), coupled to the voltage and current reference circuit and to the power supply voltage monitor circuit. The voltage and current reference circuit includes a self-cascode MOSFET structure (SCM) (110) that produces a reference voltage. The power supply voltage monitoring circuit includes another SCM (140) that produces a monitor voltage, related to the power supply voltage. The reference voltage and the monitor voltage have a same behavior with changes in temperature, thereby allowing the trip point of the low voltage detector to minimally vary with temperature. The low voltage detector is disposed on an integrated circuit (101), and the transistors of the low voltage detector consist of only CMOS transistors.
US08330523B2 Stable ON-resistance switch circuit
This document discusses, among other things, a compensation circuit configured to modulate a control voltage of a switch over a range of ambient temperatures during a conduction state of the switch to maintain a specified resistance between first and second nodes of the switch. The compensation circuit can include a temperature-insensitive resistor configured to provide a sense current, a current mirror configured to provide a mirror current using the sense current, and a temperature-sensitive resistor configured to provide the control voltage using the mirror current.
US08330521B2 Level shift circuit with improved DV/DT sensing and noise blocking
A level shift circuit in accordance with the present application seeks to meet the need of high voltage level shift signaling with minimum delay and power dissipation by using parasitic emulation, blocking of signaling during times of common mode noise, and mismatch filtering to enhance operation robustness to circuit mismatch and delay. A dv/dt sensing circuit is provided to detect any slew in offset between negative supply voltages and ground in a circuit. This detection is used to control a noise canceling circuit to ensure that noise that results from that offset is not propagated to the output of the level shift circuit. A parasitic emulator is preferably used to provide dv/dt sensing. The output of the parasitic emulator is used to activate a noise canceling circuit to prevent noise from reaching the output terminal of the level shift circuit.
US08330520B2 Limiter circuit
The limiter circuit of this invention is a limiter circuit which, by switching action of a pair of transistors, allows passage of only signal voltage components of an input signal voltage included in ranges of an upper limit signal voltage and a lower limit signal voltage. With this construction, the pair of transistors carry out comparisons between the input signal voltage and threshold signal voltages and line switching at the same time. Therefore, there is no influence of propagation delay speed, and no switching noise occurs at times of line switching. Since diodes are not used, a high-speed limiter circuit can be manufactured.
US08330519B2 System and method of transistor switch biasing in a high power semiconductor switch
A circuit and method are provided for switching in a semiconductor based high power switch. Complementary p-type based transistors are utilized along insertion loss insensitive paths allowing biasing voltages to alternate between supply and ground, allowing for negative voltage supplies and blocking capacitors to be dispensed with, while improving performance.
US08330514B2 One-shot circuit capable of being integrated into a chip, transmitter capable of reducing start-up time, and related method
A one-shot circuit capable of being integrated into a chip generates a frequency-dividing signal according to a reference clock signal of a clock signal generator by means of a frequency-dividing circuit. In this way, the order of the magnitude of the cycle length of the frequency-dividing signal can be raised up by increasing the frequency-dividing times in the frequency-dividing circuit, so that the resistance and the capacitance of an RC oscillator of the clock signal generator are effectively reduced. Therefore, the circuited area occupied by the RC oscillator of the clock signal generator is reduced, so that the one shot circuit can be integrated into a chip without increasing the cost.
US08330513B2 Voltage hold circuit
A voltage hold circuit includes four switches, an operational amplifier and a capacitor. By turning the switches on and off, the operational amplifier functions as a unity-gain buffer. In the normal operation mode, the positive input end of the operational amplifier is coupled to a node, and the output end of the operational amplifier is coupled to the capacitor. Thus the voltage of the capacitor is equal to the voltage of the node. In the power off mode, the positive input end of the operational amplifier is coupled d to the capacitor, and the output end of the operational amplifier is coupled to the node. Thus the voltage of the node is equal to the voltage of the capacitor. Therefore, the voltage hold circuit is able to hold the voltage of the node in the power down state.
US08330512B2 Variable unit delay circuit and clock generation circuit for semiconductor apparatus using the same
A clock generation circuit of a semiconductor apparatus includes a first phase detection block configured to compare initial phases of a reference clock signal and an output clock signal in response to an operation start signal, and output an initial phase difference detection signal corresponding to a comparison result; a second phase detection block configured to compare phases of the reference clock signal and the output clock signal, and output a phase detection signal corresponding to a comparison result; a variable unit delay block determined in a control range of the delay amount thereof in response to the initial phase difference detection signal, and configured to delay the reference clock signal by a delay amount corresponding to a voltage level of a control voltage and output the output clock signal; and a delay control block configured to generate the control voltage which has the voltage level corresponding to the phase detection signal.
US08330510B2 Dual phase detector phase-locked loop
A phase-locked loop for generating an output signal that has a predetermined frequency relationship with a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a charge pump arranged to generate current pulses for controlling the signal generator, two control units for controlling a duration of the current pulses generated by the charge pump and a selection unit arranged to select either the first control unit or the second control unit to control the charge pump, wherein a first one of the control units is arranged to continuously monitor a phase-difference between the reference signal and a feedback signal formed from the output signal and to, when selected by the selection unit, control the charge pump to output a current pulse having a duration that is dependent on that phase-difference and a second one of the control units is arranged to, when selected by the selection unit, control the charge pump to output a current pulse of predetermined duration that compensates for a phase error in the feedback signal.
US08330509B2 Suppression of low-frequency noise from phase detector in phase control loop
The disclosed invention provides a structure and method for improving performance of a phase locked loop by suppressing low-frequency noise produced by a phase detector. This is achieved by up-conversion of the in-band frequency components in the phase difference between reference signal and feedback signal to a higher frequency range where noise performance of a phase detector is improved. The up-converted phase difference is provided to a phase detector that is configured to determine an error signal based upon this phase difference. The error signal is output to a down-converter configured to down-convert the error signal (e.g., back to the original frequency range), thereby intrinsically up-converting the error signal's low-frequency noise (produced by the phase detector), prior to being provided to a filter configured to filter the up-converted noise, thereby resulting in an improved PLL noise performance.
US08330507B2 Driving controller and internal voltage generation circuit
A driving controller for use in stabilizing transient voltages from power supplies is presented. The driving controller includes a first pulse generator, a second pulse generator, and a control signal generator. The first pulse generator is configured to generate a power-up pulse signal including a pulse activating at a time of terminating a power-up period. The second pulse generator is configured to generate a detection pulse signal including a pulse that is being active from a time when an internal voltage reaches a predetermined level. The control signal generator is configured to generate an operation control signal, which controls a driving controller activating the internal voltage, in response to the power-up pulse signal and the detection pulse signal.
US08330505B2 Protection circuit for driving capacitive loads
A detection circuit is coupled to an output terminal of a driver circuit. The detection circuit includes a comparator to compare a signal at the output terminal to a reference signal corresponding to a signal that would be generated if a capacitive load having a relatively high capacitance value were connected to the output terminal. Output of the comparator is sampled at a predetermined time after the driver circuit provides the drive signal. An error signal is generated when the sampled output indicates that the capacitive load having the relatively high capacitance value is actually connected to the output terminal.
US08330502B2 Systems and methods for detecting interference in an integrated circuit
Apparatus, systems and methods are provided for protecting a processing system from electromagnetic interference. An integrated circuit comprises a sensing arrangement configured to sense an interference signal and an interference detection module coupled to the sensing arrangement. The interference detection module is configured to detect when a power level associated with the interference signal is greater than a threshold value. In one embodiment, the interference detection module generates an interrupt for a processing system when the power level associated with the interference signal is greater than the threshold value.
US08330500B2 Comparator
A comparator comprises a current mirror, a differential input pair, and a auxiliary circuit. The current mirror has a biasing end coupled to a power voltage, a first end, and a current outputting end coupled to an output node of the comparator. The differential input pair has a first and second input ends for respectively receiving a first voltage and a second voltage, a second and third ends, and a ground end, wherein the third end is coupled to the first end. The auxiliary circuit is coupled between the output node and the second end, and provides a minimum voltage of a comparison result output at the output node. The comparison result is the power voltage when the first voltage is larger than the second voltage, and the comparison result is the minimum voltage when the first voltage is less than the second voltage.
US08330498B2 Sense amplifier and electronic apparatus using the same
A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
US08330495B2 Countermeasure method and device for protecting data circulating in an electronic component
A countermeasure in a logic circuit having a logic gate supplying a binary output signal, the method including supplying binary data having random values to inputs of logic circuit during a precharge phase; supplying data to process to inputs of the logic circuit during a data processing phase; supplying on input of the logic circuit a precharge command signal launching a precharge phase; and under the effect of the precharge command signal, adapting the functioning of a logic gate of the logic circuit, statistically unbalanced, so that the output signal of the logic gate is in a binary state with a same probability as the random binary data supplied on input of the logic circuit during the precharge phase.
US08330492B2 Liquid crystal display device and electronic device
To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.
US08330491B2 Electronic device with a high voltage tolerant unit
An electronic device is provided with a high-voltage tolerant circuit. The high-voltage tolerant circuit comprises an input terminal for receiving an input signal (VIN), a first node (A) and a second node (B), wherein the second node (B) is coupled to an input of a receiver (R). The high-voltage tolerant circuit furthermore comprises a first NMOS transistor (N1) and a first PMOS transistor (P1) coupled in parallel between the input terminal and the second node(B). Furthermore, a second PMOS transistor (P2) is coupled between the input terminal and node A and a second NMOS transistor is coupled with one of its terminals to the first node. The gate of the first NMOS transistor (N2) is coupled to a supply voltage (VDDE). The gate of the first PMOS transistor (P1) is coupled to the first node (A). The gate of the second NMOS transistor (N2) and the gate of the second PMOS transistor (P2) are coupled to the supply voltage (VDDE).
US08330487B2 Semiconductor device
The semiconductor device may include, but is not limited to, a first switching circuit, a second switching circuit, and a control circuit. The first switching circuit switches between first and second states. The second switching circuit switches between the first and second states. The second switching circuit reduces a first power impedance across the first switching circuit. The control circuit is coupled to the first and second switching circuits. The control circuit keeps the first switching circuit in the first state. The control circuit switches the second switching circuit from the second state to the first state.
US08330484B2 Integrated circuit and method of testing the integrity of electrical connection of the circuit to external equipment
An integrated circuit and method of testing the integrity of the electrical connection of the integrated circuit to external equipment are provided. The integrated circuit comprises an output port including output contacts for coupling the integrated circuit to external equipment, via external connectors. The output port receives internal operational signals and routes the operational signals to the output contacts for connection of the operational signals to external equipment. A connection test signal store is dynamically loadable with test signals. Signals sent to the output port can be switched between the test signals and operational signals. External equipment monitors the integrity of an electrical connection between the output contacts and the external connectors by detecting expected transitions in the test signals.
US08330481B2 Probe assembly and manufacturing method thereof
A probe assembly has insertion holes formed in a base layer provided on a circuit board. Probe pins are inserted into the insertion holes and fixed by a conductive adhesive filled in the insertion holes. The probe pins can be arranged with small pitch without mechanically electrically interfering with neighboring pins using the insertion holes. Furthermore, the base layer is formed of a semiconductor material to prevent a problem caused by a difference in the coefficient of thermal expansion between the base layer and a wafer. Moreover, coplanarity and alignment accuracy of the probe pins can be improved using aligning mask layers or aligning mask in a process of manufacturing the probe assembly. In addition, probe assembly manufacturing time can be reduced by using a pin array frame into which a large number of probe pins are temporarily inserted.
US08330472B2 Device and method for detecting electrical properties of a sample of an excitable material
A device for detecting electrical properties of a sample of an excitable material, in particular of a silicon wafer, comprises a microwave source for generating a microwave field, a resonance system which is coupled to the microwave source in a microwave-transmitting manner, the resonance system comprising a microwave resonator with at least one opening and a sample to be examined which is arranged next to the at least one opening, at least one excitation source which is arranged in the surroundings of the sample for controlled electrical excitation of the sample, and a measuring device for measuring at least one physical parameter of the resonance system.
US08330469B2 Battery voltage monitoring apparatus
A battery voltage monitoring apparatus monitoring an assembled battery voltage, the assembled battery including a plurality of battery cells, includes a voltage sensor detecting potential of the plurality of battery cells; an output logic circuit outputting a potential detect signal based on an output of the voltage sensor, the potential detect signal representing that abnormal potential is detected; and a delay circuit adding certain delay to the output of the voltage sensor and outputting the delayed voltage detect signal to the output logic circuit; wherein, the voltage sensor comprises at least one comparator having hysteresis characteristic, and detects the potential of the battery cell based on an output of the comparator.
US08330468B2 Vehicle control system having automatic engine stop function selectively enabled/disabled based on estimated charge amount in battery
Each time that starting of a vehicle engine is completed, a vehicle control system derives an estimated amount by which the charge in the vehicle battery is less than a predetermined upper limit value of stored charge, and subtracts the estimated amount from the difference between the upper limit value and a lower limit value of stored charge, to obtain an initial allowable discharge amount. An automatic engine stop/restart function is thereafter enabled or inhibited in accordance with whether a net amount of discharge from the battery, since completion of the preceding engine start, exceeds the initial allowable discharge amount.
US08330467B2 System and method for monitoring electrolyte levels in a battery
A measuring device is used in conjunction with a programmable controller for monitoring electrolyte levels in the battery. According to one implementation, the measuring device is located in a battery and is configured to detect when the electrolyte level in the battery falls below a particular level. The controller is in electrical communication with the electrolyte detection device. The controller is configured to: (i) receive a signal from the electrolyte level detection device indicating when the electrolyte level in the battery has fallen below the particular level; (ii) introduce a wait-period after the signal is received; and (iii) enable an indicator to indicate that the electrolyte level in the battery should be refilled when the wait-period expires.
US08330466B2 Method for electrical investigation of a borehole
A method used in electrical investigation of geological formations surrounding a borehole comprising: determining S1 a grid of iso-parameter lines GR in a two-dimensional plane, the parameter being an electrical parameter characterizing the geological formation, injecting in a localized manner a survey current IS into a selected zone SZ of the geological formations GF surrounding the borehole BH, and measuring S2 a measured value of a quantity characterizing the electrical parameter of the selected zone based on the survey current, and interpolating S3 an interpolated electrical parameter value of the selected zone SZ based on the measured value and the grid of iso-parameter lines GR.
US08330464B2 Data acquisition method with a three dimensional small bin electromagnetic consecutive array
Disclosed herein is a three dimensional small bin electromagnetic consecutive array data acquisition method used in oil exploration comprising the steps of recording data using small bin lattices on execution of arrangement electrodes, each acquisition station (Ex, Ey) records the natural electromagnetic field time series data with the same acquisition parameter simultaneously; interference is removed first, for recorded data processing to get interference-free data; for border points and center point, the recording point serves as center point, and the same component from adjacent two points to total points area added together to obtain the average value of electric field data at time domain for each observation point; for corner points, the average values of the same electric field component from adjacent two points to total survey points toward bin direction is calculated; the electric field components acquired in maximum space serve as the new electric field values respectively; new time series data acquired in which the noise and the static shift effect have been suppressed, and apparent resistivity and phase curves of each point are acquired after processing with conventional method.
US08330463B2 Protection of a multidirectional antenna
The disclosure provides an apparatus and method for estimating one or more formation properties downhole. The apparatus includes a tool body that has a longitudinal axis. The tool body has a number of metallic pillars that are attached to or are an integral part of the tool body. Antenna wires may be positioned on the tool body between the pillars in a plurality of orientations to provide a multidirectional antenna. An insulating material is used to cover the antenna wires. A high magnetic permeability material is placed between the antenna wires and the tool body. The antenna may be configured to operate as a transmitter or as a receiver for a resistivity sensor or an NMR sensor.
US08330458B2 Nondestructive inspection apparatus using squid magnetic sensor
There is provided a nondestructive inspection apparatus using a SQUID magnetic sensor which allows nondestructive and accurate detection of magnetic particles in an insulator such as an electronic device or in a magnetizable member. The nondestructive inspection apparatus using the SQUID magnetic sensor comprises: a magnet for horizontal magnetization 4, the magnet applying a magnetic field to a specimen in the longitudinal direction of the specimen 3′; an inspection unit on which a specimen 3 is set, the specimen 3 being horizontally magnetized in the longitudinal direction by the magnet for horizontal magnetization 4; and belt conveyers 2, 5 for conveying the horizontally magnetized specimen 3; and a gradiometer 8 for detecting a particle horizontally magnetized along with a magnetizable member as the horizontally magnetized specimen 3.
US08330456B2 Rotational angle sensing device
First and second magnets are installed to an inner peripheral wall of a yoke, which is configured into a tubular form. The yoke is constructed from at least one plate material. At each contact portion, a corresponding circumferential end part of the at least one plate material and another corresponding circumferential end part of the at least one plate material contact with each other. A Hall IC is placed in a magnetic field, which is generated between the first and second magnets.
US08330453B2 Current detection apparatus
The invention concerns a current detection apparatus for detection of a current flowing through a conductor (1) by detection of a magnetic field surrounding the conductor. The current detection apparatus includes at least one sensor element (3) provided on a carrier portion (4) for detection of the magnetic field, and a predetermined region (S) of the conductor (1), at which the at least one sensor element is arranged. The conductor (1) in the predetermined region (S) has a plurality of conductor portions (11, 12; La, Lb) which have the current to be measured flowing therethrough in the same direction and which are spaced from each other by a predetermined spacing and which form an intermediate space (2). The carrier portion (4) is fitted into the intermediate space in such a way that the at least one sensor element (3) is arranged outside the intermediate space in adjacent relationship therewith in the magnetic field of the conductor (1).
US08330448B2 Power supply testing system
A system for testing a conversion efficiency of a power supply unit includes a power meter, a plurality of switches, a multimeter, a microcontroller unit (MCU), a computer, and a signal conversion circuit for communicatively connecting the MCU to the computer. The power meter is capable of measuring an input power supplied to the power supply unit. The switches are powered on/off according to a sequence predetermined by the computer. The multimeter is configured to measure an output power of the power supply. The computer is capable of reading data measured from the power meter and the multimeter and calculating a conversion efficiency of the power supply unit.
US08330446B2 Calibration apparatus and calibration method thereof
A calibration apparatus includes: a first circuit arranged for generating a reference voltage with respect to a first circuit element according to a reference current flowing to the first circuit element; a second circuit arranged for generating an output voltage according to a tunable current; and an adjusting circuit for adjusting the tunable current to a target current value according to the reference voltage and the output voltage, wherein the adjusting circuit comprises: a search unit for performing a search according to a comparison result of the reference voltage and the output voltage to thereby determine a control setting; and a control unit coupled to the search unit, and for generating a control signal to the second circuit according to the control setting, and after the search unit adjusts the control setting, the search unit stops adjusting the control setting according to the comparison result.
US08330439B2 System and method for PFM/PWM mode transition within a multi-phase buck converter
A multi-phase voltage regulator comprises a plurality of DC/DC voltage regulators. Each of the DC/DC voltage regulators is associated with a particular phase of the multi-phase regulator. Each of the regulators comprises a first switching transistor connected between an input voltage node and a phase node responsive to switching control signals. A second switching transistor is connected between the phase node and a ground node and is responsive to the switching control signals. An inductor is connected between the phase node and an output voltage node. Control logic generates the switching control signals responsive to a pulse control signal. PFM/PWM transition logic generates the pulse control signal. The pulse control signal transitions between a PWM signal and a PFM signal responsive to an error voltage, a feedback voltage from the output voltage node and an inductor current through the inductor. An error amplifier generates the error voltage responsive to the feedback voltage and a reference voltage. The output of each error amplifier in each of the plurality of phases are connected to each other. A capacitor is connected between the output voltage node and a ground node.
US08330438B2 Method and apparatus for equalizing phase currents in multiphase switching power converters
A method and apparatus for equalizing phase currents in multiphase switching power converters is described in which pairs of stored digital values that directly or indirectly control the values of the currents in the conversion phases are altered in equal and opposite increments. In one embodiment the digital values being controlled are the relative on-times of the power switches in pairs of conversion phase. The method is stepwise and repetitive in the sense that, instead of calculating or inferring offset values that seek to bring all of the currents in the phases toward equality, pairs of phase currents are altered repetitively and iteratively, using equal and opposite steps in the values of their respective control variables, until the phases are all sufficiently close in value. The steps may be of fixed size or the step size may be selectively modified to optimize the convergence time of the algorithm.
US08330433B2 Control device reactive power compensator and method
A control device for controlling a reactive power compensator connected to an electric power network and arranged to provide reactive power to the electric power network. The control device includes a voltage regulator outputting a control signal to the reactive power compensator for controlling its supply of susceptance to the electric power network. The control device includes a gain-adjusting device arranged to adjust the gain of the voltage regulator relative to the point of operation of the reactive power compensator.
US08330428B2 Lead acid battery de-sulfation
A de-sulfating device including a plurality of capacitive discharge channels selectively activatable by a control board to provide a pulse wave modulated de-sulfating current to a lead-acid battery. Some exemplary embodiments may provide a de-sulfating current comprising a repeating pattern including an about 0.75 ms ON pulse followed by an about 4.5 ms OFF period, which may be applied to the battery at an operator-adjustable peak amperage of about 0-350 amps. The extent of sulfation of the battery may be ascertained by measuring the impedance of the battery.
US08330425B2 System for and method of detecting a non-functional battery back-up unit (BBU) of an optical network terminal
A system for and method of for detecting a non-functional battery back-up unit (BBU) of an optical network terminal is presented. The system and method may include receiving power outage data associated with a plurality of customer sites, receiving, from each of the plurality of customer sites, discharge time data associated with a battery via a network, calculating a mean discharge time based on the discharge time data, comparing the discharge time data associated with each battery to the mean discharge time, determining that each battery that is associated with discharge time data that indicates a discharge time value that is less than the mean discharge time is faulty, and outputting a data signal that indicates that a battery is faulty.
US08330420B2 Dynamically reconfigurable framework for a large-scale battery system
A dynamically reconfigurable framework is provided for a large-scale battery system. The framework is comprised of a plurality of battery circuits arranged adjacent to each other to form a battery-cell array that is coupled to an application load. A given battery circuit includes: a battery cell with an input terminal and an output terminal; a first switch connected between the load and an input terminal of the battery cell; a second switch is connected between an input terminal of the battery cell and an output terminal of a battery cell in an immediately adjacent battery circuit; and a third switch connected between the output terminal of the battery cell and the output terminal of the battery cell in the adjacent battery circuit. The battery-cell array also includes a local controller that selectively controls the switches in the plurality of battery circuits.
US08330419B2 Dynamically reconfigurable framework for a large-scale battery system
A dynamically reconfigurable battery framework for management of a large-scale battery system systems is provided. The framework monitors, reconfigures, and controls large-scale battery systems online. The framework is built upon a topology-based bypassing mechanism that provides a set of rules for changing the battery-pack configuration, and a semantic bypassing mechanism by which the battery-cell connectivity is reconfigured to recover from a battery-cell failure. More specifically, the semantic bypassing mechanism implements a constant-voltage-keeping policy and a dynamic-voltage-allowing policy. The former policy is effective in preventing unavoidable voltage drops during the battery lifetime, while the latter policy is effective in supplying different amounts of power to meet a wide-range of application requirements.
US08330416B2 Battery module and charging module
A thin and compact battery module capable of suppressing an increase in temperature of the battery in the battery module when the battery is charged. The battery module 20 includes a power circuit 21 having a heat-generating multilayer inductor 21A, a resin layer 22 in which the power circuit 21 is embedded, and a secondary cell arranged on the top face of the resin layer 22. The resin layer 22 has multiple recesses 22A in a portion that is in contact with the secondary cell 23.
US08330414B2 Contactless battery charger, electronic device, battery pack, and contactless charging system
A contactless charging system is made up of an electronic device and a contactless charger 200 that recharges the electronic device in a contactless manner. The electronic device transmits a full charge command indicating completion of charge. Upon receipt of the full charge command, the contactless charger shifts to a charge stop state in which charge of the electronic device is not performed. In the charge stop state, the contactless charger generates a load check signal for checking whether or not the electronic device is placed in the contactless charger in a rechargeable state, and transmits the signal. Further, the contactless charger also generates a charge restart check command for checking whether or not the electronic device requests recharge in a charge stop state, and transmits the command.
US08330413B2 Method and system for determining and charging Li-ion battery in an integrated power system
A method and apparatus of determining the state of charge and charging Li-ion batteries while the batteries remain floating on the direct current (DC) bus without the need for a dedicated charger is described. The system includes a battery, a DC generator and a converter, each electrically connected to a DC bus. A charging control algorithm may be used to monitor and control the charging current supplied to the battery. The voltage on the DC bus may be varied to help control the charging current supplied to the battery, based on the battery's internal impedance and the battery's state of charge.
US08330411B2 Electric vehicle battery charging by driving the propulsion shaft
A system and method for charging a battery of an electric vehicle is disclosed. An embodiment of the present invention enables an internal motor of an electric vehicle to be backdriven. When the internal motor is backdriven, it operates as an electric generator to produce electric power used to charge the electric vehicle's battery.
US08330410B2 Charger for minimal-power consumers having a housing with a photovoltaic element connectable to charging electronics
The present invention relates to a charger for minimal-power consumers, such as mobile phones or the like, comprising a plug for connection to a mains supply, a housing for accommodating the charging electronics and a charger cable for connection to the minimal-power consumer, said plug being fixedly connected to one side of the housing. For providing a charger of the type specified at the beginning, which allows charging of the minimal-power consumer even if an adequate mains supply should not be available, the present invention is so conceived that another side of the housing is provided with a photovoltaic element which is connected to the charging electronics.
US08330409B2 Drive unit for rotating electrical machine
An inverter is capable of converting a direct current from a direct current power supply into an alternating current and supplying it to an armature winding. A rectifier circuit is capable of rectifying the current, that has been converted to an alternating current by the inverter, into a direct current and supplying it to the field winding. The amount of the alternating current supplied to the armature winding and the amount of the direct current supplied to the field winding are in a proportional relationship, and implementation of switching control of the inverter controls both the amount of the alternating current supplied to the armature winding and the amount of the direct current supplied to the field winding while this proportional relationship therebetween is maintained.
US08330405B2 Method and apparatus for increased current stability in a PWM drive
The present invention provides an improved current regulator for PWM based drives for electric motors. The invention provides compensation for the rotor position signal for delays introduced due to the PWM algorithm and for digital sampling present in such a drive. Current regulator commonly operate in a two-phase reference frame, requiring forward and reverse coordinate transformations between the physical current values and the two-phase reference frame variables. The present invention provides an improved compensation in the forward transformation by determining the phase lag between the commanded voltage reference and the output voltage reference and by further compensating the forward transformation for errors introduced due to sampling the current either at different sampling instances than the rotor position or at multiple sampling instances during a carrier period. Additionally, compensation during the reverse transformation is provided to compensate for errors introduced due to sampling the current and rotor position.
US08330404B2 Permanent-magnet-type rotating electrical machine
The present invention provides a permanent-magnet-type rotating electrical machine capable of realizing variable-speed operation in a wide range from low speed to high speed at high output and improving, in a wide operating range, efficiency, reliability, and productivity. A narrow magnetic path 11 is formed in a rotor core 2 of a rotor 1 at an inter-pole yoke that magnetically connects adjacent pole core portions 7 to each other, so that the narrow magnetic path is magnetically saturated with flux of a magnetic field created by a predetermined magnetizing current passed to an armature coil 21. Each of first permanent magnets 3 at each of the pole core portions 7 is magnetized with a magnetic field created by a magnetizing current passed to the armature coil 21, to irreversibly change the flux amount of the first permanent magnet.
US08330400B2 Electric motor drive system with bi-directional input and constant directional output
The present invention discloses a system having a particular electric motor being able to do bi-directional rotational input having its output ends for providing output to the input ends of the constant directional output transmission device, while the constant rotational directional output is used to drive the loading wheel train via the output end of the constant directional output transmission device, wherein the user can operatively control the rotational direction of driving inputs, thereby the constant rotational output of different speed change ratio in different directions of driving inputs can be made via the constant directional output transmission device of different speed change ratios.
US08330397B2 Device for reducing peak field an accelerator system
An apparatus for regulating power in an accelerator system includes a directional coupler for sensing a power reflected from an accelerator towards a power source, and a power modulator for reducing an output of the power source based on the sensed power. A method for regulating power in an accelerator system includes sensing a power reflected from an accelerator towards a power source, and reducing an output of the power source based on the sensed power.
US08330395B2 LED lighting system with optical communication functionality
A lighting system (20) comprises a plurality of light units (1, 6, 10, 11), each light unit (1, 6, 10, 11) including a photo sensor (2, 7), a light source (4, 9) and a control unit (3, 8) adapted to operate the light source (4, 9) and to modulate the light emitted by the light source (4, 9) so as to transmit data, wherein the light units (1, 6, 10, 11) are arranged according to a ring topology.
US08330392B2 Intensity changing with reduced flicker for digitally-controlled lighting
A system for changing a light source intensity comprises a controller, an input interface, and a memory. The input interface is configured to receive a command intensity for a light source, wherein the light source has a current intensity, and wherein an intensity of the light source is ramped toward the command intensity from the current intensity automatically. The controller is configured to determine a non-linear curve for the intensity of the light source, wherein at least a portion of the non-linear curve includes a beginning slope that is steeper than an end slope and to cause a change of a light source intensity by ramping over a time interval, wherein the light source intensity targets conforming to the non-linear curve for the intensity of the light source. The memory is coupled to the processor and configured to store an intensity value.
US08330385B2 Light bar
A light bar system for a vehicle compartment includes a circuit board having a plurality of capacitive-type, user-activated switches, an electrical power source coupled to the circuit board, a light emitting diode (LED) coupled to the circuit board, and a light bar affixed to the circuit board. The user-activated switches are coupled to a vehicle accessory to control the level of operation of the vehicle accessory. The most recently actuated one of the user-actuated switches is detected by the circuit board and the circuit board provides a pulse width modulated (PWM) signal to the LED with a duty cycle of the PWM signal based on the most recently actuated switch. A higher duty cycle PWM signal corresponds to a higher setting of the accessory.
US08330384B2 Power supply unit, light emitting apparatus and dimming method thereof
A power supply unit with a dimming function which is adapted for a light emitting apparatus including a power system is provided. The power supply unit includes at least one output channel, a power stage, a detecting unit, and a micro controller unit (MCU). The power stage receives a first output of the power system and provides a first signal. The detecting unit detects a second output of the power system and provides a second signal. The MCU receives the first signal and the second signal, controls the at least one output channel, and is programmed to set a dimming ratio for the at least one output channel according to the first signal and the second signal. Furthermore, a light emitting apparatus and a dimming method are also provided.
US08330379B2 Adaptive modulation and data embedding in light for advanced lighting control
This invention relates to a method for controlling a light output signal emitted by a set of light sources comprising at least one light source, wherein said light output signal comprises a modulation signal which carries individual information, the method comprising recurrently: remotely detecting the light output signal of said set of light sources; determining at least one quality measure of said remote detection of the light output signal; and adjusting the modulation signal on basis of said at least one quality measure.
US08330378B2 Illumination device and method for controlling a color temperature of irradiated light
An illumination device is provided for controlling a color temperature of light irradiated from a light source having a plurality of light-emitting elements of different light colors. A control setting module provides a control signal associated with a desired color temperature for the irradiated light. A light quantity determination circuit determines light quantities for each of the light-emitting elements based on a relationship between the control signal from the control setting module and an inverse color temperature. A plurality of driver circuits provide driver signals to the light-emitting elements corresponding to the determined light quantities. In this manner the color temperature for light irradiated from the light source coincides with the desired color temperature.
US08330372B2 Slow wave structures using twisted waveguides for charged particle applications
A rapidly twisted electromagnetic accelerating structure includes a waveguide body having a central axis, one or more helical channels defined by the body and disposed around a substantially linear central axial channel, with central portions of the helical channels merging with the linear central axial channel. The structure propagates electromagnetic waves in the helical channels which support particle beam acceleration in the central axial channel at a phase velocity equal to or slower than the speed of light in free space. Since there is no variation in the shape of the transversal cross-section along the axis of the structure, inexpensive mechanical fabrication processes can be used to form the structure, such as extrusion, casting or injection molding. Also, because the field and frequency of the resonant mode depend on the whole structure rather than on dimensional tolerances of individual cells, no tuning of individual cells is needed. Accordingly, the overall operating frequency may be varied with a tuning/phase shifting device located outside the resonant waveguide structure.
US08330363B2 Light emitting device and method for manufacturing the same
When attaching a substrate with an EL element formed thereon and a transparent sealing substrate, the periphery of a pixel portion is surrounded with a first sealing agent that maintains a gap between the two pieces of substrates, an entire surface of the pixel portion is covered with a second transparent sealing agent so that the two pieces of substrate is fixed with the first sealing agent and the second sealing agent. Consequently, the EL element can be encapsulated by curing the first sealing agent and the second sealing agent without enclosing a drying agent and doing damage to the EL element due to UV irradiation even when a sealing device only having a to function of UV irradiation is used.
US08330358B2 OLED illumination device with improved aperture ratio
An illumination device includes a transparent substrate and multiple first metal lines. The transparent substrate includes an emitting area and a peripheral area and the emitting area includes multiple sub-emitting areas. The first metal lines are disposed on the transparent substrate, each first metal line has an end connected to a corresponding one of the sub-emitting areas and an opposite end connected to the peripheral area. Each sub-emitting area includes an insulating layer, a second metal line and an OLED layer. The second metal line is disposed between the transparent substrate and the OLED layer, the insulating layer is between the first metal lines and the second metal line, each first metal line is overlapped with the second metal line in vertical projection. One of the first metal lines, which is connected to a first one of the sub-emitting areas, passes through a second one of the sub-emitting areas.
US08330355B2 Illumination means
The present invention relates to illumination means (10) based on organic light diodes (OLED), having a layer arrangement (15) with at least one organic light-emitting diode layer (OLED layer), and at least one anode layer and one cathode layer on a carrier, and contact means (22) for the electrical contact of the electrode layers. According to the invention, the OLED layer and at least one electrode layer are attached to the inner side of a dimensionally stable rotation surgace serving as the carrier. According to the invention, the inner surface of a substantially or entirely closed hollow body (11) made of glass, plastic, or another light-transmissice material can serve as a carrier. The invention creates a novel illumination means (10) based on organic light diodes, having a shape that is compatible with a conventional light bulb or fluorescent lamp, and consequently can be exchanged for the same.
US08330354B2 Organic light emitting diode display device
An OLED adapted to ensure the reliability and improve the lifespan and to improve an electric contact characteristic between a drive element and an organic light emission diode is disclosed. The OLED device includes: first and second substrates, opposite to each other at a interval, sealed by a sealant; driver elements arranged on the inner surface of the first substrate; organic light emission diode elements, arranged on the inner surface of the second substrate, each including a contact portion upwardly protruding from this substrate; and gather electrodes arranged on the second substrate including the organic light emission diode elements and formed of an electrically conductive gather material and an oxidation-resistant electrically conductive material having an oxidative index lower than that of the electrically conductive gather material.
US08330350B2 Organic electroluminescence device and material for organic electroluminescence device
An organic electroluminescence device includes: a cathode; an anode; and a single-layered or multilayered organic thin-film layer provided between the cathode and the anode. In the organic electroluminescence device, the organic thin-film layer includes at least one emitting layer, and the at least one emitting layer includes at least one phosphorescent material and a host material represented by the following Formula (1). Ra—Ar1—Ar2—Rb  (1) In Formula (1): Ra and Rb each represent a substituted or non-substituted benzene ring or a substituted or non-substituted condensed aromatic hydrocarbon ring selected from a group consisting of a naphthalene ring, a chrysene ring, a fluoranthene ring, a triphenylene ring, a phenanthrene ring, a benzophenanthrene ring, a dibenzophenanthrene ring, a benzotriphenylene ring, a benzochrysene ring and a picene ring; andAr1 and Ar2 each represent a substituted or non-substituted benzene ring or a substituted or non-substituted condensed aromatic hydrocarbon ring selected from a group consisting of a naphthalene ring, a chrysene ring, a fluoranthene ring, a triphenylene ring, a benzophenanthrene ring, a dibenzophenanthrene ring, a benzotriphenylene ring, a benzochrysene ring and a picene ring.
US08330344B2 Electron gun minimizing sublimation of electron source and electron beam exposure apparatus using the same
An electron gun includes: an electron source; an accelerating electrode; an extraction electrode for extracting electrons from an electron emission surface of the electron source; a suppressor electrode for suppressing emission of electrons from a side surface of the electron source; and an electron beam converging unit for converging an electron beam of thermal field emission electrons emitted from the electron emission surface by applying an electric field to the electron emission surface. The electron beam converging unit is an electrostatic lens electrode which is placed between the extraction electrode and the accelerating electrode and having an opening portion in its center. A voltage is applied to the electrostatic lens electrode to converge the electron beam.
US08330343B2 Plasma display device
A plasma display device includes a plasma display panel, a chassis disposed on the plasma display panel with a heat-conducting sheet in between, a small-signal processing circuit board disposed on a rear face of the chassis, a thermal sensor, a thermal sensor fixture for installing the thermal sensor, a front frame, and a back cover having a ventilation area with multiple ventilating holes. The thermal sensor fixture has a shielding wall around the thermal sensor and is disposed on a rear face of the small-signal processing circuit board. The thermal sensor is disposed at an intermediate position between the plasma display panel and the back cover at a position facing the back cover.
US08330342B2 Spherical light output LED lens and heat sink stem system
This light emitting diode (LED) device provides a 360 degree lighting angle in the horizontal plane and a 300 degree lighting angle in the vertical plane while simultaneously addressing LED die thermal management, which is critical to high lumen output LEDs. This LED lighting device is comprised of the LED lens, the LED holder and the heat sink stem. Light produced by at least one LED die traveling vertically is diffused by the top refractive portion of the lens. Light rays directed towards the pointed elements are totally internally reflected downwards then refracted out of the lens, thus resulting in a spherical light pattern. This technology is designed as a replacement for conventional light sources, such as incandescent light bulbs, halogen bulbs, CFLs (compact fluorescent lamps) and metal halide lamps.
US08330341B2 Compact UV irradiation module
A module is provided for irradiation of at least one substrate. The module includes an irradiation unit for irradiating the substrate with ultraviolet light, wherein the irradiation unit has a discharge lamp with an integrated reflector. A method is also provided for producing an irradiation module for irradiating a substrate using UV light, wherein the reflector is coated on the discharge lamp.
US08330340B2 Light emitting device, plasma display panel, and plasma display device
The light emitting device according to the present invention includes: a substrate (11); a light emitting layer (13) provided on the substrate (11); and a reflective layer (12) provided between the substrate (11) and the light emitting layer (13). The reflective layer (12) includes plate-like inorganic oxide particles. The inorganic oxide particles are accumulated on the substrate (11) in such a way that the largest face of each of the inorganic oxide particles is oriented substantially parallel to the principal plane of the substrate (11).
US08330337B2 Heat dissipation device and LED lamp using the same
An LED lamp includes a light source including LEDs and a heat dissipation device. The heat dissipation device includes a heat absorption board contacting the light source to absorb heat generated by the LEDs, a fin assembly located over the heat absorption board, two heat pipes thermally connecting the heat absorption board and the fin assembly, a fan and a fan holder fixing the fan on the fin assembly. The fan holder includes a supporting board supporting the fan and supporting posts connecting an outer edge of the heat dissipation board and an outer edge of the supporting board. The supporting posts are embedded in the fin assembly.
US08330333B2 Ultrasound imaging transducer acoustic stack with integral electrical connections
An ultrasound transducer that includes a backing layer, an insulating layer disposed on top of the backing layer, and a plurality of conductive traces disposed on top of the insulating layer are disclosed. Each of the conductive traces has an upper face. A plurality of transducer elements, each having (a) a core of piezoelectric material and (b) a conductive coating disposed beneath the core, are bonded directly to the upper face of a respective one of the plurality of conductive traces. Methods for fabricating ultrasound transducers are also disclosed.
US08330332B2 Ultrasound transducer featuring a pitch independent interposer and method of making the same
An ultrasound transducer (10) comprises an application specific integrated circuit (ASIC) (14), an array of acoustic elements (20), and a pitch independent interposer (12). The ASIC (14) includes a plurality of contact pads (16) on a surface of the ASIC that are separated from adjacent ones thereof by a first pitch. The acoustic elements (22) of the array (20) are separated from adjacent ones thereof by a second pitch. In addition, the pitch independent interposer (12) features a plurality of conductive elements (26) separated from adjacent ones thereof by a third pitch different from both the first pitch and the second pitch. The pitch independent interposer (26) is electrically coupled (i) on a first side to the ASIC via a first subset of the plurality of conductive elements and (ii) on a second side to the array of acoustic elements via a second subset of the plurality of conductive elements, wherein one or more of the plurality of conductive elements (26) electrically couples a contact pad (16) of the ASIC (14) with a corresponding acoustic element (22) of the array (20) of acoustic elements.
US08330331B2 Piezoelectric power generator
A piezoelectric power generator that performs conversion between kinetic energy and electrical energy. The piezoelectric power generator is equipped with a beam, a piezoelectric element and a flexible body. The piezoelectric element is bonded to a surface on one side of the beam. The flexible body is arranged on a side of the beam that is opposite to that on which the piezoelectric element is provided. A portion of the beam is connected to the flexible body. The beam is configured such that stress is applied to the beam when the flexible body is deformed into a concave shape with respect to the beam, whereas a stress is not applied to the beam when the flexible body is deformed into a convex shape with respect to the beam.
US08330330B2 Piezoelectric actuator and method of manufacturing the same
A piezoelectric actuator includes a supporting substrate, a main body having a first piezoelectric laminate, a second piezoelectric laminate, and a displacement portion, and a first elastic layer. The first elastic layer is fixed to the main body so as to connect a lower surface of the first piezoelectric laminate, a lower surface of the second piezoelectric laminate, a side surface of the first piezoelectric laminate, and a side surface of the second piezoelectric laminate. A first region to fourth region of the first elastic layer is fixed to the principal surface of the supporting substrate by a first to fourth bonding portions. A non-bonding surface is not fixed to the principal surface of the supporting substrate.
US08330329B2 Scanning probe driver
A driver (100f) comprises a base section (110), a movable stage section (130) for mounting a driven article (12), a resilient section (120) for connecting the base section and the stage section and exhibiting resiliency for moving the stage section along one direction (Y axis), and a section (161, 162, 22) which applies a shaking force to the resilient section in order to move the stage section to oscillate alone the one direction at a resonance frequency determined by the stage section and the resilient section.
US08330327B2 Piezoelectric oscillator and ultrasonic motor
A piezoelectric oscillator that generates a travelling wave using two B (1, n) mode (n is a natural number) standing waves that are out of phase with each other by 90°. On a lower surface of an oscillating body, (4/3)n piezoelectric elements are provided in order to generate an n-wave travelling wave by combining the two B (1, n) mode standing waves that are out of phase with each other by 90°. When a wavelength of the travelling wave is given by λ, each of the piezoelectric elements has a dimension in a circumferential direction occupying a central angle corresponding to (1/2)λθ, and a plurality of piezoelectric elements are spaced apart from each other at intervals each occupies a central angle corresponding to (1/4)λθ.
US08330321B2 Turbogenerator
A turbogenerator (10) has a rotor (11) having a cylindrical rotor body (13), which at each of the two ends merges into a shaft end (14), and in a middle section has the electromagnetically active region (23) of the rotor (11), in which the rotor (11) is assembled from a plurality of rotor parts which are interconnected and arranged in series on the rotor axis (19). With such a rotor, lower losses and temperatures in the end region of the rotor, and overall a higher limit rating or a broadened output range, become possible as a result of the fact that the rotor body (13) in the active region (23) is formed of an easily magnetizable material, especially a first steel, and in that the end sections of the rotor body (13) which are located outside the active region (23) and the shaft ends (14) are formed of a material with reduced magnetizability or of a non-magnetic material, especially a second steel.
US08330316B2 Rotor-stator structures including boost magnet structures for magnetic regions in rotor assemblies disposed external to boundaries of conically-shaped spaces
Various embodiments relate generally to electrodynamic machines and the like, and more particularly, to rotor assemblies and rotor-stator structures for electrodynamic machines, including, but not limited to, outer rotor assemblies. In some embodiments, a stator assembly including field pole members arranged about an axis of rotation and including pole faces at the ends of the field pole members, subsets of the pole faces being disposed within a boundaries of conically-shaped spaces having apexes disposed on the axis of rotation. The rotor assemblies include interior regions in which the subsets of the pole faces are disposed, the interior regions having surfaces external to the boundaries of the conically-shaped spaces. The rotor assemblies also include subsets of magnets interleaved circumferentially with the subsets of magnetically permeable structures and boost magnets disposed adjacent the subsets of magnetically permeable structures. Further, rotor assemblies include flux conductor shields disposed adjacent the boost magnets.
US08330314B2 Magnetic transmission device
A magnetic device that includes a first wheel and a second wheel is provided. The first wheel has a first rotational axis and a plurality of first magnets. The second wheel is received at least in part within the first wheel. The second wheel has a second rotational axis that is generally perpendicular to the first rotational axis of the first wheel. The second magnetic wheel has a plurality of second magnets. The configuration of the plurality of first magnets and the plurality of second magnets creates magnetic fields that cause one of the first and second wheels to rotate when the other of the first and second wheels rotates.
US08330311B2 Magnetic thrust bearing with integrated electronics
A machine is provided, including a magnetic thrust bearing having a rotor portion, a stator portion, and a housing. The housing substantially surrounds the stator portion and the rotor portion. The rotor portion includes a thrust disk adapted to be circumferentially attached to a rotor and to rotate with the rotor. The thrust disk defines a thrust disk first side and a thrust disk second side, the first side being opposite to the second side.
US08330306B2 Magnetoplasmadynamic (MPD) generator
A magneto-plasma-dynamic (MPD) generator, comprising: a conveying duct shaped for conveying a high velocity, conductive fluid; a magnetic field generator arranged to generate a magnetic field across the conveying duct, substantially perpendicular to the direction of travel of the fluid, such that the fluid passes through the magnetic field (2) when conveyed by the duct; electrodes provided in the conveying duct to conduct a current induced in the fluid as it is conveyed by the conveying duct through the magnetic field; and an electrode supplying mechanism configured to supply a conductive liquid for replenishing the electrodes.
US08330305B2 Protecting devices from impact damage
A system and method for protecting devices from impact damage is provided. Prior to impact between a surface and a device, a determination of a risk of damage to the device is made. If the risk of damage to the device exceeds a threshold, a protection system is activated to reduce or substantially eliminate damage to the device.
US08330304B2 System and method for assembly of component devices into an information handling system
An information handling system component contained within an information handling system housing uses the information handling system housing as at least a portion of a safety enclosure for hazardous functions of the component. A lock out device disables the hazardous function if the information handling system housing is moved relative to the component. For example, an optical disc drive laser is disabled if a Hall effect sensor in the chassis of the optical disc drive no longer senses a magnet placed in a portion of the information handling system housing used to enclose the optical disc drive. Alternatively, the component couples to the information handling system housing to enclose the hazardous function within the interior of the information handling system housing so that the component is inaccessible from the exterior of the housing.
US08330301B2 Power apparatus for a high voltage electrical power system
A power apparatus for a high voltage electrical power system, that includes a voltage source converter and a high voltage dc power source including one or more strings having a plurality of dc power source members connected in series, and switches configured to connect and disconnect the strings, where the switches are solid-state switches, each string is subdivided into a plurality of dc power source units each dc power source unit including a plurality of dc power source members connected in series and each dc power source unit is provided with one of the solid-state switches configured to connect and disconnect the dc power source unit, and that all solid-state switches in the string are arranged so that they are turned on and off simultaneously.
US08330298B2 Generating DC electric power from ambient electromagnetic radiation
At least certain embodiments describe methods, apparatuses, and systems for converting energy from electro-magnetic (EM) radiation into electric power using a simultaneous collector of ambient radio frequencies (SCARF) circuit. In one embodiment this is done by capturing EM radiation from a plurality of ambient signals using an array of antennae where each signal has a resonant frequency and aggregating the ambient signals to generate an aggregated signal having a single frequency with greater AC power than the AC power of each of the plurality of ambient signals individually. The single frequency can be produced by either the sum of the resonant frequencies of the ambient signals or the difference between the resonant frequencies of the ambient signals. The aggregated signal is then converted into useable electric power using a rectifying circuit such that for every incremental increase in the AC power of the aggregated signal, there is a corresponding exponential increase in DC power at the output of the rectifying circuit.
US08330292B2 Power supply providing an integrated power system
A power supply with an integrated power system has a common transformer. After the power supply receives input power, the common transformer generates an induction power at the secondary side. The power supply further includes a standby power system receiving the induction power and outputting a standby power, an actuation switch with one end electrically bridging the common transformer and the standby power system, a primary power system connecting to the other end of the actuation switch, and a power management unit receives the standby power to be activated. The standby power system modulates and transforms the induction power to the standby power to start operation of the power management unit. Users can trigger the power management unit to output an enabling signal to conduct the actuation switch to be ON so that the primary power system can receive the induction power and transform to output the primary output power.
US08330288B2 Device for charging at least one electrical battery on board a boat
A device for charging at least one electric battery (1) on board a boat comprises a propeller (2) adapted to immersed in water through the movement of the boat be driven to rotate a axle (3) and an electric direct current machine (8) connected to the axle and adapted to generate voltage to the battery for charging thereof upon rotation of the axle. A DC/DC-converter (7) is arranged to convert the voltage generated by the electric machine through the rotation of the axle to a higher voltage suited for charging the battery. A member (10) is adapted to measure the voltage generated by the electric machine and a micro processor unit (9) is adapted to control the DC/DC-converter on the basis of voltage data delivered by said member.
US08330286B2 Tuned rolling wave energy extractor
An apparatus for extracting wave energy may include a watercraft, a pendulum and an energy converter. The watercraft may be configured to roll in response to wave action and may have roll characteristics that are tunable to characteristics of the wave action. The pendulum may be supported by the watercraft to enable the pendulum to swing in response to the wave action. An energy converter may be configured to convert the relative movement of the pendulum and watercraft into electrical energy. The pendulum may also be tunable to characteristics of the wave action.
US08330285B2 Method and system for a more efficient and dynamic waste heat recovery system
The present invention relates to a method and system for a more efficient and dynamic waste heat recovery system in an automobile. The present invention includes a heat exchanger connected to a generator. The heat exchanger includes variable pitch impellers attached to and rotating a shaft. The pitch of the impellers can be dynamically varied and the impellers can also be staggered. The generator includes a rotor connected to the shaft. The rotor rotates within a stator when the shaft rotates. The stator includes windings with different thicknesses and different turn ratios allowing for generation of different energy levels by each of the windings. Each of the windings can be dynamically activated. The pitch of the impellers can be dynamically altered and the windings can be dynamically activated depending on energy requirements of an energy storage unit and/or accessories in the automobile.
US08330280B1 Bump structure and process of manufacturing the same
A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block and the second polymer block are located at two sides of the first groove, the first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first connection slot and the first groove. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove, a third connection slot and a fourth connection slot communicated with each other. The connection metal layer covers the under bump metallurgy layer to form a third groove, a fifth connection slot and a sixth connection slot communicated with each other.
US08330279B2 Semiconductor device
A semiconductor device includes a supporting board having a protection film thereon; a semiconductor chip provided on the supporting board; a first internal connecting terminal formed on the supporting board; a second internal connecting terminal formed on the semiconductor chip; a first insulation layer for covering an upper surface of the supporting board and upper and lateral surfaces of the semiconductor chip; a wiring pattern provided on the first insulation layer, the wiring pattern connecting the first and second internal connecting terminals; a solder resist layer provided on the first insulation layer and the wiring pattern, the solder resist layer having an opening part; an external connecting terminal provided so as to connect to the wiring pattern through the opening part; a groove part formed on outer peripheries of the supporting board, the protection film, and the first insulation layer; and a resin layer formed in the groove part.
US08330276B2 Semiconductor device and method for manufacturing the same
The semiconductor device includes a first interconnect layer insulating film, first copper interconnects that are embedded in the first interconnect layer insulating film, and an interlayer insulating film that is formed on the first copper interconnects and the first interconnect layer insulating film. The semiconductor device includes a second interconnect layer insulating film that is formed on the interlayer insulating film and second copper interconnects that are embedded in the second interconnect layer insulating film. The first and second interconnect layer insulating films include first and second low dielectric constant films, respectively. The interlayer insulating film has higher mechanical strength than the first and second interconnect layer insulating films.
US08330274B2 Semiconductor structure and method for making same
One or more embodiments relate to a method of forming a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a seed layer over the barrier layer; forming an inhibitor layer over the seed layer; removing a portion of said inhibitor layer to expose a portion of the seed layer; and selectively depositing a fill layer on the exposed seed layer.
US08330271B2 Semiconductor element, method for manufacturing the same, and mounting structure having the semiconductor element mounted thereon
A semiconductor element that is excellent in both mechanical reliability and electrical reliability and a mounting structure for the semiconductor element are provided.The semiconductor element includes: a substrate; an electrically conductive layer on the substrate; a protective layer having an opening on the electrically conductive layer; a barrier metal layer in contact with the electrically conductive layer in the opening; and an electrically conductive bump on the barrier metal layer. The barrier metal layer contains phosphorus and has a phosphorus-rich portion that has a higher phosphorus content than the remaining portion has. The phosphorus-rich portion is located in the surface of the barrier metal layer facing the electrically conductive bump, and the thickness thereof in the periphery of the region where the electrically conductive bump is formed is larger than at the center of the region.
US08330269B2 Semiconductor device and method
A semiconductor device and method is disclosed. One embodiment provides an active region in a semiconductor substrate, including a first terminal region and a second terminal region. wherein the active region is interrupted by an inactive region, wherein an electrical power dissipation in the inactive region is zero or smaller than an electrical power dissipation in the active region; and a metallization layer arranged with respect to the active region on a surface of the semiconductor device and at least partly overlapping the active area, wherein the metallization layer is divided into a first part, in electrical contact to the first terminal region, and a second part, in electrical contact to the second terminal region, wherein the first and the second part are separated by a gap; and wherein the gap and the inactive region are mutually arranged so that an electrical power dissipation below the gap is reduced compared to an electrical power dissipation below the first part and the second part of the metallization layer.
US08330262B2 Processes for enhanced 3D integration and structures generated using the same
An enhanced 3D integration structure comprises a logic microprocessor chip bonded to a collection of vertically stacked memory slices and an optional set of outer vertical slices comprising optoelectronic devices. Such a device enables both high memory content in close proximity to the logic circuits and a high bandwidth for logic to memory communication. Additionally, the provision of optoelectronic devices in the outer slices of the vertical slice stack enables high bandwidth direct communication between logic processor chips on adjacent enhanced 3D modules mounted next to each other or on adjacent packaging substrates. A method to fabricate such structures comprises using a template assembly which enables wafer format processing of vertical slice stacks.
US08330260B2 Electronic component of VQFN design and method for producing the same
A method for producing an electronic component of a VQFN (very thin quad flat pack no-lead) design includes the following method steps: anchoring at least one integrated circuit element on a sacrificial substrate; contact-connecting the at least one integrated circuit element to the sacrificial substrate with formation of contact-connecting points on the sacrificial substrate; forming an encapsulation on a top side of the sacrificial substrate, the at least one anchored integrated circuit element being mounted on the top side of the sacrificial substrate; removing the sacrificial substrate, thereby uncovering a portion of the contact-connecting points on the underside of the encapsulation.
US08330256B2 Semiconductor device having through electrodes, a manufacturing method thereof, and an electronic apparatus
A semiconductor device includes a semiconductor substrate and a through electrode provided in a through hole formed in the semiconductor substrate. The through electrode partially protrudes from a back surface of the semiconductor substrate, which is opposite to an active surface thereof. The through electrode includes a resin core and a conductive film covering at least a part of the resin core.
US08330254B2 Semiconductor device
A semiconductor device includes a semiconductor wafer in which semiconductor chip forming regions and a scribe region located between the semiconductor chip forming regions are formed, a plurality of semiconductor chip circuit portions provided over the semiconductor wafer, a plurality of first conductive layers, provided in each of the semiconductor chip forming regions, which is electrically connected to each of the circuit portions, and a first connecting portion that electrically connects the first conductive layers to each other across a portion of the scribe region. An external power supply or grounding pad is connected to any one of the first conductive layer and the first connecting portion. The semiconductor device includes a communication portion, connected to the circuit portion, which performs communication with the outside by capacitive coupling or inductive coupling.
US08330250B2 P-I-N diode crystallized adjacent to a silicide in series with a dielectric material
A vertically oriented p-i-n diode is provided that includes semiconductor material crystallized adjacent a silicide, germanide, or silicide-germanide layer, and a dielectric material arranged electrically in series with the diode. The dielectric material has a dielectric constant greater than 8, and is adjacent a first metallic layer and a second metallic layer. Numerous other aspects are provided.
US08330248B2 Semiconductor device, mask for fabrication of semiconductor device, and optical proximity correction method
A semiconductor device includes a circuit portion including at least one real feature, and a plurality of dummy feature groups each including a plurality of dummy features spaced apart from each other by a first distance. The plurality of dummy feature groups are spaced apart from each other by a second distance larger than the first distance, and the circuit portion and the plurality of dummy feature groups are spaced apart from each other by the second distance.
US08330244B2 Semiconductor devices including Schottky diodes having doped regions arranged as islands and methods of fabricating same
A semiconductor device according to some embodiments includes a semiconductor layer having a first conductivity type and a surface in which an active region of the semiconductor device is defined. A plurality of spaced apart first doped regions are arranged within the active region. The plurality of first doped regions have a second conductivity type that is opposite the first conductivity type, have a first dopant concentration, and define a plurality of exposed portions of the semiconductor layer within the active region. The plurality of first doped regions are arranged as islands in the semiconductor layer. A second doped region in the semiconductor layer has the second conductivity type and has a second dopant concentration that is greater than the first dopant concentration.
US08330243B2 Semiconductor light-receiving element and optical module
A semiconductor light-detecting element includes: a semiconductor substrate of a first conductivity type having a band gap energy, a first principal surface, and a second principal surface opposed to the first principal surface; a first semiconductor layer of the first conductivity type on the first principal surface and having a band gap energy smaller than the band gap energy of the semiconductor substrate; a second semiconductor layer of the first conductivity type on the first semiconductor layer; an area of a second conductivity type on a part of the second semiconductor layer; a first electrode connected to the second semiconductor layer; a second electrode connected to the area; and a low-reflection film on the second principal surface. The second principal surface is a light-detecting surface detecting incident light, and no substance or structure having a higher reflection factor, with respect to the incident light, than the low-reflection film, is located on the second principal surface.
US08330242B2 Semiconductor light-receiving element
The Si waveguide 305 includes a first conductivity-type Si layer 301 and an intrinsic Si layer 302, and a second conductivity-type light-absorption layer 303 is partially formed on an area thereof. During operation, a reverse bias is applied between the first conductivity-type Si layer 301 and the light-absorption layer 303. Since the light-absorption layer 303 has a conductivity type, it is not depleted when a voltage is applied, but the intrinsic Si layer 302 forming the Si waveguide 305 is depleted. Therefore, it is possible to reduce a CR time constant. Furthermore, since the intrinsic Si layer 302 can be formed on the first conductivity-type Si layer 301 in a continuous manner, it is possible to reduce lattice defects. As a result, it is possible to suppress the dark current generated in the light-receiving element.
US08330241B2 Magnetic tunnel junction device
The magnetic tunnel junction device of the present invention includes a first ferromagnetic layer, a second ferromagnetic layer, an insulating layer formed between the first ferromagnetic layer and the second ferromagnetic layer. The insulating layer is composed of fluorine-added MgO. The fluorine content in the insulating layer is 0.00487 at. % or more and 0.15080 at. % or less. This device, although it includes a MgO insulating layer, exhibits superior magnetoresistance properties to conventional devices including MgO insulating layers. The fluorine content is preferably 0.00487 at. % or more and 0.05256 at. % or less.
US08330239B2 Shielding for a micro electro-mechanical device and method therefor
A device comprises a conductive substrate, a micro electromechanical systems (MEMS) structure, and a plurality of bond pads. The conductive substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed over the first side of the conductive substrate. The plurality of bond pads are formed over the first side of the conductive substrate and electrically coupled to the first side of the conductive substrate. The conductive substrate and plurality of bond pads function to provide electrostatic shielding to the MEMS structure.
US08330237B2 Corrosion-resistant MEMS component and method for the production thereof
An MEMS component including a monolithically integrated electronic component with a multi-plane conductor track layer stack which is arranged on a substrate and into which is integrated a cantilevered elastically movable metallic actuator which is arranged in the multi-plane conductor track layer stack at the level of a conductor track plane and is connected by via contacts to conductor track planes which are arranged thereabove or therebeneath and which apart from an opening in the region of the actuator are separated from the conductor track plane of the actuator by a respective intermediate plane insulator layer, wherein the actuator is formed from a metallically conductive layer or layer combination which is resistant to corrosive liquids or gases and which contains titanium nitride or consists of titanium nitride.
US08330236B2 Isolation channel improving measurement accuracy of MEMS devices
A system for improving the performance of a microelectromechanical systems (MEMS) device that is housed in a package and implemented on a printed circuit board (PCB) comprises a footprint, an isolation channel, and a bridge. A portion of the isolation channel is removed to mechanically isolate the MEMS device.
US08330234B2 Semiconductor device and manufacturing process therefor
In a semiconductor device, a gate electrode having a uniform composition prevents deviation in a work function. Controlling a Vth provides excellent operation properties. The semiconductor device includes an NMOS transistor and a PMOS transistor with a common line electrode. The line electrode includes electrode sections (A) and (B) and a diffusion barrier region formed over an isolation region so that (A) and (B) are kept out of contact. The diffusion barrier region meets at least one of: (1) The diffusion coefficient in the above diffusion barrier region of the constituent element of the above electrode section (A) is lower than the interdiffusion coefficient of the constituent element between electrode section (A) materials; and (2) The diffusion coefficient in the above diffusion barrier region of the constituent element of the above electrode section (B) is lower than the interdiffusion coefficient of the constituent element between electrode section (B) materials.
US08330233B2 Semiconductor device
A semiconductor device 1 including a cell region 2 formed with a semiconductor element 6 and a periphery region 3 formed in the periphery of the cell region 2. The semiconductor region 1 is arranged with an n− type drift region 12 formed in the cell region 2 and periphery region 3, a plurality of p− type columnar regions formed in the n− drift region 12 of the cell region 2, a plurality of p− type columnar resistance improvement regions 23n formed in the n− type drift region 12 of the periphery region 3, and a plurality of electrical field buffer regions 24n formed in an upper part of the p− type columnar region 23n. An interval Sn between the electrical field buffer region 24n and an adjacent electrical field buffer region 24n is different between an interior side and an exterior side of the periphery region 3.
US08330230B2 Semiconductor device pad having the same voltage level as that of a semiconductor substrate
A semiconductor device pad is configured to have the same voltage level as that of a semiconductor substrate. The pad includes a semiconductor substrate having a junction area doped with a high concentration of impurity ions, a polylayer portion at least a portion of which is electrically connected to the junction area and a metal layer portion electrically connected to the polylayer portion and receiving a voltage externally applied. The metal layer is configured to transfer the received voltage to the semiconductor substrate.
US08330229B2 Hybrid orientation inversion mode GAA CMOSFET
A hybrid orientation inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of n-type Si (110) and p-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an inversion mode, the devices have different orientation channels, the GAA structure with the racetrack-shaped, high-k gate dielectric layer and metal gate, so as to achieve high carrier mobility, and prevent polysilicon gate depletion and short channel effects.
US08330228B2 Hybrid material inversion mode GAA CMOSFET
A Ge and Si hybrid material inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a circular-shaped cross section and are formed of n-type Ge and p-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an inversion mode, current flows through the overall cylindrical channel, so as to achieve high carrier mobility, reduce low-frequency noises, prevent polysilicon gate depletion and short channel effects and increase the threshold voltage of the device.
US08330222B2 Epitaxial wafer and production method thereof
A small amount of oxygen is ion-implanted in a wafer surface layer, and then heat treatment is performed so as to form an incomplete implanted oxide film in the surface layer. Thereby, wafer cost is reduced; a pit is prevented from forming in a surface of an epitaxial film; and a slip is prevented from forming in an external peripheral portion of a wafer.
US08330220B2 LDMOS with enhanced safe operating area (SOA) and method therefor
A laterally double diffused metal oxide semiconductor device includes a well region having a first conductivity, a first carrier redistribution region having the first conductivity type, wherein the second well region is under the well region, and a highly doped buried layer under the second well region. The highly doped buried layer has the first conductivity type and has a dopant concentration less than that of the well region and less than that of the first carrier redistribution region, and the buried layer is tied to the first well region. In addition, a method for forming the laterally double diffused metal oxide semiconductor device, which may use epitaxial growth, is disclosed.
US08330219B2 Semiconductor device with high-voltage breakdown protection
A semiconductor device includes: a semiconductor substrate having a first conductivity type; a well having a second conductivity type and provided inside the semiconductor substrate; a first impurity region having the first conductivity type and provided within the well; a second impurity region having the second conductivity type, provided inside the well and away from the first impurity region; and a third impurity region having a first conductivity type, provided surrounding the well and away from the second impurity region. In this semiconductor device, the well is formed to be deeper than the first impurity region, the second impurity region, and the third impurity region, in a thickness direction of the semiconductor substrate; and a minimum distance between the first impurity region and the second impurity region is smaller than a minimum distance between the second impurity region and the third impurity region.
US08330218B2 Semiconductor device and method of fabricating the same
Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening between the gate electrode and the semiconductor substrate; a second conductive type body electrode formed on the semiconductor substrate and separated from the gate electrode; a first conductive type drain electrode formed on the semiconductor substrate and separated from the gate electrode and the body electrode; a second conductive type first body region formed in the well under the body electrode; a second conductive type second body region extending from the first body region to the gate insulating layer and formed in the well; a first conductive type source region formed in the second body region and extending from the first body region to the gate insulating layer; and a first conductive type source electrode extending from the source region to surround the gate electrode on the semiconductor substrate with an insulating layer intervening between the source electrode and gate electrode.
US08330217B2 Devices, methods, and systems with MOS-gated trench-to-trench lateral current flow
A DMOS transistor is fabricated with its source/body/deep body regions formed on the walls of a first set of trenches, and its drain regions formed on the walls of a different set of trenches. A gate region that is formed in a yet another set of trenches can be biased to allow carriers to flow from the source to the drain. Lateral current low from source/body regions on trench walls increases the active channel perimeter to a value well above the amount that would be present if the device was fabricated on just the surface of the wafer. Masking is avoided while open trenches are present. A transistor with a very low on-resistance per unit area is obtained.
US08330214B2 Power semiconductor device
The present inventors have realized that manufacturability plays into optimization of power semiconductor devices in some surprising new ways. If the process window is too narrow, the maximum breakdown voltage will not be achieved due to doping variations and the like normally seen in device fabrication. Thus, among other teachings, the present application describes some ways to improve the process margin, for a given breakdown voltage specification, by actually reducing the maximum breakdown voltage. In one class of embodiments, this is done by introducing a vertical gradation in the density of fixed electrostatic charge, or in the background doping of the drift region, or both. Several techniques are disclosed for achieving this.
US08330213B2 Power semiconductor devices, methods, and structures with embedded dielectric layers containing permanent charges
Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.
US08330206B2 Nonvolatile semiconductor memory device and manufacturing method thereof
A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer formed on the first gate insulator, a second gate insulator formed on the charge accumulation layer, and a control electrode formed on the second gate insulator, wherein a ratio r/d is not smaller than 0.5, where r: a radius of curvature of an upper corner portion or surface roughness of the charge accumulation layer and d: an equivalent oxide thickness of the second gate insulator in a cross section along a direction vertical to the bit lines.
US08330205B2 Nonvolatile semiconductor device including a floating gate and associated systems
A memory device includes a first floating gate electrode on a substrate between adjacent isolation layers in the substrate, at least a portion of the first floating gate protruding above a portion of the adjacent isolation layers, a second floating gate electrode, electrically connected to the first floating gate electrode, on at least one of the adjacent isolation layers, a dielectric layer over the first and second floating gate electrodes, and a control gate over the dielectric layer and the first and second floating gate electrodes.
US08330204B2 Non-volatile NAND memory semiconductor integrated circuit
A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.
US08330202B2 Germanium-silicon-carbide floating gates in memories
The use of a germanium carbide (GeC), or a germanium silicon carbide (GeSiC) layer as a floating gate material to replace heavily doped polysilicon (poly) in fabricating floating gates in EEPROM and flash memory results in increased tunneling currents and faster erase operations. Forming the floating gate includes depositing germanium-silicon-carbide in various combinations to obtain the desired tunneling current values at the operating voltage of the memory device.
US08330201B2 Non-volatile semiconductor memory using charge-accumulation insulating film
There is provided a non-volatile semiconductor memory having a charge accumulation layer of a configuration where a metal oxide with a dielectric constant sufficiently higher than a silicon nitride, e.g., a Ti oxide, a Zr oxide, or a Hf oxide, is used as a base material and an appropriate amount of a high-valence substance whose valence is increased two levels or more (a VI-valence) is added to produce a trap level that enables entrance and exit of electrons with respect to the base material.
US08330195B2 Multilayer image sensor pixel structure for reducing crosstalk
An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type.
US08330192B2 Method for modification of built in potential of diodes
In broad terms the present invention is a semiconductor junction comprising a first material (102) and a second material (104), in which a surface of one or both of the junction materials has a periodically repeating structure that causes electron wave interference resulting in a change in the way electron energy levels within the junction are distributed.
US08330190B2 Semiconductor device
A semiconductor device includes a first metal layer disposed on a semiconductor substrate; an insulating layer disposed on the first metal layer; and a second metal layer disposed on the insulating layer and having an electrode pad surface exposed to the outside, wherein a recess is disposed in the insulating layer and the second metal layer; and at least the second metal layer is disposed in the recess of the insulating layer.
US08330189B2 One-time programmable memory and method for making the same
A one time programmable nonvolatile memory formed from metal-insulator-semiconductor cells. The cells are at the crosspoints of conductive gate lines and intersecting doped semiconductor lines formed in a semiconductor substrate.
US08330187B2 GaN-based field effect transistor
A GaN-based field effect transistor (MOSFET) is comprised of a channel layer comprised of p-type GaN, an electron supply layer, a surface layer having band gap energy smaller than that of the electron supply layer, sequentially laminated on a substrate, and recess section is formed by removing a part of the drift layer, the electron supply layer, and the surface layer down to a depth that reaches to the channel layer. A source electrode and a drain electrode are formed so that the recess section positions between them, a gate insulation film is formed on the surface layer and on inner-surface of the recess section including the channel layer, and a gate electrode is formed on the gate insulating film in the recess section.
US08330184B2 Bidirectional voltage-regulator diode
In one embodiment, a bidirectional voltage-regulator diode includes first to fifth semiconductor layers formed on an inner surface of a first recess formed in a semiconductor substrate of an N-type in the order. The first semiconductor layer of the N-type has a first impurity concentration lower than an impurity concentration of the semiconductor substrate. The second semiconductor layer of a P-type has a second impurity concentration. The third semiconductor layer of the P-type has a third impurity concentration higher than the second impurity concentration. The fourth semiconductor layer of the P-type has a fourth impurity concentration lower than the third impurity concentration. The fifth semiconductor layer of the N-type has a fifth impurity concentration.
US08330180B2 Semiconductor light emitting device and method of fabricating the same
Provided are a semiconductor light emitting device and a method of fabricating the same. The semiconductor light emitting device comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer, and an electrode layer comprising a conductive polymer on the second conductive semiconductor layer.
US08330178B2 Package structure and package process of light emitting diode
A light emitted diode (LED) package structure and an LED package process are provided. The LED package structure comprises a carrier, a spacer, at least one LED chip, a junction coating, a plurality of phosphor particles, and an encapsulant. The spacer is disposed on the carrier and provided with a reflective layer covering a top surface of the spacer. The LED chip is disposed on the reflective layer and electrically connected to the carrier. The junction coating is disposed over the spacer and covers the LED chip. The phosphor particles are distributed within the junction coating. The encapsulant is disposed on the carrier and encapsulates the LED chip, the spacer and the junction coating. Uniform light output and high illuminating efficiency can be obtained by the phosphor particles uniformly distributed in the junction coating. The junction coating is formed by package level dispensing process to reduce the fabrication cost.
US08330173B2 Nanostructure having a nitride-based quantum well and light emitting diode employing the same
Disclosed are a nanostructure with an indium gallium nitride quantum well and a light emitting diode employing the same. The light emitting diode comprises a substrate, a transparent electrode and an array of nanostructures interposed between the substrate and the transparent electrode. Each of the nanostructures comprises a core nanorod, and a nano shell surrounding the core nanorod. The core nanorod is formed substantially perpendicularly to the substrate and includes a first nanorod of a first conductivity type, an (AlxInyGa1-x-y)N (where, 0≦x<1, 0≦y≦1 and 0≦x+y≦1) quantum well, and a second nanorod of a second conductivity type, which are joined in a longitudinal direction. The nano shell is formed of a material with a bandgap greater than that of the quantum well, and surrounds at least the quantum well of the core nanorod. Meanwhile, the second nanorods are connected in common to the transparent electrode. Accordingly, with the nano shells, it is possible to provide a light emitting diode capable of improving external quantum efficiency by preventing non-radiative recombination on a surface of the (AlxInyGa1-x-y)N quantum well.
US08330168B2 Nitride semiconductor light-emitting element and method of manufacturing the same
An object of the present invention is to provide a nitride semiconductor light-emitting device in which contact resistance generated between an n-contact layer and an n-side electrode is effectively reduced while maintaining satisfactory external quantum efficiency, and a method of efficiently producing the nitride semiconductor light-emitting device. Specifically, the present invention characteristically provides a nitride semiconductor light-emitting device having a semiconductor laminated body including an n-type laminate, a light-emitting layer and a p-type laminate, and an n-side electrode and a p-side electrode, characterized in that: the n-type laminate includes an n-contact layer made of an AlxGa1-xN material (0.7≦x≦1.0) and an n-clad layer provided on the n-contact layer; and an interlayer made of an AlyGa1-yN material (0≦y≦0.5) is provided on a partially exposed portion, on the light-emitting layer side, of the n-contact layer.
US08330165B2 Semiconductor device and method for forming the same
In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface. Hydrogen is introduced into The active layer. A thin film comprising SiOxNy is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiOxNy. Also, a thin film comprising SiOxNy is formed under the active layer. The active layer includes a metal element at a concentration of 1×1015 to 1×1019 cm−3 and hydrogen at a concentration of 2×1019 to 5×1021 cm−3.
US08330164B2 Thin film transistor array panel
A thin film transistor array panel includes: a substrate, a gate line disposed on the substrate, a data line intersecting the gate line, a drain electrode separated from the data line a first insulating layer covering the data line, a color filter disposed on the first insulating layer, a second insulating layer disposed on the color filter and having a contact hole exposing the drain electrode and the color filter and a pixel electrode disposed on the second insulating layer and connected to the drain electrode through the contact hole. The contact hole partially exposes the color filter near a portion where the drain electrode and the pixel electrode are connected to each other, and the pixel electrode covers the color filter exposed through the contact hole.
US08330162B2 Pixel structure and the method of forming the same
A pixel structure includes a drain extension portion disposed on an islanding semiconductor layer, wherein the islanding semiconductor layer is formed together with a thin-film transistor channel layer. Therefore, the total thickness of the islanding semiconductor layer and the drain extension portion is increased, such that the distance between the gate line and the drain extension portion is enlarged, and the coupling capacitance between the gate line and the drain extension portion can be lowered. Therefore, the display panel with the pixel structure of the present invention can have low coupling capacitance so as to improve the flicker phenomena obviously.
US08330160B2 Random number generating device
The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.
US08330158B2 Generating an integrated circuit identifier
The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of at least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.
US08330152B2 OLED display architecture with improved aperture ratio
A device such as a display region that includes a plurality of multi-color pixels is provided. Each pixel may have several types of organic light emitting devices that operate as sub-pixels, and at least one type of device may be shared by multiple pixels. Less-used and/or more efficient device types, such as deep blue and green light emitting devices, may be shared between multiple pixels, leading to an improved aperture ratio and fill factor for the device.
US08330148B2 Electric organic component and method for the production thereof
An electric organic component and a method for the production thereof is disclosed. The component includes a substrate, a first electrode, a first electrically semiconductive layer on the first electrode, an organic functional layer on the first electrically semiconductive layer and a second electrode on the organic functional layer. The first or the second electrode may be arranged on the substrate. The electrically semiconductive layer is doped with a dopant which comprises rhenium compounds.
US08330146B2 Organic photodetector
An organic photodetector including a substrate, a first electrode, an insulation layer, an organic layer, and a second electrode is provided. The first electrode is disposed on the substrate. The insulation layer is disposed on the first electrode. The organic layer is disposed on the substrate and the insulation layer and covers a side surface of the insulation layer and a side surface of the first electrode. The second electrode is disposed on the organic layer and located above the insulation layer.
US08330142B2 Quantum dot light emitting device having quantum dot multilayer
A quantum dot light emitting device includes; a substrate, a first electrode disposed on the substrate, a second electrode disposed substantially opposite to the first electrode, a first charge transport layer disposed between the first electrode and the second electrode, a quantum dot light emitting layer disposed between the first charge transport layer and one of the first electrode and the second electrode, and at least one quantum dot including layer disposed between the quantum dot light emitting layer and the first charge transport layer, wherein the at least one quantum dot including layer has an energy band level different from an energy band level of the quantum dot light emitting layer.
US08330134B2 Optical fault monitoring
Various embodiments related to monitoring for optical faults in an optical system are disclosed. For example, one disclosed embodiment provides, in an optical system comprising a light source, a light outlet, and an optical element disposed between the light source and the light outlet, a method of monitoring for optical system faults. The method includes detecting, via a light sensor directed toward an interface surface of the optical element closest to the light source, an intensity of light traveling from the interface surface of the optical element to the light sensor, and comparing an intensity of light detected to one or more threshold intensity values. The method further includes identifying an optical system fault condition based on comparing the intensity of light detected to one or more threshold values, and modifying operation of the optical system.
US08330132B2 Energy modulator for modulating an energy of a particle beam
An energy modulator for use with a particle source that provides a beam of particles includes a first block moveable between a first position and a second position, wherein when the first block is at the second position, it is in a path of the beam, and a second block moveable relative to the first block, wherein the second block and the first block are offset from each other in a direction of the beam, wherein the first block has a first energy absorption characteristic, and the second block has a second energy absorption characteristic that is different from the first energy absorption characteristic.
US08330130B2 Charged particle source with automated tip formation
A charged particle beam device is described. The device includes an emitter unit including an emitter tip; a voltage supply unit adapted for providing a stable voltage to generate a stable extraction field at the emitter tip; a pulsed voltage supply member adapted for providing a pulsed voltage to generate a pulsed extraction field on top of the stable extraction field; a measuring unit for measuring an emitter characteristic; and a control unit adapted for receiving a signal from the measuring unit and for control of the pulsed voltage supply member.
US08330128B2 Implant mask with moveable hinged mask segments
This apparatus has two mask segments. Each mask segment has apertures that an ion beam may pass through. These mask segments can move between a first and second position using hinges. One or more workpieces are disposed behind the mask segments when these mask segments are in a second position. The two mask segments are configured to cover the one or more workpieces in one instance. Ions are implanted into the one or more workpieces through the apertures in the mask segments.
US08330124B2 Fluorescence detection device using intensity-modulated laser light and fluorescence detection method
A fluorescence detection device for a flow site meter emits laser light intensity-modulated in accordance with a modulation signal and acquires a fluorescent signal of fluorescence emitted from a measurement object that passes through a measurement point of the laser light. The fluorescence detection device generates, separately from the modulation signal, a reference signal having a frequency different from a frequency of the modulation signal and a phase in synchronization with a phase of the modulation signal. The fluorescence detection device determines a fluorescent relaxation time of the measurement object from the fluorescent signal by using the reference signal.
US08330120B2 Electron beam sterilizer
Even in a case where a spark is generated in an electron beam irradiation device 28, all the vessels 2 being conveyed are sterilized by the irradiation with the electron beam. The electron beam is emitted by heating filaments 42 arranged in a vacuum chamber 40 and the vessels 2 are irradiated with the electron beam taken out into the atmosphere through a window foil 48 of an irradiation window 46 formed to an irradiation section 44. The vessels 2 are conveyed in a state of being held by vessel holding portions 36A and 36B of a vessel conveying device 24 and pass in front of the irradiation window 46. Although the electron beam irradiation is temporarily interrupted when a spark is generated, a length of the irradiation window 46 in a vessel conveying direction X is made larger than a vessel conveying distance in an interruption time.
US08330113B2 Collimator, radiological imaging apparatus and nuclear medicine diagnosis apparatus
A collimator, a radiological imaging apparatus and a nuclear medicine diagnosis apparatus which are able to improve the sensitivity are provided. The radiological imaging apparatus has a collimator 11 disposed to oppose a radiological detection device 12 and having through-holes 11a for passing to the radiological detection device 12 gamma rays in a specified direction out of those radiated from an object to be examined. The collimator 11 is produced by mutually coupling a plurality of metal tubular members 11A each having the through-hole 11a with the help of a bonding agent S in alignment with a plurality of detectors 12a constituting the radiological detection device 12.
US08330111B2 Monolithically integrated antenna and receiver circuit for the detection of terahertz waves
The present invention relates to a device for detecting millimeter waves, having at least one field effect transistor with a source, a drain, a gate, a gate-source contact, a source-drain channel, and a gate-drain contact. Compared to a similar such device, the problem addressed by the present invention, among others, is that of providing a device which enables the provision of a field effect transistor for detecting the power and/or phase of electromagnetic radiation in the Thz frequency range. In order to create such a device, it is suggested according to the invention, that a device be provided which has an antenna structure wherein the field effect transistor is connected to the antenna structure in such a manner that an electromagnetic signal received by the antenna structure in the THz range is fed into the field effect transistor via the gate-source contact, and wherein the field effect transistor and the antenna structure are arranged together on a single substrate.
US08330110B2 Container, container positioning method, and measuring method
A container according to the present invention contains at least a part of a device under test to be measured by a terahertz wave measurement device. The container includes a gap portion that internally disposes at least a part of the device under test, and an enclosure portion that includes a first flat surface portion and a second flat surface portion, and disposes the gap portion between the first flat surface portion and the second flat surface portion, thereby enclosing the gap portion. Moreover, a relationship n1−0.1≦n2≦n1+0.1 holds where n2 is a refractive index of the enclosure portion, and n1 is a refractive index of the device under test. Further, the first flat surface portion intersects with a travel direction of the terahertz wave at the right angle.
US08330106B2 Radiation monitor
The invention comprises a radiation and contamination monitor for the monitoring of radiation and contamination. The instrument is intrinsically safe and comprises a radiation detector, a power source, a signal processor and a display, said power source, signal processor and display being housed within a sealed instrument housing formed from a non-metallic material which is resistant to static discharge. The detector may be housed in a detachable housing for contamination monitoring.
US08330105B2 Phase contrast electron microscope
A phase contrast electron microscope has an objective with a back focal plane, a first diffraction lens, which images the back focal plane of the objective magnified into a diffraction intermediate image plane, a second diffraction lens whose principal plane is mounted in the proximity of the diffraction intermediate image plane and a phase-shifting element which is mounted in or in the proximity of the diffraction intermediate image plane. Also, a phase contrast electron microscope has an objective having a back focal plane, a first diffraction lens, a first phase-shifting element and a second phase-shifting element which is mounted in or in the proximity of the diffraction intermediate image plane. The first diffraction lens images the back focal plane of the objective magnified into a diffraction intermediate image plane and the first phase-shifting element is mounted in the back focal plane of the objective.
US08330098B2 High resolution, high speed, miniaturized optical encoder
Disclosed are various embodiments of a single track reflective optical encoder featuring current amplifiers disposed in the signal generating circuit thereof. Voltage amplifiers and their associated feedback resistors are eliminated in the various embodiments disclosed herein, resulting in decreased die size and improved encoder signal accuracy and performance, especially at high speeds The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed.
US08330093B2 Apparatus and method for preventing charge pumping in series connected diode stacks
An ambient light sensor includes a first stack of at least two photodiodes, wherein a cathode of one of the at least two photodiodes is electrically connected to an anode of another of the at least two photodiodes. The ALS further includes a bias source for providing a bias voltage to the first stack, and at least one switch electrically connected to the first stack. The at least one switch is operative to periodically apply the bias voltage to and remove the bias voltage from the first diode stack.
US08330092B2 Snapshot pixel circuit for minimizing leakage current in an imaging sensor having a two-pole integration switch
Pixel circuits, capable of operating in either “snapshot” or “rolling integration” mode, and compatible with a conformal photodiode coating. Preferred embodiments of the present invention are compatible with these coating materials, as well as others, including amorphous Silicon. The preferred pixel circuits includes additional transistors not provided in prior art pixel circuits to divert leakage current away from integration nodes when not integrating, to reset the integration node, and to buffer and select the integrated voltage.
US08330089B2 Solid-state imaging device
It is intended to provide a CMOS image sensor with a high degree of pixel integration. A solid-state imaging device comprises a signal line formed on a Si substrate, an island-shaped semiconductor formed on the signal line, and a pixel selection line. The island-shaped semiconductor includes: a first semiconductor layer connected to the signal line; a second semiconductor layer located above and adjacent to the first semiconductor layer; a gate connected to the second semiconductor layer through an insulating film; and a charge storage section comprised of a third semiconductor layer connected to the second semiconductor layer and adapted, in response to receiving light, to undergo a change in amount of electric charges therein; a fourth semiconductor layer located above and adjacent to the second and third semiconductor layers. The pixel selection line is connected to the fourth semiconductor layer formed as a top portion of the island-shaped semiconductor.
US08330086B2 Magnetic heating blanket
A heating blanket comprises a conductor for receiving current and generating a magnetic field in response to the current. The heating blanket may include a susceptor sleeve formed of magnetic material having a Curie temperature. The susceptor sleeve may extend along the conductor and may be inductively heated in response to the magnetic field.
US08330083B2 Portable countertop electric oven
A portable countertop electric oven for cooking food includes: a cooking housing; a power head operative to attach, connect, and/or couple, to the cooking housing, at least a portion of the power head extending into an interior of the cooking housing; a base operative to attach, connect, and/or couple, to the cooking housing; and a first securing element operable to secure the cooking housing to the base. A porting element may be provided, such as a handle formed from a portion of the power head, which may include first and second bulged regions of the power head. At least one of: the cooking housing; the power head and the base, may have a substantially elliptical shape, and may include two bulged portions at respective distal ends. The first securing element may be an attachment clip including a first region operable to engage with the cooking housing and a second region operable to engage with the base.
US08330080B2 Electric oven with adjustable heating element
The present invention is an improved electronic oven; a tabletop, or toaster oven that contains a vertically moveable heating element. The moveable heating element allows a range of foods and/or portions of food to be cooked or heated in the most efficient manner possible, saving time and energy use. A heat directing plate disposed above the moveable heating element further increases efficiency by directing heat onto the food.
US08330078B2 Electrodes incorporating aluminum coated particles and methods thereof
A welding electrode and a method of manufacturing the same are provided. The welding electrode includes a metallic electrode portion and a flux portion adjacent and attached to the metallic electrode portion. The flux portion includes a material including particles, wherein each of the particles includes a substrate and an outer layer. The outer layer includes aluminum and substantially coats the substrate.
US08330075B2 Control method of optical cutting
The invention discloses a control method of optical cutting. A laser processing module is used to generate a cutting heat source and an auxiliary heat source. The control method of optical cutting includes the steps of determining a cutting path on the work piece first; then calculating a thermal stress distribution along the cutting path according to a heating condition; next determining an irradiation condition for the auxiliary cutting heat source according to the thermal stress distribution induced by the cutting heat source; and irradiating the work piece along the cutting path with the cutting heat source and simultaneously irradiating the work piece with the auxiliary cutting heat source. The cutting of the work piece is therefore finished.