Document Document Title
US07889693B2 Method and system for providing QoS in broadband convergence network deploying mobile IP
Provided is a method and system for providing a QoS in a broadband convergence network deploying a mobile IP. In the method, a service and policy is defined at a first network design stage for guaranteeing the QoS of the broadband convergence network. QoS parameters corresponding to the defined service and policy are reflected in a DSCP field corresponding to the defined service. The DSCP field and the QoS parameters are applied to an access router in a management network. Accordingly, the QoS can be guaranteed to be suitable for the service and policy and a seamless handover guaranteeing the QoS can be provided.
US07889692B2 Packet error rate estimation in a communication system
Data communication includes an estimate of packet error rate that is useful, for example, when there is insufficient data transmission to provide a direct measurement of packet error rate. At least one pilot channel output provides a basis to determine an estimated packet error rate. One example includes using a pilot channel ratio of an energy-per-chip to a noise spectrum density. Another example includes using a pilot symbol error rate from the pilot channel as the basis for determining the traffic channel packet error rate.
US07889687B2 High-frequency component
A high-frequency component in which a low-frequency-band transmission characteristic is not degraded even when impedance mismatching is generated by providing a SAW filter in a high-frequency-band circuit. The high-frequency component includes a diplexer having a high pass filter and a low pass filter connected in parallel to an antenna port, a high-frequency-band circuit serially connected to the high pass filter, and a low-frequency-band circuit serially connected to the low pass filter. A filter causing impedance mismatching is connected to the high-frequency-band circuit. The high pass filter includes a first series resonant circuit and a second series resonant circuit, and the resonance frequency of the first series resonant circuit is a trap frequency of a signal in the low-frequency band, and the resonance frequency of the second series resonant circuit is a trap frequency of undesired resonance generated in the transmission characteristic of the filter of the low-frequency-band side.
US07889681B2 Methods and devices for improving the multiple spanning tree protocol
The present invention provides improved unicast routing, multicast routing and unicast load sharing as compared with conventional methods. Preferred implementations of the invention provide improvements to IEEE 802.1Q. According to preferred aspects of the invention, each bridge is the root of its own multiple spanning tree instance (“MSTI”). Preferred implementations of the invention require no learning of media access control (“MAC”) addresses on the backbone of a network. Some methods of the invention can resolve spanning tree asymmetries. Preferred implementations of the invention require a very low computational load for control protocols.
US07889676B1 Systems and methods for storing and retrieving data
Systems and methods for storing and retrieving data are disclosed. An example method includes the steps of receiving a range of addresses, storing the range of addresses in a bulk object in a database for storing information associated with addresses. In some embodiments the storing includes inserting the bulk object into an index, the index being a structure used to access objects in the database. In some embodiments, the method may further include receiving a request to retrieve the addresses stored and generating a response to the response, where the response is at least in part based on the bulk object.
US07889671B2 Methods and apparatus to determine digital subscriber line configuration parameters
Example methods and apparatus to determine digital subscriber line (DSL) configuration parameters based on current and historical DSL performance characteristics are disclosed. A disclosed method includes obtaining first data representative of a current performance characteristic for a DSL modem, obtaining second data representative of a historical performance characteristic for the DSL modem, computing, at a maintenance server, a configuration parameter using the first and the second data, and reinitializing the DSL modem with the computed DSL configuration parameter when the computed configuration parameter has a value different from a previous value of the configuration parameter, wherein the DSL configuration parameter is computed prior to the reinitializing of the DSL modem.
US07889667B2 Method of routing I/O adapter error messages in a multi-host environment
A method and apparatus is provided for routing error messages in a distributed computer system comprising multiple root nodes, and further comprising one or more PCI switches and one or more I/O adapters, wherein each root node includes one or more system images. In one useful embodiment, a method is provided for routing I/O error messages to root nodes respectively associated with the errors contained in the messages. The method includes detecting occurrence of an error at a specified one of the adapters, wherein the error affects one of the system images, and generating an error message at the specified adapter. The method further comprises routing the error message from the specified adapter to the particular root node that includes the affected system image. The error message is then selectively processed at the particular root node, in order to identify the affected system image. Usefully, the step of routing the error message includes using a bus/device/function number associated with the error, together with a routing table located in one of the PCI switches, to route the error message to the correct root node and system image.
US07889665B2 Bridge port MAC address discovery mechanism in ethernet networks
Various exemplary embodiments are a method and of discovering medium access control (MAC) addresses in a network and a related access node including one or more of the following: receiving, at an access node, a diagnostic message from an operator, the diagnostic message comprising physical port information and indicating that at least a portion of a MAC address of a destination bridge port is unknown to the operator; forwarding the diagnostic message to a respective bridge port of the access node; determining whether the physical port information specified in the diagnostic message corresponds to a physical port of the respective bridge port; and sending a reply message to the operator specifying a MAC address of the respective bridge port.
US07889664B2 User equipment for detecting short codes
A receiver employing CDMA techniques estimates background noise based on a periodically updated code. The transmitted signal includes a periodically updated code of a predetermined type and wherein the received signal has CW interference in addition to the transmitted signal. The decision circuit determines if a value representing the likelihood of detection of the code exceeds a predetermined threshold. In the case of a pilot signal not being detected within a predetermined time period which corresponds to code update period, the background noise estimator obtains a new background estimation.
US07889660B2 System and method for synchronizing counters on an asynchronous packet communications network
A system and method for monitoring performance of an asynchronous network may include communicating a first network performance data packet including a first indicia over an asynchronous network from a first network node to a second network node. A second network performance data packet including a second indicia may be communicated from the first network node to the second network node. At least one communications data packet may be communicated from the first network node to the second network node between communicating the first and second network performance data packets. At least one performance manager counter at the second network node may be incremented in response to receiving each communications data packet between the first and second network performance data packets.
US07889659B2 Controlling a transmission rate of packet traffic
Controlling a transmission rate of packet traffic includes receiving packets from a network processor. The packets are stored in a buffer associated with a processor. If an occupancy level of the buffer is greater than a predetermined threshold, it is determined that the processor is congested. A message is transmitted to the network processor indicating the processor is congested.
US07889658B1 Method of and system for transferring overhead data over a serial interface
A method of and system for transferring overhead data from a sender to a receiver over a serial interface is provided. The overhead data is transferred over one or more data lines of the interface during one or more time periods in which excess bandwidth is available on the one or more data lines or while the transfer of the overhead data does not substantially impede the throughput of the payload transfer.
US07889657B2 Signaling completion of a message transfer from an origin compute node to a target compute node
Signaling completion of a message transfer from an origin node to a target node includes: sending, by an origin DMA engine, an RTS message, the RTS message specifying an application message for transfer to the target node from the origin node; receiving, by the origin DMA engine, a remote get message containing a data descriptor for the message and a completion notification descriptor, the completion notification descriptor specifying a local memory FIFO data transfer operation for transferring data locally on the origin node; inserting, by the origin DMA engine in an injection FIFO buffer, the data descriptor followed by the completion notification descriptor; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; and notifying, by the origin DMA engine, the application that transfer of the message is complete in dependence upon the completion notification descriptor.
US07889655B2 Techniques for detecting loop-free paths that cross routing information boundaries
Techniques for detecting loops in routes that cross route information boundaries include receiving a control message at a first edge node on one side of the boundary that is connected to a different second edge node on another side of the boundary. The control message indicates a particular network address of a particular node that is reachable from the first edge node. Distinguisher data is determined that indicates if a node in the first collection can reach the first edge node without leaving the first collection. An advertising message is sent from the first edge node to the second edge node that includes route data that indicates the particular network address and the distinguisher data. Based on the distinguisher data, a testing edge node in the first collection can determine whether there is a loop comprising both an internal path and an external path to the first edge node.
US07889651B2 Distributed joint admission control and dynamic resource allocation in stream processing networks
Methods and apparatus operating in a stream processing network perform load shedding and dynamic resource allocation so as to meet a pre-determined utility criterion. Load shedding is envisioned as an admission control problem encompassing source nodes admitting workflows into the stream processing network. A primal-dual approach is used to decompose the admission control and resource allocation problems. The admission control operates as a push-and-pull process with sources pushing workflows into the stream processing network and sinks pulling processed workflows from the network. A virtual queue is maintained at each node to account for both queue backlogs and credits from sinks. Nodes of the stream processing network maintain shadow prices for each of the workflows and share congestion information with neighbor nodes. At each node, resources are devoted to the workflow with the maximum product of downstream pressure and processing rate, where the downstream pressure is defined as the backlog difference between neighbor nodes. The primal-dual controller iteratively adjusts the admission rates and resource allocation using local congestion feedback. The iterative controlling procedure further uses an interior-point method to improve the speed of convergence towards optimal admission and allocation decisions.
US07889647B2 Switching apparatus for switching real-time packet in real time and packet switching method
A switching apparatus includes an identification device for identifying received real-time packets; a measurement device for measuring a reception interval of the real-time packets according to the identification identified by the identification device; and an output device for giving priority to the real-time packets over other types of packets and outputting the real-time packet by priority based on the measurement measured by the measurement device.
US07889645B2 Hybrid coordination function implementation
Methods, apparatuses, and systems are presented for transmission generation at a node in a wireless network involving writing a sequence of transmission instructions to a plurality of independently accessible buffers such that each one of the sequence of transmission instructions is written to one of the plurality of independently accessible buffers, reading each one of the sequence of transmission instructions from one of the plurality of independently accessible buffers, and carrying out at least one transmission task in accordance with each transmission instruction read from one of the plurality of independently accessible buffers, wherein a read operation for reading one of the sequence of transmission instructions from one of the independently accessible buffers may overlap in time with a write operation for writing another one of the sequence of transmission instructions to another one of the independently accessible buffers.
US07889638B2 Preservation of a PPP session in a redundant system
Methods, apparatuses, and systems are presented for conducting a point-to-point (PPP) session relating to establishing a PPP session involving at least a local node and a remote node, wherein the local node comprises a data plane for handling transfer of data for the PPP session at the local node, and wherein the local node comprises a first control plane for controlling operations of the data plane, replicating at least one portion of information accessed by the first control plane, such that the at least one portion of information may be accessed by a second control plane, and switching from the first control plane to the second control plane, such that the second control plane controls operations of the data plane, wherein the second control plane accesses the at least one portion of information replicated from the first control plane, wherein the data plane is capable of continuing to handle transfer of data for the PPP session during switching from the first control plane to the second control plane.
US07889631B2 Optical information recording medium, and substrate and manufacturing method for the optical information recording medium
In an optical disk including at least a rewritable phase change material and comprising a recording layer having a reflectivity of more than 15%, an address output value as an address pit signal component occupying in a reproduced signal in a non recording state is prescribed to be 0.18 though 0.27 or a numerical aperture of an address pit signal occupying in a reproduced signal in a non recording state is prescribed to be more than 0.3.
US07889630B2 Record carrier
The invention relates to a record carrier (1) comprising an area for storing data, the record carrier adhering to a pre-defined, standardized condition with respect to a physical parameter. The record carrier comprises parameter information on the physical parameter, which parameter information is of a higher precision than the precision of the physical parameter mentioned in the pre-defined, standardized condition. Using this high precision parameter information, it is possible to derive the exact position of a visible image pixel data making up a label. This parameter information thus enables a recorder to write a visible label on the record carrier according to the invention.
US07889628B2 Ferroelectric recording medium and writing method for the same
A ferroelectric recording medium and a writing method for the same are provided. The ferroelectric recording medium includes a ferroelectric layer which reverses its polarization when receiving a predetermined coercive voltage. A nonvolatile anisotrophic conduction layer is formed on the ferroelectric layer. A resistance of the anisotrophic conduction layer decreases when receiving a first voltage lower than the coercive voltage, and the resistance of the anisotrophic conduction layer increases when receiving a second voltage higher than the coercive voltage. Multi-bit information is stored by a combination of polarization states of the ferroelectric layer and the resistance of the anisotrophic conduction layer. Accordingly, multiple bits can be expressed on one domain of the ferroelectric recording medium.
US07889627B2 Preload modulation to reduce head motion hysteresis
An apparatus includes a data storage media and a plurality of heads, the data storage media and heads being structured and arranged for relative movement between the heads and storage media causing the heads to move along a scan path, and an actuator for changing a magnitude of head to media force as the heads move along the scan path. A method for reducing head motion hysteresis is also provided.
US07889625B2 Optical pickup and optical disk driving apparatus using the same
An operation mode is arranged to be switched between in recording/reproducing and in adjustment. A switching circuit with a hold circuit therefor is on a light receiving element including an optical pickup having a laser light source emitting a laser beam, an objective lens focusing the laser beam onto a recording layer of a disc, and a light receiving element receiving an optical signal modulated. The light receiving element is operable in an adjustment mode for selecting of the signal of an individual light-receiving surface and for outputting the same. The light receiving element is configured so that the address selection signal line in the adjustment mode may be used also as a sensitivity switching signal line. A compact and highly reliable optical pickup with less signal lines can be provided.
US07889617B2 Optical pickup apparatus, recording/reproducing apparatus provided with the optical pickup apparatus, optical element, and information recording/reproducing method
An optical pickup apparatus for reproducing information from an optical information recording medium or for recording information onto an optical information recording medium, is provided with a first light source for emitting first light flux having a first wavelength; a second light source for emitting second light flux having a second wavelength, the first wavelength being different from the second wavelength; a converging optical system having an optical axis and a diffractive portion, and a photo detector; wherein in case that the first light flux passes through the diffractive portion to generate at least one diffracted ray, an amount of n-th ordered diffracted ray of the first light flux is greater than that of any other ordered diffracted ray of the first light flux, and in case that the second light flux passes through the diffractive portion to generate at least one diffracted ray, an amount of n-th ordered diffracted ray of the second light flux is greater than that of any other ordered diffracted ray of the second light flux, where n stands for an integer other than zero.
US07889616B2 Polarization state detector systems and methods for read-out of multilevel oriented nano-structure optical media
A polarization detection system structured for optical read-out of disc-shaped optical data/information storage and retrieval media with surfaces comprised of pits or marks configured as multilevel oriented nano-structures (ONS) with varying pit or mark orientations and widths. The polarization detection system comprises: an optical beam source; a stage for mounting and rotating an optical disc medium about a central axis; at least one photodetector; a beam splitter positioned in an optical path between the source and stage, for directing an incident beam from the source onto an optical disc mounted on the stage and a return beam from the disc onto the photodetector; and an optical polarizer positioned in an optical path between the beam splitter and the at least one photodetector, for detection and analysis of changes in polarization of the return beam effected by variation of the orientation of the walls and/or widths of the pits or marks of the disc.
US07889614B2 Optical disc and optical disc device
In a multilayer optical disc having information layers conforming to a plurality of different optical disc standards, because the type of each information layer is not recorded in the other information layers, in read and write operations by a compatible optical disc device conforming to a plurality of optical disc standards, every time the information layer being accessed changes, it has been necessary to read the type of the information layer and select a method of generating a tracking error signal adapted to the type of information layer, so access has taken time. In order to solve the above problem, in the optical multilayer disc according to the present invention, having information layers conforming to a plurality of different optical disc standards, in an area in one of the information layers, information about the other information layers is recorded. The time required to access the other information layers can be reduced by using this information to select a tracking error signal generating method.
US07889611B2 Media processor capable of efficiently discarding media
A media processor, such as an optical disk publisher, is capable of efficiently discarding media such as a defective CD without using a manual discarding process. At the time of media publication of an optical disk publisher 5, blank media 14 stored in a supply-side stacker 13 is taken out by a media conveying mechanism 12 and is conveyed to a media drive 15, and predetermined data is written into the blank media 14. Printing is performed on printing surfaces of the media into which data has been normally written by means of a label printer 19. The published media is stored in a storage-side stacker 22. Defective media on which a failure in writing has occurred is disposed of so as not to be readable by mechanically destroying a recording surface of the defective media by means of a media disposal mechanism while moving the defective media in a state where the defective media is mounted on a media tray 71 of a printer 19. Discarded media after the disposal is ejected from a media outlet 25.
US07889610B2 Multi-layered information recording medium, recording apparatus, and recording method
A multi-layered information recording medium including a plurality of recording layers, the multi-layered information recording medium comprising: a user data area for recording user data; and a plurality of spare areas including at least one replacement region, wherein when the user data area includes at least one defect region, the at least one replacement region may be used in place of the at least one defect region, wherein a first spare area of the plurality of spare areas is positioned so as to be contiguous to a first user data area of a first recording layer, a second spare area of the plurality of spare areas is positioned so as to be contiguous to a second user data area of a second recording layer, and the first spare area and the second spare area are positioned approximately at the same radial position on the multi-layered information recording medium.
US07889606B2 Optical disc drive and control method thereof
An optical disc drive and a control method thereof are disclosed to prevent unstable servo-control of a pickup module caused by an abnormal control signal, when recording/reproducing/erasing of information on/from an optical disc in the optical disc drive, and in particularly, possible collision between the pickup module and the optical disc, even when the pickup module very closely approaches the surface of the optical disc during recording/reproducing/erasing of information on/from a high density optical disc. The optical disc drive includes a pickup module having an objective lens focusing a laser on the surface of a recording layer of the optical disc, and a servo-controlling unit performing the focus servo-control of the pickup module using a high frequency broadband control and a low frequency broadband control of a focus error signal where the high frequency broadband control is performed prior to the frequency broadband control.
US07889605B2 Information reproducing apparatus
The present invention provides an information reproducing apparatus which can directly and intuitively designate a reproduction point, as desired by a user, on the basis of a change in level of a visually-provided information amount. An optical disk reproducing apparatus 100 reads content data from an optical disk 10 loaded and has a reproduction-time specification operating unit 220 which is formed by a movable operator MF. The reproduction-time specification operating unit 220 displays a change in amount of information on a beat according to elapsed time in the entire content data and includes a movable operator MF which is used to specify reproduction time of the optical disk 10 while being movable in an operation area OF corresponding to a display area A1. The reproduction-time specification operating unit 220 moves the movable operator MF such that the center of the movable operator MF corresponds to the reproduction time of the contents data in the beat density data displayed on a display unit 221.
US07889604B2 Information recording medium, apparatus, and method, using dummy data in dummy data recording area
An information recording medium is provided with: a first recording layer in which one portion of record information including predetermined data can be recorded, the predetermined data being (i) capable of setting a recording layer close to a physically or optically recorded state, and (ii) capable of setting the recording layer close to a buffer state for finalizing; and a second recording layer in which another portion of the record information can be recorded by laser light transmitted through the first recording layer, the information recording medium is provided with a management area in which management information can be recorded, the management information including (iii) identification information indicating whether or not there is a predetermined data recording area in which the predetermined data can be recorded, (iv) position information of the predetermined data recording area, and (v) attribute information of the predetermined data recording area.
US07889600B2 Sonar systems
A vessel-mountable integrated sonar system is provided. The vessel-mountable integrated sonar system comprises at least one imaging sonar data acquisition device and at least one processing system electronically and removably connected to the at least one imaging sonar data acquisition device, wherein the sonar data acquisition device preferably provides acoustic data to the processing system, producing sonar imageries utilizing the acoustic data, and wherein the system provides digital tilt and azimuth direction feedback for accurate geo-referencing of data to localize targets of interest.
US07889598B2 Method of seismic processing for the decomposition of a wavefield into harmonic components and applications to the determination of angular gathers of reflectivity
Method of processing seismic data representative of at least one wavefield, characterized in that local harmonic components of the wavefield are determined at a given point P of the subsurface by implementing a recurrent processing according to which a harmonic of rank n+1, n being a positive integer, is determined as a function of one or more harmonics of rank n or lower to which is applied at least one filtering which depends on at least one local parameter at the point P, this local parameter being chosen from among the components of the wavevector, the frequency of the wavefield, the local velocity, the local anisotropy parameters or any combination of these various parameters.
US07889591B1 ASIC including vertically stacked embedded non-flash re-writable non-volatile memory
A multiple-type memory is disclosed. The multiple-type memory includes memory blocks in communication with control logic blocks. The memory blocks and the control logic blocks are configured to emulate a plurality of memory types. The memory blocks can be configured into a plurality of memory planes that are vertically stacked upon one another. The vertically stacked memory planes may be used to increase data storage density and/or the number of memory types that can be emulated by the multiple-type memory. Each memory plane can emulate one or more memory types. The control logic blocks can be formed in a substrate (e.g., a silicon substrate including CMOS circuitry) and the memory blocks or the plurality of memory planes can be positioned over the substrate and in communication with the control logic blocks. The multiple-type memory may be non-volatile so that stored data is retained in the absence of power.
US07889588B2 Circuit having gate oxide protection for low voltage fuse reads and high voltage fuse programming
A circuit for reading and programming a fuse. The electronic circuit includes a data fuse coupled to a data node and a reference fuse coupled to a reference node. A programming circuit is coupled to the data node, wherein the programming circuit is configured to, when activated, cause the data fuse to be programmed. A sensing circuit is configured to draw current from the data node and the reference node in order to develop a voltage differential between the data node and the reference node during a read operation. A read circuit is configured to, when activated, enable the sensing circuit to develop the voltage differential during the read operation. A protection circuit is configured to form a voltage divider within the sensing circuit during programming of the fuse.
US07889586B2 Circuit and method for retrieving data stored in semiconductor memory cells
A circuit comprises at least one memory cell adapted to store data in terms of values of an electrical characteristic thereof, which exhibits a variability with temperature according to a first variation law; a voltage generator is provided for generating a voltage to be supplied to the at least one memory cell for retrieving the data stored therein, the voltage generator including first means adapted to cause the generated voltage take a value in a set of target values including at least one target value, corresponding to an operation to be performed on the memory cell. The voltage generator comprises second means for causing the value taken by the generated voltage vary with temperature according to a prescribed second variation law exploiting a compensation circuit element having said electrical characteristic.
US07889583B2 Memory circuit and tracking circuit thereof
A tracking circuit of a memory circuit is provided. The tracking circuit is coupled between a control circuit and a sense amplifier, delays a word-line pulse signal generated by the control circuit by a delay period to generate a sense amplifier enable signal enabling the sense amplifier to detect data bits output by a memory cell array. In one embodiment, the tracking circuit comprises a plurality of dummy cells and a dummy bit line. At least one of the plurality of dummy cells comprises a plurality of cascaded transistors cascaded between the dummy bit line and a ground voltage for lowering down a dummy bit line signal on the dummy bit line when the word-line pulse signal is enabled. The dummy bit line is coupled to the dummy cells and carries the dummy bit line signal.
US07889581B2 Digital DLL circuit
A digital delay locked loop circuit generates a delay value to delay the timing of taking in read-data by a memory interface when data is read from a memory. The digital delay locked loop circuit includes a selector that selects either one of a clock signal and a data strobe signal as a signal to output; a delay line that induces delay on the signal output from the selector when the signal passes through the delay line; and a phase-comparing/delay-value determining unit that compares a phase of the clock signal and a phase of the signal output from the delay line, and that determines a delay value that defines an amount of delay to be induced on the data strobe signal when passing through the delay line.
US07889568B2 Memory, memory operating method, and memory system
A memory includes a plurality of memory cells each of which includes a memory transistor and a selection transistor; a control gate line; a selection gate line; a source line; a bit line; a first driver that sets the control gate line and the selection gate line at a first voltage in a program operation; a second driver that sets the source line at a second voltage in the program operation, and sets the source line at a third voltage higher than the second voltage while the control gate line and the selection gate line are set at the first voltage; and a third driver that sets the bit line at a fourth voltage after the source line is set at the second voltage, the bit line being coupled to a memory cell being programmed.
US07889567B2 Nonvolatile memory device for preventing program disturbance and method of programming the nonvolatile memory device
A nonvolatile memory device for preventing program disturbances includes a memory cell array block, a word line driver, and a well bias control unit. The memory cell array block includes at least one cell string having a plurality of memory cells serially connected to a bit line and alternately connected to even word lines and odd word lines. After a program verification, the word line driver drives the even word lines with a first voltage and then the odd word lines with the first voltage to drop the even word line to a voltage lower than the first voltage. The well bias control unit floats a bias of a p-well formed by high voltage NMOS transistors that apply corresponding driving voltages to the even word lines and the odd word lines according to an operation mode of a program operation, a read operation, and an erase operation.
US07889566B2 Flash memory device, programming method thereof and memory system including the same
A verify voltage may be changed into a plurality of voltage levels based upon a logic state of each of the memory cells and characteristics or logic states of other memory cells (e.g., adjacent) to each of the memory cells.
US07889565B2 Nonvolatile semiconductor memory device and control method
A nonvolatile semiconductor memory device includes a plurality of memory cells, a read/program circuit which supplies a program voltage and a program verification voltage to the plurality of memory cells and desired data is programmed, supplies a first program verification voltage to the plurality of memory cells and then supplies a second program verification voltage to the plurality of memory cells when programming the data, and a read/program control circuit which determines memory cells which reach a first data program state and memory cells which do not reach the first data program state when supplying the first program verification voltage, and determines memory cells which reach a second data program state and memory cells which do not reach the second data program state when supplying the second program verification voltage, and supplies a program control voltage which changes the program operation state for each memory cell.
US07889556B2 Flash memory having insulating liners between source/drain lines and channels
A memory array comprises a semiconductor body having a plurality of trenches aligned generally in parallel. The trenches contain semiconductor material, such as doped amorphous silicon, and act as source/drain lines for the memory array. Insulating liners lie between the semiconductor material within the trenches and the semiconductor body. A plurality of word lines overlie the plurality of trenches and channel regions in the semiconductor body in an array of cross points. Charge trapping structures lie between the word lines and the channel regions at the cross points, providing an array of flash memory cells. The charge trapping structures comprise dielectric charge trapping structures adapted to be programmed and erased to store data. A method for manufacturing such devices includes patterning and forming the sources/drain lines with insulating liners prior to formation of the charge trapping structure over the channel regions.
US07889554B2 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities.
US07889551B2 Page buffer of non-volatile memory device and programming method of non-volatile memory device
A page buffer includes a first register, a second register and a data I/O unit. The first register temporarily stores data to be programmed into cells included in a first memory cell block group, or reads and stores data of a corresponding memory cell. The second register temporarily stores data to be programmed into cells included in a second memory cell block group, or reads and stores data of a corresponding memory cell. The data I/O unit inputs specific data to the first register and the second register, or outputs data stored in the first register and the second register.
US07889548B2 Method for reducing a reset current for resetting a portion of a phase change material in a memory cell of a phase change memory device and the phase change memory device
According to one embodiment, at least a portion of the phase change material including a first crystalline phase is converted to one of a second crystalline phase and an amorphous phase. The second crystalline phase transitions to the amorphous phase more easily than the first crystalline phase. For example, the first crystalline phase may be a hexagonal closed packed structure, and the first crystalline phase may be a face centered cubic structure.
US07889547B2 Memory and writing method thereof
A memory having a memory cell, a resistance estimator and a write current generator. The resistance estimator is coupled to the memory cell to estimate the resistance of the memory cell and outputs an estimated resistance level. According to the estimated resistance level, the write current generator generates a write current to flow through the memory cell and to change the resistance of the memory cell. The write current is in a pulse form, and the write current generator sets the pulse width, or magnitude, or both the pulse width and the magnitude of the write current according to the estimated resistance level.
US07889546B2 Phase-change random access memory device, system having the same, and associated methods
A phase-change random access memory (PRAM) device includes a PRAM cell array including a first sector and a second sector, a first global bit line coupled to a first local bit line of the first sector and a first local bit line of the second sector, and a first plurality of global bit line discharge units coupled to the first global bit line, the first plurality of global bit line discharge units configured to discharge the first global bit line in response to a first global discharge signal.
US07889541B2 2T SRAM cell structure
A SRAM cell structure includes a first N type switch, a second N type switch, a first storage node, and a second storage node. The first N type switch has a control terminal connected to a word line and a first terminal connected to a bit line. The second N type switch has a control terminal connected to the word line and a first terminal connected to an inverted bit line. The first storage node has a first terminal connected to a second terminal of the first N type switch. The second storage node has a first terminal connected to a second terminal of the second N type switch.
US07889540B2 Semiconductor device including memory having nodes connected with continuous diffusion layer but isolated from each other by transistor
A semiconductor device has a first inverter including a drive transistor and a load transistor; a second inverter including a drive transistor and a load transistor, a transmission transistor provided between the output terminal of the first inverter and one line of a bit line pair, a transmission transistor provided between the output terminal of the second inverter and the other line of the bit line pair; and an isolation transistor for isolating the drive transistor and the transmission transistor. The transmission transistor, the transmission transistor, the drive transistor, and the isolation transistor are formed in a continuous active region and the isolation transistor is provided between the drive transistor and the transmission transistor.
US07889537B2 Non-volatile memory device and method for writing data thereto
The present invention provides a method for writing data to a non-volatile memory device having first wirings and second wirings intersecting one another and memory cells arranged at each intersection therebetween, each of the memory cells having a variable resistive element and a rectifying element connected in series. According to the method, the second wirings are charged to a certain voltage not less than a rectifying-element threshold value, prior to a rise in a selected first wiring. Then, a selected first wiring is charged to a voltage required for writing or erasing, after which a selected second wiring is discharged.
US07889529B2 Power converter
In a bridge type power converter including series connectors of power semiconductor switches having first and second main terminals and a control terminal; plural steps of the series connectors connected in parallel, a gate drive circuit for limiting voltage between the first and second main terminals of the power semiconductor switch to a predetermined value only in turning off the power semiconductor switch is provided between the first main terminal and the control terminal of the power semiconductor switch.
US07889525B2 System and method for phase dropping and adding
A multi-phase voltage regulator comprises a plurality of current supplying stages, each current supplying stage configured to supply a local output current equaling at least a portion of a load current output from the multi-phase voltage regulator; and a plurality of control circuits, each control circuit coupled to a respective one of the plurality of current supplying stages, wherein each control circuit calculates a control signal based, at least in part, on a sampled current representative of the respective local output current and a sampled current representative of a master output current. The control signal from each control circuit causes the respective current supplying stage to be disabled gradually over a first time interval if the sum of the local output current and the master output current is detected as being below a respective first predetermined level.
US07889523B2 Variable load, variable output charge-based voltage multipliers
A charge-based voltage multiplier device comprising a charge-pump circuit and a charge-pump controller is provided. The charge-pump circuit is configured to multiply an input voltage signal (Vin) into an output voltage signal (Vout), the charge-pump circuit includes a plurality of charge-pump stages, wherein at least one of the charge-pump stages includes a weighted capacitor array of pump cells. The charge-pump controller is configured to provide a pump cell select to selectively control the weighted capacitor array of pump cells of the at least one of the charge-pump stages of the charge-pump circuit.
US07889522B2 Flyback switching power supply and control method thereof
A flyback switching power supply capable of regulating an operation frequency based on a current regulation mechanism is disclosed. The flyback switching power supply includes a transformer, a switch, a switch control circuit, and a regulation circuit. The transformer includes a primary winding for receiving an input voltage, a secondary winding for generating an output voltage, and an auxiliary winding. The switch is serially connected to the primary winding for controlling a current flowing through the primary winding. The switch control circuit has a frequency control port and functions to work around an operation frequency for controlling the switch. The operation frequency is under control by a frequency setting current flowing through the frequency control port. The regulation circuit is electrically coupled between the auxiliary winding and the frequency control port. The regulation circuit adjusts the frequency setting current based on an induced current generated by the auxiliary winding.
US07889518B2 Half-bridge power converter system and method of operation
In one embodiment, a power converter generates an output voltage by modulating an input voltage according to operations of a first switch and a second switch connected in a half-bridge arrangement. The power converter includes a switch driver circuit for controlling the turning on and off of the first and second switches. A PWM controller generates a switch driver control signal for controlling the switch driver circuit according to an output voltage. The switch driver circuit generates an on-time control signal for turning off the first switch when the first switch has been turned on for longer than a threshold period.
US07889516B2 Cable management system with inspection window
A cable management system with an inspection window allows a technician to see available ports in a telecommunications module. The cable management systems inspection window is substantially transparent to permit visual access to underlying ports and associated electrical connectors. The inspection window is solid to prevent physical access to the electrical connectors, thereby preventing contamination, short-circuiting or other damage. The visual access permitted by an inspection window prevents the need to remove a cable trough to find available ports, which reduces the chance of causing a disruption in service by inadvertently disconnecting a cable that is in or around the cable trough.
US07889514B2 Wiring board, semiconductor device, and method of manufacturing the same
A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board. Connections for very small wiring are thereby made possible, and a plurality of semiconductor elements can be very densely connected.
US07889507B2 Portable apparatus
First and second housings of a metal sheet are superposed over each other and fixed to each other by bolts to form an element receiving space. An antenna is fixed to the second housing by a bolt so as to be adjacent to the first housing. A hook section is fixed to the first housing. The hook section is inserted in a hole of the antenna, a step-shaped forward lower step section of the hook section is engaged with the peripheral edge of the hole in the antenna, and thus the first housing and the antenna are fixed to each other. The antenna is embedded in resin and covered by the resin.
US07889504B2 Portable electronic device
A portable electronic device includes: a printed circuit board having opposite first and second surfaces and provided with at least one electronic component, the first surface being provided with at least one conductive pad that is electrically coupled to the electronic component; and a flexible circuit board having a main part stacked on the second surface of the printed circuit board, and an extension part extending and folded from the main part and stacked on the first surface of the printed circuit board. The extension part is provided with at least one conductive bump thereon. An outer surface of the main part is provided with at least one input key that is electrically coupled to the conductive bump. The conductive pad is bonded to the conductive bump.
US07889503B2 Electronic appliance having an electronic component and a heat-dissipating plate
An electronic appliance includes a circuit board mounted with an electronic-circuit component. The circuit board is covered with a shield, and a metallic heat-dissipating member is arranged on the electronic-circuit component. The shield is grounded on the circuit board, and arranged such that at least one of the surfaces is in the vicinity of the heat-dissipating member. The heat-dissipating member is grounded on the circuit board by a ground member, and at the periphery of the ground member, magnetic members are arranged.
US07889498B2 Portable electronic device case with battery
A case for an electronic device protects and extends the battery life of the electronic device. The case has a lower case portion and an upper case portion, which assemble together to protect the top, side, and bottom edges of the electronic device. The lower case portion includes a battery to extend the battery life of the electronic device.
US07889494B2 Portable electronic device holster with guided docking station
A holster provides a carrier for removable storing a portable electronic device, such as a cellular phone, PDA or MP3 player, and a fastener for securing the carrier to the user's clothing or bag. The holster includes a docking station inside the carrier and a pair of guide rails extending from the docking station to guide a device into electrical contact with the docking station. The docking station and rails are preferably pivotally mounted to the carrier to that they can be pivoted for convenient and easy insertion and removal of a device from aligned contact with the docking station. The dock equipped holster can then provide several power supply options for the user, including solar cells along an exterior surface of the carrier, wireless charging tags or pass through power cord ports, as well as data port and audio port pass through.
US07889492B2 Vibration dampening structure for disk drive
A vibration dampening structure for a disk drive includes a bracket for receiving the disk drive and an elastic peg for dampening vibration of the disk drive. The bracket includes a pair of side panels for receiving the disk drive therebetween. An elastic clamp is formed on each side panel. A hole is defined in the clamp. The elastic peg includes a flexible head portion abutting the disk drive, and a handle portion extending into the hole. The head portion is configured for buffering the disk drive in an inner side of the bracket. The handle portion is capable of being pulled to move the head portion and the clamp away from the disk drive for disengaging the elastic peg from the disk drive.
US07889491B2 Shockproofing module and assembly of the shockproofing module and an electronic device carrier case
An assembly of a shockproofing module and an electronic device carrier case includes an electronic device carrier case and a plurality of shockproofing modules. The electronic device carrier case has two side walls spaced apart from each other, and each of the side walls is formed with at least one hole. Each shockproofing module is disposed at a respective one of the holes in the side walls, and includes a shockproofing washer and a pin component. The shockproofing washer is disposed at the respective one of the holes in the side walls, and the pin component is extended into the shockproofing washer and causes a part of the shockproofing washer to expand in radial directions, thereby enabling the shockproofing washer to engage tightly the side wall and avoiding tilting of the pin component, thus enhancing the stability of the shockproofing modules disposed at the side walls.
US07889487B2 Portable computer and hinge mechanism thereof
A portable computer and a hinge mechanism thereof are provided. The portable computer includes a display screen, a host and a hinge mechanism. The hinge mechanism is connected with the display screen and the host. The hinge mechanism is used for rotating the display screen around the host. The hinge mechanism includes a bottom board, a pivot, a network connecter and a slanting board. The pivot is disposed on the bottom board, wherein one end of the pivot is connected with the host and the other end of the pivot is connected with the display screen. The network connecter is disposed on the bottom board. The slanting board is disposed on the bottom board and slants to the pivot. The slanting board has an opening which exposes the network connecter.
US07889484B2 Display apparatus
A display apparatus is provided. A frame is fixed and supported at the rear of a front panel forming the front portion of the display apparatus, and a separate bracket member is not mounted on the edges of the front panel. Thus, the front exterior of the display apparatus is neatly finished, and the display screen looks bigger than it actually is.
US07889478B2 Electricity conducting wheel structure
An electricity conducting wheel includes a wheel body, and an electricity conducting plate; the wheel body includes a bearing, a frame, and a conducting tire around the frame; the conducting plate is joined in the wheel body, with the bearing being held in a middle fitting hole thereof; the conducting plate has several conducting parts extending outwards from its fitting hole; the frame is directly joined on the bearing and the conducting parts of the conducting plate in an injection molding process thereof; the conducting plate has several fastening sections protruding from an outward end of each of the conducting parts; the fastening sections bend so that an angle exists between each of the conducting parts and each of the fastening sections; the tire is directly joined on the frame and the fastening sections of the conducting plate in another injection molding process, whereby the tire is formed.
US07889476B2 Electronics for multipole remote operated relay
An electrical distribution system for selectively connecting an electrical power source to load devices comprises a panelboard having a plurality of load circuit positions. A remote operated relay is mountable in the panelboard in an adjacent pair of the load circuit positions comprising a multipole switching device, and a switch control for controlling the switching device, the switch control comprising a control circuit for operating the switching device responsive to control commands and a communication circuit for receiving control commands. An input/output (I/O) controller is mounted in the panelboard for controlling operation of the remote operated relay, the I/O controller comprising a programmed controller for generating the control commands for commanding operation of the remote operated relay, the control system including a communication circuit for communication with the remote operated relay communication circuit.
US07889475B2 Power strip having surge protective devices
The present invention provides a power strip having surge protective device. The power strip includes a first surge protective device, a buffer conductive device and a second surge protective device. When a surge is inputted into the power strip, the surge is subject to two-stage suppressions so as to protect the electrical appliances which are electrically connected to the power strip.
US07889473B2 Combination current sensor and relay
A protection device for monitoring current in a power cable to an electrical device and for controlling a remotely located starter for the electrical device in response to a system controller. The device includes a transformer magnetically linked with the power cable to produce a voltage signal in response to the presence of a changing current within the power cable. An input circuit located in a single housing together with the transformer is electrically connected to the transformer so as to receive the voltage signal. The input circuit produces, in response to the voltage signal, either a first signal or a first circuit condition at the output terminal of the input circuit, representative of the changing current in the power cable. A switch circuit also in the same container with the transformer has a terminal for sensing either a second signal or a second circuit condition of the remotely located system controller. The switch circuit has a second terminal to provide either a third signal or a third circuit condition effective to control the starter, in response to sensing one of the second signal and the second circuit condition. All of the transformer, the input circuit, and the switch circuit are located in a single unitary package which is easily mounted and adjusted to a desired position.
US07889470B2 ESD protection circuit with active triggering
An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.
US07889457B2 Perpendicular magnetic recording head device capable of increasing magnetic field gradient to exhibit excellent recording performance while maintaining magnetic field intensity
There is provided a perpendicular magnetic recording head device which can increase magnetic field gradient to exhibit excellent recording performance while maintaining magnetic field intensity capable of performing information recording well. In a perpendicular magnetic recording head device composed of a main magnetic pole layer and a return path layer which are laminated with a nonmagnetic insulating layer therebetween, the return path layer has a two-layer structure composed of a low saturation magnetic flux density layer (low Bs layer), and a high saturation magnetic flux density layer (high Bs layer) formed an the low Bs layer and made of a material that has a relatively high saturation magnetic flux density. In a front end surface of the return path layer, the low Bs layer and the high Bs layer are exposed.
US07889455B2 Computer program product for power system for a robot accessor of an automated data storage library
A computer program product for operating an automated data storage library with storage shelves, data storage drive(s), a bus bar; and a robot accessor with a drive system for moving the robot accessor, an accessor communication interface, a bus bar relay configured to engage and disengage the bus bar; a robot control configured to operate the drive system to move the robot accessor, to operate the picker, to operate the bus bar relay to engage the bus bar when the robot accessor is stationary; and a power storage system configured to receive power via the bus bar relay when the bus bar relay engages the bus bar, to store the received power, and to deliver the stored power to the robot accessor at least when the bus bar relay is disengaged.
US07889449B2 Memory device for storing data and reading data
According to an aspect of an embodiment, a memory device has a medium including a plurality of tracks, each of which has a plurality of sectors separated by a plurality of servo areas, for storing data in the sectors of the tracks, a head for writing data into and reading data from the medium and a controller for determining whether the head has read out data from a sector on a target track correctly or not in reference to information obtained from servo areas sandwiching the sector and for driving the head so as to retry reading out data from the sector when the controller determines that the head failed to have read out data on the target track.
US07889443B2 Camera, handlens, and microscope optical system for imaging and coupled optical spectroscopy
An optical system comprising two lens cells, each lens cell comprising multiple lens elements, to provide imaging over a very wide image distance and within a wide range of magnification by changing the distance between the two lens cells. An embodiment also provides scannable laser spectroscopic measurements within the field-of-view of the instrument.
US07889441B2 Lens system
A lens system including sequentially, from an object side to an image side, a first lens of a biconvex type having two aspherical surfaces, a second lens of a biconcave type having at least one aspherical surface, a third lens having two aspherical surfaces and having a positive refracting power, and a fourth lens having two aspherical surfaces and having a negative refracting power.
US07889440B2 Zoom lens, optical apparatus equipped therewith and method for manufacturing the zoom lens
A zoom lens ZL installed in a single-lens reflex digital camera 1 and the like includes, in order from an object side, a first lens group G1 having positive refractive power, a second lens group G2 having negative refractive power, and a rear lens group GR having positive refractive power. The second lens group G2 includes at least one positive lens and a negative lens disposed adjacent to the object side of the positive lens having largest refractive power among the positive lenses. Each distance between lens groups varies upon zooming from a wide-angle end state and a telephoto end state. Thereby providing a zoom lens having excellent optical performance, an optical apparatus equipped the zoom lens, and a method for manufacturing the zoom lens.
US07889438B2 Large-aperture zoom lens
The invention is directed to a large-aperture zoom lens that provides an aperture ratio as small as 2.8 as strongly desired, facilitates implementation with a vibration compensating mechanism, and successfully downsizes in more compact lens. The large-aperture zoom lens has four of groups of lens pieces, that is, the leading or foremost 1st lens group of positive refractivity, the succeeding 2nd lens group of negative refractivity, the 3rd lens group of positive refractivity, and the trailing 4th lens group of positive refractivity, and as the zoom lens varies power from the wide-angle end to the telephoto end, the 1st and 2nd lens groups split farther away from each other, the 2nd and 3rd lens groups come closer to each other, and the 3rd and 4th lens groups come closer to each other. The 3rd lens group includes the leading subset of the lens pieces of positive refractive power located closer to an object and the trailing subset of negative refractive power, and in order to compensate for tremors of user's hand(s) and vibrations of a camera and adjust an image formed, the trailing subset of the 3rd lens group alone are displaced in directions perpendicular to the optical axis. The 4th lens group has its foremost lens piece shaped in concave lens on a surface closer to the object.
US07889436B2 Zoom lens and camera having the same
A zoom lens includes, in order from an object side to an image side, a first lens unit having a positive refractive power, a second lens unit having a negative refractive power, a reflection unit including a reflection surface for bending an optical path, a third lens unit having a negative refractive power, a fourth lens unit having a positive refractive power, and a fifth lens unit having one of a positive refractive power and a negative refractive power. In the zoom lens, at least the second lens unit and the fourth lens unit move during zooming while the reflection unit remains stationary. In addition, a focal length of the first lens unit and respective focal lengths of the zoom lens at a wide-angle end and at a telephoto end are appropriately set.
US07889435B2 Imaging device having a dual lens optical system
A dual lens optical system includes a first optical system redirecting an optical axis of light representing an image of an object by 90° to form an image on a image sensor, and a second optical system having a movable reflection member configured to be selectively positioned on the part of the redirected optical axis of the optical axis of light passing through the first optical system, and redirecting the light representing the image of the object by 90° using the movable reflection member to form an image on the image sensor, wherein the first optical system and the second optical system share lenses and the image sensor located after the movable reflection member along an optical path.
US07889433B2 Immersion type microscope objective lens
An immersion type microscope objective lens OL includes, in order from a cover plate C side, a first lens group G1 having positive refractive power, a second lens group G2 having positive refractive power, and a third lens group G3 having negative refractive power. The first lens group G1 includes at least one cemented lens. The second lens group G2 includes at least two achromatic lenses. The third lens group G3 includes, in order from the object side, an achromatic lens CL31 having a strong concave surface facing an image side, and an achromatic lens CL32 having a strong concave surface facing the object side.
US07889427B2 Light collimating and diffusing film and system for making the film
A light collimating and diffusing film and a method for making the film are provided. The film includes a plastic layer having a first side and a second side opposite the first side and at least a first peripheral edge. The first side has a first textured surface, wherein between 7 to 20 percent of slope angles on the first textured surface proximate a first axis has a value between zero and five degrees. The first axis is substantially parallel to the first peripheral edge. The plastic layer collimates light propagating therethrough.
US07889423B2 Surgical microscope having an OCT-system and a surgical microscope illuminating module having an OCT-system
A surgical microscope (100) has an illuminating module (120). The illuminating module contains an illuminating optic which images a field diaphragm (124) to a parallel illuminating beam path at infinity. The field diaphragm (124) is illuminated by a light source. The illuminating optic includes a first lens assembly and a second lens assembly which functions to image the field diaphragm (124) into the object region (108) via the microscope main objective (101) of the surgical microscope (100). An in-coupling element (128) is provided between the first lens assembly (125) and the second lens assembly (126) and this in-coupling element couples the OCT-scanning beam into the illuminating beam.
US07889420B2 Plasmon-based color tunable devices
A color-tunable, reflective, paper-like display utilizes the unique optical properties of nano-engineered metal and metal-dielectric composite structures that exhibit a plasmon resonance. By changing the dielectric properties of a medium in which these structures are embedded, or by changing the spatial relationship of these structures, their optical absorbance and scattering spectra can be tuned. This enables simpler pixel architectures with better performance than is possible with fixed-color technologies. Low power video rate operation can be achieved in a paper-like display.
US07889418B2 Electro-optical display, electrophoretic display, and electronic device
An electro-optical display includes a first substrate and a second substrate opposing to each other, a display layer disposed between the first substrate and the second substrate, and a cover layer covering a surface of the second substrate on an opposite side of the display layer. A surface of the display layer disposed on the first substrate is a display face, and the first substrate and the cover layer are bonded with a moisture-proof resin disposed at a sealing region surrounding the display face. The first substrate and/or the cover layer have a groove in the surface that is in contact with the moisture-proof resin, and the groove is filled with the moisture-proof resin.
US07889417B2 Electromechanical system having a dielectric movable membrane
An electromechanical device includes a partially reflective and partially transmissive layer and a movable functional element. The movable functional element includes a patterned flexible dielectric layer and a reflective layer mechanically coupled to the flexible dielectric layer. The patterned flexible dielectric layer is configured to flex in response to voltages applied to the partially reflective and partially transmissive layer to move the functional element in a direction generally perpendicular to the partially reflective and partially transmissive layer. The reflective layer is situated between the flexible dielectric layer and the partially reflective and partially transmissive layer.
US07889416B1 Method of aligning a light beam in an optical scanning system employing an agile beam steering mirror
Scan line position error resulting in banding, bow, skew, etc. is corrected by way of an agile beam steering mirror assembly in a ROS printing system and the like. The agile beam steering mirror system comprises a piezoelectric bending actuator fixedly mounted to a substrate at a proximate end thereof. A mirror structure is mounted at a free distal end of the bending actuator. Voltage applied to the bending actuator causes rotation of the mirror to thereby correct for positional errors of the scan line. Correction waveforms may be stored in control memory associated with the agile beam steering mirror assembly. A capacitive sensing circuit using a sensing electrode located beneath the free end of the bending actuator may be used in a feedback arrangement to determine and control mirror position.
US07889415B2 Device having a conductive light absorbing mask and method for fabricating same
A system and method for an optical component that masks non-active portions of a display and provides an electrical path for one or more display circuits. In one embodiment an optical device includes a substrate, a plurality of optical elements on the substrate, each optical element having an optical characteristic which changes in response to a voltage applied to the optical element, and a light-absorbing, electrically-conductive optical mask disposed on the substrate and offset from the plurality of optical elements, the optical mask electrically coupled to one or more of the optical elements to provide electrical paths for applying voltages to the optical elements. In another embodiment, a method of providing an electrical signal to optical elements of a display comprises electrically coupling an electrically-conductive light-absorbing mask to one or more optical elements, and applying a voltage to the mask to activate the one or more optical elements.
US07889414B2 Reflection type display apparatus
A reflection type display apparatus includes a first light modulating layer for controlling electrically and externally a light absorbing state and a light transmitting state, a second light modulating layer for controlling electrically and externally a light reflecting state and the light transmitting state, and a reflector for reflecting light of a particular wavelength band. The first and second light modulating layers and the reflector are arranged in order from a light incidence side. The first light modulating layer includes a first electrode of a light transmitting property arranged at the light incidence side, and a first counter electrode disposed in opposition to the first electrode sandwiching a first electrolytic solution containing a first metal ion between the first electrode and the first counter electrode, for controlling the light absorbing state and the light transmitting state according to depositing of the first metal ion onto the first electrode and according to dissolving of the first metal ion into the first electrolytic solution.
US07889411B2 System and method for calculating aerial image of a spatial light modulator
A method of calculating an aerial image of a spatial light modulator array includes calculating pair-wise interference between pixels of the spatial light modulator array; calculating effective graytones corresponding to modulation states of the pixels; and calculating the aerial image based on the pair-wise interference and the effective graytones. The graytones depend only on the modulation states of the pixels. The pair-wise interference depends only on position variables. The position variables are position in an image plane and position in a plane of a source of electromagnetic radiation. The pair-wise interference can be represented by a matrix of functions. The pair-wise interference can be represented by a four dimensional matrix. The effective graytones are approximated using sinc functions, or using polynomial functions.
US07889410B2 Dynamic aperture device and projector with the same
A dynamic aperture device includes a motor, a light shielding element and a balancer. The motor has a shaft. The light shielding element has a light shielding portion and a hub connected to the light shielding portion. The hub is coupled to the shaft. The balancer is disposed on the light shielding element, the hub or the shaft.
US07889409B2 Optical scanning device and image forming apparatus using the same
An optical scanning device including a light beam emission unit configured to emit a light beam, a main scanning line deflection unit configured to deflect the light beam in a main scanning direction to emit a scanning beam, a scanning lens configured to focus the scanning beam in the main scanning direction and a sub-scanning direction, a reflective optical element configured to deflect the scanning beam, a tilt adjustment unit configured to change a position of the reflective optical element to adjust a tilt of a scanning line of the scanning beam irradiating a target to be irradiated, and a curve adjustment unit configured to bend the reflective optical element to adjust a curve in the scanning line of the scanning beam irradiating the target to be irradiated.
US07889401B2 Floating scan sensor in a multi-function printer
A multifunction printer having a compact size and portable configuration while providing printing, scanning and copying functionalities is disclosed. The multi-function printer may include a paper handling assembly and a floating scanner assembly pivotably coupled to the paper handling assembly. The multi-function printer may further include a printer assembly coupled to the paper handling assembly. The floating scanner assembly is coupled to and aligned with a pick roller portion of the paper handling assembly and configured to scan and/or otherwise operate on a media supported within a document feeder. Thus, the multi-function printer may provide a wide variety of functionalities while maintaining a desirable compact configuration and portability.
US07889398B2 Changeable means for different total tracks and its method
The present invention is a changeable apparatus for different total tracks and a corresponding method. The apparatus reflects a light from a light source at least twice toward predetermined directions. The apparatus comprises plural reflection elements, at least one of the plural reflection elements is a rotational reflection element, which has plural reflection surface sets, and each reflection surface set has at least one reflection surface. The rotational reflective element further comprises a pivot axis is for each rotational reflection element for circulating and changing of reflection surface sets and a fixing apparatus, which connects to a rotational reflection element for adjusting and fixing positions of the rotational reflection element.
US07889397B2 Image processing apparatus and control method thereof, and reading method in image reading system
In order to specify a region on an original on an original plate more accurately, an image processing apparatus, which reads an original placed on an original plate as digital image data using an image reading unit, includes a detection unit which detects a code image, that is recorded on an original and includes reading setting information, from an image read by a prescan using the image reading unit, an extraction unit which extracts the reading setting information from the detected code image, and a reading control unit which executes a main scan using the image reading unit based on the extracted reading setting information, and the reading setting information includes reading range information designated by a relative position to the original that records the code image with reference to the position and direction of the code image.
US07889392B2 Image forming system, image forming apparatus, image processing apparatus and storage medium readable by computer
An image forming system includes: a data conversion unit that converts first image data into second image data; and an image output unit that outputs an image obtained by reproducing the second image data. The data conversion unit includes: a determination unit which divides the first image data into a dot block each includes plural pieces of dot data, and determines whether or not an array of dot data included in each dot block corresponds to a specific array; and a replacement unit which replaces the data out of the second image data, which is located in a portion corresponding to the dot block, with first replacement data including image forming dot data with which an image is formed. The specific array includes a first array in which the dot data to be thinned out is configured as the image forming dot data, and the dot data not to be thinned out is configured as non-image forming dot data with which an image is not formed.
US07889389B2 Printing method and apparatus
The invention provides printing method of printing on a printing medium. The method includes: generating dot data representing a status of dot formation on each of print pixels of a print image to be formed on the print medium, by performing a halftone process on image data representing a input tone value of each of pixels constituting an original image; and generating the print image with a print head by mutually combining a plurality dot groups in a common print area, each of the plurality dot groups being formed in each scan of the print head in response to the dot data. The generating dot data comprise setting a condition for the halftone process for reducing contact between dot groups formed consecutively by a plurality of temporally consecutive scan within at least part of tone values.
US07889386B2 Image processing apparatus and method for processing vector image data units of blocks
An image processing apparatus processes vector image data in units of blocks. When vector image data associated with a first block satisfies a predetermined condition, the image processing apparatus stores the result of processing the vector image data associated with the first block. When vector image data associated with a second block matches the vector image data associated with the first block, the image processing apparatus outputs the result of processing the vector image data associated with the first block, which is stored therein.
US07889384B2 Method for more efficiently managing complex payloads in a point of sale system
A method for managing complex payload using on a point of sale (POS) printer is described. The complex payload includes a plurality of commands. The method includes organizing at least a portion of the commands into a single entity. The single entity corresponds to more than one command, though need not contain all of the commands. The method also includes providing a payload identifier corresponding to the single entity. The payload identifier indicates a correspondence between the commands for the single entity and the single entity.
US07889382B2 Image processing apparatus and control method therefor
Leakage of information from a high-quality copy created by reading out data from a storage device is inhibited. A printing apparatus (110) and a multi-function peripheral (120) which is connected to a network (130) store images each corresponding to an identification information. These apparatuses extract an identification information from a document for which a unique identification information is formed, and search a storage device for an image containing an identification information which coincides with the unique identification information. The apparatuses acquire the found image, form copy-forgery-inhibited-pattern image information on the image, and print.
US07889380B2 Printing apparatus and control method therefor
When the time period is night, processing advances to step S13 to set the initialization speed of a line feed motor to the first speed (v1), and to step S15 to execute initialization operation of the line feed motor at the first speed (v1). When the time period is morning or daytime, the processing advances to step S12 to detect a cover open/closed state. When the cover is open, the processing advances to step S13 to set the initialization speed of the line feed motor to the first speed (v1). When the cover is closed, the processing advances to step S14 to set the initialization speed of the line feed motor to the second speed (v2) which is higher than the first speed (v1). The processing advances to step S15 to execute initialization operation of the line feed motor at the second speed (v2).
US07889378B2 Image processing with log management
In an image processing system for executing a job for an image, when security recording processing for an image to be processed is set valid, the image and the information related to a job to be executed for the image are stored in a predetermined unit. The state of storage processing of the image is monitored to prohibit the execution of the job for the image until storage processing of the image is completed.
US07889377B2 Method of and system for receiving orders for prints, and computer program for use in the method and system
Orders for prints of image data are received at an order receipt server connected to a user terminal by way of a network. A plurality of entry web pages each corresponding to one of a plurality of brands are prepared in the order receipt server, and the order receipt server is caused to receive orders for prints under the brand corresponding to the entry web page to which the user terminal is connected.
US07889374B2 System and method for routing electronic documents for processing via transient e-mail addressing
The subject application is directed to a mobile document processing system and method. A request for a transient address corresponding to mobile document processing operations is first received from an associated user. Upon receipt of the request, a transient address is generated corresponding to the associated user. Transient address data is then generated for routing electronic documents in accordance with a received document processing request. A document processing request is then received corresponding to a request for the performance of processing of at least one electronic document. The at least one electronic document is then routed to an associated document processing device, data storage device, or facsimile device corresponding to the transient address. The associated document processing device, data storage device, or facsimile device then commences a document processing operation according to the received document processing request. Upon the occurrence of a selected event, the transient address is deleted.
US07889373B2 Image processing apparatus
Disclosed are an image processing apparatus, a management apparatus for an image processing apparatus, a method for managing an image processing apparatus, a program and a storage medium with which it is possible to perform an appropriate management when a user requests another user to perform a process using the image processing apparatus on his behalf. A substitution account that is used when a process is performed on behalf of a first user (requestor user) is registered in a substitution account database. A process performed with the substitution account is managed as a process performed with an account of the first user.
US07889364B2 Image forming apparatus having a convenient sheet insertion function
An image forming apparatus includes a scanner unit to read an original document, an image data storage unit to store read image data, a print unit to print out the image data, a sheet insertion designation unit to perform a sheet insertion processing and a sheet insertion control unit. The user performs execution designation of the sheet insertion processing by the sheet insertion designation unit before a reading job of a first original document. When the execution of the sheet insertion processing is designated and a reading job of a specified original document is ended, the sheet insertion control unit requests the user to select a mode of the sheet insertion processing, and creates page data for performing the sheet insertion in the mode designated there. The printout including the page data for the sheet insertion is performed collectively after reading jobs of all original documents are ended.
US07889357B2 Method for positioning a target portion of a substrate with respect to a focal plane of a projection system
A method is provided for positioning at least one target portion of a substrate with respect to a focal plane of a projection system. The method comprises performing height measurements of at least part of the substrate to generate height data, using predetermined correction heights to compute corrected height data for the height data. The method further comprises positioning the target portion of the substrate with respect to the focal plane of the projection system at least partially based on the corrected height data.
US07889356B2 Two grating lateral shearing wavefront sensor
Methods include simultaneously diffracting a beam in a first direction and a second direction orthogonal to the first direction to form a once-diffracted beam, where the beam comprises a wavefront shaped by a test object, simultaneously diffracting the once-diffracted beam in orthogonal directions to form a twice-diffracted beam, overlapping at least two orders of the twice-diffracted beam in each direction to form an interference pattern at a detector, the interference pattern being formed by multiple copies of the wavefront laterally sheared in the first direction and multiple copies of the wavefront laterally sheared in the second direction; and determining information about the wavefront based on the interference pattern.
US07889353B2 Method of measuring relative movement of an object and an optical input device over a range of speeds
A method and optical module for measuring relative movement of an input device and object (15) along at least one measuring axis. A laser device (3) having a laser cavity is provided for generating a measuring beam (13) in respect of each measuring axis. The measuring beam (13) is used to illuminate the object (15) and measuring beam radiation reflected from the object (15) and re-entering the laser cavity generates a self-mixing effect in the laser and causes changes in operation of the laser cavity. A detector (4) is used to generate a measurement signal representative of these changes and an electronic processing circuit (18) selects, in dependence on the speed of relative movement, one of at least two parameters of the measurement signal for use in determining the speed and direction of relative movement.
US07889348B2 Arrangements and methods for facilitating photoluminescence imaging
Exemplary systems and methods for obtaining a photoluminescence radiation from at least one portion of a sample can be provided. For example, using the exemplary embodiment, it is possible to receive a first radiation and disperse the first radiation into at least one second radiation and at least one third radiation. The second and third radiations can be provided to different locations of the portion. In addition, it is possible to receive the photoluminescence radiation from the portion based on the second and third radiations.
US07889345B2 Method and system for detecting the level of anesthesia agent in an anesthesia vaporizer
A method of detecting a level of anesthetic agent in an anesthesia vaporizer is disclosed. The anesthetic agent forms a column of liquid within an external indicator; the method projects a beam of light into the external indicator. The method further receives the beam of light after the beam of light has traveled through the column of liquid, and detects when the level of anesthetic agent drops below a predetermined level.
US07889344B2 Transmitted-light-intensity measuring device, medium identifying device, medium conveying device, and image forming apparatus
A device for measuring intensity of a transmitted light, includes a first measuring unit that measures a first intensity of a light transmitted through a medium on a conveying path in its thickness direction and outputs a first measured value; a second measuring unit that is arranged adjacent to the first measuring unit, measures a second intensity of the light transmitted through the medium in the thickness direction, and outputs a second measured value; and an operating unit that obtains a true measured value from the first measured value and the second measured value.
US07889337B2 Optical method for determination of the total suspended solids in jet fuel
The invention provides a method for the quantitative determination of total suspended solid particles in a liquid. The method includes providing a liquid sample that includes solids suspended therein, illuminating the solids with a light source, collecting light scattered by the solids and correlating the light scattered by the solids with a total solids content.
US07889330B2 Method of taking an image of an object residing in a transparent, colored container
A method of producing an image of an object residing inside a transparent container of a first color includes: illuminating the container and the object with light of a second color, the second color being substantially the inverse of the first color; and producing an image of the object through the container. An image produced by this method can exhibit substantially the same color as the object itself, even when the image is taken through a colored transparent wall.
US07889329B2 Analysis of optical data with the aid of histograms
A system for determining the concentration of an analyte in a liquid sample comprising a detection unit for detecting light intensities which are radiated from subareas of a detection area of a test element as well as an evaluation unit which determines a frequency distribution for the detected light intensities wherein the frequency distribution has at least one first maximum caused by unwetted subareas or at least one reference area and a second maximum caused by wetted subareas and selects at least one light intensity on the basis of the frequency distribution and determines the concentration of the analyte from the at least one selected light intensity.
US07889322B2 Specimen inspection stage implemented with processing stage coupling mechanism
A specimen inspection stage implemented with a processing stage coupling mechanism provides a capability to conduct with maximum efficiency post-processing specimen inspections on-board a processing platform. Heavy inspection equipment is mounted on a specimen inspection stage that is separate from a processing stage. In a preferred embodiment, the processing stage moves in response to an applied motive force and performs laser-based processing operations on a specimen. While laser processing is ongoing, the specimen inspection stage remains parked in its home position. When it is time for post-processing inspection, a stage coupling and decoupling mechanism couples together the specimen inspection stage and the processing stage, which transports the specimen inspection stage to and from the specimen position.
US07889320B2 Variable slit apparatus, illumination apparatus, exposure apparatus, exposure method, and device fabrication method
The present invention provides a variable slit apparatus, which can rapidly change the shape of the slit width of the illumination light while finely controlling the shape of the slit-shaped illumination light, an illumination apparatus that uses such, an exposure apparatus, and the like. The variable slit apparatus for forming a slit-shaped illumination light comprises: a first light-shielding mechanism that comprises a plurality of blades for defining one long side of the illumination light; a second light-mechanism configured to define another long side of the illumination light; and a drive mechanism that changes the width of the illumination light in the latitudinal direction orthogonal to the longitudinal direction by driving the first light-shielding mechanism and the second light-shielding mechanism.
US07889319B2 Exposure apparatus and device fabrication method
The present invention provides an exposure apparatus including a measuring unit which includes an imaging optical system configured to guide light having propagated through a projection optical system to an image sensor, and is configured to measure the overall birefringence of the imaging optical system and the projection optical system, a calibration unit which is set on a side of an object plane of the projection optical system in order to measure a birefringence of the imaging optical system, and is configured to reflect the light from the measuring unit back to the measuring unit without using the projection optical system, and a calculation unit configured to isolate, from the result of measuring the overall birefringence, the birefringence of the imaging optical system measured by the measuring unit, thereby calculating the birefringence of the projection optical system.
US07889315B2 Lithographic apparatus, lens interferometer and device manufacturing method
A lithographic apparatus includes an illumination system that is configured to condition a radiation beam; a projection system that is configured to project at least a portion of the radiation beam as a projected radiation beam; and a lens interferometer for sensing a wavefront state of the projected radiation beam. The lens interferometer is provided with a polarizing element so as to be capable of sensing a polarisation state of the projected radiation beam.
US07889314B2 Calibration methods, lithographic apparatus and patterning device for such lithographic apparatus
A calibration method to calibrate a substrate table position in a lithographic apparatus, the method including repeatedly irradiating a pattern onto a surface of the substrate so as to create a two dimensional arrangement of patterns on the surface of the substrate, the irradiating including displacing the substrate table between successive irradiations to irradiate the pattern onto different locations on the surface of the substrate, reading out the patterns in the two dimensions to obtain pattern read out results, deriving incremental position deviations from the read out results of neighboring patterns in dependency on the position of the substrate table in the two dimensions, deriving from the incremental position deviations a position error of the substrate table as a function of the two dimensional position of the substrate table and calibrating the position of the substrate table using the position dependent position error.
US07889313B2 Immersion lithography apparatus and exposure method
An immersion lithography apparatus includes: a projection optical system which projects a pattern of a mask onto a substrate; a substrate cleaning unit which cleans the substrate prior to projection of the pattern; a liquid supply mechanism which supplies the same liquid to an immersion region between the projection optical system and the substrate and to the substrate cleaning unit; a first liquid discharge path through which the liquid discharged from the immersion region is passed; and a second liquid discharge path through which the liquid discharged from the substrate cleaning unit is passed.
US07889311B2 Apparatus for testing liquid crystal display panel
An apparatus for testing a liquid crystal display (LCD) panel which is capable of easily attaching or detaching a large polarizer to/from a test board when testing a large LCD panel, the apparatus comprising a test board for outputting light to an LCD panel which is placed thereon, a polarizer fixing unit rotatably formed at the test board and having a groove in which a polarizer is inserted, and a stop formed at the test board to fix the polarizer fixing unit to a desired position.
US07889308B2 Liquid crystal display device
A liquid crystal display module includes an observation region to allow a visual inspection be performed after bonding of the substrates for inspecting the sealant that may be otherwise blocked by the common voltage line. An embodiment of a liquid crystal display device includes a first electrode on a first substrate, a second electrode and a third electrode on a second substrate, the second electrode electrically contacting the first electrode at a first portion and the third electrode at a second portion, and including a transparent conductive material, a sealant attaching the first and second substrates together in a sealant region, the sealant between the first and second electrodes and the sealant including a plurality of conductive balls for electrically connecting the first and second electrodes, and a liquid crystal layer between the attached first and second substrates and within the sealant.
US07889307B2 Liquid crystal optical modulator and the process for producing the same
A space between substrates in a liquid crystal optical modulator can be sealed with a metal by using a simple configuration. In a seal structure between the substrates constituting a liquid crystal cell in a liquid crystal optical modulator, metal members are provided on the opposing surfaces of the two substrates, and the base metal surfaces of the metal members are brought into direct contract and joined. As a result, a low-melting metal such as a solder that has been conventionally introduced into the joint section becomes unnecessary, and a metal seal providing for strong bonding can be formed with a simple configuration. The liquid crystal optical modulator has a first substrate having a first electrode pattern including a pixel electrode, a second substrate having a second electrode pattern including a counter electrode, and a metal seal disposed so as to be sandwiched between the first substrate and the second substrate. The metal seal is formed between a first metal member composed of a metal material and formed on the first substrate and a second metal member composed of a metal material and formed on the second substrate by directly joining the metal surfaces of the two metal members.
US07889305B2 Liquid crystal display device and method of driving thereof
The liquid crystal display device includes a first insulation substrate, a gate line which is disposed on the first insulation substrate and extends substantially in a first direction, first and second data lines which are insulated from the gate line, extend substantially in a second direction and intersect the gate line, a pixel electrode which includes first and second sub-pixel electrodes which are each provided with different data voltages via the first and second data lines, respectively, and which are separated from each other by a gap, the second sub-pixel electrode at least partially overlapping the first and second data lines, a second insulation substrate which faces the first insulation substrate, a black matrix which is disposed on the second insulation substrate and includes an irregular shape and extends substantially along the first and second data lines and a liquid crystal layer which is interposed between the first and second insulation substrates.
US07889300B2 Liquid crystal display device and electronic apparatus
The present invention provides a liquid crystal display device including a liquid crystal layer disposed between a first substrate and a second substrate, a pixel electrode in a reflection region and a transmission region over the first substrate, a film for adjusting a cell gap in the reflection region over the first substrate, and an opposite electrode in the reflection region and the transmission region over the second substrate. The pixel electrode in the reflection region is provided over the film and reflects light. The pixel electrode in the transmission region transmits light. The pixel electrode in the reflection region and the transmission region includes a slit. The slit is overlapped with at least a part of a step portion which is provided by the film between the reflection region and the transmission region.
US07889297B2 Liquid crystal display operating in a vertically aligned mode
The present invention relates generally to the field of liquid crystal display devices and more particularly to a liquid crystal display device operating in vertically aligned mode (VA-mode) in which liquid crystal molecules having a negative dielectric anisotropy are aligned generally perpendicularly to a panel surface of the liquid crystal display. A liquid crystal display according to the invention comprises a liquid crystal cell (6) of a vertical alignment mode, at least one polarizer (2, 10) arranged on each side of the liquid crystal cell, and at least one compensating structure (3, 7) disposed between the liquid crystal cell and at least one of the polarizers. The polarizers have transmission axes (11, 18) which are perpendicular to each other.
US07889295B2 Liquid crystal display device
It is an object of the present invention to provide a liquid crystal display device which has a wide viewing angle and less color-shift depending on an angle at which a display screen is seen and can display an image favorably recognized both outdoors in sunlight and dark indoors (or outdoors at night). The liquid crystal display device includes a first portion where display is performed by transmission of light and a second portion where display is performed by reflection of light. Further, a liquid crystal layer includes a liquid crystal molecule which rotates parallel to an electrode plane when a potential difference is generated between two electrodes of a liquid crystal element provided below the liquid crystal layer.
US07889292B2 Liquid crystal display device
A liquid crystal display device comprises a liquid crystal display panel having a first substrate, a second substrate located opposite the first substrate with a gap between the first substrate and the second substrate, and a liquid crystal layer held between the first substrate and the second substrate, a polarizing plate located opposite the liquid crystal layer, and a polarizing reflection layer positioned opposite the polarizing plate across the liquid crystal layer and located opposite the liquid crystal layer to reflect linearly polarized light polarized in one direction parallel to a plane of the liquid crystal display panel.
US07889285B2 Liquid crystal display device and a manufacturing method of the same
A four-mask process and a three-mask process proposal are constructed for a TN-type liquid crystal display device and an IPS-type liquid crystal device in which the formation of a passivation insulating layer is not required by streamlining the formation of a scan line and a pseudo-pixel element, both comprising a laminate made of a transparent conductive layer and a metal layer, at the same time and the formation of the transparent conductive pixel electrode by removing the metal layer on the pseudo-pixel electrode at the time of the formation of the opening in the gate insulating layer, by streamlining the treatment of the formation process of the contact and the formation process of the protective insulating layer using one photomask due to the introduction of half-tone exposure technology, and the formation of source-drain wires for etch-stop type insulating gate-type transistor using a photosensitive organic insulating layer and leaving the photosensitive organic insulating layer unchanged on source-drain wires or on the source wire (signal line), or by forming an anodized layer, which is an insulating layer, on source-drain wires.
US07889284B1 Rigid antiglare low reflection glass for touch screen application
A display screen device may comprise a first substrate including at least a substantially transparent glass having a thickness less than or equal to 1.1 millimeters; an anti-reflective thin film coating; and a second substrate including a touch screen device. Additionally, a method for providing a display screen device is disclosed.
US07889280B2 Image processing apparatus and method thereof
Chroma correction is executed in consideration of the area effect of colors. To this end, an input image is segmented into a plurality of regions as sets of pixels having similar feature amounts, and a size evaluation value of the each segmented regions is calculated based on the number of pixels and a shape of the each segmented region. Chroma correction is applied to the input image to weaken correction as the region has a larger size evaluation value.
US07889279B2 Method and apparatus for suppressing cross-coloration in a video display device
A method for suppressing cross-coloration in a video display device includes receiving high-frequency components of luminance signals corresponding to scanlines of an image frame, determining luminance transitions according to the high-frequency components of the luminance signals, and adjusting chrominance signals of the scanlines according to the luminance transitions.
US07889278B2 Display apparatus that displays image and sub image and control method thereof
The present invention relates to a display apparatus comprising a display part which displays a main image and a sub image thereon, further comprising a user selection part having a menu adjusting button, such as a button; and a processor to adjust a display state of the sub image by a selection of the menu adjusting button if the display part displays the main image and the sub image thereon, and to adjust a predetermined menu by the selection of the menu adjusting button if the display part does not display the sub image thereon. Thus, the present invention provides a display apparatus to change a display state of a sub image without difficulty and a control method thereof.
US07889277B2 KVM video and OSD switch
A high speed video switch in a KVM system using discrete Radio Frequency (RF) switch circuits. The RF switch circuits are configured into a multiplexed circuit to route video signals from a selected host computer to a target monitor. Voltage converters are used to provide control signals of the proper voltage to the RF switch circuits. Peaking operational amplifiers are used to compensate for the roll-off effect caused by the video connectors. An On Screen Display (OSD) switch using the RF switches is used to rapidly switch between the OSD data and host computer video for display to the target operator control center monitor.
US07889274B2 Image input apparatus
An image input apparatus can acquire an image with a high contrast without saturating a camera output even for a subject having a large light and dark difference while achieving a wide dynamic range. An image sensor has an input-output characteristic varying with a plurality of regions delimited according to a difference in the amount of incident light. A video luminance signal level is detected from a video signal of the image sensor. An amount of light on a screen is calculated from the image luminance signal level. The image sensor is adjusted to make the amount of light on the screen coincide with a target light amount. The target light amount is set such that a relation between the target light amount R and an amount of light Q at a change point that is at the lowest luminance in an input-output characteristic of the image sensor satisfies R
US07889272B2 Imaging apparatus, high frequency component detection circuit, high frequency component detection method and computer program product
A high frequency component detection circuit detecting a high frequency component included in a video signal is provided. The high frequency component detection circuit includes a filter acquiring a group of a predetermined number of pixels including a focused pixel and pixels surrounding the focused pixel with respect to each of pixels constituting the video signal, rearranging the pixels constituting the group to be arrayed in the order of luminance values, determining the luminance value of the pixel positioned at the center in the rearranged order, and outputting the pixel positioned at the center among the rearranged pixels arrayed in the order of luminance values as the focused pixel. Further, the high frequency component detection circuit includes a detection circuit detecting a high frequency component included in the video signal based on the output from the filter.
US07889269B2 Image taking device and control method for image taking
For each image data, face information indicating the number of faces of subjects included in an image is added. Further, the percentage of images in which there exist faces is calculated. When the percentage exceeds a face detecting flag threshold, the face detecting flag is set ON. When the percentage does not exceed the face detecting flag threshold, the face detecting flag is set OFF. The face detecting flag is stored in the flash memory portion of the memory. The face detecting flag is read from the flash memory portion of the memory in the shooting mode at the next time. When the face detecting flag is set ON, an image display device displays instructions on prompting a user to make the face detecting function effective.
US07889266B2 Image capture in auto-focus digital cameras
In an AF camera having a two-stage capture button or a three-stage capture button, a timing control module or algorithm is used to control the type of image a user can obtain after the user presses and releases the capture button. The timing control allows the user to capture an image of the scene substantially as presented on the viewfinder when the automatic focusing algorithm carries out its focusing function, or to capture an image of a recomposed scene after the focusing function is completed. If the user releases the capture button before the automatic focusing algorithm finishes its focusing function, the image obtained is the image focused at the hyperfocal distance.
US07889264B2 End-to-end design of superresolution electro-optic imaging systems
A superresolution electro-optic imaging system operates in a manner that takes into account the different subsystems. For example, rather than designing the optical subsystem to be diffraction-limited, the optical subsystem can be designed in a manner that is better suited for subsequent superresolution processing and/or that reduces aliasing effects.
US07889263B2 System and method for high numeric aperture imaging systems
A system and method for high numeric aperture imaging systems includes a splitter, a defocusing system, and a combiner. The splitter reflects a portion of collected light and transmits another portion of the collected light. The defocusing system is configured to modify optical power of either the transmitted portion or reflected portion of the collected light. The combiner is oriented with respect to a mechanical angle. The combiner recombines portions of the transmitted portion and the reflected portion such that the transmitted portion and reflected portion are subsequently transmitted being separated by an optical separation angle based upon the mechanical angle of orientation of the combiner. Various other implementations are used to maintain focus with regards to the imaging systems involved.
US07889257B2 On-chip time-based digital conversion of pixel outputs
An integrated sensor chip comprises at least one pixel. The at least one pixel comprises: one or several integration regions for receiving and storing photogenerated charges; a modulation region that moves the photogenerated charges to be stored in the at least two integration regions; and sense nodes, in which each of the sense nodes is associated with one of the integration regions, into which the photogenerated charges are moved from the integration regions during a readout stage. The chip comprises: at least one function generator for generating a time-varying function that is applied to the integration regions during the readout cycle to move the photogenerated changes to the sense nodes; a counter generates a count during the generation of the time-varying function; and registers, in which each of the registers is associated with one of the sense nodes during read out, for storing digital values; wherein the registers store the count in response to the associated sense node receiving photogenerated charges from the associated integration regions.
US07889254B2 Photoelectric conversion apparatus and contact-type image sensor
To prevent such a situation that a signal from a pixel in a dark state is output at a level shifted from an originally set level to deteriorate an image quality, and to improve the image quality. A photoelectric conversion apparatus according to the present invention includes: a plurality of photoelectric conversion elements; a plurality of amplifying units for amplifying a signal in accordance with a photo-carrier generated in the photoelectric conversion elements; a plurality of signal holding units for holding output signals from the amplifying units through a plurality of switch units; and a control signal supplying unit for supplying a control signal to the switch units through a control line, in which the control line is sequentially connected to the plurality of switch units and has both ends connected to the control signal supplying units, or a change rate with time of an amplitude of a signal held by the signal holding units is set lower than a change rate with time of am amplitude of the control signal at the time of turning off the switch units.
US07889253B2 Wide dynamic range image sensor
The present invention relates to a CMOS image sensor having a wide dynamic range, which permits favorable imaging even in cases where a bright portion and a dark portion exist simultaneously.The dynamic range can be widened by preventing the saturation of optical charge at a high illuminance by removing low illuminance signals due to long-time accumulation, intermediate illuminance signals due to short-time accumulation, and high illuminance signals due to ultra-short time accumulation from pixel portions of the image sensor. Further, adaptive control of the dynamic range can also be performed by dynamically changing the wide dynamic range imaging conditions that comprise a combination of different accumulation times of each of a plurality of short time accumulation signals.
US07889243B2 Imaging device, method of processing captured image signal and computer program
A constant amount of new portion of image data as still images is always stored on a memory in an image taking operation. In response to a shutter release operation, the image data stored on the memory is recorded onto a recording medium. A next new portion of the image data generated subsequent to the shutter release operation is then recorded on the recording medium. A predetermined pixel count, smaller than a standard pixel count set in the image data subsequent to the shutter release operation, is set in the image data prior to the shutter release operation. Process time for multi-shot operation is shortened in order to prevent photo opportunity missing. The pixel count in the image data subsequent to the shutter release operation remains unchanged so that the image data of high image quality is acquired.
US07889241B2 Imaging device and imaging method
A imaging device includes an imaging element; a memory unit configured to temporarily store pieces of image data captured individually at predetermined timings via the imaging element; a comparator configured to compare the image data recorded in the memory unit to detect whether an image change greater than or equal to a first threshold has occurred; a determining unit configured to determine whether the image change has converged to an amount less than or equal to a second threshold by comparing the image data recorded in the memory unit when an image change greater than or equal to the first threshold has been detected; and a controller configured to exercise control so that image data captured via the imaging element is recorded on a predetermined recording medium when it is determined that the image change has converged to an amount less than or equal to the second threshold.
US07889238B2 Multicamera system, image pickup apparatus, controller, image pickup control method, image pickup apparatus control method, and image pickup method
A multicamera system including: a controller having a reset phase transmitting unit for transmitting information showing a reset phase corresponding to a position in a frame synchronized with a sync reference signal to one or each of plural image pickup apparatuses within a frame period of a one-precedent frame of the frame; and the one or plural image pickup apparatuses each having an image pickup unit for photographing light from an object, an image pickup driving unit for driving the image pickup unit so as to start the photographing of one image pickup frame on the basis of the reset phase information transmitted from the controller, and an output unit for outputting image pickup data of the one image pickup frame photographed by the image pickup unit on the basis of the sync reference signal transmitted from the controller.
US07889237B2 Digital camera
A digital camera, comprising a live view display section for repeatedly acquiring a subject image, cropping and enlarging part of the subject image, and displaying as a moving image, a vibration detection section for detecting vibration of the digital camera and calculating at least one of vibration direction and vibration amount, and a control section for, when part of the moving image is enlarged and displayed, controlling cropping position and size for the moving image to be displayed on the live view section according to output of the vibration detection section, or, when displaying the whole of the moving image, controlling shift of an image sensor or part of a lens according to output of the vibration detection section.
US07889231B2 Image recording system with improved clock signal transmission
An image-recording system having at least one camera, having a receiving device and having a signal connection between the camera and the receiving device. The receiving device generates a PWM-coded signal which is transmitted to the camera. A clock signal is obtained in the camera from the PWM-coded signal.
US07889228B2 Signal processing device for endoscope
An endoscope includes a solid image-pickup device having an image area and an optical black area for performing photoelectric conversion and including a function of varying an amplification ratio, and a first signal clamp circuit clamps the analog output signal that is outputted from the solid image-pickup device to adjust into an input range of the analog signal processing circuit with an analog reference signal which is unaffected by a defective pixel in the optical black area. The clamped signal is processed to extract signal components which are photoelectrically converted by the analog signal processing circuit by the image area. The output signal from the analog signal processing circuit clamps the signal in the optical black area by using output signals of at least the number of pixels larger than the number of pixels in a horizontal direction in the optical black area by the second signal clamp circuit.
US07889224B2 Optical path switching device, optical scanning device, and image forming apparatus
A disclosed optical path switching device includes a polarization bistable VCSEL that emits a beam having a rising polarization plane, a laser light source configured to emit a beam having a polarization plane orthogonal to the rising polarization plane, and an optical path switching unit configured to switch an optical path of the beam emitted from the polarization bistable VCSEL by switching the angle of the rising polarization plane of the beam emitted from the polarization bistable VCSEL. The beam emitted from the polarization bistable VCSEL is incident on an entrance window of the optical path switching unit, and the beam emitted from the laser light source is incident on an exit window of the polarization bistable VCSEL.
US07889223B2 Print alignment for bi-directionally scanning electrophotographic device
Methods and apparatus include aligning printing of a bi-directionally scanning electrophotographic (EP) device, such as a laser printer or copy machine. At least first and second scan lines formed in opposite directions define a calibration page for manufacturing, servicing or end-user operating. The page includes pluralities of diagnostic patterns repeatedly tiled together in various formats. In one instance, a first pattern defines a substantially rectangular cell of pixels (pels) for at least a first and second scan line of opposite directions. A second pattern defines the first pattern except at least one of the pels of either the first and second scan lines is intentionally displaced at least one pel width in the scan direction. Upon repeatedly tiling groups of either the first or second patterns together, multiple bars of the calibration page are formed. A darkest of the bars represents a preferred calibration setting of the EP device.
US07889216B2 Image display device, electronic apparatus, and pixel location determining method
An image display device displays an image by using a plurality of display pixels, each display pixel including four sub-pixels corresponding to different colors. The four sub-pixels forming each of the display pixels are located such that two sub-pixels having a smaller level of luminance are located at edges of the display pixel, each of the two sub-pixels being located at either edge of the display pixel, and such that two other sub-pixels are located at a central portion of the display pixel so that an absolute value of a difference between a luminance added value, which is a value obtained by adding luminance levels of one of the sub-pixels located at the edges of the display pixel and an adjacent pixel, and a luminance added value, which is a value obtained by adding luminance levels of the other sub-pixel located at the edge of the display pixel and an adjacent pixel, is reduced.
US07889213B2 Display device including pixels sharing sub-pixels and driving method thereof
A display device includes a signal storing portion storing first, second, third, and fourth input data signals, an average signal generating portion averaging the first, second, third, and fourth input data signals, respectively, that are adjacent to each other along a row and a column and generating first, second, third, and fourth output data signals, and a display portion having a plurality of pixels, each of the pixels having first, second, third, and fourth sub-pixels for receiving the first, second, third, and fourth output data signals, respectively, and each of the pixels sharing the sub-pixels with an adjacent one of the pixels.
US07889208B1 Z-texture mapping system, method and computer program product
A system, method and computer program product are provided for computer graphics processing. In use, a value is modified based on an algorithm. An operation is subsequently performed on pixel data taking into account the modified value.
US07889207B2 Image apparatus with image noise compensation
An image apparatus (10) for providing an adjusted image (242) of a scene (236) includes a capturing system (16) and a control system (24). The capturing system (16) captures an underexposed first frame (240) that is defined by a plurality of pixels (240A), including a first pixel and a second pixel. The first frame (240) includes at least one of a first texture region (240S) and a second texture region (240T). The control system (24) can analyze information from the pixels (240A) and determine if the first pixel has captured a portion of the first texture region (240S) or the second texture region (240T). Further, the control system (16) can analyze information from the pixels (240A) and to determine if the second pixel has captured a portion of the first texture region (240S) or the second texture region (240T). With this design, the control system (16) can reduce the noise in the first frame (240) to provide a well exposed adjusted image (242).
US07889206B2 Direct memory accessing for fetching macroblocks
Presented herein are a system, method, and apparatus for retrieving an object from memory. The object can be stored in a manner, such that the first byte of the object and the last byte of the object are in the middle of the memory data words. The object is retrieved by a direct memory access controller. The direct memory access controller, when provided with a read transaction with the starting address and the ending address of the object, retrieves the data words storing the object, and overwrites the portions of the data word that precede and follow the object.
US07889205B1 Frame buffer based transparency group computation on a GPU without context switching
Transparency groups or other images may be rendered on graphics hardware using a GPU utilizing only a single frame buffer and without the need to switch contexts to another frame buffer. A single frame buffer may be allocated and the overall background image may be rendered to the frame buffer. In order to render a foreground image to be combined with the background image, a sub-image of the background image is copied from the frame buffer to a texture atlas. The foreground image may then be rendered to the portion of the frame buffer from which sub-image was copied. The foreground image may then be copied from the frame buffer into the texture atlas. Additionally, both the sub-image of the background image and the foreground image may be merged and copied from the texture atlas into the frame buffer.
US07889203B2 Encoding for remoting graphics to decoder device
A portable graphics encoder connects with one or more protocol decoder devices based on a particular communication protocol. The portable graphics encoder is not specific to any particular operating system. The portable graphics encoder receives protocol decoder device commands such as input instructions that determine higher-level graphics commands that are sent to the one or more protocol decoder devices. The higher-level graphics commands are extracted from graphics sources such as application programs. The portable graphics encoder encodes the higher-level graphics commands according to a format defined by the communication protocol, and the encoded higher-level graphics commands are sent to the one or more protocol decoder devices.
US07889199B1 Function graphing system and method
A system and method for graphing mathematical features of a given function within an optimum viewing window. The system and method can also highlight the mathematical features. Further, for example, the system and method can determine the type of a function and the various behaviors of the function, and highlight curve segments of concavity, increase/decrease, and where the function is constant.
US07889196B2 3-dimensional image creating apparatus, 3-dimensional image reproducing apparatus, 3-dimensional image processing apparatus, 3-dimensional image processing program and recording medium recorded with the program
An image signal composed of sequential frames is input to a 3-dimensional image creating apparatus, frame by frame. A controller (102) designates the presence/absence of reduction, the presence/absence of joining and 2D select. An image converter (101) creates image data in the format designated by the presence/absence of reduction and the presence/absence of joining. A 3D information creator (103) creates 3D information necessary for displaying the image as a 3-dimensional image by formatting the presence/absence of reduction, the presence/absence of joining and 2D select. A multiplexer (104) converts image data and 3D information in a predetermined format and outputs them to the outside. In this way, it is possible to make the image data for 3-dimensional display versatile and select an arbitrary viewpoint image efficiently.
US07889194B2 System and method for in-context MPR visualization using virtual incision volume visualization
A method for multi-planar reconstruction of digitized medical images includes providing an image volume, sampling the neighborhood about each point in a planar region and saving a color value and a depth, providing a projection plane onto which rendering rays are projected from a viewing point through said image volume, advancing sampling points along rays through the image volume, computing depths of each sampling point, determining for sampling points on rays that penetrates the planar region if a depth of said sampling point is less than the buffer depth of a corresponding point in the planar region and sampling neighborhoods of points about such sampling points, determining if sampling points are near said planar region, applying first transfer function to sample values interpolated from first volume for sampling points close to or inside the planar region, and otherwise applying second transfer function to sample values interpolated from second volume.
US07889192B2 Mobile equipment with three dimensional display function
The present invention provides a mobile phone that includes a single camera for picking up a 2D image and provides the 2D image with parallax information to create a 3D image. The 3D image is displayed on a display unit.
US07889191B2 Method and apparatus for providing a synchronized video presentation without video tearing
The present invention provides a method and apparatus for feeding a video stream from a video source in a manner that prevents video tearing.
US07889185B2 Method, system, and graphical user interface for activating hyperlinks
Methods, systems, and graphical user interfaces for activating hyperlinks are disclosed. In one embodiment, a portable electronic device: displays content on a touch screen display, wherein the content includes a plurality of links to additional content; detects a contact by a finger with the touch screen display, wherein the contact includes an area of contact; determines a point within the area of contact; determines a link in the plurality of links that satisfies two or more predetermined criteria with respect to the point, including a closest proximity criterion and a maximum proximity criterion; and activates the determined link.
US07889184B2 Method, system and graphical user interface for displaying hyperlink information
Methods, systems, and graphical user interfaces for displaying hyperlink information are disclosed. In one embodiment, a portable electronic device with a touch screen display: displays content on the touch screen display, wherein the content includes a plurality of links to additional content; detects a contact by a finger with the touch screen display, wherein the contact includes an area of contact; determines a point within the area of contact; choosing a first link in the plurality of links based on proximity of the first link to the determined point; and displays information associated with the first link over the displayed content, wherein the information associated with the first link includes information other than anchor text of the first link.
US07889183B2 Liquid crystal display including sensing unit and image data line arrangement
The present invention is related to a liquid crystal display. The liquid crystal display includes a display panel, a plurality of pixels formed on the display panel, a sensing unit disposed among the pixels and generating a sensor data signal based on a touch to the display panel, a plurality of image data lines connected to the pixels and transmitting image data signals, and a sensor data line connected to the sensing unit and transmitting the sensor data signal. The sensor data line is separated from an image data line adjacent thereto with respect to the pixel.
US07889179B2 Control device including a ball that stores data
A device for controlling movement of an object relative to an environment is disclosed. The device may include a ball configured to store data for determining at least an orientation of the object relative to the environment. The data may pertain to a plurality of possible orientations of the object. The device may also include a speed control unit configured to determine at least a speed of the object relative to the environment.
US07889176B2 Capacitive sensing in displacement type pointing devices
A pointing device includes a sense electrode structure and a displaceable member. The sense electrode structure includes an arrangement of peripheral sense electrodes in a peripheral region surrounding a central sense electrode. The displaceable member is movable in an operational zone over the sense electrode structure. The displaceable member includes a target electrode facing the sense electrodes and overlapping at least a respective portion of the central sense electrode in each position of the displaceable member in the operational zone.
US07889175B2 Touchpad-enabled remote controller and user interaction methods
The handheld case of the remote control unit includes at least one touchpad, and other sensors, such as acceleration sensors, case perimeter sensors, pressure sensors, RF signal sensors. These sensors provide a rich array of sensory inputs that are classified by a pattern recognizer to generate control commands for both the consumer electronic equipment and the remote control unit itself. A power management system to conserve unit battery power is also responsive to the pattern recognizer to allow intelligent power management control. The control system uses the display of the consumer electronic equipment to provide instructions to the user, and the behavior of the remote control system uses what is displayed on the display as context information for pattern recognition.
US07889170B2 Inner force sense presentation device, inner force sense presentation method, and inner force sense presentation program
A force feedback apparatus of the present invention includes: jetting means that includes a nozzle and that can control a jet amount or a jet direction of gas or liquid jetted from the nozzle; jet control means for controlling the jet amount or the jet direction of the gas or the liquid according to a position or an orientation of a receiver that receives pressure by the gas or the liquid jetted from the jetting means so as to provide force feedback to an operator. When the receiver has a concave shape of a diameter D, intervals for placing the nozzles in the jetting means are set such that at least one nozzle exists within a region having a diameter of a constant×D.
US07889169B2 Image display device and image display method
The present invention provides an image display device that forms an image with a display output that is a combination of quantities of backlight of at least three colors and sub-pixel transmittances of at least three colors, comprising: a memory means in which the light-emission wavelength distribution characteristics of the quantities of backlight and the transmission wavelength distribution characteristics of the sub-pixel transmittances are stored, wherein: the light-emission wavelength distribution characteristics and transmission wavelength distribution characteristics are read out from the memory means, and the sub-pixel transmittances based on the quantities of backlight are obtained.
US07889168B2 Image display apparatus
An image display apparatus includes a plurality of display devices, a plurality of scan interconnections and a plurality of modulation interconnections, a scanning circuit for applying a scanning signal to the scan interconnections, and a modulation circuit for applying a modulation signal to the modulation interconnections. The scanning circuit applies the scanning signals to a group of scan interconnections selected from the plurality of scan interconnections in one select period, and applies the scanning signals, in a subsequent select period, to the plurality of scanning interconnections which were shifted with one scan interconnection portion from the group of scanning interconnections to which the scanning signals were applied in a previous select period. The scanning signals which have the same polarity to the modulation signal in successive two select periods are applied to the scanning interconnection to which the scanning signals should be applied repeatedly, and the output from the scanning circuit has a portion in which signal level is controlled to a non-selection electric potential level between the scanning signals which are applied repeatedly to the scanning interconnection. The scanning circuit is configured to apply scanning signals with different selection electric potentials to a plurality of scan interconnections which are selected in one select period.
US07889167B2 Liquid crystal display and driving method thereof
A liquid crystal display for recognizing a flicker with the naked eyes in a step of inspecting a flicker in the case where a liquid crystal display is driven with a frame frequency of 120 Hz is disclosed.In the liquid crystal display, a timing controller supplies a first frame inversion polarity signal which is used at a first frame inversion and, at the same time supplies a gate start pulse which indicates a supply of a scanning pulse. A frame polarity signal converting means converts a first frame inversion polarity signal into a second frame inversion polarity signal in response to the gate start pulse. And a data driver changes the inputted frame into a second frame inversion in response to the second frame inversion polarity signal.
US07889166B2 Liquid crystal display with improved image quality
A liquid crystal display with improved color reproducibility and image quality is presented. The liquid crystal display includes a liquid crystal panel assembly including a plurality of pixels, a signal controller, and a data driver. The signal controller stores a dithering data patterns, selects one of the dithering data patterns based on input image data having a first bit number, and converts the input image data to output image data having a different bit number using the selected dithering data pattern. The data driver applies data voltages to the pixels, the data voltages corresponding to the output image data from the signal controller. Frequency of the input image signal and the output image signal from the signal controller is each about 120 Hz, and the dithering data patterns are repeated every eight frames. The signal controller includes a look-up table that stores the dithering data patterns.
US07889163B2 Drive method for MEMS devices
Embodiments of exemplary MEMS interferometric modulators are arranged at intersections of rows and columns of electrodes. In certain embodiments, the column electrode has a lower electrical resistance than the row electrode. A driving circuit applies a potential difference of a first polarity across electrodes during a first phase and then quickly transition to applying a bias voltage having a polarity opposite to the first polarity during a second phase. In certain embodiments, an absolute value of the difference between the voltages applied to the row electrode is less than an absolute value of the difference between the voltages applied to the column electrode during the first and second phases.
US07889161B2 Light emitting apparatus, method for driving the light emitting apparatus, and display apparatus including the light emitting apparatus
A light emitting apparatus comprises a light emitting section for emitting light, a color of the light being changed with a value of a driving current, and a driving section for driving the light emitting section so that the light emitting section emits light having a desired color and a desired intensity, by generating the driving current based on a signal designating the desired color and a signal designating the desired intensity and by applying the driving current to the light emitting section.
US07889160B2 Organic light-emitting diode display device and driving method thereof
An organic light-emitting diode display device includes a data line, a first and second gate lines crossing the data line, an emission line crossing the data line, an organic light-emitting diode device having an anode electrode and a cathode electrode, a high-level potential driving voltage source for supplying a high-level potential driving voltage to the anode electrode, a first switch element for connecting a cathode electrode of the organic light-emitting diode device to a first node, a second switch element for connecting the data line to a second node, a third switch element for connecting the second node to a ground voltage source, a driving element for adjusting a current flowing between the cathode electrode of the organic light-emitting diode device and the first node in accordance with a voltage of the first node, a first capacitor connected between the second gate line and the first node, and a second capacitor connected between the first node and the second node.
US07889158B2 Electrooptic device and electronic device
An electrooptic device includes: a first panel; a second panel on the back of the first panel; a first receiver circuit that measures a first ambient light incident on the first panel; a second receiver circuit that measures a second ambient light incident on the second panel; and a control circuit that measures the brightness of the environment where the first panel is placed on the basis of the luminance of the first ambient light whose ratio to that of the second ambient light is at or below a predetermined value, and that controls the display state of an image displayed on the first panel on the basis the brightness of the environment.
US07889154B2 Liquid crystal display apparatus and driving method
A liquid crystal display apparatus includes a display panel configured to be formed by arranging pixels like a matrix, a light source configured to light the display panel, and a driving control means for controlling the display panel, wherein the pixels are transreflective type liquid crystal pixels having a reflective part and a transmissive part driven independently, and the driving control means is configured to separately control non-image periods of the reflective part and transmissive part.
US07889148B2 Compact broad-band admittance tunnel incorporating gaussian beam antennas
A plane wave antenna including: a horn antenna; a waveguide at least partially inside the horn antenna, wherein the waveguide includes: a central dielectric slab increasing in width toward the horn antenna and with a first dielectric constant, an upper slab above the central dielectric slab with a second dielectric constant, and a lower slab below the central dielectric slab with the second dielectric constant; wherein the central dielectric slab has a substantially constant thickness less than a quarter of a wavelength at a highest frequency of operation of the plane wave antenna.
US07889145B2 Arrangement with a transponder and a metal element
The invention relates to an arrangement with a transponder (2) and a metal component (1) provided for the transponder (2). An antenna for the transponder (2) is formed by a recess (3) in the metal component (1).
US07889143B2 Multiband antenna system and methods
An antenna system internal to a radio device, the system comprising separate antennas and having separate operating bands. The system is implemented as decentralized in a way that each antenna is typically based on a small-sized chip component, which are located at suitable places on the circuit board and possibly on also another internal surface in the device. The chip component comprises a ceramic substrate and at least one radiating element. The operating band of an individual antenna covers, for example, the frequency range used by a radio system or only the transmitting or receiving band in that range. At least one antenna is connected to an adjusting circuit with a switch, by which the antenna's operating band can be displaced in a desired way. In this case the operating band covers at a time a part of the frequency range used by one or two radio systems.
US07889134B2 Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuit boards
Apparatus for suppressing noise and electromagnetic coupling in the printed circuit board of an electronic device includes an upper conductive plate and an array of conductive coplanar patches positioned a distance t2 from the upper conductive plate. The distance t2 is chosen to optimize capacitance between the conductive coplanar patches and the upper conductive plate for suppression of noise or electromagnetic coupling. The apparatus further includes a lower conductive plate a distance t1 from the array of conductive coplanar patches and conductive rods extending from respective patches to the lower conductive plate.
US07889133B2 Multilateration enhancements for noise and operations management
Multilateration techniques are used to provide accurate aircraft tracking data for aircraft on the ground and in the vicinity of an airport. From this data, aircraft noise and operations management may be enhanced. Aircraft noise may be calculated virtually using track data in real-time and provided to a user to determine noise violations. Tracking data may be used to control noise monitoring stations to gate out ambient noise. Aircraft emissions, both on the ground and in the air may be determined using tracking data. This and other data may be displayed in real time or generated in reports, and/or may be displayed on a website for viewing by airport operators and/or members of the public. The system may be readily installed in a compact package using a plurality of receivers and sensor packages located at shared wireless communication towers near an airport, and a central processing station located in or near the airport.
US07889132B2 Method and device for travel time-based location identification with the aid of a triggered or self-triggering reference signal
A method for the detection of an object by the TDOA principle is provided. The object transmits a signal, which is received by a plurality of stations having known positions. The stations' clocks can have different unknown time delays in relation to each other. An additional stationary reference station having a known position relative to the stations and transmitting a signal that is received by the stations is provided. An unknown transmission delay can be generated between the emission of the signal from the object and the emission of the signal from the reference station. For each station the difference in travel time between receipt of the signal from the object and the signal from the reference station and the difference of the travel time differences between the stations are determined. Mathematical algorithms for determining the location are performed.
US07889131B2 Beamformed space time code communication with testing spatial signature generation
An apparatus, logic and method are provided to improve beamformed space time code (STC) wireless communication. A first device comprising a plurality of antennas receives signals at the plurality of antennas transmitted from a first antenna of a second device. A testing spatial signature for a second antenna of the second device is computed based on the signals received at the plurality of antennas of the first device from the first antenna of the second device. Using the testing spatial signature and the signals received at the plurality of antennas of the first device from the first antenna of the second device, beamforming weights are computed to be applied to a space time code signal to be transmitted from the first device to the second device via the plurality of antennas of the first device.
US07889126B2 Tracking method
A tracking method includes enabling a target device to obtain a location information thereof, and enabling the target device to generate a uniform resource locator (URL), which contains the location information obtained thereby and a location of an electronic map-containing webpage of a website. The electronic map-containing webpage contains an electronic map, and an indication of a location of the target device on the electronic map.
US07889125B2 Adjusting processor clock information using a clock drift estimate
A navigation system comprises a global positioning satellite receiver to receive at least one global positioning satellite signal and to output global positioning satellite information. The navigation system further comprises a programmable processor, communicatively coupled to the global positioning satellite receiver, to execute software. The navigation system further comprises a clock, communicatively to the programmable processor, to output processor clock information. The software estimates an amount of drift in the processor clock information using the GPS information and adjusts the processor clock information for the amount of drift in order to generate adjusted processor clock information. The software generates a navigation solution as a function of at least the global positioning satellite information and the adjusted processor clock information.
US07889122B2 Refractivity retrieval via direct measurement of GNSS bending angle
A method and system for taking direct measurements of GNSS signal's arrival angle to remotely measure the atmospheric variables used for weather prediction. More specifically, an improved method and system for obtaining and processing accurate information regarding the weather and other atmospheric changes by measuring the total refractive bending angle of the GNSS signal. For mobile platforms on which receivers are mounted, phased array receivers are used to allow precise measurements of GNSS arrival angles. By measuring the refractive bending angle, more accurate and cost-efficient measurements of atmospheric changes are obtained, thereby resulting in more accurate predictions of the weather.
US07889121B2 Transmit/receive module
A transmit/receive module that reduces size and weight of a radar apparatus is disclosed. The transmit/receive module includes a transmit input terminal, a receive output terminal, a transmit line, a receive line, and a plurality of branch devices. During monitoring of the transmit line, the plural branch devices are configured so that a standard signal inputted to the transmitting terminal passes through the transmit line, and is outputted to the receive output terminal. During monitoring of the receive line, the plural branch devices are configured so that the standard signal inputted to the transmitting terminal passes through the receive line, and is outputted to the receive output terminal.
US07889120B2 Pulsed radar level detection system using pulse dithering to eliminate inaccuracies caused by tank rattle
A through air level measurement instrument for use in minimizing tank rattle comprises a housing and an antenna secured to the housing. A process adaptor is associated with the antenna and the housing for securing the instrument to a closed tank with the antenna directed into an interior of the closed tank. A control in the housing generates and receives a high frequency signal using an electromagnetic radiating element proximate the antenna. The control comprises an equivalent time sampling circuit including a main oscillator driving a timing circuit controlling timing between transmitted and sample pulses. A noise generator is operatively associated with the main oscillator to randomly modulate timing of the main oscillator. The control minimizes inaccuracies caused by tank rattle.
US07889111B2 Analog digital converter, A/D conversion stage, method for generating digital signal corresponding to analog signal, and method for generating signal indicating conversion error in the A/D conversion stage
A conversion operation B is performed with respect to a sample value R in an A/D conversion stage 101 to generate a conversion result D3, and a sampling operation A is performed with respect to this conversion result D3 in an A/D conversion stage 103. The conversion operation B is performed with respect to a sample value in an A/D conversion stage 105 to generate a conversion result D4, and the sampling operation A is performed with respect to the conversion result D4 in an A/D conversion stage 107. The conversion operation B is performed with respect to a sample value in an A/D conversion stage 107 to generate a conversion result D5, and the sampling operation A is performed with respect to this conversion result D5 in an A/D conversion stage 101. The conversion operation B is performed with respect to a sample value in the A/D conversion stage 103 to generate a conversion result D6, and the sampling operation A is performed with respect to the conversion result D6 in the A/D conversion stage 105.
US07889110B2 Analog/digital converter and information recording and reproducing apparatus
The present invention provides an A/D converter includes: a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages; a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators.
US07889108B2 Hybrid delta-sigma ADC
A hybrid delta sigma ADC architecture and method is disclosed to implement a high-resolution delta-sigma modulator with a single-bit output. The system contains a low-order multi-bit analog noise-shaping loop, followed by a high-order single-bit digital modulator. The combination simplifies the analog modulator, and allows the use of most of the full-scale input range.
US07889105B2 Electronic control unit having analog input signal
An analog input signal obtained from an analog sensor group 104A and first and second calibration voltages obtained by high-precision voltage-dividing resistors are successively selected by a multiplexer, digitally converted through an AD converter and then input to a microprocessor. The microprocessor calculates a collinear approximate coefficient based on the first and second calibration voltages in cooperation with a program memory, and corrects the digital conversion value to the analog input signal by using the approximate coefficient, thereby correcting a linear error of the conversion characteristic of the AD converter. In the calculation of the approximate coefficient, upper and lower limit check is executed on measurement values and calculation coefficients, and also plural calculation results are averaged to enhance the precision.
US07889102B2 LZSS with multiple dictionaries and windows
A method and apparatus for compressing data is described. An input string to be compressed is received. The input string is encoded with compressor using a compression algorithm using several sizes of dictionaries and windows. The compressor processes the input string with a selected size of the dictionary and window yielding the most compression of the input string among the different sizes of dictionaries and windows.
US07889098B1 Detecting targets in roadway intersections
The present invention extends to detecting targets in roadway intersections. A traffic sensor includes a transducer system and a transceiver system. The transducer system creates a plurality of transducer views for detecting targets located in a portion of the intersection. The transducer system includes a transducer configured to transmit signals towards and to receive signals and signal reflections within a portion of the two or more approaches to the intersection. The transducer is configured such that when necessary the transducer can transmit a signal and receive a signal or signal reflection simultaneously. The transceiver system is configured to generate digital data indicative of the transducer receiving a signal or signal reflection. The transducer system and transceiver system interoperate to generate an aggregate sensor view of the intersection that includes a plurality of transducer views of the two or more approaches to the intersection.
US07889096B2 Vehicular component control using wireless switch assemblies
Control system for controlling adjustable components in a vehicle using wireless switch assemblies or other input devices which provide input to the control system to enable the control system to control the components based on the input. The control system includes an interrogator arranged to transmit RF signals having identification data associated with the input devices such that upon transmission of each RF signal, the input devices with matching identification data can provide responsive signals. Various types of input devices are envisioned and one type is a manually activated RFID switch assembly which provides output based on pressure applied by the occupant of the vehicle to an exposed surface and includes an RF transmission component arranged to wirelessly transmit an indication of the application of pressure to the exposed surface.
US07889092B2 Alert device having notification-based customizable settings
An alert device is disclosed. The alert device has at least one light, at least one speaker, and a communication system configured to receive an alert notification containing instructions for each of at least one pattern and duration of activation of the at least one light, at least one pattern and duration of activation of the at least one speaker, and an overall duration of the alert notification. The alert device further has a controller communicatively coupled with the at least one light, the at least one speaker, and the communication system. The controller is configured to monitor the communication system for the alert notification, decode the alert notification, activate the at least one light and the at least one speaker for their respective at least one patterns and durations of activation, and deactivate the at least one light and the at least one speaker after the overall duration elapses.
US07889091B2 Emergency device actuator absence notification system and method therefor
An emergency device actuator absence notification system and method therefore capable of notifying an observer or system supervisor of the presence and operability of the emergency device actuator and also capable of notifying an observer or system supervisor of the absence or inoperability of the emergency device actuator.
US07889089B1 Auxiliary generator self-test verification device
A device for monitoring the self-testing of an auxiliary generator provides an alarm signal if the generator does not start and operate within a predetermined time period.
US07889087B2 Immersion detection
A fluid detection system comprises a liquid sensor, an air pump and an atmospheric pressure sensor encased within an air and water permeable casing defining an enclosed air space. The pressure sensor acquires pressure samples within the casing, the air pump expelling additional gas into the casing. In response to determining a flood-status or a non-flood-status state of the fluid detection system and comparing the samples, a failure of the fluid detection system or an immersion of the fluid detection system in fluid is determined. In some embodiments, failure is determined if a second sample is greater than a first sample in a non-flooded state, and in others immersion is determined if a second sample is greater than a first sample value and the determined state is flooded. In some examples, gas is expelled across a liquid detection surface and a third sample value is acquired.
US07889081B2 Thermal radio frequency identification system and method
An improved solution for radio frequency identification (RFID) systems is provided. In an embodiment of the invention, the RFID tag includes: a power source; a data storage repository; a radio frequency (RF) transmitting element configured to transmit data from the data storage repository, and electrically attached to the power source; and a thermal to electrical energy converter electrically attached to the power source.
US07889078B2 Motion activation device
There is an increase in the number of autonomous battery driven devices in the world today and also a growing need for rapid information of unwanted incidents. By combining the GMS- and GPS-technology with the invention and any sensor with the ability to generate a voltage due to external influences, one has reached an activation device perfect for alarm devices that can lay dormant for years with no mentionable power consumption until the day a certain incident occurs. This trait can be used in numerous applications where only the sensor type sets the limits. By using a piezoelectric gyroscope as sensor for instance, a potent tracking device is made, where motion generates a voltage, which in turn will activate the entire device that will instantly start tracking the movement of the device and report this to its owner. This device will be of very small dimensions it can be attached to or hidden somewhere on personal belongings of a certain size; bags, suitcases, bicycles, paintings etc.
US07889066B2 Self-configuring emergency event alarm system having connection to a public safety answering point
The present Self-Configuring Alarm System uses a decentralized (ad hoc or mesh) architecture where any node is capable of autonomously reporting the alarm event directly to all other nodes in the ad hoc network independent of where the alarm event occurred. In addition, the Self-Configuring Alarm System includes a plurality of autonomous output devices which function to provide an audible alarm that directs the occupants to the location of the hazard and/or provides an indication of the nature of the detected hazard or whether an indication of the hazard has been received at a Public Safety Answering Point (PSAP) that serves the dwelling or locale. The alarm networks and output networks may not be coextensive in their coverage areas.
US07889065B2 Method and apparatus to determine vehicle intent
The present invention relates to the field of smart cars and automatic signaling of a vehicle's intent. The invention allows a driver to choose between manual or automatic signaling (turns, deceleration, acceleration) and a prominent feature is that the system is not cooperative and can be phased in over time, one car at a time and offer immediate benefits. Much of the prior art relating to newer automotive technologies relies on the use of cooperative technologies, such as transponders or beacons and the like, requiring all cars to equip in order to gain benefits. While this is technically achievable it is an institutional limitation, and therefore systems that do not rely on this extent of cooperation are more practical and can be introduced sooner. The invention has the capability of ensuring that many more cars on the road provide proper turn signals as well as acceleration and deceleration signals. This display of intent will lead to increased situational awareness for all drivers and will improve efficiencies on the roads leading to less congestion. Today, the car ahead may simply slow down leaving a following or approaching driver to wait and guess what is happening. With this invention the car ahead will declare its intentions in advance. The invention also allows for the broadcasting of the vehicles intentions over commercially available data links.
US07889064B2 Combined tire pressure gauge and remote tire pressure display
A combined tire pressure gauge and remote tire pressure display includes a port adapted to couple to a vehicle tire valve stem and to open a valve in the valve stem; a chamber in physical communication with the port; a local pressure transducer in the chamber for detecting a pressure of a fluid within the vehicle tire and providing an output signal representative of the detected pressure; a wireless receiver for receiving a signal identifying a tire pressure sensor and having a detected tire pressure and for providing an output signal; a processor for receiving the output signal from the pressure transducer and the output signal from the wireless receiver, and for providing a processor output signal indicative of an identified tire and a value of the detected pressure, in a remote tire display mode, and for providing a processor output signal indicative of a detected tire pressure, in a tire pressure gauge mode; and a display coupled to the processor for providing a visible indication of detected pressure value and identified tire in accordance with the processor output signal in the remote tire display mode, and for providing a visible indication of detected pressure value in the tire pressure gauge mode.
US07889063B2 Customizable vehicle information display
A system and method for creating a customizable video display in a vehicle is provided for allowing a user to select what driving information is to be displayed. The system having a video display device fixed on the instrument panel of a vehicle, and an input device allowing users to choose what to view and the size the information will appear in, from a list of vehicle driver information. The method having the steps of providing a list of driver information from which the user may select, selecting the desired driver information to be displayed, selecting the size the information will be displayed in, and displaying the information on the video display device.
US07889057B2 RFID reader
Provided are an RFID reader reading data from an RFID tag using a wireless connection over a specified frequency bandwidth, including a transmitting unit synthesizing sequentially and cumulatively frequency control signals generated every clock, mixing the synthesized specific frequency signal and a fixed frequency signal, and as a result outputting an RF signal.
US07889055B2 IC tag, IC tag system, and method of executing command of the IC tag
An IC tag according to an embodiment of the invention includes: a storage circuit having a plurality of memory cells; and a memory control circuit receiving commands by use of a radio signal to control the storage circuit based on the commands, the commands including a specific command to collectively control the plurality of memory cells, and the memory control circuit executing control corresponding to the specific command on the storage circuit based on the specific command and first key data received in association with the specific command.
US07889054B2 Method and apparatus for creating scramble signals in RFID
The disclosed inventions relate to a method and apparatus for creating scramble signals. The disclosed inventions further relate to a method and apparatus for creating scramble signals from data signals. The disclosed inventions also relate to a method and apparatus for creating minimum-energy scramble signals. The disclosed inventions further relate to a method and apparatus for exploiting sleep and wake commands to achieve efficient data and scramble signals.
US07889052B2 Authorizing payment subsequent to RF transactions
A transponder-reader payment system includes a fob including a transponder, and a RFID reader for interrogating the transponder. The system may further include a payment device separate and distinct from the fob, but associated with payment account mutually shared with the fob. In exemplary operation, the fob identifying information, or the payment device information, may be presented to the RFID reader for completion of a transaction request. A process server may receive the transaction request and satisfy the transaction request in accordance with a predetermined payment criteria. The process server may additionally augment a rewards account based on fob or payment device usage, thereby incenting fob usage in one instance and payment device usage in the other.
US07889050B2 System and method for training a trainable transmitter
A method for training a trainable transmitter in a vehicle that includes receiving a request to enter a training mode of the trainable transmitter from a user, beginning a training mode of the trainable transmitter, receiving a control signal from an original transmitter associated with a remote control system, detecting a frequency and control data of the control signal. The method further includes determining if the control signal is a fixed code signal or a rolling code signal. If the control signal is a fixed code signal, storing the detected frequency and control data. If the control signal is a rolling code signal, comparing the detected control signal frequency to a plurality of predetermined frequencies and based on the comparison, shifting the detected frequency to match one of the predetermined frequencies.
US07889048B2 Resistor network and variable resistor simulator
A variable resistor network has a coarse resistance network and a fine resistance network connected in series with the coarse network. The coarse resistance network comprises a chain of series-connected resistors any one or more of which may be switched out of the series by individual parallel-connected relays. The fine network comprises a shunt resistor together with a fixed resistor and a series-connected adjustable resistor together connected in parallel with the shunt resistor. A control circuit is arranged to control the relays for the switching of the resistors of the coarse network and also to control adjustment of the adjustable resistor. A chosen resistance value can be set by appropriate switching of the coarse network and adjustment of the adjustable resistor.
US07889046B2 Conductor assembly formed about a curved axis
A conductor assembly of the type which, when conducting current, generates a magnetic field or in which, in the presence of a changing magnetic field, a voltage is induced. In the assembly a first layer, tubular in shape, is formed about an axis. The axis includes a curved portion along which a conductor may be positioned to define a first conductor path. The first layer also includes a curved portion having a shape that includes a curve extending along the curved portion of the axis. A first conductor is arranged about the curved portion of the first layer in a first helical configuration including a curved segment, helical in shape and formed about the curved portion of the axis. The configuration is capable of sustaining a magnetic field having multipole components oriented in directions transverse to the axis.
US07889045B2 Balun transformer using a drum-shaped core
A balun transformer includes: a drum-shaped core having a core unit and a pair of flanges arranged on both sides of the core unit; a plurality of terminal electrodes arranged on the flanges; a primary winding wound around the core unit, both ends of the primary winding being connected to the terminal electrodes; and a secondary winding wound around the core unit, both ends and a center tap of the secondary winding being connected to the terminal electrodes, wherein the secondary winding includes a first wire extending from one end to the center tap, and a second wire extending from the other end to the center tap, and the first wire and the second wire are wound around the core unit so as to extend along each other.
US07889044B2 Multilayer coil component
A multilayer coil component is provided in which solder fusibility and a self-alignment property are prevented from being degraded due to absorption of a flux in a soldering step. The multilayer coil component has no voids present at interfaces between internal conductors 2 and a magnetic ceramic 11 located therearound. A magnetic ceramic forming a central region 7 has a region (side gap portion 8) which extends from a side surface 3a of the magnetic ceramic element to the internal conductors and which has a pore area ratio of 6% to 20%. At least one of a first external layer region 9a, located at an upper side of the central region, and a second external layer region 9b, located at a lower side of the central region (an external layer region at a mounting surface side of a mounting substrate), has a pore area ratio of less than 5%.
US07889041B2 Systems and methods for forming an isolated transformer
A transformer to isolate a primary winding from a signal winding include a primary substrate (which may comprise a printed circuit board (PCB)) and a secondary substrate. The primary and secondary substrates may each have three openings to allow first and second E-E core halves to be joined therebetween. A first insulator may be disposed between the primary and secondary substrates to isolate the primary substrate from the secondary substrate. A second insulator may secure the primary and secondary substrates in place and insulate the secondary substrate from the core. The primary and secondary substrates may each include a Faraday shield its outer layers. A shield slit to prevent shorting between the legs of the E-E core may be formed by cutting a channel in the shield between the opening of the primary and secondary substrates. A retaining clip may be used to clamp together the primary substrate, first and second core E-E core halves, secondary substrate and second insulator. A primary winding and sense winding may be disposed within the primary substrate and a signal winding may be disposed within the secondary substrate. The primary, sense, and signal windings may be positioned so that the magnetic flux produced by the primary winding passes through the signal and sense windings in substantially equal proportions. The primary and signal winding may enter the E-E core from opposite directions to choke any common mode current therebetween.
US07889040B2 DC inductor
A DC inductor comprising a core structure (11) comprising one or more magnetic gaps (12, 13), a coil (14) wound on the core structure (11), at least one permanent magnet (15) positioned in the core structure, the magnetization of the permanent magnet (15) opposing the magnetization producible by the coil (14). The DC inductor further comprises at least one magnetic slab (16) inserted to the core structure which forms the one or more magnetic gaps (12, 13), at least one supporting member (17) made of magnetic material extending from the core structure inside the core structure and supporting the at least one permanent magnet (15), and that the at least one supporting member (17) is arranged to form a magnetic path for the at least one permanent magnet.
US07889035B2 Methods for charging and using pulsed-power sources
Methods and systems provide pulsed-power to a load utilizing high temperature superconductors (HTS) within multiple pulsed-power devices. According to embodiments described herein, each pulsed-power device includes a HTS mounted on a rotor and an armature coil mounted on a stator. The rotor is positioned to allow a magnetic field within the HTS to induce a voltage in the armature coil when the rotor is rotating and to allow a magnetic field created by passing current through the armature coil to charge the HTS. Current created from the operation of a first pulsed-power device is routed to the armature coil in a second pulsed-power device to charge the associated HTS to a higher value. Subsequently, the second pulsed-power device is operated to produce current that is used to further charge the HTS in the first pulsed-power device. This bootstrapping procedure is repeated until all HTSs are fully charged.
US07889028B2 Coupled resonator for regulating system
The coupled resonator comprises a first low frequency resonator, such as a balance spring (1) and a second higher frequency resonator, such as a tuning fork (2), the two resonators (1 and 2) including permanent mechanical coupling means. Application to the regulating system of a timepiece.
US07889023B2 Switching circuit for millimeter waveband control circuit
Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.
US07889016B2 Integrated RC oscillator with high frequency stability, notably for an integrated switched-mode power supply
An integrated oscillator (10), for an integrated circuit, comprises i) first (CI1) and second (CI2) compensated inverters mounted in series and each comprising first (PI11;PI21) and second (PI12;PI22) plain inverters mounted in parallel and comprising transistors having channel lengths respectively shorter and longer than an optimal channel length, the first compensated inverter (CI1) having input and output terminals respectively connected to first (N1) and second (N2) nodes and the second compensated inverter (CI2) having input and output terminals respectively connected to the second node (N2) and to a third node (N3), ii) a resistor (R) having a chosen resistance value and comprising first and second terminals connected respectively to the first (N1) and second (N2) nodes, and iii) a capacitor (C) comprising first and second terminals connected respectively to the first (N1) and third (N3) nodes, and having a chosen capacitance value to charge and discharge oneself in order to periodically deliver a clock signal at the desired oscillation frequency.
US07889015B2 Oscillation device
To provide an oscillation device having a long oscillation wavelength in which wavelength variable width is relatively broad and wavelength sweep rate is relatively high. An oscillation device includes a gain medium having a gain with respect to an electromagnetic wave to be oscillated, cavity structures for resonating the electromagnetic wave, and energy injection means and for injecting pumping energy into the gain medium. The gain medium is sandwiched between a first negative permittivity medium and a second magnetic permittivity medium each of which real part of permittivity with respect to the electromagnetic wave is negative. Electric field application means is provided for at least one of the first negative permittivity medium and the second negative permittivity medium to apply an electric field for changing a depletion region formed at a boundary part with the gain medium.
US07889009B2 Distributed active transformer based millimeter-wave power amplifier circuit
A distributed active transformer (DAT) based millimeter-wave (MMW) power amplifier circuit is designed for power amplification of MMW frequency signals. The proposed MMW power amplifier circuit is characterized by distributing the input frequency signals into two sets of differential signals and by the use of a distributed active transformer circuit unit to process these two sets of differential signals to thereby generate an amplified frequency signal as the end result of output. The invention provides higher and greater added values and power added efficiency (PAE) and is ideal for use in millimeter-wave communications systems with an operation frequency around 60 GHz.
US07889008B2 Programmable gain MOS amplifier
A programmable gain MOS amplifier is disclosed. The programmable gain MOS amplifier is capable of increasing its programmable gain linearly in dB unit by increasing its gain level data linearly. The programmable gain MOS amplifier includes a plurality of gain providers for providing predetermined gains respectively, and a plurality of gain tuners. Each of the plurality of the gain tuners is disposed for adjusting the predetermined gain from the corresponding gain provider. Each of the gain tuners includes a gain enabling module and a gain decreasing module. The gain enabling module allows the corresponding predetermined gain to add to the programmable gain of the MOS amplifier. The gain decreasing module declines the corresponding predetermined gain added to the programmable gain of the MOS amplifier.
US07889007B2 Differential amplifier with active post-distortion linearization
A differential amplifier, which has good linearity and noise performance, includes a first side that includes first, second, third, and fourth transistors and an inductor. The first and second transistors are coupled as a first cascode pair, and the third and fourth transistors are coupled as a second cascode pair. The third transistor has its gate coupled to the source of the second transistor, and the fourth transistor has its drain coupled to the drain of the second transistor. The first transistor provides signal amplification. The second transistor provides load isolation and generates an intermediate signal for the third transistor. The third transistor generates distortion components used to cancel third order distortion component generated by the first transistor. The inductor provides source degeneration for the first transistor and improves distortion cancellation. The sizes of the second and third transistors are selected to reduce gain loss and achieve good linearity for the amplifier. The differential amplifier also may include a second side that functions similarly to the first side.
US07888993B2 Bias current generator for multiple supply voltage circuit
An electronic device supplied by multiple supply voltages includes a bias current generating stage and maximum current selection stage. The bias current generating stage comprises a crude bias current generator for generating an crude bias current during a power up phase in which at least one of the multiple supply voltages has not yet reached its target supply voltage level, a reference current stage for providing a reference current having a target current value greater than the target value of the crude bias current when the multiple supply voltages have reached their target supply voltage levels. The maximum current selection stage is adapted to continuously output a bias current which is the maximum current of the crude bias current and the reference current.
US07888990B1 Phase locked loop charge pump reference current bootstrapping
A phase locked loop with a charge pump circuit has increased stability and phase margin. The charge pump circuit feeds back its voltage output to generate a reference current. In one embodiment, the charge pump circuit comprises a current generator responsive to a charge voltage that has been output from the charge pump. The current generator generates a reference current based on the charge voltage and a supply voltage. The reference current may comprise a bootstrap current and an auxiliary current. The charge pump circuit also comprises a current mirror that generates a source current and a sink current that are substantially the same as the reference current. The charge pump circuit further comprises a charge voltage generator to generate the charge voltage based on the source current and the sink current. A related method is also disclosed. Other embodiments are provided, and each of the embodiments can be used alone or in combination with one another.
US07888989B2 Charge pump regulator and method of producing a regulated voltage
A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the current flowing therethrough according to an output-dependent feedback signal.
US07888986B2 Method of controlling a rectifying bridge in a diode mode and a circuit for the control
A method and a circuit for controlling a thyristor (V1) into conducting state, the thyristor (V1) being in a rectifier, which rectifier supplies DC voltage to a DC voltage circuit. The circuit comprising a trigger capacitor (C2) adapted to be charged from the voltage difference across the thyristor (V1) when the anode-to-cathode voltage of the thyristor is positive, a zener diode (V5) adapted to be triggered with the voltage of the trigger capacitor (C2), when the voltage of the trigger capacitor (C2) exceeds the breakdown voltage of the zener diode (V5), and an auxiliary thyristor (V3) adapted to be triggered with the current from the trigger capacitor (C2) flowing via the zener diode (V5), wherein the cathode of the auxiliary thyristor (V3) is connected to the gate of the thyristor (V1) for triggering the thyristor (V1) with the current from the trigger capacitor (C2) flowing via the auxiliary thyristor (V3) for using the thyristor (V1) in a diode mode.
US07888981B2 Semiconductor integrated circuit
The semiconductor integrated circuit includes a clock generating section having a digital control signal generating part operable to generate a clock signal and a digital control part. The clock generating section further includes a phase-frequency comparator and a control register. The comparator is supplied with a reference signal CLKin and a feedback signal. The control register is supplied with an output signal of the comparator, and stores two or larger bits of digital control information. The clock generating section further includes a control data storing circuit for previously storing sets of initial set data for lock operations. In response to operation select information, initial set data are stored at upper bit of the control register from the control data storing circuit. Thus, it becomes possible to reduce the number of steps to store control information in a register for digitally controlling the clock signal generating part.
US07888980B2 Charge pump with low charge injection and low clock feed-through
A charge pump with low charge injection and low clock feed-through for a phase locked loop (PLL). A first source-switched current mirror has a source transistor and an output transistor. The source transistor has a drain connected to a first current source. The output transistor has a drain connected to an output of the charge pump. The gates of the source and output transistors are coupled together by a first conductive link. A switch is coupled between a supply voltage source and a source of the output transistor of the current mirror. A tuner is coupled between the switch and the output transistor of the current mirror. A source of the tuner is coupled to a drain of the switch and to the source of the output transistor. A drain of the tuner is coupled to the first conductive link between the source and output transistors of the current mirror.
US07888978B2 Frequency synthesizer
A frequency synthesizer includes first and second frequency dividers for receiving and frequency-dividing a signal generated by a voltage-controlled oscillator, a frequency mixer for mixing output signals of the first and second frequency dividers, and a third frequency divider for receiving and frequency-dividing a signal having one frequency of two frequencies that are output by the frequency mixer. The first, second third and frequency dividers and the frequency mixer are provided in a feedback loop within a PLL circuit between the voltage-controlled oscillator and the phase comparator. The phase comparator has a first input terminal to which a signal to which a signal that is output by the third frequency divider is input and a second input terminal to which a reference clock signal that is output by a reference signal generator is input. A loop filter supplies the voltage-controlled oscillator with a voltage that is based upon result of the phase comparison by a phase comparator. The voltage-controlled oscillator supplies the first and second frequency dividers with a signal that oscillates at a frequency corresponding to the voltage input to the oscillator.
US07888977B2 Electronic device for supplying DC power
An electronic device for delivering DC power includes a load, a power end, an upper gate switch including a first end coupled to the power, a second end, and a third end, for conducting connection between the first and third ends according to the signal level of the second end, a lower gate switch including a first end coupled to the third end of the upper gate switch, a second end, and a third end coupled to ground, for conducting connection between the first and third ends according to the signal level of the second end, an inductor, and a switch control unit, coupled to the second end of the upper gate switch and the second end of the lower gate switch, for switching the upper gate switch between an ON state and an OFF state, and switching the lower gate switch between an ON state and a semi-ON state.
US07888975B2 High-speed transmit driver switching arrangement
The invention relates to a line driver to drive a transmission line with a differentially balanced signal, with selectable signal amplitude, with output impedance matched to a characteristic impedance of the transmission line, and with reduced dissipation. The line driver includes a first driver subcircuit including a first and a second group of resistors. To drive an output node with a first signal sense, the first group of resistors is selectively coupled to a first bias voltage terminal and the second group to a second bias voltage terminal. To drive the first output node with a second signal sense, the first and second groups of resistors are both selectively coupled to the second bias voltage terminal. The line driver includes a second driver subcircuit. The second driver subcircuit includes a third and fourth group of resistors that are correspondingly switched.
US07888973B1 Matrix time-to-digital conversion frequency synthesizer
The present disclosure provides for a time to digital converter (TDC). The time to digital converter can include a reference ingress that receives a reference signal and passes the reference signal through multiple delay elements, a clock signal ingress that receives a clock signal and passes the clock signal through another set of delay elements, and multiple comparators, which are fewer in number than the total number of delay elements. The multiple comparators 1) receive the delayed reference and delayed clock signals and 2) output a set of comparison results for comparisons of pairs of delayed references and delayed clock signals.
US07888971B2 Verification support system and method
A verification support system for supporting logic verification of a circuit including a transmitter clock domain and a receiver clock domain, the transmitter clock domain, the system includes a detector for receiving data to be transmitted from the transmitter clock domain, and for detecting a fluctuation of the received data due to any timing fluctuation responsive to the transmitter clock. The system includes an identification unit to identify whether or not any fluctuation of the data determined by the detector is propagated to the output of the combinational logic on the basis of propagation of the received data through at least one of logic gates of the receiver clock domain to combinational logic so as to determine any fluctuation of data that is to be inputted to the combinational logic.
US07888969B2 Driver circuit for a two-wire conductor and method for generating two output currents for a two-wire conductor
A driver circuit and method for generating two complementary output currents from a two-state logic input signal at two outputs for connecting a two-wire conductor provide the following actions: generating from the input signal, an output signal at each output, the amperage of one of the output currents being adjustable by a control signal; analyzing each voltage materializing at the outputs; generating an error signal as a function of the output voltages within each of at least two time slots subsequent to a change in state of the input signal; caching the error signals or signals derived therefrom and adjusting, as a function of cached error signals or of the cached signals as a function thereof, the output current in corresponding time slots subsequent to a resulting change in state of the input signal.
US07888968B2 Configurable pre-emphasis driver with selective constant and adjustable output impedance modes
Embodiments of the invention are directed to a single driver that can be used to transmit data with configurable levels of pre-emphasis, and can have either a constant or adjustable driver output impendence, selectively. One embodiment, directed to a driver apparatus, is associated with a digital communication channel for transmitting data signals, wherein at least one of the signals includes a higher frequency component. The apparatus comprises a first sub-driver that has a constant output impedance, and is selectively configurable to implement two or more different levels of pre-emphasis. The apparatus further comprises one or more second sub-drivers. A set of connector elements are provided for connecting the first sub-driver and each of the second sub-drivers in parallel relationship with one another, so that the first sub-driver and each of the second sub-drivers all have inputs that respectively receive a specified driver apparatus input signal, and all have outputs that are connected together to selectively provide a specified driver apparatus output impedance. The apparatus further includes a device that is connected to selectively disable and enable each of the second sub-drivers.
US07888966B1 Enhancement of input/output for non source-synchronous interfaces
An interface for use of device whose core circuitry operates in one voltage domain, but exchanges signal with another device (or “host”) according a different voltage domain, and the use of such an interface for supplying data using a double data rate (DDR) transfer, is presented. One concrete example of this situation is a memory card, where the internal circuitry uses one voltage range for its core operating voltages, but exchanges signals with a host using different, input/output voltage range. According to a general set of aspects, the interface receives data signals from the device at the device's core operating voltage domain, individually level shifts these to the input/output voltage domain, and then combines them into a DDR signal for transfer to the host device, where a (non-level shifted) clock signal from the host device is used as the select signal to form the DDR data signal.
US07888965B2 Defining a default configuration for configurable circuitry in an integrated circuit
An integrated circuit with a configurable portion, such as an input/output port, that can be placed in a default configuration prior to actual configuration of the integrated circuit. An external terminal that serves as an output during normal operation is coupled, after power-on of the integrated circuit, to a comparator that senses the voltage level at that external terminal. If the external terminal is at a particular level, a multiplexer is controlled to ignore the state of the normal configuration memory, and to place the configurable input/output port into a default protocol.
US07888964B2 Device and method for testing a resistance value of on-die-termination device and semiconductor device having the same
A device and a method for testing a resistance value of an on-die-termination (ODT) device and a semiconductor device having the same are presented. The device can include a comparator, a storage unit and and an output unit. When in an ODT test operation mode, the comparator compares a reference voltage against an input data input to a pad to determine the resistance value of the ODT device and outputs a determination data on the resistance value of the ODT device corresponding to the determination results. The storage unit stores the output of the comparator in synchronization with a clock signal. When in the ODT test operation mode, the output unit outputs the determination data on the resistance value of the ODT device stored in the storage unit to the pad. Thereby not only is the device configured to determine whether or not a defect of the resistance value of the ODT device exists but the device and the method are able to achieve this task in a substantially shorter testing time period.
US07888962B1 Impedance matching circuit
An impedance matching circuit has a reference impedance. A comparator has a first input coupled to a terminal of the reference impedance and has an output. A pull-up counter is coupled to the output of the single comparator.
US07888961B1 Apparatus and method for electrical detection and localization of shorts in metal interconnect lines
A test structure for localizing shorts in an integrated circuit and method of testing is described. A first comb structure is formed from a first busbar and a first plurality of fingers extending from the first busbar. A second comb structure formed from a second busbar and a second plurality of fingers extending from the second busbar. The second plurality of fingers is interleaved with the first plurality of fingers. A plurality of pass gates is connected between the first plurality of fingers and the first busbar. A pass gate terminal is electrically connected to the gate electrode of each of the plurality of pass gates. When the pass gates are turned OFF thereby disconnecting the first busbar from the first plurality of fingers, voltage contrast imaging can be used to identify which of the first fingers is adjacent the short.
US07888958B2 Current test probe having a solder guide portion, and related probe assembly and production method
A probe for current test is provided. The probe includes a probe body having a plate-like connection portion whose end face becomes a connection face to a probe board, a solder layer formed on at least one side face of said connection portion, and a guide portion formed on the connection portion. The guide portion penetrates the connection portion in its thickness direction from the one side face with the solder layer formed to the other side face. When the solder layer is melted, the guide portion guides a portion of the melted solder to the other side face.
US07888957B2 Probing apparatus with impedance optimized interface
In a membrane probing apparatus, the impedance of the interface between coaxial cables connected to the test instrumentation and the membrane supported co-planar waveguide that conductively connects to the probe's contacts is optimized by eliminating a ground plane in the interface board.
US07888953B2 Probe card
A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip.
US07888951B2 Integrated unit for electrical/reliability testing with improved thermal control
In accordance with an aspect, a thermally-controllable integrated unit is configured to hold devices under test. The integrated unit includes at least one heater board, comprised of a thermally-conductive material and provided with at least one global heater configured to globally heat the DUT board. A DUT board of the integrated unit includes a DUT board in thermal contact with the at least one heater board, the DUT board including a plurality of sockets, each socket configured to hold at least one DUT. The DUT has conductor paths to conduct electrical signals between test equipment and the terminals of DUTs in the sockets. Each socket includes an associated temperature sensor and a separately controllable local heater configured to, based on a temperature indication from the temperature sensor, heat a DUT in that socket.
US07888946B2 Portable electronic device with projection function
A portable electronic device with projection function including a host, a projection module, a signal line, a first adjusting leg and a second adjusting leg is provided. The host has a chamber at its side. The projection module is for outputting an image light beam. The projection module is connected to the host through the signal line. The first adjusting leg is pivoted to the projection module. The second adjusting leg is pivoted to the projection module, wherein the first adjusting leg and the second adjusting leg can be stored into the chamber with the projection module after pivoting.
US07888944B2 Power gauge for accurate measurement of load current
According to one exemplary embodiment, a power gauge for accurately measuring current consumed by a load coupled to a power source includes a current sense resistor having a first terminal coupled to the power source and a second terminal coupled to the load. The power gauge further includes a first integrator configured to integrate a voltage at the first terminal of the current sense resistor during a time period and to output a first integrated voltage. The power gauge further includes a second integrator configured to integrate a voltage at the second terminal of the current sense resistor during the time period and to output a second integrated voltage. A difference between the first and second integrated voltages can be used to accurately determine the current consumed by the load during the time period.
US07888941B2 Permittivity measurements with oil-based mud imaging tool
Oil-based mud imaging systems and methods that measure formation permittivity. In some embodiments, disclosed logging systems include a logging tool in communication with surface computing facilities. The logging tool is provided with a sensor array having at least two voltage electrodes positioned between at least two current electrodes that create an electric field in a borehole wall, and is further provided with electronics coupled to the voltage electrodes to determine a differential voltage magnitude and phase. From the magnitude and phase, formation resistivity and permittivity measurements can be determined and used to construct a borehole wall image.
US07888938B2 Gradient coil and method to manufacture a gradient coil
In a gradient coil and a method to manufacture a gradient coil for a magnetic resonance apparatus, the gradient coil has at least one saddle coil, the saddle coil having a spatially shaped, electrically conductive plate with a line-shaped recess penetrating the plate. Conductor structures that create a gradient magnetic field in an examination region when a current signal flows therethrough are formed by the recess and by the shaping of the plate. The recess is filled with an electrically insulating material before implementation of the spatial shaping.
US07888934B2 Magnetic resonance imaging apparatus
With a view to attaining a high quality of a diagnostic image there is provided a magnetic resonance imaging apparatus wherein an image is formed on the basis of magnetic resonance signals received from a subject with an electromagnetic wave transmitted thereto in a static magnetic field. The magnetic resonance imaging apparatus is provided with plural receiving coil units for receiving the magnetic resonance signals, the receiving coil units each comprising a coil body configured to receive a corresponding one of the magnetic resonance signals and output an electrical signal and an optical modulator configured to use an electric field of the electric signal outputted from the coil body directly as a modulation signal.
US07888931B2 Magnetic winding and method of making same
The present invention provides an improved magnetic winding and method of calculating desired winding parameters (winding layer thickness, number of winding layers and number of turns per winding layer) for a winding in a magnetic component. The invention may be applied to general boundary conditions in a magnetic winding or component and considers relative phase displacement for sinusoidal and nonsinusoidal winding currents. Ratios of magnetic surface field intensities at corresponding inner and outer boundaries of one or more winding layer(s) are calculated, and considered with relative phase displacement to select magnetic winding configurations having desired or optimal power dissipation. In certain aspects, a normalized loss function f(H,R,B,Φ) is utilized to determine a preferred construction among a plurality of iteratively generated selections.
US07888925B2 Load current compensation in synchronous power converters
A method of operating a synchronous power converter generates a control signal in a load current compensation circuit based on a light load condition at the converter, where the control signal controls a gate driver for at least one power switch of the converter. When the gate driver is turned off via the control signal, the method monitors one or more comparison signals in a reference voltage adjustment module of the compensation circuit, a first comparison signal of the one or more comparison signals indicative of a voltage level at a phase node of the converter. Based on a remaining body diode conduction level associated a body diode with the at least one power switch as detected by at least a second comparison signal, the method adjusts a reference voltage for the at least one power switch with the adjustment module until the body diode is no longer conducting.
US07888923B2 Dynamic phase manager for multi-phase switching regulators
An apparatus is provided. The apparatus comprises a current sensor, an error amplifier, a comparator, an analog-to-digital converter (ADC), control logic, and drivers. The error amplifier is adapted to receive a reference voltage and a feedback voltage, and the comparator has a first input terminal and a second input terminal, where the sum of at least a first portion of a common mode voltage and an output of the error amplifier is input into the first input terminal, and wherein the sum of at least a second portion of the common mode voltage and an output of the current sensor is input into the second input terminal. The ADC receives the sum of the second portion of the common mode voltage and the output of the current senor. Additionally, the ADC has a plurality of internal threshold voltages that are between the common mode voltage and an overcurrent limit adjustment voltage. The control logic receives an output from the comparator and the ADC, and the drivers are each adapted to receive at least one control signal from the control logic so as to provide drive signals to a converter.
US07888920B2 Power supply device with fast output voltage switching capability
A power supply device is disclosed in the present invention, which includes a DC-DC boost converter and a charge recycling circuit. The DC-DC boost converter is utilized for boosting an input voltage to generate an output voltage, and adjusting a voltage level of the output voltage according to a level switching signal. The charge recycling circuit is electrically connected to the DC-DC boost converter, and is utilized for generating a current path according to the level switching signal to recycle redundant charges from the DC-DC boost converter when the output voltage is switched from high to low and to return stored charges back to the DC-DC boost converter when the output voltage is switched from low to high, so as to accelerate voltage switching of the output voltage and to reduce power consumption of the DC-DC boost converter.
US07888919B2 Apparatus, system, and method for an adaptive high efficiency switching power supply
An apparatus, system, and method are disclosed for an adaptive high efficiency switching power supply. The switching power supply has a regulation stage with a stage controller that operates to regulate a voltage of the regulation stage relative to a reference voltage. A power detection module detects an amount of power used by the switching power supply. A low power module determines if the power supply is operating below a minimum power capacity threshold. A stage voltage adjustment module adjusts the reference voltage from a high power reference voltage to a low power reference voltage in response to the low power module determining that the power supply is operating below the minimum power capacity threshold. The low power reference voltage causes a regulated voltage adjustment such that the switching power supply operates more efficiently below the minimum power threshold.
US07888915B2 System for detecting generator winding faults
A system includes an induction generator controller configured to operate an induction generator via a converter. The induction generator controller includes a diagnostic mode configured to instruct the converter to send an input signal to a rotor of the induction generator, receive an output signal from the rotor and a stator of the induction generator, and identify winding faults within the rotor and/or the stator based on the output signals.
US07888914B2 Battery rejuvenation method and apparatus
The present invention provides a battery rejuvenation method for rejuvenating a battery, which firstly pre-charges the battery for a short period of time and judges the battery condition by comparing the battery voltage to a preset reference voltage value, and then alternately performs an equalizing mode operation and a reconditioning operation to rejuvenate the battery until the battery voltage is not higher than the reference voltage value. The operations in equalizing mode and reconditioning mode could enhance the rejuvenating results by each other, which is not only dissolve the lead sulphate crystal, but also bring the electrolyte fluid to a well-distributed and fully-restored state. The present invention also provides a battery rejuvenation apparatus for rejuvenating a battery.
US07888912B2 Battery SOC estimation program, wireless transit system, and method of charging the battery
Occurrence of overcharging and over discharging of batteries mounted on vehicles that travel on tracks in a wireless transit system is prevented by estimating a state of charge (SOC) of the batteries with accuracy. An equivalent circuit of the battery is composed of three circuit elements connected in series, including (i) a first component resistance R1 (ii) a component circuit which includes a capacitance C and a second component resistance R2 connected in parallel and (iii) an open circuit voltage of the battery. The open circuit voltage of the equivalent circuit is calculated using R1 calculated from measurements of current and voltage of the battery, as well as values k=R2/R1 and τ=C×R2. The SOC if the battery is calculated from the open circuit voltage.
US07888911B2 Method and system for determining the SOC of a rechargeable battery
A method of determining the state of charge (SOC) of a rechargeable battery, the method comprising charging the battery using a substantially constant charge current; measuring the battery temperature; and conducting a first measurement of the battery voltage at a time interval, t1, from the start of the charging, and a second measurement of the battery voltage at a time interval, t2, from the first measurement.
US07888909B2 Convenient recharging of a charge storage device
The convenient recharging of a charge storage device is disclosed. In one embodiment, a system comprises a portable device accessory with a charge storage device holding mechanism and a recharging circuit. The system also comprises a portable device with an interface at which the portable device and the portable device accessory are connectable. A charge storage device-switching mechanism is disposed within the portable device accessory or the portable device. The charge storage device-switching mechanism is actuatable to switch a first charge storage device in the portable device with a second charge storage device in the charge storage device holding mechanism of the portable device accessory by mechanically connecting and/or disconnecting the portable device from the portable device accessory.
US07888906B2 Power unit for a fuel cell power and management system
There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a portable fuel cell power and management system (for example, hydrogen and/or methanol based systems), components and/or elements thereof, as well as techniques for controlling and/or operating such systems. The fuel cell power management system (and method of controlling and/or operating same) actively monitors, manages and/or controls one or more operating parameter(s) of the fuel cell system. For example, the system monitors, manages and/or controls the consumption and/or the rate of consumption of fuel by the system, and in response thereto, may provide and/or alert the user to amount of fuel remaining, consumed, the rate of consumption and/or the time (or estimation thereof) remaining until all of the fuel is spent. In this way, the user may schedule or plan accordingly.
US07888904B2 Virtual moving air gap for an axial flux permanent magnet motor with dual stators
An axial flux electric motor comprising a rotor and a first and second stator. The first and second stators have a first and second air gap located between the first and second stators and the rotor, respectively, and the second air gap is greater than the first gap. In one embodiment, the coils of the first stator and the coils of the second stator are in parallel. The motor further comprises switches which alternatingly energize the coils of the first stator and of the second stator based upon required torque and required speed of the motor. In a second embodiment, the coils of the first stator and the coils of the second stator are in series and the motor further comprises switches which selectively bypass the coils of the second stator in order to reduce the back EMF of the motor and increase the maximum speed of the motor at a given input voltage.
US07888901B2 Active human-machine interface system including an electrically controllable damper
An active human-machine interface system includes a user interface, one or more motors, one or more motor controllers, one or more electrically controllable dampers, and one or more damper controllers. The motors are coupled to the user interface and are configured, upon being energized, to supply a haptic feedback force to the user interface. The motor controllers are coupled to, and configured to selectively energize, the motors. The electrically controllable dampers are coupled to the user interface and are configured, upon being energized, to supply a damping force to the user interface. The damper controllers are in operable communication with the motor controllers and are coupled to, and configured to selectively energize, the electrically controllable dampers.
US07888899B2 Substrate splitting apparatus and a method for splitting a substrate
A substrate splitting apparatus and a method for splitting a substrate using the substrate splitting apparatus are provided. The substrate splitting apparatus includes a servo motor, a transmission device, a substrate breaking bar, and a stage. One end of the transmission is directly or indirectly coupled to the servo motor while the other end is coupled with the breaking bar. The stage has a load-lock surface and the load-lock surface faces the breaking bar. The servo motor drives the transmission device to move the breaking bar toward the load-lock surface. A substrate with a pre-crack on the bottom is disposed on the load-lock surface. The servo motor drives the substrate breaking bar to move towards or away from the pre-crack. The method of splitting includes the following steps: forming a pre-crack on the substrate; controlling the servo motor to drive the breaking bar to move towards the substrate; and controlling the breaking bar to press the substrate at the pre-crack.
US07888898B2 Container with automated lid feature
Embodiment of the invention relate to a container. In one respect, embodiments of the invention provide a container that is useful in advertising because of its distinctive shape and faux pull ring, and/or because it is configured to output a jingle or other stored audio. Moreover, in embodiments of the invention, the container is configured as a cooler with a thermal insulator. Such a cooler may also include an automatic lid mechanism that allows for hands-free operation by users that seek to retrieve, for instance, a cold beverage from the cooler.
US07888892B2 Mobile electronic apparatus having a rechargeable storage device
A mobile electronic apparatus includes a storage device for storing electrical energy and a rotating mechanism configured to energize the apparatus. The rotating mechanism includes a motor, a shaft connected to the motor, and a mass eccentrically attached to the shaft, where the motor is configured to rotate the shaft and the mass to cause the mobile electronic apparatus to vibrate when activated, where motion of the mobile electronic apparatus is configured to cause the mass and the shaft to rotate with respect to the motor, and where rotation of the shaft with respect to the motor is converted into electrical energy. The apparatus also includes circuitry for harvesting the electrical energy and for recharging the storage device with the harvested electrical energy.
US07888891B2 Particle beam accelerator
A particle beam generator has a vacuum chamber, a magnet which generates a constant magnetic field in the vacuum chamber, acceleration electrodes which generates a magnetic field in a direction perpendicular to the direction of the magnetic field generated by the magnet in the vacuum chamber, a take-out electrode which takes out charged particles accelerated in the vacuum chamber; and a target cell provided at a position at which the charged particles taken out by the taken-out electrode strikes. At least a part of surfaces exposed to the charged particles of the vacuum chamber, the acceleration electrodes, the take-out electrode and/or the target cell is made of a material including an element having atomic number larger than copper.
US07888890B2 Method for controlling an electrical light source by pulse width modulation
A method for controlling electrical light sources, in particular, light-emitting diodes (LEDs) by pulse width modulation of a supply voltage is disclosed, whereby the supply voltage or a parameter dependent thereon, for example the current or the electrical power, is measured and the pulse width is controlled as a function thereof. According to the invention, for the light source a characteristic curve for the brightness is generated as a function of the supply voltage or the parameter dependent thereon and, from the measured supply voltage or the parameter dependent thereon, an actual brightness value is determined with the characteristic curve and is compared with a given brightness value and the pulse width controlled as a function thereof.
US07888885B2 Control circuit of a driving circuit for regulating the switching frequency of a discharge lamp
A control circuit controls a driving circuit of a discharge lamp. The driving circuit comprises a half bridge and a clock generator that determines the switching frequency of the half bridge. The control circuit comprises a regulator that regulates the value of the switching frequency when the value of the voltage across the lamp exceeds a threshold value.
US07888882B2 LED lamp and driving apparatus for the same
An LED lamp including at least one LED is electrically connected to a utility input voltage. A driving apparatus located inside a lamp holder of the LED lamp includes an input rectifying/filtering unit to accept the utility input voltage; an isolated power inverter electrically connected to the input rectifying/filtering unit to generate an a buck A.C.; an output rectifying/filtering unit electrically connected to the isolated power inverter to generate an output D.C. voltage to drive the at least one LED. The components of the driving apparatus could be located inside the LED lamp, and the components can provide an isolation protection against the utility input voltage. The driving apparatus can more precisely control output D.C. voltage, current, and power as output D.C. voltage and current signals sent from the output rectifying/filtering unit are feedbacked to a photo coupler signal feedback unit.
US07888881B2 Pulsed current averaging controller with amplitude modulation and time division multiplexing for arrays of independent pluralities of light emitting diodes
Exemplary embodiments provide a system, method and apparatus for regulating current in loads, such as in an array of independent pluralities of light emitting diodes (“LEDs”). An exemplary system comprises a multiplexer adapted to switch current to each independent string of LEDs; a first controller to maintain a substantially constant average current level to the plurality of LEDs; and a second controller to modulate a current amplitude and duration of time division multiplexing for each independent string of LEDs. Another aspect of the system provides for modulating the on time for switching current to maintain a substantially constant average current level and to respond and converge quickly to changing current reference levels.
US07888877B2 Light emitting diode lamp and illumination system
A light emitting diode (LED) lamp electrically connected to a switch is provided. The LED lamp includes a lamp body, an LED array disposed inside the lamp body, and a current control circuit disposed inside the lamp body. The current control circuit is electrically connected between the LED array and the switch. The current control circuit is capable of outputting various driving currents to the LED array according to the number of flashing times of the switch, so as to modulate the intensity of light emitted from the LED array. Since the above-mentioned LED lamp has the built-in current control circuit, users are capable of modulating the intensity of light emitted from the above-mentioned LED lamp by flashing the switch.
US07888875B2 Lighting device such as a LED reading light
A lighting device of the type used as reading light in a vehicle. The lighting device comprises a single light-emitting diode and internal supply means adapted to generate a current to the single light-emitting diode. The internal supply means are connectable to an external power network. The device has an optical unit to recenter and focus the luminous flux emitted by the single light-emitting diode.
US07888873B2 Dynamic depressed collector
A biasing system for use with a multi-stage depressed collector of a high power amplifier includes one or more adjustable power sources. A power controller provides control signals to the power sources depending on the operational RF power level. For low power applications, biasing of collector electrodes is reduced such that savings in energy costs are realized, and operational temperature and wear are reduced. The control signals are based on values stored in a look-up table. For multiple depressed electrodes, biasing can be controlled in tandem or independently.
US07888872B2 Electric lamp
An electric lamp includes a quartz-glass envelope having at least one sealed end, a thin foil including molybdenum at least partly embedded within said sealed end, a first current conductor connected to the foil extending interiorly of the envelope, and a second current conductor connected to the foil and extending exteriorly of the envelope. The re-crystallized foil exhibits a yield strength (offset=0.2%) according to ASTM F 8M-91 below 300 MPa. This can be obtained by molybdenum doped with between 0.01 and 5 wt % of rhenium or 0.01 and 2 wt % of tungsten.
US07888871B2 Compact fluorescent lamp
Compact fluorescent lamp having a known base (1), a central hollow column (2), attached to the base (1), and the outer surface of which has a heat- and light-reflecting coating; a cap (3) closing the hollow column (2); and one or more light-radiating members (4) secured to the cap (3) and/or to the hollow column (2). The light-radiating members (4) start from the hollow column (2) and connect to electronic and electric elements and pass through the holes (3b) of the hollow column and/or the cap (3). The lamp further comprises a guide-ring (11) to support the light-radiating members (4) extending until or beyond the meeting boundary edge of the base (1) and the hollow column (2). The hollow column (2), the base (1), the cap (3) and the guide ring (11) are encompassed with the light-radiating members (4) extending in at least a direction parallel with the longitudinal axis of the lamp towards the base (1) and back and the light-radiating members (4) have curved sections (4a). The lamp is retrofit with conventional bulb sockets.
US07888869B2 Light emitting device
A light emitting device, comprises a light emitting element, a plurality of electroconductive layers on which said light emitting element is mounted or which are electrically connected to the light emitting element, and a translucent insulating member that seals the light emitting element and has the electroconductive layers as its bottom surface, wherein the electroconductive layers have a protrusion on part of their side faces, and the upper edges of the protrusion is rounded off.
US07888864B2 Electroluminescent devices and their manufacture
An EL device comprising a substrate (11), a light emissive structure comprising three series connected LEDs on the substrate (LED 1, 2, 3). Considering the diode LED1, it comprises organic light emissive material disposed (16-1) between an underlying ITO anode (12-1) and an overlying cathode (17-1) that is electrically connected in series to the underlying anode (12-2) of the diode LED2 through the thickness of the organic light emissive material (16-1). The connection can be made by using a wetting agent to prevent the organic light emissive material disposed (16-1) covering contact region (19-1) on the anode (12-2) so that the overlying cathode (17-1) can make a series connection with the underlying anode (12-2).
US07888862B2 Organic electroluminescent display device
In an organic EL display panel, one sealing substrate is shared between two organic EL substrates, thereby achieving thinning and lightening of the panel body. The display panel includes a sealing substrate having a first concave portion and a second concave portion opposite the first concave portion, a first transparent glass substrate hermetically sealed on the first concave portion, a first organic light emitting element formed on a surface of the first transparent glass substrate, a first desiccant disposed on a bottom surface of the first concave portion, a second transparent glass substrate hermetically sealed on the second concave portion, a second organic light emitting element formed on a surface of the second transparent glass substrate, a second desiccant disposed on a surface of the second concave portion, wherein the first organic light emitting element and the second organic light emitting element achieve a shared use of the sealing substrate.
US07888860B2 Organic light emitting device
An organic light emitting device includes a plurality of colored pixels, and a white pixel, wherein the respective pixels include; a first electrode, a second electrode which faces the first electrode, and a light emitting member disposed between the first electrode and the second electrode, and the white pixel further includes; a first semi-transparent member disposed on the first electrode to form a microcavity with the second electrode.
US07888859B2 Organic electroluminescence element, display device and lighting device
In an organic electroluminescence element which incorporates a substrate having thereon an anode and a cathode and which incorporates a plurality of organic layers between the aforesaid anode and cathode, wherein at least one of the aforesaid organic layers is a first organic layer incorporating a compound having at most 10 repeating units, the first organic layer being prepared by coating the compound having at least one polymerizable group, followed by polymerization.
US07888856B2 Organic electroluminescence device and display apparatus containing the same, method for making organic electroluminescence device and method for making display apparatus
An organic electroluminescence device includes a light reflection film 12 which is formed on an insulating substrate 10; an anode electrode 16 which has a transparent conductive film 14 which is formed on the light reflection film 12 so as to cover the light reflection film 12; an organic electroluminescence layer 18 which is formed on the anode electrode 16; and a cathode electrode 20 which is formed on the organic electroluminescence layer 18 and has light transmittance. Thereby, a high luminous efficiency can be realized without involving degradation of the device characteristics.
US07888855B2 Mixed semiconductor nanocrystal compositions
Composition comprising one or more energy donors and one or more energy acceptors, wherein energy is transferred from the energy donor to the energy acceptor and wherein: the energy acceptor is a colloidal nanocrystal having a lower band gap energy than the energy donor; the energy donor and the energy acceptor are separated by a distance of 40 nm or less; wherein the average peak absorption energy of the acceptor is at least 20 meV greater than the average peak emission energy of the energy donor; and wherein the ratio of the number of energy donors to the number of energy acceptors is from about 2:1 to about 1000:1.
US07888847B2 Apodizing ultrasonic lens
An improved acoustic lens and an improved ultrasonic transducer system comprising an improved acoustic lens and related methods are provided. The improved acoustic lens may have a uniform loss along an elevation axis or may have a loss along the elevation axis that provides for an apodization of an acoustic signal. The improved acoustic lens may be a multi-component lens. In a two-component lens embodiment, the inner lens component, for interfacing with a transducer, may have a concave outer surface and the outer lens component may have a flat or convex outer surface. In a three-component lens embodiment, the inner lens component, for interfacing with a transducer, may have a concave outer surface, the middle lens component may have a concave outer surface and the outer lens component may have a flat or convex outer surface.
US07888836B2 DC motor with improved wiring connections
A direct current motor including a rotor, a stator, a brush holder, and a brush. The rotor includes a core, a plurality of commutator segments, and a plurality of segment coils. The core has a plurality of teeth arranged along a circumferential direction of the rotor. A slot is formed between adjacent ones of the teeth in the circumferential direction. The plurality of commutator segments are arranged along the circumferential direction of the rotor inward from the plurality of teeth in the radial direction of the rotor. Each segment coil includes a plurality of segment conductors electrically connected to each other. The plurality of segment conductors in each segment coil extends through the slots along the axial direction of the rotor.
US07888835B2 Rotating shaft and motor rotor having the same
A rotating shaft disclosed by the present invention includes a plurality of bumps spacedly formed along an outer circumferential surface thereof. The bumps are each formed with two engagement portions extending outwardly and bilaterally and a deformation space therebetween. The engagement portions undergo resilient deformation toward the deformation space when subjected to a force, thus providing stable engagement with a magnetic body, protecting the magnetic body from cracks and damages during assembling, and enhancing yield. The present invention further discloses a motor rotor having the above-described rotating shaft.
US07888830B2 Dynamo apparatus for boat
A casing (31) is provided around a power transmission shaft (3a) interposed between a crankshaft (2a) of an engine (2) and a power transmission device (3). A dynamo apparatus (10) and a cooling fan (23) cooling the dynamo apparatus are constructed in the casing (31) around the power transmission shaft (3a) and are driven by the power transmission shaft (3a). The casing (31) is cylindrical and comprises a connection surface at a side of the engine (2), a connection surface at a side of the power transmission device (3) and an outer peripheral surface between the connection surfaces. Intake holes (3d) are formed in the connection surface (3e) of the casing (31) at the side of the power transmission device and the intake hole is formed at an inner peripheral side of a blade of the fan, and are arranged on a circle centering on the axial direction of the connection surface (3e) at an inner peripheral side of blades (23a) of the fan (23). An exhaust hole (21b) is formed in a portion (21a) of the casing (31) at the side of the engine.
US07888829B2 Vehicle AC generator
The vehicle AC generator includes a frame including an end wall section and a peripheral wall section, a stator core, a stator coil having rear and front coil ends projecting axially rearward and frontward respectively from the stator core, a rotor supported by the frame, and a cooling fan having centrifugal blades and fixed to the rotor. The peripheral wall section has a cooling air discharge opening adjoining the end wall section. The end wall section has a centrifugal-blade-facing portion axially facing the centrifugal blades, and a coil-end-facing portion axially facing the rear coil end. The coil-end-facing portion is bent at a predetermined curvature radius and extending from the centrifugal-blade-facing portion to the cooling air discharge opening. The inner end surface of the coil-end-facing portion is formed with a recess located axially rearwardly of a radial extension line of an inner end surface of the centrifugal-blade-facing portion.
US07888827B2 Linear synchronous motor and linear motor actuator
Provided is a linear synchronous motor in which, when a three-phase alternating current passes through a coil of a mover, thrust forces generated by the alternating currents of each phase are equalized, thereby making it possible to minimize variation in thrust force, the linear synchronous motor including: a stator magnet (4) in which N poles and S poles are alternately arranged linearly; and a mover (5) which is opposed to the stator magnet (4) at an interval therefrom, and which generates a shifting magnetic field along with passage of a three-phase alternating current, for applying a thrust force to the stator magnet (4), in which: the mover (5) includes a core member (50) in which teeth (52), the number of which is a whole-number multiple of a number of phases of the alternating currents, are arranged, and a coil (51) which is wound around the teeth (52) and through which the alternating current of any one of the phases passes; and of the plurality of teeth (52) provided to the core member (50), the teeth (52) corresponding to a u phase and a w phase of the alternating currents passing through the coil (51) wound around the teeth (52) at both ends of the core member (50) have distal ends protruding toward the stator magnet (4) further than distal ends of the residual teeth (52).
US07888823B2 Remotely controllable switch for incorporating in a wall socket
The invention relates to a remotely controllable switch unit for switching the mains inside an electrical installation, wherein the switch unit comprises an electrically controllable switch, a control circuit for controlling the switch, a receiver coupled to the control circuit for receiving wireless signals, wherein the switch unit is adapted for mounting in a housing of a wall socket. As a result of these measures it is no longer necessary to place a separate unit between the wall socket and the plug for connecting thereto. The appearance of an electrical installation is hereby improved. Relative to the “bus” system and similar devices, the advantage results that arranging of such a switch unit can take place in particularly simple manner; no changes need after all be made to the wiring of the electrical installation.
US07888821B2 Apparatus and method for powering load center circuits with an auxiliary power source
An electrical distribution system is designed to automatically connect a dedicated group of circuits, which are normally powered by a primary power source, to an auxiliary power source upon detection that there has been a disruption or failure in the primary power source. The system includes a switching arrangement that allows an operator to manually connect the auxiliary power source with other circuits that are not generally powered during disruption of the primary power source. The switching arrangement includes an interlinked switch or breaker arrangement that prevents any of the other circuits that are normally powered by the primary source from being automatically connected to the primary power source when primary power source is restored if those other circuits are connected to the auxiliary power source when the primary power source is restored.
US07888820B2 Delocalized intrastructure power grid and devices
The present invention relates to a delocalized power generation system with computer controls and storage optimization capacity. A plurality of power generating systems is linked to a building along with a plurality of electrical storage means. By selectively charging and discharging the storage means and by selectively picking which electrical generating means one uses, the generation of power to the structure is maximized.
US07888819B2 Multi-input power converter and uninterruptible power supply having the same
An uninterruptible power supply has first and second input terminals, first and second inductors, first and second AC switch units, first and second storing devices and a control unit. The first and the second inductors are electrically connected to the first and the second input terminals. The first and the second AC switch units are electrically connected to the first and the second inductors for conducting input currents. The control unit is electrically connected to the first and the second AC switch units which may be turned on and off thereby to control the first and the second inductors which charge the input currents and discharge the input currents to the first and the second storing devices.
US07888811B2 Power supply system, vehicle with the same, temperature rise control method of power storage device and computer-readable recording medium bearing program for executing computer to perform temperature rise control of power supply device
A converter ECU controls a converter to transmit an electric power between a power storage device and a power storage unit through a main positive bus line and a main negative bus line during temperature rise control of the power storage device. Specifically, converter ECU sets a target voltage of the converter to a second voltage value lower than a first voltage value when a voltage value reaches the first voltage value, and sets the target voltage of the converter to the first voltage value when the voltage value reaches the second voltage value.
US07888810B2 Wind turbine generator system
The wind turbine generator system utilizes environmental wind to produce electricity through wind-driven rotation of a turbine generator. The system includes a housing having upper and lower portions and a main open cover mounted thereon. The main open cover is configured to direct wind through an opening formed through the upper portion and into an interior thereof. A main turbine is rotatably mounted within the upper portion, with the environmental wind directed by the main open cover driving rotation thereof. The main turbine has a central aperture formed therethrough, with rotation of the main turbine driving air flow downwardly therethrough. A secondary turbine is rotatably mounted in the lower portion of the housing, with the secondary turbine being driven to rotate by the downwardly driven air generated by the main turbine. The secondary turbine partially drives rotation of the main turbine. An electrical generator is linked to the main turbine.
US07888809B2 Semiconductor device and method of manufacturing the same
A semiconductor device including a substrate, a semiconductor chip mounted on the substrate, and an encapsulation resin encapsulating the semiconductor chip, wherein the encapsulation resin contains a first resin region composed of a first resin composition, a second resin region composed of a second resin composition, and a mixed layer formed between the first resin region and the second resin region so as to have the first resin composition and the second resin composition mixed therein is provided.
US07888806B2 Electrical connections for multichip modules
A semiconductor package includes a first semiconductor chip mounted on a substrate and a second semiconductor chip mounted on top of the first semiconductor chip. The first chip includes a plurality of metal lines which may be deposited at its top surface, and the metal lines are isolated from circuitry in the first chip. Wire bonds connect pads on the second chip to metal lines on the first chip. Additional wired bonds connect the metal lines on the first chip to terminals on the substrate. Conductive through-silicon vias or solder bumps may replace the wire bonds, and additional chips may be included in the package.
US07888800B2 Dummy metal fill shapes for improved reliability of hybrid oxide/low-k dielectrics
A semiconductor structure including a first rigid dielectric layer and a second rigid dielectric layer. A first non-rigid low-k dielectric layer is formed between the first and second rigid dielectric layer. A plurality of dummy fill shapes is formed in the first non-rigid layer which replace portions of the first non-rigid low-k dielectric layer with lower coefficient of thermal expansion (CTE) metal such that an overall CTE of the first non-rigid low-k dielectric layer and the plurality of dummy fill shapes matches a CTE of the first and second rigid dielectric layers more closely than that of the first non-rigid low-k dielectric layer alone.
US07888799B2 Semiconductor device, circuit substrate, electro-optic device and electronic appliance
A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.
US07888797B2 High frequency package device with internal space having a resonant frequency offset from frequency used
A lid forms an internal space on a bottom plate together with a plurality of side walls. A dielectric plate on the bottom plate in the internal space has a smaller width than an inner surface of the lid. A projection on the inner surface of the lid has a surface area, where a distance between the projection and the bottom plate where the projection is provided is shorter than a distance between the lid and the bottom plate where the projection is not provided. The lid and the projection are coupled to pass a current therebetween. The inner surface of the lid extends further toward an inner surface of one of the side walls than does the projection. The bottom plate, the side walls, the lid, and the projection are composed of metal material. The lid and the projection are composed of the same metal material.
US07888796B2 Controller chip mounted on a memory chip with re-wiring lines
A semiconductor device with semiconductor chips stacked thereon is provided. The semiconductor device is reduced in size and thickness. In a first memory chip and a second memory chip, first pads of the first memory chip located at a lower stage and hidden by the second memory chip located at an upper stage are drawn out by re-wiring lines, whereby the first pads projected and exposed from the overlying second memory chip and second pads of the second memory chip can be coupled together through wires. Further, a microcomputer chip and third pads formed on re-wiring lines are coupled together through wires over the second memory chip, whereby wire coupling of the stacked memory chips can be done without intervention of a spacer.
US07888793B2 Device package and methods for the fabrication and testing thereof
Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
US07888791B2 Device for electrical connection of an integrated circuit chip
A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
US07888782B2 Apparatus and method configured to lower thermal stresses
An apparatus and a method configured to lower thermal stress is disclosed. One embodiment provides a semiconductor chip, a lead frame and a layer structure. The layer structure includes at least a diffusion solder layer and a buffer layer. The layer structure is arranged between the semiconductor chip and the lead frame. The buffer layer includes a material, which is soft in comparison to a material of the diffusion solder layer, and includes a layer thickness such that thermal stresses in the semiconductor chip remain below a predetermined value during temperature fluctuations within a temperature range.
US07888777B2 Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, a circuit region on the semiconductor substrate, a plurality of metal wires formed in the circuit region on the semiconductor device and a seal ring region surrounding the circuit region. A distance L between an outer periphery of the circuit region and an inner periphery of the seal ring region and a minimum interval Wmin in mutual intervals of the metal wires have a relationship of “1≦(L/Wmin)≦3”.
US07888774B2 Interconnect line selectively isolated from an underlying contact plug
A means for selectively electrically connecting an electrical interconnect line, such as a bit line of a memory cell, with an associated contact stud and electrically isolating the interconnect line from other partially underlying contact studs for other electrical features, such as capacitor bottom electrodes. The interconnect line can be formed partially-connected to all contact studs, thereby allowing the electrical features to be formed in closer proximity to one another for higher levels of integration, and in subsequent steps of fabrication, the contact studs associated with memory cell features other than the interconnect line can be isolated from the interconnect line by the removal of a silicide cap, or the selective etching of a portion of these contact studs, and the formation of an insulating sidewall between the non-selected contact stud and the interconnect line.
US07888771B1 E-fuse with scalable filament link
An electronic fuse (“E-fuse”) has a silicide filament link extending along a gap between polysilicon structures formed on a silicon substrate. The silicide filament link extends across diffusions formed in the gap. A P-N junction between terminals of the E-fuse provides high resistivity after programming (fusing) the silicide filament link.
US07888767B2 Structures of high-voltage MOS devices with improved electrical performance
A semiconductor structure includes a first high-voltage well (HVW) region of a first conductivity type overlying a substrate, a second HVW region of a second conductivity type opposite the first conductivity type overlying the substrate and laterally adjoining the first HVW region, and a third HVW region of the second conductivity type underlying the second HVW region. A region underlying the first HVW region is substantially free from the third HVW region, wherein the third HVW region has a bottom lower than a bottom of the first HVW region. The semiconductor structure further includes an insulation region in a portion and extending from a top surface of the first HVW region into the first HVW region, a gate dielectric extending from over the first HVW region to over the second HVW region wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric.
US07888764B2 Three-dimensional integrated circuit structure
A semiconductor structure includes an interconnect region and a semiconductor stack bonded to the interconnect region through a bonding region. The stack includes at least two semiconductor layers having different electrical properties. The stack also includes single crystalline semiconductor material. The stack can be processed to form a mesa structure and the mesa structure can be processed to from a vertically oriented semiconductor device.
US07888762B2 Infrared detector and fabricating method of infrared detector
There is provided an infrared detector including: a silicon substrate provided with a concave portion; an infrared receiver having a polysilicon layer; and a beam that supports the infrared receiver above the concave portion, and extends along a side of the infrared receiver from the infrared receiver to connect with the silicon substrate, the beam having at least two bent portions, wherein at least one of the bent portions of the beam is disposed at a position on a side opposite to the concave portion with the polysilicon layer as a reference point.
US07888760B2 Solid state imaging device and method for manufacturing same, and solid state imaging module
A solid state imaging device includes: an imaging device substrate with an imaging device section formed on a first major surface side thereof; a backside interconnect electrode provided on a second major surface side of the imaging device substrate and electrically connected to the imaging device section, the second major surface being on the opposite side of the first major surface; a circuit substrate provided with a circuit substrate electrode opposed to the second major surface; a connecting portion electrically connecting the backside interconnect electrode to the circuit substrate electrode; and a light shielding layer provided coplanar with the backside interconnect electrode or on the circuit substrate side of the backside interconnect electrode.
US07888754B2 MEMS transducer
An MEMS transducer is constituted of a diaphragm, a plate, a support structure for supporting the diaphragm and the plate with a gap layer surrounded by an interior wall, an electrode film (e.g. a pad conductive film) for covering a contact hole formed in the support structure, and a protective film (e.g. a pad protective film) which is formed on the support structure externally of the interior wall so as to cover the side surface of the electrode film having low chemical stability. The protective film is formed in the limited area including a part of the surface of the electrode film except for its center portion and the surrounding area of the electrode film. This allows the protective film to use materials having high membrane stress such as silicon nitride or silicon nitride oxide.
US07888751B2 Semiconductor device having a fin field effect transistor
A semiconductor device includes a fin field effect transistor configured to include at least a first fin and a second fin. Threshold voltage of the first fin and threshold voltage of the second fin are different from each other in the fin field effect transistor.
US07888750B2 Multi-fin multi-gate field effect transistor with tailored drive current
Disclosed are embodiments of an improved multi-gated field effect transistor (MUGFET) structure and method of forming the MUGFET structure so that it exhibits a more tailored drive current. Specifically, the MUGFET incorporates multiple semiconductor fins in order to increase effective channel width of the device and, thereby, to increase the drive current of the device. Additionally, the MUGFET incorporates a gate structure having different sections with different physical dimensions relative to the semiconductor fins in order to more finely tune device drive current (i.e., to achieve a specific drive current). Optionally, the MUGFET also incorporates semiconductor fins with differing widths in order to minimize leakage current caused by increases in drive current.
US07888744B2 Strained semiconductor, devices and systems and methods of formation
In various method embodiments, a device region is defined in a semiconductor substrate and isolation regions are defined adjacent to the device region. The device region has a channel region, and the isolation regions have volumes. The volumes of the isolation regions are adjusted to provide the channel region with a desired strain. In various embodiments, adjusting the volumes of the isolation regions includes transforming the isolation regions from a crystalline region to an amorphous region to expand the volumes of the isolation regions and provide the channel region with a desired compressive strain. In various embodiments, adjusting the volumes of the isolation regions includes transforming the isolation regions from an amorphous region to a crystalline region to contract the volumes of the isolation regions to provide the channel region with a desired tensile strain. Other aspects and embodiments are provided herein.
US07888741B2 Structures with improved interfacial strength of SiCOH dielectrics and method for preparing the same
A semiconductor device structure and method for manufacture includes a substrate having a top first layer; a second thin transition layer located on top of the first layer; and, a third layer located on top of the transition layer, wherein the second thin transition layer provides strong adhesion and cohesive strength between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective transition bonding layers disposed to enhance interfacial strength among the different layers. Further, an electronic device structure incorporates layers of insulating and conductive materials as intralevel or interlevel dielectrics in a back-end-of-the-line (“BEOL”) wiring structure in which the interfacial strength between different pairs of dielectric films is enhanced by a thin intermediate transition bonding layer.
US07888740B2 Semiconductor device and method of manufacturing the same
The semiconductor device includes a first MIS transistor including a gate insulating film 92, a gate electrode 108 formed on the gate insulating film 92 and source/drain regions 154, a second MIS transistor including a gate insulating film 96 thicker than the gate insulating film 92, a gate electrode 108 formed on the gate insulating film 96, source/drain regions 154 and a ballast resistor 120 connected to one of the source/drain regions 154, a salicide block insulating film 146 formed on the ballast resistor 120 with an insulating film 92 thinner than the gate insulating film 96 interposed therebetween, and a silicide film 156 formed on the source/drain regions 154.
US07888739B2 Electrostatic discharge circuit and method of dissipating an electrostatic current
An electrostatic discharge circuit between a first pad and a second pad including an electrostatic discharge circuit element, including a bipolar transistor path and a resistor path, the electrostatic discharge circuit element alternately discharging an electrostatic current through the bipolar transistor path and the resistor path.
US07888738B2 Method of forming a guard ring or contact to an SOI substrate
Embodiments of the present invention provide a microelectronic structure including a conductive element contacting a bulk semiconductor region of a substrate, the bulk semiconductor region being separated from a semiconductor-on-insulator (“SOI”) layer of the substrate by a buried dielectric layer. The microelectronic structure includes a trench isolation region overlying the buried dielectric layer, the trench isolation region sharing an edge with the SOI layer; a conformal layer overlying the trench isolation region, the conformal layer having a top surface and an opening defining a wall extending from the top surface towards the trench isolation region, the top surface including a lip portion adjacent to the wall; a dielectric layer overlying the top surface of the conformal layer; and a conductive element in conductive communication with the bulk semiconductor region, the conductive element consisting essentially of at least one of a semiconductor, a metal, and a conductive compound of a metal, and extending through the dielectric layer, the opening in the conformal layer, the trench isolation region, and the buried dielectric layer, and the conductive element contacting the lip portion.
US07888730B2 Nonvolatile semiconductor memory
A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
US07888724B2 Capacitors for semiconductor memory devices
A capacitor of a semiconductor memory device, and methods of forming the same, are disclosed. A pad interlayer insulating layer is disposed on a semiconductor substrate of an active region. Landing pads and a central landing pad are disposed in peripheral portions and a central portion of the active region, respectively, to penetrate the pad interlayer insulating layer. The upper surface of the central landing pad has a different area from the upper surfaces of the landing pads. A buried interlayer insulating layer is formed on the pad interlayer insulating layer to cover the landing pads and the central landing pad. Buried plugs are formed on the respective landing pads to penetrate the buried interlayer insulating layer. Lower electrodes are formed on the buried plugs.
US07888716B2 Pixel structure of solid-state image sensor
To eliminate uneven distribution of electrons caused by variation in threshold voltages of gates for distributing electrons and to have sensitivity in a long wavelength in a pixel structure of a solid-state image sensor of a charge sorting method, the structure has: a photodiode that generates electrons by photoelectric conversion; a plurality of charge-storage sections that store electrons generated in the photodiode; and a gate structure that is arranged between the photodiode and the charge-storage sections and controls transfer of electrons generated in the photodiode to the plurality of charge-storage sections, in which the gate structure is made up of plural stages of gates, and the plural stages of gates at least have: a front stage gate that is arranged adjacent to the photodiode and controls readout of electrons generated in the photodiode; and a rear stage gate that is arranged adjacent to the plurality of charge-storage sections on the rear stage of the front stage gate and performs control of distributing electrons read out by readout control of the front stage gate to the plurality of charge-storage sections.
US07888711B2 Continuous plane of thin-film materials for a two-terminal cross-point memory
A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper.
US07888708B2 Examination apparatus for biological sample and chemical sample
A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a pMOS transistor is formed and a p type semiconductor layer on which an nMOS transistor is formed are isolated by a pn junction. Therefore, the p type semiconductor layer at the outermost portion (chip edge portion to be in contact with solution) is set to floating, and the maximum potential and the minimum potential of the chip are supplied to an n type semiconductor layer and a p type semiconductor layer inside the outermost portion, respectively. Also, the chip is covered with an ion impermeable insulating film for reducing the penetration of positive ions through the oxide layer.
US07888707B2 Gated diode nonvolatile memory process
A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.
US07888701B2 Integrated circuit arrangement with Shockley diode or thyristor and method for production and use of a thyristor
An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.
US07888695B2 Light emitting device and manufacture method thereof
A manufacture method of a light emitting device is provided. Firstly, at least one circuit board is provided. A plurality of light emitting packages, a first undetermined power input end and a second undetermined power input end are disposed at the circuit board. The light emitting packages are electrically connected to the first undetermined power input end and the second undetermined power input end. Each of the first undetermined power input end and the second undetermined power input end has at least two first pads. The first pads of each of the first undetermined power input end and the second undetermined power input end are electrically isolated from each other. Next, the first undetermined power input end is selected to be a power input region for inputting an external power signal. Then, the first pads of the second undetermined power input end are electrically connected to each other.
US07888691B2 Light source including a wavelength-converted semiconductor light emitting device and a filter
A semiconductor light emitting device comprises a light emitting layer disposed between an n-type region and a p-type region. The light emitting layer is adapted to emit first light having a first peak wavelength. A first wavelength converting material is adapted to absorb the first light and emit second light having a second peak wavelength. A second wavelength converting material is adapted to absorb either the first light or the second light and emit third light having a third peak wavelength. A filter is adapted to reflect fourth light having a fourth peak wavelength. The fourth light is either a portion of the second light or a portion of the third light. The filter is configured to transmit light having a peak wavelength longer or shorter than the fourth peak wavelength. The filter is disposed over the light emitting device in the path of at least a portion of the first, second, and third light.
US07888688B2 Thermal management for LED
A method and system for removing heat from an LED facilitates the fabrication of LEDs having enhanced brightness. A thermally conductive interposer can be attached to the top of the LED. Heat can flow through the top of the LED and into the interposer. The interposer can carry the heat away from the LED. Light can exit the LED though an at least partially transparent substrate of the LED. By removing heat from an LED, the use of more current through the LED is facilitated, thus resulting in a brighter LED.
US07888684B2 Light emitting device and method of producing light emitting device with a semiconductor includes one of chalcopyrite and oxychacogenide
There has not been a DC drive type light emitting device capable of providing high brightness. The present invention provides a light emitting device, including: a pair of electrodes; a light emitter placed between the electrodes; and a semiconductor laminated to be adjacent to the light emitter, in which the semiconductor contains one of a chalcopyrite and an oxychalcogenide.
US07888682B2 Thin film transistor and method of manufacturing the same
A thin film transistor comprises a substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region; a gate insulating layer disposed on the semiconductor layer and on the substrate; a gate electrode disposed on the insulating layer over the channel region; an passivation layer disposed on the gate electrode and the gate insulating layer; a source electrode disposed in contact with upper, lower and side surfaces of the source region via a first contact hole through passivation layer, the gate insulating layer and the semiconductor layer; and a drain electrode disposed in contact with upper, lower and side surfaces of the drain region via a second contact hole through the passivation layer, the gate insulating layer and the semiconductor layer.
US07888680B2 Semiconductor device
In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process and improve a manufacture yield.
US07888678B2 Thin film array panel and manufacturing method thereof
A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.
US07888675B2 Thin film transistor array panel and fabrication
The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
US07888674B2 Thin-film transistor substrate and method of manufacturing the same
A thin-film transistor substrate includes a gate line, a capacitor dielectric layer, a gate insulation layer, an active pattern, a data line, a protection layer, and a pixel electrode. The gate wiring including a gate electrode, a lower storage electrode, and a gate metal pad is disposed on a substrate. The capacitor dielectric layer is disposed on the lower storage electrode and the gate insulation layer is disposed on the substrate. The active pattern includes an active layer and a dummy active layer disposed on the gate insulation layer in a gate electrode region and a gate metal pad region, respectively. A portion of the upper storage electrode is disposed on the capacitor dielectric layer exposed through a first contact hole in the gate insulation layer.
US07888672B2 Device for detecting stress migration properties
A device and method are provided for detecting stress migration properties of a semiconductor module mounted in a housing. A stress migration test (SMT) structure is formed in the semiconductor module. An integrated heating (IH) device is formed within or in direct proximity to the SMT structure. The SMT structure includes a first interconnect region in a first interconnect layer, a second interconnect region in a second interconnect layer, and a connecting region electrically connecting the interconnect regions through a first insulating layer. The IH device includes a heating interconnect region through which a heating current flows. The heating interconnect region is within or outside the first or second interconnect region or connecting region. When the heating current is applied, a measurement voltage is applied to the SMT structure, and a current through the SMT structure is measured to detect stress migration properties of the semiconductor module.
US07888670B2 Nitride semiconductor light emitting device
There is provided a nitride semiconductor light emitting device including: an n-type semiconductor region; an active layer formed on the n-type semiconductor region; a p-type semiconductor region formed on the active layer; an n-electrode disposed in contact with the n-type semiconductor region; a p-electrode formed on the p-type semiconductor region; and at least one intermediate layer formed in at least one of the n-type semiconductor region and the p-type semiconductor region, the intermediate layer disposed above the n-electrode, wherein the intermediate layer is formed of a multi-layer structure where at least three layers with different band gaps from one another are deposited, wherein the multi-layer structure includes one of an AlGaN layer/GaN layer/InGaN layer stack and an InGaN layer/GaN layer/AlGaN layer stack.
US07888668B2 Phase change memory
A phase change memory and the method for manufacturing the same are disclosed. The phase change memory includes a word line, a phase change element, a plurality of heating parts, and a plurality of bit lines. The phase change material layer is electrically connected to the word line and the heating parts. Each heating part is electrically connected to a respective bit line.
US07888661B2 Methods for in situ surface treatment in an ion implantation system
A system and methods are provided for mitigating or removing workpiece surface contaminants or conditions. Methods of the invention provide treatment of the wafer surface to provide a known surface condition. The surface condition can then be maintained during and following implantation of the workpiece surface with a dopant.
US07888658B2 Zirconium dioxide luminescence oxygen sensor
A method of measuring oxygen partial pressure in gases, such as hot engine exhaust gases, uses a calibrated luminescence sensor and comprises the steps of bringing nanocrystalline zirconium dioxide ZrO2 (2) in said sensor into contact with a gas to be measured, illuminating the zirconium dioxide with a UV-VIS light pulse emitted from a light source (3) and adapted to induce luminescence of the zirconium dioxide, registering the time dependence of the luminescence intensity of the ZrO2 using a photodetector (4) and a recorder (5), determining a particular intensity, e.g., the maximum intensity of the registered luminescence pulse, and comparing said determined intensity with calibration data of the luminescence intensity as a function of oxygen partial pressure for the sensor temperature at the time of the measurement.
US07888657B1 Ultraviolet water and object surface disinfection apparatus
An apparatus for alternatively disinfecting an object surface and a liquid comprising a hollow handle base graspable in a human hand, an electrical power source contained within a hollow interior space of the handle base housing for supplying electrical power to an ultraviolet lamp, a lid including a lamp support bulkhead, and an ultraviolet lamp mounted to the lamp support bulkhead. A tubular cover shell is releasably attachable to the lamp support bulkhead. The cover shell has an upper wall which is opaque to ultraviolet radiation and a lower wall which has therein an aperture which is transmissive to ultraviolet radiation. A hinge joint pivotably joins the lamp support bulkhead of the lid to the handle base housing, the hinge joint enabling the lid to be pivoted from a first, compact storage and transport orientation in which the lower wall of the lid cover shell overlies the handle base housing, and the upper wall of the lid cover shell overlies the ultraviolet lamp to a second, use orientation in which the lid is positionable above an object surface to thereby locate the aperture adjacent to the object surface. The cover is alternatively releasably removable to expose the ultraviolet lamp and enable it to be immersed in a liquid to disinfect the liquid. Sensor probes protrude from the bulkhead near the ultraviolet lamp prevent operation of the lamp unless the probes are in contact with a liquid.
US07888656B2 UV sanitizer for tethered and untethered mouthguards
A portable, battery-powered UV sanitizer kills germs and bacteria on the mouthpieces of tethered mouthguards of a wide variety of tether sizes and configurations and on the mouthpieces of untethered mouthguards. It doubles as a protective case when not in antimicrobial use. It includes a dishwasher safe detachable tray. It may be used with other dental appliances.
US07888650B2 Light-emitting material, scintillator containing the light-emitting material, x-ray detector equipped with the scintillator, image display device using the light-emitting material, and light source using the light-emitting material
It is made possible to provide a light-emitting material having a short decay time of 10 μs or less and an emission wavelength of 650 nm or longer. A light-emitting material includes a material having a composition represented by ARS2:Eu, wherein A represents at least one element selected from Na, K, Rb, and Cs, and R represents at least one element selected from Y, La, Gd, and Lu.
US07888649B2 Radiation image capturing system
The present invention relates to a radiation image capturing system. A radiation detector of a radiation detecting cassette detects a radiation that has passed through a patient, and an accumulated exposed radiation dose calculator calculates an accumulated exposed radiation dose by accumulating radiation image information detected by the radiation detector, at every image capturing. The calculated accumulated exposed radiation dose is transmitted, together with cassette ID information, to a console. In the console, a status determining unit compares the accumulated exposed radiation dose with an allowable accumulated exposed radiation dose for the radiation detecting cassette to determine the status of the radiation detecting cassette, and issues a warning based on the determined status.
US07888646B2 System and method for detecting contraband
A technique is provided for detecting whether an object of interest is being carried by a subject. The technique includes coarsely scanning the subject with an electromagnetic radiation, measuring reflective intensity of radiation reflected from the subject, and detecting the presence or absence of the object of interest based upon the measured reflective intensity.
US07888644B2 System and method for wide angle optical surveillance
An imaging system (30, 30′) and corresponding method has a two-dimensional imaging sensor array (32) and an associated optical system. The optical system includes at least one optical arrangement (34, 36a, 36b) defining a field of view (38a, 38b) of given angular dimensions and an optical switching mechanism (40) for alternately switching an optical axis of the imaging system between two directions (42a, 42b). The optical switching mechanism and the optical arrangement(s) are deployed such that the imaging sensor array generates images of at least two generally non-overlapping fields of view of equal angular dimensions and with diverging optical axes in fixed spatial relation. Rapid switching between the fields of view allows quasi-continuous monitoring of a larger field of view than would otherwise be possible while maintaining sensitivity to transient events. Also disclosed is an infrared search and tracking system based on such imaging systems.
US07888641B2 Electron microscope with electron spectrometer
A lens adjustment method and a lens adjustment system which adjust a plurality of multi-pole lenses of an electron spectrometer attached to a transmission electron microscope, optimum conditions of the multi-pole lenses are determined through simulation based on a parameter design method using exciting currents of the multi-pole lenses as parameters.
US07888639B2 Method and apparatus for processing a micro sample
An object of the invention is to realize a method and an apparatus for processing and observing a minute sample which can observe a section of a wafer in horizontal to vertical directions with high resolution, high accuracy and high throughput without splitting any wafer which is a sample. In an apparatus of the invention, there are included a focused ion beam optical system and an electron optical system in one vacuum container, and a minute sample containing a desired area of the sample is separated by forming processing with a charged particle beam, and there are included a manipulator for extracting the separated minute sample, and a manipulator controller for driving the manipulator independently of a wafer sample stage.
US07888637B2 Sample preparation plate for mass spectrometry
Disclosed herein is a sample preparation plate used to prepare a sample for mass spectrometry. In particular, a sample plate used to concentrate a sample as well as remove contaminants from the sample while providing easy manipulation of small liquid droplets on a surface with minimal sample loss.
US07888635B2 Ion funnel ion trap and process
An ion funnel trap is described that includes a inlet portion, a trapping portion, and a outlet portion that couples, in normal operation, with an ion funnel. The ion trap operates efficiently at a pressure of ˜1 Torr and provides for: 1) removal of low mass-to-charge (m/z) ion species, 2) ion accumulation efficiency of up to 80%, 3) charge capacity of ˜10,000,000 elementary charges, 4) ion ejection time of 40 to 200 μs, and 5) optimized variable ion accumulation times. Ion accumulation with low concentration peptide mixtures has shown an increase in analyte signal-to-noise ratios (SNR) of a factor of 30, and a greater than 10-fold improvement in SNR for multiply charged analytes.
US07888634B2 Method of operating a linear ion trap to provide low pressure short time high amplitude excitation
In accordance with an aspect of an embodiment of the present invention, there is provided a method for fragmenting ions in an ion trap of a mass spectrometer. The method comprises a) selecting parent ions for fragmentation; b) retaining the parent ions within the ion trap for a retention time interval, the ion trap having an operating pressure of less than about 1×10−4 Torr; c) providing a RF trapping voltage to the ion trap to provide a Mathieu stability parameter q at an excitement level during an excitement time interval within the retention time interval; d) providing a resonant excitation voltage to the ion trap during the excitement time interval to excite and fragment the parent ions; and, e) within the retention time interval and after the excitement time interval, terminating the resonant excitation voltage and changing the RF trapping voltage applied to the ion trap to reduce the Mathieu stability parameter q to a hold level less than the excitement level to retain fragments of the parent ions within the ion trap.
US07888633B2 Evaluation of spectra in oscillation mass spectrometers
The invention relates to mass spectrometers in which ion clouds are stored in two spatial directions by radial forces while oscillating largely harmonically at a mass-specific frequency in a third spatial direction perpendicular to the other two, in a potential minimum, the shape of which is as close to a parabola as possible. Analysis of the oscillation frequencies of these ion clouds, preferably by a Fourier analysis, leads via a frequency spectrum to a mass spectrum. The frequency spectrum is analyzed to identify false signals in the frequency spectrum as harmonics and eliminating them where necessary.
US07888631B2 Shielded source detection and activity correction system
The method of analyzing the measured radiation spectra to estimate the identified nuclide activities using a designated efficiency calibration based on average expected geometry and using spectral characteristics to flag significant shielding that would otherwise skew said nuclide activities (FIG. 5). And providing an estimation of activity correction factor or attenuation factor for each affected nuclide (200).
US07888627B2 Optical encoder having a stray-light reduction element for reducing strat-light
An optical encoder includes a scale which is installed on one member of which, displacement is detected, and a detecting head which is installed on the other member which moves relatively with respect to the one member, and is disposed facing the scale. A predetermined optical pattern in a direction of relative movement is provided, and the detecting head includes a light emitting section which irradiates a predetermined light on the scale, a light detecting section which includes a light receiving surface which receives light through the optical pattern, which is irradiated on the scale from the light emitting section, and which detects light distribution formed on the light receiving surface, a first light transmitting member which is disposed in an optical path between the light emitting section and the scale, and a second light transmitting member which is disposed in an optical path between the scale and the light detecting section. The optical encoder further includes a stray-light reduction element which is interposed between a surface of the first light transmitting member and a surface of the second light transmitting member, and which reduces stray light which does not contribute to signal detection.
US07888620B2 Reducing coherent crosstalk in dual-beam laser processing system
A method of and system for forming two laser processing beams with controlled stability at a target specimen work surface includes first and second mutually coherent laser beams propagating along separate first and second beam paths that are combined to perform an optical property adjustment. The combined laser beams are separated into third and fourth laser beams propagating along separate beam paths and including respective third and fourth main beam components, and one of the third and fourth laser beams contributes a leakage component that copropagates in mutual temporal coherence with the main beam component of the other of the third and fourth laser beams. An effect of mutual temporal coherence of the leakage component and the other main beam component with which the leakage component copropagates is reduced through acousto-optic modulation frequency shifts or through incorporation of an optical path length difference in the two beams.
US07888615B2 Flat detector and medium detector
A flat detector includes a first flat member and a second flat member both made of a nonmagnetic nonmetal, a first conductive wiring that generates an alternating magnetic field, the first conductive wiring being disposed on a surface of the first flat member facing toward the second flat member, a first layer made of a nonmagnetic metal and disposed at least on a surface of the first flat member, a second conductive wiring that detects a signal generated by magnetization reversal of a magnetic material, the magnetization reversal being caused by the alternating magnetic field generated by the first conductive wiring, the second conductive wiring being disposed on a surface of the second flat member facing toward the first flat member, and a second layer made of a nonmagnetic metal and disposed at least on a surface of the second flat member.
US07888613B2 Flexible light guide for membrane switch
In an embodiment, a membrane switch may include a flexible light guide having a first refractive index. The flexible light guide may include a first wall, an opposing second wall, and one or more additional walls. One or more of the first wall, the second wall and the additional walls may be disposed adjacent to a substance including a second refractive index that is lower than the first refractive index.
US07888606B2 Multilayer printed circuit board
A multilayer printed circuit board has an IC chip included in a core substrate in advance and a mediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole and reliability.
US07888605B2 Multilayer printed circuit board
A multilayer printed circuit board has an IC chip included in a core substrate in advance, and an intermediate layer provided on a pad of the IC chip. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the intermediate layer made of copper on the die pad, it is possible to prevent resin residues on the pad and to improve connection characteristics between the pad and a via hole, and to improve reliability.
US07888600B2 Circuit board and electrical connection box having the same
A circuit board includes a metal core having a plate shape, an insulation section covering a surface of the metal core, and a heat radiation section in which the metal core is exposed and which is provided at a circumference of the metal core.
US07888599B2 Printed circuit board including embedded capacitor and method of fabricating same
Disclosed is a PCB including an embedded capacitor and a method of fabricating the same. The long embedded capacitor is formed through an insulating layer, making a high capacitance and various capacitance designs possible.
US07888598B2 Non-halogen resin composition, insulated electrical wire, and wire harness
The present invention provides a non-halogen resin composition, an insulated electrical wire formed of the non-halogen resin composition, and a wire harness including the insulated electrical wire. The non-halogen resin composition, comprising: (A) 100 parts by weight of a base resin, containing 50 to 75 weight percent of a polypropylene, 20 to 40 weight percent of a propylene-alpha olefin copolymer, and 5 to 10 weight percent of a low density polyethylene; (B) 50 to 100 parts by weight of a metal hydroxide; (C) 3 to 5 parts by weight of a phenolic anti-oxidant; and (D) 0.5 to 2 parts by weight of a hydrazine-containing metal capture agent. The non-halogen resin composition exhibits excellent mechanical properties such as abrasion resistance, flame retardant property, flexibility, and long-term heat resistance, even if it contains inorganic flame retardant therein.
US07888596B2 Sealing structure of electrical junction box
In an upper surface of a bottom wall of a box body having a part accommodation room formed inside, a recess is provided. In the bottom of the recess, a bolt hole to fix an electrical junction box to a vehicle body is penetrated. In the upper surface of the bottom wall of the body hole, a flat sealing surface is formed to surround an opening of the recess. When an electronic unit is accommodated in the part accommodation room, the bottom surface of the electronic unit is brought into close contact with the sealing surface to close the recess, thus providing a seal between the part accommodation room and recess.
US07888594B2 Photovoltaic device including front electrode having titanium oxide inclusive layer with high refractive index
Certain example embodiments of this invention relate to an electrode (e.g., front electrode) for use in a photovoltaic device or the like. In certain example embodiments, a transparent conductive oxide (TCO) of the front electrode for use in a photovoltaic device is of or includes titanium oxide doped with one or more of Nb, Zn and/or Al. Additional layers may also be provided in the front electrode in certain example embodiments. It has been found that the use of transparent conductive TiOx(:Nb) or TiZnOx(:Al and/or Nb), in a front electrode of a photovoltaic device, is advantageous in that such materials have a high refractive index (n) and have a higher transparency than conventional titanium suboxide (TiOx). Thus, the use of such materials in the context of a front electrode of a photovoltaic device reduces light reflection due to the high refractive index, and increases transmission into the active semiconductor film due to the higher transmission characteristics thereof, thereby improving the efficiency of the device.
US07888588B2 Tracking solar collector assembly
A tracking solar collector assembly includes solar collector support structure, with at least one solar collector mounted thereto and first and second spaced apart pivotal support points defining a tilt axis, Southside supports, with first pivot connectors, and North side supports, with a base, a second pivot connector, and one or two support elements connected to the base and to the second pivot connector at the ends thereof. The first and second support points are pivotally connected to and supported by the first pivot connectors and by the North side supports, respectively. The assembly also includes a tilting assembly causing the solar collectors therewith to tilt in unison.
US07888587B2 Modular shade system with solar tracking panels
A modular shade system with solar tracking panels includes a series of generally North-South oriented, spaced apart torque tubes, each torque tube having an axis, a series of panels mounted to at least some of the torque tubes to create spaced-apart rows of panels along the torque tubes, at least some of the panels being solar collector panels. The system also includes a shade structure, positioned at a selected location between selected ones of the torque tubes and above the support surface so to provide an enhanced shaded region thereunder, and a support structure. The support structure includes a first mounting assembly mounting each torque tube above the support surface for rotation about the axis of each torque tube and a second mounting assembly supporting the shade structure at the selected location. The system further comprises a tilting assembly selectively rotating each torque tube about its axis.
US07888583B2 Semiconductor nanowire thermoelectric materials and devices, and processes for producing same
The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic longitudinal modulation, which may be a compositional modulation or a strain-induced modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or “nanomembranes.”
US07888580B2 Electronic musical system and control method for controlling an electronic musical apparatus of the system
An electronic musical system in which tone generator parameters of each of tone generators respectively assigned to tracks of a sequencer of an electronic musical apparatus can easily be controlled by using a musical control apparatus, while tracks are switched. In the setting of the tone generator parameters of the tone generators assigned to the tracks, setting contents are input by using control operating elements of the musical control apparatus. There are prepared in advance templates in each of which control operating elements are made to correspond to tone generator parameters controlled by the control operating elements, and each tone generator is made in one-to-one correspondence with one of the templates, whereby tone generator parameters of a tone generator assigned to a track currently designated by a user are set by manipulating the control operating elements of the musical control apparatus.
US07888576B2 Ensemble system
An ensemble system enabling even performer unskilled in playing a musical instrument to easily grasp the difference in tempo from the performance of the facilitator. The circle corresponding to the performance terminal “Facilitator” is indicated fixedly on the center line of the vertical lines. The circle corresponding to the performance terminal (for example, piano (1)) of each user moves horizontally correspondingly to the difference from the performance terminal “Facilitator”. If the press of a key of performance terminal lags behind that of the performance terminal “Facilitator” by one bar, the circle moves left onto the vertical line next to the vertical center line. If the press of a key of the performance terminal lags behind that of the performance terminal “Facilitator” by half the bar (two beats), the circle moves left by half the interval between the vertical lines from the vertical center line. If the press of a key of the performance terminal leads that of the performance terminal “Facilitator”, the circle moves right (FIG. 7).
US07888575B1 Percussion instrument
An improved drum construction in which sound hindering hardware is removed from the drum shell utilizing a unique tuning system that allows the drum skin to be tuned by rotating a counterhoop to bear pressure on an annular hoop securing the drum skin against a bearing rim. Rotation of the counterhoop drives the annular hoop deeper into an annular channel thereby increasing the tautness of the drum skin across the bearing rim. The bearing rim may be modified with adjustable bearing edges. The drum strainer is also removed from the drum shell and attached to the rim or counterhoop. Tone bridges and tone coats may be added to the drum shell to enhance sound production.
US07888574B1 Drum with keyed interchangable sections
Improvements in a drum is disclosed. The improvements include the ability for a single drum center hoop to accommodate different end hoops to replicate the acoustical properties of the 39 snare drums that are commonly used. The drum hoops are each constructed with a key that allows mating pieces to connect in only one specific location or orientation. The keying ensures that the snare bed is properly oriented for optimal tone and function of the drum snare. Each side is individually changeable, nestable and stackable to make larger drums or drums with different cosmetic features. The materials and material thicknesses are also alterable to change the resulting tonal characteristics of the drum. The membrane edge support is alterable of changeable without requiring the entire drum to be replaced.
US07888573B1 Multi-purpose guitar holding system
A multi-purpose holding device and method for use with guitar shaped instruments, wherein the device comprises: a pivot axle member having attachment means for attaching the member to a guitar, a U-shaped mounting bracket member having first attachment means for attaching the member to a first substrate, the U-shaped mounting bracket member having second attachment means for attaching the member to a second substrate, the U-shaped mounting bracket member having third attachment means for attaching the member to a third substrate, the U-shaped mounting bracket member having fourth attachment means for attaching the member to a fourth substrate, the pivot axle member has a plate that attaches to the back of the guitar, the guitar with the pivot axle member has a slot for slidable connecting to the U-shaped mounting bracket members of the substrate's one through four, thereby allow a user to quickly and easily detach and reattach the holding substrate for the guitar, wherein the substrates one through four are designed to support the entire weight of the guitar, and wherein said user elects which substrate to attach and remove from said guitar and it what order and when.
US07888570B2 Stringed musical instrument using spring tension
A stringed musical instrument employs springs to apply tension to corresponding musical strings. Each spring is chosen and configured for its ability to impart a string tension generally matched to the appropriate tension of the string at perfect tune. Preferably, the spring is selected and arranged so that the tension in the string maintains at or near perfect tune even as the string elongates or contracts over time. In one embodiment, once a string is placed in appropriate tune, a mechanical visual indicator is set. As such, if tune of the string changes due to string elongation or contraction, the change is reflected by misalignment of the mechanical visual indicator even if the change cannot be aurally detected. Perfect tune can be reestablished by realigning the indicator. In another embodiment, a force modulating member is interposed between a spring and its corresponding musical string. The force modulating member is adapted so that the tension actually applied to the string by the spring is not linearly related to the force exerted by the spring as the spring changes in length.
US07888569B2 Shoulder rest for a violin and viola
The shoulder rest for a violin and a viola is formed in the manner that the basis of the shoulder rest (1) is partially rolled up in the opposite direction and that enables maximal adjustment to physiological characteristics of the violinist. The strain leg holder (2) is rotated for 180° C. in each direction in the way that the shoulder rest length is reduced from the functional shoulder rest length for one fourth.
US07888566B1 Maize variety PHPH7
A novel maize variety designated PHPH7 and seed, plants and plant parts thereof. Methods for producing a maize plant that comprise crossing maize variety PHPH7 with another maize plant. Methods for producing a maize plant containing in its genetic material one or more traits introgressed into PHPH7 through backcross conversion and/or transformation, and to the maize seed, plant and plant part produced thereby. Hybrid maize seed, plant or plant part produced by crossing the variety PHPH7 or a trait conversion of PHPH7 with another maize variety. Inbred maize varieties derived from maize variety PHPH7, methods for producing other inbred maize varieties derived from maize variety PHPH7 and the inbred maize varieties and their parts derived by the use of those methods.
US07888555B2 Flower-bud formation suppressor gene and early flowering plant
According to the present invention, a plant having an early flowering property is provided. Specifically, the present invention provides a transformed plant having a gene that suppresses flower-bud formation or the antisense DNA of this gene.
US07888552B2 Use of non-agrobacterium bacterial species for plant transformation
The invention relates to methods for Rhizobia-mediated genetic transformation of plant cells, including soybean, canola, corn, and cotton cells. These include both VirD2-dependent and VirD2-independent methods. Bacterial species utilized include strains of Rhizobium sp., Sinorhizobium sp., and Mesorhizobium sp. Vectors for use in such transformation are also disclosed.
US07888545B2 Self-adhesive dressing
The present invention relates to a self-adhesive dressing comprising a layer (1) of spunlace nonwoven material and attached thereto a layer (2) of adhesive. In accordance with the invention, the dressing is stretchable in a first direction (MD) corresponding to the machine direction of the nonwoven material and in a second direction (CD) perpendicular to the first direction, in conjunction with which the resistance to stretching is less than 10 N/25 mm in both the first (MD) and the second (CD) directions in the case of stretching of less than or equal to 5%.
US07888544B2 Hydrocarbon conversion processes using the UZM-27 family of crystalline aluminosilicate compositions
This invention relates to hydrocarbon conversion processes using a new family of crystalline aluminosilicate compositions designated the UZM-27 family. These include the UZM-27 and UZM-27HS which have unique structures. UZM-27 is a microporous composition which has a three-dimensional structure and is obtained by calcining the as synthesized form designated UZM-27P. UZM-27HS is a high silica version of UZM-27 and includes an essentially pure silica version of UZM-27.
US07888542B2 Process for producing a saturated hydrocarbon component
The invention relates to a process for producing high-quality saturated base oil or a base oil component based on hydrocarbons. The process of the invention comprises two main steps, the oligomerization and deoxygenation. A biological starting material containing unsaturated carboxylic acids and/or esters of carboxylic acids is preferably used as the feedstock.
US07888536B2 Selective and specific preparation of discrete PEG compounds
Aspects of the present invention are directed to novel methods for making discrete polyethylene compounds selectively and specifically to a predetermined number of ethylene oxide units. Methods which can be used to build up larger dPEG compounds (a) containing a wider range of utility to make useful homo- and heterofunctional and branched species, and (b) under reaction configurations and conditions that are milder, more efficient, more diverse in terms of incorporating useful functionality, more controllable, and more versatile then any conventional method reported in the art to date. In addition, the embodiments of the invention allow for processes that allow for significantly improving the ability to purify the intermediates or final product mixtures, making these methods useful for commerial manufacturing dPEGs. Protecting groups and functional groups can be designed to make purification at large scale a practical reality. The novel dPEG products form the compositional and material basis for making other novel compounds of valuable application in the fields of diagnostics and therapeutics, amongst others.
US07888535B2 High shear process for the production of acetaldehyde
A method of use for a high shear device incorporated into a process or system for the production of acetaldehyde from ethylene as a reactor device is shown to be capable of decreasing mass transfer limitations, by forming a feed stream emulsion, and thereby enhancing the acetaldehyde production process in the system.
US07888533B2 Accelerants for the modification of non-natural amino acids and non-natural amino acid polypeptides
Disclosed herein are accelerants for the formation of oxime-containing compounds from the reaction of a carbonyl-containing compound and a hydroxylamine-containing compound. The oxime-containing compound, the carbonyl-containing compound and the hydroxylamine-containing compound can each be a non-natural amino acid or a non-natural amino acid polypeptide. Also disclosed is the use of such accelerants to form oxime-containing compounds, the resulting oxime-containing compounds, and reaction mixtures containing such accelerants.
US07888530B2 Optimized production of aromatic dicarboxylic acids
Disclosed is an optimized process and apparatus for more efficiently producing aromatic dicarboxylic acids (e.g., terephthalic acid). In one embodiment the process/apparatus reduces costs by recovering and purifying residual terephthalic acid present in the liquid phase of an initial oxidation slurry. In another embodiment the process apparatus reduces costs associated with hydrogenation by forming a final composite product containing unhydrogenated acid particles.
US07888529B2 Process to produce a post catalyst removal composition
A process is provided for producing an enriched carboxylic acid compositions produced by contacting composition comprising a carboxylic acid with an enrichment feed in an enrichment zone to form an enriched carboxylic acid composition. This invention also relates to a process and the resulting compositions for removing catalyst from a carboxylic acid composition to produce a post catalyst removal composition.
US07888528B2 Photosensitive self-assembled monolayer for selective placement of hydrophilic structures
A photosensitive monolayer is self-assembled on an oxide surface. The chemical compound of the photosensitive monolayer has three components. A first end group provides covalent bonds with the oxide surface for self assembly on the oxide surface. A photosensitive group that dissociates upon exposure to ultraviolet radiation is linked to the first end group. A second end group linked to the photosensitive group provides hydrophobicity. Upon exposure to the ultraviolet radiation, the dissociated photosensitive group is cleaved and forms a hydrophilic derivative in the exposed region, rendering the exposed region hydrophilic. Carbon nanotubes or nanocrystals applied in an aqueous dispersion are selectively attracted to the hydrophilic exposed region to from electrostatic bonding with the hydrophilic surface of the cleaved photosensitive group.
US07888527B2 Aryl amide sphingosine 1-phosphate analogs
The present invention provides compounds that have antagonist activity at the S1P1 and/or S1P3 receptors. These compounds have enhanced selectivity and potency at the S1P1 and/or S1P3 receptors.
US07888523B2 Preparation of platinum(II) complexes
This invention relates to a method for the preparation of a platinum(II) complex containing a neutral bidentate ligand, such as oxaliplatin. The method includes the step of reacting a halogenoplatinum complex containing a neutral bidentate ligand with an oxalate salt in a solvent, wherein more than 1 g/L of the oxalate salt is soluble in the solvent. The invention also relates to new platinum(II) complexes.
US07888519B2 Pyran compound or at least one derivative thereof
The invention relates to pyran derivatives of the formula I and to a process and intermediates for their preparation and derivatisation, and to the use thereof in liquid-crystalline media.
US07888517B2 Process for production of glycidol
The present invention relates to a process for producing glycidol from glycerol carbonate as a raw material with a high yield. The process for producing glycidol according to the present invention includes the steps of (1) reducing a content of a salt having a weak acidity in glycerol carbonate to 1500 ppm by mass or less; and (2) obtaining the glycidol from the glycerol carbonate.
US07888515B2 Method for the production of N,N-carbonyldiazoles
The present invention relates to an improved process for preparing N,N′-carbonyldiazoles by reacting azoles with phosgene.
US07888513B2 Condensation reaction by metal catalyst
The invention relates to a method for producing an azoline compound represented by the general formula (3): wherein R1 represents an optionally substituted hydrocarbon group, an optionally substituted alkoxy group, an optionally substituted alkoxycarbonyl group, a halogen atom, a substituted amino group, a substituted carbamoyl group or an optionally substituted heterocyclic group; R3, R4, R5 and R6 may be the same or different and each represents a hydrogen atom, an optionally substituted hydrocarbon group, an optionally substituted alkoxy group, an optionally substituted alkoxycarbonyl group, a halogen atom, a substituted amino group, a substituted carbamoyl group or an optionally substituted heterocyclic group; two arbitrary groups selected from R3, R4, R5 and R6 may bond to each other to form a ring; and Z1 represents an oxygen atom, a sulfur atom or a selenium atom; comprising reacting a carboxylic acid or a carboxylic acid derivative represented by the general formula (1): R1CO2R2  (1) wherein R1 is as defined above; R2 represents a hydrogen atom, an optionally substituted alkyl group or an optionally substituted aryl group; and R1 and R2 may bond to each other to form a ring; with an aminochalcogenide represented by the general formula (2): wherein R3, R4, R5, R6 and Z1 are as defined above; in the presence of a compound containing a group 12 metal element in the periodic table.
US07888493B2 Bacterial strains, genes and enzymes for control of bacterial diseases by quenching quorum-sensing signals
The present invention relates to isolated nucleic acid molecules encoding an autoinducer inactivation protein, wherein the encoded protein comprises an amino acid sequence selected from the group consisting of 104HXHXDH109˜60aa˜H169˜21aa˜D191 and 103HXHXDH108˜72aa˜H180˜21aa˜D202, and to expression vectors and transformed plant and animal cells comprising the same. The proteins encoded by these nucleic acid molecules provide to a susceptible plant or animal increased resistance to a disease the virulence of which is regulated by autoinducers. Also provided are methods of increasing disease resistance in susceptible plants and animals.
US07888491B2 Outer membrane protein of Ehrlichia canis and Ehrlichia chaffeensis
Diagnostic tools for for serodiagnosing ehrlichiosis in mammals, particularly in members of the Canidae family and in humans are provided. The diagnostic tools are a group of outer membrane proteins of E. chaffeensis and variants thereof, referred to hereinafter as the “OMP proteins”, a group of outer membrane proteins of E. canis and variants thereof referred to hereinafter as the “P30F proteins”, and antibodies to the OMP proteins and the P30F proteins. The OMP proteins of E. chaffeensis encompass OMP-1, OMP-1A, OMP1-B, OMP-1C, OMP1-D, OMP1-E, OMP1-F, OMP1-H, OMP-1R, OMP-1S, OMP-1T, OMP-1U, OMP-1V, OMP-1W, OMP-1X, OMP-1Y and OMP-1Z. The P30F proteins of E. canis encompass P30, P30a, P30-1, P30-2, P30-3, P304, P30-5, P30-6, P30-7, P30-8, P30-9, P30-10, P30-11, and P30-12. Isolated polynucleotides that encode the E. chaffeensis OMP proteins and isolated polynucleotides that encode the E. canis P30F protein are also provided. The present invention also relates to kits containing reagents for diagnosing human ehrlichiosis and canine ehrlichiosis, and to immunogenic compositions containing one or more OMP proteins or P30F proteins.
US07888489B2 Method for producing a compound of interest in a filamentous fungal cell
The invention relates to a nucleotide sequence comprising; a synonymous nucleotide coding sequence with optimized codon frequency such that a native codon has been exchanged with a synonymous codon, the synonymous codon encoding the same amino acid as the native codon and having a higher frequency in codon usage as defined in Table 1 than the native codon; and optionally the nucleotide sequence comprises control sequences such as; one translational termination sequence orientated in 5′ towards 3′ direction selected from the following list of sequences; TAAG, TAGA and TAAA, preferably TAAA, and/or one translational initiator coding sequence orientated in 5′ towards 3′ direction selected from the following list of sequences; gctnccyyc (SEQ ID NO:20), using ambiguity codes for nucleotides; v (A/C/G); n (A/C/G/T), preferably 5′-GCT TCC TTC-3′ (SEQ ID NO:21). The invention further relates to a consensus translational initiator sequence; 5′-mwChkyCAmv-3′ (SEQ ID NO:16), preferably the translational initiator sequence is selected from the list consisting of; 5′-mwChkyCAAA-3′ (SEQ ID NO:17), 5′-mwChkyCACA-3′ (SEQ ID NO:18), and 5′-mwChkyCAAG-3′ (SEQ ID NO:19).
US07888476B2 Process for the preparation of a von Willebrand (FvW) factor concentrate by chromatography and a FvW concentrate thus obtainable
This invention relates to a process for the preparation of a very high purity von Willebrand factor concentrate from a biological fraction containing von Willebrand factor, including a separation by anion exchange chromatography using a vinyl polymer support of weak base type, the separation comprising the steps of loading of the chromatographic support with the fraction containing von Willebrand factor, previously equilibrated with a suitable buffer, with a predetermined flowrate allowing the retention of the von Willebrand factor, washing of the support with an acidic buffer with a flowrate higher than the flowrate of the step a) until the not-retained proteins and the contaminants are removed, flushing and equilibrating of the chromatographic support with the buffer and using the flowrate of the step a), and elution of the von Willebrand factor by increasing of the ionic strength of the step c). The invention also relates to a von Willebrand factor concentrate for therapeutic use likely to be obtained by implementing the process wherein the rate of Factor VIII:C/FvW:RCo is less than 0.06%.
US07888468B2 Cytotoxic factors for modulating cell death
Cytotoxic factors having use in modulating cell death, and their use in methods of treating necrosis or apoptosis-related conditions are disclosed. The invention also relates to methods for identifying active agents useful in treating conditions related to cell death or uncontrolled growth. The present inventors have found that different microorganisms produce different cytotoxic factor(s) having anticancer activity. The substantially pure cytotoxic factors can be used in a method of treating an infectious disease or a cancer.
US07888454B2 Substituted alditol compounds, compositions, and methods
Substituted alditol or carbohydrate compounds having a specified general formula are provided. A method for synthesizing such substituted alditol or carbohydrate compounds is also provided.
US07888451B2 Methods for preparing selectively-releasable adhesives
In one embodiment, a method for preparing a selectively releasable adhesive includes condensing a multifunctional alcohol and a multifunctional carboxylic acid to form a prepolymer and curing the prepolymer at an elevated temperature and a vacuum to produce a cured polymer.
US07888447B2 Polycarbonate-polysiloxane copolymers, methods for the preparation thereof, and articles derived therefrom
A polycarbonate-polysiloxane copolymer comprising structural units of the formula: wherein each R1, R2, and R3 is independently the same or different monovalent C1-12 should this be C1-C13 like in the document? hydrocarbon group, G comprises a monovalent C6-1000 poly(oxyalkyl) group, each R4 and R5 taken together is independently the same or different divalent C3-30 hydrocarbon linking group wherein R4 is a C1-28 hydrocarbon and R5 is a C2-29 aliphatic group, a is 0 or greater, and b is one or greater; and structural units of the formula: wherein each R is independently the same or different C6-60 divalent hydrocarbon group, and at least 60% of the R groups comprise aromatic moieties.
US07888441B2 Metal-containing compositions
The present invention relates to metal-containing compositions comprising a metal-containing precursor unit (MU), a prepolymer unit (PU), and a catalyst or an initiator capable of inducing a combining reaction of ethylenically unsaturated groups of the metal-containing precursor unit and the prepolymer unit. In another embodiment, the composition comprises MU and a catalyst or initiator capable of inducing a combining reaction of the metal-containing precursor units. Both MU and PU contain additional functional groups, which may be selected to impart compatibility with each other and to produce optically clear films. The metal-containing compositions can be used to produce films or articles having a transmittance of at least 90% and index of refraction in the range of 1.4 to 1.8 in the 400-700 nm range of light and 1.4 to 2.4 in the 150-400 nm range of light.
US07888438B2 Catalyst for olefin polymerization and process for olefin polymerization
A catalyst for olefin polymerization of the present invention includes a solid titanium catalyst component (I) including titanium, magnesium, halogen, and a cyclic ester compound (a) represented by the following formula (1): wherein n is an integer of 5 to 10; R2 and R3 are each independently COOR1 or R, and at least one of R2 and R3 is COOR1; a single bond (excluding Ca—Ca bonds, and a Ca—Cb bond in the case where R3 is R) in the cyclic backbone may be replaced with a double bond; a plurality of R1's are each independently a monovalent hydrocarbon group having 1 to 20 carbon atoms; and a plurality of R's are each independently a hydrogen atom or a substituent, but at least one of R's is a hydrogen atom, and an organometal compound catalyst component (II). When this catalyst for olefin polymerization is used, an olefin polymer having a broad molecular weight distribution can be produced.
US07888437B2 Process for producing olefin polymer and solid titanium catalyst component
The process for producing an olefin polymer according to the present invention is characterized in that it comprises polymerizing an olefin having 3 or more carbon atoms in the presence of a catalyst for olefin polymerization containing a solid titanium catalyst component (I) which contains titanium, magnesium, halogen, and a cyclic ester compound (a) specified by the following formula (1): wherein n is an integer of 5 to 10, R2 and R3 are each independently COOR1 or a hydrogen atom, and at least one of R2 and R3 is COOR1; and R1's are each independently a monovalent hydrocarbon group having 1 to 20 carbon atoms, and a single bond (excluding Ca—Ca bonds, and a Ca—Cb bond in the case where R3 is a hydrogen atom) in the cyclic backbone may be replaced with a double bond, and an organometallic compound catalyst component (II), at an internal pressure of the polymerization vessel which is 0.25 times or more as high as the saturation vapor pressure of the olefin at a polymerization temperature. According to this process, an olefin polymer having a broad molecular weight distribution can be prepared.
US07888434B2 Aromatic polyamide and epoxy group-containing phenoxy resin
A polyamide resin composition which can improve heat resistance and water absorbency while suppressing the deterioration of processability is provided. Provided is a polyamide resin composition having an aromatic polyamide resin and an epoxy group-containing phenoxy resin having an epoxy group in the molecule of the phenoxy resin, wherein the content of the epoxy group-containing phenoxy resin is 30 to 50% by mass.
US07888430B2 Modified powder, fluid composition containing said modified powder, formed article, and method for producing modified powder
The modifying powder is silk powder having an average particle diameter of 10 μm or less, oil absorption of 130 ml/100 g or less and particle diameter of 80 μm or less on the basis of dispersion degree evaluation with a grind gauge according to JIS K5400; or polysaccharide powder having an average particle diameter of 10 μm or less, and ink viscosity of less than 15 Pa·s or oil absorption of 85 ml/100 g or less. Such modifying powders can be obtained through a method comprising a first pulverization process for pulverizing a starting material for modifying material using a dry-type mechanical pulverizer such as a ball mill, and a second pulverization process for pulverizing the obtained pulverized product with a jet mill to fine particles having an average particle diameter of 10 μm or less, wherein pulverization treatment time in the first pulverization process is determined to be 40 hours or more.
US07888427B2 Latent doping of conducting polymers
Latent doping is provided wherein a conducting polymer is mixed with a dopant in solution without the doping reaction occurring unless solvent is removed. Regioregular polythiophenes are a particularly important embodiment. A composition comprising (i) at least one polymer comprising conjugation in the polymer backbone, (ii) at least one dopant for the polymer, (iii) at least one solvent for the polymer and latent dopant, wherein the polymer, the latent dopant, and the solvent are formulated so that the latent dopant does not substantially dope the polymer when formulated, but does substantially react with the polymer when the solvent is removed. Formulation of the composition can comprise adjusting the order of mixing, the amounts of the components, and the temperature. Methods of formulating the compositions and methods of using the compositions are also provided. OLED, PLED, photovoltaic, and other organic electronic devices can be fabricated.
US07888424B2 Method for producing a curable aqueous polymer dispersion
A curable aqueous polymer dispersion is prepared by: I) reacting a (meth)acrylate polymer A) that carries ethylenically unsaturated groups and functional groups capable of a condensation or addition reaction, with at least one compound B) which Ia) carries at least one functional group that is complementary to the functional groups of the copolymer A) that are capable of undergoing a condensation or addition reaction, and additionally at least one ionogenic, ionic group or a combination thereof, or which Ib) carries at least one functional groups that is complementary to the functional groups of the copolymer A) that are capable of condensation or addition reaction and is capable of forming an ionogenic or ionic group in a condensation or addition reaction, to give a copolymer AI) which carriers ethylenically unsaturated groups and ionogenic groups, ionic groups or a combination thereof, II) with the proviso that when the ionogenic groups are present in compound B), converting at least some of the ionogenic groups of the copolymer AI) into ionic groups, and III) dispersing the copolymer AI) in an aqueous dispersion medium.
US07888423B2 Polypropylene composition having improved scratch resistance
The invention relates to a polypropylene composition comprising: (i) 30-97 wt. % of a polypropylene; (ii) 2-20 wt. % of a branched low density polyethylene with a density between 910 and 935 kg/m3 and a Melt Flow Index (MFI) between 0.1 and 100 g/10 min; (iii) 1-20 wt. % of a copolymer of ethylene and a C3-C20 α-olefin with a density between 840 and 890 kg/m3 and a Melt Flow Index (MFI) between 0.1 and 100 g/10 min; and (iv) 0.5-60 wt. % of a filler, wherein wt. % are calculated on the total amount of the polypropylene composition.
US07888422B2 Long-wearing removable pressure sensitive adhesive
A medical grade adhesive comprises a mixture of at least one cross-linkable pressure sensitive adhesive component and at least one non-cross-linkable pressure-sensitive adhesive component, wherein the amount of each of said components is such that the resultant adhesive can adhere to human skin for a period of up to about 7-10 days but can be removed without causing trauma to the skin.
US07888415B2 Vinyl addition polycyclic olefin polymers prepared with non-olefinic chain transfer agents and uses thereof
A method of polymerizing poly(cyclic)olefin monomers encompassing (a) combining a monomer composition containing the poly(cyclic)olefin monomers, a non-olefinic chain transfer agent and an activator compound to faun a mixture; (b) heating the mixture; and (c) adding a polymerization catalyst containing Ni and/or Pd. The non-olefinic chain transfer agent includes one or more compounds selected from H2, alkylsilanes, alkylalkoxysilanes, alkylgermanes, alkylalkoxygermanes, alkylstannanes, and alkylalkoxystannanes. The activator is characterized as having an active hydrogen with a pKa of at least 5. The resulting poly(cyclic)olefin polymers can be used in photoresist compositions.
US07888414B2 Liquid phosphite blends as stabilizers
A composition is disclosed that comprises a blend of at least two different phosphites of the structure wherein R1, R2, and R3 are independently selected alkylated aryl groups and wherein said blend is a liquid at ambient conditions. The compositions are useful for stabilizing thermoplastic resins and elastomers.
US07888403B2 Ophthalmic and otorhinolaryngological device materials
Disclosed are soft, high refractive index, acrylic device materials. The materials comprise di-block or tri-block macromers containing hydrophilic side-chains. The materials have improved glistening resistance.
US07888402B2 Radiation-curable water-emulsifiable polyisocyanates
The invention relates to radiation-curable, water-emulsifiable compounds containing isocyanate groups or capped isocyanate groups, and to their use.
US07888401B2 Ink composition and inkjet ink, and image-forming method and recorded material using the same, and oxetane compound
An active energy ray-curable ink composition, which contains a compound having, in its molecule, an oxetane ring and at least one selected from a dioxolane ring, a dioxane ring, and a dioxepane ring; an ink composition, which contains a cationically-polymerizable compound having, in its molecule, both an oxetane ring and a bicycloorthoester ring; an inkjet ink, which contains the active energy ray-curable ink composition or the ink composition; and an image-forming method and a recorded material, using the inkjet ink; an oxetane compound of a specific structure.
US07888393B2 Transdermal compositions
The present invention is directed to transdermal compositions and the uses thereof. These compositions include at least one of the following components: a C1-C6 dialkyl, C12-C30 dialkyl quaternary ammonium salt, a C12-C30 fatty acid, a nitrogenous organic base, C12-C30 fatty alcohol, monoglyceride or the reaction products thereof.
US07888388B2 Peroxisome proliferator activated receptor ligand and process for producing the same
The present invention easily and efficiently provides a peroxisome proliferator-activated receptor ligand, and a composition for amelioration of insulin resistance or for prevention and/or amelioration of the insulin resistance syndrome containing the same, as an active ingredient.The present invention relates to a peroxisome proliferator-activated receptor ligand which comprises a prenylflavonoid, a chalcone derivative exclusive of prenylflavonoids, a flavonol derivative exclusive of prenylflavonoids, and a salt, a glycoside and/or an esterified substance thereof acceptable as a pharmaceutical preparation or a food or a beverage; a composition containing the above ligand; a plant-derived extract containing the above ligand; and a process for producing the above extract.
US07888384B2 Heterocyclic derivatives for modulation of calcium channels
Heterocyclic derivatives act as Ca channel antagonists. The compositions are useful for treating or relieving Ca channel mediated conditions.
US07888382B2 Combined pharmaceutical preparation for treatment of type 2 diabetes
For controlling the condition of type 2 diabetes, a pharmaceutical including a combination of mitiglinide, a pharmacologically acceptable salt thereof or a hydrate thereof and an α-glucosidase inhibitor such as voglibose or acarbose, and a therapeutic method using the pharmaceutical are provided. The pharmaceutical according to the present invention has an extremely strong effect of decreasing a morning fasting blood glucose level, a postprandial blood glucose level and HbA1C of a patient with type 2 diabetes, and can improve glucose spike, insulin resistance and lipid metabolism.
US07888379B2 Thiazole derivatives and use thereof
The present invention is related to thiazole derivatives of Formula (I) in particular for the treatment and/or prophylaxis of autoimmune disorders and/or inflammatory diseases, cardiovascular diseases, neurodegenerative diseases, bacterial or viral infections, kidney diseases, platelet aggregation, cancer, transplantation, graft rejection or lung injuries.
US07888378B2 Thiadiazole compounds and uses thereof
Thiadiazole compounds, compositions, bioconjugates, and methods for targeting and photoactivation at target sites.
US07888374B2 Inhibitors of c-jun N-terminal kinases
The present invention relates to compounds that are inhibitors of c-jun N-terminal kinase 1, 2, or 3 (JNK1, JNK2, or JNK3), compositions containing the compounds and the use of the compounds in the prevention or treatment of disorders regulated by the activation of JNK1, JNK2 and JNK3.
US07888372B2 Compositions and methods for modulating bone mineral deposition
The key function of TNAP in bone is degradation of PPi to remove this mineralization inhibitor and provide free phosphate for apatite deposition. PC-1 is a direct antagonist of TNAP function. ANK also antagonizes TNAP-dependent matrix calcification. Specifically, the activity of PC-1 inhibits initial MV apatite deposition, but ANK inhibits propagation of apatite outside the MVs. Furthermore, loss of function of the two distinct skeletal TNAP antagonists, PC-1 and ANK, ameliorates TNAP deficiency-associated osteomalacia in vivo. Conversely, the hyperossification associated with both PC-1 null mice and ANK-deficient (ank/ank) mice is ameliorated by deficiency of TNAP in vivo.
US07888369B2 Oxazoloisoquinoline derivatives as thrombin receptor antagonists
This application provides for oxazolisoquinoline derivatives of the formula or a pharmaceutically acceptable salt of said compound wherein: B is —CH═CH—; M is —C(R1)(R2)—; and the remaining substituents are as defined in the specification as well as pharmaceutical compositions containing them and a method of treating diseases associated with thrombosis, atherosclerosis, restenosis, hypertension, angina pectoris, arrhythmia, heart failure, and cancer by administering said compounds. This application also provides for combination therapy with the compounds of Ib or pharmaceutically acceptable salts thereof with other cardiovascular agents.
US07888368B2 Treatment of drug-resistant tumors
A subclass of camptothecin derivatives is disclosed to be useful for the preparation of a medicament for the treatment of drug-resistant tumors and/or for the administration to patients who show polymorphisms in the gene coding for DNA topoisomerase I.
US07888364B2 Pyridyl inhibitors of hedgehog signalling
The invention provides novel inhibitors of hedgehog signaling that are useful as a therapeutic agents for treating malignancies where the compounds have the general formula I: wherein A, X, Y R1, R2, R3, R4, m and n are as described herein.
US07888363B2 Viral polymerase inhibitors
An isomer, enantiomer, diastereoisomer or tautomer of a compound, represented by formula I: wherein A, B, R2, R3, L, M1, M2, M3, M4, Y1, Y0, Z and Sp are as defined in claim 1, or a salt thereof, as an inhibitor of HCV NS5B polymerase.
US07888361B2 Tyrosine kinase inhibitors containing a zinc binding moiety
The present invention relates to tyrosine kinase inhibitors that contain a zinc-binding moiety and their use in the treatment of tyrosine related diseases and disorders such as cancer. The said derivatives may further act as HDAC inhibitors.
US07888360B2 Pyridine and pyrimidine derivatives as inhibitors of histone deacetylase
This invention comprises the novel compounds of formula (I) wherein R1, R2, R3, X, Y and Z have defined meanings, having histone deacetylase inhibiting enzymatic activity; their preparation, compositions containing them and their use as a medicine.
US07888359B2 Cyclohexyl or piperidinyl carboxamide antibiotic derivatives
The invention relates to antibiotic cyclohexyl or piperidinyl carboximide derivatives of formula (I) wherein R1 represents hydrogen, halogen, (C1-C4)alkyl, (C1-C4)alkoxy, cyano or COOR2, R2 being (C1-C4)alkyl; one or two of U, V, W and X represent(s) N and the remaining represent each CH, or, in the case of X, may also represent CRX, RX being a halogen atom; either B represents N and A represents CH2CH2 or CH(OR3)CH2, or B represents CH or C(OR4) and A represents OCH2, CH2CH(OR5), CH(OR6)CH2, CH(OR7)CH(OR8), CH═CH or CH2CH2; each of R3, R4, R5, R6, R7, and R8 represents independently hydrogen, SO3H, PO3H2, CH2OPO3H2 or COR9, R9 being either CH2CH2COOH or such that R9—COOH is naturally occurring amino acid or dimethylaminoglycine; and to salts of such compounds of formula (I).
US07888356B2 Antibiotics containing borinic acid complexes and methods of use
The structure and preparation of antibiotics incorporating borinic acid complexes are disclosed, especially hydroxyquinoline, imidazole and picolinic acid derivatives, along with compositions of these antibiotics and methods of using the antibiotics and compositions as bactericidal and fungicidal agents as well as therapeutic agents for the treatment of diseases caused by bacteria and fungi.
US07888354B2 Phenylpyrazole derivatives
The present invention provides a prophylactic or therapeutic agent for dementia, Alzheimer's disease, attention-deficit hyperactivity disorder, schizophrenia, eating disorders, obesity, diabetes, hyperlipidemia, sleep disorders, narcolepsy, sleep apnea syndrome, circadian rhythm disorder, depression, allergic rhinitis or other diseases.A phenylpyrazole derivative represented by formula (1) or a pharmaceutically acceptable salt thereof: {wherein R1 and R2, which may be the same or different, each represent C1-C6 alkyl or C3-C8 cycloalkyl, or R1 and R2 are attached to each other together with their adjacent nitrogen atom to form a 4- to 7-membered saturated heterocyclic ring (wherein said saturated heterocyclic ring may be substituted with halogen or C1-C6 alkyl), n represents an integer of 0 to 2, T represents a hydrogen atom, halogen or C1-C6 alkyl, and R represents formula (I): or the like}.
US07888350B2 3,7-diamino-10H-phenothiazine salts and their use
This invention pertains generally to the field of phenothiazine compounds, and more particularly to certain stably reduced phenothiazine compounds, specifically, certain 3,7 diamino-10H-phenothiazine (DAPTZ) compounds of the following formula wherein: each of R1 and R9 is independently selected from: —H; C1-4alkyl; C2-4alkenyl; and halogenated C1-4alkyl; each of R3NA and R3NB is independently selected from: —H; C1-4alkyl; C2-4alkenyl; and halogenated C1-4alkyl; each of R7NA and R7NB is independently selected from: —H; C1-4alkyl; C2-4alkenyl; and halogenated C1-4alkyl; each of HX1 and HX2 is independently a protic acid; and pharmaceutically acceptable salts, solvates, and hydrates thereof. These compounds are useful as drugs, for example, in the treatment of tauopathies, such as Alzheimer's disease, and also as prodrugs for the corresponding oxidized thioninium drugs (for example, methythioninium chloride, MTC).
US07888340B2 Pregnane steroids and their use in the treatment of CNS disorders
Steroid compounds processing a hydrogen donor in 3beta position, either in the form of a hydroxy- or a sulfate group, function as efficient blockers of the 3alpha-hydroxy-pregnan-steroid action and thus have utility as therapeutic substances for the prevention and/or treatment of steroid related CNS disorders. Treatment methods based on the administration of these substances are disclosed, and these substances either alone or in combination are also suggested for the manufacture of pharmaceuticals for the treatment of many specific steroid induced CNS disorders.
US07888338B2 7-(2-cyclohexylidene-ethylidene)-spiro[4.5]decanes
The present invention relates to 7-(2-cyclohexylidene-ethylidene)-spiro[4.5]-decanes, compositions which comprise said 7-(2-cyclohexylidene-ethylidene)-spiro[4.5]-decanes, and methods for treating diseases, illnesses, and the like with said 7-(2-cyclohexylidene-ethylidene)-spiro[4.5]decanes.
US07888331B2 Ganglioside compositions and methods of use
Novel synthetic glycosphingolipids and pharmaceutical compositions containing such synthetic glycosphingolipids are described. Methods of making the novel synthetic glycosphingolipid compounds and compositions as well as their use in the field of neuroprotection and cancer treatment is also described.
US07888328B2 Oral formulations of cladribine
Provided are compositions of cladribine and cyclodextrin which are especially suited for the oral administration of cladribine.
US07888326B2 Methods for promoting apoptosis and treating tumor cells inhibiting the expression or function of the transcription factor ATF5
The present invention provides methods for regulating the growth and/or survival of tumor cells and stem cells by modulating the expression or function of ATF5. The present invention also provides methods for promoting or suppressing differentiation of stem/progenitor cells, for producing differentiated cells and for isolating/purifying differentiated cells, including neural cells. Also provided are differentiated cells, cell populations and transgenic animals comprising same and uses of same. The present invention further provides methods for treating nervous tissue degeneration and for identifying an agent for use in treating nervous tissue degeneration. Methods for promoting apoptosis in neoplastic cells and for treating or preventing tumors, and identifying agents for use in treating or preventing tumors are also provided by the present invention. The present invention further provides methods for identifying agents that inhibit ATF5, agents identified by these methods. Also provided are methods for diagnosing tumors, for assessing the efficacy of therapy to treat tumors and for assessing the prognosis of a subject who has a neural tumor. Finally, the present invention provides a kits for use in detecting and treating tumors.
US07888325B2 Composition and method for in vivo and in vitro attenuation of gene expression using double stranded RNA
Introduction of double stranded RNA into cells, cell culture, organs and tissues, and whole organisms, particularly vertebrates, specifically attenuates gene expression.
US07888322B2 Use of VEGF and homologues to treat neuron disorders
The present invention relates to neurological and physiological dysfunction associated with neuron disorders. In particular, the invention relates to the involvement of vascular endothelial growth factor (VEGF) and homologues in the aetiology of motor neuron disorders. The invention further concerns a novel, mutant transgenic mouse (VEGFm/m) with a homozygous deletion in the hypoxia responsive element (HRE) of the VEGF promoter which alters the hypoxic upregulation of VEGF. These mice suffer severe adult onset muscle weakness due to progressive spinal motor neuron degeneration which is reminiscent of amyotrophic lateral sclerosis (ALS)—a fatal disorder with unknown aetiology. Furthermore, the neuropathy of these mice is not caused by vascular defects, but is due to defective VEGF-mediated survival signals to motor neurons. The present invention relates in particular to the isoform VEGF165 which stimulates survival of motor neurons via binding to neuropilin-1, a receptor known to bind semaphorin-3A which is implicated in axon retraction and neuronal death, and the VEGF Receptor-2. The present invention thus relates to the usage of VEGF, in particular VEGF165, for the treatment of neuron disorders and relates, in addition, to the usage of polymorphisms in the VEGF promotor for diagnosing the latter disorders.
US07888321B2 Production of high levels of transgenic factor IX without gene rescue, and its therapeutic uses
A non-human transgenic mammalian animal, as described above, contains an exogenous double stranded DNA sequence stably integrated into the genome of the animal, which comprises cis-acting regulatory units operably linked to a DNA sequence encoding human FIX protein without the benefit of the presence of a complete milk gene sequence for gene rescue, and a signal sequence is active in directing newly expressed Factor IX into the milk of the animal at levels in an unactivated form that is suitable for subsequent processing for therapeutic applications in treating Hemophilia B. The transgenic mammals are preferably pigs, cows, sheep, goats and rabbits. The applications include milk derivatives for oral delivery and oral tolerization in the treatment of Hemophilia B.
US07888317B2 Glucagon-like peptide-2 and its therapeutic use
Glucagon-like peptide 2, a product of glucagon gene expression, and analogs of glucagon-like peptide 2, have been identified as gastrointestinal tissue growth factors. Their effects on the growth of small bowel and pancreatic islets are described. Their formulation as a pharmaceutical, and their therapeutic use in treating disorders of the bowel, are described.
US07888314B2 Compositions and methods for treating peripheral vascular disease
The present invention relates to methods of treating intermittent claudication comprising administering glucagon-like peptide-1 (GLP-1) molecules to subjects suffering therefrom.
US07888307B2 Highly branched primary alcohol compositions, and biodegradable detergents made therefrom
There is provided a new branched primary alcohol composition and the sulfates thereof exhibiting good cold water detergency and biodegradability. The branched primary alcohol composition has an average number of branches per chain of at least 0.7, having at least 8 carbon atoms and containing both methyl and ethyl branches. The primary alcohol composition may also contain less than 0.5 atom % of quaternary carbon atoms, and a significant number ethyl branches, terminal isopropyl branches, and branching at the C3 position relative to the hydroxyl carbon. The process for its manufacture is by skeletally isomerizing an olefin feed having at least 7 carbon atoms followed by conversion to an alcohol, as by way of hydroformylation, and ultimately, sulfation to obtain a detergent surfactant. Useful catalysts include the zeolites having at least one channel with a crystallographic free diameter along the x and/or y planes of the [001] view ranging from greater than 4.2 Å and less than 7 Å, but allows one to skeletally isomerize the olefin to produce a variety of branches, while retaining ready biodegradability and good cold water detergency.
US07888305B2 1,1,1,3,3-pentafluorobutane composition
The invention relates to the field of solvents. The invention relates more particularly to a composition based on 1,1,1,3,3-pentafluorobutane (HFC-365 mfc). The present invention also relates to a process for dissolving oil.
US07888301B2 Resist, barc and gap fill material stripping chemical and method
An aqueous-based composition and process for removing photoresist, bottom anti-reflective coating (BARC) material, and/or gap fill material from a substrate having such material(s) thereon. The aqueous-based composition includes a fluoride source, at least one organic amine, at least one organic solvent, water, and optionally chelating agent and/or surfactant. The composition achieves high-efficiency removal of such material(s) in the manufacture of integrated circuitry without adverse effect on metal species on the substrate, such as copper, and without damage to SiOC-based dielectric materials employed in the semiconductor architecture.
US07888298B2 Lubricant compositions with improved properties
A lubricant composition for providing friction reducing properties and VI and solvency improving properties in a lubricant system is disclosed. The lubricant composition comprises a major amount of at least one base oil and an effective amount of a high viscosity polyester additive having a kinematic viscosity at 100° C. of at least about 2,500 mm2/s.
US07888296B2 Composition and method for recovering hydrocarbon fluids from a subterranean reservoir
This invention is directed to a composition comprising expandable polymeric microparticles comprising hydrophobic polymers having a backbone with labile pendant groups, the microparticles having an unexpanded volume average particle size diameter of from about 0.05 to about 5,000 microns. Labile pendant groups on the backbone are subject to hydrolysis under a change in environmental conditions that results in expansion of the microparticle. The invention is further directed to the use of the composition for modifying the permeability of subterranean formations and increasing the mobilization and/or recovery rate of hydrocarbon fluids present in the formations.
US07888295B2 Crosslinked polymer solutions and methods of use
A well treatment composition is formed from an aqueous crosslinkable hydrated polymer solution. Combined with the polymer solution is a solid boric acid or borate crosslinking agent and a solid metal oxide or metal hydroxide pH buffering agent that has limited solubility (less than 100 kg/m3 at 20° C.) within the polymer solution that provides the solution with a pH of from about 8 to about 11. The composition may be introduced into a subterranean formation through a wellbore that penetrates the formation. The composition may provide at least one of shortened shear recovery time and an increase in the thermal stability of the aqueous polymer solution.
US07888294B2 Energy recovery and reuse for gel production
The present disclosure relates to systems and methods for producing a fracturing gel using a preheated hydration fluid. The hydration fluid can be preheated using heat energy recycled from a different part of the operation. Recycling the heat energy can, in certain instances, reduce gel production costs and gel hydration times while improving gel yield.
US07888293B2 Compositions and methods relating to orthogonal ribosome mRNA pairs
Orthogonal ribosome orthogonal mRNA pairs are provided, as are methods for their selection involving a novel positive-negative selection approach, and methods for their use. Also provided are cellular logic circuits involving orthogonal ribosomes.
US07888289B2 Heterocyclylethylbenzamide derivatives
A compound of general formula (I): A process for preparing this compound.A fungicide composition comprising a compound of general formula (I).A method for treating plants by applying a compound of general formula (I) or a composition comprising it.
US07888288B2 Control of woody plants by the foliar application of triclopyr butoxyethyl ester compositions free of aromatic solvents
Triclopyr butoxyethyl ester compositions with a dearomatized aliphatic solvent or a vegetable oil ester as a carrier provide enhanced control of woody vegetation in foliar applications.
US07888287B2 2-(poly-substituted aryl)-6-amino-5-halo-4-pyrimidinecarboxylic acids and their use as herbicides
6-Amino-5-halo-4-pyrimidinecarboxylic acids having poly-substituted aryl substituents in the 2-position, and their amine and acid derivatives, are potent herbicides demonstrating a broad spectrum of weed control.
US07888282B2 Catalyst for manufacturing synthesis gas and method of manufacturing synthesis gas using the same
A catalyst for manufacturing synthesis gas has a carrier and a Group VIII metal carried by the carrier. The carrier contains a first ingredient, a second ingredient and a third ingredient. The first ingredient is an oxide of at least an alkaline earth metal selected from the group of magnesium, calcium, strontium and barium. The second ingredient is an oxide of at least an element selected from the group of scandium, yttrium and lanthanoids. The third ingredient is zirconia or a substance containing zirconia as principal ingredient and has a solid electrolytic property. The carrier may be formed by forming an overcoat film on a substrate by coating. Then, the overcoat film contains the above three ingredients. A catalyst according to the invention can remarkably reduce the dimensions of the reaction facility and improve the energy efficiency of the facility.
US07888281B2 Selective oxidation of alkanes and/or alkenes to valuable oxygenates
A catalyst, its method of preparation and its use for producing at least one of methacrolein and methacrylic acid, for example, by subjecting isobutane or isobutylene or a mixture thereof to a vapor phase catalytic oxidation in the presence of air or oxygen. In the case where isobutane alone is subjected to a vapor phase catalytic oxidation in the presence of air or oxygen, the product is at least one of isobutylene, methacrolein and methacrylic acid. The catalyst comprises a compound having the formula AaBbXxYyZzOo wherein A is one or more elements selected from the group of Mo, W and Zr, B is one or more elements selected from the group of Bi, Sb, Se, and Te, X is one or more elements selected from the group of Al, Bi, Ca, Ce, Co, Fe, Ga, Mg, Ni, Nb, Sn, W and Zn, Y is one or more elements selected from the group of Ag, Au, B, Cr, Cs, Cu, K, La, Li, Mg, Mn, Na, Nb, Ni, P, Pb, Rb, Re, Ru, Sn, Te, Ti, V and Zr, and Z is one or more element from the X or Y groups or from the following: As, Ba, Pd, Pt, Sr, or mixtures thereof, and wherein a=1, 0.05
US07888280B2 Immobilized homogeneous catalysts
A catalyst is produced by bonding a homogeneous catalyst to the surface of a catalyst support. A catalyst may include a catalyst support, a spacer molecule bonded to the catalyst support, and a homogeneous catalyst bonded to the spacer molecule. A catalyzed reaction can be carried out by providing reactants in a first phase and providing a catalyst as described herein in the first phase.
US07888278B2 Stabilized alumina supports, catalysts made therefrom, and their use in partial oxidation
The present invention relates to stabilized supports stable at temperatures above 800° C., and method of preparing such supports, which includes adding a rare earth metal to an aluminum-containing precursor prior to calcining. The present invention can be more specifically seen as a support, process and catalyst wherein the stabilized alumina catalyst support comprises a rare earth aluminate with a molar ratio of aluminum to rare earth metal greater than 5:1 and, optionally, an aluminum oxide. More particularly, the invention relates to the use of catalysts comprising rhodium, ruthenium, iridium, or combinations thereof, loaded onto said stabilized supports for the synthesis gas production via partial oxidation of light hydrocarbons, and further relates to gas-to-liquids conversion processes.
US07888276B2 Glass for display substrate
A glass having a SiO2—Al2O3—B2O3—RO (RO is at least one of MgO, CaO, BaO, SrO and ZnO) based composition, a temperature corresponding to 102.5 poise being 1570° C. or higher and an alkali content of 0.01 to 0.2% and a ZrO2 content of 0.01 to 0.3%, as expressed in % by mass. And, a glass having a SiO2—Al2O3—B2O3—RO (RO is at least one of MgO, CaO, BaO, SrO and ZnO) based composition, a density of 2.5 g/cm3 or less, an average thermal expansion coefficient of 25 to 36×10−7/° C. in a temperature range of 30 to 380° C., a strain point of 640° C. or higher and an alkali content of 0.01 to 0.2% and a ZrO2 content of not less than 0.01% and less than 0.4%, as expressed in % by mass.
US07888272B2 Methods for manufacturing memory and logic devices using the same process without the need for additional masks
A semiconductor fabrication process allows the fabrication of both logic and memory devices using a conventional CMOS process with a few additional steps. The additional steps, however, do not require additional masks. Accordingly, the process can be reduce the complexity, time, and cost for fabricating logic and memory devices on the same substrate, especially for embedded applications.
US07888270B2 Etching method for nitride semiconductor
The invention discloses etching method for the nitride semiconductor. Firstly dielectric layer is formed on gallium nitride. The line pattern or dot pattern is formed on the dielectric layer by using the exposure, development, and etching processes. The dielectric layer is used as the mask for the epitaxial lateral overgrowth of follow-up gallium nitride layer. The thick gallium nitride film is grown on the dielectric layer. Then the wet etching process is used to remove the dielectric layer, and the thick gallium nitride film on the dielectric layer is etched to form the specific shape as required.
US07888267B2 Method for etching silicon-containing ARC layer with reduced CD bias
A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process. Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the offset in the critical dimension (CD) bias is reduced between nested structures and isolated structures.
US07888265B2 Method for assaying copper in silicon wafers
This method for assaying copper in silicon wafers includes the steps of: forming a polysilicon layer on the surface of a p-type silicon wafer having the same characteristics as the silicon wafers being assayed; heat treating the p-type silicon wafer after it has been polished; dissolving the polysilicon layer on the heat-treated p-type silicon wafer with a mixed acid composed of at least hydrofluoric acid and nitric acid; and quantitatively determining the copper components within the mixed acid following dissolution of the polysilicon layer.
US07888264B2 MOSFET structure with multiple self-aligned silicide contacts
A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.
US07888260B2 Method of making electronic device
A semiconductor device with its package size close to its chip size has a stress absorbing layer, allows a patterned flexible substrate to be omitted, and allows a plurality of components to be fabricated simultaneously. There is: a step of forming electrodes (12) on a wafer (10); a step of providing a resin later (14) as a stress relieving layer on the wafer (10), avoiding the electrodes (12); a step of forming a chromium layer (16) as wiring from electrodes (12) over the resin layer (14); and step of forming solder balls as external electrodes on the chromium layer (16) over the resin layer (14); and a step of cutting the wafer (10) into individual semiconductor chips; in the steps of forming the chromium layer (16) and solder balls, metal thin film fabrication technology is used during the wafer process.
US07888258B2 Forming method of electrode and manufacturing method of semiconductor device
A forming method of an electrode includes the steps of providing an electrode material on a conductive part; exposing the electrode material at a temperature equal to or higher than a melting point of the electrode material in an oxidizing atmosphere; and exposing the melted electrode material, in a reducing atmosphere, at a temperature equal to or higher than the melting point of the electrode material and lower than the temperature at which the electrode material is exposed in the oxidizing atmosphere.
US07888253B2 Method of fabricating semiconductor device
A method of fabricating a semiconductor device according to an embodiment includes: forming a precursor film containing therein a predetermined metallic element on a surface of a recess portion formed in an insulating film on a semiconductor substrate; forming a wiring formation film on the precursor film; performing a heat treatment in an oxidation ambient atmosphere to cause the precursor film and the insulating film to react with each other, thereby forming a self-formed barrier film containing a compound, containing therein the predetermined metallic element and a constituent element of the insulating film, as a basic constituent in a boundary surface between the precursor film and the insulating film, and moving the predetermined metallic element unreacted into the wiring formation film through diffusion to cause the predetermined metallic element unreacted to react with oxygen contained in the oxidation ambient atmosphere on a surface of the wiring formation film, thereby precipitating an unreacted metallic oxide film including the predetermined metallic element; forming the same material as that of the wiring formation film on the wiring formation film after the unreacted metallic oxide film is removed; and flattening the wiring formation film until a portion of the insulating film located outside the recess portion is exposed.
US07888252B2 Self-aligned contact
A method of forming contacts for semiconductor devices, the method including depositing an inter-level dielectric (ILD) over a plurality of gate stacks, in which the divots within the inter-level dielectric layer are defined by the spaces between the gate stacks, filling the divots with an initial fill material, depositing a masking material on the dielectric over the gate stacks, and selectively etching the fill material to form contact vias. The fill material may be a self-assembly material such as a multi-block copolymer in which the blocks self organize vertically within the divots, so that a selective etch of the block material will remove the vertically organized blocks from the divot, but leave at least one block over the gate regions. In another embodiment, the fill material may be a metal, and the masking material may be a parylene based polymer.
US07888249B2 Use of chained implants in solar cell
The manufacture of solar cells is simplified and cost reduced through by performing successive ion implants, without an intervening thermal cycle. In addition to reducing process time, the use of chained ion implantations may also improve the performance of the solar cell. In another embodiment, two different species are successively implanted without breaking vacuum. In another embodiment, the substrate is implanted, then flipped such that it can be and implanted on both sides before being annealed. In yet another embodiment, one or more different masks are applied and successive implantations are performed without breaking the vacuum condition, thereby reducing the process time.
US07888247B2 Method of forming polycrystalline semiconductor film
A method of forming a polycrystalline semiconductor film, which includes irradiating an amorphous semiconductor film formed on an insulating substrate with light to convert the amorphous semiconductor into a polycrystalline semiconductor with laterally grown crystal grains, thus forming a polycrystalline semiconductor film, wherein crystal growth in the semiconductor is controlled such that first crystal grains laterally grow in the first direction along a X-axis from the first group of initial nuclei, the second crystal grains laterally grow in the second direction opposite to the first direction along the X-axis from the second group of initial nuclei arranged apart from the first group of initial nuclei along the X-axis, and the first crystal grains collide against the second crystal grains at different points in time along a Y-axis.
US07888246B2 Semiconductor integrated circuit device and a method of fabricating the same
A method of fabricating a semiconductor integrated circuit includes forming a first dielectric layer on a semiconductor substrate, patterning the first dielectric layer to form a first patterned dielectric layer, forming a non-single crystal seed layer on the first patterned dielectric layer, removing a portion of the seed layer to form a patterned seed layer, forming a second dielectric layer on the first patterned dielectric layer and the patterned seed layer, removing portions of the second dielectric layer to form a second patterned dielectric layer, irradiating the patterned seed layer to single-crystallize the patterned seed layer, removing portions of the first patterned dielectric layer and the second patterned dielectric layer such that the single-crystallized seed layer protrudes in the vertical direction with respect to the first and/or the second patterned dielectric layer, and forming a gate electrode in contact with the single-crystal active pattern.
US07888244B2 Threading-dislocation-free nanoheteroepitaxy of Ge on Si using self-directed touch-down of Ge through a thin SiO2 layer
A method of forming a virtually defect free lattice mismatched nanoheteroepitaxial layer is disclosed. The method includes forming an interface layer on a portion of a substrate. A plurality of seed pads are then formed by self-directed touchdown by exposing the interface layer to a material comprising a semiconductor material. The plurality of seed pads, having an average width of about 1 nm to 10 nm, are interspersed within the interface layer and contact the substrate. An epitaxial layer is then formed by lateral growth of the seed pads over the interface layer.
US07888240B2 Method of forming phase change memory devices in a pulsed DC deposition chamber
A phase change memory including an ovonic threshold switch is formed using a pulsed direct current (DC) deposition chamber using pulsed DC. Pulsed DC is used to deposit a chalcogenide film. Pulsed DC may be also used to deposit a carbon film.
US07888238B2 Method of manufacturing semiconductor device having semiconductor formation regions of different planar sizes
A wafer process material is prepared which has a plurality of semiconductor formation regions of different planar sizes, each including a low dielectric constant film/wiring line stack structure component. A laser beam is applied onto a dicing street of the necessary semiconductor formation region and onto its straight extension in order to remove partial areas of the low dielectric constant film/wiring line stack structure components of the necessary semiconductor formation region and the unnecessary semiconductor formation region so that first groove and the second groove are formed. A protective film is formed in the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component. An upper wiring line and a sealing film are formed on the protective film, and a semiconductor wafer is cut along the dicing street.
US07888237B2 Method of cutting semiconductor wafer, semiconductor chip apparatus, and chamber to cut wafer
A method of cutting a semiconductor wafer includes preparing a semiconductor wafer including a scribe region and a chip region, forming a groove in the scribe region, loading the semiconductor wafer with the groove formed therein in a chamber, and cutting the semiconductor wafer into a plurality of chips through increasing a pressure of the chamber by a first pressure change rate, and then reducing the pressure of the chamber by a second pressure change rate.
US07888235B2 Fabrication of substrates with a useful layer of monocrystalline semiconductor material
A method for fabricating a semiconductor substrate. In an embodiment, this method includes the steps of transferring a seed layer on to a support substrate; and depositing a working layer on the seed layer to form a composite substrate. The seed layer is made of a material that accommodates thermal expansion of the support substrate and of the working layer. The result is a semiconductor substrate that includes the at least one layer of semiconductor material on a support substrate.
US07888234B2 Method for manufacturing a semiconductor body with a trench and semiconductor body with a trench
A method for manufacturing a semiconductor body with a trench comprises the steps of etching the trench (11) in the semiconductor body (10) and forming a silicon oxide layer (12) on at least one side wall (14) of the trench (11) and on the bottom (15) of the trench (11) by means of thermal oxidation. Furthermore, the silicon oxide layer (12) on the bottom (15) of the trench (11) is removed and the trench (11) is filled with polysilicon that forms a polysilicon body (13).
US07888232B2 Method for producing a protective structure
A protective structure is produced by providing a semiconductor substrate with a doping of a first conductivity type. A semiconductor layer with a doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, wherein the buried layer is produced at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone with a doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone with a doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first region and the second region of the semiconductor layer. A common connection device is formed for the first dopant zone and the second dopant zone.
US07888231B2 Method for fabricating a three-dimensional capacitor
A capacitor and a method of fabricating the capacitor are provided herein. The capacitor can be formed by forming two or more dielectric layers and a lower electrode, wherein at least one of the two or more dielectric layers is formed before the lower electrode is formed.
US07888227B2 Integrated circuit inductor with integrated vias
Integrated circuit inductors (5) are formed by interconnecting various metal layers (10) in an integrated circuit with continuous vias (200). Using continuous vias (200) improves the Q factor over existing methods for high frequency applications. The contiguous length of the continuous vias should be greater than three percent of the length of the inductor (5).
US07888225B2 Method of manufacturing an electronic device including a PNP bipolar transistor
A method of manufacturing an electronic device including a PNP bipolar transistor comprises forming a collector in a substrate, depositing a base layer and an emitter layer on the substrate, and growing a nitride interface layer on the base layer as a base current modulation means, such that the nitride interface layer is arranged between the base layer and the emitter layer.
US07888221B2 Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions
The present invention relates to a Tunnel Field Effect Transistor (TFET), which utilizes angle implantation and amorphization to form asymmetric source and drain regions. The TFET further includes a silicon germanium alloy epitaxial source region with a conductivity opposite that of the drain.
US07888220B2 Self-aligned insulating etchstop layer on a metal contact
A semiconductor device comprising a substrate having a transistor that includes a metal gate structure; a first oxide layer formed over the substrate; a silane layer formed on the first oxide layer; and a non-conductive metal oxide layer grown on the metal gate structure, wherein the silane layer inhibits nucleation and growth of the non-conductive metal oxide layer.
US07888207B2 Transistor structures and methods for making the same
Enhancement mode, field effect transistors wherein at least a portion of the transistor structure may be substantially transparent. One variant of the transistor includes a channel layer comprising a substantially insulating, substantially transparent, material selected from ZnO or SnO2. A gate insulator layer comprising a substantially transparent material is located adjacent to the channel layer so as to define a channel layer/gate insulator layer interface. A second variant of the transistor includes a channel layer comprising a substantially transparent material selected from substantially insulating ZnO or SnO2, the substantially insulating ZnO or SnO2 being produced by annealing. Devices that include the transistors and methods for making the transistors are also disclosed.
US07888203B2 Methods of making nonvolatile memory devices
Nonvolatile memory devices and methods of making the same are described. A nonvolatile memory device includes a string selection transistor, a plurality of memory cell transistors, and a ground selection transistor electrically connected in series to the string selection transistor and to the pluralities of memory cell transistors. Each of the transistors includes a channel region and source/drain regions. First impurity layers are formed at boundaries of the channels and the source/drain regions of the memory cell transistors. The first impurity layers are doped with opposite conductivity type impurities relative to the source/drain regions of the memory cell transistors. Second impurity layers are formed at boundaries between a channel and a drain region of the string selection transistor and between a channel and a source region of the ground selection transistor. The second impurity layers are doped with the same conductivity type impurities as the first impurity layers and have a higher impurity concentration than the first impurity layers.
US07888200B2 Embedded memory in a CMOS circuit and methods of forming the same
In some aspects, a method of forming a memory circuit is provided that includes (1) forming a two-terminal memory element on a substrate between a gate layer and a first metal layer of the memory circuit; and (2) forming a CMOS transistor on the substrate, the CMOS transistor for programming the two-terminal memory element. Numerous other aspects are provided.
US07888198B1 Method of fabricating a MOS transistor with double sidewall spacers in a peripheral region and single sidewall spacers in a cell region
An improved source/drain junction configuration in a metal-oxide semiconductor transistor is provided, as well as a novel method for fabricating this junction. This configuration employs gate double sidewall spacers in the peripheral region and gate single sidewall spacers in the cell array region. The double sidewall spacers are advantageously formed to suppress the short channel effect, to prevent current leakage, and to reduce sheet resistance. The insulating layer used to form the second spacers in the peripheral region remains in the cell array region and serves as an etching stopper during the etching step of interlayer insulating layer for contact opening formation and also serves as a barrier layer during the step of silicidation formation. As a result the fabrication process of the resulting device is simplified.
US07888192B2 Process for forming integrated circuits with both split gate and common gate FinFET transistors
A method is disclosed for forming an integrated circuit including a common gate FinFET device and a split gate FinFET device. Taller fins and shorter fins of different heights are formed in a semiconductor surface. Layers of gate dielectric material and gate electrode material are formed over tops and sides of the fins. The gate electrode material layer is planarized using chemical-mechanical polishing to remove the gate electrode material from the tops of the taller fins, leaving the gate electrode material over the tops of the shorter fins. The planarized material is patterned to form split (dual) gate structures on the sides of the taller fins and common gate structures on the tops and sides of the shorter fins.
US07888191B2 Forming floating body RAM using bulk silicon substrate
A method for forming a semiconductor device is provided. The method comprises providing a semiconductor structure comprising a semiconductor substrate and a dielectric layer on the semiconductor substrate, wherein the dielectric layer has an opening through which the semiconductor substrate is exposed; forming a semiconductor strip on the dielectric layer and adjacent the opening, wherein the semiconductor strip is electrically isolated from the semiconductor substrate; forming a gate dielectric over a portion of the semiconductor strip that is over the dielectric layer; forming a gate electrode over the gate dielectric; and forming a source/drain region in the semiconductor strip.
US07888189B2 Method for manufacturing electronic device
A method for manufacturing an electronic device with a plurality of lead frames for individually supporting an electronic component 6 surrounded by a casing 8, which method includes the steps of charging a resin 10 into each casing 8 on a substrate 5 on which the plurality of supporting lead frames are disposed, and cutting the substrate 5 into individual lead frames. The step of charging the first resin includes the step of using a mask 1 that has through-holes 1a in positions corresponding to regions surrounded by the casings 8, to charge the resin 10 into the regions surrounded by the casings 8. The method is capable of improving the productivity of manufacturing electronic devices with lead frames for individually supporting an electronic component surrounded by a casing, and making the shape of the resin that covers the electronic components even.
US07888188B2 Method of fabicating a microelectronic die having a curved surface
Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a device includes a support member and a flexed microelectronic die mounted to the support member. The flexed microelectronic die has a plurality of terminals electrically coupled to the support member and an integrated circuit operably coupled to the terminals. The die can be a processor, memory, imager, or other suitable die. The support member can be a lead frame, a plurality of electrically conductive leads, and/or an interposer substrate.
US07888180B2 Semiconductor apparatus having a first and a second projection portion on opposite surfaces of a semiconductor wafer and method for manufacturing the same
A semiconductor apparatus includes a semiconductor device having electrodes on its opposed frontside and backside, respectively, a first external electrode connected to the electrode at the frontside, the first external electrode having a first major surface generally parallel to the frontside of the semiconductor device, and a first side surface generally perpendicular to the first major surface, and a second external electrode having a second major surface generally parallel to the backside of the semiconductor device, a second side surface generally perpendicular to the second major surface, and a projection protruding perpendicular to the second major surface and connected to the electrode at the backside, The first side surface of the first external electrode and the second side surface of the second external electrode serve as mount surfaces. The semiconductor device is located between the first external electrode and the second external electrode.
US07888178B2 Method to produce reflector with an outer peripheral edge portion of an upper surface uncovered by a reflection film and to produce a lightemitting device using the same reflector
An LED includes a circuit board (1), a light emitter (3) mounted on the circuit board (1), and a reflector (4) mounted on the circuit board (1), the light emitter (3) including an LED element mounted on the circuit board (1) and a light-transmitting resin (2) to seal the LED element. The reflector (4) is configured to surround the light emitter (3) and includes an opening (5) which passes through an upper surface and a lower surface is provided at a central position to allow insertion of the light emitter (3), and an inclined inner surface in the opening (6) configured to be upwardly broadened. A reflection film (7) is provided on the inclined inner surface (6) of the opening in the reflector. A outer peripheral edge is a non-reflection film constituted area (8) and, simultaneously, a terminal position identification mark (10) adjacent to the non-reflection film constituted area (8) are provided. The reflector (4) is cut along a dicing line on the non-reflection film constituted area (8) where the reflection film is not provided, thus preventing the reflection film (7) from being peeled off.
US07888177B2 Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
The present invention is a method of manufacturing a semiconductor device, by forming a wiring on or above a wafer so that the wiring is electrically connected to a first electrode disposed on a first surface of the wafer, forming a first resin layer on or above the wafer such that the wiring is disposed between the wafer and the first resin layer, forming an opening in the first resin layer such that the opening overlaps the wiring, forming a conductive member in the opening such that the conductive member being electrically connected to the wiring, forming a second electrode on the conductive member such that the second electrode is electrically connected to the wiring via the conductive member, and separating the wafer into individual elements after the forming of the first resin layer.
US07888175B2 Method and apparatus for facilitating proximity communication and power delivery
The described embodiments provide a system that facilitates inter-chip alignment for proximity communication and power delivery. The system includes a first integrated circuit chip and a second integrated circuit chip, both of which whose surfaces have corresponding etch pit wells configured to align with each other. A shaped structure is placed in an etch pit well of the first integrated circuit chip such that when the corresponding etch pit well of the second integrated circuit chip is substantially aligned with the etch pit well of the first integrated circuit chip, the shaped structure mates with both the etch pit well of the first integrated circuit chip and with the corresponding etch pit well of the second integrated circuit chip, thereby aligning the first integrated circuit chip with the second integrated circuit chip. In some embodiments the etch pit wells include conductive structures for routing power through a conductive shaped structure.