最新美国发明专利第2010-08-24期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US07782940B2	Methods for encoding or decoding in a videoconference system to reduce problems associated with noisy image acquisition Disclosed herein in one embodiment is an adaptive coding threshold algorithm for a videoconference system which alleviates problems due to the erroneous recoding of stationary areas of images caused by image noise. The algorithm, which is preferably implementable on a videoconference encoder, assesses the coding parameters for a current macroblock and the coding parameters for that same macroblock the last time it was coded. If for both macroblocks the coding was non-intra, with a [0,0] motion vector, and with a low quantization parameter, a determination is made that the current macroblock depicts a stationary image. Accordingly, the algorithm increases the coding threshold (T1) for the blocks within that macroblock, so that it becomes more difficult for those particular blocks to be recoded. This renders the block with stationary content less susceptible to erroneous recoding, while preserving system bandwidth and improving image quality. Additionally, related noise assessment techniques can be employed at the encoder or decoder without the adjustment of the coding threshold T1.
US07782936B2	Moving picture coding method and moving picture decoding method According to the present invention, a moving picture coding apparatus (70) for performing inter-picture predictive coding for pictures constituting a moving picture is provided with a coding unit (103) for performing predictive error coding for image data; a decoding unit (105) for performing predictive error decoding for an output from the coding unit (103); a reference picture memory (117) for holding output data from the decoding unit (105); and a motion vector detection unit (108) for detecting motion vectors on the basis of the decoded image data stored in the memory. When coding a B picture as a target picture, information indicating whether or not the target picture should be used as a reference picture when coding another picture is added as header information. Therefore, in a decoding apparatus for decoding a bit stream Bs outputted from the moving picture coding apparatus (70), management of a memory for holding the reference picture can be facilitated on the basis of the header information.
US07782918B2	Laser apparatus and production method of laser apparatus Provided are a laser apparatus into which a large current can be injected and a production method which enables easy production of the apparatus. A laser apparatus includes a light-emitting region on a substrate, and a periodic refractive index structure containing an i-type material provided at a periphery of the light-emitting region. Another laser apparatus includes a light-emitting region between a first electrode and a second electrode on a substrate, wherein at least one of the first and the second electrodes includes a periodic refractive index structure.
US07782917B2	Laser driving circuit, optical pickup and recording/reading equipment Disclosed is a laser driving technique capable of reducing power consumption in a laser driving circuit to achieve reduced heat generation in an optical pickup of a recording/reading equipment for an optical disc. A base-voltage control circuit is connected to a base of a grounded-base cascode transistor connected between a driver circuit and a laser diode (LD), and a LD-anode-voltage control circuit is connected to an anode of the laser diode. The base-voltage control circuit and the LD-anode-voltage control circuit are connected to a controller, and operable to variously change an anode voltage of the laser diode and a base voltage of the cascode transistor depending on a driving current for the laser diode.
US07782912B2	Yb: and Nd: mode-locked oscillators and fiber systems incorporated in solid-state short pulse laser systems The invention describes classes of robust fiber laser systems usable as pulse sources for Nd: or Yb: based regenerative amplifiers intended for industrial settings. The invention modifies adapts and incorporates several recent advances in FCPA systems to use as the input source for this new class of regenerative amplifier.
US07782910B2	Single-polarization high power fiber lasers and amplifiers A novel polarization maintaining optical fiber, which can be used as a high-power polarization maintaining fiber laser or amplifier, is described. Insensitivity of the polarization state to external fiber bending and temperature changes is accomplished by minimizing polarization mode-coupling via reducing stresses inside the fiber core via increasing the fiber diameter. Alternatively, polarization mode-coupling can be minimized by an optimization of the fiber coating to minimize stresses at the interface between the fiber and the coating. As a result insensitivity to polarization mode-coupling is obtained at greatly reduced values of birefringence compared to small-diameter fibers. The fiber is of significant use in any application where polarization stability is important, and will be useful in telecommunications applications in particular for reducing polarization mode dispersion. An implementation in a parabolic pulse-producing fiber laser is also described as one specific high power example.
US07782908B2	Method and a feed circuit for feeding a stream of digital transmission data into a transmission medium having frequency suppression A feed circuit accepts a stream of digital payload data and inserts it at predetermined first positions into a stream of digital transmission data. The feed circuit generates supplementary digital data using the stream of digital payload data and inserts it at predetermined second positions into a stream of digital transmission data. The feed circuit feeds the digital transmission data into a transmission medium. Said circuit determines the supplementary digital data in such a way that at least one frequency's portion of a frequency spectrum of the stream of digital transmission data will be minimized.
US07782903B2	Hardware accelerated protocol stack Protocol stack layer processing for a MediaFLO™ mobile multimedia multicast system comprising a transmitter comprising a host processor and a host memory component. The processing includes a receiver that receives a wireless data stream comprising a MediaFLO™ mobile multimedia multicast system superframe comprising any of audio, video, and text media frames arranged in multiplexed Multicast Logical Channels (MLCs) and received from the transmitter, wherein each MLC is divided into 16 byte data packets, and wherein each MLC carries up to three logical sub-channels comprising stream 2, stream 1, and stream 0; and an Application Specific Integrated Circuit (ASIC) memory component operatively connected to the receiver, wherein the ASIC memory component performs processing of the data packets using hardware components comprising, a Medium Access Control (MAC) layer core; a stream layer core; a decryption layer core; a defragmentation layer core; and a sync layer core.
US07782898B2	Wideband cable system A wideband cable modem system increases available bandwidth of a single channel by encoding a data stream into wideband packets. The wideband packets are associated with a logical wideband channel that extends over multiple physical downstream cable channels.
US07782897B1	Multimedia over internet protocol border controller for network-based virtual private networks A method for communicating packet multimedia data between a source endpoint and a destination endpoint is disclosed, wherein at least the source endpoint is within a virtual private network, and comprises the steps of receiving, at a signaling controller, a first signaling packet from the source endpoint, wherein the source endpoint is within a virtual private network; determining whether the source endpoint and destination endpoint may communicate directly over the same virtual private network; when the source endpoint and destination endpoint cannot communicate directly over the same virtual private network, associating a unique identifier of the source endpoint with a virtual private network identification marker; when the source endpoint and destination endpoint can communicate directly over the same virtual private network, instructing the source endpoint and destination endpoint to communicate media packets directly.
US07782894B2	Ultra-wideband/low power communication having a dedicated removable memory module for fast data downloads—apparatus, systems and methods In a mobile environment, a mobile device includes an attached memory stick (removable memory) having a high speed—memory and storage with direct memory access embodied in an integrated circuit chip coupled to an ultra-wideband (UWB) transceiver. The mobile device communicates with other like base devices, portable or stationary, via UWB transmissions using pulse bursts up to 1 Gbit per second. Data transfers between the devices occur in the simplex or duplex mode, after a low power communication connection is established between the devices. The communication link between the devices is in the range of 10-20 meters. The communication system allows existing device bus interfaces (which are much slower than ultra-wideband transmissions) to communicate between the fast read/write cycles of the memories integrated within the memory stick. Duplex transmission can occur by pulse interleaving sending side transmitters and receiving side transmitters.
US07782889B2	Method for regulating the transmission parameters of broadband transmission channels assembled to form a group The invention relates to a novel algebraic method wherein sub-groups of subscribers that spectrally influence each other, in a group of broadband subscriber connections or transmission channels connected to an intelligent network node in a star-shaped manner are classified by observing status variations in operation or in test phases of the individual transmissions, and the spectral influence relation or interference relation is identified with or without using specific test signals during the operation of the network node, without interrupting the data transmissions. The fundamental parameters of the data transmission methods of all of the connected subscribers are optimized from the information obtained in this way, for maximum operator use.
US07782882B2	Method and apparatus for distributing dynamic auto-summarization of internet protocol reachable addresses A computer implemented method, apparatus, and computer usable program code for managing addresses in a network. In one advantageous embodiment, a computer implemented method is used to managing addresses for a plurality of destinations in a network. Addresses assigned to a plurality of gateways are summarized to form summarized addresses containing prefixes and addresses for the plurality of gateways in which each gateway in the plurality of gateways is associated with a portion of the prefixes and addresses for destinations handled by the each gateway in the plurality of gateways. A gateway in the plurality of gateways having a largest portion of the summarized addresses is assigned a prefix for all addresses assigned to the network to form a selected gateway. An associated portion of the summarized addresses for the selected gateway is replaced with the prefix.
US07782878B2	System and method for sharing an IP address Means for sharing an IP address between a first and second network device, the first device having an assigned IP address and the second network device having one or more port numbers reserved for use solely by the second network device. The second network device is connected serially between the first network device and an Internet access device. The second network device creates packets using the IP address and one of the one or more reserved port numbers and sends the packets to the Internet access device.
US07782874B2	Apparatus and method for route summarization and distribution in a massively parallel router A router for interconnecting external devices coupled to the router. The router comprises a switch fabric and a plurality of routing nodes coupled to the switch fabric. Each routing node is capable of transmitting data packets to, and receiving data packets from, the external devices and is further capable of transmitting data packets to, and receiving data packets from, other routing nodes via the switch fabric. The router also comprises a control processor for comparing the N most significant bits of a first subnet address associated with a first external port of a first routing node with the N most significant bits of a second subnet address associated with a second external port of the first routing node. The router determines a P-bit prefix of similar leading bits in the first and second subnet addresses and transmits the P-bit prefix to other routing nodes.
US07782873B2	Omni-protocol engine for reconfigurable bit-stream processing in high-speed networks A reconfigurable, protocol indifferent bit stream-processing engine, and related systems and data communication methodologies, are adapted to achieve the goal of providing inter-fabric interoperability among high-speed networks operating a speeds of at least 10 gigabits per second. The bit-stream processing engine operates as an omni-protocol, multi-stage processor that can be configured with appropriate switches and related network elements to create a seamless network fabric that permits interoperability not only among existing communication protocols, but also with the ability to accommodate future communication protocols. The method and systems of the present invention are applicable to networks that include storage networks, communication networks and processor networks.
US07782852B2	Multiple modulation rate 10Gbase-T transmission A device and method of high-speed transmission is disclosed. The method includes computing a signal quality of a received signal, the received signal being transmitted with a modulation order required by a default transmission modulation format. The signal quality is compared with a signal quality threshold required of the default transmission modulation format. If the signal quality is below the signal quality threshold, an indication of a level of signal quality failure is provided to a transmitter. The transmitter sets a number of un-coded bits within the transmission signal based upon the level of signal quality failure.
US07782849B2	Data switch and switch fabric Variable length switch fabric for switching variable length data packets between input and output transmission paths in a communication network. In one embodiment of the invention, apparatus is provided for switching variable length data packets between input and output transmission paths in a communication network. The apparatus includes a plurality of input ports coupled to receive the plurality of variable length data packets from the input transmission paths and a plurality of output ports coupled to transmit the plurality of variable length data packets on the output transmission paths. The apparatus also includes a variable length switch fabric coupled to the plurality of input ports and the plurality of output ports, the variable length switch fabric operates to switch the plurality of variable length data packets from selected input ports to selected output ports in an unsegmented form.
US07782844B1	Method and apparatus for pattern matching on single and multiple pattern structures The present invention provides a method and apparatus for detecting and decoding data. The method comprises: receiving a set of data signals from an external data source; detecting a size of said received set of data signals; decoding said received set of data signals; extracting a destination address from said set of data signals; comparing said destination address extracted from said data signals to a known data value; determining whether said received data signals should be received by a host circuitry based upon said comparison of said destination address extracted from said data signals to a known data value; generating at least one status signal alerting said host circuitry of said determination that said received data signals should be received by said host circuitry; and waking up said host circuitry upon a determination that said received set of data is addressed to said host circuitry. The apparatus comprises: a data formatter; a clock divider; a counter; a host circuitry interface capable of transmitting and receiving data from a host circuitry; a memory circuitry; a plurality of comparators; a mask circuitry; a digital logic circuitry; a plurality of status registers; and a plurality of clocked registers.
US07782842B2	Methods and apparatus to perform outdial communication services Methods and apparatus to perform outdial communication services are disclosed. A disclosed method to route an outdial call from a first communication device to a first endpoint comprises receiving an indial call setup from a second endpoint at the first communication device, wherein the call setup contains an access number used to route an indial call associated with the indial call setup from the second endpoint via a second communication device to the first communication device, and selecting, based on the access number, a route for the outdial call that includes the second communication device, wherein the second communication device is configured to communicatively couple the first and the second endpoints.
US07782840B1	Internet telephony with interactive information A subscriber (12, 14, 16) initiating an Internet telephony call may receive specific content targeted to that subscriber in accordance with a match between at least one of the dialed number and the calling party number. Upon receipt of the subscriber's Internet telephony call, an Internet Telephony Service Provider server (18) searches each of a dialed number database, a calling party number database and a default database to establish a match between the calling party number, the dialed number or a range of either numbers. Upon finding a match, the Internet Telephony Service Provider server retrieves corresponding content, typically in the form of a URL that links to an associated web site, to provide to the subscriber who may elect to retrieve that information at the subscriber's discretion.
US07782839B2	Communication terminal, control method of the same, and control program of the same A communication terminal includes a resource transfer button for transferring URL information of an Internet resource to another party with which IP phone conversation has been established so as to allow the browser of the communication terminal of the other party to browse the Internet resource. The URL information of an Internet resource is registered to a one-touch key. Registering the selection information of the communication terminal of the other party and the URL information of an Internet resource enables the URL information thereof to be transferred to the communication terminal of the other party with which the phone conversation has been established immediately following calling the other party by pressing the one-touch key, so as to allow the browser of the communication terminal of the other party to browse the Internet resource. Thus, both the calling and receiving parties can browse the same Internet resource with the respective terminals.
US07782838B2	Intermediate packetizing of voice data for communication between circuit-switched network nodes A method for routing voice data includes establishing a first path between a remote originating node and a gateway using a first channel of a circuit-switched network. The gateway is communicatively coupled to the circuit-switched network and a packet-switched network. A second path is established between an answering node and the gateway using a second channel of the circuit-switched network, if the answering node is remote relative to the packet-switched network. Otherwise the second path is established using the packet-switched network, if the answering node is local to the packet-switched network. The gateway converts any first circuit-switched voice data received on a first channel to packet-switched voice data. Any packet designating an associated remote node is converted to second circuit-switched voice data. The second circuit-switched voice data is communicated to its associated remote node on the second channel.
US07782837B2	Spectral compatible remote asymmetric digital subscriber line plus (ADSL+) deployment For ADSL+ deployment between a remote cabinet and customer premises, the upper part of the traditional ADSL downstream frequency band is used whereas the lower part of this trasitional ADSL downstream frequency band is switched off through spectral masking. This way, ADSL+ deployment from the remote cabinet is spectral compatible with ADSL deployment from the central office for a certain service capability wherein the upper part of the traditional ADSL downstream frequency band is switched off.
US07782834B2	Routing header based routing in internet protocol (IP)-cellular networks Internet protocol version 6 (IPv6) is substantially utilized throughout the entire cellular network and employs routing headers of the packets to ensure that the packets are routed via the gateway router (GR) to the end destination which is accomplished by a user equipment (UE) specifying the IP address of the gateway router as the IP address of an intermediate router in the routing header. Packets may also be routed to UEs from the GR through an intermediate router.
US07782831B1	System and method for dynamically defining a TDMA management cycle for a wireless network A method for dynamically implementing a TDMA management cycle for a wireless network is described. The method includes communicating between nodes in the wireless network using a time division multiple access structure, the time division multiple access structure including time divisions having time frames, each time frame having a plurality of time slots, the plurality of time slots including TDMA management slots. The method further includes defining a node partition, the node partition including all of the nodes within the wireless network that are able to route messages to each other, defining a TDMA management cycle, the TDMA management cycle configured to include a TDMA management slot assigned to every node within the partition, storing, at each node, an assignment of the node to a TDMA management slot number, and dynamically adapting the size of the TDMA management cycle based on the number of active nodes in the partition, wherein the size of the TDMA management cycle is a multiple of a base cycle.
US07782820B2	Method of detecting discontinuous transmission (DTX) and method of generating a signal metric for use in DTX detection In a method of detecting whether a transmitted data frame is a discontinuous transmission (DTX) frame, a signal metric corresponding to the transmitted data frame is generated in a decoding operation used to decode the data frame from a signal carrying the frame that is received by a base station receiver. A signal energy of the transmitted data frame is determined based on the signal metric, and used for determining whether the transmitted data frame is a DTX frame.
US07782818B2	System and method for providing a connection in a communication network The invention proposes a system and method for providing a connection in a communication network which comprises several network elements and is adapted to route a connection via a first network element such as a radio network controller and one or more of alternatively selectable second network elements such as serving nodes. The network comprises a network element which stores a list of selectable second network elements. The list is accessed using an identifier identifying a routing or location area or a desired second network element. The list can be stored in a DNS server which returns to an inquiring network element such as a radio network controller, e.g. IP addresses of serving nodes capable of serving a routing or location area of a connection originating or terminating network element. The connection originating or terminating network element may also be adapted to send an identifier identifying a specific network element such as an SGSN to which it desires to be connected.
US07782813B2	Monitoring network traffic A method for monitoring a wireless network includes, at a device including a communication interface coupling the device to a wireless network, monitoring messages transmitted between the communication interface and the wireless network, and outputting monitoring data associated with the monitored messages from the device.
US07782812B2	System and method for multiplexing PDH and packet data A method of efficiently combining data from at least a plurality of a first type of data source and a second type of data source. The method comprises synchronizing the plural first type of data sources to thereby generate a synchronized data rate, providing a frame having plural bit positions, assigning the synchronized first type of data in ones of the bit positions of the frame, and arranging the second type of data in the frame as a function of the synchronized data rate.
US07782805B1	High speed packet interface and method A high speed multi-lane serial interface and method for constructing frames for such an interface are provided. Frames are constructed for transmission on a multi-lane serial interface. For each of a plurality of transmit channels, packets are fragmented into fragments. Meta-frames are generated having a size defined by a constant meta-frame length×number of lanes, each frame having a meta-frame separator and a payload. Per-transmit channel flow control information is received. Each payload has a plurality of bursts, each burst comprising a burst control word and an associated data burst, the burst control word identifying one of said transmit channels to be transmitted on the associated data burst, each data burst comprising one of the fragments for the transmit channel identified in the associated burst control word. The channels to transmit in a given meta-frame are selected as a function of the received flow control information.
US07782804B2	Remote wireless activation and communication A system and method of wireless communication. An activator comprises a first radio that transmits an activation message; a first microprocessor; a first memory component; and a first timer. A remote device comprises a second radio that periodically enters into an activation period of operation and a de-activation period of operation in order to conserve power; a second microprocessor; a second memory component; and a second timer. The first radio transmits the activation message repeatedly and continuously for a period at least equal to the sum of the activation period of operation and the de-activation period of operation of the second radio. At least one complete activation message is transmitted by the activator during every period of time allotted for activation of the second radio. The second radio increases a frequency of activation of the second radio upon receipt of a designated activation message from the first radio.
US07782799B2	Join message load control system and method in network using PIM-SSM A Join message load control system in a network using a Protocol Independent Multicast-Source Specific Multicast (PIM-SSM) protocol, the Join message load control system including a source access hop router creating a SOURCE-INACTIVE message and transmitting the created SOURCE-INACTIVE message when a multicast traffic is not received from the multicast server during a set Keep-Alive Time (KAT), and the SOURCE-INACTIVE message including information on an update set time of a PIM Join message; and a group access hop router resetting the update set time of the PIM Join message when the SOURCE-INACTIVE message is received from the source access hop router. Accordingly, it is possible to reduce the periodical transmission of unnecessary Join(S, G) messages and thereby reduce traffic load in a network by adjusting a JP timer of the Join(S, G) message depending on whether a channel(S, G) is active or inactive.
US07782798B2	Method for identifying node reachability, method for identifying whether a link is an external link, method for calculating a routing, and method for disseminating node address information The present invention discloses a method for identifying node reachability, a method for identifying a link, a method for calculating a routing, and a method for disseminating node address information. In the method of the node address information dissemination, when the network is initiated, each node in the automatically switched optical network performs a node address aggregation process and an aggregation address dissemination process, and obtains and stores the aggregation address respectively. Therefore, any node in the network may judge whether the node and another node in the network are reachable to each other, and may further calculate the routing between the source and destination nodes pair. Moreover, the present invention also may determine whether any traffic engineering link in the multi-level ASON network is an external link or an internal link.
US07782797B2	Methods and apparatus for self partitioning a data network to prevent address conflicts Methods, devices and computer program products for self partitioning a data network are provided. A network device that is using an address of another network device is identified, the network is automatically partitioned to eliminate the potential conflict, and address conflict resolution is initiated. Partitioning the network may include closing a port over which the routing packet was received from the network device that advertised the conflict, or may include closing the logical connection to that network device. A routing database may be cleared of information previously received from the network device that advertised the conflict so that no routes exist through that device any more. Conflict resolution may include assigning a different address to the network device identified as having a conflicting address, and then allowing the identified network device to communicate with other network devices using the newly assigned address.
US07782787B2	Rapid fault detection and recovery for internet protocol telephony Techniques for performing rapid fault detection and recovery in communication networks are disclosed. For example, in one aspect of the invention, a technique for detecting one or more conditions in a communication network comprises the following steps/operations. One or more keep-alive packets are transmitted from a source node in the communication network to a destination node in the communication network over two or more paths between the source node and the destination node, wherein the two or more paths are at least partially disjoint. Upon receipt of the one or more keep-alive packets at the destination node via the two or more paths, at least one quality measure is computed at the destination node for each of the two or more paths, the at least one quality measure being indicative of one or more conditions in the communication network. While not limited thereto, the invention is particularly well-suited to Internet Protocol (IP) telephony networks, particularly those that provide Voice over IP (VoIP) applications.
US07782783B2	Methods and systems for centralized link power management control (CLMC) A method for centralized link power management control (CLMC), performed by a north-bridge of a processing unit, comprises the following steps. A data transmission status of a bus is monitored. CLMC is activated to configure devices corresponding to the bus in order to speed up data transmission of the bus when detecting that the data transmission status of the bus is continually busy. CLMC is activated to configure devices corresponding to the bus in order to slow down data transmission of the bus when detecting that the data transmission status of the bus is continually idle.
US07782778B2	Apparatus and method for fibre channel distance extension embedded within an optical transport system This invention provides an apparatus and method to aggregate individual fiber channel data streams in their native mode and to extend connectivity of fiber channel storage area networks across wide geographical distances over a high-speed data channel with forward error correction.
US07782776B2	Shared weighted fair queuing (WFQ) shaper A network device includes a port, a buffer, a flow control module, and a service differentiation module. The port is configured to send and receive a packet, wherein the port is connected to a network entity. The buffer is configured to store the packet. The flow control module is configured to control the transmission of the packet within the network device. The service differentiation module is coupled with the buffer and the flow control module. The service differentiation module is configured to regulate storage of the packet in the buffer and to regulate the transmission of the packet from the network device to the network entity. The service differentiation module is also configured to determine excess bandwidth available within the network device and to allocate the excess bandwidth to transmit the packet to the network entity.
US07782774B2	TCP optimized single rate policer An extension to the conventional single rate microflow policer that provides dual rate policing with a minimum of extra resource utilization. Using the extended microflow policer, an aggressive TCP flow ramps up to exceed the policer rate, setting a burst drop flag. Once the flow rate exceeds the burst rate, a single packet is dropped and the burst drop flag is cleared. On seeing the single packet drop, the TCP sender is then expected to reduce its rate. Flows that do not back off will eventually exceed a higher, hard drop threshold and experience packet drop. An aggressive TCP rate thus oscillate around the burst rate, efficiently approaching the hard drop rate without exceeding it. The addition of only a single bit flag avoids the cost of a dual-rate policer and the tail drop behavior induced by a single rate policer.
US07782772B2	Method for unidirectional and bidirectional label switched path setup in a label switched network Label contention in a label switched network is resolved by applying a contention resolution scheme that reconciles policies for handling unidirectional and bidirectional label switched path setup.
US07782767B1	Method and system for calculating burst bit rate for IP interactive applications A method and apparatus for determining the burst bit rate for data in the transport layer of a network is described. The burst bit rate is determined by measuring the time for a total number of bytes to be transferred across a point in the network and adding that time to an estimated network delay. The total number of bytes transferred is then divided by the transfer time plus the estimated network delay thereby calculating the burst bit rate for the transfer.
US07782758B2	Efficient loss recovery architecture for loss-decoupled TCP The invention provides a method and apparatus for decoupling loss recovery from congestion and window control. The system provides improved performance in high loss environments such as wireless links. The system avoids unnecessary window adjustment in response to packet losses. Transmission rates can be maintained without compromising loss recovery. The invention uses just-in-time Packet Expiration, Transmission Order Queue, a Forward Retransmission Algorithm and Window Control to provide improved performance. The invention maintains a queue of packets in flight called the Transmission Order Queue (TOQ). When an acknowledgement is received for a packet in the in-flight queue, that packet is removed from the queue. If a packet is still in the queue for a certain threshold time, the invention assumes that it is lost. At that point, the packet is removed from the in-flight queue and the packet is retransmitted.
US07782751B1	Systems and methods for computing a relative path delay between multiple transmission sources Systems and methods are provided for computing a relative path delay between multiple transmitting source to select a source that is closest to a receiving device. Preamble sequences unique to each source are received by a receiving device. The receiving devices determines based on a channel estimation or differential algorithm which transmitting source is closer to the receiving device. The channel estimation algorithm computes the path delay based on a channel estimation correlation at different preamble sequence indices. The differential algorithm computes the path delay based on a correlation between the received and transmitted preamble sequences at different preamble sequence indices. The receiving device selects the closer of the multiple sources to be the source from which to extract data.
US07782747B2	Optical information recording medium including super resolution reproducing film, method for reproducing optical information recording medium, and optical information processing apparatus using optical information recording medium In order to realize (A) an optical information recording medium in which information is stored in high density and can be precisely and securely reproduced, (B) a method for reproducing the optical information recording medium, and (C) an optical information processing apparatus using the optical information recording medium, an optical information recording medium 1, 2, or 3 of the present invention includes: (a) a substrate 12, having pits and/or grooves, each of which is made up of a rise and a recess, and each of which corresponds to recorded information that is optically reproduced by irradiation of a light beam; and (b) at lease one super resolution reproducing film 13, which has an optical property to be changed in response to a temperature increase caused by the irradiation of the light beam, the optical property of the super resolution reproducing film being reversibly changed depending on a temperature change in the super resolution reproducing film. The optical information recording medium 3 of the present invention further includes a recording layer.
US07782745B2	Optical disk The invention provides an optical disk that enables high-speed reproduction of address signals. A wobble address system for optical disk supports various types of synchronization, such as phase synchronization, bit synchronization, word synchronization, etc., to be established easily with high detection reliability with the use of an self-orthogonal code. Thus, the invention provides a method for easily synchronizing an address signal, i.e., high-speed reproduction of the address signal. Further, by virtue of an efficient modulation system of the address signal and redundancy thereof, it becomes possible to detect address information with high reliability. This capability is particularly effective in optical recording/reproduction with a blue light source whose signal light quantity and reproduction quality are prone to reduce. Moreover, other additional data of the address data is preserved in the wobbles, which provides medium information to a rewritable optical disk without using embossed pits such that a high-reliability disk (with enhanced security) is realized with a low cost and easily.
US07782743B2	High density phase-change type optical disk having a data efficiency of more than 80 percent An optical disk includes a groove and a land. Data is recorded on either the land or the groove. A pitch of the groove and a pitch of the land are 0.32 μm or more. The optical disk has a data efficiency of 80% or more by adopting a format in which other types of user data are added to every plural user data sets. The data efficiency is defined by a ratio of a user data capacity that can be used by a user to a total data capacity of the optical disk.
US07782741B2	Probe-scanned ferroelectric media with imprinted regions Ferroelectric media includes a media surface that is scannable by a contact. The contact provides a read signal. A polarization pattern is written in first regions of the media surface. The polarization pattern represents position data. The first regions are selectively exposed to an energy source. The exposing provides an imprint to the polarization pattern that prevents subsequent erasure by the read signal.
US07782740B2	Optical disc having small access units and address information modulation method therefor An address information modulation method includes using a first characteristic of a first modulation method and a second characteristic of a second modulation method to modulate address information and/or additional information. Accordingly, a data amount of information, to access a disc, in a predetermined space of the disc is increased, and the modulated information is formed in a form of a wobble signal in a track. Here, the first characteristic of the first modulation method can be physical location information of an MSK-modulated signal, and the second characteristic of the second modulation method can be sign information of a second harmonic wave obtained by an HMW modulation, which synthesizes a cosine function of a basic frequency of a wobble signal with a sine function having a frequency that is a multiple of the basic frequency of the wobble signal. Therefore, where the address information is modulated, a plurality of information bits are loaded on a predetermined number of wobble or carrier signals to increase the amount of the information in the predetermined space, such that a physical length of the information needed in accessing the disc and reading the additional information thereof is shortened. Also, where a defect occurs, the resulting loss can be reduced such that addressing specifications for a small-sized high density disc can be satisfied.
US07782734B2	Optical pickup which is compatible with multiple types of media An optical pickup which is compatible with different types of media is disclosed. A plurality of light sources emit light with different wavelengths. Light path changers change the path of light emitted by the plurality of light sources so that the light is incident upon an objective lens. The objective lens focuses the incident light onto a recording medium. A collimating lens is disposed in front of the objective lens to collimate the incident lights. The collimating lens is movable to correct a spherical aberration. A diffractive optical element is disposed in a path of a light with a short wavelength and has a diffractive surface to correct a chromatic aberration.
US07782733B2	Hologram recording and reproduction apparatus A hologram recording and reproduction apparatus is disclosed which can raise the degree of freedom in design to achieve miniaturization thereof and can raise the hologram recording density of the shift multiplexing type. Upon recording, recording light specially optically modulated by a spatial optical modulator and reference light having a wave front disturbed at random by a randomizing phase mask are coupled so as to have a common optical axis and introduced to a recording area of a hologram recording medium. As a result, the number of lenses to be moved so as to follow up the variation of the position of a recording area or a reproduction area can be reduced. Further, the random disturbance of the wave front of the reference light makes the shift selectivity sharp in both of the along-track direction and the cross-track direction.
US07782731B2	Optical hard disk drive having a phase-change microhead array chip An optical data-storage hard disk drive that uses stationary Phase-Change Microhead Array Chips in place of conventional flying-heads, rotary voice-coil actuators, or other similar types of servo-tracking mechanisms to simultaneously record and/or reproduce data to and/or from a multitude of data-tracks located across the data-surfaces of a multitude of phase-change based disc media using a multitude of microheads.
US07782730B2	Optical-pickup-adjustment optical disk, method of adjusting optical pickup device, and method of producing optical pickup device An optical-pickup-adjustment optical disk used for adjusting or producing an optical pickup device, includes a transparent protective substrate; and an optical-pickup-adjustment middle-depth information recording layer formed on a side of an inside surface of the transparent protective substrate, wherein the optical-pickup-adjustment middle-depth information recording layer is formed to have a middle depth which is a center of the maximum depth of the maximum-depth information recording layer prescribed by the optical disk standard and the minimum depth of the minimum-depth information recording layer prescribed by the optical disk standard.
US07782721B2	Digital focus and tracking servo system with multi-zone calibration A multi-zone calibration system is disclosed. The multi-zone calibration system calibrates the operating parameters of an optical disk drive over a plurality of zones over an optical media. The optical media, in addition, can have writeable and premastered portions. The operating parameters can be calibrated for each of the media types in each of the zones. Additionally, the operating parameters can be calibrated for each type of operation (e.g., read or write) in each zone.
US07782720B2	Method for driving an actuator, actuator drive, and apparatus comprising an actuator An actuator driver circuit includes a drive signal source and an electrical damping element having a negative resistance connected in series with the drive signal source. A controllable switch is provided for selectively switching the electrical damping element into or put of a signal path from a drive signal source output to a driver circuit output, in order to selectively change the electrical damping of an actuator. For example, the electrical damping of a radial actuator or a focus actuator of an optical disc drive is increased in case of loss of track or loss of focus.
US07782718B2	Analogue time display for motor vehicle The invention concerns an electronic watch including analogue display means formed of at least one hand (10) driven by a stepping motor (12), at least one time base (24, 26) for providing time data (h. m) to means (16) for controlling and driving said stepping motor, a main power source (20), means (22) for detecting a lack of sufficient power from said main power source, non-volatile storage means (32) powered by an additional power source (28), for containing said time data when a lack of sufficient power is detected, and characterized in that said non-volatile storage means are further provided for containing the stepping motor position data (μpas) when said lack of sufficient power is detected.
US07782711B2	Pest deterrent An improved in-ground pest deterrent composed of a hollow plastic spike which houses a sonic pulse producer and is battery powered in which the sonic pulse producing circuitry is fixed and shielded within the housing such that when a removable battery sleeve is removed, the sonic pulse producing circuitry remains within the housing.
US07782705B2	Word line decoder circuit A word line decoder circuit is provided in the present invention. The word line decoder circuit comprises at least one local pre-decoder, at least one 3-transistors row driver, a controllable power supply, and a controllable pull-down circuit. The controllable power supply is controlled by an inversed sector select signal to provide a first voltage to the row driver and local pre-decoder. The local pre-decoder uses 5-transistors architecture, in which there are 2 PMOS transistors and 3 NOS transistors. The controllable pull-down circuit pulls down the local pre-decoder and is controlled by a sector select signal and pre-decoding signal. The local pre-decoder receives a local pre-decoding signal to select the row driver. When the row driver is selected, the row driver determines a word line according to a row driver pull-down signal and a row driver pull-up signal.
US07782702B1	Apparatus and method for memory cell power-up sequence A method and apparatus is provided to enhance the power-up sequence for integrated circuits (ICs) that contain memory cells having single-ended data inputs with no local reset function. During a power-up sequence, the logic levels that are applied to the data, address, and power inputs of the memory cell are restricted to particular magnitudes by a power-on reset (POR) state machine. First, the data input of the memory cell is held to a logic low value while an address signal of the memory cell is allowed to be asserted to a logic high value in conjunction with activating a power supply that provides operational power to the IC. Next, the address input to the memory cell ramps up to full logic high value, while the regulated power supply to the memory cell array is held low. The regulated power supply then ramps up to an operational level to bias the memory cell into a known logic state.
US07782700B2	Semiconductor memory device In a semiconductor or memory device, a first ODT (On Die Termination) circuit is provided between a termination voltage port and a command input port. A first ODT controlling circuit is connected between the termination voltage port and the first ODT circuit, and detects a level of a voltage applied to the termination voltage port and controls the first ODT circuit to connect the termination voltage port and the command input port based on the detection result.
US07782697B2	DRAM with hybrid sense amplifier In one embodiment, a hybrid DRAM is provided that includes: a sense amplifier including a differential amplifier and regenerative latch, wherein the differential amplifier and regenerative latch are constructed using core transistors; and a plurality of memory cells coupled to the sense amplifier through a pair of bit lines, wherein the memory cells are constructed using I/O transistors.
US07782695B2	Compensated current offset in a sensing circuit A sensing circuit with current offset functionality. In one embodiment, the sensing circuit includes a memory circuit having a first offset circuit operative to offset a first current. The sensing circuit also includes a reference circuit coupled to the memory circuit, where the reference circuit includes a second offset circuit operative to offset a second current. The sensing circuit also includes a compare circuit coupled to the memory circuit and the reference circuit, where the compare circuit determines the state of a memory cell based on first current and the second current. According to the system disclosed herein, the first and second offset circuits optimize the performance of the sensing circuit and prevent errors when determining the state of the memory cell.
US07782693B2	Semiconductor memory device and operation control method thereof A semiconductor memory device and an operation control method thereof are provided. The method may comprise executing a control such that a precharge operating mode and an active operating mode may be successively performed in response to one pre-active command, thereby reducing the current consumption and loading of the system, and thus, enhancing system performance.
US07782692B2	Single end read module for register files A read module for register files includes at least one local I/O module coupled to a memory cell for outputting a value stored in the memory cell; and at least one global bit line driver having an input terminal coupled to the local I/O module, and a output terminal coupled to a global bit line for selectively pre-charging the global bit line at a default voltage in response to a local pre-charge signal, and outputting the value stored in the memory cell to the global bit line when the local pre-charge signal is not asserted.
US07782690B2	Memory control circuit and semiconductor device A semiconductor device includes plural switching transistors configured to perform trimming for characteristic adjustment of the semiconductor device, and a nonvolatile memory connected to the plural switching transistors and configured to store data for determining ON and OFF of the plural switching transistors. When the semiconductor device is in operation, ON and OFF of the switching transistors are determined by the data.
US07782689B2	Semiconductor integrated circuit and memory checking method The semiconductor integrated circuit includes a memory for storing secret data, a memory BIST circuit for executing a memory. BIST, a first selector for switching between a path for a memory isolation test via an external terminal and a path from the memory BIST circuit, a second selector for switching between a path from the output of the first selector and a path from a normal circuit and having an output coupled to the memory, and a third selector for switching between a path from the output of the memory and a path for receiving a pseudo signal and receiving a check completion signal outputted from the memory BIST circuit as a selection signal. In this semiconductor integrated circuit, after the memory is initialized by executing the memory BIST, the memory can be accessed from the external terminal via the path for the memory isolation test.
US07782688B2	Semiconductor memory device and test method thereof Provided are a semiconductor memory device and a test method thereof. The semiconductor memory device includes: a die in which a plurality of internal circuits are integrated; a plurality of first and second channel pads having a first pad size and a first pad pitch, disposed in an alternating manner in a straight line at a center part of the die, and divided into a plurality of parallel rows, wherein the plurality of first and second channel pads are configured to selectively contact test probes in an alternating manner to receive an external wafer test signal and to output a signal generated by the plurality of internal circuits to the exterior. Therefore, it is possible to perform a test using plural channel pads during a wafer test of the semiconductor memory device using a plurality of probes of a probe card without incorrect contacts or non-contact with adjacent pads.
US07782687B2	Semiconductor device In a semiconductor device having a redundant memory, the area of the device is reduced and a time required to transfer relief information is reduced. Moreover, a transfer control of relief information is facilitated. A first relief information storing unit stores relief information for relieving a redundant memory having a defective cell. A plurality of redundant memories share a second relief information storing unit. The second relief information storing unit is connected in series to the first relief information storing unit. The relief information is transferred from the first relief information storing unit to the second relief information storing unit.
US07782684B2	Semiconductor memory device operating in a test mode and method for driving the same A semiconductor memory device is capable of controlling a tRCD (RAS to CAS Delay) time regardless of an address input timing during a test operation of the semiconductor memory device. The semiconductor memory device includes a column address strobe pulse generator for generating a column address strobe pulse in response to a column command signal and a row address strobe pulse generator for receiving an active command signal or the column command signal to produce a row address strobe pulse in response to a test mode signal.
US07782681B2	Operation method of flash memory device capable of down-shifting a threshold voltage distribution of memory cells in a post-program verify operation In a driving method of a flash memory device including a selected first bit line and an unselected second bit line, a program voltage of a pulse is applied to word lines of all memory cells in a block passing an erase verify operation. After the first and second bit lines are precharged to a predetermined level, a ground voltage is applied to the word lines of all the memory cells in the block. The memory cells are evaluated for a predetermined time shorter than an evaluation time of a read operation. Whether or not a memory cell passing a verify operation exists among the memory cells is sensed. Resultantly, when the memory cell passing the verify operation exists, the memory cells in the block are programmed to a desired level using a predetermined program voltage and a step voltage.
US07782677B2	NAND memory device column charging Embodiments of NAND Flash memory devices and methods recognize that effective column coupling capacitance can be reduced by maintaining a sourced voltage on adjacent columns of an array. Maintaining the columns in a charged state prior to array operations (read, write, and program) reduces current surges and improves data read timing. Devices and methods charge the array columns at pre-charge and following array access operations.
US07782673B2	Semiconductor memory device which includes memory cell having charge accumulation layer and control gate A semiconductor memory device includes memory cells, a source line, a word line, a bit line, and a driver circuit. The memory cells are formed on a semiconductor layer and have a charge accumulation layer and a control gate on the charge accumulation layer. The word line is connected to gate of the memory cell. The bit line is electrically connected to a drain of the memory cell. The source line is electrically connected to a source of the memory cell. The driver circuit varies potential of the semiconductor layer in conjunction with potential of the source line.
US07782669B2	Memory system A memory system includes a nonvolatile memory including a plurality of memory cells, each memory cell being configured to store n levels (n is a natural number of not less than 3) in accordance with a threshold voltage, and a converter which encodes input data in the form of a bit string, records the encoded data in the nonvolatile memory, and limits a difference between levels which adjacent memory cells can take to not more than a predetermined level lower than the n levels.
US07782667B2	Method of operating a flash memory device A method of operating a flash memory device includes reading a first bit data by employing a first read voltage or a second read voltage higher than the first read voltage according to a program state of a first flag cell. The first flag cell is programmed when the first bit data is programmed into the MLC. A second bit data may be read by employing a third read voltage that is higher than the first read voltage or the second read voltage, or by employing the first read voltage and the third read voltage according to a program state of a second flag cell. The second flag cell is programmed when the second bit data is programmed into the MLC. Alternatively to reading the second bit data, the second bit data is fixed to a set data and the set data is output.
US07782660B2	Magnetically de-coupling magnetic memory cells and bit/word lines for reducing bit selection errors Techniques for shielding magnetic memory cells from magnetic fields are presented. In accordance with aspects of the invention, a magnetic storage element is formed with at least one conductive segment electrically coupled to the magnetic storage element. At least a portion of the conductive segment is surrounded with a magnetic liner. The magnetic liner is operative to divert at least a portion of a magnetic field created by a current passing through the conductive segment away from the magnetic storage element.
US07782658B2	Semiconductor device There is provided a semiconductor storage device having a memory cell including a transfer transistor, a load transistor and a drive transistor, which includes a first transfer transistor to become conductive by a potential applied to a first word line placed in parallel with a pair of bit lines, a second transfer transistor to become conductive by a potential applied to a second word line placed orthogonal to the pair of bit lines, and a control circuit to output a control signal for controlling the potentials of the first word line and the second word line in such a way that the first transfer transistor becomes conductive earlier than the second transfer transistor when setting both of the first transfer transistor and the second transfer transistor to a conductive state.
US07782648B2	Fuse reading circuit Correction data is written in fuse circuits of q bits. A reading circuit sequentially reads information of the fuse circuits through a selector and writes the information in a storage circuit. Therefore, read data is output from the storage circuit in parallel.
US07782645B1	Selective encoding of data values for memory cell blocks An integrated circuit device can include a plurality of configuration storage locations each comprising at least one encoding field. Each encoding field can selectively enable at least one received data value to be encoded into an encoded data value prior to being applied to a corresponding block of the integrated circuit device. Each block can comprise a plurality of content addressable memory (CAM) cells.
US07782644B2	Method and apparatus for supplying power A power supply includes a power source having at least one power source output, and a plurality of drivers connected to the at least one power source output. At least one of the plurality of drivers includes a bridge network having a first switch, a second switch and a bridge network output. The first switch is connected between the at least one power source output and the bridge network output. The second switch is connected between the bridge network output and a ground. The bridge network further includes at least one control input connected to the second switch to direct electrical current from the at least one power source output either substantially through the bridge network output or through the second switch to ground.
US07782637B2	Switched-mode electronic power device An electronic power device for controlling a load includes: a high-voltage integrated switch having an output terminal to be connected to the load; an integrated, and low-voltage driving circuit for driving the switch, and a start-up integrated circuit comprising a high-voltage resistor and such that it can be enabled, during a step of turning on the power device, in order to activate the driving circuit. The switch and the start-up circuit are integrated in a first semiconductor chip and the driving circuit is integrated in a different, second semiconductor chip.
US07782636B2	RV converter with current mode and voltage mode switching A switched mode converter is disclosed that includes mode logic for switching between a voltage mode and a current mode. The converter includes circuitry for sensing current on the primary side of the transformer, load current on the secondary side, and output voltage. When the load current is less than a predetermined value, the output voltage of the voltage mode controller is used to control the duty cycle of a PWM controller. When the load current is greater than a predetermined value, the primary current is used to control the PWM controller. During a light load the converter is voltage controlled and there is no minimum load needed to stabilize the control loop. In a current-mode, the control loop will have a relatively faster transient response and avoid flux imbalance in push-pull topology. The converter provides the advantages of both known voltage controlled and current controlled switched mode converters.
US07782630B2	Printed circuit board unit A second printed wiring board is opposed to a surface of the first printed wiring board. A support member supports the first and second printed wiring boards. A first connector is mounted on the first printed wiring board. A second connector is mounted on the second printed wiring board. A wiring connects the first printed wiring board to the second printed wiring board. The first and second connectors are separately mounted on the first and second printed wiring boards, respectively. The sizes of the first and second printed wiring boards can be reduced as compared with the case where connectors are arranged in a row on a single printed wiring board, for example. This results in a reduction in the size of the printed circuit board unit. A large number of the printed circuit board units can be coupled to the back panel.
US07782627B2	Control device A control device for arrangement in a fluid environment includes a housing, with a housing lid (1) for accommodating sensors and a housing shell (2) for receiving at least one control unit (3). The control device further includes at least one device (4) for electrically connecting the sensors to the control unit (3) as well as at least one sealing element (5) for sealing the housing shell (2) against the fluid environment. The device (4) for electrically connecting the sensors located on the housing lid (1) to the control unit (3) in the housing shell (2) is embodied as a film conductor between the housing lid (1) and the sealing element (5) while the sealing element (5) is embodied as a plane sealing element.
US07782622B1	Attachment apparatus for electronic boards Disclosed is an attachment apparatus. The attachment apparatus may facilitate attachment of various components to a printed circuit board (PCB) including a thermal management component.
US07782620B2	Electronic apparatus According to one embodiment, an electronic apparatus includes a semiconductor package including a resin substrate and a die mounted on the resin substrate, a printed circuit board on which the semiconductor package is mounted, and a heat receiving plate that has an area larger than an area of the die. The heat receiving plate has a concave portion that corresponds to a surface of the die at a normal temperature. The concave portion is provided with a pasty heat conductive agent. The heat receiving plate is thermally connected to the semiconductor package via the pasty heat conductive agent.
US07782618B2	Electronic equipment In order to ensure waterproofing between a resin enclosure case and a heat sink, a canopy structure is provided in a portion, in which water is likely to penetrate, so as to prevent the water from entering the portion, thereby directing the water flow to the outside of the enclosure. This makes it easy to install and remove an electronic unit, so that an electronic component integrally formed with the heat sink can be easily replaced.
US07782616B1	Heat-dissipating component having stair-stepped coolant channels A heat-dissipating component including a heat-generating device such as a power semiconductor chip and a mounting structure is provided with coolant channels having a stair-stepped internal geometry that enhances cooling performance with both single-phase and two-phase cooling modes without unduly restricting coolant flow or significantly increasing manufacturing cost. The stair-stepped geometry enhances both single-phase and two-phase cooling modes by increasing the surface area of the channels, and further enhances the two-phase cooling mode by providing numerous high-quality bubble nucleation sites along the length of the channels. The stair-stepped channels are formed in the heat generating device and/or the mounting structure, and the stepped sidewalls may extend toward or away from the center of the channel.
US07782610B2	Portable electronic device case with battery A case for an electronic device protects and extends the battery life of the electronic device. The case has a lower case portion and an upper case portion, which assemble together to protect the top, side, and bottom edges of the electronic device. The lower case portion includes a battery to extend the battery life of the electronic device.
US07782608B2	Docking system and portable computer having the same A docking system which is detachably coupled with a computer main body, includes a docking main body which is formed with a docking opening, a docking bracket including a docking part which is accommodated to the docking opening to be electrically connected with the computer main body, and a position moving unit which couples the docking main body and the docking bracket to move the docking bracket relative to the docking main body.
US07782607B2	Mobile workstation having power system with removable battery configured for drop-in engagement therewith A mobile workstation includes a frame having a wheeled base, a power system resident on the mobile workstation and a battery docking station having a holster which defines a guide. The mobile workstation further includes a removable battery assembly configured to dock with the battery docking station via engagement in the guide, and having a housing with a shape complementary to a shape of the guide and an external contour configured to mate with an internal contour of the guide.
US07782604B1	Inertial vibration isolation for HDD production Isolation of an HDD production device such as a servo track writer from external vibration is provided. The isolated device and its nest or support are suspended in a fashion to allow one, two or three degrees of angular or rotational freedom of movement. The points of suspension are above the center of mass of the isolated device, alone or combined with its nest, and gravity will self-align the isolated device in the manner of an unforced pendulum. A relatively large moment of inertia for at least one direction of angular movement is provided, e.g., by positioning at least one suspension point spaced a relatively large distance from the center of mass to provide a large moment arm for such movement.
US07782603B2	Tool-less electronic component retention Provided is an apparatus comprising a latch mechanism, wherein the latch mechanism comprises a touch point, push points, pull back handles, and a latch tongue adapted to move up and down, wherein the latch tongue is adapted to being inserted into a retention hole.
US07782601B2	Support frame for display and support structure for display having the same The present invention relates to a support frame for a display and a support structure for a display having the support frame. A support frame for a display of the present invention comprises a seating portion 42 seated on a bottom surface of a case 36; a connection portion 45 extending perpendicularly from the seating portion 42 and having an insertion hole 47 into which an antenna 60 is inserted; and a fastening portion 48 extending perpendicularly from the connection portion 45 and supported by one side of the case 36. According to the present invention so configured, it is possible to increase the strength of the support frame and thus protect a liquid crystal display panel more effectively by means of the reinforcing rib 50 and the escape portion 49 provided in the support frame, and also to improve a radio wave reception rate of the antenna 60.
US07782599B2	Computer device with stiffened display member A computer device comprising a display member rotatably coupled to a base member. The display member comprises a vaulted member disposed on a side of the display member opposite a viewing side of a display screen of the display member to stiffen the display member.
US07782597B2	Waterproof panel A waterproof panel comprises a front wall, a back wall, a front baffle assembly and a back baffle. A cavity is defined between the front wall and the back wall, the front baffle assembly and the back baffle are received in the cavity. The front wall defines a first hole array and a second hole array, the back wall defines a third hole array in same height with the second hole array. The front baffle assembly fixed on one side of the second hole array near the third hole array comprises a main baffle. The back baffle fixed on one side of the third hole array near the second hole array is on one side of the main baffle near the second hole array. The back wall comprises a plurality of protruding strips, which can rebound water entering through the third hole array back.
US07782595B2	Buffer capacitor, a zero operational resistance capacitor A buffer capacitor having a least one pair of plates and each plate 10 of the pair of plates is in the form of a loop current or charge buffer having, an electric conducting material 21 arranged in parallel and electrically joined 22 to form a closed loop and the inner perimeter 23 of the electric conducting material forming the said closed loop is prevented from any physical contact with itself, by having a dielectric material 11 disposed therein, thereby forming a closed continuous electrical loop and each plate 10 is provided with at least one buffer or conventional connector and are arranged one on top of the other in alignment separated by alternate layers of a dielectric material 12 and tightly wound.
US07782590B2	Medical fluid machine having solenoid control system with reduced hold current An electromechanical solenoid control system with reduced hold current includes an electromechanical solenoid including an armature and a coil; a voltage source; a resistor placed in an electrical line between the voltage source and the solenoid coil; a switching device configured to selectively apply power from the voltage source to the solenoid coil; and a control element connected electrically to the switching device, the control element operable to receive a signal from the electrical line and use the signal to control the switching device to selectively apply power from the voltage source to the solenoid coil.
US07782589B2	Lens holding frame A lens holding frame for holding lenses, both in front of the projection optics of an HMD device and in front of the eye portion of a wearer of the HMD device, the lens holding frame including a nose bridge, the HMD device including a nose pad arranged to support the nose bridge, and at least one correction lens. The lens holding frame is arranged to be stretched out of its original shape under a manual pressure to at least one transitional shape, and includes connecting elements arranged to connect in a reversible manner the HMD device to the lens holding frame being in a transitional shape and having its nose bridge supported by the nose pad of the HMD device.
US07782586B2	Thermal management within mobile RFID readers through the application of temperature governed variable non-emissive intervals A thermal management system and method to control temperature in an RFID reader is described herein. In particular, by inserting variable periods of inactivity (or latency) at the beginning or at the end of each read cycle, proportional to an instantaneous temperature value of the RFID reader, over-heating and damage of RFID reader electronics is prevented. The RFID reader includes a thermal sensor and determines when the high power RF electronics is enabled. If the RFID reader is in an over-heated condition, it can be turned OFF and during this period any requests received on an interface to the RFID reader to perform a read of tag(s) are not processed.
US07782583B2	Electrostatic discharge protection device having low junction capacitance and operational voltage An electrostatic discharge protection device includes a power supply line and a ground line. A voltage detection unit detects first and second detection voltages by forming an electrical connection between the power supply line and the ground line in response to alternating current of electrostatic current. A first transfer unit transfers the electrostatic current into the power supply line by forming an electrical connection between the input/output pad and the power supply line in response to the first detection voltage. A second transfer unit transfers the electrostatic current into the ground line by forming an electrical connection between the input/output pad and the ground line in response to the second detection voltage. A discharge unit discharges the electrostatic current flowing into the power supply line or the ground line by forming an electrical connection between the power supply line and the ground line in response to the second detection voltage.
US07782578B2	Relay protection circuit and controlling method thereof having relatively better effectiveness for suppressing DC ARC The provided relay system includes a load having a first terminal and a second terminal, a relay coupled to a common ground and the first terminal of the load and a relay protection circuit eliminating an arc generated by the relay. The relay protection circuit has an energy storage element with a first terminal coupled to the first terminal of the load and a second terminal and electrically connected to the relay in parallel for storing and releasing an electrical power, and a high-impedance element coupled to the second terminal of the load to cause the energy storage element to have a relatively speedy charge and a relatively slow discharge.
US07782576B2	Exchange-coupling film incorporating stacked antiferromagnetic layer and pinned layer, and magnetoresistive element including the exchange-coupling film An exchange-coupling film incorporates an antiferromagnetic layer and a pinned layer. The pinned layer includes a first ferromagnetic layer, a second ferromagnetic layer, a third ferromagnetic layer, a nonmagnetic middle layer, and a fourth ferromagnetic layer that are disposed in this order, the first ferromagnetic layer being closest to the antiferromagnetic layer. The first ferromagnetic layer is made of a ferromagnetic material and has a face-centered cubic structure. The second ferromagnetic layer is made of only iron or an alloy containing x atomic % cobalt and (100−x) atomic % iron, wherein x is greater than zero and smaller than or equal to 60. The third ferromagnetic layer is made of an alloy containing y atomic % cobalt and (100−y) atomic % iron, wherein y is within a range of 65 to 80 inclusive. The antiferromagnetic layer and the first ferromagnetic layer are exchange-coupled to each other. The third and fourth ferromagnetic layers are antiferromagnetically coupled to each other.
US07782575B2	Magnetoresistive element having free layer, pinned layer, and spacer layer disposed therebetween, the spacer layer including semiconductor layer An MR element includes: a free layer having a direction of magnetization that changes in response to a signal magnetic field; a pinned layer having a fixed direction of magnetization; and a spacer layer disposed between these layers. The spacer layer includes a first nonmagnetic metal layer and a second nonmagnetic metal layer each made of a nonmagnetic metal material, and a semiconductor layer that is made of a material containing an oxide semiconductor and that is disposed between the first and second nonmagnetic metal layers. The MR element has a resistance-area product within a range of 0.1 to 0.3Ω·μm2, and the spacer layer has a conductivity within a range of 133 to 432 S/cm.
US07782574B1	Magnetic heads disk drives and methods with thicker read shield structures for reduced stray field sensitivity A head of a disk drive comprises a read element, a top read shield, a bottom read shield, a stray field shield, and an exchange decoupling layer. The read element allows for reading magnetic fields from a recording medium. The top read shield, the bottom read shield, and the stray field shield allow for at least partially shielding the read element from stray magnetic fields. The exchange decoupling layer allows for at least partially providing exchange decoupling of the stray field shield and the bottom read shield. The read element is located at least partially between the top read shield and the bottom read shield. The bottom read shield is located at least partially between the stray field shield and the top read shield, and the exchange decoupling layer is located at least partially between the stray field shield and the bottom read shield.
US07782571B2	Wired circuit board and production method thereof A wired circuit board includes a metal supporting board, an insulating base layer formed on the metal supporting board, a conductive pattern formed on the insulating base layer, a first semi-conductive layer formed on the conductive pattern, an insulating cover layer formed on the first semi-conductive layer, and a second semi-conductive layer formed on the insulating cover layer. The first semi-conductive layer and the second semi-conductive layer are electrically connected to the metal supporting board.
US07782570B1	Inverted pocket welding for disk drive head suspensions A method for welding first and second head suspension components having opposite sides to one another. The first component has a weld pocket in one of its sides. The second component is positioned on the side of the first component opposite the side with the weld pocket. A weld site on the second component is aligned with the weld pocket on the first component. A weld at the weld site on the second component extends through the thickness of the second component and into the first component to a depth less than or about equal to a distance equal to the thickness of the first component less the depth of the weld pocket.
US07782569B2	Magnetic recording head and media comprising aluminum oxynitride underlayer and a diamond-like carbon overcoat A method for forming a protective bilayer on a magnetic read/write head or magnetic disk. The bilayer is formed as an adhesion enhancing underlayer and a protective diamond-like carbon (DLC) overlayer. The underlayer is formed of an aluminum or alloyed aluminum oxynitride, having the general formula AlOxNy or MezAlOxNy where Mez symbolizes Tiz, Siz or Crz and where x, y and z can be varied within the formation process. By adjusting the values of x and y the adhesion underlayer contributes to such qualities of the protective bilayer as stress compensation, chemical and mechanical stability and low electrical conductivity. Various methods of forming the underlayer are provided, including reactive ion sputtering, plasma assisted chemical vapor deposition, pulsed laser deposition and plasma immersion ion implantation.
US07782568B2	Compact thin-film magnetic head and magnetic disk drive using the same Embodiments of the invention provide a compact thin-film magnetic head capable of being increased in the number of terminals, and a magnetic disk drive that uses the thin-film magnetic head. In one embodiment, a thin-film magnetic head is constructed that has a magnetic response element, multiple connection object terminals, multiple lead conductors electrically connected to the magnetic response element, and multiple connection sections each formed between each of the connection object terminals and one of the multiple lead conductors in order to electrically connect each of the connection object terminals and one of the lead conductor. All of the multiple lead conductors are provided in the state where they extend from the magnetic response element to the lower layers of the multiple connection object terminals. A magnetic disk drive using the thin-film magnetic head is constructed.
US07782566B2	Magnetic recording and reading device A magnetic recording and reading device includes a magnetic recording medium having at least one magnetic recording layer, a magnetic head enabling a data transfer rate of more than 50 MB/s and a recording density of more than 5 Gb/in2 on the magnetic recording medium, and a R/W-IC. The magnetic head includes a recording head and a reading head. The at least one magnetic recording layer contains (1) at least one metal element selected from a first group consisting of Co, Fe and Ni as a primary component, and (2) at least two elements selected from a second group consisting of Cr, Mo, W, V, Nb, Ta, Ti, Zr, Hf, Pd, Pt, Rh, Ir and Si.
US07782562B2	Magnetic recording media and magnetic recording device According to one embodiment, a magnetic recording media includes a magnetic recording layer formed on a substrate, in which recording tracks and servo areas are prescribed as patterns of protrusions and recesses formed on the magnetic recording layer so that thin film portions of the magnetic recording layer are formed under the recesses, a thickness of magnetic recording layer at the thin film portion is smaller than a thickness of magnetic recording layer at the protrusion in the servo area, and a magnetization direction of the protrusion is antiparallel to a magnetization direction of the thin film in the servo area.
US07782561B2	Patterned magnetic recording medium with data island pattern for improved reading and writing and magnetic recording system incorporating the medium A patterned magnetic recording medium has discrete data islands arranged in spaced-apart tracks, with the tracks being arranged in multi-track groups or “hypertracks”. The islands have an equal island-spacing (IS) distance in the along-the-track direction and within each hypertrack the tracks are spaced-apart an equal track-spacing (TS) distance. If there are N tracks in a hypertrack then the islands in each track of a hypertrack are shifted in the along-the-track direction by 1/N times IS from the islands in adjacent tracks in the same hypertrack. The read and write heads have a lateral or cross-track width generally equal to the cross-track width of a hypertrack, so the read and write heads span all the individual tracks in a hypertrack. The hypertracks are spaced apart cross-track direction by a group-spacing (GS) distance, with GS being greater than TS. The islands in a hypertrack may be shifted in the along-the-track direction by approximately ½N times IS from the islands in adjacent hypertracks.
US07782560B2	Lens actuator and camera module with same A lens actuator for driving a lens received in a lens barrel includes a plate shaped body comprising a through hole defined in the center thereof, an inner portion surrounding the through hole, an outer portion for mounting the lens barrel thereon, and a plurality of resilient portions connected between the inner portion and the outer portion. A plurality of piezoelectric structures formed on the respective resilient portions. The piezoelectric structures are configured for mounting the lens thereon and driving the lens to move relative to the lens barrel.
US07782557B2	Lens position adjusting device A lens position adjusting device of a lens barrel includes a stationary ring, and a manual rotating ring which is screw-engaged with the stationary ring to be manually rotatable about an optical axis to move a movable lens group in the optical axis direction, wherein the manual rotating ring includes an operating ring member; and a sub-ring member which is screwed into the stationary ring, wherein the operating ring member and the sub-ring member are coupled to each other so that a relative rotation position therebetween about the optical axis is adjustable.
US07782554B1	Table and object magnifying combination assembly A table and object magnifying combination assembly includes a panel that has a top side, a bottom side, a front edge, a rear edge, a first lateral edge and a second lateral edge. The panel has a pair of elongated breaks therein extending between and through the front and rear edges to define an inner section positioned between the elongated breaks. The inner section is rotatably coupled to a remaining portion of the panel. The inner section has an aperture therein extending into the top side and outwardly of the bottom side so that the inner section forms a frame. A magnifying member is positioned within the aperture and is attached to the inner section. A plurality of supports is attached to and extends downwardly from the panel. Objects are viewable through the magnifying member to enlarge a view of the object.
US07782552B2	Compact imaging lens system A compact imaging lens system includes three lenses. The first lens is a positive meniscus lens having a convex side facing toward the image side, which has a big focusing power and is provided to capture image and for balance of aberration. The first lens serves to make the lens system a low sensitivity lens system. The second lens is a negative lens and is provided mainly for correcting chromatic aberration and off-axis aberration. An aperture is set between the first and second lenses, and this is of benefit to balance of aberration. The third lens is a negative lens and is provided for correcting off axis aberration. All the lenses can be made of plastics. This facilitates cost reduction, weight reduction, while still maintains a high resolution.
US07782551B2	Wide-angle image pick-up lens system and vehicle with same A wide-angle image pick-up lens system includes a first lens group with negative refracting power and a second lens group with positive refracting power. The first lens group and the second lens group are aligned in order from an object side to an image side. The first lens group and the second lens group satisfy the following conditions: −0.15
US07782542B2	Zoom lens and electronic imaging device having the same A zoom lens includes a most object-side lens unit remaining fixed on the optical axis when the magnification of the zoom lens is changed and a focusing operation is performed; a most image-side lens unit remaining fixed when the focusing operation is performed; and a plurality of moving lens units lying between the most object-side lens unit and the most image-side lens unit, moved along the optical axis when the magnification is changed. The most object-side lens unit includes, in order from the object side, a negative lens component, a reflective optical component having a reflecting surface for bending the optical path, and a positive lens component. The most image-side lens unit has at least one aspherical surface. An electronic imaging device includes an electronic image sensor located on the image side of the zoom lens.
US07782540B2	Optical head apparatus and optical information recording and reproduction apparatus Disclosed is an optical head apparatus comprising: a light source; a collimating means of converting a beam of light emitted from the light source into a substantially parallel beam of light; a focusing means of focusing the light onto an information medium surface; a beam splitting means of splitting the beam of light modulated by the information medium; and a light receiving means of receiving the light modulated by the information medium, wherein a lens having a negative power and a lens having a positive power are arranged in this order as viewed from the collimating means side between the collimating means and the focusing means, and at least either one of the lenses is moved along an optical axis to correct spherical aberration occurring on the information medium surface, and wherein the distance from the lens having the positive power to the focusing means is set substantially equal to the focal length of the lens having the positive power.
US07782537B2	Optical article and process for producing optical article An optical article includes a plastic substrate, wherein a primer layer and a hard coat layer are formed on a surface of the plastic substrate, and the primer layer is formed from a coating composition containing the following components (A) to (C): (A) a polyurethane resin; (B) metal oxide fine particles; and (C) an organosilicon compound.
US07782531B2	Portable projector screen assembly A portable projector screen assembly includes a roller, two cylinders slidably connected to two ends of the roller respectively, a collapsible member connected to the roller, and a screen. The collapsible member includes a plurality of interconnected pieces. Two free ends of the collapsible member are fixed to free ends of the cylinders respectively. The screen includes a plurality of fixing portions, and the fixing portions are respectively connected to joints of each two pieces of the collapsible member.
US07782529B2	Scanning microscope and method for examining a sample by using scanning microscopy A scanning microscope including a light source for generating an illumination light beam, a beam deflection apparatus for guiding solely the illumination light beam via an illumination light path over and/or through a sample, at least one objective for focusing the illumination light beam onto and/or into the sample, components for generating a manipulation illumination pattern, components for imaging the manipulation illumination pattern onto and/or into the sample via a manipulation light path, and a detection device that receives detected light emanating from the sample. The manipulation light path omits the beam deflection apparatus and is separate from the illumination light path.
US07782528B2	Microscope examination apparatus A microscope examination apparatus including a light source; an illumination optical system configured to guide light from the light source to a specimen; an objective lens configured to collimate return light from the specimen, the objective lens being provided in such a manner as to be displaceable at least in a direction intersecting an optical axis of the objective lens; an image-forming lens configured to image the return light from the specimen, which is collimated by the objective lens; an optical detector configured to detect the return light imaged by the image-forming lens; a microscope main body including the image-forming lens and the optical detector; and an objective-lens driving mechanism configured to drive the objective lens in a direction correcting image blur due to a displacement of the specimen.
US07782527B1	Multi-stage optical amplifier having photonic-crystal-rod waveguides and non-photonic-crystal optical fiber interconnects and associated method A method and apparatus use a photonic-crystal fiber having a very large core while maintaining a single transverse mode. In some fiber lasers and amplifiers having large cores problems exist related to energy being generated at multiple-modes (i.e., polygamy), and of mode hopping (i.e., promiscuity) due to limited control of energy levels and fluctuations. The problems of multiple-modes and mode hopping result from the use of large-diameter waveguides, and are addressed by the invention. This is especially true in lasers using large amounts of energy (i.e., lasers in the one-megawatt or more range). By using multiple small waveguides in parallel, large amounts of energy can be passed through a laser, but with better control such that the aforementioned problems can be reduced. An additional advantage is that the polarization of the light can be maintained better than by using a single fiber core.
US07782526B2	Piezoelectric adaptive mirror An adaptive mirror includes a plurality of adjacent combs of piezoelectric material and two electrodes arranged on longitudinal faces opposite a bar are associated with each monolithic bar formed by a tooth of the combs.
US07782525B2	Area array modulation and lead reduction in interferometric modulators A light modulator is arranged as an array of rows and columns of interferometric display elements. Each element is divided into sub-rows of sub-elements. Array connection lines transmit operating signals to the display elements, with one connection line corresponding to one row of display elements in the array. Sub-array connection lines electrically connect to each array connection line. Switches transmit the operating signals from each array connection line to the sub-rows to effect gray scale modulation.
US07782522B2	Encapsulation methods for interferometric modulator and MEMS devices Methods and devices used for the encapsulation of MEMS devices, such as an interferometric modulator, are disclosed. Encapsulation is provided to MEMS devices to protect the devices from such environmental hazards as moisture and mechanical shock. In addition to the encapsulation layer providing protection from environmental hazards, the encapsulation layer is additionally planarized so as to function as a substrate for additional circuit elements formed above the encapsulation layer.
US07782521B2	System and method for displaying images A system and method for reducing visible speckle in images displayed using coherent light. In an embodiment, a system for displaying images includes a light source to produce coherent light, an array of light modulators optically coupled to the light source and positioned in a light path of the light source after the light source, and a controller electronically coupled to the array of light modulators and to the light source. The light source includes a coherent light source, and a first digital micromirror device (DMD) having a first plurality of micromirrors. The first DMD is optically coupled to the coherent light source and positioned in a light path of the coherent light source after the coherent light source. The first DMD directs coherent light by moving the micromirrors of the first plurality of micromirrors through a first range of tilt angles substantially continuously.
US07782520B2	Duobinary modulation with a lumped-element Mach-Zehnder device Duobinary and NRZ modulation of an X-Gb/s optical signal is achieved with a lumped element InP Mach-Zehnder device configured to operate at X/k-Gb/s where k>1 and arranged in a push-pull configuration.
US07782519B2	Multi-color electrochromic apparatus and methods The present disclosure provides apparatus and methods for multi-color electrochromic devices. In one embodiment, pixels of a first color electrochromic material (i.e. pigment) are arranged in first areas on a substrate with pixels of a second color electrochromic material in second areas to define a two-dimensional pattern of the first and second color on the substrate. When the applied electric field or current supplied to each pixel is changed, the device may produce the respective colors of the electrochromic materials and may produce a blended color because of the arrangement of the pixels. In accordance with further aspects of the disclosure, the electrochromic materials may form a design, pattern, logo, or picture when the electrochromic materials are activated. In yet further aspects of the disclosure, a substrate is masked and unmasked as a plurality of colors are applied to the substrate to produce a multi-color electrochromic display.
US07782518B2	Electrodeposition method light modulating device, electrodeposition method reflective display device, and method of manufacturing transparent electrode for an electrodeposition method There is provided an electrodeposition method light modulating device including: (1) a transparent electrode, to which a polymer having a metallocene at a side chain thereof is fixed by a chemical bond; (2) a transparent electrode that is disposed to face the transparent electrode (1), and forms metal through a reducing reaction of metal ions thereon; and (3) an electrolytic solution containing the metal ions, which can be reduced by applying current thereto, and disposed between the transparent electrode (1) and the transparent electrode (2). In an electrodeposition method reflective display device, the electrolytic solution is held by a gelatinous polymer, and the white pigment is dispersed in the gelatinous polymer.
US07782510B2	Computer generated hologram A three dimensional display apparatus includes a diffraction panel for displaying a computer generated hologram and a look-up table. The look-up table includes a plurality of phase entries corresponding to a plurality of image points within a three dimensional image replay volume of the computer generated hologram. The apparatus further includes one or more processors configured to notionally divide the computer generated hologram into one or more hogels and to calculate diffraction fringe information for at least one of the hogels based on a selection of the phase entries.
US07782508B2	Printing medium separation apparatus, printing medium separation program, storage medium storing the program, printing medium seperation method, printing device, printing device control program, storage medium storing the program, and printing device control method A printing medium separation apparatus, including: a density information extraction unit that extracts density information about a predetermined printing area of a printing medium for use to print an image; an area partition unit that partitions the printing area into a plurality of partition areas; a blank amount calculation unit that calculates, based on the density information extracted for each of the partition areas being results of partitioning by the area partition unit, a blank amount of each of the partition areas; and a separation unit that subjects the printing medium to separation based on a result of calculating by the blank amount calculation unit.
US07782506B2	Image reading apparatus capable of detecting noise An image reading apparatus includes, with the purpose of detecting with improved precision noise generated due to dust on a platen, three line sensors spaced from each other in a sub scanning direction to scan an original in the sub scanning direction, the platen between the original and the three line sensors, a moving mechanism for moving the platen at a rate relative to the line sensors, the rate being different from that of the original relative to the line sensors, an interline corrector synchronizing three data output from the three line sensors to be values of pixels reading a single location on the original, and a noise detector receiving these data synchronized by the interline corrector that are provided successively line by line, and the noise detector includes an isolated noise determiner determining that an isolated point of a chromatic color is a noise pixel.
US07782498B2	Image reading apparatus and method with reduced wake-up time after sleep mode An image reading apparatus is provided that includes an image sensor configured to convert image light of a document into an image signal, an optical unit configured to project the image light of the document on the image sensor, a drive unit configured to drive the optical unit in a sub scanning direction, a document size detecting unit configured to detect a size of the document using the image signal, an image signal processing unit configured to digitally convert the image signal of the image sensor into image data, a power circuit configured to output an operating voltage in standby mode and stop the outputting of the operating voltage in sleep mode, and a power saving control unit configured to position the optical unit to a document size detecting position before switching the power circuit from the standby mode to the sleep mode.
US07782496B2	Image signal processing circuit, image reading device, and image forming apparatus An image signal processing circuit including a gain control circuit capable of performing gain control operation, and an image reading device or an image forming apparatus incorporating the image signal processing circuit.
US07782495B2	Facsimile communication method, facsimile apparatus and computer-readable storage medium configured to output communication result notification A facsimile apparatus is provided with a specific destination name storage section to store destination names of specific destinations, a receiving end identifying section to identify a receiving end by analyzing terminal information received from the receiving end when making a facsimile transmission to the receiving end, a specific destination identifying section to search from the specific destination name storage section a destination name corresponding to the receiving end which is identified by the receiving end identifying section, and a notifying section to output a communication result notification indicative of a result of the facsimile transmission to the receiving end only when the specific destination identifying section finds the corresponding destination name in the specific destination name storage section.
US07782489B2	Method for selecting a sample set useful in relating color reflectances producible under reference and target operating conditions and the sample set producing thereby A transform useful for predicting a reflectance value producible by a printer while operating under a predetermined target set of operating conditions using reflectance values produced by the printer while operating under a predetermined reference set of operating conditions is generated using an efficient sample set that contains the minimal required number of samples.
US07782488B2	Print control device and print control method When image formation is to be carried out based on multiple print jobs that have been inputted, multi-imposition print data is generated in which the multiple print jobs are arranged in a single sheet layout, and cutting sheet data is generated based on positions of the multiple print jobs arranged in the single sheet layout in the generated multi-imposition print data. Then, control is performed over printing of the generated multi-imposition print data and insertion printing of the generated cutting sheet data.
US07782485B2	Linearization and characterization process of an image producing device Exemplary methods are directed to the linearization and characterization of an image producing device. In the method, a color test chart of the device is reproduced and measured based on a small number of color measurement fields with defined device color values. Associated color values are determined for each color measurement field and used to calculate linearization curves for the device. Additionally, by analysis of the device color values, the measured color values, and device behavior, an expanded color test chart with expanded device color values and associated expanded color values is calculated. The number of color measurement fields in the expanded color test chart is larger than the number of color measurement fields in the original color test chart. An ICC profile for the device is calculated from the expanded device color values and the expanded color values.
US07782484B2	Image processing apparatus, image processing method, and recording medium storing program product for causing computer to function as image processing apparatus An image processing apparatus allowing efficient trapping/overprint is provided. A CPU of a printer serving as the image processing apparatus includes an object extraction unit extracting a component image from image data, a pair extraction unit extracting a pair from a plurality of objects, a calculation unit calculating an overlapping print amount for each of primary colors of color materials of each component image, a rule storing unit storing a plurality of process contents and rules for executing processing, a process content storing unit storing the process contents, a judgment unit judging whether or not a pair of the image components satisfies the rule associated with a priority, and an execution unit for executing the processing of trapping or overprint.
US07782482B2	Color compensation of printing device A color correcting method for compensating a color drift in a printing device includes determining an ink recording rate having a maximum variation of colorimetric data from among a plurality of stages of ink recording rates. The variation of colorimetric data occurs by means of a variation of an amount of ink adhering on the printing medium on each printing device. The color correcting method includes controlling the printing device to print a standard image of the determined ink recording rate on the printing medium. The color correcting method also includes compensating a color drift in the printing device having printed the standard image by correcting the printing data based on a result of comparing the standard image of the ink recording rate having the maximum variation printed on the printing medium with a reference standard image.
US07782480B2	Image forming apparatus An image forming apparatus includes a controller having an integrated circuit for image processing. The controller is connected to an engine via a peripheral component interconnect (PCI). The engine includes a plotter and a scanner. The controller includes a central processing unit (CPU) to which a chip-set is connected via an accelerated graphics port (AGP). The controller also includes an application specific integrated circuit (ASIC) that controls whether to output scanner image data, which is data acquired by the scanner, to the PCI as plotter data for the plotter, or to output the scanner image data to the AGP, or to output image data input through the AGP to the PCI as plotter data for the plotter. The ASIC includes a combiner that combines a plurality of image data.
US07782478B2	Recording and reproducing apparatus and method thereof The present invention relates to an invention capable of perusing thumbnail images at much higher speed in an apparatus to peruse the thumbnail images by recording an image data in a recording medium such as a disc medium.
US07782472B2	Image forming system and image forming method An image forming system including an image reading apparatus and a printing apparatus connected to the image reading apparatus through a communication line, in which the image reading apparatus includes a font information acquiring unit which acquires font information indicating a type of a font installed on the printing apparatus, a print data generating unit which generates desired print data by using the font information acquired from the font information acquiring unit, and a print data transmitting unit which transmits the print data generated by the print data generating unit to the printing apparatus, and in which the printing apparatus prints out the desired print data on the basis of the print data transmitted from the print data transmitting unit.
US07782470B2	Surface measurement apparatus and method using depth of field The invention provides for surface mapping of in-vivo imaging subjects using a single camera and a moveable stage on which a subject animal for in-vivo imaging is placed. Images are taken and the stage is moved by known amounts along the optical axis, and the heights of individual features on the subject are determined through analysis of focus, given the known stage displacement. Alternatively, height of sub-regions of the subject are determined through analysis of focus. A mesh or other surface can be constructed from individual features, to provide a surface map of the subject. Accuracy of 0.5 mm or better can be attained for mice and similarly sized subjects.
US07782462B2	Sono-photonic gas sensor Sensing a gas includes introducing a gas into a chamber, forming a standing acoustic wave in the chamber, and irradiating the chamber with electromagnetic radiation. Some of the electromagnetic radiation passes into the chamber, through the standing acoustic wave in the chamber, and out of the chamber. An amount of electromagnetic radiation that passes out of the chamber, or is transmitted through the chamber, is detected. A concentration of the gas in the chamber can be assessed.
US07782455B2	Spectrograph with a tilted detector window The invention concerns a spectrograph with a tilted detector window comprising a light source (1), an entrance slit (3), a grating (4), a detector (5) comprising a window through which the light beam diffracted by the grating (4) is transmitted, a part of the diffracted light beam generating reflections on the window or between the window and sensitive surface of the detector (5) and at least a means for inclining able to avoid interference spectra. According to the invention, the at least a means for inclining able to avoid interference spectra comprises the detector window (6, 11) which is an inclined detector window (11).
US07782451B2	Device for and method of inspecting surface condition having different curvatures A target surface of a target object including portions having different curvatures is inspected by using an illuminating device and a camera that are fixed, a supporting device for supporting the target object such that its position and orientation are variable. The position and orientation of the target object are controlled as its image is obtained for a plurality of times. The position and orientation of the target object are controlled such that the image of any point on the target surface will be included in at least one of the images obtained by the camera.
US07782447B2	Enumeration of thrombocytes A sample acquiring device for volumetric enumeration of thrombocytes in a blood sample is provided which comprises a measurement cavity for receiving a blood sample. The measurement cavity has a predetermined fixed thickness. The sample acquiring device further comprises a reagent, which is arranged in a dried form on a surface defining the measurement cavity. The reagent comprises a haemolyzing agent for lysing red blood cells in the blood sample, and optionally a staining agent for selectively staining thrombocytes in the blood sample. A system comprises the sample acquiring device and a measurement apparatus. The measurement apparatus comprises a sample acquiring device holder, a light source, and an imaging system for acquiring a digital image of a magnification of the sample. The measurement apparatus further comprises an image analyzer arranged to analyze the acquired digital image for determining the number of thrombocytes in the blood sample.
US07782443B2	Illumination system of a microlithographic projection exposure apparatus An illumination system of a microlithographic projection exposure apparatus includes a beam deflection array including a number beam deflection elements, for example mirrors. Each beam deflection element is adapted to deflect an impinging light beam by a deflection angle that is variable in response to control signals. The light beams reflected from the beam deflection elements produce spots in a system pupil surface. The number of spots illuminated in the system pupil surface during an exposure process, during which a mask is imaged on a light sensitive surface, is greater than the number of beam deflection elements. This may be accomplished with the help of a beam multiplier unit that multiplies the light beams reflected from the beam deflection elements. In another embodiment the beam deflecting elements are controlled such that the irradiance distribution produced in the system pupil surface changes between two consecutive light pulses of an exposure process.
US07782438B2	Fast switching electro-optical devices using banana-shaped liquid crystals The invention is directed to liquid crystal display and electro-optical devices having faster switching times, a wider viewing angle, continuous gray level, improved transmittance of the clear state, approximately no threshold voltage and low power consumption. The aspects of the invention are achieved by a liquid crystal device comprising an orthogonal nematic, smectic or columnar liquid crystal phase, which is uniaxial in absence of electric field, but becomes biaxial when electric field is applied normal to the director (in between electrodes for planar alignment, or in-plane electric field in case of homeotropic alignment). This electric field induced biaxiality (EFIB) mode is provided using any dielectric orthogonal nematic, smectic or columnar bent-core liquid crystal phase. The nature of the switching is dielectric (not piezoelectric) and does not involve variation of layer spacing variation, so as to be mechanically much more stable than prior systems. The high switching speed combined with a large change in the effective birefringence and constant optical axis of the liquid crystal materials provide useful features in various applications, such as liquid crystal television, beam steering, spatial light modulators, and a variety of other applications.
US07782425B2	OCB mode liquid crystal display and a driving method of the same A liquid crystal display includes a TFT array panel, a color filter panel, a liquid crystal layer in an OCB mode, a pair of compensation films provided on outer surfaces of the TFT array panel and the color filter panel, a pair of polarization films provided on outer surfaces of the compensation films, and so on. When the wavelength dispersion of the liquid crystal layer is larger than the wavelength dispersion of the first and the second compensation films, the cell gap on the red pixel area>the cell gap on the green pixel area>the cell gap on the blue pixel area. On the contrary, when the wavelength dispersion of the liquid crystal layer is smaller than the wavelength dispersion of the first and the second compensation films, the cell gap on the red pixel area
US07782424B2	Color filter substrate, display panel having the same, and method for manufacturing the same A color filter substrate includes a color filter, a common electrode, a first blocking layer, and a second blocking layer. The color filter is formed in a unit pixel. The first blocking layer corresponds to an outline of the color filter. The second blocking layer is formed in the unit pixel, and under the color filter so to be covered by the color filter, thus decreasing a volume of the color filter. A common electrode is formed over the color filter and the first blocking layer. Thus, an amount of a color filter pigment required for manufacturing the substrate may be decreased and manufacturing cost may be decreased.
US07782423B2	Liquid crystal display with first and second transparent resin layers having at least one different characteristic In a liquid crystal display comprising a liquid crystal layer, a pair of substrates between which the liquid crystal layer is arranged, a pair of polarizing plates arranged between which the substrates are arranged, and a light source arranged at an outside of the polarizing plates, the liquid crystal display further comprises a first transparent resin layer arranged between the liquid crystal layer and the light source and a second transparent resin layer to be arranged between the viewer and the liquid crystal layer, and a linear thermal expansion coefficient of the first transparent resin layer is smaller than that of the second transparent resin layer.
US07782421B2	Liquid crystal display device A side type light emitting diode (LED) liquid crystal display (LCD) includes a prism light guide panel in a side type LED backlight to allow scanning and divisional driving to improve motion blur of video or an overall sharpness of an image. The side type LED LCD includes: a lower cover; first and second prism light guide panels disposed in a plurality of layers on the lower cover, ridges of prism mountains formed on the first prism light guide panel being substantially perpendicular to ridges of prism mountains formed on the second prism light guide panel; lamp units being provided on at least one side of each prism light guide panel along the ridges of the prism mountains; and a liquid crystal panel separated from the prism light guide panels that receives light transmitted through the first and second light guide panels emitted from the light units.
US07782420B2	Optical element covering member, backlight, and liquid crystal display device An optical element covering member is provided which can suppress degradation in display performance caused by warping and undulation. The optical element covering member includes at least one optical element, a support medium supporting the optical element; and a covering member covering the optical element and the support medium. In the above optical element covering member, the covering member has a Vicat softening point of more than 85° C., and at least one surface of the covering member, which covers the support medium, has a coefficient of thermal expansion in the range of 85% to 160% of the coefficient of thermal expansion of the support medium.
US07782419B2	Backlight unit and liquid crystal display device having the same Provided is a backlight unit of an LCD device including a printed circuit board; a plurality of light emitting diodes (LEDs) mounted on the printed circuit board; and a bottom chassis formed with only an outer frame and having the printed circuit board housed thereon.
US07782417B2	Liquid crystal display with housing providing FPCB access An exemplary liquid crystal display (LCD) (40) includes an LCD panel (42), a backlight module (41), and a housing assembly. The housing assembly includes a rear housing (48) and a corresponding front housing (46) to secure the LCD panel and the backlight module. The rear housing has a first sidewall (481) with a first hole (482). The front housing has a second sidewall (461) with a second hole (462) aligned with the first hole. A flexible printed circuit board (44) is electrically connected to the LCD and passes through the first and second holes, such that the housing assembly can protect the flexible printed circuit board without reducing the mechanical strength of the housing assembly.
US07782415B2	Active matrix subtrate, liquid crystal display panel and method of manufacturing the same Disclosed is an active matrix substrate including a substrate, a gate wiring formed on the substrate, a data wiring formed on the substrate so as to cross the gate wiring, a common wiring formed on the substrate extending approximately parallel to the gate wiring, a pixel formed in a region surrounded by the gate wiring and the data wiring, and a switching element formed in a vicinity of an intersection of the gate wiring and the data wiring. The pixel includes a pixel electrode, and a counter electrode arranged alternately with the pixel electrode and connected to the data wiring. The switching element includes a first electrode connected to the common wiring, and a second electrode connected to the pixel electrode.
US07782414B2	Method for fabricating in-plane switching mode liquid crystal display device A method for fabricating an LCD device includes forming an alignment layer and an overcoat layer substantially simultaneously. The method includes, coating a mixture of an alignment layer material and an overcoat layer material on a substrate and at least partially separating the overcoat layer material and the alignment layer material by the curing the mixture.
US07782412B2	Method of fabricating liquid crystal display device with forming gate insulating layer by gas mixtures Disclosed is a method of fabricating a liquid crystal display device enabling to form a uniform gate insulating layer in thickness. The present includes the steps of forming a gate line, a gate electrode, and a storage line on a substrate and forming a gate insulating layer on the substrate including the gate line and the gate electrode using first and second gases having a gas mixture ratio of 0.3˜0.5:1. And, the first and second gases are mono-silane (SiH4) and ammonia (NH3), respectively. Accordingly, the present invention enables a uniformly thick gate insulating layer, thereby to improving the discharging time as well as reducing flicker on the screen.
US07782410B2	Substrate for liquid crystal display device, liquid crystal display device provided with the same, and manufacturing method of the same The invention relates to a substrate for a liquid crystal display device, a liquid crystal display device provided with the same, and a manufacturing method of the same, and provides a substrate for a liquid crystal display device in which a manufacture process can be cut down and manufacturing cost is reduced, a liquid crystal display device provided with the same, and a manufacturing method of the same. The substrate for the liquid crystal display device includes a pixel electrode formed in each of pixel regions, a plurality of gate bus lines which are formed on a base substrate in parallel with each other and in each of which a plurality of formation materials are laminated and at least a lower layer part is formed of a same formation material as the pixel electrode, a plurality of drain bus lines intersecting with the plurality of gate bus lines through an insulating film and formed to be in parallel with each other, and a thin film transistor formed in each of the pixel regions and including a gate electrode connected to the gate bus line, a drain electrode connected to the drain bus line, and a source electrode connected to the pixel electrode.
US07782409B2	Multiple view display A multiple view display comprises a display device such as a liquid crystal device, a parallax optic such as a parallax barrier, and a controller. The device comprises rows and columns of pixels and the controller supplies image data for a first view to first ones of the pixels and second ones of the pixels such that the first and second pixels alternate in the rows and in the columns. The parallax optic comprises rows and columns of parallax elements with the arrangement of pixels and parallax elements being such that each element co-operates with a respective pair of first and second pixels adjacent each other in the same row to form first and second viewing regions. Each row of parallax elements is off-set in the row direction by half the horizontal barrier pitch. Such an arrangement allows wider angles between the viewing regions to be achieved.
US07782408B2	3-D molecular assembly and its applications for molecular display and moletronics A three-dimensional molecular assembly and method of formation are provided. The molecular assembly is formed on a substrate. The molecular assembly comprises: a first monolayer of seed molecules for initiating self-assembled molecular growth, the first monolayer formed on the substrate; a second monolayer of active molecules comprising a plurality of rotor and stator moieties, with one rotor moiety supported between two stator moieties, the second monolayer of active molecules formed on the first monolayer of seed molecules, with a one-to-one correspondence between molecules in the first monolayer and the second monolayer; a third monolayer of spacer molecules, formed on the second monolayer of active molecules, with a one-to-one correspondence between molecules in the second monolayer and the third monolayer; and a plurality of alternating second monolayers and third monolayers having the one-to-one correspondence.
US07782405B2	Systems and methods for selecting a display source light illumination level Embodiments of the present invention comprise systems and methods for selecting a display source light illumination level based on distortion parameters.
US07782404B2	VSB reception system with enhanced signal detection for processing supplemental data A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.
US07782402B2	Apparatus and method for temporal noise reduction and motion enhancement The present invention provides an apparatus and corresponding method for reducing temporal noise of a target frame and enhancing the motion of the target frame. The apparatus includes a storage device, a temporal noise reducing circuit, and a motion enhancing circuit. The storage device stores a first filtered signal of a previous frame. The previous frame is previous to the target frame. The temporal noise reducing circuit reduces temporal noise of the target frame according to the first filtered signal and an image signal of the target frame. The temporal noise reducing circuit then generates a second filtered signal of the target frame, which is stored in the storage device. The motion enhancing circuit enhances the motion of the target frame according to the first and the second filtered signals, and generates a motion-enhanced signal of the target frame.
US07782399B2	System and a method to avoid on-screen fluctuations due to input signal changes while in an OSD or graphic centric mode The disclosed embodiments relate to a system and method for modifying video signals. The system may comprise at least one decoder that decodes a video signal that comprises embedded picture setting data, and a video processor that is adapted to detect whether the system is operating in an on-screen display (“OSD”) mode, apply the embedded picture setting data if the system is not in the OSD mode, and withhold the embedded picture setting data if the system is in the OSD mode. The method may comprise the acts of decoding a video signal that comprises embedded picture setting data, detecting whether a system is operating in the OSD mode, applying the embedded picture setting data if the system is not in the OSD mode, and withholding the embedded picture setting data if the system is in the OSD mode.
US07782393B2	Multiple exposure methods and apparatus for electronic cameras A method for capturing multiple sets of image data with an electronic camera having a shutter and an electronic shutter for selectively allowing light to reach an image sensor comprises opening the shutter and the electronic shutter, allowing light to reach the image sensor for a first exposure time, closing the electronic shutter, reading out pixel data captured during the first exposure time, allowing light to reach the image sensor for a second exposure time, and, reading out pixel data captured during the second exposure time. The method may be used to obtain multiple differently exposed images of a scene for combination into a high dynamic range image.
US07782390B2	Camera module A camera module includes a lens holder, a lens module, an image sensor chip, and a printed circuit board. The lens module is received in the lens holder. The lens module includes a lens barrel and at least one lens received in the lens barrel. The image sensor chip has a photosensitive area configured for receiving light transmitted through the lens module. The printed circuit board defines a top surface for receiving both the image sensor chip and the lens barrel thereon and an opposite bottom surface thereon. The bottom surface defines a plurality of recesses thereon for receiving the corresponding electronic elements therein by adhesives.
US07782388B2	Solid image pickup unit and camera module A solid image pickup device includes an image pickup unit on which image pickup elements are arranged in a two dimensional form, a print on which the image pickup unit is mounted, and protrusions formed in a pattern form of a conductive material on a floor area, of the print board, covered by the image pickup unit such that the protrusions surround a central part of the floor area, wherein the image pickup unit is fixed with an adhesive on the protrusions and the floor area of the print board.
US07782387B2	Image pickup device utilizing optical distortion characteristic An image pickup device may include an optical system having a distortion that captures a distortion-containing optical image, a conversion unit that converts the distortion-containing optical image into distortion-containing image data, a storage unit that stores the distortion-containing image data and additional data related to a distortion of the distortion-containing image data, and a distortion correction unit that corrects the distortion of the distortion-containing image data with reference to the additional data.
US07782386B2	Optical apparatus provided with variable mirror An optical apparatus includes a variable optical-property element, a driving circuit driving the variable optical-property element, and an image sensor. In order to compensate a change of an imaging state caused by at least one factor of temperature, humidity, a manufacturing error, a change of an object distance, and a zoom state, photographing is performed while referring to a look-up table to change driving information provided to the variable optical-property element, and the driving information that the high-frequency component of a photographed image is practically maximized is assumed so that the variable optical-property element is driven by the driving information to perform photographing.
US07782384B2	Digital camera having system for digital image composition and related method A digital camera is provided, comprising an image system having a unique combination of features that aid in generating creative, high-quality images. The system presents a variety of overlays, each having prescribed attributes, e.g., ranging in size, opacity, and functionality, and from iconic overlays to full-scale overlays having varied opacity. The overlays can be used as an aid in composing a live image for digital capture, either as a constant or intermittent presence on the view-screen of the camera. In an exemplary embodiment, the camera can create a composite photograph in which a live image and the overlay are combined together. In an independent aspect, the camera can include an auto-compositing feature that aids in creating images free of improperly exposed regions. Thus, a photographer can create and combine images “on location” in a unique manner.
US07782383B2	Noise and parasitic capacitance reduction for 1T pixel CMOS image sensors Methods and circuits for reducing noise for a passive pixel sensor (PPS) array of an image sensor are described. A noise reduction circuit includes a noise reduction integrator circuit configured to detect a potential voltage of a column line of the PPS array and generate a potential voltage substantially equal to the potential voltage of the column line. The noise reduction circuit also includes a conductor line oriented longitudinally along the column line and configured to receive the generated potential voltage from the noise reduction integrator circuit. The conductor line is placed at a potential voltage that is the same as the potential voltage of the column line. A parasitic capacitance formed between the conductor line and the column line is substantially reduced.
US07782381B2	Generating an instant review image using fractional readouts A method for creating an instant review image is disclosed. The method starts by creating image data by exposing an image sensor to a scene. A first sub-set of the image data is transferred from the image sensor and used to create an instant review image. The rest of the data is transferred from the image sensor and essentially all of the data from the image sensor is used to create a second image.
US07782379B2	Corrective operation in continuous shooting When storage time has changed during a continuous shooting operation, the storage times are stored. When the continuous shooting operation has been completed or an available capacity of a storage medium has become lower than image data, the data is imaged with the respective storage times without exposure. The exposed image data is processed on the basis of the data acquired by the charge storage of an image pickup device without exposure.
US07782376B2	Imaging method and imaging apparatus An imaging method includes a step of setting, when a digital zoom operation mode for enlarging an image imaged by a imaging part of an X-Y address type is selected, a zoom magnification and enlarging the image at the zoom magnification set. The imaging method includes the steps of: setting an imaging range in a vertical direction of the imaging part according to the zoom magnification set in the digital zoom step; outputting a driving signal for scanning the shutter signal and the readout signal to perform exposure in the imaging range set in the imaging range setting step and driving the imaging part; and discarding, when the zoom magnification is changed in the digital zoom step, images imaged by the imaging part before and after the change of the zoom magnification to prevent the images from being used.
US07782375B2	Mobile communication device having panoramic imagemaking capability A mobile communication device, in particular a mobile telephone, a PDA or a MDA. In one embodiment, the mobile communication device includes: (1) a main body and (2) a camera module, coupled to the main body and configured for rotation relative to the main body about at least one axis of rotation. In another embodiment, the main body has a camera module mechanical interface, the camera module has a main body mechanical interface that is complementary to the camera module mechanical interface and the camera module is configured to be removably coupled to the main body and further configured for rotation relative to the main body about at least one axis of rotation.
US07782369B2	System and method for a high dynamic range sensitive sensor element or array with gain control A high dynamic range sensitive sensor element or array is provided which uses phase domain integration techniques to accurately capture high and low intensity images. The sensor element of the present invention is not limited by dynamic range characteristics exhibited by prior art solid-state pixel structures and is thus capable of capturing a full range of electromagnetic radiation to provide a high quality output image.
US07782364B2	Multi-array sensor with integrated sub-array for parallax detection and photometer functionality Methods and systems of imaging to correct parallax. Color information is received from multi-array sensors. Luminance information is received from a sub-array sensor arranged with the multi-array sensors. Color information received from at least one of the multi-array sensors is correlated with the luminance information received from the sub-array sensor. Color information is shifted among the multi-array sensors, based on the correlation, to correct the parallax.
US07782362B2	Image pickup device for changing a resolution of frames and generating a static image based on information indicating the frames The image pickup apparatus of the present invention is for taking a static image during a predetermined exposure period. The image pickup apparatus includes: a shaking motion detecting section for detecting an amount of shaking motion between a plurality of frames representing the static image; a shaking motion correcting section for correcting a plurality of frame information indicating the plurality of frames in accordance with the detected amount of the shaking motion; a storage section for storing the plurality of frame information subjected, to the correction of the shaking motion; and an information generating section for generating static image information indicating the static image based on the plurality of frame information stored in the storage section.
US07782354B2	Optical writing device and image forming apparatus An electrophotographic optical writing device equipped with a semiconductor laser includes the semiconductor laser, a collimating lens, an aperture, a cylindrical lens, and a polygon scanner. An additional aperture, a second aperture, is provided in a light path between the semiconductor laser and the collimating lens.
US07782353B2	Image-forming device An image-forming device has cylindrical image-carrying members, and an optical scanning unit. The cylindrical image-carrying members are in a main casing for rotating about respective rotational axes which are parallel to one another and juxtaposed in a single direction. The optical scanning unit is in the main casing and has laser generators, a rotatable polygon mirror, mirrors, and lenses. The laser generators have a one-to-one relationship to the image-carrying members to emit laser beams. The rotatable polygon mirror deflects the respective laser beams to scan the respective image-carrying members. The mirrors have a one-to-one relationship to the image-carrying members to guide the respective laser beams along respective optical paths to the respective image-carrying members. The lenses have a one-to-one relationship to the plurality of image-carrying members provided in the respective optical paths and between the respective mirrors and the respective image-carrying members.
US07782350B2	Printing apparatus, printing system, printhead temperature retaining control method The apparatus and method can suppress an increase in power consumption and reduce ink density unevenness caused by variations in the amount of ink discharge upon performing printhead temperature retaining control. The printing apparatus, which prints on a print medium by scanning a printhead having a printing element for generating thermal energy, includes a determination unit which predicts a maximum temperature which the printhead reaches in printing, and determines a target temperature based on the predicted maximum temperature, and an adjustment unit which adjusts the temperature of the printhead in printing on the basis of the target temperature.
US07782346B2	Liquid crystal display A liquid crystal display device includes a plurality of pixels that are arranged in matrix so as to form a plurality of rows extending in an X direction and a plurality of columns extending in a Y direction. Each pixel includes a liquid crystal layer and a plurality of electrodes for applying a voltage to the liquid crystal layer, and is split into at least one bright subpixel, which has a luminance higher than a certain luminance produced by a display signal voltage supplied, and at least one dark subpixel that has a lower luminance than the certain luminance. The area of the at least one bright subpixel is smaller than that of the at least one dark subpixel. If the at least one bright subpixel and the at least one dark subpixel are arranged in the Y direction in each pixel, two closest pixels that belong to the same row to display the same color have geometric centroids with mutually different Y coordinates. The greatest difference between the Y coordinates of luminance centroids is equal to or smaller than a half of the length RY of the two pixels as measured in the Y direction.
US07782345B2	System and method for providing a wide aspect ratio flat panel display monitor independent white-balance adjustment and gamma correct capabilities A flat panel LCD includes electronic circuitry for coupling to a host computer to receive a white-balance adjustment control signal, and electronic circuitry for receiving image data to be rendered on the flat panel LCD. Further, the flat panel LCD of one embodiment is configured for coupling to a color-sensing device to receive optical characteristics data of the flat panel LCD detected by the color-sensing device. The white balance adjustment mechanisms include the provision of two or more light sources of differing color temperature, whose brightness can be independently varied (and distributed through a light distribution mechanism) to adjust color temperature without altering the grayscale resolution of the RGB colors. The flat panel LCD further includes white balance adjustment software and gamma correction software for generating white-balance adjustment control signals and appropriate gamma correction curves.
US07782344B2	Digital video zooming system A system for preparing a digital video stream for zooming by a content consumer system, including a video frame processor to prepare a plurality of video frames of the digital video stream, a zoom location processor to prepare a plurality of zoom location indicators in the digital video stream, each of the zoom location indicators including an element indicative of a least one horizontal position and at least one vertical position in the video frames, and a stream processor to temporally synchronize the zoom location indicators and the video frames in the digital video stream, such that the video frames are available to be zoomed by the content consumer system based on the zoom location indicators during playback of the digital video steam. Related apparatus and methods are also described.
US07782340B2	Multiple video signals coexisting system and method thereof Disclosed is a multiple video signals coexisting system and method thereof. The multiple video signals coexisting system includes a second switch and a first switch. The first switch outputs a portion of a first video signal and a portion of a second video signal from a plurality of video signals alternately as multiple coexisting video signals according to a selecting signal. The second switch generates the selecting signal according a toggle signal. The multiple video signals coexisting system further includes a pixel clock generator to generate a pixel clock and the second switch can employ the pixel clock to generate the selecting signal thereafter. The multiple video signals coexisting system outputs the multiple coexisting video signals for constituting continuous frames on a display, therefore, to show plural pictures on single display, and more particularly, to show an on-screen display menu translucently on the display.
US07782338B1	Assisted adaptive region editing tool Properties of pixels of a digital image are sampled within different subdivisions of an editing tool impression to produce different pixel property distributions. The property distributions from each region may be automatically classified to identify different edit classes within the property space, which are then used to apply an edit effect to the digital image within the tool impression. The edit classes are represented by an edit profile, the generation of which may be completely automated based on selection of a tool impression, or partially automated using the selection of the tool impression and receipt of classification guidance input, such as one or more parameters received from user input or a configuration file. The edit classes may also be generated without reference to the pixel property distributions, such as via user input.
US07782335B2	Apparatus for driving liquid crystal display device and driving method using the same An apparatus for driving a liquid crystal display (LCD) device includes a liquid crystal panel including 4-color sub-pixels, a data driver to provide video data signals to each sub-pixel, a gate driver to provide a scan pulse to each sub-pixel, a data conversion part to generate a gain value by analyzing a ratio of an achromatic color signal to a chromatic color signal of 3-color source data inputted from an external source and convert the 3-color source data into 4-color data using the generated gain value, and a timing controller to provide the 4-color data received from the data conversion part to the data driver and control the gate driver and the data driver.
US07782333B2	Screen transmission device, method of generating screen and computer readable medium According to an aspect of the present invention, there is provided with a screen transmission device including: an information receiver configured to receive operating condition information indicating an operating condition of a screen display device; a coloring determiner configured to determine coloring of screen data to be displayed on the screen display device based on the operating condition information; a screen data generator configured to generate screen data to be displayed on the screen display device according to the coloring; and a screen data transmitter configured to transmit the screen data to the screen display device.
US07782332B2	Image displaying device An image displaying device comprises a reproduction list creating unit for creating a group of image data within a prescribed range in which a frame number “1” is included and the frame number increases as a first reproduction list and for creating a group of image data within a prescribed range in which a largest frame number is included and the frame number decreases as a second reproduction list, a display controlling unit for reproducing and displaying image data of a frame to be reproduced registered in the second reproduction list in the case that the frame number is set in a direction along which the frame number decreases below the frame number “1” while image data registered in the first reproduction list is reproduced.
US07782331B2	Cross-platform runtime code generation for bit block transfer functions An exemplary method for performing a bit block transfer (bitblt) includes receiving one or more graphics parameters specifying the bitblt and generating a specialized bitblt function to perform the bitblt. The specialized bitblt function includes a one or more code blocks selected from a superset of code blocks based on the graphics parameters. A system includes a specialized bit block transfer (bitblt) function generator generating a specialized bitblt function to perform a specified bitblt. The specialized bitblt function includes intermediate language code corresponding to one or more graphics parameters specifying the bitblt. A translator translates the specialized bitblt function into machine-specific language code.
US07782330B2	Projector, projection display system, and corresponding method and recording medium In response to a requirement of transferring a file from a personal computer PC to a projector 10 that is output by dragging and dropping a corresponding file icon onto a projector icon, a CPU 50 requires setting of a password. The CPU 50 maps the preset password to a file and transfers the file with the password to an external storage device of the projector 10. The projector 10 requires input of a password, which is expected to be assigned to the file, and allows reproduction of the file when the input password is coincident with the preset password.
US07782321B2	Statistical variable display apparatus and method, and storage medium storing statistical variable display program In a statistical variable display apparatus, first lengths along a first axis and second lengths along a second axis are determined. The first lengths are respectively allotted to first-type subgroups, and the second lengths are respectively allotted to the second-type subgroups. The apparatus displays the first-type subgroups arranged along the first axis to have the respective first lengths, the second-type subgroups arranged along the second axis to have the respective second lengths, and representations of acquired statistical variables correspondingly to a respective one of the first-type subgroups arranged along the first axis and a respective one of the second-type subgroups arranged along the second axis.
US07782318B2	Method for reducing network bandwidth by delaying shadow ray generation The present invention provides methods and apparatus in a ray tracing image processing system to reduce the amount of information passed between processing elements. According to embodiments of the invention, in response to a ray-primitive intersection, a first processing element in the image processing system may generate a portion of secondary rays and a second processing element may generate a second portion of secondary rays. The first processing element may generate reflected and refracted rays and the second processing element may generate shadow rays. The first processing element may send a ray-primitive intersection point to the second processing element so that the second processing element may generate the shadow rays. By only sending the intersection point to the second processing element, in contrast to sending a plurality of shadow rays, the amount of information communicated between the two processing elements may be reduced.
US07782315B2	Display device and method of driving the same The present invention is intended to achieve an improvement in the horizontal resolution of an active matrix semiconductor display device. In accordance with the present invention, by supplying a modulated clock signal obtained by frequency modulating a reference clock signal at a constant period to a driving circuit of an active matrix semiconductor display device or to a driving circuit of a passive matrix semiconductor display device, signal information (the presence or absence of an edge, the extent of nearness) relative to the vicinity of the sampling of video signals (image signals) sampled on the basis of this modulated clock signal can be written to the corresponding pixels of the semiconductor display device as shading information. The driving method of the present invention makes use of a phenomenon which apparently makes the resolution of an image display higher owing to the shading information (visual Mach phenomenon and Craik-O'Brien phenomenon).
US07782313B2	Reducing power during idle state Included are systems and methods for reducing power consumption in a computer system. At least one embodiment of a method, among others, includes processing data in a normal mode, receiving an indication of a transition into an idle mode, capturing at least one frame of display data, and transmitting the captured frame of display data for display during idle mode.
US07782304B2	System and apparatus for adjustable keyboard arrangements Some embodiments of the invention include an apparatus and system for keyboard arrangements where one or more of the keys are adjustable. In some embodiments, the arrangement includes one or more keys and a moving mechanism for controlling the position of the keys. The keys may be adjusted in terms of height. The adjustment in height may result from the operation of a lever or switch, or as a result of opening the case or shell of the system. Other embodiments are described.
US07782302B2	Trackball for a mobile device A graphical user interface which employs logical barriers for temporarily preventing cursor movement between graphical elements under certain circumstances. For example, one embodiment of the invention comprises a data processing device having a memory for storing program code and a processor for processing the program code to generate a graphical user interface (GUI), the GUI comprising: a first predefined region including of a first plurality of selectable graphical elements; a second predefined region including a second plurality of selectable graphical elements; and a logical barrier between the first predefined region and the second predefined region, the logical barrier configured to temporarily prevent movement from a graphical element in the first predetermined region to a graphical element in the second predetermined region in response to a user input directed towards graphical element in the second predetermined region, the logical barrier temporarily preventing the movement for either a specified period of time and/or a specified amount of movement generated by a user input device.
US07782298B2	Multimedia user interface A user interface for multimedia centers advantageously utilizes hand-held inertial-sensing user input devices to select channels and quickly navigate the dense menus of options. Extensive use of the high resolution and bandwidth of such user input devices is combined with strategies to avoid unintentional inputs and with dense and intuitive interactive graphical displays.
US07782293B2	Device and method for wavelength filtering Embodiments include devices and methods for wavelength filtering. For example, one embodiment includes a display comprising a plurality of the display elements each comprising a movable reflector, a first partial reflector, and a second partial reflector. The first partial reflector is positioned at a first distance from the movable reflector and forms a first optical resonant cavity therebetween. The second partial reflector is positioned at a second distance from said first partial reflector and forming a second optical resonant cavity therebetween. In various embodiments, the movable reflector is movable with respect to the first partial reflector to alter the first optical cavity. Other embodiments include a method of making devices.
US07782291B2	Driving circuit of liquid crystal display An exemplary driving circuit of a liquid crystal display includes a delay circuit (130), a first transistor (140), a second transistor (160), a first bias resistor (R1), and a second bias resistor (R2). The first transistor includes a source electrode for receiving a first voltage signal, and a drain electrode for providing the first voltage signal to a first external circuit. The second transistor includes an emitter electrode for receiving a second voltage signal, and a collector electrode for providing the second voltage signal to a second external circuit. The delay circuit includes a first control pin (137) connected to the gate electrode of the first transistor, and a second control pin (138) connected to the base electrode of the second transistor. The delay circuit is configured for delaying the first voltage signal for a first predetermined time period and the second voltage signal for a second predetermined time period.
US07782290B2	Source driver circuit and display panel incorporating the same A source driver circuit includes several sampling-transmitting units each including a first sub-latch unit, a second sub-latch unit and a transmission channel set. In a first period, the first sub-latch unit samples first pixel data. In a second period, the second sub-latch unit samples second pixel data. The transmission channel set electrically couples the first sub-latch unit and the second sub-latch unit to a corresponding digital-to-analog converting unit. In the second period, the first sub-latch unit outputs the first pixel data to the corresponding digital-to-analog converting unit via the transmission channel set. In a third period, the second sub-latch unit outputs the second pixel data to the corresponding digital-to-analog converting unit via the transmission channel set.
US07782288B2	Liquid crystal display apparatus The liquid crystal display apparatus of the present invention includes: a liquid crystal panel having a liquid crystal layer and an electrode for applying a voltage to the liquid crystal layer; and a drive circuit for supplying a drive voltage to the liquid crystal panel. The drive circuit supplies a drive voltage obtained by giving an overshoot to a gray-scale voltage corresponding to an input image signal in the current vertical period, the drive voltage being determined in advance according to a combination of an input image signal in the immediately-preceding vertical period processed based on a predicted value of the transmittance of the liquid crystal panel in the immediately-preceding vertical period and the input image signal in the current vertical period.
US07782287B2	Data accessing interface having multiplex output module and sequential input module between memory and source to save routing space and power and related method thereof A data accessing interface between memory and source in LCD display IC includes a multiplex output module and a sequential input module. Suppose a row width of the memory is N bit. The multiplex output module is for outputting a row N-bit digital data. The multiplex output module includes a buffer for receiving the row N-bit digital data from the memory; and a multiplex unit for continuously selecting M bits from the N bit digital data to output to source. After N/M times, all of the row N bit digital data will be output to source. The sequential input module includes N latches and N/M latch control signals; when each latch control signal is active, it will latch M bit digital data from the multiplex output into M latches. After N/M latch control signals are active sequentially, the N bit digital data are stored into the N latches for source.
US07782281B2	Method and apparatus for driving liquid crystal display device A method of driving a liquid crystal display device includes extracting brightness components of a portion of the first data for a current frame, arranging the brightness components for the current frame into a brightness histogram, retrieving brightness histograms for at least two frames prior to the current frame to generate an average histogram, generating second data for the current frame based on the average histogram, comparing the histogram for the current frame with the average histogram to determine whether an image at the current frame is a moving image or a still image, and driving the liquid crystal display device in accordance with one of the first data and the second data based on the comparison result.
US07782274B2	Folding multimedia display device Various configurations of an electronic display, and devices incorporating the display, are provided. The display may have multiple portions connected along one or more axes, lines, points, or other connecting areas. The portions are movable about the connections. In various configurations, the display portions emulate different media and/or communication and computing devices. Two or more of the display devices may be coupled in an array.
US07782273B2	Antenna connecting structure and antenna connecting method An antenna connecting structure includes a shielded cable including: a core wire; an inner sheath covering the core wire; a shielding member covering the inner sheath; and an outer sheath covering the shielding member, wherein one end of the core wire, the inner sheath and the shielding member are exposed at one end of the shielded cable in the longitudinal direction, an antenna member including: a dielectric body; and an antenna conductor which has an antenna portion molded in the dielectric body, and a terminal portion formed integrally with the antenna portion and press-clamped or press-contacted to the one end portion of the core wire, and a conductive ground terminal including: a receiving portion for holding the dielectric body so that the ground terminal does not contact the antenna conductor and the core wire; a shielding member grasping portion for grasping one end of the shielding member.
US07782272B2	Antenna apparatus An antenna apparatus includes: an antenna element; and a substrate on which a low noise amplifier is mounted and on which the antenna element is disposed, wherein the substrate comprises: an input unit for inputting an electric signal into the low noise amplifier from an output terminal formed at a lower part of the antenna element; an output unit for outputting the electric signal to a transmission unit connected to a signal processing unit for processing the electric signal from the antenna element; and a signal blocking unit provided between the input unit and the output unit.
US07782271B2	Multi-frequency antenna A portable electronic device with function of receiving and radiating radio frequency (RF) signal and a multi-frequency antenna thereof are disclosed. The portable electronic device comprises a RF module and a multi-frequency antenna connecting to the RF module. The multi-frequency antenna comprises a helix element and a coaxial cable disposed within the helix element. The helix element comprises a first helix portion and a second helix portion adjacent to each other, and the coaxial cable comprises a grounding portion and a radiating portion. The first helix portion covers the grounding portion, and the radiating portion is disposed within the second helix portion separated with each other.
US07782270B2	Planar inverted-F antenna with extended grounding plane Disclosed is a planar inverted-F antenna with an extended grounding plane. The planar inverted-F antenna has a grounding metal plate having a selected side edge on which the extended grounding plane is formed and has a predetermined height. At least one antenna signal radiating plate is connected to the grounding metal plate by a short-circuit piece and is substantially parallel to and spaced from the grounding metal plate by a distance. A feeding point extends from the antenna signal radiating plate in a direction toward the grounding metal plate and corresponds to the extended grounding plane with a predetermined gap therebetween. With the arrangement of the extended grounding plane, the impedance matching of the antenna is improved and the impedance bandwidth of the antenna is increased.
US07782269B2	Antenna structure for a wireless device with a ground plane shaped as a loop This invention refers to an antenna structure for a wireless device comprising a ground plane and an antenna element, wherein the ground plane has the shape of an open loop. The invention further refers to an antenna structure for a wireless device, such as a light switch or a wristsensor or wristwatch, comprising an open loop ground plane having a first end portion and a second end portion, the open loop ground plane defining an opening between the first end portion and the second end portion; and an antenna component positioned within the opening defined between the first end portion and the second end portion and overlapping at least one of the first end portion or the second end portion. Further the invention refers to a corresponding wireless device and to a method for integrating such an antenna structure in a wireless device.
US07782268B2	Antenna assembly An antenna assembly for a cellular telecommunications system has an antenna having an array (1) of radiating elements, for example patches, situated in front of a panel (2) having an electrically conductive face. An amplifier (6) for amplifying RFS signals received by the antenna is situated on the opposite side of the panel (2) from the radiating elements. The amplifier is situated at least partially within the signal shadow cast by the panel (2) so that the latter shields the radiating elements from the amplifier. The amplifier can thus be situated close to the antenna without adversely affecting the performance of the latter.
US07782264B1	Systems and methods for providing distributed load monopole antenna systems A distributed load monopole antenna system is disclosed that includes a monopole antenna including a radiation resistance unit, a current enhancing unit, and a conductive mid-section. The radiation resistance unit is coupled to a transmitter base and the radiation resistance unit includes a radiation resistance unit base that is coupled to ground. The radiation resistance unit also includes a plurality of windings of an electrically conductive material wherein each winding includes an elongated portion that is substantially parallel with an elongated central axis of the monopole antenna. The elongated portions are positioned at a plurality of angularly disposed locations around the elongated central axis of the monopole antenna. The current enhancing unit is for enhancing current through the radiation resistance unit, and the conductive mid-section is intermediate the radiation resistance unit and the current enhancing unit.
US07782259B2	Pattern antenna, tag antenna and pattern transmission path In an antenna formed by a substantially thin-plate state conductive member on a base material, a surface area expanding portion is provided at least substantially at a center part in a direction orthogonal to a direction in which an electric current flows. The surface area expanding portion is a projection portion provided in a projecting state with respect to a peripheral portion (or a concave portion arranged concaved than the peripheral portion). A width dimension of the projection portion (or the concave portion) in a cross-sectional face is twice or more of a skin depth of the electric current in the cross sectional face.
US07782256B2	Enhanced passive coherent location techniques to track and identify UAVs, UCAVs, MAVs, and other objects A system and technique is described which has the capability to track and identify, in real time, various aircraft and objects including Unmanned Aerial Vehicles (UAVs), Unmanned Combat Aerial Vehicles (UCAVs), and Micro Aerial Vehicles (MAVs). The system uses a combination of techniques including conventional automatic dependent surveillance broadcast (ADS-B), transponder multilateration, broadband emitter multilateration, primary and secondary radar, and passive coherent location. A series of enhancement to conventional passive coherent location are described.
US07782251B2	Mobile millimeter wave imaging radar system A short range millimeter wave imaging radar system. The system includes electronics adapted to produce millimeter wave radiation scanned over a frequency range of a few gigahertz. The scanned millimeter wave radiation is broadcast through a frequency scanned transmit antenna to produce a narrow transmit beam in a first scanned direction (such as the vertical direction) corresponding to the scanned millimeter wave frequencies. The transmit antenna is scanned to transmit beam in a second direction perpendicular to the first scanned direction (such as the horizontal or the azimuthal direction) so as to define a two-dimensional field of view. Reflected millimeter wave radiation is collected in a receive frequency scanned antenna co-located (or approximately co-located) with the transmit antenna and adapted to produce a narrow receive beam approximately co-directed in the same directions as the transmitted beam in approximately the same field of view. Computer processor equipment compares the intensity of the receive millimeter radar signals for a pre-determined set of ranges and known directions of the transmit and receive beams as a function of time to produce a radar image of at least a desired portion of the field of view. In preferred embodiment the invention is mounted on a truck and adapted as a FOD finder system to detect and locate FOD on airport surfaces.
US07782249B2	Detection and ranging device and detection and ranging method A pseudo-spatial-average-covariance-matrix generating unit selects, from matrixes Rf1, Rf2, Rb1 and Rb2, one appropriate matrix or two or more appropriate matrixes for combination to generate a pseudo-spatial-average-covariance matrix R. A pseudo-spatial-average-covariance-matrix Hermitian-conjugate product generating unit generates a target-count-estimation matrix RRH. A target-count-estimation-matrix decomposing unit performs LU decomposition on RRH into a lower triangular matrix L and an upper triangular matrix U. An index generating unit generates an index using elements of the upper triangular matrix U. An index-parameter scanning unit estimates a target count by using the index generated by the index generating unit.
US07782241B2	Signal processing method and device, and analog/digital converting device The first and second time-domain signals are received, and a difference between the pulse width of the first time-domain signal and the pulse width of the second time-domain signal within a unit time for carrying one item of analog signal information is obtained. The obtained difference is treated as positive information if the pulse width of the first time-domain signal is greater than the pulse width of the second time-domain signal, or as negative information if the pulse width of the first time-domain signal is smaller than the pulse width of the second time-domain signal.
US07782236B2	Current cell circuit in digital-analog converter Embodiments relate to a current cell circuit in a digital-analog converter. According to embodiments, a current cell circuit in a digital-analog converter may include a current source connected to a power voltage terminal to generate current having a predetermined magnitude, a first current switch transferring current provided from the current source to a first output terminal, a first current generator detecting output voltage from the first output terminal and generating the amount of reduced current from the detected voltage, and a first current supplier supplying the amount of current generated from the first current generator to the first current switch. According to embodiments, current variations at a constant output voltage may be minimized. This may make it possible to obtain more stable frequency characteristics.
US07782234B2	Successive approximation analog-to-digital converter with inbuilt redundancy The method and system for converting an analog value into a digital equivalent using a plurality of conversion engines are disclosed. In one embodiment the plurality of conversion engines comprise N DACs associated with M comparators, wherein M is substantially greater than N, wherein M and N are integers, wherein each of the N CAP DACs has an associated P CAP DAC and an N CAP DAC, a method includes generating voltage differences between P CAP DACs and N CAP DACs such that they produce M threshold voltages. The plurality of conversion engines operate in a first phase of the conversion by inputting the produced M threshold voltages to associated inputs of M comparators so that more than one bit can be determined from a sampled signal during each successive approximation trial. The plurality of conversion engines operate in a second phase of the conversion by inputting the produced M threshold voltages into the associated inputs of the M comparators such that the plurality of conversion engines operate independently so that fewer bits are determined from the sampled signal during each successive approximation trial then were determined during the first phase. A result obtained from at least one of the plurality of conversion engines is then outputted.
US07782232B2	Encoding and decoding methods using generalized concatenated codes (GCC) Systems, apparatuses, and methods for encoding and decoding using generalized concatenated codes (GCC) are described. The methods include receiving data; encoding the received data to obtain first encoded data; encoding the first encoded data until a GCC encoding reaches an intermediate level; and terminating the GCC encoding at the intermediate level.
US07782229B1	Required navigation performance (RNP) scales for indicating permissible flight technical error (FTE) The present invention is a flight deck system for promoting accurate navigation of an aircraft. The system includes a memory configured for storing position information for the aircraft. The system further includes a processor which is configured for being communicatively coupled with the memory, the processor also being configured for receiving the aircraft position information stored in the memory. The system also includes a display which is configured for being communicatively coupled with the processor. The display is further configured for displaying a scaled indicator, the scaled indicator having been output to the display by the processor, the scaled indicator being based upon the received aircraft position information. The scaled indicator includes: a current position indicator for indicating an estimated current position of the aircraft, a desired position indicator for indicating a desired navigational position for the aircraft, and an allowable Flight Technical Error (FTE) indicator for indicating allowable Flight Technical Error (FTE) for the aircraft. Further, the current position indicator, the desired position indicator, and the FTE indicator are suitable for use by a pilot of the aircraft in maintaining the aircraft within established navigational boundaries.
US07782228B2	Vehicle spacing detector and notification system A device for the detection of tailgating between vehicles on a roadway. The device may emit ultrasonic signals on to a roadway and receive said reflected signals. The device has a processor adapted to use the received signals to determine the presence or absence of a vehicle. The processor also determines whether a vehicle is tailgating another vehicle by detecting if the time spacing between two sequential vehicles traveling in the same direction in the same lane is two second or less. The processor alerts a remote receiver when tailgating is detected. The device may also include a camera to take pictures of any vehicle determined to be tailgating. The device is preferably compact and easily portable.
US07782226B2	Communication nodes for use with a wireless ad-hoc communication network Communication nodes for use with a wireless ad-hoc communication network are disclosed. In an embodiment of the present invention, the communication node comprises a transducer, which generates a signal in response to an external signal. The ad-hoc network communication is supported in part by static communication nodes, which defined an organized infrastructure network in order to achieve the various functions of the transducers. In another embodiment, the communication node for use with a wireless ad-hoc network does not include a transducer. Such communication nodes are preferred for use with a less structured network with virtually no infrastructure and allow for being used with expanding and contracting networks. Mobile communication nodes mostly support the propagation of signals. However, pseudo-static or static communication nodes are also used in wireless communication ad-hoc networks.
US07782220B2	Proximity sensor and proximity sensing method A proximity sensor includes a sense electrode having a first capacitance to ground, wherein the first capacitance varies in response to proximity of an object to be sensed; a first sense circuit which provides a first pulse signal having a pulse width determined in accordance with the first capacitance; a reference capacitor; a second sense circuit which provides a second pulse signal having a pulse width determined in accordance with a second capacitance of the reference capacitor; and a computing circuit which computes a difference pulse by subtracting the second pulse signal from the first pulse signal and provide a pulse of the difference pulse width.
US07782214B1	Entertaining or advertising hygiene apparatus A method and apparatus are disclosed which involve an improved way to coerce use of a soap dispenser (or other hygiene device). A soap dispenser according to at least one embodiment, includes a teaching or entertaining device that is fun and informative that is triggered when the soap dispenser is utilized. The soap dispenser may also be utilized as an advertising tool.
US07782213B2	Apparatus for producing RFID labels and RFID label An apparatus for producing RFID labels includes a feeding-roller driving shaft configured to feed a base tape on which a RFID circuit element provided with a tag antenna having directivity with sensitivity to one side higher than that to the other side is arranged, a sensor configured to acquire information relating to directivity of the tag antenna, a lower apparatus antenna for radio communication with the RFID circuit element, and a print head configured to make a print on a cover film to be bonded to the base tape and controls the print head according to the directivity information acquired using the sensor.
US07782212B2	Radio frequency sealing apparatus for a container An RF security apparatus includes a covering membrane for overlying at least a portion of an opening in the container. The covering membrane has a sealing portion configured to be bonded to a mouth of the opening. An RF security device is coupled to the covering membrane. The RF security device is configured to emit a predetermined RF signal in response to an RF interrogation signal.
US07782209B2	Detection signal generator circuit for an RFID reader An RFID transponder detector is provided having a coupled oscillator system. Coupled first and second LC of the system produce a detection signal each time a combination of pulses is applied to the LC pairs. Application of the pulses is repeated periodically to produce a sequence for detection signals having two different first and second detection frequencies. Transmitting the sequence of detection signals results in corresponding first and second response signals having the first and second detection frequencies at the LC pairs. Values of a preselected detection parameter for the detection signals are compared to the values of the detection parameter for the response signals to determine if a transponder having a transponder resonant frequency corresponding to the first or second detection frequency is present in a proximal space of the transponder detector.
US07782206B2	RFID tag disabling systems and methods of use Systems and methods for disabling transponders used in electronic toll collection or other RFID systems, wherein the transponders include an antenna and RFID circuitry. The transponders can be selectively disabled by releasably securing a disabling device having a metallic portion at an operative position over the antenna of the RFID system, whereupon the metallic portion is coupled to the antenna in such a manner as to disable the RFID circuitry so long as the disabling device is at the operative position. The RFID circuitry is arranged to be automatically enabled upon removal of the disabling device from the operative position.
US07782203B2	Strong typing of components in RFID business processes The claimed subject matter provides a system and/or a method that facilitates verifying data within a radio frequency identification (RFID) business process. A radio frequency identification (RFID) business process can include at least one component that can receive an event from a logical source. A strong typing module can employ strong typing of the component to define at least one of an event type for the component, an input event type for the component, or an output event type for the component.
US07782200B1	Reusable electronic trailer seal A reusable electronic seal for a trailer includes a structural enclosure configured to attach onto a shackle of a padlock with an electronic module integrated within the to enclosure. A rechargeable battery circuit with a photovoltaic cell is in communication with a battery permitting the battery to be charged by the photovoltaic cell when the voltage is low. The electronic module incorporates a microprocessor, a random number generator and a liquid crystal display which communicates with the random number generator. A shackle engagement switch is configured to engage the padlock shackle, applying a signal to the microprocessor when the padlock has been opened. When the padlock is re-latched the shackle engagement switch triggers the microprocessor to signal the random number generator to transmit a new number to the liquid crystal display.
US07782196B2	Entrance security system An entrance denial security system for detecting a fault condition at one or more entrances into a secured area representing unauthorized activity and an attempt to gain entry through the entrance. The system comprising an entrance barrier closing an entrance into a secured area; the barrier including a plurality of hollow structural elements having hollow cores forming a rigid integral barrier; an optical fiber sensor line laced through the hollow cores of the structural elements of the gate for detecting the fault condition; a processor in communication with the fiber sensor line for generating a fault signal in response to the occurrence of a fault condition and identifying the entrance where the fault condition occurred; and a communication device operatively associated with the processor for communicating the fault signal so that a proper security response can be made to the fault condition.
US07782190B1	Implantable device and system and method for wireless communication A wireless communication method and protocol, and wireless devices and systems for stimulation, are provided for communication between a wireless device and a charging device. During active wireless charging, communications (data transmission) from the wireless device to the charging device occurs via pulse loading the receive antenna of the receiving device. Because switching regulation in the receiving device may interfere with the communications, the switching regulation is disabled during a communications window. To further reduce the likelihood of misinterpretation of signals detected in the charging device resulting from the switching regulation or noise, the data bit rate of the pulse loading communications is maintained higher than the switching regulation frequency.
US07782185B1	Progressive brake light apparatus The progressive brake light apparatus sequentially lights three separate brake lights via hydraulic pressure sensing of the brake system between the master cylinder and the rear brakes. The apparatus provides a brake light assembly with the three distinctly different light sources disposed within, each of different size and different color, the brightest and largest being disposed at the top of the brake light assembly and the smallest and dimmest at the bottom of the brake light assembly. The apparatus thereby provides signal to trailing vehicles of the intensity of braking force applied, and therefore with a distinct signal of only initial brake pressure, versus average stopping, versus intense braking.
US07782182B2	Method and system for demonstrating discrepancies in speedometers in vehicles The invention relates to a method and a system to demonstrate discrepancies in the speedometer of a vehicle. In a preferred embodiment, the method and the system further comprise the possibility of adjusting or calibrating the speedometer with the use of demonstrated discrepancies automatically or after approval by the user. The speed of the vehicle is measured with an external measuring device and the information about the speed is sent to a receiver in the vehicle. By comparing received information about speed with information of speed according to the speedometer of the vehicle information about possible discrepancies is made available to a user.
US07782169B2	Magnetic core A magnetic core (1, 1′, 20, 28, 29, 58, 61, 70, 70′, 80, 80′, 90) for a magnetic component has a longitudinal axis parallel to which a magnetic current is to be substantially guided inside the magnetic core. The magnetic core consists of a plurality of magnetic elements (2, 3, 4, 5, 6, 7, 8, 29, 30, 35, 36, 38, 39, 40, 48, 49, 52, 53) shaped like bars or strips arranged parallel to one another, at least one of the magnetic elements (2, 3, 4, 5, 6, 7, 8, 29, 30, 35, 36, 38, 39, 40, 48, 49, 52, 53) is different from the other magnetic elements in one or several of the following characteristics: permeability of material, curvature, length, shape and/or size of surface area, presence, type and location of notches in the magnetic elements.
US07782163B2	Set with a position sensor and an exciter part A set is disclosed with a position sensor and an exciter part. The position sensor has three reed contacts which are pointed parallel to one another in a triangle arrangement next to one another, of which the first two are used for doubled detection of the exciter magnetic field. The third reed contact is used to generate an error signal when the sensor is activated by means of an outside magnetic field. The exciter part has three permanent magnets which are arranged in a triangle arrangement which corresponds to the triangle arrangement of the reed contacts, with pole axes aligned parallel to one another. Of them, the first two magnets are pointed in the same direction and are located at a first distance to one another. The third magnet is polarized in the direction opposite the first two. This results in that only the two make contacts can be activated by the two bar magnets which are pointed in the same direction. Conversely, all three reed contacts are activated each by an outside magnetic field. This yields a manipulation-safe proximity switch.
US07782161B2	Magnetically actuated microelectromechanical systems actuator A microelectrical mechanical system (MEMS) actuator having electrically conductive coils that create first magnetic fields that are opposed by a second magnetic field is disclosed. The actuator includes two coils having dual, interspersed Archimedean spirals. Within an actuator, one coil is arranged with spirals that proceed clockwise, while the other coil is provided with spirals that proceed counterclockwise. An electrically conductive bridge mechanically couples the two coils of each actuator to a mirror. Opposing magnetic fields are created to provide a force that urges the coils to expand so that the outermost portions of the coil extend upward, away from the substrate, and lift the bridge and mirror. Control current may then be modulated to increase and decrease the coil's magnetic field strength thereby increasing and decreasing the coil's extension to raise and lower relative to the substrate.
US07782158B2	Passband resonator filter with predistorted quality factor Q A filter for processing an RF signal includes an input port and an output port and a plurality of resonators. The resonators are arranged in a sequentially-coupled arrangement between the input and output ports to affect an RF signal therebetween. Each resonator includes a cavity and resonant element. The resonant elements of at least two resonators are made of two different types of materials to effect higher and lower Q factors for the resonators. The resonators are arranged to provide at least one resonator having a lower Q factor proximate one of the input and output ports while the higher Q factor resonator is provided proximate the inside of the sequentially-coupled arrangement.
US07782157B2	Resonant circuit, filter circuit, and multilayered substrate In a band-pass filter using at least one resonant circuit, a resonant circuit having multiple matching frequencies, a filter circuit having an attenuation pole at a lower/higher frequency of a pass band using the resonant circuit, and a multilayered substrate using the resonant circuit are provided. The resonant circuit includes an input transmission line, an output transmission line of which an input terminal is connected to an output terminal of the input transmission line, a first capacitor of which one terminal is connected to an input terminal of the input transmission line and the other terminal is connected to an output terminal of the output transmission line, a main resonant transmission line of which one end of is connected to an output terminal of the input transmission line, and a second capacitor of which one end is connected to the other side of the resonance main transmission line and the other side is grounded.
US07782154B2	Power amplifier and modulator thereof A power amplifier including a loop filter, a frequency generator, a quantizer, and an output stage module is provided. The frequency generator outputs a signal with a reference frequency to the loop filter, and includes a logic circuit, a current array, and a dummy load. The dummy load representing a load circuit in the loop filter is coupled to the current array. An equivalent impedance of the dummy load is proportioned to an equivalent impedance of the load circuit. The current array outputs the signal and a dummy signal to the loop filter and the dummy load, respectively, according to a logic signal. By using the frequency generator to modulate the frequency automatically, an impact on the power amplifier caused by passive devices therein due to process variationscan be reduced.
US07782153B2	Timing adjusting method and timing adjusting apparatus A timing adjusting method detects a phase error between a main signal path from which a transmitting signal is obtained and a control signal path from which a voltage control signal is obtained, based on a to-be-amplified signal that is to be amplified and represents an amplitude or a power of the transmitting signal prior to amplification and a feedback signal that represents an amplitude or a power of the transmitting signal after the amplification, adjusts an amount of delay of at least one of the main signal path and the control signal path so as to mutually cancel the phase error, and amplifies the transmitting signal from the main signal path depending on the voltage control signal from the control signal path. The detecting the phase error may include detecting polarity transition points of a slope of a waveform of the to-be-amplified signal or the feedback signal, and measuring the phase error using the detected polarity transition points.
US07782152B2	Monotonic frequency tuning technique for DCXO in cellular applications A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.
US07782150B2	Apparatus and method of temperature compensating an ovenized oscillator An oscillator having improved frequency stability which includes an oscillator circuit and an SC-cut resonator connected with the oscillator circuit. The SC-cut resonator has a first turning point. A temperature compensation circuit is connected with the oscillator circuit. The temperature compensation circuit is adapted to adjust a reference frequency generated by the oscillator circuit according to a frequency response associated with a second turning point of an AT-cut resonator.
US07782147B2	Apparatus for providing oscillator frequency stability An apparatus for providing oscillator frequency stability is disclosed. The apparatus includes an internally ovenized oscillator module having an oscillator and an inner heater to maintain the oscillator at a first temperature during operation. The apparatus also includes a thermally conductive cover for forming a first compartment to contain the internally ovenized oscillator module along with multiple heaters. The heaters are in thermal communication with the thermally conductive cover and the substrate to form an oven to keep the internally ovenized oscillator module at a stable second temperature during operation. In addition, the apparatus includes a thermally insulative cover for forming a second compartment to contain the first compartment.
US07782146B2	Interleaved voltage controlled oscillator An interleaved voltage-controlled oscillator (VCO) is disclosed. The VCO includes a ring circuit comprising a series connection of main logic inverter gates, a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates, at least one temperature compensation circuit comprising a logic inverter gate in series connection with one or more field effect transistors, the field effect transistor responsive to a compensating voltage input that is proportional to temperature, and an electronic circuit in signal communication with the at least one temperature compensation circuit and configured to provide a voltage signal responsive to temperature. Each delay element includes a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages, and a proportional section, comprising controls for regulating signal transmission through at least one logic inverter gate.
US07782143B2	Phase locked loop and delay locked loop with chopper stabilized phase offset A control circuit includes a phase frequency detector that receives a reference phase ΦREF (signal) as an input and a feedback phase ΦFBK (signal) as control feedback. A voltage controlled oscillator is in electrical communication with the phase frequency detector. The VCO provides an output and the feedback phase ΦFBK (signal). An auxiliary feedback loop receives error phase ΦE (signal) from each of the reference phase ΦREF (signal) and the feedback phase ΦFBK (signal). The auxiliary feedback loop provides an adjustment signal to the control circuit to correct for static phase offset.
US07782141B2	Adaptive signal-feed-forward circuit and method for reducing amplifier power without signal distortion Digital amplifying circuitry delays a digital data signal (INR) to produce an output signal (VoutR). The delayed digital data signal is converted to an analog signal (VinR) for amplifying by an amplifier (10R). Signal amplitude information (S_R[n]) contained in the incoming digital data signal is detected during the delaying. The signal amplitude information is converted to a first control signal (S_Io_NEG[n]) in response to which an adjustable maximum available supply current of the amplifier is produced of least sufficient magnitude to avoid distortion during the amplifying to produce the output signal. The signal amplitude information also is converted to a second control signal (S_AMPLITUDE[n]) in response to which a supply voltage (VNEG) of the amplifier is controlled.
US07782138B2	Signaling system with low-power automatic gain control An integrated circuit device includes a variable-gain amplifier, memory circuit and gain control update circuit. The variable-gain amplifier generates an amplified signal having an amplitude according to a gain control value that is stored, at least during a first interval, within the memory circuit. The update circuit generates an updated gain control value based on the amplified signal during the first interval, and outputs the updated gain control value to the memory circuit to be stored therein at a conclusion of the first interval.
US07782135B2	Power amplifier A driver (Highside Driver, Lowside Driver) adapted to drive each of final transistors (MH, ML, Mpower) included in a power amplifier, the driver including: a first plurality of switches (Mpsiow, Mpmoderate, Mpfast) having their respective main current channels coupled between a bias voltage terminal (Vddx) and a control electrode of the respective final transistors (MH, ML, Mpower), said first plurality of switches (Mpsiow, Mpmoderate, Mpfast) being selectively turned ON for enabling a progressive charging of the respective control electrode of the final transistors (MH, ML, MPower), a second plurality of switches (Mnsiow, Mnfast) having their respective main current channels coupled between another bias voltage terminal (Vsource) and the control electrode of the respective final transistors (MH, ML, Mpower), said second plurality of switches (Mnsiow, Mnfast) being selectively switched ON until a current through the respective final transistors (MH, ML, Mpower) changes its polarity.
US07782133B2	Power amplifier with output power control This disclosure relates systems and methods for a power amplifier with output power control. The power amplifier can include multiple stages of amplification. An RF signal is fed to the power amplifier with output control that amplifies the power of the RF signal to meet operational requirements. A first stage of the power amplifier controls the output power via voltage regulation. An isolating device is introduced in the transmission path of the RF signal between the first stage and the following stages of the power amplifier. The isolating device ensures that the load impedance of the first stage remains fixed at a constant value.
US07782132B2	Method and apparatus for improving the performance of MIMO wireless systems Method and apparatus for efficiently providing DC power enhancement to power amplifiers each of which being arranged in a MIMO system, by suing an enhancement circuitry with a plurality of inputs and outputs. Each input has a corresponding DC enhancement output that is connected to a DC enhancement input of a power amplifier. The DC enhancement output becomes operative whenever the amplitude of the corresponding input signal exceeds a predetermined threshold. The envelope of a plurality of input signals is sampled by sampling circuitries and the sampled envelopes are fed into a summation circuitry, in which they are summed. Whenever one of the sampled envelopes exceeds the threshold, a DC enhancement power is simultaneously provided to all DC enhancement inputs of all power amplifiers.
US07782131B2	Balanced amplifier and electronic circuit A balanced amplifier (1) is provided with: a first operational amplifier (11) whose reverse-phase input terminal is connected to an input voltage source (30) and whose reverse-phase input terminal is connected to an output terminal of the first operational amplifier; a second operational amplifier (12) whose positive-phase input terminal is connected to the input voltage source and whose reverse-phase input terminal is connected to an output terminal of the second operational amplifier; and a voltage division circuit (20i, 20j, 20k, 20l) for dividing a reference voltage supplied from a reference voltage source (40), the reference voltage source being connected to a positive-phase input terminal of each of the first operational amplifier and the operational amplifier through the voltage division circuit.
US07782126B2	Detection and accommodation of hot-plug conditions A mechanism is provided for a one card to filter false signals due to a another card being hot-plugged. A discriminator circuit in the card receives a low-state signal via an input and, responsive to receiving the low-state signal, the discriminator circuit compares the low-state signal to a static signal. Responsive to the low-state signal being greater than the static signal, the discriminator circuit outputs a high-voltage signal. The high-voltage signal output by the discriminator circuit indicates that the low-state signal is a false low signal. Responsive to the low-state signal being less than or equal to the static signal, the discriminator circuit outputs a low-voltage signal. The low-voltage signal output by the discriminator circuit indicates that the low-state signal is a valid low signal.
US07782123B2	Semiconductor integrated circuit A semiconductor integrated circuit provided with: a transistor M7 with a control terminal supplied with a second voltage GND, a first terminal connected to a third node N3, and second terminal connected to a fourth node N4 for introducing current according to the potential at a second voltage supply node N8, the transistor M7 having a specific value for a threshold value representing the size of voltage supplied to the control terminal to conduct a current of a specific amount between the first terminal and the second terminal; and a transistor M5 with a control terminal connected to fourth node N4, first terminal supplied with a first voltage, and a second terminal connected to a second node N2, the threshold value of transistor M5 being smaller than the specific value.
US07782121B2	Voltage supply circuit, display device, electronic equipment, and voltage supply method A voltage supply circuit including: first and second nodes; a predetermined potential; and an output transistor having its control terminal connected to the first node, its first terminal connected to the second node and its second terminal connected to an output terminal. The circuit further includes: a switching element which turns on in response to an active reset signal to connect the potential and the first and second nodes together; a first capacitor connected to the first node and supplied with a clock; a second capacitor connected to the second node and supplied with another clock; and an adjustment section adapted to adjust the clock amplitudes so that the potentials of the first and second nodes vary with a predetermined difference maintained therebetween. The reset signal is basically reverse in phase to the clocks.
US07782119B2	Semiconductor integrated circuit and operation method for the same The semiconductor integrated circuit is provided, in which an external temperature control or temperature monitoring is possible, with little influence by the noise of a system board which mounts the semiconductor integrated circuit. The semiconductor integrated circuit includes the temperature detection circuit which detects the chip temperature, and the functional module which flows a large operating current. An external terminal which supplies operating voltage, and an external terminal which supplies ground voltage are coupled to the functional module. The temperature detection circuit generates a temperature detection signal and a reference signal. The reference signal and the temperature detection signal are led out to the exterior of the semiconductor integrated circuit via a first external output terminal and a second external output terminal, respectively, and are supplied to an external temperature control/monitoring circuit which has a circuitry type of a differential amplifier circuit.
US07782118B2	Gate drive for wide bandgap semiconductor device A gate drive circuit for a wide bandgap semiconductor junction gated transistor includes a gate current limit resistor. The gate current limit resistor is coupled to a gate input of the wide bandgap semiconductor junction gated transistor when in use and limits a gate current provided to the gate input of the junction gated transistor. An AC-coupled charging capacitor is also included in the gate drive circuit. The AC-coupled charging capacitor is coupled to the gate input of the wide bandgap semiconductor junction gated transistor when in use and is positioned parallel to the gate current limit resistor. A diode is coupled to the gate current limit resistor and the AC-coupled charging capacitor on one end and an output of a gate drive chip on the other end When in use, the diode lowers a gate voltage output from the gate drive chip applied to the gate input of the wide bandgap semiconductor junction gated transistor through the gate current limit resistor. The gate drive circuitry provides a small, efficient, and cost effective control circuitry for a wide bandgap semiconductor junction gated transistor.
US07782117B2	Constant switch Vgs circuit for minimizing rflatness and improving audio performance A MOSFET switch is disclosed that is driven on by a circuit that provides a constant gate to source voltage, Vgs, that is independent of the input voltage, the power supply and any logic signals. The constant Vgs is derived from a reference voltage and biases the MOSFET switch such that Ron is constant, or Rflatness is minimized. A minimized Rflatness provides a higher fidelity transfer of audio signals compared to prior art switches where Rflatness is greater.
US07782116B2	Power supply insensitive voltage level translator A circuit is described that when the power supply to circuits that control a pass transistor is at zero volts, the pass transistor configured as a voltage level translator remains off regardless of the voltages and changes in voltages at the ports connected to the pass transistor. Cross coupled transistors provide a mechanism where the higher of the port voltages is available to power circuitry that maintains the control input of the pass transistor in the off condition. The voltages at the ports may rise and fall relative to each other, but the control input of the pass transistor will keep the pass transistor off.
US07782113B2	Level shifter adaptive for use in a power-saving operation mode A level shifter adaptive for use in a power-saving operation mode is disclosed for interfacing two circuit units powered by a first supply voltage and a second supply voltage respectively. The level shifter includes a preliminary level shifting circuit and an output auxiliary circuit. With the aid of the two supply voltages, the preliminary level shifting circuit is employed to receive an input signal having a first operating voltage swing and functions to convert the input signal into a first output signal and a second output signal both having a second operating voltage swing. The first output signal and the second output signal have opposite voltage levels relative to each other. The output auxiliary circuit is utilized for retaining the voltage level of the first output signal based on the second supply voltage regardless of whether the level shifter is still powered by the first supply voltage or not.
US07782112B2	Device and method for generating clock signal In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector.
US07782110B1	Systems and methods for integrated circuits comprising multiple body bias domains Systems and methods for integrated circuits comprising multiple body bias domains. In accordance with a first embodiment of the present invention, an integrated circuit is constructed comprising active semiconductor devices in first and second body bias domains. A first body biasing voltage is coupled to the first body bias domain, and a second body biasing voltage is coupled to the second body bias domain. The first and the second body biasing voltages are adjusted to achieve a desirable relative performance between the active semiconductor devices in the first and the second body bias domains.
US07782100B2	Driving a full bridge circuit A full bridge that produces an alternating output signal can be driven by operating switching elements of the full bridge in each period in a switching sequence that determines the order of the activation and deactivation of the switching elements. The switching elements are switched in at least two different switching sequences, a first switching sequence is repeated n times before a second switching sequence is carried out, with n>1, or the switching elements are switched in at least three different switching sequences.
US07782099B2	Switching circuit having low threshold voltage A switching circuit for preventing malfunction of a switching device formed of a wide band-gap semiconductor used for switching a high-power main power supply includes a normally-off type FET having a gate electrode, a source electrode connected to the ground, and a drain electrode connected to a power supply potential Vdd, and a normally-on type FET having drain and source electrodes connected to the gate and source electrodes of the FET, respectively, and a gate electrode. In the absence of any power supply, the normally-on type FET turns on. As a result, the gate/source potential of FET attains to 0V, and FET is kept off.
US07782096B2	Track-and-hold circuit with low distortion A track-and-hold circuit capable of tracking an analog input signal and holding a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. A first capacitor is provided, having a first terminal connected to a power supply terminal. Tracking circuitry operates when in an on state to apply through a resistor a tracking voltage to a second terminal of the first capacitor that corresponds to the voltage of the analog input signal, by applying the tracking voltage to a first terminal of the resistor, the second terminal of the resistor being connected to the second terminal of the first capacitor. A switch, responsive to the track signal and the hold signal, operates to switch the tracking circuitry to an on state in response to the track signal and to an off state in response to the hold signal, the time of change from the track signal to the hold signal comprising the sampling instant. A second capacitor is provided, having a first terminal connected to the first terminal of the resistor and having a second terminal connected to a power supply terminal. The second capacitor substantially reduces frequency-dependent harmonic distortion.
US07782092B2	Cascaded pass-gate test circuit with interposed split-output drive devices A cascaded pass-gate test circuit including interposed split-output drive devices provides accurate measurement of critical timing parameters of pass gates. The rise time and fall time of signals passed through the pass gate can be separately measured in a ring oscillator or one-shot delay line configuration. Inverters or other buffer circuits are provided as drive devices to couple the pass gates in cascade. The final complementary tree in each drive device is split so that the only one of the output pull-down transistor or pull-up transistor is connected to the next pass gate input, while the other transistor is connected to the output of the pass gate. The result is that the state transition associated with the device connected to the pass gate input is dominant in the delay, while the other state transition is propagated directly to the output of the pass gate, bypassing the pass gate.
US07782090B2	Semiconductor device A semiconductor device according to the present invention comprises a first semiconductor integrated circuit 11 having a predetermined function, the first semiconductor integrated circuit outputting a required output signal, a second semiconductor integrated circuit 12 in which a plurality of MOS elements (PMOS transistor or NMOS transistor) for independently switching to and from a conducted state and a non-conducted state in accordance with a plurality of gate signals each having a different timing is provided and the plurality of MOS elements is connected in parallel to an output or an input of the first semiconductor integrated circuit, and a pulse generating circuit 13 for generating and outputting the plurality of gate signals φi (i=1, 2, 3) each having a different timing with respect to the plurality of MOS elements in the second semiconductor integrated circuit.
US07782081B2	Circuit for controlling driver of semiconductor memory apparatus and method of controlling the same A circuit for controlling a driver of a semiconductor memory apparatus includes a driving unit having an impedance that is set according to a code value; a driving reinforcing control unit configured to output an adjustment code for a predetermined time; and a driving reinforcing unit configured to output a reinforcing code obtained by adjusting the code value using the adjustment code, wherein the reinforcing code reinforce a driving capability of the driving unit.
US07782080B2	High capacitive load and noise tolerant system and method for controlling the drive strength of output drivers in integrated circuit devices An output driver calibration circuit includes a programmable drive strength output pullup driver including a strongest transistor and a number of other transistors, a programmable drive strength output pulldown driver including a strongest transistor and a number of other transistors, and a calibration circuit for generating a number of control signals for controlling the transistors in the output pullup driver and the transistors in the output pulldown driver, wherein the control signals are generated simultaneously, except for two the strongest driver transistors.
US07782077B2	Method and apparatus for ballistic single flux quantum logic In one embodiment, the disclosure relates to a single flux quantum (SFQ) signal transmission line powered by an AC power source. The AC power source supplies power to a transformer having a primary winding and a secondary winding. The primary winding receives the AC signal and the secondary winding communicates the signal to the SFQ transmission line. The transmission line can optionally include an input filter circuit for receiving the incoming SFQ pulse. The filter circuit can have a resistor and an inductor connected in parallel. In an alternative arrangement, the filter circuit can comprise of an inductor. A first Josephson junction can be connected to the filter circuit and to the secondary winding. The Josephson junction triggers in response to the incoming SFQ pulse and regenerates a pulse signal in response to a power discharge from the secondary winding.
US07782075B2	Electronic device, load fluctuation compensation circuit, power supply, and test apparatus Provided is a load fluctuation compensation circuit, including a first delay circuitry section that delays a clock signal supplied thereto by a delay amount that fluctuates by a prescribed first fluctuation amount in relation to a unit fluctuation amount of a power supply voltage supplied to a performance circuit; a second delay circuitry section that is disposed in parallel with the first delay circuitry section and that delays the clock signal supplied thereto by a delay amount that fluctuates by a second fluctuation amount, which is greater than the first fluctuation amount, in relation to the unit fluctuation amount of the power supply voltage supplied to the performance circuit; a load circuit that is connected to a common power supply wiring in parallel with the performance circuit; and a phase detecting section that detects a phase difference between the clock signal output by the first delay circuitry section and the clock signal output by the second delay circuitry section and that controls an amount of current consumed by the load circuit based on the detected phase difference.
US07782074B2	System that detects damage in adjacent dice A system including a tester configured to measure a first current from a first die of neighboring dice and a second current from a second die of the neighboring dice. The tester is configured to compare the first current to the second current to detect damage in the neighboring dice.
US07782070B2	Probing device A probing device includes a rack that has an outer support member supporting a circuit layer and a center support member supporting a probe assembly. When the tester touching down the circuit layer of the probing device from the top side, the outer support member of the rack bears this touchdown stress. When the probes of the probe holder touching down the electronic components of an IC wafer under test, the center support member of the rack bears the reaction force from the IC wafer.
US07782069B2	Capacitive proximity switch, and domestic appliance comprising the same A capacitive proximity switch includes an electrically conductive sensor area, which is covered by an electrically-insulating cover plate, as part of a capacitor having a capacitance which varies as a result of proximity. An associated evaluation circuit is provided, and an electrically-conducting body, via which the sensor area is connected to the evaluation circuit and which is arranged between the electrically-insulating cover plate and a mount disposed at a distance therefrom. A domestic appliance includes such a proximity switch. At least one electronic component of the evaluation circuit is arranged on the mount such that it protrudes into a cavity, which is surrounded by the electrically conductive body.
US07782066B2	Sensor, method for sensing, measuring device, method for measuring, filter component, method for adapting a transfer behavior of a filter component, actuator system and method for controlling an actuator using a sensor A sensor for sensing a measurand is described, the sensor comprising a coplanar waveguide with a first surface and a second surface opposite to the first surface; a first structure with a first periodically varying dielectric characteristic, the first structure being arranged on the first surface of the coplanar waveguide; and a second structure with a second periodically varying dielectric characteristic, the second structure being arranged on the second surface of the coplanar waveguide, wherein a unit-cell of the structures with periodically varying dielectric characteristics is dimensioned such that the sensor has a frequency dependent transfer behavior with at least one transfer minimum, and wherein the sensor is implemented such that the measurand influences the first periodically varying dielectric characteristic of the first structure or the second periodically varying dielectric characteristic of the second structure or a relation between such first structure and second structure.
US07782061B2	Battery ohmic resistance calculation system and method An apparatus that estimates the ohmic resistances of N batteries includes voltage and current measurement modules that respectively measure the voltage and current of each of the N batteries. An ohmic resistance estimating module over N+1 time periods receives the voltage and current measurements of each of the N batteries and receives consecutive voltage and current measurements for one of the N batteries. N is a positive integer and the ohmic resistance estimating module estimates the ohmic resistance of the battery that is associated with the consecutive voltage and current measurements.
US07782060B2	Integrated electrode resistivity and EM telemetry tool An integrated electrode resistivity and EM telemetry tool and obtaining both formation resistivity and telemetry data from the integrated tool. An integrated electrode resistivity and EM telemetry tool having a drill collar including a first portion and a second portion separated by an insulated gap and telemetry cartridge carrying telemetry circuitry including a voltage source generating a voltage drop across the insulated gap and an axial current on a drill string that returns through an earthen formation includes an insulated measure electrode connected to the first portion, and resistivity measurement circuitry functionally connected to the measure electrode and the telemetry circuitry.
US07782059B2	Bandwidth expansion in magnetic resonance A magnetic resonance imaging system includes a primary magnet and a secondary magnet operable to produce magnetic fields within a sample being imaged. The MRI system further includes at least one RF coil that is operable to receive electromagnetic frequencies from the sample. The RF coil is formed from tubing that serves as a cooling conduit through which flows a cooling fluid provided by a cooling source. The cooling fluid cools the RF coils to improve imaging of the sample.
US07782058B2	System and method for accelerated MR imaging A system and method for accelerated MR imaging includes a magnetic resonance imaging (MRI) system having a plurality of gradient coils positioned about a bore of a magnet, and an RF transceiver system and an RF switch controlled by a pulse module to transmit RF signals to an RF coil assembly comprising at least one RF transmit coil and comprising multiple coils to acquire MR images. The MRI apparatus also has a computer programmed to excite multiple pencil regions by use of an under-sampled echo-planar excitation trajectory and acquire MR signals simultaneously on multiple channels of the RF coil assembly. The computer is also programmed to separate contributions from the various multiple pencil regions by use of parallel imaging reconstruction.
US07782056B2	Systems and methods for correction of inhomogeneities in magnetic resonance images Intensity inhomogeneities can obscure areas of interest and are problematic for MR image segmentation algorithms. An efficient approach to estimating these inhomogeneities by computing a calibration factor that is a function of an estimated bias field from a series of calibration scans is disclosed. This enables correction of T1W and T2W images by reducing inhomogeneities without the need to map T1 and T2. Because of interest in the shape of the intensity inhomogeneities a limited number of flip angles yield satisfactory performance. Additionally, an RF transmit field B1+ can be estimated and inhomogeneities resulting from the B1+ field reduced from the MR image using the estimated B1+ field.
US07782053B2	Magnetic resonance imaging apparatus and navigator data analyzing method A magnetic resonance imaging apparatus executes scans for executing a navigator sequence for acquiring as navigator data a magnetic resonance signal from a navigator area containing tissues body-moved in a subject and executing an imaging sequence for acquiring a magnetic resonance signal from an imaging area as imaging data at the subject, thereby to generate an image with respect to the imaging area. The magnetic resonance imaging apparatus includes, a phase profile generating part which generates a phase profile so as to show a relationship between a phase of the navigator data and a position of the navigator area, a phase correcting part which corrects folding back of the phase profile generated by the phase profile generating part, and a position detecting part which detects a position of a tissue body-moved in the navigator area, based on the phase profile corrected by the phase correcting part.
US07782049B2	Magnetic device A magnetic device comprises a magnetic element, a first magnetic field application device, and a second magnetic field application device. The first and second magnetic field applying means are disposed on mutually opposite sides of the magnetic element. The magnetic element is, for example, an element in which a soft magnetic film is formed in a meandering shape on a nonmagnetic substrate. The first and second magnetic field application device create a magnetic field in one direction from the first magnetic field application device toward the second magnetic field application device. The bias magnetic field in one direction is thereby applied to the entire soft magnetic film in the magnetic element disposed between the first and second magnetic field application device.
US07782048B2	Eddy current testing method, eddy current testing differential coil and eddy current testing probe for internal finned pipe or tube The invention provides an eddy current testing method for an internal finned pipe or tube which can securely detect a micro defect generated in a trough portion in an inner surface of the pipe or tube, even in the case that an inner surface shape of the internal finned pipe or tube is ununiform in a circumferential direction of the pipe or tube. The eddy current testing method in accordance with the invention detects a defect existing in a trough portion of the pipe or tube (P) by arranging a differential coil (2) constructed by a pair of coils (21, 22) having such a dimension as to be arranged within the trough portion of the pipe or tube (P) and coming away from each other in an axial direction (X) of the coil, within the trough portion of the pipe or tube (P) along a direction in which the trough portion of the pipe or tube (P) extends, and relatively moving the differential coil (2) in the direction in which the trough portion of the pipe or tube (P) extends.
US07782046B2	Electromagnetic tracking method and system Provided is an electromagnetic coil arrangement comprising a set of electromagnetic sensors at fixed locations with respect to each other, each of the electromagnetic sensors comprising a planar coil coupled to a conductive layer, the planar coil comprising non-concentric rings. Further, provided is an electromagnetic tracking system, comprising an electromagnetic coil arrangement, at least one complementary electromagnetic sensor and a processor configured to process a signal comprising data indicative of a mutual inductance between the at least one complementary electromagnetic sensor and each of the set of the electromagnetic sensors of the electromagnetic coil arrangement. Also, provided are a method of tracking and a method of manufacturing an electromagnetic coil arrangement.
US07782045B2	Multi-signal input testing apparatus An exemplary multi-signal input testing apparatus (2) includes a testing table (20), a transfer table (21) slidably positioned on the testing table, and a pair of multi-signal input devices (25) arranged on the transfer table. Each multi-signal input device includes a pair of connect ends (251, 252). One of the connect ends includes a plurality of pinhole terminals for receiving various testing signals, and the other connect end includes a plurality of connectors for supplying the testing signals to a product to be tested. This means that several tests can be automatically performed by a same multi-signal input testing apparatus at any single testing station. This speeds the testing of the products, and helps promote the efficiency of the testing process. In addition, it can simplify the configuration of various testing equipment and save space. Furthermore, there is little or no need for manual work by operators.
US07782042B2	Reference voltage supply circuit, analog circuit, and electronic instrument A reference voltage supply circuit includes a first supply circuit that includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to a first analog reference voltage line, and a second supply circuit that includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to a second analog reference voltage line. When a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
US07782040B2	Information processing terminal and received voltage controlling method Disclosed herein is an information processing terminal including: a resonance circuit unit configured to have a resonance frequency varying linearly in accordance with a control signal so as to receive data and power from a reader/writer in noncontact fashion at the resonance frequency; a maximum received voltage setting unit configured to output a reference voltage for defining a maximum received voltage to be output by the resonance circuit unit; a control signal generation unit configured to generate the control signal in accordance with the received voltage and the reference voltage; and a transmit-receive processing section configured to operate on the received voltage to process the data; wherein the received voltage is not in excess of a predetermined level.
US07782037B2	Power conversion circuit A desired current is caused to flow through a coil by controlling switching of switching elements by a PWM controller. For a voltage sensor, a value of Vo−ΔV, which is a difference between a midpoint voltage Vo of the switching elements and a predetermined threshold voltage ΔV, and a value of Vo−(Vc−ΔV), which is a difference between the midpoint voltage Vo and a value obtained by subtracting the threshold voltage ΔV from a voltage Vc of an upper line, are determined. Then, the determined results obtained from the voltage sensor are input to the PWM controller through flip-flops and a dead time compensator to compensate for dead time, such as, for example, for a command for PWM control signal generation.
US07782034B2	Constant voltage power supply circuit and method of controlling the same A constant-voltage power supply circuit is disclosed that is able to prevent overshoot of an output voltage possibly occurring when changing a constant-voltage circuit in operation and is able to supply a constant output voltage. The constant-voltage power supply circuit includes a first constant-voltage circuit, having a first output transistor and a first output voltage controller, that generates a first reference voltage and generates a first proportional voltage in proportion to a voltage on an output terminal, and a second constant-voltage circuit having a second output transistor and a second output voltage controller that generates a second reference voltage and generates a second proportional voltage in proportion to the voltage on the output terminal. When the first output voltage controller or the second output voltage controller starts operations according to a control signal input from the outside, a rising edge of the first reference voltage or the second reference voltage is delayed so as to be later than a rising edge of the first proportional voltage or the second proportional voltage.
US07782029B2	Method and system for controlling and monitoring an array of point-of-load regulators A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.
US07782028B2	DC-DC converter and power supply apparatus A DC-DC converter includes: an inductance element and a rectifier element connected in series between a voltage input terminal to accept input direct current voltage and a first output terminal; a switching element connected between a connection node of the inductance element and the rectifier element and a reference potential point; and a controlling circuit to form a signal to control on/off of the switching element. The controlling circuit controls on/off of the switching element to control current through the inductance element, and a voltage applied to the voltage input terminal to accept the input direct current voltage is output via a second output terminal as a reference potential of a circuit at a latter stage, so that an output voltage is controllable from a lower to higher voltage than the input direct current voltage without switching step-up and step-down operations.
US07782027B2	High-efficiency DC/DC voltage converter including down inductive switching pre-regulator and capacitive switching post-converter A DC/DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
US07782026B2	Regulator circuit and corresponding uses Regulator circuit and corresponding uses. The regulator circuit includes at least two input terminals, at least two reactances, at least two output terminals, a plurality of interconnections for connecting said reactances with respect to one another and for connecting at least one of the reactances with the input and output terminals. The interconnections include miniaturized relays that allow exchanging a series connection of the reactances for a parallel connection and vice versa. The circuit can include a voltage monitor, power supply modules, input and output protectors, reference signal modules, and control modules. The regulator circuit has multiple applications including charge pump, power supply, DC/DC converter, DC/AC converter, AC/DC converter, D/A converter, A/D converter, and power amplifier.
US07782024B2	Switching control circuit A switching control circuit comprises: an error amplifying circuit configured to output an error voltage obtained by amplifying an error between a feedback voltage corresponding to an output voltage and a lower voltage selected out of a first reference voltage increasing with time passage and a second reference voltage used as a reference for a target level; a comparison circuit configured to output a comparison signal obtained by comparing the feedback voltage with the error voltage output from the error amplifying circuit; and a drive circuit configured to output first and second control signals for controlling first and second transistors, respectively, in order to turn the output voltage to the target level by complementarily turning on and off the first and second transistors, after the error voltage exceeds the feedback voltage, based on the comparison signal output from the comparison circuit.
US07782021B2	Battery charging based on cost and life One embodiment of the present subject matter includes a system that includes a battery, an electric vehicle, the battery coupled to the electric vehicle to propel the electric vehicle, and a charging circuit to charge the battery. The embodiment includes a charging cost circuit to estimate a charging cost rate and to turn on the charging circuit. The embodiment also includes a timer circuit to provide a time signal to the charging cost circuit. The embodiment is configured such that the charging cost circuit is to turn on the charging circuit during a first time period in which the charging cost rate is below a first threshold until the battery reaches a first energy stored level, and to turn on the charging circuit during a second time period in which the charging cost rate is above the first threshold.
US07782017B2	Apparatus and method for producing signal conveying circuit status information Apparatus is configured for producing an output signal indicating an operating status of a monitored circuit. An input signal relating to the monitored circuit is received at an input node. A pulse train generator, coupled to the input node, is configured for generating a pulse train of a prescribed repetition rate at a duty cycle alternated between first and second duty cycle values at a prescribed frequency. The duty cycle and frequency are indicative of operating status of the monitored circuit.
US07782013B2	Rechargeable battery assembly and method for recharging same A rechargeable battery, battery set or battery pack having a circuit or a plurality of circuits for providing self-discharging thereof electrically connected in parallel are used to form rechargeable battery assemblies and electric power supply systems for use in electric and hybrid vehicles and the like.
US07782011B2	Battery pack charging apparatus and method for constant current and constant voltage charging of multiple battery packs A charging apparatus for charging a plurality of detachable battery packs includes a charging device for charging the plurality of battery packs one after another. A monitoring device is included to monitor attachment of a battery pack. A memory is included to store attachment history data of a battery pack based upon a monitoring result. A switching device is included to switch from one of the battery packs to the next battery pack. A voltage detecting device is included to detect a voltage of the next battery pack before charging. A charging manner setting device is included to set any one of constant current charging and constant voltage charging in accordance with the detected voltage. A charge current detecting device is also included to detect a current during charging of the next battery pack.
US07782008B2	Motor and method for controlling operation of motor A self-magnetizing motor incorporates a control circuit that starts the motor, controls a magnetizing unit, and then operates the motor. The control circuit can include relay, such as a bi-directional conductive power semiconductor device, and one or more PTC (Positive Temperature Coefficient) switches. This control circuit eliminates the need for a separate controller and the implementation costs can be reduced.
US07782006B2	Motor controlling device To provide a motor controlling device that reduces heat generated by an armature and switching elements when an alternating motor is activated. A motor controlling device includes: an H bridge circuit 20 that has FET1 to FET4 that connect and disconnect a high potential end HV and a low potential end GND of a direct-current power supply to and from an armature Lu; and an energization control unit for controlling the amount of energization of the armature Lu by the PWM control that involves changing the ratio, in a predetermined control cycle, between an energization control period, in which the FET1 and the FET2 are turned on and the FET3 and the FET4 are turned off, or the FET3 and the FET4 are turned on and the FET1 and the FET2 are turned off, and a non-energization control period, in which the FET1 and the FET3 are turned on and the FET2 and the FET4 are turned off, or the FET2 and the FET4 are turned on and the FET1 and the FET3 are turned off.
US07782005B2	Power converter control In a power converter including an inverter configured to convert a direct current voltage into an alternating current voltage by controlling switching devices to be turned ON or OFF based on a control signal and to output the alternating current voltage to a load, a carrier wave frequency is changed. A command value is compensated in accordance with the changing carrier wave frequency. The control signal results from a comparison of the carrier wave with a compensated command value. As a result of the compensation, output fluctuations caused by an error voltage between the command value and an output voltage to the load can be suppressed.
US07782002B2	Power converter A switch-type power converter comprising an PET switch operating in a variable duty cycle mode under the control of a Unitrode 3846 integrated circuit controller. Indications of excess input voltage and reverse battery connections are provided by circuits including an element which permanently changes state. A cooling fan mounted on a finned heat sink is operated in a variable speed mode. A single thermistor sensor provides inputs to both the fan speed control and a thermal shutdown circuit connected to shut down the gate drives to the FET switch in the event of a high temperature condition. Another shutdown function is provided in response to an input overvoltage condition by way of an operational amplifier. The converter uses foldback for short circuit protection and is compatible with microprocessor units to selectively provide multiple output voltage levels.
US07781998B2	Fan systems A fan system comprising a first switch, a second switch, a coil, and a drive device. The drive device comprises a third switch and a fourth switch. The third switch, the fourth switch, the first switch, the second switch and the coil form a bridge connection.
US07781996B2	Speed control device for electric motor In a speed control device including a speed instruction generating unit, an addition computing unit, a speed control unit, a current controlling unit, an inertia estimating unit, an inertia setting unit, a switching unit and a constant setting unit, when it is possible to perform accelerating or decelerating operation of the electric motor to estimate the inertia moments of the electric motor and a driving target thereof, an operation is carried out to derive an inertia moment estimation value. The proportional gain of the speed control unit is set through the switching unit and the constant setting unit on the basis of the inertia moment estimation value. When it is impossible to perform the above operation, the proportional gain of the speed control unit is set through the switching unit and the constant setting unit on the basis of the inertia moment manual set value.
US07781995B2	Trash can with power operated lid A trash can can include a sensor for detecting the presence of an object near a lower portion of the trash can. The detection of the object can be used to signal the trash can to open its lid. The trash can can include an electric drive unit for opening and closing the lid.
US07781993B1	Path module for a linear motor, modular linear motor system and method to control the same A path module for a linear motor system includes a controller coupled to one or more amplifiers that are operative to control associated windings in the module. The controller receives control information via a communications link. The controller controls the amplifier based on the received control information so as to selectively energize the associated windings in the module. In one aspect, a plurality of such modules may be connected together to form a path along which one or more stages are moveable according to energization of the windings in the path.
US07781991B2	Heat dissipation system and method A heat dissipation system used in an electronic device includes a plurality of fans positioned in the electronic device, a sensing module, and a processing module. The sensing module is configured for detecting temperature, relative humidity, and air pressure of airflow flowing in the electronic device. The processing module is configured for adjusting a voltage applied to each of the plurality of fans according to the detected temperature, relative humidity, and air pressure of the airflow.
US07781988B2	DC/DC converter A control circuit of a DC/DC converter is provided for supplying a driving voltage to a light emitting element. A hysteresis comparator compares a detection voltage that corresponds to the output voltage of the DC/DC converter with two threshold voltages. If the detection voltage is smaller than the lower threshold voltage, the hysteresis comparator outputs a comparison signal at the low level. Otherwise, the comparison signal is set to the high level. The switching control unit uses the comparison signal as a reference. The switching control unit instructs the switching transistor of the DC/DC converter to perform the switching operation during a period when the comparison signal is at the low level. Otherwise, the switching operation is suspended. The control circuit inhibits light emission of the light emitting element during a period when the comparison signal is at the low level. Otherwise, the control circuit permits the light emission.
US07781983B1	Closed-loop feedback circuit for controlling LEDs A circuit for controlling LEDs is described. The circuit includes a negative feedback closed-loop circuit provided to sense only the voltage on an LED. Any change in the voltage is caused to be corrected by the negative feedback closed-loop circuit in conjunction with a current source.
US07781976B2	High efficiency mercury-free flat light source structure, flat light source apparatus and driving method thereof A flat light source structure includes an upper substrate made of a light transmitting material; a lower substrate separated from the upper substrate by a distance; a barrier rib for maintaining the distance, thereby defining a discharge space filled with a discharge gas; a phosphor coated on at least one of the inner surfaces of the upper substrate and the lower substrate, respectively; a pair of main electrodes disposed at predetermined positions on the surface of the upper or lower substrate and applied with a predetermined driving voltage, frequency and duty ratio to excite the phosphor by plasma generated; an auxiliary electrode formed at a predetermined position on the lower and/or upper substrate(s) to have a parallel component which is parallel with any one of the main electrodes when viewing the discharge space from the upper substrate and a perpendicular component which traverses across the pair of main electrodes.
US07781975B2	Gas discharge tube having cathode cover made of ceramics A gas discharge tube 100 including a sealed container 1 in which a gas is sealed, an anode disposed within the sealed container, a cathode 7 which is spaced from the anode 4 in the sealed container 1 and generates discharge between the cathode 7 and the anode 4, a conductive part 6 restricting a discharge path, the conductive part 6 being disposed between the anode 4 and the cathode 7 and narrowing the discharge path, wherein by providing a cathode cover 8 which is made of ceramics, encloses the cathode 7, and has an opening 8d at least on an electron emission side, the cathode cover 8 increases the heat retaining effect of the cathode 7, makes it easy to keep the temperature of the cathode 7, and reduces power consumption.
US07781974B2	Lamp, light-emitting device, and projector A lamp includes a light emitter enclosing a material emitting light upon receiving irradiation of microwave, and a coil formed on an outer side of the light emitter. In the lamp, a position of the coil with respect to the light emitter is changed in response to a temperature.
US07781972B2	Plasma display panel The present invention relates to a plasma display panel, particularly, to a plasma display panel equipped with an electrode structure which can perform readily a discharge between a scan electrode and a sustain electrode. A plasma display panel according to an aspect of the present invention comprises a front substrate comprising a scan electrode and a sustain electrode; and a rear substrate comprising a barrier rib for forming a discharge cell, wherein the scan electrode and the sustain electrode comprise a plurality of projecting electrode parts in the discharge cell. The present invention modifies the shape of the transparent electrode to broaden the discharge area, so that the luminous efficiency increases to improve a luminance. Moreover, since a stable and uniform discharge is generated, the white balance can be efficiently implemented. In addition, the unnecessary expensive ITO area is removed and the fabrication cost of the plasma display panel can be lowered.
US07781970B2	Plasma display panel A plasma display panel is provided. The plasma display panel includes a front substrate, scan electrodes and sustain electrodes that are positioned on the front substrate substantially parallel to each other, a rear substrate opposite the front substrate, a barrier rib on the rear substrate, and a black layer opposite the barrier rib. The black layer is positioned on the front substrate substantially parallel to the scan electrode and the sustain electrode. The black layer includes a first black layer between two adjacent scan electrodes and a second black layer between two adjacent sustain electrodes. An auxiliary electrode is positioned on the second black layer.
US07781967B2	Organic electroluminescence device having an improved barrier structure, and manufacturing method therefore and electronic apparatus An organic electroluminescence device includes an element substrate including a plurality of light-emitting elements each having an organic luminescent layer held between a pair of electrodes, a sealing substrate opposed to the element substrate, and a peripheral seal layer provided in the peripheral portion between the element substrate and the sealing substrate, for fixing the element substrate and the sealing substrate, wherein an electrode protecting layer covering the light-emitting elements, an organic buffer layer covering the electrode protecting layer, and a gas barrier layer covering the organic buffer layer are formed, the gas barrier layer is formed in a region wider than that of the organic buffer layer, the peripheral seal layer is provided on the gas barrier layer, and the peripheral edge of the organic buffer layer is disposed within the width of the peripheral seal layer
US07781958B2	Light emitting device A light emitting device includes a light emitting element emitting an excitation light and a fluorescent element. The fluorescent element includes a semi-translucent film facing the light emitting element, and transmits the excitation light; a first luminescent film including phosphors to absorb the excitation light transmitted through the semi-translucent film and to emit a visible light having a different wavelength than the excitation light; and a reflection film disposed on an opposite side of the first luminescent film on which the semi-translucent film is disposed, reflecting the excitation light transmitted through the first luminescent film towards the first luminescent film.
US07781956B2	Display apparatus and electronic device A display apparatus includes: a substrate; and a plurality of light emitting elements arrayed on the substrate and each formed from a lower electrode, a light emitting function layer and an upper electrode stacked in this order on the substrate. A rib for element isolation is provided on the substrate and has a plurality of openings individually corresponding to the light emitting elements. Each of the openings of the rib being formed such that at least one of sides which define a shape in plan is formed only from a curved line or extends in a non-parallel relationship to that of another one of the openings.
US07781954B2	Pixel element for field emission display A pixel element for field emission display includes a sealed container having a light permeable portion, an anode, a cathode, a phosphor layer formed on an end surface of the anode, and a CNT string electrically connected to and in contact with the cathode with an emission portion of the CNT string suspending. The phosphor layer is opposite to the light permeable portion, and the emission portion is corresponding to the phosphor layer. Some of CNT bundles in the CNT string are taller than and project over the adjacent CNT bundles, and each of projecting CNT bundles functions as an electron emitter. The anode, the cathode, the phosphor layer and the CNT string are enclosed in the sealed container. The luminance of the pixel element is enhanced at a relatively low voltage.
US07781940B1	Piezoelectric tactile sensor A novel flexible tactile sensor for sensing the force direction was designed by introducing the concept of structural electrodes on a piezoelectric film. The structural electrodes comprised an elastomeric column and distributed microelectrodes between the column and piezoelectric film. As a periodic small force acts at the elastomeric column, the force is transferred to the piezoelectric film based on the column bending behavior therefore the scale of force can be detected by the output voltages from the distributed electrodes due to the corresponding force state under the column. In addition, two opposite output signals from different sides of the column can differentiate the force direction as the column is bent by external force. The resulting signal for sensing force and its direction depends on the size of column.
US07781939B2	Thermal expansion matching for acoustic telemetry system Thermal expansion matching for an acoustic telemetry system. An acoustic telemetry system includes at least one electromagnetically active element and a biasing device which reduces a compressive force in the element in response to increased temperature. A method of utilizing an acoustic telemetry system in an elevated temperature environment includes the steps of: applying a compressive force to at least one electromagnetically active element of the telemetry system; and reducing the compressive force as the temperature of the environment increases.
US07781938B2	Ultrasonic sensor including a piezoelectric element An ultrasonic sensor includes a piezoelectric element and an acoustic matching member that are joined together to form an ultrasonic detector base. The ultrasonic detector base is sectioned by a clearance extending in an ultrasonic propagation direction to form multiple ultrasonic detectors arranged in an array. The clearance does not entirely section the ultrasonic detector base so that the ultrasonic detectors are joined together by a portion of the ultrasonic detector base.
US07781926B2	Electric motor and series of electric motors An electric motor and modular system of electric motors includes at least a stator, rotor, and a housing, the modular system including several variants of electric motors, e.g., within one size, the housing having a mechanical interface that is arranged for connection to a bearing support, the bearing support including at least a bearing seat for the B-side bearing of the rotor shaft, at least two different bearing supports being alternatively connectable to the housing, a first bearing support including an additional interface for connection to a bottom part of a terminal box, or alternatively to a bottom part for power electronics, and the first bearing support forming a housing for a brake and/or a fan, a second bearing support being constructed in one piece with a bottom part of a terminal box.
US07781925B2	Electrical machine with electronic power unit for conversion A matrix converter for the conversion of a polyphase alternating current into a desired alternating output current in which m phases of the polyphase alternating current are converted into alternating output current with n (n
US07781922B2	Facility and method for the automatic recognition and differentiation of single-channel or dual-channel electronic sensors connected to a dual-channel safety combination A facility is described for the automatic recognition and differentiation of single-channel or dual-channel electronic sensors, which are connected to a dual-channel safety combination with two connecting line pairs for emergency stop facilities in the form of electronic sensors or emergency stop buttons, with a first connecting conductor pair being provided for single-channel operation and the first and a second connecting line pair being provided for dual-channel operation of the safety combination, said facility comprising an ohmic resistance arranged in at least a first connecting line of the second connecting line pair and a transistor connected by its emitter or collector to a first side of the ohmic resistance and by its base to a second side of the ohmic resistance in such a manner that during a current flow through a dual-channel electronic sensor connected to both connecting conductor pairs a voltage drop at the ohmic resistance switches the transistor, so that an output signal is generated at the collector or emitter of the transistor, indicating connection of the dual-channel electronic sensor. A method is also described for the automatic recognition and differentiation at least of single-channel or dual-channel electronic sensors connected to a dual-channel safety combination.
US07781917B2	AC voltage conditioner An AC voltage conditioner to be connected between a source of AC line voltage or non-linear voltage and one or more AC-powered devices (e.g., audio/video, medical and scientific equipment) to improve the performance of the devices by reducing the effects of interference and distortion often caused by an AC electromagnetic field or radio frequency interference in the vicinity of the devices. A pair of AC current conducting plates are respectively electrically connected between positive and negative output terminals of the AC line voltage source and positive and negative input terminals of each AC-powered device. The pair of AC current conducting plates are interposed between and separated from three DC current carrying plates. The DC current carrying plates are connected in electrical parallel with one another between positive and negative output terminals of a DC voltage generator. DC currents flowing through the DC current carrying plates from the DC voltage generator cause respective DC electromagnetic fields to surround the AC current carrying plates. Therefore, the AC currents flowing through the AC current carrying plates of the AC voltage conditioner will pass through the DC electromagnetic fields ahead of each AC-powered device.
US07781913B2	UPS having solar powered battery charger A UPS includes a first transfer switch, a first battery charger, a second transfer switch, a solar energy absorption board, and a second battery charger. The first transfer switch connects a power source to an electrical device. The first battery charger connects the power source to a storage battery for charging the storage battery. An output of the storage battery is connected to the first transfer switch via an inverter. The first transfer switch controls the storage battery to supply power to the electrical device. The second transfer switch is connected between the first battery charger and the storage battery. The second battery charger connects the solar energy absorption board to the second transfer switch. The second transfer switch controls the power source to charge the storage battery via the first battery charger or the solar energy absorption board to charge the storage battery via the second battery charger.
US07781910B2	Building automation system A building automation system is provided in which a controller is connected to remote modules through a zone enclosure using RS-485 cables. Branches of modules extending from the zone enclosure are connected together by removable jumpers at the zone enclosure. Sets of branches of modules using different protocols are isolated from each other. Shorts in the RS-485 cables can be determined by disconnecting and reconnecting the branches from the network. The zone enclosure has a patch panel that contains modular RS-485 connectors. An RS-485 cable from the controller and pulled through the building along with other data cables is connected to the RS-485 connectors at the back of the patch panel. The modules are connected to the RS-485 connectors at the front of the patch panel through RS-485 cables.
US07781907B2	Image forming apparatus, image reading apparatus and complex machine An image forming apparatus, includes: a first rectifying circuit that is connected with an external commercial power supply and rectifies an alternating-current input; a first low-voltage power supply circuit that generates low voltages from a rectified power for power supply to respective parts of the apparatus; a first connector that is connected with the first rectifying circuit and is for outputting a power rectified by the first rectifying circuit; and a second connector that is connected with the first low-voltage power supply circuit and is for taking in a rectified power, wherein the apparatus is singly usable and optionally usable by being connected with an image reading apparatus, and the apparatus forms an electrostatic latent image, forms a toner image by developing the electrostatic latent image with toner, and fixes the toner image onto a transfer sheet.
US07781906B2	Burglarproof device of vehicle A drive of a steering-lock actuator is controlled such that a lock member takes a steering lock state from a steering unlock state if there occurs a change in the state of a vehicle door detected by a door-state detecting device and a stop state of the vehicle is detected by a vehicle-stop-state detecting device when an ignition switch is in an OFF state (step S7). A power supply to the vehicle-stop-state detecting device is made stop if the ignition switch is turned to the OFF state from an ON state (step S2), and the power supply to the vehicle-stop-state detecting device resumes if there occurs the change in the state of the vehicle door detected by the door-state detecting device when the ignition switch is in the OFF state (step S4).
US07781900B2	Semiconductor device comprising a housing and a semiconductor chip partly embedded in a plastic housing composition, and method for producing the same One aspect of the invention relates to a semiconductor device including a housing and a semiconductor chip partly embedded in a plastic housing composition. Another aspect relates to a method for producing the same. The plastic housing composition has at least one host component having a softening temperature and an incorporated component having a phase change temperature. In this case, the softening temperature of the host component is greater than the phase change temperature of the incorporated component.
US07781898B2	IC package reducing wiring layers on substrate and its chip carrier An IC package primarily comprises a substrate, a die-attaching layer, a chip, at least a bonding wire, and a plurality of electrical connecting components. The substrate has a top surface and a bottom surface where the top surface includes a die-attaching area for disposing the die-attaching layer. The chip is attached to the die-attaching area by the die-attaching layer and is electrically connected to the substrate by the electrical connecting components. Both ends of the bonding wire are bonded to two interconnecting fingers on the top surface of the substrate where at least a portion of the bonding wire is encapsulated in the die-attaching layer to replace some wirings or vias inside a conventional substrate. Therefore, the substrate has simple and reduced wiring layers, i.e., to reduce the substrate cost. A chip carrier of the corresponding IC package is also revealed.
US07781897B2	Semiconductor device and method for producing the same A semiconductor device has a circuit carrier with a number of internal contact areas is disclosed, which includes a first material with a first electrochemical potential, and a semiconductor chip with an active surface and a number of chip contact areas, which include a second material with a second electrochemical potential. Bonding wire connections are arranged between the chip contact areas and the internal contact areas of the leadframe and comprise a third material with a third electrochemical potential. The connecting points between the chip contact areas and the bonding wires and/or the connecting points between the internal contact areas and the bonding wires are coated with an anticorrosive layer.
US07781890B2	Structure and method for parallel testing of dies on a semiconductor wafer In accordance with an embodiment of the present invention, a semiconductor wafer has a plurality of dies each having a circuit and a plurality of contact pads. The plurality of contact pads include a first contact pad to receive a power supply voltage, a second contact pad to receive a ground voltage, and a third contact pad to receive a test control signal. The third contact pad is connected to a programmable self-test engine (PSTE) embedded on the corresponding die so that the test control signal activates the PSTE to initiate a self-test. A probe card has a plurality of sets of probe pins, each set of probe pins having three probe pins for contacting the first, second, and third contact pads of one of a corresponding number of the plurality of dies. During wafer test, the plurality of sets of probe pins come in contact with a corresponding number of dies so that the self-test is carried out simultaneously in the corresponding number of dies.
US07781889B2	Shielded via A system may include a first conductive ground pad, a second conductive ground pad, a first conductive via coupling the first ground pad to the second ground pad, a first conductive signal trace, a second conductive signal trace, and a second conductive via disposed within the first conductive via and coupling the first conductive signal trace to the second conductive signal trace. The first conductive ground pad and the second conductive ground pad may be disposed between the first conductive signal trace and the second conductive signal trace.
US07781882B2	Low voltage drop and high thermal performance ball grid array package An integrated circuit (IC) package is provided. The IC package includes a substantially planar substrate having a plurality of contact pads on a first surface electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate, an IC die having a first surface mounted to the first surface of the substrate, and a heat sink assembly coupled to a second surface of the IC die and to a first contact pad on the first surface of the substrate to provide a thermal path from the IC die to the first surface of the substrate. The IC die has a plurality of I/O pads electrically connected to the plurality of contact pads on the first surface of the substrate. The IC die is mounted to the first surface of the substrate in a flip chip orientation.
US07781881B2	Thermal barrier coating material, thermal barrier member, and member coated with thermal barrier and method for manufacturing the same Provided are a thermal barrier coating material and a member coated with thermal barrier that can suppress the separation when used at a high temperature, and have a high thermal barrier effect; a method for manufacturing the member coated with thermal barrier; a turbine member coated with the thermal barrier coating material; and a gas turbine. More specifically provided are a shield coating member comprising a heat-resistant substrate, a bond coat layer formed on the heat-resistant substrate, and a ceramic layer formed on the bond coat layer, wherein the ceramic layer comprises a ceramic represented by a general formula A2Zr2O7, wherein A denotes a rare earth element, and the ceramic layer has (a) a porosity of 1 to 30%, (b) cracks in a thickness direction in pitches of 5 to 100% the total thickness of layers other than the bond coat layer on the heat-resistant substrate, or (c) columnar crystals.
US07781878B2	Zigzag-stacked package structure A die-stacked package structure, wherein a plurality of dies are stacked on the substrate with a rotation so that a plurality of metallic ends and the metal pad on each die on the substrate can all be exposed; a plurality of metal wires are provided for electrically connecting the plurality of metal pads on the plurality of dies with the plurality metallic ends on the substrate in one wire bonding process; then an encapsulate is provided for covering the plurality of stacked dies, a plurality of metal wires and the plurality of metallic ends on the substrate.
US07781871B2	Structure for reduction of soft error rates in integrated circuits A structure for reduction of soft error rates in integrated circuits. The structure including: a semiconductor substrate; and a stack of one or more wiring levels stacked from a lowermost wiring level to an uppermost wiring level, the lowermost wiring level nearer the semiconductor substrate than the uppermost wiring level; and an alpha particle blocking layer on a top surface of the uppermost wiring level of the one or more wiring levels, the blocking layer comprising metal wires and a dielectric material, the blocking layer having a combination of a thickness of the blocking layer and a volume percent of metal wires in the blocking layer sufficient to stop a predetermined percentage of alpha particles of a selected energy or less striking the blocking layer from penetrating into the stack of one or more wiring levels or the substrate.
US07781870B2	Wire bond and redistribution layer process A semiconductor device comprises a copper redistribution line, a copper inductor and aluminum wire bond pads and the integration of the resulting device with an integrated circuit on a single chip, resulting in the decreased size of the chip.
US07781860B2	Semiconductor constructions, and electronic systems The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can include exposure of a semiconductor material to steam and H2, with the H2 being present to a concentration of from about 2% to about 40%, by volume. An oxide structure formed under the bottom corner of a transistor gate stack can have a bottom surface with a topography that includes a step of at least about 50 Å, and an upper surface directly over the bottom surface and having a topography that is substantially planar. Methodology of the present invention can be utilized to form semiconductor constructions suitable for incorporation into highly integrated circuitry. The highly integrated circuitry can be incorporated into electronic systems, and can, for example, be utilized in processors and/or memory storage devices.
US07781856B2	Silicon-based visible and near-infrared optoelectric devices In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.
US07781854B2	Image sensor chip package structure and method thereof An image sensor chip package structure includes a transparent substrate, a chip, a sealing ring, a number of conductive posts, and a number of conductive bumps. The transparent substrate has a number of through holes. The through holes pass through the transparent substrate. The chip has an active surface, an image sensitive area, and a number of die pads. The image sensitive area and the die pads are located on the active surface. The sealing ring is disposed between the chip and the transparent substrate and surrounds the image sensitive area and the die pads. The conductive posts are disposed in the through holes, respectively. Here, the chip is electrically connected with the conductive posts via the die pads. The conductive bumps are disposed on the die pads, respectively. The conductive bumps are connected with the conductive posts, respectively.
US07781853B2	Plasmon-enhanced electromagnetic-radiation-emitting devices and methods for fabricating the same Various embodiments of the present invention are directed to surface-plasmon-enhanced electromagnetic-radiation-emitting devices and to methods of fabricating these devices. In one embodiment of the present invention, an electromagnetic-radiation-emitting device comprises a multilayer core, a metallic device layer, and a substrate. The multilayer core has an inner layer and an outer layer, wherein the outer layer is configured to surround at least a portion of the inner layer. The metallic device layer is configured to surround at least a portion of the outer layer. The substrate has a bottom conducting layer in electrical communication with the inner layer and a top conducting layer in electrical communication with the metallic device layer such that the exposed portion emits surface-plasmon-enhanced electromagnetic radiation when an appropriate voltage is applied between the bottom conducting layer and the top conducting layer.
US07781848B2	Semiconductor device with extension structure and method for fabricating the same A semiconductor device includes a semiconductor region, a source region, a drain region, a source extension region a drain extension region, a first gate insulation film, a second gate insulation film, and a gate electrode. The source region, drain region, source extension region and drain extension region are formed in a surface portion of the semiconductor region. The first gate insulation film is formed on the semiconductor region between the source extension region and the drain extension region. The first gate insulation film is formed of a silicon oxide film or a silicon oxynitride film having a nitrogen concentration of 15 atomic % or less. The second gate insulation film is formed on the first gate insulation film and contains nitrogen at a concentration of between 20 atomic % and 57 atomic %. The gate electrode is formed on the second gate insulation film.
US07781844B2	Semiconductor device having a stressor film A first NMIS transistor includes: a first gate dielectric film over the first active region; a first gate electrode on the first gate dielectric film; a first side-wall dielectric film on side surfaces of the first gate dielectric film and the first gate electrode; a first source/drain region in the first active region outside the first side-wall dielectric film; a first silicide layer in a top-layer portion of the first source/drain region; a second side-wall dielectric film on the first silicide layer around a corner at which the side surface of the first side-wall dielectric film meets an upper surface of the first silicide layer; and a first stressor film for exerting a tensile stress on a channel region in a gate length direction, the first stressor film covering the first gate electrode, the first side-wall dielectric film, and the second side-wall dielectric film.
US07781841B2	System and method to reduce noise in a substrate Certain embodiments of the invention may be found in, for example, a system that reduces noise in a substrate of a chip and may comprise a substrate layer that is integrated within the chip. A transistor layer is integrated within the chip and is shielded from the substrate layer by a shielding layer. At least one transistor of a first transistor type couples the transistor layer to the shielding layer and a quiet voltage source may be coupled to the transistor of the first transistor type. At least one transistor of a second transistor type is coupled to the shielding layer. The transistor of the second transistor type may be a n-type transistor, which may be disposed within the transistor layer and the transistor of the second transistor type may be resistively coupled to the shielding layer.
US07781834B2	Robust ESD LDMOS device A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first width in a direction parallel to the gate width direction; and a bulk pick-up region in the semiconductor substrate and abutting the source/drain region. The bulk pick-up region and the source/drain region have opposite conductivity types. The bulk pick-up region has a second width in the width direction, and wherein the second width is substantially less than the first width.
US07781829B2	Semiconductor device having recessed channel and method for manufacturing the same A semiconductor device having a recessed channel and a method for manufacturing the same. The semiconductor device comprises a semiconductor substrate formed with an isolation layer defining an active region including a channel region and a junction region, a recessed trench including a top trench formed within the channel region of the semiconductor substrate and a bottom trench formed from a bottom surface of the top trench with a width narrower than the top trench, and a gate stack overlapping the recessed trench and extending across the active region.
US07781827B2	Semiconductor device with a vertical MOSFET including a superlattice and related methods A semiconductor device may include at least one vertical Metal Oxide Semiconductor Field Effect Transistor (MOSFET) on a substrate. The vertical MOSFET may include at least one superlattice including a plurality of laterally stacked groups of layers transverse to the substrate. The vertical MOSFET(s) may further include a gate laterally adjacent the superlattice, and regions vertically above and below the superlattice and cooperating with the gate for causing transport of charge carriers through the superlattice in the vertical direction. Each group of layers of the superlattice may include stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
US07781825B2	Semiconductor device and method for manufacturing the same A semiconductor device includes an insulating layer, a channel structure, an insulating structure and a gate. The channel structure includes a channel bridge for connecting two platforms. The bottom of the channel bridge is separated from the insulating layer by a distance, and the channel bridge has a plurality of separated doping regions. The insulating structure wraps around the channel bridge, and the gate wraps around the insulating structure.
US07781823B2	Nonvolatile semiconductor memory A nonvolatile semiconductor memory according to the present invention includes memory cell units, which include data select lines formed in parallel to each other, data transfer lines crossing the data select lines and aligned in parallel to each other, and electrically rewritable memory cell transistors disposed at intersections of the data transfer lines and the data select lines. It further includes: a memory cell array block in which the memory cell units are disposed along the data select lines; first source lines, connected to one end of the memory cell units, and aligned along the data select lines; and second source lines electrically connected to the first source lines, and disposed along the data select lines.
US07781822B2	Nonvolatile semiconductor memory A nonvolatile semiconductor memory includes: a memory cell transistor including a gate insulating film, a floating gate electrode, an inter-gate insulating film, and a control gate electrode; a low voltage transistor constituted by a low voltage gate insulating film, a floating gate electrode, an inter-gate insulating film having an opening, a control gate electrode, a first gate contact plug, and a first metallic salicide film electrically in contact with the first gate contact plug; and a high voltage transistor constituted by a high voltage gate insulating film, a floating gate electrode, an inter-gate insulating film having an opening, a control gate electrode, a second gate contact plug, and a second metallic salicide film electrically in contact with the second gate contact plug. The metallic salicide film is formed only directly beneath the gate contact plug.
US07781821B2	Parallel varactor capacitor with varying capacitance Provided is a parallel-varactor capacitor. The capacitor comprises a first varactor and a second varactor. The first varactor has a first capacitance which varies depending on voltages applied to a first anode and a first cathode. The second varactor has a second capacitance which varies depending on voltages applied to a second anode and a second cathode. The first anode is connected to the second cathode and the first cathode is connected to the second anode.
US07781817B2	Structures, fabrication methods, and design structures for multiple bit flash memory cells A semiconductor structure, a fabrication method, and a design structure of the same. The semiconductor structure includes (i) a semiconductor substrate which includes a top substrate surface perpendicular to the top substrate surface, (ii) a control gate electrode region and a first semiconductor body region on the semiconductor substrate, and (iii) a second semiconductor body region on the first semiconductor body region. The semiconductor structure further includes (i) a first gate dielectric region sandwiched between the first semiconductor body region and the control gate electrode region and (ii) a second gate dielectric region sandwiched between the second semiconductor body region and the control gate electrode region. The second semiconductor body region overlaps the first semiconductor body region in the reference direction. A first thickness of the first gate dielectric region is different from a second thickness of the second gate dielectric region.
US07781816B2	Nonvolatile magnetic memory device and photomask A nonvolatile magnetic memory device including a magnetoresistance device having a recording layer formed of a ferromagnetic material for storing information by use of variation in resistance depending on the magnetization inversion state. The plan-view shape of the recording layer includes a pseudo-rhombic shape having four sides, at least two of the four sides each include a smooth curve having a central portion curved toward the center of the pseudo-rhombic shape. The easy axis of magnetization of the recording layer is substantially parallel to the longer axis of the pseudo-rhombic shape. The hard axis of magnetization of the recording layer is substantially parallel to the shorter axis of the pseudo-rhombic shape. The sides constituting the plan-view shape of the recording layer are smoothly connected to each other.
US07781812B2	Semiconductor device for non-volatile memory and method of manufacturing the same After forming an interlayer insulating film (14) covering a ferroelectric capacitor, a hydrogen diffusion preventing film (18), an etching stopper (19) and an interlayer insulating film (20) are formed. Then, a wiring having a tantalum nitride (TaN) film (21) (barrier metal film) and a copper (Cu) film (22) is formed in the interlayer insulating film (20) by a single damascene method. Thereafter, a wiring having a copper film (29) and a wiring having a copper film (36) and the like are formed by a dual damascene method.
US07781802B2	Semiconductor device and manufacturing method thereof As semiconductor regions in contact with a first main surface of a semiconductor base composed by forming an N− silicon carbide epitaxial layer on an N+ silicon carbide substrate connected to a cathode electrode, there are provided both of an N+ polycrystalline silicon layer of a same conduction type as a conduction type of the semiconductor base and a P+ polycrystalline silicon layer of a conduction type different from the conduction type of the semiconductor base. Both of the N+ polycrystalline silicon layer and the P+ polycrystalline silicon layer are hetero-joined to the semiconductor base, and are ohmically connected to the anode electrode. Moreover, the N+ polycrystalline silicon layer of the same conduction type as the conduction type of the semiconductor base is formed so as to contact the first main surface of the semiconductor base, and the P+ polycrystalline silicon layer of the conduction type different from the conduction type of the semiconductor base is formed in trenches dug on the first main surface of the semiconductor base.
US07781801B2	Field-effect transistors whose gate electrodes are over semiconductor heterostructures and parts of source and drain electrodes An apparatus includes a field-effect transistor (FET). The FET includes a region of first semiconductor and a layer of second semiconductor that is located on the region of the first semiconductor. The layer and region form a semiconductor heterostructure. The FET also includes source and drain electrodes that are located on one of the region and the layer and a gate electrode located to control a conductivity of a channel portion of the semiconductor heterostructure. The channel portion is located between the source and drain electrodes. The gate electrode is located vertically over the channel portion and portions of the source and drain electrodes.
US07781800B2	Embedded silicon germanium using a double buried oxide silicon-on-insulator wafer Disclosed is a p-type field effect transistor (pFET) structure and method of forming the pFET. The pFET comprises embedded silicon germanium in the source/drain regions to increase longitudinal stress on the p-channel and, thereby, enhance transistor performance. Increased stress is achieved by increasing the depth of the source/drain regions and, thereby, the volume of the embedded silicon germanium. The greater depth (e.g., up to 100 nm) of the stressed silicon germanium source/drain regions is achieved by using a double BOX SOI wafer. Trenches are etched through a first silicon layer and first buried oxide layer and then the stressed silicon germanium is epitaxially grown from a second silicon layer. A second buried oxide layer isolates the pFET.
US07781798B2	Solid-state image pickup device and fabrication method therefor Disclosed herein is a solid-state image pickup device, including, a light receiving pixel section, a black level reference pixel section, a multi-layer wiring line section, a first light blocking film, a second light blocking film, a third light blocking film, and a fourth light blocking layer.
US07781796B2	Nitride semiconductor laser element A nitride semiconductor laser element includes a substrate and a nitride semiconductor layer in which a first semiconductor layer, an active layer, and a second semiconductor layer are laminated in this order on the substrate. At least one of the first semiconductor layer and the second semiconductor layer includes a first section forming recessed and raised portions and a second section embedding the recessed and raised portions of the first section. A region with a higher aluminum mixed crystal ratio than the second section that embeds the recessed and raised portions is disposed on top faces of the raised portions. The nitride semiconductor layer defines resonant planes, and the recessed and raised portions are formed in a shape of stripes that extend substantially parallel to the resonant planes.
US07781795B2	Group III nitride semiconductor device and light-emitting device using the same An object of the present invention is to provide a Group III nitride semiconductor device exhibiting improved crystallinity and a good performance. The inventive Group III nitride semiconductor device comprises a substrate, and a plurality of Group III nitride semiconductor layers provided on the substrate, wherein a first layer which is in contact with the substrate is composed of silicon-doped AlxGa1-xN (0≦x≦1). Also, the inventive Group III nitride semiconductor device comprises a substrate, and a plurality of Group III nitride semiconductor layers provided on the substrate, wherein a first layer which is in contact with the substrate is composed of AlxGa1-xN (0≦x≦1), and the difference in height between a protrusion and a depression which are present at the interface between the first layer and a second layer provided thereon is 10 nm or more and is equal to, or less than, 99% the thickness of the first layer.
US07781791B2	Semiconductor light emitting element In a semiconductor light emitting element, a p-type layer (220), an active layer (230) and an n-type layer (240) are laminated on a substrate in this order. The n-type layer (240) is formed with a rectangular n-side electrode (241) whose width in one direction is equal to that of the n-type layer (240). The thickness t of the n-type layer (240) satisfies Formula 1 below. The semiconductor light emitting element includes a side surface (270) extending in the lamination direction and formed with a plurality of projections (271). Supposing that the wavelength of the light from the active-layer (230) is λ and the index of refraction of the n-type layer (240) or the p-type layer (220) is n, the average WA of widths at bottoms of the projections is set to satisfy WA≧λ/n. t ≥ ρ ⁢ ⁢ J 0 ⁢ e 4 ⁢ γκ B ⁢ T · W ⁡ ( L - W ) Formula ⁢ ⁢ 1 where L is width of the n-type layer in a direction different from the one direction, T is absolute temperature, W is width of the n-side electrode in a direction different from the one direction, J0 is current density at the contact portion between the n-side electrode and the n-type layer, e is elementary charge, γ is diode ideality factor, κB is Boltzmann constant, ρ is specific resistance of the n-type semiconductor layer.
US07781788B2	Light emitting device package having a transparent cover A light emitting device package including a transparent cover having an electrode pattern formed on a bottom surface thereof; a light emitting device installed below the transparent cover and electrically connected to an external circuit via the electrode pattern; a fixing resin which fixes the light emitting device onto the bottom surface of the transparent cover; and a metal slug provided under the fixing resin to dissipate heat away from the light emitting device.
US07781784B2	Display apparatus with color pixels A display apparatus includes pixel electrodes disposed on a first base substrate, a second base substrate which faces the first base substrate, color pixels disposed on the second base substrate, the color pixels correspond to the pixel electrodes in a one-to-one correspondence, each color pixel partially covers the corresponding pixel electrode, a common electrode disposed on the second base substrate to cover the pixel electrodes and an electrophoretic layer including a plurality of electrophoretic particles, the electrophoretic layer being interposed between the pixel electrodes and the common electrode.
US07781781B2	CMOS imager array with recessed dielectric A CMOS image sensor array and method of fabrication. The CMOS imager sensor array comprises a substrate; an array of light receiving pixel structures formed above the substrate, the array having formed therein “m” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer; a dense logic wiring region formed adjacent to the array of light receiving pixel structures having “n” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>m. A microlens array having microlenses and color filters formed above the interlevel dielectric material layer, a microlens and respective color filter in alignment with a respective light receiving structure formed at a surface of the substrate. A top surface of the interlevel dielectric material layer beneath the microlens array is recessed from a top surface of the interlevel dielectric material layers of the dense logic wiring region.
US07781780B2	Light emitting diodes with smooth surface for reflective electrode A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.
US07781771B2	Bulk non-planar transistor having strained enhanced mobility and methods of fabrication A method of a bulk tri-gate transistor having stained enhanced mobility and its method of fabrication. The present invention is a nonplanar transistor having a strained enhanced mobility and its method of fabrication. The transistor has a semiconductor body formed on a semiconductor substrate wherein the semiconductor body has a top surface on laterally opposite sidewalls. A semiconductor capping layer is formed on the top surface and on the sidewalls of the semiconductor body. A gate dielectric layer is formed on the semiconductor capping layer on the top surface of a semiconductor body and is formed on the capping layer on the sidewalls of the semiconductor body. A gate electrode having a pair of laterally opposite sidewalls is formed on and around the gate dielectric layer. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
US07781770B2	Semiconductor device and method of fabricating the same An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.
US07781769B2	Transistor array panel, liquid crystal display panel, and method of manufacturing liquid crystal display panel A transistor array panel includes switching elements provided in intersecting portions between gate and data lines, and display electrodes connected to the switching elements. A conductive film pattern is provided to be electrically insulated from the gate and data lines, and display electrodes, and to be overlapped on the display electrodes, thereby forming a storage capacitance between each of the display electrodes and the conductive film pattern. A protection circuit is electrically connected to the gate and data lines, and disposed in an outer peripheral portion of a display region in which the switching elements and the display electrodes are formed on the one side of the substrate. A common line is insulated from the protection circuit, connected to the conductive film pattern, and provided to be insulated from the protection circuit and to be at least partially overlapped on the protection circuit, in the outer peripheral portion of the display region.
US07781768B2	Display device, method for manufacturing the same, and electronic device having the same In a case where a p-channel thin film transistor is used as a thin film transistor that is electrically connected to a light-emitting element and drives the light-emitting element, a value of cutoff current of the p-channel thin film transistor is made lower than that of a p-channel thin film transistor of a driver circuit. Specifically, channel doping is selectively performed on a semiconductor layer of a thin film transistor included in a pixel.
US07781767B2	Thin film transistor substrate and display device Disclosed are a thin film transistor substrate where barrier metal can be omitted to be formed between a semiconductor layer of a thin film transistor and source and drain electrodes (barrier metal need not be formed between the semiconductor layer of the thin film transistor and the source and drain electrodes), and a display device. (1) A thin film transistor substrate has a semiconductor layer of a thin film transistor, a source electrode, a drain electrode, and a transparent conductive film, wherein the substrate has a structure in which the source and drain electrodes are directly connected to the semiconductor layer of the thin film transistor, and the source and drain electrodes include an Al alloy thin film containing Ni of 0.1 to 6.0 atomic percent, La of 0.1 to 1.0 atomic percent, and Si of 0.1 to 1.5 atomic percent. (2) A display device has the thin film transistor substrate.
US07781764B2	Nanometric device for the measurement of the conductivity and quantum effects of individual molecules and methods for the manufacture and use thereof A nanometric device is disclosed for the measurement of the electrical conductivity of individual molecules and their quantum effects having: a substrate surmounted by, in order, a barrier to diffusion layer, an electrically conductive layer, a “bounder” layer and an electrically insulating layer; and a suitable miniaturized probe; wherein the “bounder” layer and the electrically insulating layer have at least one nanometric pore formed within, the base of which consists of the electrically conductive layer. A method for the production of a nanometric device for the measurement of the electrical conductivity of individual molecules and their quantum effects, and a method for the measurement of the electrical conductivity and quantum effects of a molecule of interest, are also disclosed.
US07781761B2	Substituted anthracenes and electronic devices containing the substituted anthracenes Substituted anthracene compounds and electronic devices containing the substituted anthracene compounds are provided.
US07781760B2	Thin film transistor, electro-optical device, and electronic apparatus A thin film transistor includes a source electrode and a drain electrode which are disposed to face each other, an organic semiconductor layer provided at least between the source electrode and the drain electrode, a plurality of gate lines extending over the source electrode, the organic semiconductor layer, and the drain electrode, and a gate insulating layer interposed between the source electrode, the drain electrode, and the organic semiconductor layer and the plurality of gate lines.
US07781759B2	Display device and method for manufacturing the same A display device includes an insulating substrate; a plurality of gate wires formed on the insulating substrate, the plurality of gate wires including a gate electrode; a gate insulating layer covering the plurality of gate wires; a transparent electrode layer formed on the gate insulating layer, the transparent electrode layer including a source electrode and a drain electrode disposed about the gate electrode and spaced apart from each other to define a channel region disposed therebetween; a plurality of data wires covering a predetermined portion of the transparent electrode layer and being crossed insulatedly with the plurality of gate wires to define pixels; and an organic semiconductor layer formed on the channel region for each pixel, a predetermined portion of the organic semiconductor layer being operatively connected with the source electrode, the drain electrode, and the gate electrode to form a transistor having an improved characteristic and a novel structure.
US07781758B2	Semiconductor device It is an object of the present invention to provide a semiconductor device in which data can be written except when manufacturing the semiconductor device and that counterfeits can be prevented. Moreover, it is another object of the invention to provide an inexpensive semiconductor device including a memory having a simple structure. The semiconductor device includes a field effect transistor formed over a single crystal semiconductor substrate, a first conductive layer formed over the field effect transistor, an organic compound layer formed over the first conductive layer, and a second conductive layer formed over the organic compound layer, and a memory element includes the first conductive layer, the organic compound, and the second conductive layer. According to the above structure, a semiconductor device which can conduct non-contact transmission/reception of data can be provided by possessing an antenna.
US07781757B2	Organic semiconductor material, organic semiconductor element and field effect transistor using the same An organic semiconductor material comprising an amine unit having a secondary or tertiary amine structure and a thiophene unit having a thiophene ring structure and preferably the amine unit has the following structure: wherein R1, R2, and R3 independently represent hydrogen, an optionally substituted alkyl group, an optionally substituted alkoxy group, an optionally substituted ether group, or an optionally substituted aryl group and may be same or different from each other.
US07781754B2	Fermionic bell-state analyzer and quantum computer using same The Bell-state analyzer includes a semiconductor device having quantum dots formed therein and adapted to support Fermions in a spin-up and/or spin-down states. Different Zeeman splittings in one or more of the quantum dots allows resonant quantum tunneling only for antiparallel spin states. This converts spin parity into charge information via a projective measurement. The measurement of spin parity allows for the determination of part of the states of the Fermions, which provides the states of the qubits, while keeping the undetermined part of the state coherent. The ability to know the parity of qubit states allows for logic operations to be performed on the qubits, i.e., allows for the formation of (two-qubit) quantum gates, which like classical logic gates, are the building blocks of a quantum computer. Quantum computers that perform a parity gate and a CNOT gate using the Bell-state analyzer of the invention are disclosed.
US07781749B2	Beam irradiation apparatus with deep ultraviolet light emission device for lithographic pattern inspection system An illumination beam irradiation apparatus for use in pattern inspection systems is disclosed, which is less in deterioration of optical components and in attenuation of illumination light. The illumination apparatus includes a light source which yields a fundamental wave, a beam-shaper unit which performs beam-shaping of the fundamental wave so that this wave has a prespecified shape, and a pattern generator unit which operates, upon receipt of the beam-shaped fundamental wave, to convert this incoming wave into illumination light with a shorter wavelength to thereby generate illumination light of a prespecified shape. The illuminator also includes an image relay unit for guiding the illumination light that was generated by the pattern generator to fall onto a workpiece under inspection, such as a photomask or else.
US07781743B2	Charged particle beam system and method for evacuation of the system The present invention provides a charged particle beam system which can perform evacuation on an electron gun chamber or an ion-gun chamber having a non-evaporable getter pump in a short time and can maintain the ultra-high vacuum for a long time, and a technology of evacuation therefor. Provided is a charged particle beam system equipped with a charged particle optics which makes the charged particle beam emitted from a charged particle source incident on a sample and means of evacuation for evacuating the charged particle optics, characterized in that the evaporation means has: a vacuum vessel with a charged particle source disposed in the vessel; a non-evaporable getter pump which connects with the vacuum vessel through a vacuum pipe and evacuates the interior of the vacuum vessel as a subsidiary vacuum pump; a valve interposed in the vacuum pipe connecting between the vacuum vessel and the non-evaporable getter pump; a rough pumping port which is provided closer to the non-evaporable getter pump than the valve and performs rough pumping; an open and shut valve for opening and shutting the rough pumping port; and a main vacuum pump which is provided closer to the vacuum vessel than the valve and evacuates the interior of the vacuum vessel.
US07781742B2	Corrector The invention concerns a corrector (10) for chromatic and aperture aberration correction in a scanning electron microscope or a scanning transmission electron microscope, comprising four multipole elements (1, 2, 3, 4) which are consecutively disposed in the optical path (9), the first (1) and fourth (4) of which are used to generate quadrupole fields (5, 6) and the second (2) and third (3) of which are used to generate octupole fields (11, 12) and quadrupole fields (7, 7′, 8, 8′), wherein the latter are superposed magnetic (7, 8) and electric (7′, 8′) fields, and wherein the quadrupole fields (5, 6, 7, 8) of all four multipole elements (1, 2, 3, 4) are successively rotated with respect to one another through 90°. Elimination of errors up to fifth order can be realized with a corrector (10) of this type in that the second (2) and the third (3) multipole elements are designed as twelve-pole elements, and an additional twelve-pole element (13) is inserted between the second (2) and the third (3) multipole element, and is loaded with current and/or voltage, such that an octupole field (14) is generated that is superposed by a twelve-pole field (15).
US07781739B1	Quantum-imaging system and mode of operation and method of fabrication thereof A quantum-imaging system for detecting photons, including short-wavelength (<1 nm) photons, is provided. A quantum imaging system can include optical read-out and optical means, and can be configured to perform as both a photon counter and a photon spectrometer. A quantum-imaging system can function as a photon counter and be configured to measure photon beam fluences (e.g., in J/cm2) for both strong beams and weak beams, the latter ones, for example, in the intensity range of 1 pJ/cm2sec, or 0.1 μSv/h. The quantum-imaging system can also function as a photon spectrometer and can be configured to measure photon energies with high energy resolution such as, for example, 1% of photon energy.
US07781738B2	Digital X-ray image detector using an FED device Disclosed is a digital X-ray image detector using an FED, including an upper substrate and a lower substrate disposed to face each other; an anode formed beneath the upper substrate; a photoconductive layer formed beneath the anode for forming electron-hole pairs using X-rays; a cathode formed on the lower substrate; an emitter formed on the cathode for emitting electrons of the cathode; a gate electrode formed on an insulating layer provided around the emitter on the cathode; and a data processing part for converting information about the electron-hole pairs formed in the photoconductive layer by the X-rays, transferred from the anode, to digital data through signal processing including filtering, amplification, storage, or A/D conversion. The high performance digital X-ray image detector of this invention has a high image resolution and a large area, is easy to manufacture and process compared to conventional processes, and has excellent detection efficiency of electrical signals.
US07781733B2	In-situ high-resolution light-optical channel for optical viewing and surface processing in parallel with charged particle (FIB and SEM) techniques An apparatus for simultaneous parallel processing of a sample using light energy for optical viewing or surface processing in parallel with a charged particle beam. A charged particle beam transmits a focused ion beam or an electron beam along a path to a sample. An optical microscope transmits light along a first path to the sample, and a prism aligned along the first light path reflects light into a second light path toward the sample. A portion of the prism and reflective surface is removed for passage of the charged particle beam. A lens is aligned along the second light path and has a portion removed for passage of the charged particle beam. The removed portions of the prism and lens are aligned along the charged particle beam path to permit parallel delivery of the charged particle beam and the light to substantially the same portion of the sample.
US07781732B2	Real-time S-parameter imager Disclosed is a fully automated system capable of producing high quality real-time S-parameter images. It is a useful and versatile tool in Material Science and Solid State Technology for determining the location of subsurface defect types and concentrations on bulk-materials as well as thin-films. The system is also useful in locating top surface metallizations and structures in solid state devices. This imaging system operates by scanning the sample surface with either a small positron source (22Na) or a focused positron beam. The system also possesses another two major parts, namely electronic instrumentation and stand-alone imaging software. In the system, the processing time and use of system resources are constantly monitored and optimized for producing high resolution S-parameter image of the sample in real time with a general purpose personal computer. The system software possesses special features with its embedded specialized algorithms and techniques that provide the user with adequate freedom for analyzing various aspects of the image in order to obtain a clear inference of the defect profile while at the same time keeping automatic track on the instrumentation and hardware settings. The system is useful for semiconductor and metal samples, giving excellent quality images of the subsurface defect profile and has applications for biological samples.
US07781731B2	Method and apparatus for qualitatively analyzing high-molecular additives in metal plating solution Disclosed herein is a method of qualitatively analyzing high-molecular additives in a metal plating solution, including: removing sulfate ions and metal ions from a metal plating solution; and qualitatively analyzing the metal plating solution, from which sulfate ions and metal ions are removed, using Matrix-Assisted Laser Desorption/Ionization Time-Of-Flight Mass Spectroscopy (MALDI-TOF MS). The method is advantageous in that the structure and molecular weight of high-molecular additives present in very small amounts in a plating solution can be accurately measured while maintaining the specific structure and molecular weight thereof without degrading the high-molecular additives.
US07781730B2	Linear electronic field time-of-flight ion mass spectrometers Time-of-flight mass spectrometer comprising a first drift region and a second drift region enclosed within an evacuation chamber; a means of introducing an analyte of interest into the first drift region; a pulsed ionization source which produces molecular ions from said analyte of interest; a first foil positioned between the first drift region and the second drift region, which dissociates said molecular ions into constituent atomic ions and emits secondary electrons; an electrode which produces secondary electrons upon contact with a constituent atomic ion in second drift region; a stop detector comprising a first ion detection region and a second ion detection region; and a timing means connected to the pulsed ionization source, to the first ion detection region, and to the second ion detection region.
US07781727B2	Optoelectronic component comprising an encapsulant Provided are optoelectronic components which include an optoelectronic device and a structure for self-aligning the optoelectronic device. Also provided are optoelectronic modules and methods of forming optoelectronic components.
US07781720B2	Direct attach optical receiver module and method of testing A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.
US07781719B2	High sensitivity and high dynamic-range CMOS image sensor pixel structure with dynamic C-V characteristics A new photogate pixel structure for high performance CMOS Image Sensors is proposed. A new photogate structure is incorporated into the photodiode active-pixel structure. The proposed pixel structure exhibits the dynamic integration capacitance characteristics, which can be controlled by varying the control-voltage at the photogate node. Since the sensitivity is inversely proportional to the integration capacitance, the dynamic integration capacitance characteristics can provide the new functionality and controllability for high sensitivity and high dynamic range. At a low voltage level of the photogate, the pixel sensitivity of the new photogate pixel structure is maximized due to the minimum value of the integration capacitance. At a high voltage of the photogate, the dynamic range of the new structure can be maximized due to the increased well capacity. In addition, at an optimum bias voltage of the photogate, both the dynamic-range and the sensitivity can be simultaneously improved. Consequently, the new pixel structure allows performance tunability as well as optimization in both the dynamic range and the sensitivity of the image sensor cell.
US07781718B2	Globally reset image sensor pixels An imaging circuit includes a pixel array that is arranged to concurrently reset pixels in a pixel array in response to a global reset signal. The pixels are arranged in rows, such that the rows can be individually selected by a row select line. A reset transistor concurrently resets the pixels by coupling a reset voltage to a floating diffusion of the pixel. A transfer gate transistor selectively couples the floating diffusion to a storage region. A storage gate transistor selectively couples the storage region to a photosensitive region so that the reset transistor, the transfer gate transistor, and the storage gate transistor for each of the pixels can be activated in response to the global reset signal. A double correlated sampler may be used to provide a correlated double sample using a first sampled voltage of a reset voltage and a second sampled voltage of a pixel voltage that is produced when a photodiode region is exposed to incident light.
US07781710B2	Image pickup apparatus, control method, and program with autofocus selection An image pickup apparatus, a control method and a program are provided. The image pickup apparatus includes an imaging module which takes an image; a display module which displays the image taken by the imaging module; a touch panel configured integrally with the display module and manipulatable by a user; a focus frame control module which controls a focus frame in accordance with a manipulation of the touch panel by the user, the focus frame being set at a given position on the image displayed on the display module and being used for focus control; and a focus control module which controls focus based on an image inside the focus frame on the image displayed on the display module.
US07781705B2	Electrical connection to printed circuits on plastic panels A system for effectively defrosting a plastic window includes a transparent plastic panel, a heater grid having a plurality of grid lines that are integrally formed with the plastic panel, and equalizing means for equalizing the electrical current traveling through each of the grid lines.
US07781704B2	Control system for operating automotive vehicle components There is disclosed a control system for operating automotive vehicle components. The control system typically includes at least a control module programmed with instructions for controlling a heater, a ventilator or both.
US07781699B2	Plasma torch with post flow control A system for the efficient utilization of plasma torch post arc cooling gas includes a controller configured to automatically determine a post arc gas flow duration. The controller monitors a plasma arc parameter associated with a temperature of the plasma torch at arc termination. The controller dynamically determines the duration of post arc gas flow through the torch from the plasma arc parameter.
US07781698B2	Process for manufacturing a coiled insert of coated filaments A process for manufacturing a coiled insert of coated filaments is disclosed. Each filament includes a ceramic fiber coated with a metal sheath. The process includes a step of winding a sheet of coated filaments around a piece. At the start of winding, a first metal shim is placed beneath the sheet and coiled. At the end of winding, a second metal shim is placed on the sheet and coiled. The process is applied to the manufacture of aeronautical turbomachine components.
US07781694B2	Vacuum fault interrupter Exemplary vacuum fault interrupters are described.
US07781693B2	Method and system for sorting incoming mail A method and system for sorting mailpieces in a single pass is provided. The system consists of a mail feeding unit, a mail scanner and a mail distribution unit having a number of receiving bins. Mailpieces are fed into the system one at a time through the scanner to determine the mailstop of the mailpiece. A control system assigns unique mailstops to unique receiving bins. Each mailpiece is deposited in a receiving bin assigned with its mailstop. When the number of mailstops exceeds the number of receiving bins, the control system empties a receiving bin and assigns the new mailstop to the emptied bin so it can receive mailpieces having the new mailstop. Accordingly, the system can sort mail destined for “m” mailstops into “n” receiving bins where “m” is greater than “n”.
US07781692B2	Switch A switch for controlling first and second components of an electric circuit is proposed. The switch is operable between first and second positions to control the operation of the first of said components and is operable between third and fourth positions to control operation of the second of said components.
US07781689B2	Network protector retrofit handle assembly A retrofit operating handle assembly structured to allow a CM22 type circuit breaker to be operatively coupled to a MG 8 or 9 type circuit breaker tank is provided. The operating handle assembly includes a tank assembly, which is coupled to the MG 8 or 9 type circuit breaker tank, and a circuit breaker, which is coupled to the CM22 type circuit breaker.
US07781688B2	System and method for illuminating a keyboard or keypad input device An illuminated keyboard has at least one key carried by a support structure and operable to close an electrical contact on being depressed from above, the at least one key having a translucent top surface, a hollow space under the translucent top surface, and an opening into the hollow space other than through the top surface, and an electroluminescent illuminator comprising a region of electroluminescent material enabled to be inserted into the hollow space through the opening.
US07781684B2	Insulating gasket means for supporting a cable in a housing opening A compressible sealing gasket for supporting a cable in a wall opening contained in a housing wall includes a pair of gasket sections each having a planar surface that contains a recess, and at least one integral compressible sealing projection extending from the planar surface adjacent the recess. When the gasket sections are placed in an assembled condition with their planar surfaces in contiguous engagement, the recesses cooperate to define a cable opening for receiving a cable, and the projection is compressed between the gasket sections to seal the space between the gasket sections adjacent the cable opening. Preferably two laterally spaced integral sealing ribs are provided in each recess, which sealing ribs extend transversely completely across the recess and terminate at each end in a sealing projection that extends upwardly from the associated planar surface.
US07781683B2	Assembly for a microstimulator An electrode assembly includes an electrode electrically connected to a capacitor with a wire. An assembly carrier may be used to hold and secure at least the wire and capacitor during assembly. A method of assembly for attaching a wire to a capacitor and an electrode may include an assembly carrier for housing and securing the wire, capacitor, and electrode during assembly.
US07781682B2	Methods of fabricating multichip packages and structures formed thereby Methods and associated structures of forming a discontinuous sealant on a substrate, wherein an opening is formed at an integrated heat spreader gap region, wherein the substrate comprises a portion of a multi chip microelectronic package. A thermal interface material is placed on a top surface of a high power die disposed on the substrate, and then an integrated heat spreader lid is placed on top of the sealant and on top of the thermal interface material. A molding compound is flowed within an integrated heat spreader cavity through the opening directly on a top surface of a low power die disposed on the substrate.
US07781681B2	Multilayer printed wiring board A multilayer printed wiring board includes a core substrate and a built-up wiring layer formed by alternately layering conductor circuits and insulating resin layers. The built-up wiring layer includes a first surface provided in contact with the core substrate and a second surface opposing the first surface and including a mounting area on which at least one semiconductor device is to be mounted. A first plurality of through-hole conductors is formed in a first portion of the core substrate which corresponds to the mounting area of the second surface, and a second plurality of through-hole conductors formed in a second portion of the core substrate which corresponds to another area of the second surface other than the mounting area. A pitch between the first plurality of through-hole conductors is smaller than a pitch between the second plurality of through-hole conductors. In one aspect, a ratio of pads to through holes directly below a processor core section of the semiconductor device is less that a number of pads to through holes in an area outside the processor core.
US07781677B2	Transmission cable A transmission cable that has three signal lines, and in which there is little unwanted radiation noise, is provided. In a section that is perpendicular to the longitudinal direction of the differential transmission cable, the distance between any two signal lines of the three signal lines is equal to a predetermined value. The differential transmission cable is twisted in its longitudinal direction. The differential transmission cable further includes a dielectric core line, and the signal lines are formed on the surface of the dielectric core line. In the differential transmission cable, the signal lines are formed in a helix in the longitudinal direction of the dielectric core line.
US07781673B2	Polymers with low band gaps and high charge mobility This disclosure relates to a polymer containing a first comonomer repeat unit and a second comonomer repeat unit. The first comonomer repeat unit includes a cyclopentadithiophene moiety. The second comonomer repeat unit includes a thienothiophene moiety, a thienothiophene tetraoxide moiety, a dithienothiophene moiety, a dithienothiophene dioxide moiety, a dithienothiophene tetraoxide moiety, or a tetrahydroisoindole moiety. The polymer can be used as a photoactive material in a photovoltaic cell. This disclosure also relates to such photovoltaic cells, as well as modules containing such photovoltaic cells.
US07781672B2	Photovoltaic module architecture Photovoltaic modules, as well as related systems, methods and components are disclosed. In some embodiments, a photovoltaic module can include a first photovoltaic cell including an electrode, a second photovoltaic cell including an electrode, and an interconnect. The electrode of the first photovoltaic cell can overlap the electrode of the second photovoltaic cell. The interconnect can electrically connect the electrode of the first photovoltaic cell and the electrode of the second photovoltaic cell. The interconnect can mechanically couple the first and second photovoltaic cells.
US07781669B2	Photovoltaic cell In a photovoltaic cell, an i-type amorphous silicon film and an n-type amorphous silicon film are formed in a region excluding a predetermined width of an outer periphery on a main surface of an n-type single crystalline silicon substrate. A front electrode is formed so as to cover the i-type amorphous silicon film and the n-type amorphous silicon film on a main surface of the n-type single crystalline silicon substrate. An i-type amorphous silicon film and a p-type amorphous silicon film are formed on the entire area of a back surface of the n-type single crystalline silicon substrate. A back electrode is formed in a region excluding a predetermined width of an outer periphery on the p-type amorphous silicon film. A surface, on the side of the front electrode, of the photovoltaic cell is a primary light incidence surface.
US07781668B2	Substrate for thin-film solar cell, method for producing the same, and thin-film solar cell employing it An inexpensive substrate for thin film solar cells having improved performance of a thin film solar cell, and a manufacturing method thereof are provided by increasing light trapping effect due to effective increase in unevenness of a substrate for thin film solar cells. Furthermore, a thin film solar cell having improved performance using the substrate is provided. A substrate for thin film solar cells of the present invention has a transparent insulating substrate and a transparent electrode layer deposited thereon including at least zinc oxide (ZnO), the transparent insulating substrate has a fine surface unevenness having a root-mean-square deviation of the surface (RMS) 5 to 50 nm in an interface by a side of the transparent electrode layer, a projected area thereof consists of a curved surface, and furthermore a haze ratio or a ratio of a diffuse transmittance to a total transmittance as an index of unevenness of a substrate may be set at not less than 20% measured using a C light source. And thereby light trapping effect may effectively occur to improve performance of the thin film solar cell.
US07781663B2	Storage medium storing musical piece correction program and musical piece correction apparatus A musical piece correction apparatus corrects a sounding timing (note-on timings) of a sound constituting apart of a musical piece. First, the musical piece correction apparatus reads, from storage means, music performance data indicating sounding timings in the musical piece. Next, the musical piece correction apparatus sets a plurality of reference timings (grids) in a performance period of the musical piece, and sets, for each reference timing, a reference period (area) including said each reference timing. At this point, from among sounding timings included in the reference period, a nearest sounding timing to said each reference timing is selected, and the selected sounding timing is corrected so as to coincide with said each reference timing.
US07781658B2	Lug structure of drum The lug structure of a drum for installing a drum head on a drum shell according to the present invention, includes: a lug base which is installed on the drum shell; a lug which is held by the lug base, and which supports one end of a tightening bolt; and a lug movement restraining portion which is provided between the lug base and the lug, and includes a shaft-shape portion provided on the lug, two planar portions are provided on the lug base, and the two planar portions extends substantially parallel to a shaft line of the shaft-shape portion and is contactable with the shaft-shape portion.
US07781654B1	String instrument A string instrument includes a body portion having a first longitudinal axis, an elongate neck portion having a second longitudinal axis and first and second opposing ends located along the second longitudinal axis, and a fastener that secures one of the first or second ends to the body portion, wherein the first and second axes are misaligned from each other in a same plane.
US07781653B2	Stringed instrument using flowing liquid The present invention is a stringed instrument that comprises a circulating element that transmits a stream of liquid through a conduit at a flow rate of 0.92 meters per second to 1.58 meters per second. A string that is displaceable along the stream of liquid produces vibrations caused by the interaction between the stream of liquid and the string. A device positioned proximate the string registers vibrations emanating from the string. Interaction between said stream of liquid and said at least one string generate vibrations with frequencies ranging from 220 Hz to 1318 Hz.
US07781649B2	Soybean cultivar 27063030 A soybean cultivar designated 27063030 is disclosed. The invention relates to the seeds of soybean cultivar 27063030, to the plants of soybean 27063030, to plant parts of soybean cultivar 27063030 and to methods for producing a soybean plant produced by crossing soybean cultivar 27063030 with itself or with another soybean variety. The invention also relates to methods for producing a soybean plant containing in its genetic material one or more transgenes and to the transgenic soybean plants and plant parts produced by those methods. This invention also relates to soybean cultivars or breeding cultivars and plant parts derived from soybean variety 27063030, to methods for producing other soybean cultivars, lines or plant parts derived from soybean cultivar 27063030 and to the soybean plants, varieties, and their parts derived from use of those methods. The invention further relates to hybrid soybean seeds, plants and plant parts produced by crossing the cultivar 27063030 with another soybean cultivar.
US07781647B2	Mammalian-type glycosylation in transgenic plants expressing mammalian β1,4-galactosyltransferase The invention relates to the field of glycoprotein processing in transgenic plants used as cost efficient and contamination safe factories for the production of recombinant biopharmaceutical proteins or pharmaceutical compositions comprising these. The invention provides plants and plant cells comprising of functional mammalian enzyme providing N-glycan biosynthesis that is normally not present in plants, for example mammalian β 1,4-galactosyltransferase, said plants or plant cells additionally comprising at least a second mammalian protein or functional fragment thereof, for example a mammalian antibody, that is normally not present in plants.
US07781646B2	Specific genetic modification of the activity of trehalose-6-phosphate synthase and expression in a homologous or heterologous environment A method for the preparation of a eukaryotic organism, for example selected from plants, animals and fungi, showing constitutive, inducible and/or organ specific expression of a specifically modified TPS gene, which comprises the steps of providing a TPS gene; designing a suitable modification to the TPS gene by aligning the gene with the corresponding gene of yeast and establishing which part of the gene extends beyond the 5′ terminus of the yeast gene; deleting or inactivating a part of the N-terminal region of the TPS gene extending beyond the 5′ terminus of the yeast gene, in order to achieve an increased trehalose-6-phosphate synthase activity; cloning the thus modified gene into an expression vector under the control of a constitutive, inducible and/or organ-specific promoter; transforming a plant cell or tissue with the thus obtained expression vector; and regenerating a complete plant from the transformed plant cell or tissue.
US07781645B2	Expression system for synthetic zinc finger proteins and methods of using the same The invention relates to the field of plant and agricultural technology. More specifically, the invention relates to the use of zinc finger proteins and fusions of said proteins to regulate gene expression and metabolic pathways in plants.
US07781644B2	Arabidosis AtLEJ1 gene involved in inhibiting biosynthesis of jasmonic acid and ethylene and method for producing male-sterile plant using the same Disclosed herein are an Arabidopsis gene (AtLEJ1), acting as an inhibitor of the biosynthesis of the phytohormones jasmonic acid and ethylene, and a method for producing a male sterile transgenic plant using the same. The gene guarantees stable male sterile strains which need no maintainers for the maintenance thereof. Also, the transgenic plants comprising the gene can be readily restored to a fertile phenotype merely through hormonal treatment. Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
US07781635B1	Surfactant-based purification of nanotubes A mixture and method of using such mixture is provided for purifying carbon nanotubes. A substituted imidazolium cation is utilized to suspend carbon nanotubes in a nonpolar liquid. A polar solvent immiscible with the nonpolar liquid is mixed in to remove soot from the suspension, allowing recovery of the nanotubes. The relative gentleness of the separation provides nanotubes that are undamaged and unoxidized. The components of the mixture are economically advantageous for this use and the method is simple compared to other nanotube purification methods.
US07781633B2	Method for converting an oxygenate feed to a light olefin The present invention relates to a method for converting a feed including an oxygenate to a product including a light olefin. In particular, this invention relates to converting an oxygenate feedstock with a silicoaluminophosphate catalyst to a product including a light olefin in a reaction apparatus. More particularly, this invention provides a means by which an optimum level of coke can be determined and utilized to generate an optimum or near-optimum yield of light olefins such as ethylene and propylene in a oxygenates to olefins system.
US07781627B2	System and method for forming gas hydrates A system for forming gas hydrates includes a reactor adapted to receive a hydrate-forming fluid and a reaction fluid and react the hydrate-forming and reaction fluids within a reverse micellar solution to form gas hydrate particles; and a gas hydrate removal system coupled to the reactor, the gas hydrate removal system adapted to receive the gas hydrate particles within the reverse micellar solution and transport the gas hydrate particles away from the reactor. The gas hydrate removal system is adapted to transport gas hydrate particles away from the reactor concurrently with the formation of gas hydrate particles within the reactor.
US07781625B2	Process catalysed by bis-trifilmide compounds A process for carrying out a chemical reaction which is catalysed by one or more metal or hydrogen fluoroalkyl-sulfonylated compound which process comprises carrying out said reaction in the presence of an ionic liquid or in solvent-free conditions.
US07781617B2	Effective use method of medicaments and method of preventing expression of side effect A medicine which effectively functions as an immunosuppressant or anti-inflammatory agent and is effective in diminishing the occurrence of side effects. The medicine comprises a combination of: a diaryl sulfide or diaryl ether compound having a 2-amino-1,3-propanediol structure and having the function of diminishing lymphocytes circulating through the periphery; and an immunosuppressant and/or an anti-inflammatory agent.
US07781611B2	Nitro-sulfobenzamides The present invention relates to a compound of the formula (I) wherein R1 is an unsubstituted or substituted hydrocarbon radical having a total of 1 to 10 carbon atoms, preferably 1 to 6 carbon atoms, R2 is an unsubstituted or substituted hydrocarbon radical having a total of 1 to 10 carbon atoms, preferably 1 to 6 carbon atoms, or the group NR1R2 is a heterocyclic ring having 3 to 8 ring atoms which is unsubstituted or substituted and contains the nitrogen atom of the group NR1R2 as ring heteroatom and may also contain one or two further ring heteroatoms from the group consisting of N, O and S, and Q is H or a cation. The compounds of the present invention can advantageously be used for the preparation of sulfonylureas and their precursors such as sulfochlorides or sulfonamides.
US07781605B2	Composition and method for low temperature chemical vapor deposition of silicon-containing films including silicon carbonitride and silicon oxycarbonitride films Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as films including silicon carbonitride, silicon oxycarbonitride, and silicon nitride (Si3N4), and a method of depositing the silicon precursors on substrates using low temperature (e.g., <550° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.
US07781603B2	Method for producing trimethylsilyl azide The present invention relate to a method for producing a trimethylsilyl azide represented by the formula (3): (CH3)3SiN3 (3) which comprises reacting a trimethylsilyl chloride represented by the formula (1): (CH3)3SiCl (1) with an inorganic salt of hydrogen azide represented by the formula (2): M(N3)n (2) wherein M represents an alkali metal or an alkaline earth metal, and n represents 1 or 2,in the presence of a phase-transfer catalyst and an organic solvent having a high boiling point.
US07781595B2	Benzimidazole derivatives: preparation and pharmaceutical applications The present invention relates to hydroxamate compounds which are inhibitors of histone deacetylase. More particularly, the present invention relates to benzimidazole containing compounds and methods for their preparation. These compounds may be useful as medicaments for the treatment of proliferative disorders as well as other diseases involving, relating to or associated with dysregulation of histone deacetylase (HDAC).
US07781592B2	Thione derivative, method for the preparation thereof, and pharmaceutical composition containing the same A 1,2,4-triazole derivative of formula 1 or a non-toxic salt thereof, a preparation method thereof, and a pharmaceutical composition containing the derivative or the salt as an active ingredient are provided.
US07781591B2	Substituted 3-cyanopyridines as protein kinase inhibitors The present teachings provide compounds of formula I and their pharmaceutically acceptable salts, hydrates, and esters, wherein R1, R2, and X are as defined herein. The present teachings also provide methods of making the compounds of formula I, and methods of treating autoimmune and inflammatory diseases by administering a therapeutically effective amount of a compound or compounds of formula I to a mammal including a human.
US07781585B2	Crystalline forms of Gatifloxacin The present invention relates to a process for purification of novel polymorphic form of Gatifloxacin which comprises dissolving Gatifloxacin in about 15-50 volumes of methanol, removing insolubles if any, adding organic base to the solution, maintaining the solution at temperature of 30° C. to 70° C., for about 20 min to 4 hrs, followed by gradual cooling and maintaining the reaction mass to −10 to 20° C. for about 1-4 hrs, isolation and drying at temperature of about 45° C. to 65° C.
US07781581B2	Process for the preparation of 5-amino-3H-thiazolo[4,5-d]pyrimidin-2-one The present invention relates to a process for the preparation of 5-amino-3H-thiazolo[4,5-d]pyrimidin-2-one which is a useful intermediate in the preparation of certain thiazolo[4,5-d]pyrimidine nucleosides. The process comprises halogenating 2,4-diaminopyrimidine to form 2,4-diamino-5-halo-pyrimidine and then cyclocondensing the 2,4-diamino-5-halo-pyrimidine to form 5-amino-3H-thiazolo[4,5-d]pyrimidin-2-thione. The 5-amino-3H-thiazolo[4,5-d]pyrimidin-2-thione is then oxidized to afford the 5-amino-3H-thiazolo[4,5-d]pyrimidin-2-one.
US07781579B2	Cyclopentaphenanthrene-based compound and organic electroluminescent device using the same Provided are a cyclopentaphenanthrene-based compound and an organic EL device using the same. The cyclopentaphenanthrene-based compound is easy to prepare and excellent in solubility, color purity, and color stability. The cyclopentaphenanthrene-based compound is useful as a material for forming an organic layer, in particular, a light-emitting layer in an organic EL device, and as an organic dye or an electronic material such as a nonlinear optical material.
US07781575B2	siRNA targeting tumor protein 53 (p53) Efficient sequence specific gene silencing is possible through the use of siRNA technology. By selecting particular siRNAs by rational design, one can maximize the generation of an effective gene silencing reagent, as well as methods for silencing genes. Methods, compositions, and kits generated through rational design of siRNAs are disclosed.
US07781572B2	Nanosized carotenoid cyclodextrin complexes Methods for the preparation of nanosized nutrient formulations for enhanced absorption of nutritional agents. The methods include the complexation of cyclodextrin with carotenoids and incorporation of the complexes into the nutritional supplements without intermediate collection, isolation, and drying steps.
US07781571B2	Ophthalmic lens materials containing chromophores that absorb both UV and short wavelength visible light Chromophores that absorb both UV and short wavelength visible light are disclosed. The chromophores are particularly suitable for use in intraocular lens materials.
US07781567B2	Method for enzymatic production of GLP-2(1-33) and GLP-2(1-34) peptides The invention provides methods for making peptides from a polypeptide containing at least one copy of the peptide using clostripain to excise the peptide from the polypeptide. The methods enable the use of a single, highly efficient enzymatic cleavage to produce any desired peptide sequence.
US07781561B2	Processes of synthesizing aromatic amine-based benzoxazine resins Processes of synthesizing aromatic amine-based benzoxazine resins are disclosed. The processes provide new routes for synthesizing benzoxazine from aromatic diamines or multifunctional aromatic amines that may solve the problem of insoluble products resulted from the condensation of hydroxymethylamine with amine by using aromatic diamine, phenol and formaldehyde as a raw materials.
US07781553B2	Polymerization catalyst system utilizing external donor systems and processes of forming polymers therewith External donor systems, catalyst systems and olefin polymerization processes are described herein. The external donor systems generally include a first external donor represented by the general formula SiR2m(OR3)4-m, wherein each R2 is independently selected from alkyls, cycloalkyls, aryls and vinyls, each R3 is independently selected from alkyls and m is from 0 to 4. The external donor systems further include a second external donor represented by the general formula SiR4m(OR5)4-m, wherein each R4 is independently selected from alkyls, cycloalkyls, aryls and vinyls, each R5 is independently selected from alkyls, m is from 0 to 4 and at least one R4 is a C3 or greater alkyl.
US07781548B2	Microchannel polymerization reactor A microchannel polymerization reactor comprising: (a) a first microchannel adapted to carry a reactant stream; (b) a fluid conduit adapted to carry a fluid in thermal communication with the first microchannel; and (c) a static mixer in fluid communication with the first microchannel adapted to provide a mixing zone operative to change the cross-sectional fluid flow profile at a predetermined point along the first microchannel without changing the primary direction of the reactant stream through the first microchannel. The present invention also includes a method of carrying out a polymerization reaction within a microchannel reactor comprising: (i) directing at least one of monomer, initiator, water, surfactant, coagulant, and solvent into a reactant stream and into contact with reactant flowing within a first microchannel to initiate a polymerization reaction occurring within a first microchannel; and (ii) mixing the reactant of the reactant stream by positioning at least one static mixer in series with the reactant stream, where the static mixer is adapted to change a cross-sectional fluid flow profile of the reactant stream flowing through the first microchannel without changing a primary direction of the reactant stream through the first microchannel.
US07781540B2	Resin composition and molded articles thereof A resin composition, and molded articles thereof, where the resin composition simultaneously satisfies resistances, such as heat and environmental resistance, and moldability at high levels, and has excellent optical properties, such as high refractivity and low birefringence. The resin composition contains a polyester resin formed from a dicarboxylic acid component and a diol component (a) and a polycarbonate resin formed from a carbonate-forming component and a diol component (b), the diol component (a) containing a specific fluorene-containing compound and the diol component (b) containing a specific fluorene-containing compound.
US07781539B2	PHA blends This invention relates to blends containing two or more polyhydroxyalkanoates (PHAs), and related methods and articles.
US07781535B2	Proton conductor An acidic group-containing polymer which has an acidic group such as sulfonic acid group, phosphoric acid group, and phosphonic acid group, and a proton acceptor which has a boiling point at 1 atmosphere higher than 100° C. and which functions as a medium for conducting proton dissociated from the acidic group are retained in pores of a porous member. Preferred examples of the proton acceptor include a salt structure composed of an anion and a cation derived from a basic organic compound, a basic organic compound, and a dissociation-facilitating polymer which facilitates dissociation of proton. Any one of the acidic group-containing polymer and the proton acceptor may be retained first, or both may be retained simultaneously.
US07781533B2	Conjugated diene polymer, process for its production and rubber compositions containing the same A process for producing a conjugated diene-based polymer which comprises, in the first modification, modifying a conjugated diene-based polymer having active chain ends, which is obtained by polymerizing a diene-based monomer singly or with other monomers and has a content of a cis-1,4 unit of 75% by mole or greater in the conjugated diene portion of the main chain, by reacting the active chain ends with a hydrocarbyloxysilane compound and reacting the modified polymer with a specific compound such as a hydrocarbyloxysilane compound, and a rubber composition containing the polymer modified in accordance with the above process and, preferably, 10 to 100 parts by weight of silica and/or carbon black per 100 parts by weight of the rubber component containing the modified polymer, are provided. The rubber composition containing silica and/or carbon black exhibits improved fracture properties, abrasion resistance, low heat buildup property and excellent workability. A process for producing a conjugated diene-based polymer exhibiting improved cold flow, a polymer produced in accordance with the process, and a rubber composition and a tire using the polymer are also provided.
US07781531B2	Modified dental prosthesis Phosphate-containing co-polymers useful for making denture bases, denture liners and tissue conditioners with phosphate anion-charged surfaces are disclosed. The phosphate anions enable the denture bases, denture liners and tissue conditioners to adsorb cationic antimicrobial molecules. Dentures, denture bases materials, denture liners and tissue conditioners made of the above co-polymers are also disclosed. Further disclosed are methods for synthesizing the co-polymer(s) and for making the denture bases, denture liners and tissue conditioners.
US07781522B2	Curable silicone composition and cured product thereof A curable silicone composition includes: (A) an organopolysiloxane represented by the siloxane unit formula (1) given below and having at least two univalent organic groups that contain epoxy groups and are free of aromatic rings: [R13SiO1/2]a[R22SiO2/2]b[R3SiO3/2]c (where R1, R2, and R3 are univalent organic groups, at least two of which are univalent organic groups which contain epoxy groups and are free of aromatic rings; more than 20 mole % of R3 are aryl groups; a+b+c equals 1; on average, “a” satisfies the following condition: 0≦a≦0.8; on average, “b” satisfies the following condition: 0.2≦b≦0.8; and, on average, “c” satisfies the following condition: 0.2
US07781516B2	Flame retardant polymer composition A polymer composition includes a rubber modified vinyl resin, a cyclic alkyl phosphate compound, and an aromatic phosphate ester. Some embodiments may additionally comprises a polyphenylene ether resin. In some embodiments, the compositions have good flame retardancy, color stability, impact resistance, and thermal stability.
US07781515B2	Flame retardant polymer composition A polymer composition includes a rubber modified aromatic vinyl resin and a cyclic alkyl phosphate compound. In some embodiments, the cyclic alkyl phosphate compound is able to impart good flame retardancy to the composition, while maintaining a good balance of the other physical and mechanical properties of the resin including Vicat Softening Temperature and impact strength.
US07781510B2	Highly filled polymer compositions This invention pertains to highly filled polymer compositions comprising a low molecular weight ethylene and/or alpha olefin homopolymers and copolymers, or blends therefrom, filled with high concentrations of fillers or additives. Examples of such fillers or additives include fire retardants, talc, ceramic manufacturing agents, color concentrates, crosslinking agents, and blowing agents. Because of the low crystallinity (and therefore high percentage of amorphous phase) and low viscosities of the base polymers, highly processable compositions can be formed containing even if containing relatively high loadings of fillers or additives. Such highly filled compositions are thus ideally suited as concentrates or masterbatch formulations for a variety of different compounding applications.
US07781505B2	Process of stabilising siloxane polymers A process for stabilising the viscosity of an amino-functional siloxane polymer comprises adding a dialkoxydialkylsilane to the amino-functional siloxane polymer or to the reagents from which the amino-functional siloxane polymer is produced.
US07781502B2	Surface treatment composition, a material and a hydrophobic film fabricated from the same The present invention relates to a surface-treatment composition, a material and a hydrophobic film fabricated from the same. The composition of the invention comprises wax, silicone oil, C6 to C30 hydrocarbon mixtures, nano-particles and resin. The surface of materials treated with the composition of the present invention shows characteristics of nano roughness, low surface-energy, and low contact angle hysteresis.
US07781500B2	Coupling agents for natural fiber-filled polyolefins Disclosed herein is a process for preparing a composite material comprising mixing at least one natural fiber, at least one polyolefin resin, and at least one functionalized polyolefin coupling agent to provide said composite material; wherein said functionalized polyolefin coupling agent possesses a molecular weight distribution of greater than 2.5 (Mw/Mn by GPC) and comprises a base polyolefin resin that is grafted with a total of more than about 1 mmole of at least one polar monomer per 100 grams of functionalized polyolefin coupling agent.
US07781498B2	Cationic latex as a carrier for bioactive ingredients and methods for making and using the same This invention relates to latex compositions that incorporate at least one bioactive component such as an antibacterial or antifungal agent, and methods for making and using such latex compositions. The latex compositions disclosed herein can be prepared by the emulsion polymerization of the latex component monomers in the presence of the at least one bioactive component.
US07781494B2	Active energy curing type composition for in-place shaping gasket and in-place shaped gasket An active energy curing type composition for an in-place shaping gasket is provided which is capable of providing an in-place shaped gasket superior in heat resistance, weather resistance, oil resistance, curability, compression set, and the like. An active energy curing type composition for an in-place shaping gasket, comprising the under-mentioned components (A) and (B) as essential components, wherein the viscosity of the composition is 400 Pa·s or less at 23° C. and the compression set of a cured article which is prescribed in JIS K 6262 is 30% or less: (A) a vinyl polymer having two or more (meth)acryloyl groups per molecule at the molecular ends, and (B) a vinyl polymer having one (meth)acryloyl group per molecule at the molecular end.
US07781490B2	Process for the production of mixed alcohols The present invention relates to processes for forming mixed alcohols containing methanol and ethanol. The mixed alcohol can then be used as a feedstock for an oxygenate-to-olefin reaction system for conversion thereof to ethylene, propylene, and the like. In addition, the olefins produced by the oxygenate-to-olefin reaction can then be used as monomers for a polymerization of olefin-containing polymers and/or oligomers.
US07781487B2	Di-fluoro containing compounds as cysteine protease inhibitors The present invention is directed to compounds that are inhibitors of cysteine proteases, in particular, cathepsins B, K, L, F, and S, and are therefore useful in treating diseases mediated by these proteases. The present invention is directed to pharmaceutical compositions comprising these compounds and processes for preparing them.
US07781482B2	Substituted gamma lactams as therapeutic agents A compound comprising or a pharmaceutically acceptable salt thereof, or a prodrug thereof is disclosed herein. Y, A, and B are as described herein. Methods, compositions, and medicaments related to these compounds are also disclosed.
US07781479B2	Heteroaryl derivatives A compound of the following formula (1), or its prodrug or pharmaceutically acceptable salt thereof, being useful as a diabetic medicine or preventive, or blood sugar regulator, or therapeutic agent for hyperlipemia, etc. wherein the ring Z is an optionally substituted heteroaryl, W4 is a single bond, lower alkylene, etc., Ar2 is an optionally substituted aryl, etc., W3 is a single bond, lower alkylene, etc., Ar1 is an optionally substituted arylene, etc., each of W1 and W2 is an optionally substituted lower alkylene, etc., and R1 is carboxyl, an alkoxycarbonyl.
US07781477B2	Therapeutic use of N-(1H-Indolyl)-1H-indole-2-carboxamide derivatives The invention relates to therapeutic use of compounds of general formula (I): in which X1, X2, X3, X4, X5, Z1, Z2, Z3, Z4 and Z5, R, Y and n are as defined herein.
US07781474B2	Inhibitors of hepatitis C virus replication The embodiments provide compounds of the general Formula I, as well as compositions, including pharmaceutical compositions, comprising a subject compound. The embodiments provide compounds of the general Formula II, as well as compositions, including pharmaceutical compositions, comprising a subject compound. The embodiments provide compounds of the general Formula III, as well as compositions, including pharmaceutical compositions, comprising a subject compound. The embodiments further provide treatment methods, including methods of treating a hepatitis C virus infection and methods of treating liver fibrosis, the methods generally involving administering to an individual in need thereof an effective amount of a subject compound or composition.
US07781471B2	Diaryl triazolmethylamine derivatives, preparation and therapeutic use thereof The invention concerns compounds of formula (I): Wherein X, R1, R2, R3 and R4 are as described herein. The invention also concerns a method for preparing same and the therapeutic use thereof.
US07781463B2	Enzyme inhibitors Compounds of general formula (I): where A, E, G, X, Y and the bond - - - take various meanings are of use in the preparation of a pharmaceutical formulation, for example in the treatment of a disease in which GSK-3 is involved, including Alzheimer's disease or the non-dependent insulin diabetes mellitus, or hyperproliferative disease such as cancer, displasias or metaplasias of tissue, psoriasis, arteriosclerosis or restenosis.
US07781460B2	Substituted indazoles as inhibitors of phosphodiesterase type-IV The present invention relates to isoxazoline derivatives of structure Ia, which can be used as selective inhibitors of phosphodiesterase (PDE) type IV. Compounds disclosed herein can be useful in the treatment of CNS disorders, AIDS, asthma, arthritis, bronchitis, chronic obstructive pulmonary disease (COPD), psoriasis, allergic rhinitis, shock, atopic dermatitis, Crohn's disease, adult respiratory distress syndrome (ARDS), eosinophilic granuloma, allergic conjunctivitis, osteoarthritis, ulcerative colitis and other inflammatory diseases especially in humans. Processes for the preparation of disclosed compounds are provided, as well as pharmaceutical compositions containing the disclosed compounds, and their use as phosphodiesterase (PDE) type IV inhibitors.
US07781459B2	Carboxyalkoxy-substituted acyl-carboxyphenylurea derivatives and their use as medicaments The invention relates to acyl-carboxyphenylurea derivatives and to their physiologically tolerated salts and physiologically functional derivatives.Compounds of the formula I, in which the radicals have the stated meanings, and the physiological tolerated salts thereof and processes for preparing them are described. The compounds are suitable for example for the treatment of type II diabetes.
US07781457B2	Isoquinolinone potassium channel inhibitors The present invention relates to compounds having the structure formula (I) useful as potassium channel inhibitors to treat cardiac arrhythmias, and the like.
US07781455B2	Compounds Heterocyclic amides useful as inhibitors of dipeptylpeptidase-IV (DPP-IV) enzyme, process for the preparation thereof and intermediates therefore.
US07781453B2	Aminopyridine-derivatives The compounds of Formula (I) in which R1, R2, R3 and R4 have the meanings as given in the description are novel effective iNOS inhibitors.
US07781451B2	Thiazolopyridine derivatives, pharmaceut ical conditions containing them and methods of treating glucokinase mediated conditions The present invention provides compounds of the formula which are activators of glucokinase activity and, thus, may be employed as therapeutic agents for the treatment of glucokinase mediated conditions. Accordingly, the compounds of formula (I) may be employed for the prevention and the treatment of impaired glucose tolerance, Type 2 diabetes and obesity.
US07781438B2	Indolylmaleimide derivatives A compound of formula (I) wherein R, R1, and R2, ring A and ring B are as defined in the specification, processes for their production, their uses, in particular in transplantation, and pharmaceutical compositions containing them.
US07781429B2	Vehicle for topical delivery of anti-inflammatory compounds A vehicle for topical delivery which contains a liquid eutectic mixture of hydrophobic compounds.
US07781428B2	Pyrazoline compounds Compounds and pharmaceutically acceptable salts of the compounds are disclosed, wherein the compounds have the structure of Formula I: wherein R1, R2, R3A, R3B, R4, R5, R6, R7, R8, and X are as defined in the detailed description of the invention. Corresponding pharmaceutical compositions, methods of treatment, and intermediates are also disclosed.
US07781424B2	Modified release pharmaceutical formulation A modified release pharmaceutical composition comprising, as active ingredient, a compound of formula (I), wherein R1 represents C1-2 alkyl substituted by one or more fluoro substituents; R2 represents hydrogen, hydroxy, methoxy or ethoxy, and n represents 0, 1 or 2; or a pharmaceutically acceptable salt thereof; and a pharmaceutically acceptable diluent or carrier; provided that the formulation may only contain iota-carageenan and a neutral gelling polymer when the compound of formula (I) is in the form of a salt; such formulations being of use for the treatment of a cardiovascular disorder.
US07781417B2	Cyclodextrin dimers and derivatives thereof, methods for preparing them and their use, in particular, for the solubilizing pharmacologically active substances The invention relates to a compound according to the following general formula (I), in which: m represents an integer equal to 5, 6 or 7; n and n1 represent an integer from 1 to 5; the A groups represent, in particular, a hydrogenated atom; X represents O or S; Y represents, in particular, a group NR1, R1, representing, in particular, a hydrogenated atom; W represents CH or N; and Z represents, in particular, a hydrogenated atom.
US07781415B2	Process for delivering sirna to cardiac muscle tissue A process for delivering a polynucleotide to a cardiac tissue cell in a mammal is described, comprising introducing a composition consisting of a polynucleotide into a blood vessel and increasing permeability of the blood vessel to the polynucleotide. The polynucleotide can be a small interfering RNA or microRNA and inhibit gene expression in the cell.
US07781413B2	SEMA3B inhibits tumor growth and induces apoptosis in cancer cells The present invention identifies the semaphorin polypeptide SEMA3B as a tumor suppressor. This molecule can inhibit tumor growth and induce apoptosis of tumor cells when produced internally in a cancer cell via gene transfer, or when applied extracellularly. These observations permit new methods for treatment and diagnosis of cancer.
US07781408B2	Formulations for mediating inflammation and for reducing blood cholesterol The invention provides formulations for mediating inflammation and for lowering blood cholesterol. For example, inflammation of the intestine, retina or neural tissues, may be mediated. Further the formulations are effective in decreasing blood cholesterol absorption. The formulations comprise at least one ganglioside, which may be selected from the group consisting of: GD3, GM1, GM2, GM3, GD1b, NANA, and sialic acid. The invention further provides a method of treating or preventing inflammatory diseases by delivery of at least one ganglioside to a subject in need thereof, and a method of reducing blood cholesterol in a subject be delivery of a ganglioside-containing formulation. The formulation of the invention may be used to supplement foods or liquids, and may for example be used in preparation of infant formula or foods.
US07781405B2	Methods for reducing oxidative damage The invention provides a method for reducing oxidative damage in a mammal, a removed organ, or a cell in need thereof. The method comprises administering an effective amount of an aromatic cationic peptide. The aromatic cationic peptide has (a) at least one net positive charge; (b) a minimum of three amino acids; (c) a maximum of about twenty amino acids, (d) a relationship between the minimum number of net positive charges (pm) and the total number of amino acid residues (r) wherein 3pm is the largest number that is less than or equal to r+1; (e) a relationship between the minimum number of aromatic groups (a) and the total number of net positive charges (pt) wherein 3a or 2a is the largest number that is less than or equal to pt+1, except that when a is 1, pt may also be 1; and (f) at least one tyrosine or tryptophan amino acid.
US07781399B2	Immunogenic compositions and methods of use Disclosed herein are immunogenic compositions comprising a multilayer film comprising two or more layers of polyelectrolytes, wherein adjacent layers comprise oppositely charged polyelectrolytes. A first layer polyelectrolyte comprises an antigenic polypeptide comprising one or more surface adsorption regions covalently linked to one or more antigenic determinant regions, wherein the antigenic polypeptide and the one or more surface adsorption regions have the same polarity. The immunogenic compositions may be employed in methods of eliciting an immune response in a vertebrate organism.
US07781398B2	Drug comprising synthetic peptide analogs for the treatment of cancer The present invention relates to a combination of peptides that may be used for treatment of cancer. The peptide combination competes for the binding of specific neuropeptides at the plasma membrane and thereby alters the levels of key intracellular molecules implicated in cell proliferation, resulting in a broad spectrum of anticancer activity. The invention also relates to pharmaceutical compositions containing a combination of such peptide analogs.
US07781395B2	Process for purifying proteins The invention relates to a process for purifying a protein by mixing a protein preparation with a solution having a first salt and a second salt, wherein each salt has a different lyotropic value, and loading the mixture onto a hydrophobic interaction chromatography column. The dynamic capacity of the column for a protein using the two salt combination will be increased compared with the dynamic capacity of the column for either single salt alone.
US07781392B2	Perfume compositions A malodor reducing perfume composition comprising materials a having fruity note and a two groups of an amber note material where the amount of amber and fruity materials together is at least 3% by weight where the total weight percentage of group A amber materials and group B amber materials, WA, is equal to or greater than 0.5% or the total amount of amber and fruity materials together is at least 3+22*(0.5−WA) % by weight where WA is less than 0.5%; wherein amber note materials have an odour threshold lower than that of 1-(2,3,8,8-tetramethyl-1,2,3,4,5,6,7,8octahydronaphthalen-2-yl)ethanone and group B comprises materials with an amber note having an odour threshold equal to or higher than that of 1-(2,3,8,8-tetramethyl1,2,3,4,5,6,7,8-octahydronaphthalen-2-yl)ethanone; the weight ratio of amber note material having to fruity note material in the composition is in the range about 1:30 to 30:1.
US07781391B2	Amine/amide-functionalized lipophiles The present invention relates to amine functionalized lipophilic compounds and their use in personal care products, particularly those for colored hair.
US07781390B2	Highly branched primary alcohol compositions, and biodegradable detergents made therefrom There is provided a new branched primary alcohol composition and the sulfates thereof exhibiting good cold water detergency and biodegradability. The branched primary alcohol composition has an average number of branches per chain of at least 0.7, having at least 8 carbon atoms and containing both methyl and ethyl branches. The primary alcohol composition may also contain less than 0.5 atom % of quaternary carbon atoms, and a significant number ethyl branches, terminal isopropyl branches, and branching at the C3 position relative to the hydroxyl carbon. The process for its manufacture is by skeletally isomerizing an olefin feed having at least 7 carbon atoms followed by conversion to an alcohol, as by way of hydroformylation, and ultimately, sulfation to obtain a detergent surfactant. Useful catalysts include the zeolites having at least one channel with a crystallographic free diameter along the x and/or y planes of the [001] view ranging from greater than 4.2 Å and less than 7 Å but allows one to skeletally isomerize the olefin to produce a variety of branches, while retaining ready biodegradability and good cold water detergency.
US07781378B2	Protective coating for array material deposition An array is formed with a protective cover on a substrate. The protective cover is patterned to produce an array of openings to the substrate. Desired material is deposited on the substrate through the openings. The protective cover may then be removed. In one embodiment, the protective cover is a conformal polymer, such as di-para-xylylene. It may be removed by mechanical peeling. The material may be biological material such as DNA. The protective cover may be used to prevent non-specific hybridization in inter-spot regions by performing hybridization with the cover still in place. Hybridization that occurs in such regions between the spots may be removed with removal of the protective cover.
US07781377B2	Anti-epitaxial film in a superconducting article and related articles, devices and systems A superconducting article is provided that includes a substrate, an anti-epitaxial film over the substrate, a buffer film having biaxial crystal texture over the anti-epitaxial film, and a superconductor layer over the second buffer film. Also provided is a superconducting article as a tape, in a power cable, and a power transformer.
US07781375B2	Volumizing agents The present composition is capable of forming a particle film and comprises: (a) less than 99.65% by weight of at least one particle; (b) at least one volumizing agent selected from the group consisting of: (i) cellulose selected from the group consisting of ethyl hydroxy ethyl cellulose, hydroxy ethyl cellulose, hydroxy propyl cellulose, hydroxy ethyl methyl cellulose, hydroxy propyl methyl cellulose, methyl cellulose, ethyl cellulose, and ethyl methyl cellulose and present in an amount greater than 0.35% by weight; and (ii) non-cellulosic component or cellulose other than said cellulose (i) present in an amount of at least 0.05% by weight; and optionally (c) at least one spreader.The composition may be used to form agricultural films.
US07781374B2	Herbicides containing substituted Thien-3-yl-Sulphonylamino(thio)carbonyl-triazolin(thi)ones The invention relates to synergistic herbicidal compositions comprising an effective amount of an active compound combination comprising(a) one or more compounds of the formula (I) in which Q1, Q2, R1, R2, R3 and R4 are as defined in the disclosure—and salts of the compounds of the formula (I)— and (b) at least one of the known herbicides listed in the description and, if appropriate, (c) a safener. The invention also relates to the use of these compositions for controlling unwanted vegetation and to a process for preparing the compositions according to the invention.
US07781372B2	Fiber-based ceramic substrate and method of fabricating the same Low cost aluminosilicate fibers are used to form a ceramic substrate material using inorganic binders that promote the formation of stable compounds that inhibit the formation of crystal silica, or cristobalite, when the substrate is used or exposed to high operating temperatures. The aluminosilicate fibers are mixed with additives including organic and inorganic binders and a fluid to form a plastic mixture. The plastic mixture is formed into a green substrate, and subsequently cured into the ceramic substrate. The fiber-based constituents permit the formation of rigid porous structures for filtration, insulation, and high temperature processes and chemical reactions.
US07781370B2	Process for producing spherical activated carbon A spherical activated carbon is produced from a starting pitch obtainable from a heavy hydrocarbon oil, such as petroleum tar, coal tar or ethylene, through a moderate process. The starting pitch has a softening point of at least 150° C., a toluene-insoluble content of at least 40% and a property of retaining optical isotropy even after being heated at 430° C. for 1 hour. The starting pitch is converted into a porous spherical pitch, which is then infusibilized, carbonized and activated to provide a spherical activated carbon.
US07781366B2	Sol-gel based oxidation catalyst and coating system using same An oxidation catalyst system is formed by particles of an oxidation catalyst dispersed in a porous sol-gel binder. The oxidation catalyst system can be applied by brush or spray painting while the sol-gel binder is in its sol state.
US07781361B2	Method for regeneration of activated carbon catalyst beds Disclosed are methods and systems for regenerating mercury loaded activated carbon honeycomb catalyst beds. In one embodiment, the regeneration methods and systems disclosed herein can enable a more efficient and economical operation of a honeycomb based mercury removal system by, for example, allowing the reuse of a particular substrate multiple times.
US07781356B2	Epitaxial growth of group III nitrides on silicon substrates via a reflective lattice-matched zirconium diboride buffer layer A semiconductor structure and fabrication method is provided for integrating wide bandgap nitrides with silicon. The structure includes a substrate, a single crystal buffer layer formed by epitaxy over the substrate and a group III nitride film formed by epitaxy over the buffer layer. The buffer layer is reflective and conductive. The buffer layer may comprise B an element selected from the group consisting of Zr, Hf, Al. For example, the buffer layer may comprise ZrB2, AlB2 or HfB2. The buffer layer provides a lattice match with the group III nitride layer. The substrate can comprise silicon, silicon carbide (SiC), gallium arsenide (GaAs), sapphire or Al2O3. The group III nitride material includes GaN, AlN, InN, AlGaN, InGaN or AlInGaN and can form an active region. In a presently preferred embodiment, the buffer layer is ZrB2 and the substrate is Si(111) or Si(100) and the group III nitride layer comprises GaN. The ZrB2 buffer layer provides a reflective and conductive buffer layer that has a small lattice mismatch with GaN. The semiconductor structure can be used to fabricate active microelectronic devices, such as transistors including field effect transistors and bipolar transistors. The semiconductor structure also can be used to fabricate optoelectronic devices, such as laser diodes and light emitting diodes.
US07781354B2	Glass composition and method for production thereof, and glass substrate for information display device and information display device using the same The glass composition of the present invention includes the following components, expressed in mass %: 70% to 88% of SiO2; 6% to 18% of B2O3; 0.5% to 4.5% of Al2O3; 0% to 0.5% of Li2O; 0% to 0.5% of Na2O; 2% to 10% of K2O; and 0% to 2% of MgO+CaO+SrO+BaO, and the glass composition further includes chlorine (Cl). The glass composition of the present invention is used suitably as a glass substrate for an information display device.
US07781353B2	Extruded thermoplastic articles with enhanced surface segregation of internal melt additive Disclosed herein are extruded articles such as, for example, fibers and films, containing thermoplastic polymeric compositions having a copolymeric major component and a melt processable additive treatment, wherein the melt processable additives have enhanced segregation to or expression at the surface of the article, thereby improving the effect of the desired characteristic of the additive treatment. Also disclosed are multicomponent extruded thermoplastic articles having two or more distinct components arranged in a specific geometric arrangement, wherein the thermoplastic polymeric composition of at least one geometric component includes a copolymeric major component and a melt processable additive treatment. Also disclosed are web materials including the extruded articles. Such extruded articles and multicomponent extruded thermoplastic articles are useful in a wide range of limited use and disposable products such as, for example, personal care products, mortuary and veterinary products, protective wear garments, and medical care garments and products.

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